1 /* Target-dependent code for GDB, the GNU debugger.
3 Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
32 /* From ppc-linux-tdep.c... */
33 enum return_value_convention
ppc_sysv_abi_return_value (struct gdbarch
*gdbarch
,
35 struct regcache
*regcache
,
37 const gdb_byte
*writebuf
);
38 enum return_value_convention
ppc_sysv_abi_broken_return_value (struct gdbarch
*gdbarch
,
40 struct regcache
*regcache
,
42 const gdb_byte
*writebuf
);
43 CORE_ADDR
ppc_sysv_abi_push_dummy_call (struct gdbarch
*gdbarch
,
44 struct value
*function
,
45 struct regcache
*regcache
,
46 CORE_ADDR bp_addr
, int nargs
,
47 struct value
**args
, CORE_ADDR sp
,
49 CORE_ADDR struct_addr
);
50 CORE_ADDR
ppc64_sysv_abi_push_dummy_call (struct gdbarch
*gdbarch
,
51 struct value
*function
,
52 struct regcache
*regcache
,
53 CORE_ADDR bp_addr
, int nargs
,
54 struct value
**args
, CORE_ADDR sp
,
56 CORE_ADDR struct_addr
);
57 CORE_ADDR
ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch
*gdbarch
,
59 int ppc_linux_memory_remove_breakpoint (struct bp_target_info
*bp_tgt
);
60 struct link_map_offsets
*ppc_linux_svr4_fetch_link_map_offsets (void);
61 void ppc_linux_supply_gregset (struct regcache
*regcache
,
62 int regnum
, const void *gregs
, size_t size
,
64 void ppc_linux_supply_fpregset (const struct regset
*regset
,
65 struct regcache
*regcache
,
66 int regnum
, const void *gregs
, size_t size
);
68 enum return_value_convention
ppc64_sysv_abi_return_value (struct gdbarch
*gdbarch
,
70 struct regcache
*regcache
,
72 const gdb_byte
*writebuf
);
74 /* From rs6000-tdep.c... */
75 int altivec_register_p (int regno
);
76 int spe_register_p (int regno
);
78 /* Return non-zero if the architecture described by GDBARCH has
79 floating-point registers (f0 --- f31 and fpscr). */
80 int ppc_floating_point_unit_p (struct gdbarch
*gdbarch
);
82 /* Register set description. */
84 struct ppc_reg_offsets
86 /* General-purpose registers. */
96 /* Floating-point registers. */
100 /* AltiVec registers. */
106 /* Supply register REGNUM in the general-purpose register set REGSET
107 from the buffer specified by GREGS and LEN to register cache
108 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
110 extern void ppc_supply_gregset (const struct regset
*regset
,
111 struct regcache
*regcache
,
112 int regnum
, const void *gregs
, size_t len
);
114 /* Supply register REGNUM in the floating-point register set REGSET
115 from the buffer specified by FPREGS and LEN to register cache
116 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
118 extern void ppc_supply_fpregset (const struct regset
*regset
,
119 struct regcache
*regcache
,
120 int regnum
, const void *fpregs
, size_t len
);
122 /* Collect register REGNUM in the general-purpose register set
123 REGSET. from register cache REGCACHE into the buffer specified by
124 GREGS and LEN. If REGNUM is -1, do this for all registers in
127 extern void ppc_collect_gregset (const struct regset
*regset
,
128 const struct regcache
*regcache
,
129 int regnum
, void *gregs
, size_t len
);
131 /* Collect register REGNUM in the floating-point register set
132 REGSET. from register cache REGCACHE into the buffer specified by
133 FPREGS and LEN. If REGNUM is -1, do this for all registers in
136 extern void ppc_collect_fpregset (const struct regset
*regset
,
137 const struct regcache
*regcache
,
138 int regnum
, void *fpregs
, size_t len
);
140 /* Private data that this module attaches to struct gdbarch. */
144 int wordsize
; /* size in bytes of fixed-point word */
145 const struct reg
*regs
; /* from current variant */
146 int ppc_gp0_regnum
; /* GPR register 0 */
147 int ppc_toc_regnum
; /* TOC register */
148 int ppc_ps_regnum
; /* Processor (or machine) status (%msr) */
149 int ppc_cr_regnum
; /* Condition register */
150 int ppc_lr_regnum
; /* Link register */
151 int ppc_ctr_regnum
; /* Count register */
152 int ppc_xer_regnum
; /* Integer exception register */
154 /* Not all PPC and RS6000 variants will have the registers
155 represented below. A -1 is used to indicate that the register
156 is not present in this variant. */
158 /* Floating-point registers. */
159 int ppc_fp0_regnum
; /* floating-point register 0 */
160 int ppc_fpscr_regnum
; /* fp status and condition register */
162 /* Segment registers. */
163 int ppc_sr0_regnum
; /* segment register 0 */
165 /* Multiplier-Quotient Register (older POWER architectures only). */
168 /* Altivec registers. */
169 int ppc_vr0_regnum
; /* First AltiVec register */
170 int ppc_vrsave_regnum
; /* Last AltiVec register */
173 int ppc_ev0_upper_regnum
; /* First GPR upper half register */
174 int ppc_ev0_regnum
; /* First ev register */
175 int ppc_ev31_regnum
; /* Last ev register */
176 int ppc_acc_regnum
; /* SPE 'acc' register */
177 int ppc_spefscr_regnum
; /* SPE 'spefscr' register */
179 /* Offset to ABI specific location where link register is saved. */
182 /* An array of integers, such that sim_regno[I] is the simulator
183 register number for GDB register number I, or -1 if the
184 simulator does not implement that register. */
189 /* Constants for register set sizes. */
192 ppc_num_gprs
= 32, /* 32 general-purpose registers */
193 ppc_num_fprs
= 32, /* 32 floating-point registers */
194 ppc_num_srs
= 16, /* 16 segment registers */
195 ppc_num_vrs
= 32 /* 32 Altivec vector registers */
199 /* Constants for SPR register numbers. These are *not* GDB register
200 numbers: they are the numbers used in the PowerPC ISA itself to
201 refer to these registers.
203 This table includes all the SPRs from all the variants I could find
206 There may be registers from different PowerPC variants assigned the
207 same number, but that's fine: GDB and the SIM always use the
208 numbers in the context of a particular variant, so it's not
211 We need to deviate from the naming pattern when variants have
212 special-purpose registers of the same name, but with different
213 numbers. Fortunately, this is rare: look below to see how we
214 handle the 'tcr' registers on the 403/403GX and 602. */
241 ppc_spr_counta
= 150,
242 ppc_spr_countb
= 151,
247 ppc_spr_lctrl1
= 156,
248 ppc_spr_lctrl2
= 157,
251 ppc_spr_vrsave
= 256,
261 ppc_spr_spefscr
= 512,
262 ppc_spr_ibat0u
= 528,
263 ppc_spr_ibat0l
= 529,
264 ppc_spr_ibat1u
= 530,
265 ppc_spr_ibat1l
= 531,
266 ppc_spr_ibat2u
= 532,
267 ppc_spr_ibat2l
= 533,
268 ppc_spr_ibat3u
= 534,
269 ppc_spr_ibat3l
= 535,
270 ppc_spr_dbat0u
= 536,
271 ppc_spr_dbat0l
= 537,
272 ppc_spr_dbat1u
= 538,
273 ppc_spr_dbat1l
= 539,
274 ppc_spr_dbat2u
= 540,
275 ppc_spr_dbat2l
= 541,
276 ppc_spr_dbat3u
= 542,
277 ppc_spr_dbat3l
= 543,
278 ppc_spr_ic_cst
= 560,
279 ppc_spr_ic_adr
= 561,
280 ppc_spr_ic_dat
= 562,
281 ppc_spr_dc_cst
= 568,
282 ppc_spr_dc_adr
= 569,
283 ppc_spr_dc_dat
= 570,
287 ppc_spr_mi_ctr
= 784,
289 ppc_spr_mi_epn
= 787,
290 ppc_spr_mi_twc
= 789,
291 ppc_spr_mi_rpn
= 790,
292 ppc_spr_mi_cam
= 816,
293 ppc_spr_mi_ram0
= 817,
294 ppc_spr_mi_ram1
= 818,
295 ppc_spr_md_ctr
= 792,
296 ppc_spr_m_casid
= 793,
298 ppc_spr_md_epn
= 795,
300 ppc_spr_md_twc
= 797,
301 ppc_spr_md_rpn
= 798,
303 ppc_spr_mi_dbcam
= 816,
304 ppc_spr_mi_dbram0
= 817,
305 ppc_spr_mi_dbram1
= 818,
306 ppc_spr_md_dbcam
= 824,
307 ppc_spr_md_cam
= 824,
308 ppc_spr_md_dbram0
= 825,
309 ppc_spr_md_ram0
= 825,
310 ppc_spr_md_dbram1
= 826,
311 ppc_spr_md_ram1
= 826,
312 ppc_spr_ummcr0
= 936,
316 ppc_spr_ummcr1
= 940,
337 ppc_spr_icdbdr
= 979,
346 ppc_spr_602_tcr
= 984,
347 ppc_spr_403_tcr
= 986,
350 ppc_spr_esasrr
= 988,
371 ppc_spr_thrm1
= 1020,
373 ppc_spr_thrm2
= 1021,
375 ppc_spr_thrm3
= 1022,
377 ppc_spr_fpecr
= 1022,
383 /* Instruction size. */
384 #define PPC_INSN_SIZE 4
386 /* Estimate for the maximum number of instrctions in a function epilogue. */
387 #define PPC_MAX_EPILOGUE_INSTRUCTIONS 52
389 #endif /* ppc-tdep.h */
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