1 /* Target-dependent code for GDB, the GNU debugger.
3 Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2007
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
30 /* From ppc-linux-tdep.c... */
31 enum return_value_convention
ppc_sysv_abi_return_value (struct gdbarch
*gdbarch
,
33 struct regcache
*regcache
,
35 const gdb_byte
*writebuf
);
36 enum return_value_convention
ppc_sysv_abi_broken_return_value (struct gdbarch
*gdbarch
,
38 struct regcache
*regcache
,
40 const gdb_byte
*writebuf
);
41 CORE_ADDR
ppc_sysv_abi_push_dummy_call (struct gdbarch
*gdbarch
,
42 struct value
*function
,
43 struct regcache
*regcache
,
44 CORE_ADDR bp_addr
, int nargs
,
45 struct value
**args
, CORE_ADDR sp
,
47 CORE_ADDR struct_addr
);
48 CORE_ADDR
ppc64_sysv_abi_push_dummy_call (struct gdbarch
*gdbarch
,
49 struct value
*function
,
50 struct regcache
*regcache
,
51 CORE_ADDR bp_addr
, int nargs
,
52 struct value
**args
, CORE_ADDR sp
,
54 CORE_ADDR struct_addr
);
55 CORE_ADDR
ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch
*gdbarch
,
57 int ppc_linux_memory_remove_breakpoint (struct bp_target_info
*bp_tgt
);
58 struct link_map_offsets
*ppc_linux_svr4_fetch_link_map_offsets (void);
59 const struct regset
*ppc_linux_gregset (int);
60 const struct regset
*ppc_linux_fpregset (void);
62 enum return_value_convention
ppc64_sysv_abi_return_value (struct gdbarch
*gdbarch
,
64 struct regcache
*regcache
,
66 const gdb_byte
*writebuf
);
68 /* From rs6000-tdep.c... */
69 int altivec_register_p (int regno
);
70 int spe_register_p (int regno
);
72 /* Return non-zero if the architecture described by GDBARCH has
73 floating-point registers (f0 --- f31 and fpscr). */
74 int ppc_floating_point_unit_p (struct gdbarch
*gdbarch
);
76 /* Register set description. */
78 struct ppc_reg_offsets
80 /* General-purpose registers. */
82 int gpr_size
; /* size for r0-31, pc, ps, lr, ctr. */
83 int xr_size
; /* size for cr, xer, mq. */
92 /* Floating-point registers. */
97 /* AltiVec registers. */
103 /* Supply register REGNUM in the general-purpose register set REGSET
104 from the buffer specified by GREGS and LEN to register cache
105 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
107 extern void ppc_supply_gregset (const struct regset
*regset
,
108 struct regcache
*regcache
,
109 int regnum
, const void *gregs
, size_t len
);
111 /* Supply register REGNUM in the floating-point register set REGSET
112 from the buffer specified by FPREGS and LEN to register cache
113 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
115 extern void ppc_supply_fpregset (const struct regset
*regset
,
116 struct regcache
*regcache
,
117 int regnum
, const void *fpregs
, size_t len
);
119 /* Collect register REGNUM in the general-purpose register set
120 REGSET. from register cache REGCACHE into the buffer specified by
121 GREGS and LEN. If REGNUM is -1, do this for all registers in
124 extern void ppc_collect_gregset (const struct regset
*regset
,
125 const struct regcache
*regcache
,
126 int regnum
, void *gregs
, size_t len
);
128 /* Collect register REGNUM in the floating-point register set
129 REGSET. from register cache REGCACHE into the buffer specified by
130 FPREGS and LEN. If REGNUM is -1, do this for all registers in
133 extern void ppc_collect_fpregset (const struct regset
*regset
,
134 const struct regcache
*regcache
,
135 int regnum
, void *fpregs
, size_t len
);
137 /* Private data that this module attaches to struct gdbarch. */
141 int wordsize
; /* size in bytes of fixed-point word */
142 int ppc_gp0_regnum
; /* GPR register 0 */
143 int ppc_toc_regnum
; /* TOC register */
144 int ppc_ps_regnum
; /* Processor (or machine) status (%msr) */
145 int ppc_cr_regnum
; /* Condition register */
146 int ppc_lr_regnum
; /* Link register */
147 int ppc_ctr_regnum
; /* Count register */
148 int ppc_xer_regnum
; /* Integer exception register */
150 /* Not all PPC and RS6000 variants will have the registers
151 represented below. A -1 is used to indicate that the register
152 is not present in this variant. */
154 /* Floating-point registers. */
155 int ppc_fp0_regnum
; /* floating-point register 0 */
156 int ppc_fpscr_regnum
; /* fp status and condition register */
158 /* Multiplier-Quotient Register (older POWER architectures only). */
161 /* Altivec registers. */
162 int ppc_vr0_regnum
; /* First AltiVec register */
163 int ppc_vrsave_regnum
; /* Last AltiVec register */
166 int ppc_ev0_upper_regnum
; /* First GPR upper half register */
167 int ppc_ev0_regnum
; /* First ev register */
168 int ppc_ev31_regnum
; /* Last ev register */
169 int ppc_acc_regnum
; /* SPE 'acc' register */
170 int ppc_spefscr_regnum
; /* SPE 'spefscr' register */
172 /* Offset to ABI specific location where link register is saved. */
175 /* An array of integers, such that sim_regno[I] is the simulator
176 register number for GDB register number I, or -1 if the
177 simulator does not implement that register. */
180 /* Minimum possible text address. */
181 CORE_ADDR text_segment_base
;
183 /* ISA-specific types. */
184 struct type
*ppc_builtin_type_vec64
;
188 /* Constants for register set sizes. */
191 ppc_num_gprs
= 32, /* 32 general-purpose registers */
192 ppc_num_fprs
= 32, /* 32 floating-point registers */
193 ppc_num_srs
= 16, /* 16 segment registers */
194 ppc_num_vrs
= 32 /* 32 Altivec vector registers */
198 /* Register number constants. These are GDB internal register
199 numbers; they are not used for the simulator or remote targets.
200 Extra SPRs (those other than MQ, CTR, LR, XER, SPEFSCR) are given
201 numbers above PPC_NUM_REGS. So are segment registers and other
202 target-defined registers. */
212 PPC_FPSCR_REGNUM
= 70,
214 PPC_SPE_UPPER_GP0_REGNUM
= 72,
215 PPC_SPE_ACC_REGNUM
= 104,
216 PPC_SPE_FSCR_REGNUM
= 105,
217 PPC_VR0_REGNUM
= 106,
218 PPC_VSCR_REGNUM
= 138,
219 PPC_VRSAVE_REGNUM
= 139,
224 /* Instruction size. */
225 #define PPC_INSN_SIZE 4
227 /* Estimate for the maximum number of instrctions in a function epilogue. */
228 #define PPC_MAX_EPILOGUE_INSTRUCTIONS 52
230 extern struct target_desc
*tdesc_powerpc_e500
;
232 #endif /* ppc-tdep.h */