77150af0c41cc4678071e9382fb0d069f6216055
[deliverable/binutils-gdb.git] / gdb / ppcnbsd-tdep.c
1 /* Target-dependent code for PowerPC systems running NetBSD.
2
3 Copyright 2002, 2003, 2004 Free Software Foundation, Inc.
4
5 Contributed by Wasabi Systems, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24 #include "defs.h"
25 #include "gdbcore.h"
26 #include "regcache.h"
27 #include "target.h"
28 #include "breakpoint.h"
29 #include "value.h"
30 #include "osabi.h"
31
32 #include "ppc-tdep.h"
33 #include "ppcnbsd-tdep.h"
34 #include "nbsd-tdep.h"
35 #include "tramp-frame.h"
36 #include "trad-frame.h"
37
38 #include "solib-svr4.h"
39
40 #define REG_FIXREG_OFFSET(x) ((x) * 4)
41 #define REG_LR_OFFSET (32 * 4)
42 #define REG_CR_OFFSET (33 * 4)
43 #define REG_XER_OFFSET (34 * 4)
44 #define REG_CTR_OFFSET (35 * 4)
45 #define REG_PC_OFFSET (36 * 4)
46 #define SIZEOF_STRUCT_REG (37 * 4)
47
48 #define FPREG_FPR_OFFSET(x) ((x) * 8)
49 #define FPREG_FPSCR_OFFSET (32 * 8)
50 #define SIZEOF_STRUCT_FPREG (33 * 8)
51
52 void
53 ppcnbsd_supply_reg (char *regs, int regno)
54 {
55 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
56 int i;
57
58 for (i = 0; i <= 31; i++)
59 {
60 if (regno == i || regno == -1)
61 supply_register (i, regs + REG_FIXREG_OFFSET (i));
62 }
63
64 if (regno == tdep->ppc_lr_regnum || regno == -1)
65 supply_register (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);
66
67 if (regno == tdep->ppc_cr_regnum || regno == -1)
68 supply_register (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);
69
70 if (regno == tdep->ppc_xer_regnum || regno == -1)
71 supply_register (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);
72
73 if (regno == tdep->ppc_ctr_regnum || regno == -1)
74 supply_register (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);
75
76 if (regno == PC_REGNUM || regno == -1)
77 supply_register (PC_REGNUM, regs + REG_PC_OFFSET);
78 }
79
80 void
81 ppcnbsd_fill_reg (char *regs, int regno)
82 {
83 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
84 int i;
85
86 for (i = 0; i <= 31; i++)
87 {
88 if (regno == i || regno == -1)
89 regcache_collect (i, regs + REG_FIXREG_OFFSET (i));
90 }
91
92 if (regno == tdep->ppc_lr_regnum || regno == -1)
93 regcache_collect (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);
94
95 if (regno == tdep->ppc_cr_regnum || regno == -1)
96 regcache_collect (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);
97
98 if (regno == tdep->ppc_xer_regnum || regno == -1)
99 regcache_collect (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);
100
101 if (regno == tdep->ppc_ctr_regnum || regno == -1)
102 regcache_collect (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);
103
104 if (regno == PC_REGNUM || regno == -1)
105 regcache_collect (PC_REGNUM, regs + REG_PC_OFFSET);
106 }
107
108 void
109 ppcnbsd_supply_fpreg (char *fpregs, int regno)
110 {
111 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
112 int i;
113
114 for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
115 {
116 if (regno == i || regno == -1)
117 supply_register (i, fpregs + FPREG_FPR_OFFSET (i - FP0_REGNUM));
118 }
119
120 if (regno == tdep->ppc_fpscr_regnum || regno == -1)
121 supply_register (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
122 }
123
124 void
125 ppcnbsd_fill_fpreg (char *fpregs, int regno)
126 {
127 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
128 int i;
129
130 for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
131 {
132 if (regno == i || regno == -1)
133 regcache_collect (i, fpregs + FPREG_FPR_OFFSET (i - FP0_REGNUM));
134 }
135
136 if (regno == tdep->ppc_fpscr_regnum || regno == -1)
137 regcache_collect (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
138 }
139
140 static void
141 fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
142 CORE_ADDR ignore)
143 {
144 char *regs, *fpregs;
145
146 /* We get everything from one section. */
147 if (which != 0)
148 return;
149
150 regs = core_reg_sect;
151 fpregs = core_reg_sect + SIZEOF_STRUCT_REG;
152
153 /* Integer registers. */
154 ppcnbsd_supply_reg (regs, -1);
155
156 /* Floating point registers. */
157 ppcnbsd_supply_fpreg (fpregs, -1);
158 }
159
160 static void
161 fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size, int which,
162 CORE_ADDR ignore)
163 {
164 switch (which)
165 {
166 case 0: /* Integer registers. */
167 if (core_reg_size != SIZEOF_STRUCT_REG)
168 warning ("Wrong size register set in core file.");
169 else
170 ppcnbsd_supply_reg (core_reg_sect, -1);
171 break;
172
173 case 2: /* Floating point registers. */
174 if (core_reg_size != SIZEOF_STRUCT_FPREG)
175 warning ("Wrong size FP register set in core file.");
176 else
177 ppcnbsd_supply_fpreg (core_reg_sect, -1);
178 break;
179
180 default:
181 /* Don't know what kind of register request this is; just ignore it. */
182 break;
183 }
184 }
185
186 static struct core_fns ppcnbsd_core_fns =
187 {
188 bfd_target_unknown_flavour, /* core_flavour */
189 default_check_format, /* check_format */
190 default_core_sniffer, /* core_sniffer */
191 fetch_core_registers, /* core_read_registers */
192 NULL /* next */
193 };
194
195 static struct core_fns ppcnbsd_elfcore_fns =
196 {
197 bfd_target_elf_flavour, /* core_flavour */
198 default_check_format, /* check_format */
199 default_core_sniffer, /* core_sniffer */
200 fetch_elfcore_registers, /* core_read_registers */
201 NULL /* next */
202 };
203
204 /* NetBSD is confused. It appears that 1.5 was using the correct SVr4
205 convention but, 1.6 switched to the below broken convention. For
206 the moment use the broken convention. Ulgh!. */
207
208 static enum return_value_convention
209 ppcnbsd_return_value (struct gdbarch *gdbarch, struct type *valtype,
210 struct regcache *regcache, void *readbuf,
211 const void *writebuf)
212 {
213 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
214 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
215 && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
216 && TYPE_VECTOR (valtype))
217 && !(TYPE_LENGTH (valtype) == 1
218 || TYPE_LENGTH (valtype) == 2
219 || TYPE_LENGTH (valtype) == 4
220 || TYPE_LENGTH (valtype) == 8))
221 return RETURN_VALUE_STRUCT_CONVENTION;
222 else
223 return ppc_sysv_abi_broken_return_value (gdbarch, valtype, regcache,
224 readbuf, writebuf);
225 }
226
227 static void
228 ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self,
229 struct frame_info *next_frame,
230 struct trad_frame_cache *this_cache,
231 CORE_ADDR func)
232 {
233 CORE_ADDR base;
234 CORE_ADDR offset;
235 int i;
236 struct gdbarch *gdbarch = get_frame_arch (next_frame);
237 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
238
239 base = frame_unwind_register_unsigned (next_frame, SP_REGNUM);
240 offset = base + 0x18 + 2 * tdep->wordsize;
241 for (i = 0; i < 32; i++)
242 {
243 int regnum = i + tdep->ppc_gp0_regnum;
244 trad_frame_set_reg_addr (this_cache, regnum, offset);
245 offset += tdep->wordsize;
246 }
247 trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, offset);
248 offset += tdep->wordsize;
249 trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, offset);
250 offset += tdep->wordsize;
251 trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, offset);
252 offset += tdep->wordsize;
253 trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, offset);
254 offset += tdep->wordsize;
255 trad_frame_set_reg_addr (this_cache, PC_REGNUM, offset); /* SRR0? */
256 offset += tdep->wordsize;
257
258 /* Construct the frame ID using the function start. */
259 trad_frame_set_id (this_cache, frame_id_build (base, func));
260 }
261
262 /* Given the NEXT frame, examine the instructions at and around this
263 frame's resume address (aka PC) to see of they look like a signal
264 trampoline. Return the address of the trampolines first
265 instruction, or zero if it isn't a signal trampoline. */
266
267 static const struct tramp_frame ppcnbsd_sigtramp = {
268 4, /* insn size */
269 { /* insn */
270 0x38610018, /* addi r3,r1,24 */
271 0x38000127, /* li r0,295 */
272 0x44000002, /* sc */
273 0x38000001, /* li r0,1 */
274 0x44000002, /* sc */
275 TRAMP_SENTINEL_INSN
276 },
277 ppcnbsd_sigtramp_cache_init
278 };
279
280 static void
281 ppcnbsd_init_abi (struct gdbarch_info info,
282 struct gdbarch *gdbarch)
283 {
284 /* For NetBSD, this is an on again, off again thing. Some systems
285 do use the broken struct convention, and some don't. */
286 set_gdbarch_return_value (gdbarch, ppcnbsd_return_value);
287 set_solib_svr4_fetch_link_map_offsets (gdbarch,
288 nbsd_ilp32_solib_svr4_fetch_link_map_offsets);
289 tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd_sigtramp);
290 }
291
292 void
293 _initialize_ppcnbsd_tdep (void)
294 {
295 gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_NETBSD_ELF,
296 ppcnbsd_init_abi);
297
298 deprecated_add_core_fns (&ppcnbsd_core_fns);
299 deprecated_add_core_fns (&ppcnbsd_elfcore_fns);
300 }
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