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[deliverable/binutils-gdb.git] / gdb / ppcnbsd-tdep.c
1 /* Target-dependent code for PowerPC systems running NetBSD.
2
3 Copyright 2002, 2003, 2004 Free Software Foundation, Inc.
4
5 Contributed by Wasabi Systems, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24 #include "defs.h"
25 #include "gdbcore.h"
26 #include "regcache.h"
27 #include "target.h"
28 #include "breakpoint.h"
29 #include "value.h"
30 #include "osabi.h"
31
32 #include "ppc-tdep.h"
33 #include "ppcnbsd-tdep.h"
34 #include "nbsd-tdep.h"
35 #include "tramp-frame.h"
36 #include "trad-frame.h"
37
38 #include "solib-svr4.h"
39
40 #define REG_FIXREG_OFFSET(x) ((x) * 4)
41 #define REG_LR_OFFSET (32 * 4)
42 #define REG_CR_OFFSET (33 * 4)
43 #define REG_XER_OFFSET (34 * 4)
44 #define REG_CTR_OFFSET (35 * 4)
45 #define REG_PC_OFFSET (36 * 4)
46 #define SIZEOF_STRUCT_REG (37 * 4)
47
48 #define FPREG_FPR_OFFSET(x) ((x) * 8)
49 #define FPREG_FPSCR_OFFSET (32 * 8)
50 #define SIZEOF_STRUCT_FPREG (33 * 8)
51
52 void
53 ppcnbsd_supply_reg (char *regs, int regno)
54 {
55 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
56 int i;
57
58 for (i = 0; i <= 31; i++)
59 {
60 if (regno == i || regno == -1)
61 supply_register (i, regs + REG_FIXREG_OFFSET (i));
62 }
63
64 if (regno == tdep->ppc_lr_regnum || regno == -1)
65 supply_register (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);
66
67 if (regno == tdep->ppc_cr_regnum || regno == -1)
68 supply_register (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);
69
70 if (regno == tdep->ppc_xer_regnum || regno == -1)
71 supply_register (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);
72
73 if (regno == tdep->ppc_ctr_regnum || regno == -1)
74 supply_register (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);
75
76 if (regno == PC_REGNUM || regno == -1)
77 supply_register (PC_REGNUM, regs + REG_PC_OFFSET);
78 }
79
80 void
81 ppcnbsd_fill_reg (char *regs, int regno)
82 {
83 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
84 int i;
85
86 for (i = 0; i <= 31; i++)
87 {
88 if (regno == i || regno == -1)
89 regcache_collect (i, regs + REG_FIXREG_OFFSET (i));
90 }
91
92 if (regno == tdep->ppc_lr_regnum || regno == -1)
93 regcache_collect (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);
94
95 if (regno == tdep->ppc_cr_regnum || regno == -1)
96 regcache_collect (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);
97
98 if (regno == tdep->ppc_xer_regnum || regno == -1)
99 regcache_collect (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);
100
101 if (regno == tdep->ppc_ctr_regnum || regno == -1)
102 regcache_collect (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);
103
104 if (regno == PC_REGNUM || regno == -1)
105 regcache_collect (PC_REGNUM, regs + REG_PC_OFFSET);
106 }
107
108 void
109 ppcnbsd_supply_fpreg (char *fpregs, int regno)
110 {
111 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
112 int i;
113
114 for (i = 0; i < ppc_num_fprs; i++)
115 {
116 if (regno == tdep->ppc_fp0_regnum + i || regno == -1)
117 supply_register (tdep->ppc_fp0_regnum + i,
118 fpregs + FPREG_FPR_OFFSET (i));
119 }
120
121 if (regno == tdep->ppc_fpscr_regnum || regno == -1)
122 supply_register (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
123 }
124
125 void
126 ppcnbsd_fill_fpreg (char *fpregs, int regno)
127 {
128 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
129 int i;
130
131 for (i = 0; i < ppc_num_fprs; i++)
132 {
133 if (regno == tdep->ppc_fp0_regnum + i || regno == -1)
134 regcache_collect (tdep->ppc_fp0_regnum + i,
135 fpregs + FPREG_FPR_OFFSET (i));
136 }
137
138 if (regno == tdep->ppc_fpscr_regnum || regno == -1)
139 regcache_collect (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
140 }
141
142 static void
143 fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
144 CORE_ADDR ignore)
145 {
146 char *regs, *fpregs;
147
148 /* We get everything from one section. */
149 if (which != 0)
150 return;
151
152 regs = core_reg_sect;
153 fpregs = core_reg_sect + SIZEOF_STRUCT_REG;
154
155 /* Integer registers. */
156 ppcnbsd_supply_reg (regs, -1);
157
158 /* Floating point registers. */
159 ppcnbsd_supply_fpreg (fpregs, -1);
160 }
161
162 static void
163 fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size, int which,
164 CORE_ADDR ignore)
165 {
166 switch (which)
167 {
168 case 0: /* Integer registers. */
169 if (core_reg_size != SIZEOF_STRUCT_REG)
170 warning ("Wrong size register set in core file.");
171 else
172 ppcnbsd_supply_reg (core_reg_sect, -1);
173 break;
174
175 case 2: /* Floating point registers. */
176 if (core_reg_size != SIZEOF_STRUCT_FPREG)
177 warning ("Wrong size FP register set in core file.");
178 else
179 ppcnbsd_supply_fpreg (core_reg_sect, -1);
180 break;
181
182 default:
183 /* Don't know what kind of register request this is; just ignore it. */
184 break;
185 }
186 }
187
188 static struct core_fns ppcnbsd_core_fns =
189 {
190 bfd_target_unknown_flavour, /* core_flavour */
191 default_check_format, /* check_format */
192 default_core_sniffer, /* core_sniffer */
193 fetch_core_registers, /* core_read_registers */
194 NULL /* next */
195 };
196
197 static struct core_fns ppcnbsd_elfcore_fns =
198 {
199 bfd_target_elf_flavour, /* core_flavour */
200 default_check_format, /* check_format */
201 default_core_sniffer, /* core_sniffer */
202 fetch_elfcore_registers, /* core_read_registers */
203 NULL /* next */
204 };
205
206 /* NetBSD is confused. It appears that 1.5 was using the correct SVr4
207 convention but, 1.6 switched to the below broken convention. For
208 the moment use the broken convention. Ulgh!. */
209
210 static enum return_value_convention
211 ppcnbsd_return_value (struct gdbarch *gdbarch, struct type *valtype,
212 struct regcache *regcache, void *readbuf,
213 const void *writebuf)
214 {
215 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
216 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
217 && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
218 && TYPE_VECTOR (valtype))
219 && !(TYPE_LENGTH (valtype) == 1
220 || TYPE_LENGTH (valtype) == 2
221 || TYPE_LENGTH (valtype) == 4
222 || TYPE_LENGTH (valtype) == 8))
223 return RETURN_VALUE_STRUCT_CONVENTION;
224 else
225 return ppc_sysv_abi_broken_return_value (gdbarch, valtype, regcache,
226 readbuf, writebuf);
227 }
228
229 static void
230 ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self,
231 struct frame_info *next_frame,
232 struct trad_frame_cache *this_cache,
233 CORE_ADDR func)
234 {
235 CORE_ADDR base;
236 CORE_ADDR offset;
237 int i;
238 struct gdbarch *gdbarch = get_frame_arch (next_frame);
239 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
240
241 base = frame_unwind_register_unsigned (next_frame, SP_REGNUM);
242 offset = base + 0x18 + 2 * tdep->wordsize;
243 for (i = 0; i < 32; i++)
244 {
245 int regnum = i + tdep->ppc_gp0_regnum;
246 trad_frame_set_reg_addr (this_cache, regnum, offset);
247 offset += tdep->wordsize;
248 }
249 trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, offset);
250 offset += tdep->wordsize;
251 trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, offset);
252 offset += tdep->wordsize;
253 trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, offset);
254 offset += tdep->wordsize;
255 trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, offset);
256 offset += tdep->wordsize;
257 trad_frame_set_reg_addr (this_cache, PC_REGNUM, offset); /* SRR0? */
258 offset += tdep->wordsize;
259
260 /* Construct the frame ID using the function start. */
261 trad_frame_set_id (this_cache, frame_id_build (base, func));
262 }
263
264 /* Given the NEXT frame, examine the instructions at and around this
265 frame's resume address (aka PC) to see of they look like a signal
266 trampoline. Return the address of the trampolines first
267 instruction, or zero if it isn't a signal trampoline. */
268
269 static const struct tramp_frame ppcnbsd_sigtramp = {
270 4, /* insn size */
271 { /* insn */
272 0x38610018, /* addi r3,r1,24 */
273 0x38000127, /* li r0,295 */
274 0x44000002, /* sc */
275 0x38000001, /* li r0,1 */
276 0x44000002, /* sc */
277 TRAMP_SENTINEL_INSN
278 },
279 ppcnbsd_sigtramp_cache_init
280 };
281
282 static void
283 ppcnbsd_init_abi (struct gdbarch_info info,
284 struct gdbarch *gdbarch)
285 {
286 /* For NetBSD, this is an on again, off again thing. Some systems
287 do use the broken struct convention, and some don't. */
288 set_gdbarch_return_value (gdbarch, ppcnbsd_return_value);
289 set_solib_svr4_fetch_link_map_offsets (gdbarch,
290 nbsd_ilp32_solib_svr4_fetch_link_map_offsets);
291 tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd_sigtramp);
292 }
293
294 void
295 _initialize_ppcnbsd_tdep (void)
296 {
297 gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_NETBSD_ELF,
298 ppcnbsd_init_abi);
299
300 deprecated_add_core_fns (&ppcnbsd_core_fns);
301 deprecated_add_core_fns (&ppcnbsd_elfcore_fns);
302 }
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