gdb/ppcnbsd-tdep.c

   1 /* Target-dependent code for NetBSD/powerpc.
   2
   3    Copyright (C) 2002-2014 Free Software Foundation, Inc.
   4
   5    Contributed by Wasabi Systems, Inc.
   6
   7    This file is part of GDB.
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  21
  22 #include "defs.h"
  23 #include "gdbtypes.h"
  24 #include "osabi.h"
  25 #include "regcache.h"
  26 #include "regset.h"
  27 #include "trad-frame.h"
  28 #include "tramp-frame.h"
  29
  30 #include "ppc-tdep.h"
  31 #include "ppcnbsd-tdep.h"
  32 #include "solib-svr4.h"
  33
  34 /* Register offsets from <machine/reg.h>.  */
  35 struct ppc_reg_offsets ppcnbsd_reg_offsets;
  36 \f
  37
  38 /* Core file support.  */
  39
  40 /* NetBSD/powerpc register sets.  */
  41
  42 const struct regset ppcnbsd_gregset =
  43 {
  44   &ppcnbsd_reg_offsets,
  45   ppc_supply_gregset
  46 };
  47
  48 const struct regset ppcnbsd_fpregset =
  49 {
  50   &ppcnbsd_reg_offsets,
  51   ppc_supply_fpregset
  52 };
  53
  54 /* Return the appropriate register set for the core section identified
  55    by SECT_NAME and SECT_SIZE.  */
  56
  57 static const struct regset *
  58 ppcnbsd_regset_from_core_section (struct gdbarch *gdbarch,
  59                                   const char *sect_name, size_t sect_size)
  60 {
  61   if (strcmp (sect_name, ".reg") == 0 && sect_size >= 148)
  62     return &ppcnbsd_gregset;
  63
  64   if (strcmp (sect_name, ".reg2") == 0 && sect_size >= 264)
  65     return &ppcnbsd_fpregset;
  66
  67   return NULL;
  68 }
  69 \f
  70
  71 /* NetBSD is confused.  It appears that 1.5 was using the correct SVR4
  72    convention but, 1.6 switched to the below broken convention.  For
  73    the moment use the broken convention.  Ulgh!  */
  74
  75 static enum return_value_convention
  76 ppcnbsd_return_value (struct gdbarch *gdbarch, struct value *function,
  77                       struct type *valtype, struct regcache *regcache,
  78                       gdb_byte *readbuf, const gdb_byte *writebuf)
  79 {
  80 #if 0
  81   if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
  82        || TYPE_CODE (valtype) == TYPE_CODE_UNION)
  83       && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
  84             && TYPE_VECTOR (valtype))
  85       && !(TYPE_LENGTH (valtype) == 1
  86            || TYPE_LENGTH (valtype) == 2
  87            || TYPE_LENGTH (valtype) == 4
  88            || TYPE_LENGTH (valtype) == 8))
  89     return RETURN_VALUE_STRUCT_CONVENTION;
  90   else
  91 #endif
  92     return ppc_sysv_abi_broken_return_value (gdbarch, function, valtype,
  93                                              regcache, readbuf, writebuf);
  94 }
  95 \f
  96
  97 /* Signal trampolines.  */
  98
  99 static const struct tramp_frame ppcnbsd2_sigtramp;
 100
 101 static void
 102 ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self,
 103                              struct frame_info *this_frame,
 104                              struct trad_frame_cache *this_cache,
 105                              CORE_ADDR func)
 106 {
 107   struct gdbarch *gdbarch = get_frame_arch (this_frame);
 108   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 109   CORE_ADDR addr, base;
 110   int i;
 111
 112   base = get_frame_register_unsigned (this_frame,
 113                                       gdbarch_sp_regnum (gdbarch));
 114   if (self == &ppcnbsd2_sigtramp)
 115     addr = base + 0x10 + 2 * tdep->wordsize;
 116   else
 117     addr = base + 0x18 + 2 * tdep->wordsize;
 118   for (i = 0; i < ppc_num_gprs; i++, addr += tdep->wordsize)
 119     {
 120       int regnum = i + tdep->ppc_gp0_regnum;
 121       trad_frame_set_reg_addr (this_cache, regnum, addr);
 122     }
 123   trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, addr);
 124   addr += tdep->wordsize;
 125   trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, addr);
 126   addr += tdep->wordsize;
 127   trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, addr);
 128   addr += tdep->wordsize;
 129   trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, addr);
 130   addr += tdep->wordsize;
 131   trad_frame_set_reg_addr (this_cache, gdbarch_pc_regnum (gdbarch),
 132                            addr); /* SRR0?  */
 133   addr += tdep->wordsize;
 134
 135   /* Construct the frame ID using the function start.  */
 136   trad_frame_set_id (this_cache, frame_id_build (base, func));
 137 }
 138
 139 static const struct tramp_frame ppcnbsd_sigtramp =
 140 {
 141   SIGTRAMP_FRAME,
 142   4,
 143   {
 144     { 0x3821fff0, -1 },         /* add r1,r1,-16 */
 145     { 0x4e800021, -1 },         /* blrl */
 146     { 0x38610018, -1 },         /* addi r3,r1,24 */
 147     { 0x38000127, -1 },         /* li r0,295 */
 148     { 0x44000002, -1 },         /* sc */
 149     { 0x38000001, -1 },         /* li r0,1 */
 150     { 0x44000002, -1 },         /* sc */
 151     { TRAMP_SENTINEL_INSN, -1 }
 152   },
 153   ppcnbsd_sigtramp_cache_init
 154 };
 155
 156 /* NetBSD 2.0 introduced a slightly different signal trampoline.  */
 157
 158 static const struct tramp_frame ppcnbsd2_sigtramp =
 159 {
 160   SIGTRAMP_FRAME,
 161   4,
 162   {
 163     { 0x3821fff0, -1 },         /* add r1,r1,-16 */
 164     { 0x4e800021, -1 },         /* blrl */
 165     { 0x38610010, -1 },         /* addi r3,r1,16 */
 166     { 0x38000127, -1 },         /* li r0,295 */
 167     { 0x44000002, -1 },         /* sc */
 168     { 0x38000001, -1 },         /* li r0,1 */
 169     { 0x44000002, -1 },         /* sc */
 170     { TRAMP_SENTINEL_INSN, -1 }
 171   },
 172   ppcnbsd_sigtramp_cache_init
 173 };
 174 \f
 175
 176 static void
 177 ppcnbsd_init_abi (struct gdbarch_info info,
 178                   struct gdbarch *gdbarch)
 179 {
 180   /* For NetBSD, this is an on again, off again thing.  Some systems
 181      do use the broken struct convention, and some don't.  */
 182   set_gdbarch_return_value (gdbarch, ppcnbsd_return_value);
 183
 184   /* NetBSD uses SVR4-style shared libraries.  */
 185   set_solib_svr4_fetch_link_map_offsets
 186     (gdbarch, svr4_ilp32_fetch_link_map_offsets);
 187
 188   set_gdbarch_regset_from_core_section
 189     (gdbarch, ppcnbsd_regset_from_core_section);
 190
 191   tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd_sigtramp);
 192   tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd2_sigtramp);
 193 }
 194 \f
 195
 196 /* Provide a prototype to silence -Wmissing-prototypes.  */
 197 void _initialize_ppcnbsd_tdep (void);
 198
 199 void
 200 _initialize_ppcnbsd_tdep (void)
 201 {
 202   gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_NETBSD_ELF,
 203                           ppcnbsd_init_abi);
 204
 205   /* Avoid initializing the register offsets again if they were
 206      already initailized by ppcnbsd-nat.c.  */
 207   if (ppcnbsd_reg_offsets.pc_offset == 0)
 208     {
 209       /* General-purpose registers.  */
 210       ppcnbsd_reg_offsets.r0_offset = 0;
 211       ppcnbsd_reg_offsets.gpr_size = 4;
 212       ppcnbsd_reg_offsets.xr_size = 4;
 213       ppcnbsd_reg_offsets.lr_offset = 128;
 214       ppcnbsd_reg_offsets.cr_offset = 132;
 215       ppcnbsd_reg_offsets.xer_offset = 136;
 216       ppcnbsd_reg_offsets.ctr_offset = 140;
 217       ppcnbsd_reg_offsets.pc_offset = 144;
 218       ppcnbsd_reg_offsets.ps_offset = -1;
 219       ppcnbsd_reg_offsets.mq_offset = -1;
 220
 221       /* Floating-point registers.  */
 222       ppcnbsd_reg_offsets.f0_offset = 0;
 223       ppcnbsd_reg_offsets.fpscr_offset = 256;
 224       ppcnbsd_reg_offsets.fpscr_size = 4;
 225
 226       /* AltiVec registers.  */
 227       ppcnbsd_reg_offsets.vr0_offset = 0;
 228       ppcnbsd_reg_offsets.vrsave_offset = 512;
 229       ppcnbsd_reg_offsets.vscr_offset = 524;
 230     }
 231 }