gdb/regcache.c

   1 /* Cache and manage the values of registers for GDB, the GNU debugger.
   2    Copyright 1986, 87, 89, 91, 94, 95, 96, 1998, 2000
   3    Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 59 Temple Place - Suite 330,
  20    Boston, MA 02111-1307, USA.  */
  21
  22 #include "defs.h"
  23 #include "frame.h"
  24 #include "inferior.h"
  25 #include "target.h"
  26 #include "gdbarch.h"
  27
  28 /*
  29  * DATA STRUCTURE
  30  *
  31  * Here is the actual register cache.
  32  */
  33
  34 /* NOTE: this is a write-back cache.  There is no "dirty" bit for
  35    recording if the register values have been changed (eg. by the
  36    user).  Therefore all registers must be written back to the
  37    target when appropriate.  */
  38
  39 /* REGISTERS contains the cached register values (in target byte order). */
  40
  41 char *registers;
  42
  43 /* REGISTER_VALID is 0 if the register needs to be fetched,
  44                      1 if it has been fetched, and
  45                     -1 if the register value was not available.
  46    "Not available" means don't try to fetch it again.  */
  47
  48 signed char *register_valid;
  49
  50 /* The thread/process associated with the current set of registers.
  51    For now, -1 is special, and means `no current process'.  */
  52
  53 static int registers_pid = -1;
  54
  55 /*
  56  * FUNCTIONS:
  57  */
  58
  59 /* REGISTER_CACHED()
  60
  61    Returns 0 if the value is not in the cache (needs fetch).
  62           >0 if the value is in the cache.
  63           <0 if the value is permanently unavailable (don't ask again).  */
  64
  65 int
  66 register_cached (int regnum)
  67 {
  68   return register_valid[regnum];
  69 }
  70
  71 /* FIND_SAVED_REGISTER ()
  72
  73    Return the address in which frame FRAME's value of register REGNUM
  74    has been saved in memory.  Or return zero if it has not been saved.
  75    If REGNUM specifies the SP, the value we return is actually
  76    the SP value, not an address where it was saved.  */
  77
  78 CORE_ADDR
  79 find_saved_register (struct frame_info *frame, int regnum)
  80 {
  81   register struct frame_info *frame1 = NULL;
  82   register CORE_ADDR addr = 0;
  83
  84   if (frame == NULL)            /* No regs saved if want current frame */
  85     return 0;
  86
  87 #ifdef HAVE_REGISTER_WINDOWS
  88   /* We assume that a register in a register window will only be saved
  89      in one place (since the name changes and/or disappears as you go
  90      towards inner frames), so we only call get_frame_saved_regs on
  91      the current frame.  This is directly in contradiction to the
  92      usage below, which assumes that registers used in a frame must be
  93      saved in a lower (more interior) frame.  This change is a result
  94      of working on a register window machine; get_frame_saved_regs
  95      always returns the registers saved within a frame, within the
  96      context (register namespace) of that frame. */
  97
  98   /* However, note that we don't want this to return anything if
  99      nothing is saved (if there's a frame inside of this one).  Also,
 100      callers to this routine asking for the stack pointer want the
 101      stack pointer saved for *this* frame; this is returned from the
 102      next frame.  */
 103
 104   if (REGISTER_IN_WINDOW_P (regnum))
 105     {
 106       frame1 = get_next_frame (frame);
 107       if (!frame1)
 108         return 0;               /* Registers of this frame are active.  */
 109
 110       /* Get the SP from the next frame in; it will be this
 111          current frame.  */
 112       if (regnum != SP_REGNUM)
 113         frame1 = frame;
 114
 115       FRAME_INIT_SAVED_REGS (frame1);
 116       return frame1->saved_regs[regnum];        /* ... which might be zero */
 117     }
 118 #endif /* HAVE_REGISTER_WINDOWS */
 119
 120   /* Note that this next routine assumes that registers used in
 121      frame x will be saved only in the frame that x calls and
 122      frames interior to it.  This is not true on the sparc, but the
 123      above macro takes care of it, so we should be all right. */
 124   while (1)
 125     {
 126       QUIT;
 127       frame1 = get_prev_frame (frame1);
 128       if (frame1 == 0 || frame1 == frame)
 129         break;
 130       FRAME_INIT_SAVED_REGS (frame1);
 131       if (frame1->saved_regs[regnum])
 132         addr = frame1->saved_regs[regnum];
 133     }
 134
 135   return addr;
 136 }
 137
 138 /* DEFAULT_GET_SAVED_REGISTER ()
 139
 140    Find register number REGNUM relative to FRAME and put its (raw,
 141    target format) contents in *RAW_BUFFER.  Set *OPTIMIZED if the
 142    variable was optimized out (and thus can't be fetched).  Set *LVAL
 143    to lval_memory, lval_register, or not_lval, depending on whether
 144    the value was fetched from memory, from a register, or in a strange
 145    and non-modifiable way (e.g. a frame pointer which was calculated
 146    rather than fetched).  Set *ADDRP to the address, either in memory
 147    on as a REGISTER_BYTE offset into the registers array.
 148
 149    Note that this implementation never sets *LVAL to not_lval.  But
 150    it can be replaced by defining GET_SAVED_REGISTER and supplying
 151    your own.
 152
 153    The argument RAW_BUFFER must point to aligned memory.  */
 154
 155 static void
 156 default_get_saved_register (char *raw_buffer,
 157                             int *optimized,
 158                             CORE_ADDR *addrp,
 159                             struct frame_info *frame,
 160                             int regnum,
 161                             enum lval_type *lval)
 162 {
 163   CORE_ADDR addr;
 164
 165   if (!target_has_registers)
 166     error ("No registers.");
 167
 168   /* Normal systems don't optimize out things with register numbers.  */
 169   if (optimized != NULL)
 170     *optimized = 0;
 171   addr = find_saved_register (frame, regnum);
 172   if (addr != 0)
 173     {
 174       if (lval != NULL)
 175         *lval = lval_memory;
 176       if (regnum == SP_REGNUM)
 177         {
 178           if (raw_buffer != NULL)
 179             {
 180               /* Put it back in target format.  */
 181               store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
 182                              (LONGEST) addr);
 183             }
 184           if (addrp != NULL)
 185             *addrp = 0;
 186           return;
 187         }
 188       if (raw_buffer != NULL)
 189         target_read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
 190     }
 191   else
 192     {
 193       if (lval != NULL)
 194         *lval = lval_register;
 195       addr = REGISTER_BYTE (regnum);
 196       if (raw_buffer != NULL)
 197         read_register_gen (regnum, raw_buffer);
 198     }
 199   if (addrp != NULL)
 200     *addrp = addr;
 201 }
 202
 203 void
 204 get_saved_register (char *raw_buffer,
 205                     int *optimized,
 206                     CORE_ADDR *addrp,
 207                     struct frame_info *frame,
 208                     int regnum,
 209                     enum lval_type *lval)
 210 {
 211   GET_SAVED_REGISTER (raw_buffer, optimized, addrp, frame, regnum, lval);
 212 }
 213
 214 /* READ_RELATIVE_REGISTER_RAW_BYTES_FOR_FRAME
 215
 216    Copy the bytes of register REGNUM, relative to the input stack frame,
 217    into our memory at MYADDR, in target byte order.
 218    The number of bytes copied is REGISTER_RAW_SIZE (REGNUM).
 219
 220    Returns 1 if could not be read, 0 if could.  */
 221
 222 /* FIXME: This function increases the confusion between FP_REGNUM
 223    and the virtual/pseudo-frame pointer.  */
 224
 225 static int
 226 read_relative_register_raw_bytes_for_frame (int regnum,
 227                                             char *myaddr,
 228                                             struct frame_info *frame)
 229 {
 230   int optim;
 231   if (regnum == FP_REGNUM && frame)
 232     {
 233       /* Put it back in target format. */
 234       store_address (myaddr, REGISTER_RAW_SIZE (FP_REGNUM),
 235                      (LONGEST) FRAME_FP (frame));
 236
 237       return 0;
 238     }
 239
 240   get_saved_register (myaddr, &optim, (CORE_ADDR *) NULL, frame,
 241                       regnum, (enum lval_type *) NULL);
 242
 243   if (register_valid[regnum] < 0)
 244     return 1;                   /* register value not available */
 245
 246   return optim;
 247 }
 248
 249 /* READ_RELATIVE_REGISTER_RAW_BYTES
 250
 251    Copy the bytes of register REGNUM, relative to the current stack
 252    frame, into our memory at MYADDR, in target byte order.
 253    The number of bytes copied is REGISTER_RAW_SIZE (REGNUM).
 254
 255    Returns 1 if could not be read, 0 if could.  */
 256
 257 int
 258 read_relative_register_raw_bytes (int regnum, char *myaddr)
 259 {
 260   return read_relative_register_raw_bytes_for_frame (regnum, myaddr,
 261                                                      selected_frame);
 262 }
 263
 264
 265 /* Low level examining and depositing of registers.
 266
 267    The caller is responsible for making sure that the inferior is
 268    stopped before calling the fetching routines, or it will get
 269    garbage.  (a change from GDB version 3, in which the caller got the
 270    value from the last stop).  */
 271
 272 /* REGISTERS_CHANGED ()
 273
 274    Indicate that registers may have changed, so invalidate the cache.  */
 275
 276 void
 277 registers_changed (void)
 278 {
 279   int i;
 280
 281   registers_pid = -1;
 282
 283   /* Force cleanup of any alloca areas if using C alloca instead of
 284      a builtin alloca.  This particular call is used to clean up
 285      areas allocated by low level target code which may build up
 286      during lengthy interactions between gdb and the target before
 287      gdb gives control to the user (ie watchpoints).  */
 288   alloca (0);
 289
 290   for (i = 0; i < ARCH_NUM_REGS; i++)
 291     register_valid[i] = 0;
 292
 293   /* Assume that if all the hardware regs have changed,
 294      then so have the pseudo-registers.  */
 295   for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
 296     register_valid[i] = 0;
 297
 298   if (registers_changed_hook)
 299     registers_changed_hook ();
 300 }
 301
 302 /* REGISTERS_FETCHED ()
 303
 304    Indicate that all registers have been fetched, so mark them all valid.  */
 305
 306
 307 void
 308 registers_fetched (void)
 309 {
 310   int i;
 311
 312   for (i = 0; i < ARCH_NUM_REGS; i++)
 313     register_valid[i] = 1;
 314   /* Do not assume that the pseudo-regs have also been fetched.
 315      Fetching all real regs might not account for all pseudo-regs.  */
 316 }
 317
 318 /* read_register_bytes and write_register_bytes are generally a *BAD*
 319    idea.  They are inefficient because they need to check for partial
 320    updates, which can only be done by scanning through all of the
 321    registers and seeing if the bytes that are being read/written fall
 322    inside of an invalid register.  [The main reason this is necessary
 323    is that register sizes can vary, so a simple index won't suffice.]
 324    It is far better to call read_register_gen and write_register_gen
 325    if you want to get at the raw register contents, as it only takes a
 326    regno as an argument, and therefore can't do a partial register
 327    update.
 328
 329    Prior to the recent fixes to check for partial updates, both read
 330    and write_register_bytes always checked to see if any registers
 331    were stale, and then called target_fetch_registers (-1) to update
 332    the whole set.  This caused really slowed things down for remote
 333    targets.  */
 334
 335 /* Copy INLEN bytes of consecutive data from registers
 336    starting with the INREGBYTE'th byte of register data
 337    into memory at MYADDR.  */
 338
 339 void
 340 read_register_bytes (int inregbyte, char *myaddr, int inlen)
 341 {
 342   int inregend = inregbyte + inlen;
 343   int regno;
 344
 345   if (registers_pid != inferior_pid)
 346     {
 347       registers_changed ();
 348       registers_pid = inferior_pid;
 349     }
 350
 351   /* See if we are trying to read bytes from out-of-date registers.  If so,
 352      update just those registers.  */
 353
 354   for (regno = 0; regno < NUM_REGS + NUM_PSEUDO_REGS; regno++)
 355     {
 356       int regstart, regend;
 357
 358       if (register_valid[regno])
 359         continue;
 360
 361       if (REGISTER_NAME (regno) == NULL || *REGISTER_NAME (regno) == '\0')
 362         continue;
 363
 364       regstart = REGISTER_BYTE (regno);
 365       regend = regstart + REGISTER_RAW_SIZE (regno);
 366
 367       if (regend <= inregbyte || inregend <= regstart)
 368         /* The range the user wants to read doesn't overlap with regno.  */
 369         continue;
 370
 371       /* We've found an uncached register where at least one byte will be read.
 372          Update it from the target.  */
 373       if (regno < NUM_REGS)
 374         target_fetch_registers (regno);
 375       else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
 376         FETCH_PSEUDO_REGISTER (regno);
 377
 378       if (!register_valid[regno])
 379         error ("read_register_bytes:  Couldn't update register %d.", regno);
 380     }
 381
 382   if (myaddr != NULL)
 383     memcpy (myaddr, &registers[inregbyte], inlen);
 384 }
 385
 386 /* Read register REGNO into memory at MYADDR, which must be large
 387    enough for REGISTER_RAW_BYTES (REGNO).  Target byte-order.  If the
 388    register is known to be the size of a CORE_ADDR or smaller,
 389    read_register can be used instead.  */
 390
 391 void
 392 read_register_gen (int regno, char *myaddr)
 393 {
 394   if (registers_pid != inferior_pid)
 395     {
 396       registers_changed ();
 397       registers_pid = inferior_pid;
 398     }
 399
 400   if (!register_valid[regno])
 401     {
 402       if (regno < NUM_REGS)
 403         target_fetch_registers (regno);
 404       else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
 405         FETCH_PSEUDO_REGISTER (regno);
 406     }
 407   memcpy (myaddr, &registers[REGISTER_BYTE (regno)],
 408           REGISTER_RAW_SIZE (regno));
 409 }
 410
 411 /* Write register REGNO at MYADDR to the target.  MYADDR points at
 412    REGISTER_RAW_BYTES(REGNO), which must be in target byte-order.  */
 413
 414 /* Registers we shouldn't try to store.  */
 415 #if !defined (CANNOT_STORE_REGISTER)
 416 #define CANNOT_STORE_REGISTER(regno) 0
 417 #endif
 418
 419 void
 420 write_register_gen (int regno, char *myaddr)
 421 {
 422   int size;
 423
 424   /* On the sparc, writing %g0 is a no-op, so we don't even want to
 425      change the registers array if something writes to this register.  */
 426   if (CANNOT_STORE_REGISTER (regno))
 427     return;
 428
 429   if (registers_pid != inferior_pid)
 430     {
 431       registers_changed ();
 432       registers_pid = inferior_pid;
 433     }
 434
 435   size = REGISTER_RAW_SIZE (regno);
 436
 437   /* If we have a valid copy of the register, and new value == old value,
 438      then don't bother doing the actual store. */
 439
 440   if (register_valid[regno]
 441       && memcmp (&registers[REGISTER_BYTE (regno)], myaddr, size) == 0)
 442     return;
 443
 444   if (regno < NUM_REGS)
 445     target_prepare_to_store ();
 446
 447   memcpy (&registers[REGISTER_BYTE (regno)], myaddr, size);
 448
 449   register_valid[regno] = 1;
 450
 451   if (regno < NUM_REGS)
 452     target_store_registers (regno);
 453   else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
 454     STORE_PSEUDO_REGISTER (regno);
 455 }
 456
 457 /* Copy INLEN bytes of consecutive data from memory at MYADDR
 458    into registers starting with the MYREGSTART'th byte of register data.  */
 459
 460 void
 461 write_register_bytes (int myregstart, char *myaddr, int inlen)
 462 {
 463   int myregend = myregstart + inlen;
 464   int regno;
 465
 466   target_prepare_to_store ();
 467
 468   /* Scan through the registers updating any that are covered by the
 469      range myregstart<=>myregend using write_register_gen, which does
 470      nice things like handling threads, and avoiding updates when the
 471      new and old contents are the same.  */
 472
 473   for (regno = 0; regno < NUM_REGS + NUM_PSEUDO_REGS; regno++)
 474     {
 475       int regstart, regend;
 476
 477       regstart = REGISTER_BYTE (regno);
 478       regend = regstart + REGISTER_RAW_SIZE (regno);
 479
 480       /* Is this register completely outside the range the user is writing?  */
 481       if (myregend <= regstart || regend <= myregstart)
 482         /* do nothing */ ;
 483
 484       /* Is this register completely within the range the user is writing?  */
 485       else if (myregstart <= regstart && regend <= myregend)
 486         write_register_gen (regno, myaddr + (regstart - myregstart));
 487
 488       /* The register partially overlaps the range being written.  */
 489       else
 490         {
 491           char regbuf[MAX_REGISTER_RAW_SIZE];
 492           /* What's the overlap between this register's bytes and
 493              those the caller wants to write?  */
 494           int overlapstart = max (regstart, myregstart);
 495           int overlapend   = min (regend,   myregend);
 496
 497           /* We may be doing a partial update of an invalid register.
 498              Update it from the target before scribbling on it.  */
 499           read_register_gen (regno, regbuf);
 500
 501           memcpy (registers + overlapstart,
 502                   myaddr + (overlapstart - myregstart),
 503                   overlapend - overlapstart);
 504
 505           if (regno < NUM_REGS)
 506             target_store_registers (regno);
 507           else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
 508             STORE_PSEUDO_REGISTER (regno);
 509         }
 510     }
 511 }
 512
 513
 514 /* Return the raw contents of register REGNO, regarding it as an
 515    UNSIGNED integer. */
 516
 517 ULONGEST
 518 read_register (int regno)
 519 {
 520   if (registers_pid != inferior_pid)
 521     {
 522       registers_changed ();
 523       registers_pid = inferior_pid;
 524     }
 525
 526   if (!register_valid[regno])
 527     {
 528       if (regno < NUM_REGS)
 529         target_fetch_registers (regno);
 530       else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
 531         FETCH_PSEUDO_REGISTER (regno);
 532     }
 533
 534   return (extract_unsigned_integer (&registers[REGISTER_BYTE (regno)],
 535                                     REGISTER_RAW_SIZE (regno)));
 536 }
 537
 538 ULONGEST
 539 read_register_pid (int regno, int pid)
 540 {
 541   int save_pid;
 542   CORE_ADDR retval;
 543
 544   if (pid == inferior_pid)
 545     return read_register (regno);
 546
 547   save_pid = inferior_pid;
 548
 549   inferior_pid = pid;
 550
 551   retval = read_register (regno);
 552
 553   inferior_pid = save_pid;
 554
 555   return retval;
 556 }
 557
 558 /* Return the raw contents of register REGNO, regarding it a SIGNED
 559    integer. */
 560
 561 LONGEST
 562 read_signed_register (int regno)
 563 {
 564   if (registers_pid != inferior_pid)
 565     {
 566       registers_changed ();
 567       registers_pid = inferior_pid;
 568     }
 569
 570   if (!register_valid[regno])
 571     target_fetch_registers (regno);
 572
 573   return (extract_signed_integer (&registers[REGISTER_BYTE (regno)],
 574                                   REGISTER_RAW_SIZE (regno)));
 575 }
 576
 577 LONGEST
 578 read_signed_register_pid (int regno, int pid)
 579 {
 580   int save_pid;
 581   LONGEST retval;
 582
 583   if (pid == inferior_pid)
 584     return read_signed_register (regno);
 585
 586   save_pid = inferior_pid;
 587
 588   inferior_pid = pid;
 589
 590   retval = read_signed_register (regno);
 591
 592   inferior_pid = save_pid;
 593
 594   return retval;
 595 }
 596
 597 /* Store VALUE, into the raw contents of register number REGNO.  */
 598
 599 void
 600 write_register (int regno, LONGEST val)
 601 {
 602   PTR buf;
 603   int size;
 604
 605   /* On the sparc, writing %g0 is a no-op, so we don't even want to
 606      change the registers array if something writes to this register.  */
 607   if (CANNOT_STORE_REGISTER (regno))
 608     return;
 609
 610   if (registers_pid != inferior_pid)
 611     {
 612       registers_changed ();
 613       registers_pid = inferior_pid;
 614     }
 615
 616   size = REGISTER_RAW_SIZE (regno);
 617   buf = alloca (size);
 618   store_signed_integer (buf, size, (LONGEST) val);
 619
 620   /* If we have a valid copy of the register, and new value == old value,
 621      then don't bother doing the actual store. */
 622
 623   if (register_valid[regno]
 624       && memcmp (&registers[REGISTER_BYTE (regno)], buf, size) == 0)
 625     return;
 626
 627   if (regno < NUM_REGS)
 628     target_prepare_to_store ();
 629
 630   memcpy (&registers[REGISTER_BYTE (regno)], buf, size);
 631
 632   register_valid[regno] = 1;
 633
 634   if (regno < NUM_REGS)
 635     target_store_registers (regno);
 636   else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
 637     STORE_PSEUDO_REGISTER (regno);
 638 }
 639
 640 void
 641 write_register_pid (int regno, CORE_ADDR val, int pid)
 642 {
 643   int save_pid;
 644
 645   if (pid == inferior_pid)
 646     {
 647       write_register (regno, val);
 648       return;
 649     }
 650
 651   save_pid = inferior_pid;
 652
 653   inferior_pid = pid;
 654
 655   write_register (regno, val);
 656
 657   inferior_pid = save_pid;
 658 }
 659
 660 /* SUPPLY_REGISTER()
 661
 662    Record that register REGNO contains VAL.  This is used when the
 663    value is obtained from the inferior or core dump, so there is no
 664    need to store the value there.
 665
 666    If VAL is a NULL pointer, then it's probably an unsupported register.
 667    We just set it's value to all zeros.  We might want to record this
 668    fact, and report it to the users of read_register and friends.  */
 669
 670 void
 671 supply_register (int regno, char *val)
 672 {
 673 #if 1
 674   if (registers_pid != inferior_pid)
 675     {
 676       registers_changed ();
 677       registers_pid = inferior_pid;
 678     }
 679 #endif
 680
 681   register_valid[regno] = 1;
 682   if (val)
 683     memcpy (&registers[REGISTER_BYTE (regno)], val,
 684             REGISTER_RAW_SIZE (regno));
 685   else
 686     memset (&registers[REGISTER_BYTE (regno)], '\000',
 687             REGISTER_RAW_SIZE (regno));
 688
 689   /* On some architectures, e.g. HPPA, there are a few stray bits in
 690      some registers, that the rest of the code would like to ignore.  */
 691
 692 #ifdef CLEAN_UP_REGISTER_VALUE
 693   CLEAN_UP_REGISTER_VALUE (regno, &registers[REGISTER_BYTE (regno)]);
 694 #endif
 695 }
 696
 697 /* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
 698    Special handling for registers PC, SP, and FP.  */
 699
 700 /* This routine is getting awfully cluttered with #if's.  It's probably
 701    time to turn this into READ_PC and define it in the tm.h file.
 702    Ditto for write_pc.
 703
 704    1999-06-08: The following were re-written so that it assumes the
 705    existance of a TARGET_READ_PC et.al. macro.  A default generic
 706    version of that macro is made available where needed.
 707
 708    Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
 709    by the multi-arch framework, it will eventually be possible to
 710    eliminate the intermediate read_pc_pid().  The client would call
 711    TARGET_READ_PC directly. (cagney). */
 712
 713 CORE_ADDR
 714 generic_target_read_pc (int pid)
 715 {
 716 #ifdef PC_REGNUM
 717   if (PC_REGNUM >= 0)
 718     {
 719       CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, pid));
 720       return pc_val;
 721     }
 722 #endif
 723   internal_error ("generic_target_read_pc");
 724   return 0;
 725 }
 726
 727 CORE_ADDR
 728 read_pc_pid (int pid)
 729 {
 730   int saved_inferior_pid;
 731   CORE_ADDR pc_val;
 732
 733   /* In case pid != inferior_pid. */
 734   saved_inferior_pid = inferior_pid;
 735   inferior_pid = pid;
 736
 737   pc_val = TARGET_READ_PC (pid);
 738
 739   inferior_pid = saved_inferior_pid;
 740   return pc_val;
 741 }
 742
 743 CORE_ADDR
 744 read_pc (void)
 745 {
 746   return read_pc_pid (inferior_pid);
 747 }
 748
 749 void
 750 generic_target_write_pc (CORE_ADDR pc, int pid)
 751 {
 752 #ifdef PC_REGNUM
 753   if (PC_REGNUM >= 0)
 754     write_register_pid (PC_REGNUM, pc, pid);
 755   if (NPC_REGNUM >= 0)
 756     write_register_pid (NPC_REGNUM, pc + 4, pid);
 757   if (NNPC_REGNUM >= 0)
 758     write_register_pid (NNPC_REGNUM, pc + 8, pid);
 759 #else
 760   internal_error ("generic_target_write_pc");
 761 #endif
 762 }
 763
 764 void
 765 write_pc_pid (CORE_ADDR pc, int pid)
 766 {
 767   int saved_inferior_pid;
 768
 769   /* In case pid != inferior_pid. */
 770   saved_inferior_pid = inferior_pid;
 771   inferior_pid = pid;
 772
 773   TARGET_WRITE_PC (pc, pid);
 774
 775   inferior_pid = saved_inferior_pid;
 776 }
 777
 778 void
 779 write_pc (CORE_ADDR pc)
 780 {
 781   write_pc_pid (pc, inferior_pid);
 782 }
 783
 784 /* Cope with strage ways of getting to the stack and frame pointers */
 785
 786 CORE_ADDR
 787 generic_target_read_sp (void)
 788 {
 789 #ifdef SP_REGNUM
 790   if (SP_REGNUM >= 0)
 791     return read_register (SP_REGNUM);
 792 #endif
 793   internal_error ("generic_target_read_sp");
 794 }
 795
 796 CORE_ADDR
 797 read_sp (void)
 798 {
 799   return TARGET_READ_SP ();
 800 }
 801
 802 void
 803 generic_target_write_sp (CORE_ADDR val)
 804 {
 805 #ifdef SP_REGNUM
 806   if (SP_REGNUM >= 0)
 807     {
 808       write_register (SP_REGNUM, val);
 809       return;
 810     }
 811 #endif
 812   internal_error ("generic_target_write_sp");
 813 }
 814
 815 void
 816 write_sp (CORE_ADDR val)
 817 {
 818   TARGET_WRITE_SP (val);
 819 }
 820
 821 CORE_ADDR
 822 generic_target_read_fp (void)
 823 {
 824 #ifdef FP_REGNUM
 825   if (FP_REGNUM >= 0)
 826     return read_register (FP_REGNUM);
 827 #endif
 828   internal_error ("generic_target_read_fp");
 829 }
 830
 831 CORE_ADDR
 832 read_fp (void)
 833 {
 834   return TARGET_READ_FP ();
 835 }
 836
 837 void
 838 generic_target_write_fp (CORE_ADDR val)
 839 {
 840 #ifdef FP_REGNUM
 841   if (FP_REGNUM >= 0)
 842     {
 843       write_register (FP_REGNUM, val);
 844       return;
 845     }
 846 #endif
 847   internal_error ("generic_target_write_fp");
 848 }
 849
 850 void
 851 write_fp (CORE_ADDR val)
 852 {
 853   TARGET_WRITE_FP (val);
 854 }
 855
 856 static void
 857 build_regcache (void)
 858 {
 859   /* We allocate some extra slop since we do a lot of memcpy's around
 860      `registers', and failing-soft is better than failing hard.  */
 861   int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256;
 862   int sizeof_register_valid =
 863     (NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid);
 864   registers = xmalloc (sizeof_registers);
 865   memset (registers, 0, sizeof_registers);
 866   register_valid = xmalloc (sizeof_register_valid);
 867   memset (register_valid, 0, sizeof_register_valid);
 868 }
 869
 870 void
 871 _initialize_regcache (void)
 872 {
 873   build_regcache ();
 874
 875   register_gdbarch_swap (&registers, sizeof (registers), NULL);
 876   register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
 877   register_gdbarch_swap (NULL, 0, build_regcache);
 878 }