gdb/regcache.c

   1 /* Cache and manage the values of registers for GDB, the GNU debugger.
   2    Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000, 2001
   3    Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 59 Temple Place - Suite 330,
  20    Boston, MA 02111-1307, USA.  */
  21
  22 #include "defs.h"
  23 #include "inferior.h"
  24 #include "target.h"
  25 #include "gdbarch.h"
  26 #include "gdbcmd.h"
  27 #include "regcache.h"
  28 #include "gdb_assert.h"
  29
  30 /*
  31  * DATA STRUCTURE
  32  *
  33  * Here is the actual register cache.
  34  */
  35
  36 /* NOTE: this is a write-through cache.  There is no "dirty" bit for
  37    recording if the register values have been changed (eg. by the
  38    user).  Therefore all registers must be written back to the
  39    target when appropriate.  */
  40
  41 /* REGISTERS contains the cached register values (in target byte order). */
  42
  43 char *registers;
  44
  45 /* REGISTER_VALID is 0 if the register needs to be fetched,
  46                      1 if it has been fetched, and
  47                     -1 if the register value was not available.
  48    "Not available" means don't try to fetch it again.  */
  49
  50 signed char *register_valid;
  51
  52 /* The thread/process associated with the current set of registers.
  53    For now, -1 is special, and means `no current process'.  */
  54
  55 static int registers_pid = -1;
  56
  57 /*
  58  * FUNCTIONS:
  59  */
  60
  61 /* REGISTER_CACHED()
  62
  63    Returns 0 if the value is not in the cache (needs fetch).
  64           >0 if the value is in the cache.
  65           <0 if the value is permanently unavailable (don't ask again).  */
  66
  67 int
  68 register_cached (int regnum)
  69 {
  70   return register_valid[regnum];
  71 }
  72
  73 /* Record that REGNUM's value is cached if STATE is >0, uncached but
  74    fetchable if STATE is 0, and uncached and unfetchable if STATE is <0.  */
  75
  76 void
  77 set_register_cached (int regnum, int state)
  78 {
  79   register_valid[regnum] = state;
  80 }
  81
  82 /* REGISTER_CHANGED
  83
  84    invalidate a single register REGNUM in the cache */
  85 void
  86 register_changed (int regnum)
  87 {
  88   set_register_cached (regnum, 0);
  89 }
  90
  91 /* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area,
  92    else return a pointer to the start of the cache buffer.  */
  93
  94 char *
  95 register_buffer (int regnum)
  96 {
  97   if (regnum < 0)
  98     return registers;
  99   else
 100     return &registers[REGISTER_BYTE (regnum)];
 101 }
 102
 103 /* Return whether register REGNUM is a real register.  */
 104
 105 static int
 106 real_register (int regnum)
 107 {
 108   return regnum >= 0 && regnum < NUM_REGS;
 109 }
 110
 111 /* Return whether register REGNUM is a pseudo register.  */
 112
 113 static int
 114 pseudo_register (int regnum)
 115 {
 116   return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS;
 117 }
 118
 119 /* Fetch register REGNUM into the cache.  */
 120
 121 static void
 122 fetch_register (int regnum)
 123 {
 124   if (real_register (regnum))
 125     target_fetch_registers (regnum);
 126   else if (pseudo_register (regnum))
 127     FETCH_PSEUDO_REGISTER (regnum);
 128 }
 129
 130 /* Write register REGNUM cached value to the target.  */
 131
 132 static void
 133 store_register (int regnum)
 134 {
 135   if (real_register (regnum))
 136     target_store_registers (regnum);
 137   else if (pseudo_register (regnum))
 138     STORE_PSEUDO_REGISTER (regnum);
 139 }
 140
 141 /* Low level examining and depositing of registers.
 142
 143    The caller is responsible for making sure that the inferior is
 144    stopped before calling the fetching routines, or it will get
 145    garbage.  (a change from GDB version 3, in which the caller got the
 146    value from the last stop).  */
 147
 148 /* REGISTERS_CHANGED ()
 149
 150    Indicate that registers may have changed, so invalidate the cache.  */
 151
 152 void
 153 registers_changed (void)
 154 {
 155   int i;
 156
 157   registers_pid = -1;
 158
 159   /* Force cleanup of any alloca areas if using C alloca instead of
 160      a builtin alloca.  This particular call is used to clean up
 161      areas allocated by low level target code which may build up
 162      during lengthy interactions between gdb and the target before
 163      gdb gives control to the user (ie watchpoints).  */
 164   alloca (0);
 165
 166   for (i = 0; i < NUM_REGS; i++)
 167     set_register_cached (i, 0);
 168
 169   /* Assume that if all the hardware regs have changed,
 170      then so have the pseudo-registers.  */
 171   for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
 172     set_register_cached (i, 0);
 173
 174   if (registers_changed_hook)
 175     registers_changed_hook ();
 176 }
 177
 178 /* REGISTERS_FETCHED ()
 179
 180    Indicate that all registers have been fetched, so mark them all valid.  */
 181
 182
 183 void
 184 registers_fetched (void)
 185 {
 186   int i;
 187
 188   for (i = 0; i < NUM_REGS; i++)
 189     set_register_cached (i, 1);
 190   /* Do not assume that the pseudo-regs have also been fetched.
 191      Fetching all real regs might not account for all pseudo-regs.  */
 192 }
 193
 194 /* read_register_bytes and write_register_bytes are generally a *BAD*
 195    idea.  They are inefficient because they need to check for partial
 196    updates, which can only be done by scanning through all of the
 197    registers and seeing if the bytes that are being read/written fall
 198    inside of an invalid register.  [The main reason this is necessary
 199    is that register sizes can vary, so a simple index won't suffice.]
 200    It is far better to call read_register_gen and write_register_gen
 201    if you want to get at the raw register contents, as it only takes a
 202    regnum as an argument, and therefore can't do a partial register
 203    update.
 204
 205    Prior to the recent fixes to check for partial updates, both read
 206    and write_register_bytes always checked to see if any registers
 207    were stale, and then called target_fetch_registers (-1) to update
 208    the whole set.  This caused really slowed things down for remote
 209    targets.  */
 210
 211 /* Copy INLEN bytes of consecutive data from registers
 212    starting with the INREGBYTE'th byte of register data
 213    into memory at MYADDR.  */
 214
 215 void
 216 read_register_bytes (int in_start, char *in_buf, int in_len)
 217 {
 218   int in_end = in_start + in_len;
 219   int regnum;
 220   char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE);
 221
 222   /* See if we are trying to read bytes from out-of-date registers.  If so,
 223      update just those registers.  */
 224
 225   for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
 226     {
 227       int reg_start;
 228       int reg_end;
 229       int reg_len;
 230       int start;
 231       int end;
 232       int byte;
 233
 234       if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
 235         continue;
 236
 237       reg_start = REGISTER_BYTE (regnum);
 238       reg_len = REGISTER_RAW_SIZE (regnum);
 239       reg_end = reg_start + reg_len;
 240
 241       if (reg_end <= in_start || in_end <= reg_start)
 242         /* The range the user wants to read doesn't overlap with regnum.  */
 243         continue;
 244
 245       /* Force the cache to fetch the entire register. */
 246       read_register_gen (regnum, reg_buf);
 247
 248       /* Legacy note: This function, for some reason, allows a NULL
 249          input buffer.  If the buffer is NULL, the registers are still
 250          fetched, just the final transfer is skipped. */
 251       if (in_buf == NULL)
 252         continue;
 253
 254       /* start = max (reg_start, in_start) */
 255       if (reg_start > in_start)
 256         start = reg_start;
 257       else
 258         start = in_start;
 259
 260       /* end = min (reg_end, in_end) */
 261       if (reg_end < in_end)
 262         end = reg_end;
 263       else
 264         end = in_end;
 265
 266       /* Transfer just the bytes common to both IN_BUF and REG_BUF */
 267       for (byte = start; byte < end; byte++)
 268         {
 269           in_buf[byte - in_start] = reg_buf[byte - reg_start];
 270         }
 271     }
 272 }
 273
 274 /* Read register REGNUM into memory at MYADDR, which must be large
 275    enough for REGISTER_RAW_BYTES (REGNUM).  Target byte-order.  If the
 276    register is known to be the size of a CORE_ADDR or smaller,
 277    read_register can be used instead.  */
 278
 279 static void
 280 legacy_read_register_gen (int regnum, char *myaddr)
 281 {
 282   gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
 283   if (registers_pid != inferior_pid)
 284     {
 285       registers_changed ();
 286       registers_pid = inferior_pid;
 287     }
 288
 289   if (!register_cached (regnum))
 290     fetch_register (regnum);
 291
 292   memcpy (myaddr, register_buffer (regnum),
 293           REGISTER_RAW_SIZE (regnum));
 294 }
 295
 296 void
 297 regcache_read (int rawnum, char *buf)
 298 {
 299   gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
 300   /* For moment, just use underlying legacy code. Ulgh!!! */
 301   legacy_read_register_gen (rawnum, buf);
 302 }
 303
 304 void
 305 read_register_gen (int regnum, char *buf)
 306 {
 307   if (! gdbarch_register_read_p (current_gdbarch))
 308     {
 309       legacy_read_register_gen (regnum, buf);
 310       return;
 311     }
 312   gdbarch_register_read (current_gdbarch, regnum, buf);
 313 }
 314
 315
 316 /* Write register REGNUM at MYADDR to the target.  MYADDR points at
 317    REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order.  */
 318
 319 /* Registers we shouldn't try to store.  */
 320 #if !defined (CANNOT_STORE_REGISTER)
 321 #define CANNOT_STORE_REGISTER(regnum) 0
 322 #endif
 323
 324 static void
 325 legacy_write_register_gen (int regnum, char *myaddr)
 326 {
 327   int size;
 328   gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
 329
 330   /* On the sparc, writing %g0 is a no-op, so we don't even want to
 331      change the registers array if something writes to this register.  */
 332   if (CANNOT_STORE_REGISTER (regnum))
 333     return;
 334
 335   if (registers_pid != inferior_pid)
 336     {
 337       registers_changed ();
 338       registers_pid = inferior_pid;
 339     }
 340
 341   size = REGISTER_RAW_SIZE (regnum);
 342
 343   /* If we have a valid copy of the register, and new value == old value,
 344      then don't bother doing the actual store. */
 345
 346   if (register_cached (regnum)
 347       && memcmp (register_buffer (regnum), myaddr, size) == 0)
 348     return;
 349
 350   if (real_register (regnum))
 351     target_prepare_to_store ();
 352
 353   memcpy (register_buffer (regnum), myaddr, size);
 354
 355   set_register_cached (regnum, 1);
 356   store_register (regnum);
 357 }
 358
 359 void
 360 regcache_write (int rawnum, char *buf)
 361 {
 362   gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
 363   /* For moment, just use underlying legacy code. Ulgh!!! */
 364   legacy_write_register_gen (rawnum, buf);
 365 }
 366
 367 void
 368 write_register_gen (int regnum, char *buf)
 369 {
 370   if (! gdbarch_register_write_p (current_gdbarch))
 371     {
 372       legacy_write_register_gen (regnum, buf);
 373       return;
 374     }
 375   gdbarch_register_write (current_gdbarch, regnum, buf);
 376 }
 377
 378 /* Copy INLEN bytes of consecutive data from memory at MYADDR
 379    into registers starting with the MYREGSTART'th byte of register data.  */
 380
 381 void
 382 write_register_bytes (int myregstart, char *myaddr, int inlen)
 383 {
 384   int myregend = myregstart + inlen;
 385   int regnum;
 386
 387   target_prepare_to_store ();
 388
 389   /* Scan through the registers updating any that are covered by the
 390      range myregstart<=>myregend using write_register_gen, which does
 391      nice things like handling threads, and avoiding updates when the
 392      new and old contents are the same.  */
 393
 394   for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
 395     {
 396       int regstart, regend;
 397
 398       regstart = REGISTER_BYTE (regnum);
 399       regend = regstart + REGISTER_RAW_SIZE (regnum);
 400
 401       /* Is this register completely outside the range the user is writing?  */
 402       if (myregend <= regstart || regend <= myregstart)
 403         /* do nothing */ ;
 404
 405       /* Is this register completely within the range the user is writing?  */
 406       else if (myregstart <= regstart && regend <= myregend)
 407         write_register_gen (regnum, myaddr + (regstart - myregstart));
 408
 409       /* The register partially overlaps the range being written.  */
 410       else
 411         {
 412           char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE);
 413           /* What's the overlap between this register's bytes and
 414              those the caller wants to write?  */
 415           int overlapstart = max (regstart, myregstart);
 416           int overlapend   = min (regend,   myregend);
 417
 418           /* We may be doing a partial update of an invalid register.
 419              Update it from the target before scribbling on it.  */
 420           read_register_gen (regnum, regbuf);
 421
 422           memcpy (registers + overlapstart,
 423                   myaddr + (overlapstart - myregstart),
 424                   overlapend - overlapstart);
 425
 426           store_register (regnum);
 427         }
 428     }
 429 }
 430
 431
 432 /* Return the contents of register REGNUM as an unsigned integer.  */
 433
 434 ULONGEST
 435 read_register (int regnum)
 436 {
 437   char *buf = alloca (REGISTER_RAW_SIZE (regnum));
 438   read_register_gen (regnum, buf);
 439   return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum)));
 440 }
 441
 442 ULONGEST
 443 read_register_pid (int regnum, int pid)
 444 {
 445   int save_pid;
 446   CORE_ADDR retval;
 447
 448   if (pid == inferior_pid)
 449     return read_register (regnum);
 450
 451   save_pid = inferior_pid;
 452
 453   inferior_pid = pid;
 454
 455   retval = read_register (regnum);
 456
 457   inferior_pid = save_pid;
 458
 459   return retval;
 460 }
 461
 462 /* Return the contents of register REGNUM as a signed integer.  */
 463
 464 LONGEST
 465 read_signed_register (int regnum)
 466 {
 467   void *buf = alloca (REGISTER_RAW_SIZE (regnum));
 468   read_register_gen (regnum, buf);
 469   return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum)));
 470 }
 471
 472 LONGEST
 473 read_signed_register_pid (int regnum, int pid)
 474 {
 475   int save_pid;
 476   LONGEST retval;
 477
 478   if (pid == inferior_pid)
 479     return read_signed_register (regnum);
 480
 481   save_pid = inferior_pid;
 482
 483   inferior_pid = pid;
 484
 485   retval = read_signed_register (regnum);
 486
 487   inferior_pid = save_pid;
 488
 489   return retval;
 490 }
 491
 492 /* Store VALUE into the raw contents of register number REGNUM.  */
 493
 494 void
 495 write_register (int regnum, LONGEST val)
 496 {
 497   void *buf;
 498   int size;
 499   size = REGISTER_RAW_SIZE (regnum);
 500   buf = alloca (size);
 501   store_signed_integer (buf, size, (LONGEST) val);
 502   write_register_gen (regnum, buf);
 503 }
 504
 505 void
 506 write_register_pid (int regnum, CORE_ADDR val, int pid)
 507 {
 508   int save_pid;
 509
 510   if (pid == inferior_pid)
 511     {
 512       write_register (regnum, val);
 513       return;
 514     }
 515
 516   save_pid = inferior_pid;
 517
 518   inferior_pid = pid;
 519
 520   write_register (regnum, val);
 521
 522   inferior_pid = save_pid;
 523 }
 524
 525 /* SUPPLY_REGISTER()
 526
 527    Record that register REGNUM contains VAL.  This is used when the
 528    value is obtained from the inferior or core dump, so there is no
 529    need to store the value there.
 530
 531    If VAL is a NULL pointer, then it's probably an unsupported register.
 532    We just set its value to all zeros.  We might want to record this
 533    fact, and report it to the users of read_register and friends.  */
 534
 535 void
 536 supply_register (int regnum, char *val)
 537 {
 538 #if 1
 539   if (registers_pid != inferior_pid)
 540     {
 541       registers_changed ();
 542       registers_pid = inferior_pid;
 543     }
 544 #endif
 545
 546   set_register_cached (regnum, 1);
 547   if (val)
 548     memcpy (register_buffer (regnum), val,
 549             REGISTER_RAW_SIZE (regnum));
 550   else
 551     memset (register_buffer (regnum), '\000',
 552             REGISTER_RAW_SIZE (regnum));
 553
 554   /* On some architectures, e.g. HPPA, there are a few stray bits in
 555      some registers, that the rest of the code would like to ignore.  */
 556
 557   /* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is
 558      going to be deprecated.  Instead architectures will leave the raw
 559      register value as is and instead clean things up as they pass
 560      through the method gdbarch_register_read() clean up the
 561      values. */
 562
 563 #ifdef CLEAN_UP_REGISTER_VALUE
 564   CLEAN_UP_REGISTER_VALUE (regnum, register_buffer (regnum));
 565 #endif
 566 }
 567
 568 /* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
 569    Special handling for registers PC, SP, and FP.  */
 570
 571 /* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(),
 572    read_pc_pid(), read_pc(), generic_target_write_pc(),
 573    write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(),
 574    generic_target_write_sp(), write_sp(), generic_target_read_fp(),
 575    read_fp(), generic_target_write_fp(), write_fp will eventually be
 576    moved out of the reg-cache into either frame.[hc] or to the
 577    multi-arch framework.  The are not part of the raw register cache.  */
 578
 579 /* This routine is getting awfully cluttered with #if's.  It's probably
 580    time to turn this into READ_PC and define it in the tm.h file.
 581    Ditto for write_pc.
 582
 583    1999-06-08: The following were re-written so that it assumes the
 584    existence of a TARGET_READ_PC et.al. macro.  A default generic
 585    version of that macro is made available where needed.
 586
 587    Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
 588    by the multi-arch framework, it will eventually be possible to
 589    eliminate the intermediate read_pc_pid().  The client would call
 590    TARGET_READ_PC directly. (cagney). */
 591
 592 CORE_ADDR
 593 generic_target_read_pc (int pid)
 594 {
 595 #ifdef PC_REGNUM
 596   if (PC_REGNUM >= 0)
 597     {
 598       CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, pid));
 599       return pc_val;
 600     }
 601 #endif
 602   internal_error (__FILE__, __LINE__,
 603                   "generic_target_read_pc");
 604   return 0;
 605 }
 606
 607 CORE_ADDR
 608 read_pc_pid (int pid)
 609 {
 610   int saved_inferior_pid;
 611   CORE_ADDR pc_val;
 612
 613   /* In case pid != inferior_pid. */
 614   saved_inferior_pid = inferior_pid;
 615   inferior_pid = pid;
 616
 617   pc_val = TARGET_READ_PC (pid);
 618
 619   inferior_pid = saved_inferior_pid;
 620   return pc_val;
 621 }
 622
 623 CORE_ADDR
 624 read_pc (void)
 625 {
 626   return read_pc_pid (inferior_pid);
 627 }
 628
 629 void
 630 generic_target_write_pc (CORE_ADDR pc, int pid)
 631 {
 632 #ifdef PC_REGNUM
 633   if (PC_REGNUM >= 0)
 634     write_register_pid (PC_REGNUM, pc, pid);
 635   if (NPC_REGNUM >= 0)
 636     write_register_pid (NPC_REGNUM, pc + 4, pid);
 637   if (NNPC_REGNUM >= 0)
 638     write_register_pid (NNPC_REGNUM, pc + 8, pid);
 639 #else
 640   internal_error (__FILE__, __LINE__,
 641                   "generic_target_write_pc");
 642 #endif
 643 }
 644
 645 void
 646 write_pc_pid (CORE_ADDR pc, int pid)
 647 {
 648   int saved_inferior_pid;
 649
 650   /* In case pid != inferior_pid. */
 651   saved_inferior_pid = inferior_pid;
 652   inferior_pid = pid;
 653
 654   TARGET_WRITE_PC (pc, pid);
 655
 656   inferior_pid = saved_inferior_pid;
 657 }
 658
 659 void
 660 write_pc (CORE_ADDR pc)
 661 {
 662   write_pc_pid (pc, inferior_pid);
 663 }
 664
 665 /* Cope with strage ways of getting to the stack and frame pointers */
 666
 667 CORE_ADDR
 668 generic_target_read_sp (void)
 669 {
 670 #ifdef SP_REGNUM
 671   if (SP_REGNUM >= 0)
 672     return read_register (SP_REGNUM);
 673 #endif
 674   internal_error (__FILE__, __LINE__,
 675                   "generic_target_read_sp");
 676 }
 677
 678 CORE_ADDR
 679 read_sp (void)
 680 {
 681   return TARGET_READ_SP ();
 682 }
 683
 684 void
 685 generic_target_write_sp (CORE_ADDR val)
 686 {
 687 #ifdef SP_REGNUM
 688   if (SP_REGNUM >= 0)
 689     {
 690       write_register (SP_REGNUM, val);
 691       return;
 692     }
 693 #endif
 694   internal_error (__FILE__, __LINE__,
 695                   "generic_target_write_sp");
 696 }
 697
 698 void
 699 write_sp (CORE_ADDR val)
 700 {
 701   TARGET_WRITE_SP (val);
 702 }
 703
 704 CORE_ADDR
 705 generic_target_read_fp (void)
 706 {
 707 #ifdef FP_REGNUM
 708   if (FP_REGNUM >= 0)
 709     return read_register (FP_REGNUM);
 710 #endif
 711   internal_error (__FILE__, __LINE__,
 712                   "generic_target_read_fp");
 713 }
 714
 715 CORE_ADDR
 716 read_fp (void)
 717 {
 718   return TARGET_READ_FP ();
 719 }
 720
 721 void
 722 generic_target_write_fp (CORE_ADDR val)
 723 {
 724 #ifdef FP_REGNUM
 725   if (FP_REGNUM >= 0)
 726     {
 727       write_register (FP_REGNUM, val);
 728       return;
 729     }
 730 #endif
 731   internal_error (__FILE__, __LINE__,
 732                   "generic_target_write_fp");
 733 }
 734
 735 void
 736 write_fp (CORE_ADDR val)
 737 {
 738   TARGET_WRITE_FP (val);
 739 }
 740
 741 /* ARGSUSED */
 742 static void
 743 reg_flush_command (char *command, int from_tty)
 744 {
 745   /* Force-flush the register cache.  */
 746   registers_changed ();
 747   if (from_tty)
 748     printf_filtered ("Register cache flushed.\n");
 749 }
 750
 751
 752 static void
 753 build_regcache (void)
 754 {
 755   /* We allocate some extra slop since we do a lot of memcpy's around
 756      `registers', and failing-soft is better than failing hard.  */
 757   int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256;
 758   int sizeof_register_valid =
 759     (NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid);
 760   registers = xmalloc (sizeof_registers);
 761   memset (registers, 0, sizeof_registers);
 762   register_valid = xmalloc (sizeof_register_valid);
 763   memset (register_valid, 0, sizeof_register_valid);
 764 }
 765
 766 void
 767 _initialize_regcache (void)
 768 {
 769   build_regcache ();
 770
 771   register_gdbarch_swap (&registers, sizeof (registers), NULL);
 772   register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
 773   register_gdbarch_swap (NULL, 0, build_regcache);
 774
 775   add_com ("flushregs", class_maintenance, reg_flush_command,
 776            "Force gdb to flush its register cache (maintainer command)");
 777 }