gdb/regcache.c

   1 /* Cache and manage the values of registers for GDB, the GNU debugger.
   2    Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000, 2001
   3    Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 59 Temple Place - Suite 330,
  20    Boston, MA 02111-1307, USA.  */
  21
  22 #include "defs.h"
  23 #include "inferior.h"
  24 #include "target.h"
  25 #include "gdbarch.h"
  26 #include "gdbcmd.h"
  27 #include "regcache.h"
  28 #include "gdb_assert.h"
  29
  30 /*
  31  * DATA STRUCTURE
  32  *
  33  * Here is the actual register cache.
  34  */
  35
  36 /* NOTE: this is a write-through cache.  There is no "dirty" bit for
  37    recording if the register values have been changed (eg. by the
  38    user).  Therefore all registers must be written back to the
  39    target when appropriate.  */
  40
  41 /* REGISTERS contains the cached register values (in target byte order). */
  42
  43 char *registers;
  44
  45 /* REGISTER_VALID is 0 if the register needs to be fetched,
  46                      1 if it has been fetched, and
  47                     -1 if the register value was not available.
  48    "Not available" means don't try to fetch it again.  */
  49
  50 signed char *register_valid;
  51
  52 /* The thread/process associated with the current set of registers. */
  53
  54 static ptid_t registers_ptid;
  55
  56 /*
  57  * FUNCTIONS:
  58  */
  59
  60 /* REGISTER_CACHED()
  61
  62    Returns 0 if the value is not in the cache (needs fetch).
  63           >0 if the value is in the cache.
  64           <0 if the value is permanently unavailable (don't ask again).  */
  65
  66 int
  67 register_cached (int regnum)
  68 {
  69   return register_valid[regnum];
  70 }
  71
  72 /* Record that REGNUM's value is cached if STATE is >0, uncached but
  73    fetchable if STATE is 0, and uncached and unfetchable if STATE is <0.  */
  74
  75 void
  76 set_register_cached (int regnum, int state)
  77 {
  78   register_valid[regnum] = state;
  79 }
  80
  81 /* REGISTER_CHANGED
  82
  83    invalidate a single register REGNUM in the cache */
  84 void
  85 register_changed (int regnum)
  86 {
  87   set_register_cached (regnum, 0);
  88 }
  89
  90 /* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area,
  91    else return a pointer to the start of the cache buffer.  */
  92
  93 char *
  94 register_buffer (int regnum)
  95 {
  96   if (regnum < 0)
  97     return registers;
  98   else
  99     return &registers[REGISTER_BYTE (regnum)];
 100 }
 101
 102 /* Return whether register REGNUM is a real register.  */
 103
 104 static int
 105 real_register (int regnum)
 106 {
 107   return regnum >= 0 && regnum < NUM_REGS;
 108 }
 109
 110 /* Return whether register REGNUM is a pseudo register.  */
 111
 112 static int
 113 pseudo_register (int regnum)
 114 {
 115   return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS;
 116 }
 117
 118 /* Fetch register REGNUM into the cache.  */
 119
 120 static void
 121 fetch_register (int regnum)
 122 {
 123   if (real_register (regnum))
 124     target_fetch_registers (regnum);
 125   else if (pseudo_register (regnum))
 126     FETCH_PSEUDO_REGISTER (regnum);
 127 }
 128
 129 /* Write register REGNUM cached value to the target.  */
 130
 131 static void
 132 store_register (int regnum)
 133 {
 134   if (real_register (regnum))
 135     target_store_registers (regnum);
 136   else if (pseudo_register (regnum))
 137     STORE_PSEUDO_REGISTER (regnum);
 138 }
 139
 140 /* Low level examining and depositing of registers.
 141
 142    The caller is responsible for making sure that the inferior is
 143    stopped before calling the fetching routines, or it will get
 144    garbage.  (a change from GDB version 3, in which the caller got the
 145    value from the last stop).  */
 146
 147 /* REGISTERS_CHANGED ()
 148
 149    Indicate that registers may have changed, so invalidate the cache.  */
 150
 151 void
 152 registers_changed (void)
 153 {
 154   int i;
 155
 156   registers_ptid = pid_to_ptid (-1);
 157
 158   /* Force cleanup of any alloca areas if using C alloca instead of
 159      a builtin alloca.  This particular call is used to clean up
 160      areas allocated by low level target code which may build up
 161      during lengthy interactions between gdb and the target before
 162      gdb gives control to the user (ie watchpoints).  */
 163   alloca (0);
 164
 165   for (i = 0; i < NUM_REGS; i++)
 166     set_register_cached (i, 0);
 167
 168   /* Assume that if all the hardware regs have changed,
 169      then so have the pseudo-registers.  */
 170   for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
 171     set_register_cached (i, 0);
 172
 173   if (registers_changed_hook)
 174     registers_changed_hook ();
 175 }
 176
 177 /* REGISTERS_FETCHED ()
 178
 179    Indicate that all registers have been fetched, so mark them all valid.  */
 180
 181
 182 void
 183 registers_fetched (void)
 184 {
 185   int i;
 186
 187   for (i = 0; i < NUM_REGS; i++)
 188     set_register_cached (i, 1);
 189   /* Do not assume that the pseudo-regs have also been fetched.
 190      Fetching all real regs might not account for all pseudo-regs.  */
 191 }
 192
 193 /* read_register_bytes and write_register_bytes are generally a *BAD*
 194    idea.  They are inefficient because they need to check for partial
 195    updates, which can only be done by scanning through all of the
 196    registers and seeing if the bytes that are being read/written fall
 197    inside of an invalid register.  [The main reason this is necessary
 198    is that register sizes can vary, so a simple index won't suffice.]
 199    It is far better to call read_register_gen and write_register_gen
 200    if you want to get at the raw register contents, as it only takes a
 201    regnum as an argument, and therefore can't do a partial register
 202    update.
 203
 204    Prior to the recent fixes to check for partial updates, both read
 205    and write_register_bytes always checked to see if any registers
 206    were stale, and then called target_fetch_registers (-1) to update
 207    the whole set.  This caused really slowed things down for remote
 208    targets.  */
 209
 210 /* Copy INLEN bytes of consecutive data from registers
 211    starting with the INREGBYTE'th byte of register data
 212    into memory at MYADDR.  */
 213
 214 void
 215 read_register_bytes (int in_start, char *in_buf, int in_len)
 216 {
 217   int in_end = in_start + in_len;
 218   int regnum;
 219   char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE);
 220
 221   /* See if we are trying to read bytes from out-of-date registers.  If so,
 222      update just those registers.  */
 223
 224   for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
 225     {
 226       int reg_start;
 227       int reg_end;
 228       int reg_len;
 229       int start;
 230       int end;
 231       int byte;
 232
 233       if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
 234         continue;
 235
 236       reg_start = REGISTER_BYTE (regnum);
 237       reg_len = REGISTER_RAW_SIZE (regnum);
 238       reg_end = reg_start + reg_len;
 239
 240       if (reg_end <= in_start || in_end <= reg_start)
 241         /* The range the user wants to read doesn't overlap with regnum.  */
 242         continue;
 243
 244       /* Force the cache to fetch the entire register. */
 245       read_register_gen (regnum, reg_buf);
 246
 247       /* Legacy note: This function, for some reason, allows a NULL
 248          input buffer.  If the buffer is NULL, the registers are still
 249          fetched, just the final transfer is skipped. */
 250       if (in_buf == NULL)
 251         continue;
 252
 253       /* start = max (reg_start, in_start) */
 254       if (reg_start > in_start)
 255         start = reg_start;
 256       else
 257         start = in_start;
 258
 259       /* end = min (reg_end, in_end) */
 260       if (reg_end < in_end)
 261         end = reg_end;
 262       else
 263         end = in_end;
 264
 265       /* Transfer just the bytes common to both IN_BUF and REG_BUF */
 266       for (byte = start; byte < end; byte++)
 267         {
 268           in_buf[byte - in_start] = reg_buf[byte - reg_start];
 269         }
 270     }
 271 }
 272
 273 /* Read register REGNUM into memory at MYADDR, which must be large
 274    enough for REGISTER_RAW_BYTES (REGNUM).  Target byte-order.  If the
 275    register is known to be the size of a CORE_ADDR or smaller,
 276    read_register can be used instead.  */
 277
 278 static void
 279 legacy_read_register_gen (int regnum, char *myaddr)
 280 {
 281   gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
 282   if (! ptid_equal (registers_ptid, inferior_ptid))
 283     {
 284       registers_changed ();
 285       registers_ptid = inferior_ptid;
 286     }
 287
 288   if (!register_cached (regnum))
 289     fetch_register (regnum);
 290
 291   memcpy (myaddr, register_buffer (regnum),
 292           REGISTER_RAW_SIZE (regnum));
 293 }
 294
 295 void
 296 regcache_read (int rawnum, char *buf)
 297 {
 298   gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
 299   /* For moment, just use underlying legacy code. Ulgh!!! */
 300   legacy_read_register_gen (rawnum, buf);
 301 }
 302
 303 void
 304 read_register_gen (int regnum, char *buf)
 305 {
 306   if (! gdbarch_register_read_p (current_gdbarch))
 307     {
 308       legacy_read_register_gen (regnum, buf);
 309       return;
 310     }
 311   gdbarch_register_read (current_gdbarch, regnum, buf);
 312 }
 313
 314
 315 /* Write register REGNUM at MYADDR to the target.  MYADDR points at
 316    REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order.  */
 317
 318 static void
 319 legacy_write_register_gen (int regnum, char *myaddr)
 320 {
 321   int size;
 322   gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
 323
 324   /* On the sparc, writing %g0 is a no-op, so we don't even want to
 325      change the registers array if something writes to this register.  */
 326   if (CANNOT_STORE_REGISTER (regnum))
 327     return;
 328
 329   if (! ptid_equal (registers_ptid, inferior_ptid))
 330     {
 331       registers_changed ();
 332       registers_ptid = inferior_ptid;
 333     }
 334
 335   size = REGISTER_RAW_SIZE (regnum);
 336
 337   /* If we have a valid copy of the register, and new value == old value,
 338      then don't bother doing the actual store. */
 339
 340   if (register_cached (regnum)
 341       && memcmp (register_buffer (regnum), myaddr, size) == 0)
 342     return;
 343
 344   if (real_register (regnum))
 345     target_prepare_to_store ();
 346
 347   memcpy (register_buffer (regnum), myaddr, size);
 348
 349   set_register_cached (regnum, 1);
 350   store_register (regnum);
 351 }
 352
 353 void
 354 regcache_write (int rawnum, char *buf)
 355 {
 356   gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
 357   /* For moment, just use underlying legacy code. Ulgh!!! */
 358   legacy_write_register_gen (rawnum, buf);
 359 }
 360
 361 void
 362 write_register_gen (int regnum, char *buf)
 363 {
 364   if (! gdbarch_register_write_p (current_gdbarch))
 365     {
 366       legacy_write_register_gen (regnum, buf);
 367       return;
 368     }
 369   gdbarch_register_write (current_gdbarch, regnum, buf);
 370 }
 371
 372 /* Copy INLEN bytes of consecutive data from memory at MYADDR
 373    into registers starting with the MYREGSTART'th byte of register data.  */
 374
 375 void
 376 write_register_bytes (int myregstart, char *myaddr, int inlen)
 377 {
 378   int myregend = myregstart + inlen;
 379   int regnum;
 380
 381   target_prepare_to_store ();
 382
 383   /* Scan through the registers updating any that are covered by the
 384      range myregstart<=>myregend using write_register_gen, which does
 385      nice things like handling threads, and avoiding updates when the
 386      new and old contents are the same.  */
 387
 388   for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
 389     {
 390       int regstart, regend;
 391
 392       regstart = REGISTER_BYTE (regnum);
 393       regend = regstart + REGISTER_RAW_SIZE (regnum);
 394
 395       /* Is this register completely outside the range the user is writing?  */
 396       if (myregend <= regstart || regend <= myregstart)
 397         /* do nothing */ ;
 398
 399       /* Is this register completely within the range the user is writing?  */
 400       else if (myregstart <= regstart && regend <= myregend)
 401         write_register_gen (regnum, myaddr + (regstart - myregstart));
 402
 403       /* The register partially overlaps the range being written.  */
 404       else
 405         {
 406           char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE);
 407           /* What's the overlap between this register's bytes and
 408              those the caller wants to write?  */
 409           int overlapstart = max (regstart, myregstart);
 410           int overlapend   = min (regend,   myregend);
 411
 412           /* We may be doing a partial update of an invalid register.
 413              Update it from the target before scribbling on it.  */
 414           read_register_gen (regnum, regbuf);
 415
 416           memcpy (registers + overlapstart,
 417                   myaddr + (overlapstart - myregstart),
 418                   overlapend - overlapstart);
 419
 420           store_register (regnum);
 421         }
 422     }
 423 }
 424
 425
 426 /* Return the contents of register REGNUM as an unsigned integer.  */
 427
 428 ULONGEST
 429 read_register (int regnum)
 430 {
 431   char *buf = alloca (REGISTER_RAW_SIZE (regnum));
 432   read_register_gen (regnum, buf);
 433   return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum)));
 434 }
 435
 436 ULONGEST
 437 read_register_pid (int regnum, ptid_t ptid)
 438 {
 439   ptid_t save_ptid;
 440   int save_pid;
 441   CORE_ADDR retval;
 442
 443   if (ptid_equal (ptid, inferior_ptid))
 444     return read_register (regnum);
 445
 446   save_ptid = inferior_ptid;
 447
 448   inferior_ptid = ptid;
 449
 450   retval = read_register (regnum);
 451
 452   inferior_ptid = save_ptid;
 453
 454   return retval;
 455 }
 456
 457 /* Return the contents of register REGNUM as a signed integer.  */
 458
 459 LONGEST
 460 read_signed_register (int regnum)
 461 {
 462   void *buf = alloca (REGISTER_RAW_SIZE (regnum));
 463   read_register_gen (regnum, buf);
 464   return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum)));
 465 }
 466
 467 LONGEST
 468 read_signed_register_pid (int regnum, ptid_t ptid)
 469 {
 470   ptid_t save_ptid;
 471   LONGEST retval;
 472
 473   if (ptid_equal (ptid, inferior_ptid))
 474     return read_signed_register (regnum);
 475
 476   save_ptid = inferior_ptid;
 477
 478   inferior_ptid = ptid;
 479
 480   retval = read_signed_register (regnum);
 481
 482   inferior_ptid = save_ptid;
 483
 484   return retval;
 485 }
 486
 487 /* Store VALUE into the raw contents of register number REGNUM.  */
 488
 489 void
 490 write_register (int regnum, LONGEST val)
 491 {
 492   void *buf;
 493   int size;
 494   size = REGISTER_RAW_SIZE (regnum);
 495   buf = alloca (size);
 496   store_signed_integer (buf, size, (LONGEST) val);
 497   write_register_gen (regnum, buf);
 498 }
 499
 500 void
 501 write_register_pid (int regnum, CORE_ADDR val, ptid_t ptid)
 502 {
 503   ptid_t save_ptid;
 504
 505   if (ptid_equal (ptid, inferior_ptid))
 506     {
 507       write_register (regnum, val);
 508       return;
 509     }
 510
 511   save_ptid = inferior_ptid;
 512
 513   inferior_ptid = ptid;
 514
 515   write_register (regnum, val);
 516
 517   inferior_ptid = save_ptid;
 518 }
 519
 520 /* SUPPLY_REGISTER()
 521
 522    Record that register REGNUM contains VAL.  This is used when the
 523    value is obtained from the inferior or core dump, so there is no
 524    need to store the value there.
 525
 526    If VAL is a NULL pointer, then it's probably an unsupported register.
 527    We just set its value to all zeros.  We might want to record this
 528    fact, and report it to the users of read_register and friends.  */
 529
 530 void
 531 supply_register (int regnum, char *val)
 532 {
 533 #if 1
 534   if (! ptid_equal (registers_ptid, inferior_ptid))
 535     {
 536       registers_changed ();
 537       registers_ptid = inferior_ptid;
 538     }
 539 #endif
 540
 541   set_register_cached (regnum, 1);
 542   if (val)
 543     memcpy (register_buffer (regnum), val,
 544             REGISTER_RAW_SIZE (regnum));
 545   else
 546     memset (register_buffer (regnum), '\000',
 547             REGISTER_RAW_SIZE (regnum));
 548
 549   /* On some architectures, e.g. HPPA, there are a few stray bits in
 550      some registers, that the rest of the code would like to ignore.  */
 551
 552   /* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is
 553      going to be deprecated.  Instead architectures will leave the raw
 554      register value as is and instead clean things up as they pass
 555      through the method gdbarch_register_read() clean up the
 556      values. */
 557
 558 #ifdef CLEAN_UP_REGISTER_VALUE
 559   CLEAN_UP_REGISTER_VALUE (regnum, register_buffer (regnum));
 560 #endif
 561 }
 562
 563 /* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
 564    Special handling for registers PC, SP, and FP.  */
 565
 566 /* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(),
 567    read_pc_pid(), read_pc(), generic_target_write_pc(),
 568    write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(),
 569    generic_target_write_sp(), write_sp(), generic_target_read_fp(),
 570    read_fp(), generic_target_write_fp(), write_fp will eventually be
 571    moved out of the reg-cache into either frame.[hc] or to the
 572    multi-arch framework.  The are not part of the raw register cache.  */
 573
 574 /* This routine is getting awfully cluttered with #if's.  It's probably
 575    time to turn this into READ_PC and define it in the tm.h file.
 576    Ditto for write_pc.
 577
 578    1999-06-08: The following were re-written so that it assumes the
 579    existence of a TARGET_READ_PC et.al. macro.  A default generic
 580    version of that macro is made available where needed.
 581
 582    Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
 583    by the multi-arch framework, it will eventually be possible to
 584    eliminate the intermediate read_pc_pid().  The client would call
 585    TARGET_READ_PC directly. (cagney). */
 586
 587 CORE_ADDR
 588 generic_target_read_pc (ptid_t ptid)
 589 {
 590 #ifdef PC_REGNUM
 591   if (PC_REGNUM >= 0)
 592     {
 593       CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, ptid));
 594       return pc_val;
 595     }
 596 #endif
 597   internal_error (__FILE__, __LINE__,
 598                   "generic_target_read_pc");
 599   return 0;
 600 }
 601
 602 CORE_ADDR
 603 read_pc_pid (ptid_t ptid)
 604 {
 605   ptid_t saved_inferior_ptid;
 606   CORE_ADDR pc_val;
 607
 608   /* In case ptid != inferior_ptid. */
 609   saved_inferior_ptid = inferior_ptid;
 610   inferior_ptid = ptid;
 611
 612   pc_val = TARGET_READ_PC (ptid);
 613
 614   inferior_ptid = saved_inferior_ptid;
 615   return pc_val;
 616 }
 617
 618 CORE_ADDR
 619 read_pc (void)
 620 {
 621   return read_pc_pid (inferior_ptid);
 622 }
 623
 624 void
 625 generic_target_write_pc (CORE_ADDR pc, ptid_t ptid)
 626 {
 627 #ifdef PC_REGNUM
 628   if (PC_REGNUM >= 0)
 629     write_register_pid (PC_REGNUM, pc, ptid);
 630   if (NPC_REGNUM >= 0)
 631     write_register_pid (NPC_REGNUM, pc + 4, ptid);
 632   if (NNPC_REGNUM >= 0)
 633     write_register_pid (NNPC_REGNUM, pc + 8, ptid);
 634 #else
 635   internal_error (__FILE__, __LINE__,
 636                   "generic_target_write_pc");
 637 #endif
 638 }
 639
 640 void
 641 write_pc_pid (CORE_ADDR pc, ptid_t ptid)
 642 {
 643   ptid_t saved_inferior_ptid;
 644
 645   /* In case ptid != inferior_ptid. */
 646   saved_inferior_ptid = inferior_ptid;
 647   inferior_ptid = ptid;
 648
 649   TARGET_WRITE_PC (pc, ptid);
 650
 651   inferior_ptid = saved_inferior_ptid;
 652 }
 653
 654 void
 655 write_pc (CORE_ADDR pc)
 656 {
 657   write_pc_pid (pc, inferior_ptid);
 658 }
 659
 660 /* Cope with strage ways of getting to the stack and frame pointers */
 661
 662 CORE_ADDR
 663 generic_target_read_sp (void)
 664 {
 665 #ifdef SP_REGNUM
 666   if (SP_REGNUM >= 0)
 667     return read_register (SP_REGNUM);
 668 #endif
 669   internal_error (__FILE__, __LINE__,
 670                   "generic_target_read_sp");
 671 }
 672
 673 CORE_ADDR
 674 read_sp (void)
 675 {
 676   return TARGET_READ_SP ();
 677 }
 678
 679 void
 680 generic_target_write_sp (CORE_ADDR val)
 681 {
 682 #ifdef SP_REGNUM
 683   if (SP_REGNUM >= 0)
 684     {
 685       write_register (SP_REGNUM, val);
 686       return;
 687     }
 688 #endif
 689   internal_error (__FILE__, __LINE__,
 690                   "generic_target_write_sp");
 691 }
 692
 693 void
 694 write_sp (CORE_ADDR val)
 695 {
 696   TARGET_WRITE_SP (val);
 697 }
 698
 699 CORE_ADDR
 700 generic_target_read_fp (void)
 701 {
 702 #ifdef FP_REGNUM
 703   if (FP_REGNUM >= 0)
 704     return read_register (FP_REGNUM);
 705 #endif
 706   internal_error (__FILE__, __LINE__,
 707                   "generic_target_read_fp");
 708 }
 709
 710 CORE_ADDR
 711 read_fp (void)
 712 {
 713   return TARGET_READ_FP ();
 714 }
 715
 716 void
 717 generic_target_write_fp (CORE_ADDR val)
 718 {
 719 #ifdef FP_REGNUM
 720   if (FP_REGNUM >= 0)
 721     {
 722       write_register (FP_REGNUM, val);
 723       return;
 724     }
 725 #endif
 726   internal_error (__FILE__, __LINE__,
 727                   "generic_target_write_fp");
 728 }
 729
 730 void
 731 write_fp (CORE_ADDR val)
 732 {
 733   TARGET_WRITE_FP (val);
 734 }
 735
 736 /* ARGSUSED */
 737 static void
 738 reg_flush_command (char *command, int from_tty)
 739 {
 740   /* Force-flush the register cache.  */
 741   registers_changed ();
 742   if (from_tty)
 743     printf_filtered ("Register cache flushed.\n");
 744 }
 745
 746
 747 static void
 748 build_regcache (void)
 749 {
 750   /* We allocate some extra slop since we do a lot of memcpy's around
 751      `registers', and failing-soft is better than failing hard.  */
 752   int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256;
 753   int sizeof_register_valid =
 754     (NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid);
 755   registers = xmalloc (sizeof_registers);
 756   memset (registers, 0, sizeof_registers);
 757   register_valid = xmalloc (sizeof_register_valid);
 758   memset (register_valid, 0, sizeof_register_valid);
 759 }
 760
 761 void
 762 _initialize_regcache (void)
 763 {
 764   build_regcache ();
 765
 766   register_gdbarch_swap (&registers, sizeof (registers), NULL);
 767   register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
 768   register_gdbarch_swap (NULL, 0, build_regcache);
 769
 770   add_com ("flushregs", class_maintenance, reg_flush_command,
 771            "Force gdb to flush its register cache (maintainer command)");
 772
 773    /* Initialize the thread/process associated with the current set of
 774       registers.  For now, -1 is special, and means `no current process'.  */
 775   registers_ptid = pid_to_ptid (-1);
 776 }