1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
38 #include "libbfd.h" /* for bfd_default_set_arch_mach */
39 #include "coff/internal.h" /* for libcoff.h */
40 #include "libcoff.h" /* for xcoff_data */
41 #include "coff/xcoff.h"
46 #include "solib-svr4.h"
49 /* If the kernel has to deliver a signal, it pushes a sigcontext
50 structure on the stack and then calls the signal handler, passing
51 the address of the sigcontext in an argument register. Usually
52 the signal handler doesn't save this register, so we have to
53 access the sigcontext structure via an offset from the signal handler
55 The following constants were determined by experimentation on AIX 3.2. */
56 #define SIG_FRAME_PC_OFFSET 96
57 #define SIG_FRAME_LR_OFFSET 108
58 #define SIG_FRAME_FP_OFFSET 284
60 /* To be used by skip_prologue. */
62 struct rs6000_framedata
64 int offset
; /* total size of frame --- the distance
65 by which we decrement sp to allocate
67 int saved_gpr
; /* smallest # of saved gpr */
68 int saved_fpr
; /* smallest # of saved fpr */
69 int saved_vr
; /* smallest # of saved vr */
70 int saved_ev
; /* smallest # of saved ev */
71 int alloca_reg
; /* alloca register number (frame ptr) */
72 char frameless
; /* true if frameless functions. */
73 char nosavedpc
; /* true if pc not saved. */
74 int gpr_offset
; /* offset of saved gprs from prev sp */
75 int fpr_offset
; /* offset of saved fprs from prev sp */
76 int vr_offset
; /* offset of saved vrs from prev sp */
77 int ev_offset
; /* offset of saved evs from prev sp */
78 int lr_offset
; /* offset of saved lr */
79 int cr_offset
; /* offset of saved cr */
80 int vrsave_offset
; /* offset of saved vrsave register */
83 /* Description of a single register. */
87 char *name
; /* name of register */
88 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
89 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
90 unsigned char fpr
; /* whether register is floating-point */
91 unsigned char pseudo
; /* whether register is pseudo */
94 /* Breakpoint shadows for the single step instructions will be kept here. */
96 static struct sstep_breaks
98 /* Address, or 0 if this is not in use. */
100 /* Shadow contents. */
105 /* Hook for determining the TOC address when calling functions in the
106 inferior under AIX. The initialization code in rs6000-nat.c sets
107 this hook to point to find_toc_address. */
109 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
111 /* Hook to set the current architecture when starting a child process.
112 rs6000-nat.c sets this. */
114 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
116 /* Static function prototypes */
118 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
120 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
121 struct rs6000_framedata
*);
122 static void frame_get_saved_regs (struct frame_info
* fi
,
123 struct rs6000_framedata
* fdatap
);
124 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
126 /* Is REGNO an AltiVec register? Return 1 if so, 0 otherwise. */
128 altivec_register_p (int regno
)
130 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
131 if (tdep
->ppc_vr0_regnum
< 0 || tdep
->ppc_vrsave_regnum
< 0)
134 return (regno
>= tdep
->ppc_vr0_regnum
&& regno
<= tdep
->ppc_vrsave_regnum
);
137 /* Read a LEN-byte address from debugged memory address MEMADDR. */
140 read_memory_addr (CORE_ADDR memaddr
, int len
)
142 return read_memory_unsigned_integer (memaddr
, len
);
146 rs6000_skip_prologue (CORE_ADDR pc
)
148 struct rs6000_framedata frame
;
149 pc
= skip_prologue (pc
, 0, &frame
);
154 /* Fill in fi->saved_regs */
156 struct frame_extra_info
158 /* Functions calling alloca() change the value of the stack
159 pointer. We need to use initial stack pointer (which is saved in
160 r31 by gcc) in such cases. If a compiler emits traceback table,
161 then we should use the alloca register specified in traceback
163 CORE_ADDR initial_sp
; /* initial stack pointer. */
167 rs6000_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
169 fi
->extra_info
= (struct frame_extra_info
*)
170 frame_obstack_alloc (sizeof (struct frame_extra_info
));
171 fi
->extra_info
->initial_sp
= 0;
172 if (get_next_frame (fi
) != (CORE_ADDR
) 0
173 && fi
->pc
< TEXT_SEGMENT_BASE
)
174 /* We're in get_prev_frame */
175 /* and this is a special signal frame. */
176 /* (fi->pc will be some low address in the kernel, */
177 /* to which the signal handler returns). */
178 deprecated_set_frame_type (fi
, SIGTRAMP_FRAME
);
181 /* Put here the code to store, into a struct frame_saved_regs,
182 the addresses of the saved registers of frame described by FRAME_INFO.
183 This includes special registers such as pc and fp saved in special
184 ways in the stack frame. sp is even more special:
185 the address we return for it IS the sp for the next frame. */
187 /* In this implementation for RS/6000, we do *not* save sp. I am
188 not sure if it will be needed. The following function takes care of gpr's
192 rs6000_frame_init_saved_regs (struct frame_info
*fi
)
194 frame_get_saved_regs (fi
, NULL
);
198 rs6000_frame_args_address (struct frame_info
*fi
)
200 if (fi
->extra_info
->initial_sp
!= 0)
201 return fi
->extra_info
->initial_sp
;
203 return frame_initial_stack_address (fi
);
206 /* Immediately after a function call, return the saved pc.
207 Can't go through the frames for this because on some machines
208 the new frame is not set up until the new function executes
209 some instructions. */
212 rs6000_saved_pc_after_call (struct frame_info
*fi
)
214 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
217 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
220 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
227 absolute
= (int) ((instr
>> 1) & 1);
232 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
236 dest
= pc
+ immediate
;
240 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
244 dest
= pc
+ immediate
;
248 ext_op
= (instr
>> 1) & 0x3ff;
250 if (ext_op
== 16) /* br conditional register */
252 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
254 /* If we are about to return from a signal handler, dest is
255 something like 0x3c90. The current frame is a signal handler
256 caller frame, upon completion of the sigreturn system call
257 execution will return to the saved PC in the frame. */
258 if (dest
< TEXT_SEGMENT_BASE
)
260 struct frame_info
*fi
;
262 fi
= get_current_frame ();
264 dest
= read_memory_addr (fi
->frame
+ SIG_FRAME_PC_OFFSET
,
265 gdbarch_tdep (current_gdbarch
)->wordsize
);
269 else if (ext_op
== 528) /* br cond to count reg */
271 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
273 /* If we are about to execute a system call, dest is something
274 like 0x22fc or 0x3b00. Upon completion the system call
275 will return to the address in the link register. */
276 if (dest
< TEXT_SEGMENT_BASE
)
277 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
286 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
290 /* Sequence of bytes for breakpoint instruction. */
292 #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
293 #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
295 const static unsigned char *
296 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
298 static unsigned char big_breakpoint
[] = BIG_BREAKPOINT
;
299 static unsigned char little_breakpoint
[] = LITTLE_BREAKPOINT
;
301 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
302 return big_breakpoint
;
304 return little_breakpoint
;
308 /* AIX does not support PT_STEP. Simulate it. */
311 rs6000_software_single_step (enum target_signal signal
,
312 int insert_breakpoints_p
)
316 const char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
322 if (insert_breakpoints_p
)
327 insn
= read_memory_integer (loc
, 4);
329 breaks
[0] = loc
+ breakp_sz
;
331 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
333 /* Don't put two breakpoints on the same address. */
334 if (breaks
[1] == breaks
[0])
337 stepBreaks
[1].address
= 0;
339 for (ii
= 0; ii
< 2; ++ii
)
342 /* ignore invalid breakpoint. */
343 if (breaks
[ii
] == -1)
345 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
346 stepBreaks
[ii
].address
= breaks
[ii
];
353 /* remove step breakpoints. */
354 for (ii
= 0; ii
< 2; ++ii
)
355 if (stepBreaks
[ii
].address
!= 0)
356 target_remove_breakpoint (stepBreaks
[ii
].address
,
357 stepBreaks
[ii
].data
);
359 errno
= 0; /* FIXME, don't ignore errors! */
360 /* What errors? {read,write}_memory call error(). */
364 /* return pc value after skipping a function prologue and also return
365 information about a function frame.
367 in struct rs6000_framedata fdata:
368 - frameless is TRUE, if function does not have a frame.
369 - nosavedpc is TRUE, if function does not save %pc value in its frame.
370 - offset is the initial size of this stack frame --- the amount by
371 which we decrement the sp to allocate the frame.
372 - saved_gpr is the number of the first saved gpr.
373 - saved_fpr is the number of the first saved fpr.
374 - saved_vr is the number of the first saved vr.
375 - saved_ev is the number of the first saved ev.
376 - alloca_reg is the number of the register used for alloca() handling.
378 - gpr_offset is the offset of the first saved gpr from the previous frame.
379 - fpr_offset is the offset of the first saved fpr from the previous frame.
380 - vr_offset is the offset of the first saved vr from the previous frame.
381 - ev_offset is the offset of the first saved ev from the previous frame.
382 - lr_offset is the offset of the saved lr
383 - cr_offset is the offset of the saved cr
384 - vrsave_offset is the offset of the saved vrsave register
387 #define SIGNED_SHORT(x) \
388 ((sizeof (short) == 2) \
389 ? ((int)(short)(x)) \
390 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
392 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
394 /* Limit the number of skipped non-prologue instructions, as the examining
395 of the prologue is expensive. */
396 static int max_skip_non_prologue_insns
= 10;
398 /* Given PC representing the starting address of a function, and
399 LIM_PC which is the (sloppy) limit to which to scan when looking
400 for a prologue, attempt to further refine this limit by using
401 the line data in the symbol table. If successful, a better guess
402 on where the prologue ends is returned, otherwise the previous
403 value of lim_pc is returned. */
405 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
407 struct symtab_and_line prologue_sal
;
409 prologue_sal
= find_pc_line (pc
, 0);
410 if (prologue_sal
.line
!= 0)
413 CORE_ADDR addr
= prologue_sal
.end
;
415 /* Handle the case in which compiler's optimizer/scheduler
416 has moved instructions into the prologue. We scan ahead
417 in the function looking for address ranges whose corresponding
418 line number is less than or equal to the first one that we
419 found for the function. (It can be less than when the
420 scheduler puts a body instruction before the first prologue
422 for (i
= 2 * max_skip_non_prologue_insns
;
423 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
426 struct symtab_and_line sal
;
428 sal
= find_pc_line (addr
, 0);
431 if (sal
.line
<= prologue_sal
.line
432 && sal
.symtab
== prologue_sal
.symtab
)
439 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
440 lim_pc
= prologue_sal
.end
;
447 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
449 CORE_ADDR orig_pc
= pc
;
450 CORE_ADDR last_prologue_pc
= pc
;
451 CORE_ADDR li_found_pc
= 0;
455 long vr_saved_offset
= 0;
464 int minimal_toc_loaded
= 0;
465 int prev_insn_was_prologue_insn
= 1;
466 int num_skip_non_prologue_insns
= 0;
467 const struct bfd_arch_info
*arch_info
= gdbarch_bfd_arch_info (current_gdbarch
);
468 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
470 /* Attempt to find the end of the prologue when no limit is specified.
471 Note that refine_prologue_limit() has been written so that it may
472 be used to "refine" the limits of non-zero PC values too, but this
473 is only safe if we 1) trust the line information provided by the
474 compiler and 2) iterate enough to actually find the end of the
477 It may become a good idea at some point (for both performance and
478 accuracy) to unconditionally call refine_prologue_limit(). But,
479 until we can make a clear determination that this is beneficial,
480 we'll play it safe and only use it to obtain a limit when none
481 has been specified. */
483 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
485 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
486 fdata
->saved_gpr
= -1;
487 fdata
->saved_fpr
= -1;
488 fdata
->saved_vr
= -1;
489 fdata
->saved_ev
= -1;
490 fdata
->alloca_reg
= -1;
491 fdata
->frameless
= 1;
492 fdata
->nosavedpc
= 1;
496 /* Sometimes it isn't clear if an instruction is a prologue
497 instruction or not. When we encounter one of these ambiguous
498 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
499 Otherwise, we'll assume that it really is a prologue instruction. */
500 if (prev_insn_was_prologue_insn
)
501 last_prologue_pc
= pc
;
503 /* Stop scanning if we've hit the limit. */
504 if (lim_pc
!= 0 && pc
>= lim_pc
)
507 prev_insn_was_prologue_insn
= 1;
509 /* Fetch the instruction and convert it to an integer. */
510 if (target_read_memory (pc
, buf
, 4))
512 op
= extract_signed_integer (buf
, 4);
514 if ((op
& 0xfc1fffff) == 0x7c0802a6)
516 lr_reg
= (op
& 0x03e00000) | 0x90010000;
520 else if ((op
& 0xfc1fffff) == 0x7c000026)
522 cr_reg
= (op
& 0x03e00000) | 0x90010000;
526 else if ((op
& 0xfc1f0000) == 0xd8010000)
527 { /* stfd Rx,NUM(r1) */
528 reg
= GET_SRC_REG (op
);
529 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
531 fdata
->saved_fpr
= reg
;
532 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
537 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
538 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
539 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
540 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
543 reg
= GET_SRC_REG (op
);
544 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
546 fdata
->saved_gpr
= reg
;
547 if ((op
& 0xfc1f0003) == 0xf8010000)
549 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
554 else if ((op
& 0xffff0000) == 0x60000000)
557 /* Allow nops in the prologue, but do not consider them to
558 be part of the prologue unless followed by other prologue
560 prev_insn_was_prologue_insn
= 0;
564 else if ((op
& 0xffff0000) == 0x3c000000)
565 { /* addis 0,0,NUM, used
567 fdata
->offset
= (op
& 0x0000ffff) << 16;
568 fdata
->frameless
= 0;
572 else if ((op
& 0xffff0000) == 0x60000000)
573 { /* ori 0,0,NUM, 2nd ha
574 lf of >= 32k frames */
575 fdata
->offset
|= (op
& 0x0000ffff);
576 fdata
->frameless
= 0;
580 else if (lr_reg
!= -1 && (op
& 0xffff0000) == lr_reg
)
583 fdata
->lr_offset
= SIGNED_SHORT (op
) + offset
;
584 fdata
->nosavedpc
= 0;
589 else if (cr_reg
!= -1 && (op
& 0xffff0000) == cr_reg
)
592 fdata
->cr_offset
= SIGNED_SHORT (op
) + offset
;
597 else if (op
== 0x48000005)
603 else if (op
== 0x48000004)
608 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
609 in V.4 -mminimal-toc */
610 (op
& 0xffff0000) == 0x3bde0000)
611 { /* addi 30,30,foo@l */
615 else if ((op
& 0xfc000001) == 0x48000001)
619 fdata
->frameless
= 0;
620 /* Don't skip over the subroutine call if it is not within
621 the first three instructions of the prologue. */
622 if ((pc
- orig_pc
) > 8)
625 op
= read_memory_integer (pc
+ 4, 4);
627 /* At this point, make sure this is not a trampoline
628 function (a function that simply calls another functions,
629 and nothing else). If the next is not a nop, this branch
630 was part of the function prologue. */
632 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
633 break; /* don't skip over
637 /* update stack pointer */
639 else if ((op
& 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
640 (op
& 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
642 fdata
->frameless
= 0;
643 if ((op
& 0xffff0003) == 0xf8210001)
645 fdata
->offset
= SIGNED_SHORT (op
);
646 offset
= fdata
->offset
;
650 else if (op
== 0x7c21016e)
652 fdata
->frameless
= 0;
653 offset
= fdata
->offset
;
656 /* Load up minimal toc pointer */
658 else if ((op
>> 22) == 0x20f
659 && !minimal_toc_loaded
)
660 { /* l r31,... or l r30,... */
661 minimal_toc_loaded
= 1;
664 /* move parameters from argument registers to local variable
667 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
668 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
669 (((op
>> 21) & 31) <= 10) &&
670 ((long) ((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
674 /* store parameters in stack */
676 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
677 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
678 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
682 /* store parameters in stack via frame pointer */
685 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
686 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
687 (op
& 0xfc1f0000) == 0xfc1f0000))
688 { /* frsp, fp?,NUM(r1) */
691 /* Set up frame pointer */
693 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
696 fdata
->frameless
= 0;
698 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
+ 31);
701 /* Another way to set up the frame pointer. */
703 else if ((op
& 0xfc1fffff) == 0x38010000)
704 { /* addi rX, r1, 0x0 */
705 fdata
->frameless
= 0;
707 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
708 + ((op
& ~0x38010000) >> 21));
711 /* AltiVec related instructions. */
712 /* Store the vrsave register (spr 256) in another register for
713 later manipulation, or load a register into the vrsave
714 register. 2 instructions are used: mfvrsave and
715 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
716 and mtspr SPR256, Rn. */
717 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
718 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
719 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
721 vrsave_reg
= GET_SRC_REG (op
);
724 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
728 /* Store the register where vrsave was saved to onto the stack:
729 rS is the register where vrsave was stored in a previous
731 /* 100100 sssss 00001 dddddddd dddddddd */
732 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
734 if (vrsave_reg
== GET_SRC_REG (op
))
736 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
741 /* Compute the new value of vrsave, by modifying the register
742 where vrsave was saved to. */
743 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
744 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
748 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
749 in a pair of insns to save the vector registers on the
751 /* 001110 00000 00000 iiii iiii iiii iiii */
752 /* 001110 01110 00000 iiii iiii iiii iiii */
753 else if ((op
& 0xffff0000) == 0x38000000 /* li r0, SIMM */
754 || (op
& 0xffff0000) == 0x39c00000) /* li r14, SIMM */
757 vr_saved_offset
= SIGNED_SHORT (op
);
759 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
760 /* 011111 sssss 11111 00000 00111001110 */
761 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
763 if (pc
== (li_found_pc
+ 4))
765 vr_reg
= GET_SRC_REG (op
);
766 /* If this is the first vector reg to be saved, or if
767 it has a lower number than others previously seen,
768 reupdate the frame info. */
769 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
771 fdata
->saved_vr
= vr_reg
;
772 fdata
->vr_offset
= vr_saved_offset
+ offset
;
774 vr_saved_offset
= -1;
779 /* End AltiVec related instructions. */
781 /* Start BookE related instructions. */
782 /* Store gen register S at (r31+uimm).
783 Any register less than r13 is volatile, so we don't care. */
784 /* 000100 sssss 11111 iiiii 01100100001 */
785 else if (arch_info
->mach
== bfd_mach_ppc_e500
786 && (op
& 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
788 if ((op
& 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
791 ev_reg
= GET_SRC_REG (op
);
792 imm
= (op
>> 11) & 0x1f;
794 /* If this is the first vector reg to be saved, or if
795 it has a lower number than others previously seen,
796 reupdate the frame info. */
797 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
799 fdata
->saved_ev
= ev_reg
;
800 fdata
->ev_offset
= ev_offset
+ offset
;
805 /* Store gen register rS at (r1+rB). */
806 /* 000100 sssss 00001 bbbbb 01100100000 */
807 else if (arch_info
->mach
== bfd_mach_ppc_e500
808 && (op
& 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
810 if (pc
== (li_found_pc
+ 4))
812 ev_reg
= GET_SRC_REG (op
);
813 /* If this is the first vector reg to be saved, or if
814 it has a lower number than others previously seen,
815 reupdate the frame info. */
816 /* We know the contents of rB from the previous instruction. */
817 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
819 fdata
->saved_ev
= ev_reg
;
820 fdata
->ev_offset
= vr_saved_offset
+ offset
;
822 vr_saved_offset
= -1;
828 /* Store gen register r31 at (rA+uimm). */
829 /* 000100 11111 aaaaa iiiii 01100100001 */
830 else if (arch_info
->mach
== bfd_mach_ppc_e500
831 && (op
& 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
833 /* Wwe know that the source register is 31 already, but
834 it can't hurt to compute it. */
835 ev_reg
= GET_SRC_REG (op
);
836 ev_offset
= ((op
>> 11) & 0x1f) * 8;
837 /* If this is the first vector reg to be saved, or if
838 it has a lower number than others previously seen,
839 reupdate the frame info. */
840 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
842 fdata
->saved_ev
= ev_reg
;
843 fdata
->ev_offset
= ev_offset
+ offset
;
848 /* Store gen register S at (r31+r0).
849 Store param on stack when offset from SP bigger than 4 bytes. */
850 /* 000100 sssss 11111 00000 01100100000 */
851 else if (arch_info
->mach
== bfd_mach_ppc_e500
852 && (op
& 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
854 if (pc
== (li_found_pc
+ 4))
856 if ((op
& 0x03e00000) >= 0x01a00000)
858 ev_reg
= GET_SRC_REG (op
);
859 /* If this is the first vector reg to be saved, or if
860 it has a lower number than others previously seen,
861 reupdate the frame info. */
862 /* We know the contents of r0 from the previous
864 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
866 fdata
->saved_ev
= ev_reg
;
867 fdata
->ev_offset
= vr_saved_offset
+ offset
;
871 vr_saved_offset
= -1;
876 /* End BookE related instructions. */
880 /* Not a recognized prologue instruction.
881 Handle optimizer code motions into the prologue by continuing
882 the search if we have no valid frame yet or if the return
883 address is not yet saved in the frame. */
884 if (fdata
->frameless
== 0
885 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
888 if (op
== 0x4e800020 /* blr */
889 || op
== 0x4e800420) /* bctr */
890 /* Do not scan past epilogue in frameless functions or
893 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
894 /* Never skip branches. */
897 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
898 /* Do not scan too many insns, scanning insns is expensive with
902 /* Continue scanning. */
903 prev_insn_was_prologue_insn
= 0;
909 /* I have problems with skipping over __main() that I need to address
910 * sometime. Previously, I used to use misc_function_vector which
911 * didn't work as well as I wanted to be. -MGO */
913 /* If the first thing after skipping a prolog is a branch to a function,
914 this might be a call to an initializer in main(), introduced by gcc2.
915 We'd like to skip over it as well. Fortunately, xlc does some extra
916 work before calling a function right after a prologue, thus we can
917 single out such gcc2 behaviour. */
920 if ((op
& 0xfc000001) == 0x48000001)
921 { /* bl foo, an initializer function? */
922 op
= read_memory_integer (pc
+ 4, 4);
924 if (op
== 0x4def7b82)
925 { /* cror 0xf, 0xf, 0xf (nop) */
927 /* Check and see if we are in main. If so, skip over this
928 initializer function as well. */
930 tmp
= find_pc_misc_function (pc
);
931 if (tmp
>= 0 && STREQ (misc_function_vector
[tmp
].name
, main_name ()))
937 fdata
->offset
= -fdata
->offset
;
938 return last_prologue_pc
;
942 /*************************************************************************
943 Support for creating pushing a dummy frame into the stack, and popping
945 *************************************************************************/
948 /* Pop the innermost frame, go back to the caller. */
951 rs6000_pop_frame (void)
953 CORE_ADDR pc
, lr
, sp
, prev_sp
, addr
; /* %pc, %lr, %sp */
954 struct rs6000_framedata fdata
;
955 struct frame_info
*frame
= get_current_frame ();
959 sp
= get_frame_base (frame
);
961 if (DEPRECATED_PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
963 generic_pop_dummy_frame ();
964 flush_cached_frames ();
968 /* Make sure that all registers are valid. */
969 deprecated_read_register_bytes (0, NULL
, REGISTER_BYTES
);
971 /* Figure out previous %pc value. If the function is frameless, it is
972 still in the link register, otherwise walk the frames and retrieve the
973 saved %pc value in the previous frame. */
975 addr
= get_pc_function_start (frame
->pc
);
976 (void) skip_prologue (addr
, frame
->pc
, &fdata
);
978 wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
982 prev_sp
= read_memory_addr (sp
, wordsize
);
983 if (fdata
.lr_offset
== 0)
984 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
986 lr
= read_memory_addr (prev_sp
+ fdata
.lr_offset
, wordsize
);
988 /* reset %pc value. */
989 write_register (PC_REGNUM
, lr
);
991 /* reset register values if any was saved earlier. */
993 if (fdata
.saved_gpr
!= -1)
995 addr
= prev_sp
+ fdata
.gpr_offset
;
996 for (ii
= fdata
.saved_gpr
; ii
<= 31; ++ii
)
998 read_memory (addr
, &deprecated_registers
[REGISTER_BYTE (ii
)],
1004 if (fdata
.saved_fpr
!= -1)
1006 addr
= prev_sp
+ fdata
.fpr_offset
;
1007 for (ii
= fdata
.saved_fpr
; ii
<= 31; ++ii
)
1009 read_memory (addr
, &deprecated_registers
[REGISTER_BYTE (ii
+ FP0_REGNUM
)], 8);
1014 write_register (SP_REGNUM
, prev_sp
);
1015 target_store_registers (-1);
1016 flush_cached_frames ();
1019 /* Fixup the call sequence of a dummy function, with the real function
1020 address. Its arguments will be passed by gdb. */
1023 rs6000_fix_call_dummy (char *dummyname
, CORE_ADDR pc
, CORE_ADDR fun
,
1024 int nargs
, struct value
**args
, struct type
*type
,
1028 CORE_ADDR target_addr
;
1030 if (rs6000_find_toc_address_hook
!= NULL
)
1032 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (fun
);
1033 write_register (gdbarch_tdep (current_gdbarch
)->ppc_toc_regnum
,
1038 /* All the ABI's require 16 byte alignment. */
1040 rs6000_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1042 return (addr
& -16);
1045 /* Pass the arguments in either registers, or in the stack. In RS/6000,
1046 the first eight words of the argument list (that might be less than
1047 eight parameters if some parameters occupy more than one word) are
1048 passed in r3..r10 registers. float and double parameters are
1049 passed in fpr's, in addition to that. Rest of the parameters if any
1050 are passed in user stack. There might be cases in which half of the
1051 parameter is copied into registers, the other half is pushed into
1054 Stack must be aligned on 64-bit boundaries when synthesizing
1057 If the function is returning a structure, then the return address is passed
1058 in r3, then the first 7 words of the parameters can be passed in registers,
1059 starting from r4. */
1062 rs6000_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1063 int struct_return
, CORE_ADDR struct_addr
)
1067 int argno
; /* current argument number */
1068 int argbytes
; /* current argument byte */
1069 char tmp_buffer
[50];
1070 int f_argno
= 0; /* current floating point argno */
1071 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1073 struct value
*arg
= 0;
1078 /* The first eight words of ther arguments are passed in registers.
1079 Copy them appropriately.
1081 If the function is returning a `struct', then the first word (which
1082 will be passed in r3) is used for struct return address. In that
1083 case we should advance one word and start from r4 register to copy
1086 ii
= struct_return
? 1 : 0;
1089 effectively indirect call... gcc does...
1091 return_val example( float, int);
1094 float in fp0, int in r3
1095 offset of stack on overflow 8/16
1096 for varargs, must go by type.
1098 float in r3&r4, int in r5
1099 offset of stack on overflow different
1101 return in r3 or f0. If no float, must study how gcc emulates floats;
1102 pay attention to arg promotion.
1103 User may have to cast\args to handle promotion correctly
1104 since gdb won't know if prototype supplied or not.
1107 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
1109 int reg_size
= REGISTER_RAW_SIZE (ii
+ 3);
1112 type
= check_typedef (VALUE_TYPE (arg
));
1113 len
= TYPE_LENGTH (type
);
1115 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1118 /* Floating point arguments are passed in fpr's, as well as gpr's.
1119 There are 13 fpr's reserved for passing parameters. At this point
1120 there is no way we would run out of them. */
1124 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1126 memcpy (&deprecated_registers
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1127 VALUE_CONTENTS (arg
),
1135 /* Argument takes more than one register. */
1136 while (argbytes
< len
)
1138 memset (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)], 0,
1140 memcpy (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)],
1141 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1142 (len
- argbytes
) > reg_size
1143 ? reg_size
: len
- argbytes
);
1144 ++ii
, argbytes
+= reg_size
;
1147 goto ran_out_of_registers_for_arguments
;
1154 /* Argument can fit in one register. No problem. */
1155 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1156 memset (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1157 memcpy ((char *)&deprecated_registers
[REGISTER_BYTE (ii
+ 3)] + adj
,
1158 VALUE_CONTENTS (arg
), len
);
1163 ran_out_of_registers_for_arguments
:
1165 saved_sp
= read_sp ();
1167 /* Location for 8 parameters are always reserved. */
1170 /* Another six words for back chain, TOC register, link register, etc. */
1173 /* Stack pointer must be quadword aligned. */
1176 /* If there are more arguments, allocate space for them in
1177 the stack, then push them starting from the ninth one. */
1179 if ((argno
< nargs
) || argbytes
)
1185 space
+= ((len
- argbytes
+ 3) & -4);
1191 for (; jj
< nargs
; ++jj
)
1193 struct value
*val
= args
[jj
];
1194 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1197 /* Add location required for the rest of the parameters. */
1198 space
= (space
+ 15) & -16;
1201 /* This is another instance we need to be concerned about
1202 securing our stack space. If we write anything underneath %sp
1203 (r1), we might conflict with the kernel who thinks he is free
1204 to use this area. So, update %sp first before doing anything
1207 write_register (SP_REGNUM
, sp
);
1209 /* If the last argument copied into the registers didn't fit there
1210 completely, push the rest of it into stack. */
1214 write_memory (sp
+ 24 + (ii
* 4),
1215 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1218 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1221 /* Push the rest of the arguments into stack. */
1222 for (; argno
< nargs
; ++argno
)
1226 type
= check_typedef (VALUE_TYPE (arg
));
1227 len
= TYPE_LENGTH (type
);
1230 /* Float types should be passed in fpr's, as well as in the
1232 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1237 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1239 memcpy (&deprecated_registers
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1240 VALUE_CONTENTS (arg
),
1245 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1246 ii
+= ((len
+ 3) & -4) / 4;
1250 /* Secure stack areas first, before doing anything else. */
1251 write_register (SP_REGNUM
, sp
);
1253 /* set back chain properly */
1254 store_address (tmp_buffer
, 4, saved_sp
);
1255 write_memory (sp
, tmp_buffer
, 4);
1257 target_store_registers (-1);
1261 /* Function: ppc_push_return_address (pc, sp)
1262 Set up the return address for the inferior function call. */
1265 ppc_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1267 write_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
,
1268 CALL_DUMMY_ADDRESS ());
1272 /* Extract a function return value of type TYPE from raw register array
1273 REGBUF, and copy that return value into VALBUF in virtual format. */
1275 e500_extract_return_value (struct type
*valtype
, struct regcache
*regbuf
, void *valbuf
)
1278 int vallen
= TYPE_LENGTH (valtype
);
1279 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1281 if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1283 && TYPE_VECTOR (valtype
))
1285 regcache_raw_read (regbuf
, tdep
->ppc_ev0_regnum
+ 3, valbuf
);
1289 /* Return value is copied starting from r3. Note that r3 for us
1290 is a pseudo register. */
1292 int return_regnum
= tdep
->ppc_gp0_regnum
+ 3;
1293 int reg_size
= REGISTER_RAW_SIZE (return_regnum
);
1299 /* Compute where we will start storing the value from. */
1300 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1302 if (vallen
<= reg_size
)
1303 offset
= reg_size
- vallen
;
1305 offset
= reg_size
+ (reg_size
- vallen
);
1308 /* How big does the local buffer need to be? */
1309 if (vallen
<= reg_size
)
1310 val_buffer
= alloca (reg_size
);
1312 val_buffer
= alloca (vallen
);
1314 /* Read all we need into our private buffer. We copy it in
1315 chunks that are as long as one register, never shorter, even
1316 if the value is smaller than the register. */
1317 while (copied
< vallen
)
1319 reg_part_size
= REGISTER_RAW_SIZE (return_regnum
+ i
);
1320 /* It is a pseudo/cooked register. */
1321 regcache_cooked_read (regbuf
, return_regnum
+ i
,
1322 val_buffer
+ copied
);
1323 copied
+= reg_part_size
;
1326 /* Put the stuff in the return buffer. */
1327 memcpy (valbuf
, val_buffer
+ offset
, vallen
);
1332 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1335 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1337 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1342 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1343 We need to truncate the return value into float size (4 byte) if
1346 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1348 ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)],
1349 TYPE_LENGTH (valtype
));
1352 memcpy (&dd
, ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1354 memcpy (valbuf
, &ff
, sizeof (float));
1357 else if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1358 && TYPE_LENGTH (valtype
) == 16
1359 && TYPE_VECTOR (valtype
))
1361 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1362 TYPE_LENGTH (valtype
));
1366 /* return value is copied starting from r3. */
1367 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1368 && TYPE_LENGTH (valtype
) < REGISTER_RAW_SIZE (3))
1369 offset
= REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1372 regbuf
+ REGISTER_BYTE (3) + offset
,
1373 TYPE_LENGTH (valtype
));
1377 /* Return whether handle_inferior_event() should proceed through code
1378 starting at PC in function NAME when stepping.
1380 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1381 handle memory references that are too distant to fit in instructions
1382 generated by the compiler. For example, if 'foo' in the following
1387 is greater than 32767, the linker might replace the lwz with a branch to
1388 somewhere in @FIX1 that does the load in 2 instructions and then branches
1389 back to where execution should continue.
1391 GDB should silently step over @FIX code, just like AIX dbx does.
1392 Unfortunately, the linker uses the "b" instruction for the branches,
1393 meaning that the link register doesn't get set. Therefore, GDB's usual
1394 step_over_function() mechanism won't work.
1396 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1397 in handle_inferior_event() to skip past @FIX code. */
1400 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1402 return name
&& !strncmp (name
, "@FIX", 4);
1405 /* Skip code that the user doesn't want to see when stepping:
1407 1. Indirect function calls use a piece of trampoline code to do context
1408 switching, i.e. to set the new TOC table. Skip such code if we are on
1409 its first instruction (as when we have single-stepped to here).
1411 2. Skip shared library trampoline code (which is different from
1412 indirect function call trampolines).
1414 3. Skip bigtoc fixup code.
1416 Result is desired PC to step until, or NULL if we are not in
1417 code that should be skipped. */
1420 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1422 register unsigned int ii
, op
;
1424 CORE_ADDR solib_target_pc
;
1425 struct minimal_symbol
*msymbol
;
1427 static unsigned trampoline_code
[] =
1429 0x800b0000, /* l r0,0x0(r11) */
1430 0x90410014, /* st r2,0x14(r1) */
1431 0x7c0903a6, /* mtctr r0 */
1432 0x804b0004, /* l r2,0x4(r11) */
1433 0x816b0008, /* l r11,0x8(r11) */
1434 0x4e800420, /* bctr */
1435 0x4e800020, /* br */
1439 /* Check for bigtoc fixup code. */
1440 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1441 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, SYMBOL_NAME (msymbol
)))
1443 /* Double-check that the third instruction from PC is relative "b". */
1444 op
= read_memory_integer (pc
+ 8, 4);
1445 if ((op
& 0xfc000003) == 0x48000000)
1447 /* Extract bits 6-29 as a signed 24-bit relative word address and
1448 add it to the containing PC. */
1449 rel
= ((int)(op
<< 6) >> 6);
1450 return pc
+ 8 + rel
;
1454 /* If pc is in a shared library trampoline, return its target. */
1455 solib_target_pc
= find_solib_trampoline_target (pc
);
1456 if (solib_target_pc
)
1457 return solib_target_pc
;
1459 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1461 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1462 if (op
!= trampoline_code
[ii
])
1465 ii
= read_register (11); /* r11 holds destination addr */
1466 pc
= read_memory_addr (ii
, gdbarch_tdep (current_gdbarch
)->wordsize
); /* (r11) value */
1470 /* Determines whether the function FI has a frame on the stack or not. */
1473 rs6000_frameless_function_invocation (struct frame_info
*fi
)
1475 CORE_ADDR func_start
;
1476 struct rs6000_framedata fdata
;
1478 /* Don't even think about framelessness except on the innermost frame
1479 or if the function was interrupted by a signal. */
1480 if (get_next_frame (fi
) != NULL
1481 && !(get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1484 func_start
= get_pc_function_start (fi
->pc
);
1486 /* If we failed to find the start of the function, it is a mistake
1487 to inspect the instructions. */
1491 /* A frame with a zero PC is usually created by dereferencing a NULL
1492 function pointer, normally causing an immediate core dump of the
1493 inferior. Mark function as frameless, as the inferior has no chance
1494 of setting up a stack frame. */
1501 (void) skip_prologue (func_start
, fi
->pc
, &fdata
);
1502 return fdata
.frameless
;
1505 /* Return the PC saved in a frame. */
1508 rs6000_frame_saved_pc (struct frame_info
*fi
)
1510 CORE_ADDR func_start
;
1511 struct rs6000_framedata fdata
;
1512 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1513 int wordsize
= tdep
->wordsize
;
1515 if ((get_frame_type (fi
) == SIGTRAMP_FRAME
))
1516 return read_memory_addr (fi
->frame
+ SIG_FRAME_PC_OFFSET
, wordsize
);
1518 if (DEPRECATED_PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1519 return deprecated_read_register_dummy (fi
->pc
, fi
->frame
, PC_REGNUM
);
1521 func_start
= get_pc_function_start (fi
->pc
);
1523 /* If we failed to find the start of the function, it is a mistake
1524 to inspect the instructions. */
1528 (void) skip_prologue (func_start
, fi
->pc
, &fdata
);
1530 if (fdata
.lr_offset
== 0 && get_next_frame (fi
) != NULL
)
1532 if ((get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1533 return read_memory_addr (get_next_frame (fi
)->frame
1534 + SIG_FRAME_LR_OFFSET
,
1536 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_next_frame (fi
)->pc
, 0, 0))
1537 /* The link register wasn't saved by this frame and the next
1538 (inner, newer) frame is a dummy. Get the link register
1539 value by unwinding it from that [dummy] frame. */
1542 frame_unwind_unsigned_register (get_next_frame (fi
),
1543 tdep
->ppc_lr_regnum
, &lr
);
1547 return read_memory_addr (FRAME_CHAIN (fi
) + tdep
->lr_frame_offset
,
1551 if (fdata
.lr_offset
== 0)
1552 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1554 return read_memory_addr (FRAME_CHAIN (fi
) + fdata
.lr_offset
, wordsize
);
1557 /* If saved registers of frame FI are not known yet, read and cache them.
1558 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1559 in which case the framedata are read. */
1562 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1564 CORE_ADDR frame_addr
;
1565 struct rs6000_framedata work_fdata
;
1566 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1567 int wordsize
= tdep
->wordsize
;
1574 fdatap
= &work_fdata
;
1575 (void) skip_prologue (get_pc_function_start (fi
->pc
), fi
->pc
, fdatap
);
1578 frame_saved_regs_zalloc (fi
);
1580 /* If there were any saved registers, figure out parent's stack
1582 /* The following is true only if the frame doesn't have a call to
1585 if (fdatap
->saved_fpr
== 0
1586 && fdatap
->saved_gpr
== 0
1587 && fdatap
->saved_vr
== 0
1588 && fdatap
->saved_ev
== 0
1589 && fdatap
->lr_offset
== 0
1590 && fdatap
->cr_offset
== 0
1591 && fdatap
->vr_offset
== 0
1592 && fdatap
->ev_offset
== 0)
1595 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1596 address of the current frame. Things might be easier if the
1597 ->frame pointed to the outer-most address of the frame. In the
1598 mean time, the address of the prev frame is used as the base
1599 address of this frame. */
1600 frame_addr
= FRAME_CHAIN (fi
);
1602 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1603 All fpr's from saved_fpr to fp31 are saved. */
1605 if (fdatap
->saved_fpr
>= 0)
1608 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1609 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1611 fi
->saved_regs
[FP0_REGNUM
+ i
] = fpr_addr
;
1616 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1617 All gpr's from saved_gpr to gpr31 are saved. */
1619 if (fdatap
->saved_gpr
>= 0)
1622 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1623 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1625 fi
->saved_regs
[i
] = gpr_addr
;
1626 gpr_addr
+= wordsize
;
1630 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1631 All vr's from saved_vr to vr31 are saved. */
1632 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1634 if (fdatap
->saved_vr
>= 0)
1637 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1638 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1640 fi
->saved_regs
[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1641 vr_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1646 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1647 All vr's from saved_ev to ev31 are saved. ????? */
1648 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
1650 if (fdatap
->saved_ev
>= 0)
1653 CORE_ADDR ev_addr
= frame_addr
+ fdatap
->ev_offset
;
1654 for (i
= fdatap
->saved_ev
; i
< 32; i
++)
1656 fi
->saved_regs
[tdep
->ppc_ev0_regnum
+ i
] = ev_addr
;
1657 fi
->saved_regs
[tdep
->ppc_gp0_regnum
+ i
] = ev_addr
+ 4;
1658 ev_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_ev0_regnum
);
1663 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1665 if (fdatap
->cr_offset
!= 0)
1666 fi
->saved_regs
[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1668 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1670 if (fdatap
->lr_offset
!= 0)
1671 fi
->saved_regs
[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1673 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1675 if (fdatap
->vrsave_offset
!= 0)
1676 fi
->saved_regs
[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1679 /* Return the address of a frame. This is the inital %sp value when the frame
1680 was first allocated. For functions calling alloca(), it might be saved in
1681 an alloca register. */
1684 frame_initial_stack_address (struct frame_info
*fi
)
1687 struct rs6000_framedata fdata
;
1688 struct frame_info
*callee_fi
;
1690 /* If the initial stack pointer (frame address) of this frame is known,
1693 if (fi
->extra_info
->initial_sp
)
1694 return fi
->extra_info
->initial_sp
;
1696 /* Find out if this function is using an alloca register. */
1698 (void) skip_prologue (get_pc_function_start (fi
->pc
), fi
->pc
, &fdata
);
1700 /* If saved registers of this frame are not known yet, read and
1703 if (!fi
->saved_regs
)
1704 frame_get_saved_regs (fi
, &fdata
);
1706 /* If no alloca register used, then fi->frame is the value of the %sp for
1707 this frame, and it is good enough. */
1709 if (fdata
.alloca_reg
< 0)
1711 fi
->extra_info
->initial_sp
= fi
->frame
;
1712 return fi
->extra_info
->initial_sp
;
1715 /* There is an alloca register, use its value, in the current frame,
1716 as the initial stack pointer. */
1718 char *tmpbuf
= alloca (MAX_REGISTER_RAW_SIZE
);
1719 if (frame_register_read (fi
, fdata
.alloca_reg
, tmpbuf
))
1721 fi
->extra_info
->initial_sp
1722 = extract_unsigned_integer (tmpbuf
,
1723 REGISTER_RAW_SIZE (fdata
.alloca_reg
));
1726 /* NOTE: cagney/2002-04-17: At present the only time
1727 frame_register_read will fail is when the register isn't
1728 available. If that does happen, use the frame. */
1729 fi
->extra_info
->initial_sp
= fi
->frame
;
1731 return fi
->extra_info
->initial_sp
;
1734 /* Describe the pointer in each stack frame to the previous stack frame
1737 /* FRAME_CHAIN takes a frame's nominal address
1738 and produces the frame's chain-pointer. */
1740 /* In the case of the RS/6000, the frame's nominal address
1741 is the address of a 4-byte word containing the calling frame's address. */
1744 rs6000_frame_chain (struct frame_info
*thisframe
)
1746 CORE_ADDR fp
, fpp
, lr
;
1747 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1749 if (DEPRECATED_PC_IN_CALL_DUMMY (thisframe
->pc
, thisframe
->frame
, thisframe
->frame
))
1750 /* A dummy frame always correctly chains back to the previous
1752 return read_memory_addr ((thisframe
)->frame
, wordsize
);
1754 if (inside_entry_file (thisframe
->pc
) ||
1755 thisframe
->pc
== entry_point_address ())
1758 if ((get_frame_type (thisframe
) == SIGTRAMP_FRAME
))
1759 fp
= read_memory_addr (thisframe
->frame
+ SIG_FRAME_FP_OFFSET
,
1761 else if (get_next_frame (thisframe
) != NULL
1762 && (get_frame_type (get_next_frame (thisframe
)) == SIGTRAMP_FRAME
)
1763 && FRAMELESS_FUNCTION_INVOCATION (thisframe
))
1764 /* A frameless function interrupted by a signal did not change the
1766 fp
= get_frame_base (thisframe
);
1768 fp
= read_memory_addr ((thisframe
)->frame
, wordsize
);
1772 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1773 isn't available with that word size, return 0. */
1776 regsize (const struct reg
*reg
, int wordsize
)
1778 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1781 /* Return the name of register number N, or null if no such register exists
1782 in the current architecture. */
1785 rs6000_register_name (int n
)
1787 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1788 const struct reg
*reg
= tdep
->regs
+ n
;
1790 if (!regsize (reg
, tdep
->wordsize
))
1795 /* Index within `registers' of the first byte of the space for
1799 rs6000_register_byte (int n
)
1801 return gdbarch_tdep (current_gdbarch
)->regoff
[n
];
1804 /* Return the number of bytes of storage in the actual machine representation
1805 for register N if that register is available, else return 0. */
1808 rs6000_register_raw_size (int n
)
1810 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1811 const struct reg
*reg
= tdep
->regs
+ n
;
1812 return regsize (reg
, tdep
->wordsize
);
1815 /* Return the GDB type object for the "standard" data type
1816 of data in register N. */
1818 static struct type
*
1819 rs6000_register_virtual_type (int n
)
1821 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1822 const struct reg
*reg
= tdep
->regs
+ n
;
1825 return builtin_type_double
;
1828 int size
= regsize (reg
, tdep
->wordsize
);
1832 if (tdep
->ppc_ev0_regnum
<= n
&& n
<= tdep
->ppc_ev31_regnum
)
1833 return builtin_type_vec64
;
1835 return builtin_type_int64
;
1838 return builtin_type_vec128
;
1841 return builtin_type_int32
;
1847 /* For the PowerPC, it appears that the debug info marks float parameters as
1848 floats regardless of whether the function is prototyped, but the actual
1849 values are always passed in as doubles. Tell gdb to always assume that
1850 floats are passed as doubles and then converted in the callee. */
1853 rs6000_coerce_float_to_double (struct type
*formal
, struct type
*actual
)
1858 /* Return whether register N requires conversion when moving from raw format
1861 The register format for RS/6000 floating point registers is always
1862 double, we need a conversion if the memory format is float. */
1865 rs6000_register_convertible (int n
)
1867 const struct reg
*reg
= gdbarch_tdep (current_gdbarch
)->regs
+ n
;
1871 /* Convert data from raw format for register N in buffer FROM
1872 to virtual format with type TYPE in buffer TO. */
1875 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1876 char *from
, char *to
)
1878 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1880 double val
= extract_floating (from
, REGISTER_RAW_SIZE (n
));
1881 store_floating (to
, TYPE_LENGTH (type
), val
);
1884 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1887 /* Convert data from virtual format with type TYPE in buffer FROM
1888 to raw format for register N in buffer TO. */
1891 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1892 char *from
, char *to
)
1894 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1896 double val
= extract_floating (from
, TYPE_LENGTH (type
));
1897 store_floating (to
, REGISTER_RAW_SIZE (n
), val
);
1900 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1904 e500_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1905 int reg_nr
, void *buffer
)
1909 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1910 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1912 if (reg_nr
>= tdep
->ppc_gp0_regnum
1913 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1915 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1917 /* Build the value in the provided buffer. */
1918 /* Read the raw register of which this one is the lower portion. */
1919 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1920 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1922 memcpy ((char *) buffer
, temp_buffer
+ offset
, 4);
1927 e500_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1928 int reg_nr
, const void *buffer
)
1932 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1933 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1935 if (reg_nr
>= tdep
->ppc_gp0_regnum
1936 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1938 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1939 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1940 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1943 /* Let's read the value of the base register into a temporary
1944 buffer, so that overwriting the last four bytes with the new
1945 value of the pseudo will leave the upper 4 bytes unchanged. */
1946 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1948 /* Write as an 8 byte quantity. */
1949 memcpy (temp_buffer
+ offset
, (char *) buffer
, 4);
1950 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
1954 /* Convert a dwarf2 register number to a gdb REGNUM. */
1956 e500_dwarf2_reg_to_regnum (int num
)
1959 if (0 <= num
&& num
<= 31)
1960 return num
+ gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
;
1965 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1968 rs6000_stab_reg_to_regnum (int num
)
1974 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
1977 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
1980 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
1983 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
1992 /* Store the address of the place in which to copy the structure the
1993 subroutine will return. */
1996 rs6000_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1998 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1999 write_register (tdep
->ppc_gp0_regnum
+ 3, addr
);
2002 /* Write into appropriate registers a function return value
2003 of type TYPE, given in virtual format. */
2005 e500_store_return_value (struct type
*type
, char *valbuf
)
2007 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2009 /* Everything is returned in GPR3 and up. */
2012 int len
= TYPE_LENGTH (type
);
2013 while (copied
< len
)
2015 int regnum
= gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3 + i
;
2016 int reg_size
= REGISTER_RAW_SIZE (regnum
);
2017 char *reg_val_buf
= alloca (reg_size
);
2019 memcpy (reg_val_buf
, valbuf
+ copied
, reg_size
);
2021 deprecated_write_register_gen (regnum
, reg_val_buf
);
2027 rs6000_store_return_value (struct type
*type
, char *valbuf
)
2029 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2031 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2033 /* Floating point values are returned starting from FPR1 and up.
2034 Say a double_double_double type could be returned in
2035 FPR1/FPR2/FPR3 triple. */
2037 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
2038 TYPE_LENGTH (type
));
2039 else if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
2041 if (TYPE_LENGTH (type
) == 16
2042 && TYPE_VECTOR (type
))
2043 deprecated_write_register_bytes (REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
2044 valbuf
, TYPE_LENGTH (type
));
2047 /* Everything else is returned in GPR3 and up. */
2048 deprecated_write_register_bytes (REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
2049 valbuf
, TYPE_LENGTH (type
));
2052 /* Extract from an array REGBUF containing the (raw) register state
2053 the address in which a function should return its structure value,
2054 as a CORE_ADDR (or an expression that can be used as one). */
2057 rs6000_extract_struct_value_address (struct regcache
*regcache
)
2059 /* FIXME: cagney/2002-09-26: PR gdb/724: When making an inferior
2060 function call GDB knows the address of the struct return value
2061 and hence, should not need to call this function. Unfortunately,
2062 the current hand_function_call() code only saves the most recent
2063 struct address leading to occasional calls. The code should
2064 instead maintain a stack of such addresses (in the dummy frame
2066 /* NOTE: cagney/2002-09-26: Return 0 which indicates that we've
2067 really got no idea where the return value is being stored. While
2068 r3, on function entry, contained the address it will have since
2069 been reused (scratch) and hence wouldn't be valid */
2073 /* Return whether PC is in a dummy function call.
2075 FIXME: This just checks for the end of the stack, which is broken
2076 for things like stepping through gcc nested function stubs. */
2079 rs6000_pc_in_call_dummy (CORE_ADDR pc
, CORE_ADDR sp
, CORE_ADDR fp
)
2081 return sp
< pc
&& pc
< fp
;
2084 /* Hook called when a new child process is started. */
2087 rs6000_create_inferior (int pid
)
2089 if (rs6000_set_host_arch_hook
)
2090 rs6000_set_host_arch_hook (pid
);
2093 /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
2095 Usually a function pointer's representation is simply the address
2096 of the function. On the RS/6000 however, a function pointer is
2097 represented by a pointer to a TOC entry. This TOC entry contains
2098 three words, the first word is the address of the function, the
2099 second word is the TOC pointer (r2), and the third word is the
2100 static chain value. Throughout GDB it is currently assumed that a
2101 function pointer contains the address of the function, which is not
2102 easy to fix. In addition, the conversion of a function address to
2103 a function pointer would require allocation of a TOC entry in the
2104 inferior's memory space, with all its drawbacks. To be able to
2105 call C++ virtual methods in the inferior (which are called via
2106 function pointers), find_function_addr uses this function to get the
2107 function address from a function pointer. */
2109 /* Return real function address if ADDR (a function pointer) is in the data
2110 space and is therefore a special function pointer. */
2113 rs6000_convert_from_func_ptr_addr (CORE_ADDR addr
)
2115 struct obj_section
*s
;
2117 s
= find_pc_section (addr
);
2118 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
2121 /* ADDR is in the data space, so it's a special function pointer. */
2122 return read_memory_addr (addr
, gdbarch_tdep (current_gdbarch
)->wordsize
);
2126 /* Handling the various POWER/PowerPC variants. */
2129 /* The arrays here called registers_MUMBLE hold information about available
2132 For each family of PPC variants, I've tried to isolate out the
2133 common registers and put them up front, so that as long as you get
2134 the general family right, GDB will correctly identify the registers
2135 common to that family. The common register sets are:
2137 For the 60x family: hid0 hid1 iabr dabr pir
2139 For the 505 and 860 family: eie eid nri
2141 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
2142 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
2145 Most of these register groups aren't anything formal. I arrived at
2146 them by looking at the registers that occurred in more than one
2149 Note: kevinb/2002-04-30: Support for the fpscr register was added
2150 during April, 2002. Slot 70 is being used for PowerPC and slot 71
2151 for Power. For PowerPC, slot 70 was unused and was already in the
2152 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
2153 slot 70 was being used for "mq", so the next available slot (71)
2154 was chosen. It would have been nice to be able to make the
2155 register numbers the same across processor cores, but this wasn't
2156 possible without either 1) renumbering some registers for some
2157 processors or 2) assigning fpscr to a really high slot that's
2158 larger than any current register number. Doing (1) is bad because
2159 existing stubs would break. Doing (2) is undesirable because it
2160 would introduce a really large gap between fpscr and the rest of
2161 the registers for most processors. */
2163 /* Convenience macros for populating register arrays. */
2165 /* Within another macro, convert S to a string. */
2169 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
2170 and 64 bits on 64-bit systems. */
2171 #define R(name) { STR(name), 4, 8, 0, 0 }
2173 /* Return a struct reg defining register NAME that's 32 bits on all
2175 #define R4(name) { STR(name), 4, 4, 0, 0 }
2177 /* Return a struct reg defining register NAME that's 64 bits on all
2179 #define R8(name) { STR(name), 8, 8, 0, 0 }
2181 /* Return a struct reg defining register NAME that's 128 bits on all
2183 #define R16(name) { STR(name), 16, 16, 0, 0 }
2185 /* Return a struct reg defining floating-point register NAME. */
2186 #define F(name) { STR(name), 8, 8, 1, 0 }
2188 /* Return a struct reg defining a pseudo register NAME. */
2189 #define P(name) { STR(name), 4, 8, 0, 1}
2191 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
2192 systems and that doesn't exist on 64-bit systems. */
2193 #define R32(name) { STR(name), 4, 0, 0, 0 }
2195 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
2196 systems and that doesn't exist on 32-bit systems. */
2197 #define R64(name) { STR(name), 0, 8, 0, 0 }
2199 /* Return a struct reg placeholder for a register that doesn't exist. */
2200 #define R0 { 0, 0, 0, 0, 0 }
2202 /* UISA registers common across all architectures, including POWER. */
2204 #define COMMON_UISA_REGS \
2205 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2206 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2207 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2208 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2209 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
2210 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
2211 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
2212 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
2213 /* 64 */ R(pc), R(ps)
2215 #define COMMON_UISA_NOFP_REGS \
2216 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2217 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2218 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2219 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2220 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2221 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2222 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2223 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2224 /* 64 */ R(pc), R(ps)
2226 /* UISA-level SPRs for PowerPC. */
2227 #define PPC_UISA_SPRS \
2228 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
2230 /* UISA-level SPRs for PowerPC without floating point support. */
2231 #define PPC_UISA_NOFP_SPRS \
2232 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
2234 /* Segment registers, for PowerPC. */
2235 #define PPC_SEGMENT_REGS \
2236 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2237 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2238 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2239 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2241 /* OEA SPRs for PowerPC. */
2242 #define PPC_OEA_SPRS \
2244 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2245 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2246 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2247 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2248 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2249 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2250 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2251 /* 116 */ R4(dec), R(dabr), R4(ear)
2253 /* AltiVec registers. */
2254 #define PPC_ALTIVEC_REGS \
2255 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2256 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2257 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2258 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2259 /*151*/R4(vscr), R4(vrsave)
2261 /* Vectors of hi-lo general purpose registers. */
2262 #define PPC_EV_REGS \
2263 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
2264 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
2265 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
2266 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2268 /* Lower half of the EV registers. */
2269 #define PPC_GPRS_PSEUDO_REGS \
2270 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2271 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2272 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2273 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31), \
2275 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2276 user-level SPR's. */
2277 static const struct reg registers_power
[] =
2280 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
2284 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2285 view of the PowerPC. */
2286 static const struct reg registers_powerpc
[] =
2293 /* PowerPC UISA - a PPC processor as viewed by user-level
2294 code, but without floating point registers. */
2295 static const struct reg registers_powerpc_nofp
[] =
2297 COMMON_UISA_NOFP_REGS
,
2301 /* IBM PowerPC 403. */
2302 static const struct reg registers_403
[] =
2308 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2309 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2310 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2311 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2312 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2313 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
2316 /* IBM PowerPC 403GC. */
2317 static const struct reg registers_403GC
[] =
2323 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2324 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2325 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2326 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2327 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2328 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2329 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2330 /* 147 */ R(tbhu
), R(tblu
)
2333 /* Motorola PowerPC 505. */
2334 static const struct reg registers_505
[] =
2340 /* 119 */ R(eie
), R(eid
), R(nri
)
2343 /* Motorola PowerPC 860 or 850. */
2344 static const struct reg registers_860
[] =
2350 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2351 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2352 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2353 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2354 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2355 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2356 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2357 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2358 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2359 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2360 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2361 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2364 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2365 for reading and writing RTCU and RTCL. However, how one reads and writes a
2366 register is the stub's problem. */
2367 static const struct reg registers_601
[] =
2373 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2374 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2377 /* Motorola PowerPC 602. */
2378 static const struct reg registers_602
[] =
2384 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2385 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2386 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2389 /* Motorola/IBM PowerPC 603 or 603e. */
2390 static const struct reg registers_603
[] =
2396 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2397 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2398 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2401 /* Motorola PowerPC 604 or 604e. */
2402 static const struct reg registers_604
[] =
2408 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2409 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2410 /* 127 */ R(sia
), R(sda
)
2413 /* Motorola/IBM PowerPC 750 or 740. */
2414 static const struct reg registers_750
[] =
2420 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2421 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2422 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2423 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2424 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2425 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2429 /* Motorola PowerPC 7400. */
2430 static const struct reg registers_7400
[] =
2432 /* gpr0-gpr31, fpr0-fpr31 */
2434 /* ctr, xre, lr, cr */
2439 /* vr0-vr31, vrsave, vscr */
2441 /* FIXME? Add more registers? */
2444 /* Motorola e500. */
2445 static const struct reg registers_e500
[] =
2448 /* cr, lr, ctr, xer, "" */
2453 PPC_GPRS_PSEUDO_REGS
2456 /* Information about a particular processor variant. */
2460 /* Name of this variant. */
2463 /* English description of the variant. */
2466 /* bfd_arch_info.arch corresponding to variant. */
2467 enum bfd_architecture arch
;
2469 /* bfd_arch_info.mach corresponding to variant. */
2472 /* Number of real registers. */
2475 /* Number of pseudo registers. */
2478 /* Number of total registers (the sum of nregs and npregs). */
2481 /* Table of register names; registers[R] is the name of the register
2483 const struct reg
*regs
;
2486 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2489 num_registers (const struct reg
*reg_list
, int num_tot_regs
)
2494 for (i
= 0; i
< num_tot_regs
; i
++)
2495 if (!reg_list
[i
].pseudo
)
2502 num_pseudo_registers (const struct reg
*reg_list
, int num_tot_regs
)
2507 for (i
= 0; i
< num_tot_regs
; i
++)
2508 if (reg_list
[i
].pseudo
)
2514 /* Information in this table comes from the following web sites:
2515 IBM: http://www.chips.ibm.com:80/products/embedded/
2516 Motorola: http://www.mot.com/SPS/PowerPC/
2518 I'm sure I've got some of the variant descriptions not quite right.
2519 Please report any inaccuracies you find to GDB's maintainer.
2521 If you add entries to this table, please be sure to allow the new
2522 value as an argument to the --with-cpu flag, in configure.in. */
2524 static struct variant variants
[] =
2527 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2528 bfd_mach_ppc
, -1, -1, tot_num_registers (registers_powerpc
),
2530 {"power", "POWER user-level", bfd_arch_rs6000
,
2531 bfd_mach_rs6k
, -1, -1, tot_num_registers (registers_power
),
2533 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2534 bfd_mach_ppc_403
, -1, -1, tot_num_registers (registers_403
),
2536 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2537 bfd_mach_ppc_601
, -1, -1, tot_num_registers (registers_601
),
2539 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2540 bfd_mach_ppc_602
, -1, -1, tot_num_registers (registers_602
),
2542 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2543 bfd_mach_ppc_603
, -1, -1, tot_num_registers (registers_603
),
2545 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2546 604, -1, -1, tot_num_registers (registers_604
),
2548 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2549 bfd_mach_ppc_403gc
, -1, -1, tot_num_registers (registers_403GC
),
2551 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2552 bfd_mach_ppc_505
, -1, -1, tot_num_registers (registers_505
),
2554 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2555 bfd_mach_ppc_860
, -1, -1, tot_num_registers (registers_860
),
2557 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2558 bfd_mach_ppc_750
, -1, -1, tot_num_registers (registers_750
),
2560 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2561 bfd_mach_ppc_7400
, -1, -1, tot_num_registers (registers_7400
),
2563 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc
,
2564 bfd_mach_ppc_e500
, -1, -1, tot_num_registers (registers_e500
),
2568 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2569 bfd_mach_ppc64
, -1, -1, tot_num_registers (registers_powerpc
),
2571 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2572 bfd_mach_ppc_620
, -1, -1, tot_num_registers (registers_powerpc
),
2574 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2575 bfd_mach_ppc_630
, -1, -1, tot_num_registers (registers_powerpc
),
2577 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2578 bfd_mach_ppc_a35
, -1, -1, tot_num_registers (registers_powerpc
),
2580 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2581 bfd_mach_ppc_rs64ii
, -1, -1, tot_num_registers (registers_powerpc
),
2583 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2584 bfd_mach_ppc_rs64iii
, -1, -1, tot_num_registers (registers_powerpc
),
2587 /* FIXME: I haven't checked the register sets of the following. */
2588 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2589 bfd_mach_rs6k_rs1
, -1, -1, tot_num_registers (registers_power
),
2591 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2592 bfd_mach_rs6k_rsc
, -1, -1, tot_num_registers (registers_power
),
2594 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2595 bfd_mach_rs6k_rs2
, -1, -1, tot_num_registers (registers_power
),
2598 {0, 0, 0, 0, 0, 0, 0, 0}
2601 /* Initialize the number of registers and pseudo registers in each variant. */
2604 init_variants (void)
2608 for (v
= variants
; v
->name
; v
++)
2611 v
->nregs
= num_registers (v
->regs
, v
->num_tot_regs
);
2612 if (v
->npregs
== -1)
2613 v
->npregs
= num_pseudo_registers (v
->regs
, v
->num_tot_regs
);
2617 /* Return the variant corresponding to architecture ARCH and machine number
2618 MACH. If no such variant exists, return null. */
2620 static const struct variant
*
2621 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2623 const struct variant
*v
;
2625 for (v
= variants
; v
->name
; v
++)
2626 if (arch
== v
->arch
&& mach
== v
->mach
)
2633 gdb_print_insn_powerpc (bfd_vma memaddr
, disassemble_info
*info
)
2635 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2636 return print_insn_big_powerpc (memaddr
, info
);
2638 return print_insn_little_powerpc (memaddr
, info
);
2641 /* Initialize the current architecture based on INFO. If possible, re-use an
2642 architecture from ARCHES, which is a list of architectures already created
2643 during this debugging session.
2645 Called e.g. at program startup, when reading a core file, and when reading
2648 static struct gdbarch
*
2649 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2651 struct gdbarch
*gdbarch
;
2652 struct gdbarch_tdep
*tdep
;
2653 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2655 const struct variant
*v
;
2656 enum bfd_architecture arch
;
2660 enum gdb_osabi osabi
= GDB_OSABI_UNKNOWN
;
2663 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2664 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2666 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2667 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2669 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2672 osabi
= gdbarch_lookup_osabi (info
.abfd
);
2674 /* Check word size. If INFO is from a binary file, infer it from
2675 that, else choose a likely default. */
2676 if (from_xcoff_exec
)
2678 if (bfd_xcoff_is_xcoff64 (info
.abfd
))
2683 else if (from_elf_exec
)
2685 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2692 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2693 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2694 info
.bfd_arch_info
->bits_per_byte
;
2699 /* Find a candidate among extant architectures. */
2700 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2702 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2704 /* Word size in the various PowerPC bfd_arch_info structs isn't
2705 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2706 separate word size check. */
2707 tdep
= gdbarch_tdep (arches
->gdbarch
);
2708 if (tdep
&& tdep
->wordsize
== wordsize
&& tdep
->osabi
== osabi
)
2709 return arches
->gdbarch
;
2712 /* None found, create a new architecture from INFO, whose bfd_arch_info
2713 validity depends on the source:
2714 - executable useless
2715 - rs6000_host_arch() good
2717 - "set arch" trust blindly
2718 - GDB startup useless but harmless */
2720 if (!from_xcoff_exec
)
2722 arch
= info
.bfd_arch_info
->arch
;
2723 mach
= info
.bfd_arch_info
->mach
;
2727 arch
= bfd_arch_powerpc
;
2729 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2730 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2732 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2733 tdep
->wordsize
= wordsize
;
2734 tdep
->osabi
= osabi
;
2736 /* For e500 executables, the apuinfo section is of help here. Such
2737 section contains the identifier and revision number of each
2738 Application-specific Processing Unit that is present on the
2739 chip. The content of the section is determined by the assembler
2740 which looks at each instruction and determines which unit (and
2741 which version of it) can execute it. In our case we just look for
2742 the existance of the section. */
2746 sect
= bfd_get_section_by_name (info
.abfd
, ".PPC.EMB.apuinfo");
2749 arch
= info
.bfd_arch_info
->arch
;
2750 mach
= bfd_mach_ppc_e500
;
2751 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2752 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2756 gdbarch
= gdbarch_alloc (&info
, tdep
);
2757 power
= arch
== bfd_arch_rs6000
;
2759 /* Initialize the number of real and pseudo registers in each variant. */
2762 /* Choose variant. */
2763 v
= find_variant_by_arch (arch
, mach
);
2767 tdep
->regs
= v
->regs
;
2769 tdep
->ppc_gp0_regnum
= 0;
2770 tdep
->ppc_gplast_regnum
= 31;
2771 tdep
->ppc_toc_regnum
= 2;
2772 tdep
->ppc_ps_regnum
= 65;
2773 tdep
->ppc_cr_regnum
= 66;
2774 tdep
->ppc_lr_regnum
= 67;
2775 tdep
->ppc_ctr_regnum
= 68;
2776 tdep
->ppc_xer_regnum
= 69;
2777 if (v
->mach
== bfd_mach_ppc_601
)
2778 tdep
->ppc_mq_regnum
= 124;
2780 tdep
->ppc_mq_regnum
= 70;
2782 tdep
->ppc_mq_regnum
= -1;
2783 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2785 set_gdbarch_pc_regnum (gdbarch
, 64);
2786 set_gdbarch_sp_regnum (gdbarch
, 1);
2787 set_gdbarch_fp_regnum (gdbarch
, 1);
2788 set_gdbarch_deprecated_extract_return_value (gdbarch
,
2789 rs6000_extract_return_value
);
2790 set_gdbarch_deprecated_store_return_value (gdbarch
, rs6000_store_return_value
);
2792 if (v
->arch
== bfd_arch_powerpc
)
2796 tdep
->ppc_vr0_regnum
= 71;
2797 tdep
->ppc_vrsave_regnum
= 104;
2798 tdep
->ppc_ev0_regnum
= -1;
2799 tdep
->ppc_ev31_regnum
= -1;
2801 case bfd_mach_ppc_7400
:
2802 tdep
->ppc_vr0_regnum
= 119;
2803 tdep
->ppc_vrsave_regnum
= 152;
2804 tdep
->ppc_ev0_regnum
= -1;
2805 tdep
->ppc_ev31_regnum
= -1;
2807 case bfd_mach_ppc_e500
:
2808 tdep
->ppc_gp0_regnum
= 39;
2809 tdep
->ppc_gplast_regnum
= 70;
2810 tdep
->ppc_toc_regnum
= -1;
2811 tdep
->ppc_ps_regnum
= 1;
2812 tdep
->ppc_cr_regnum
= 2;
2813 tdep
->ppc_lr_regnum
= 3;
2814 tdep
->ppc_ctr_regnum
= 4;
2815 tdep
->ppc_xer_regnum
= 5;
2816 tdep
->ppc_ev0_regnum
= 7;
2817 tdep
->ppc_ev31_regnum
= 38;
2818 set_gdbarch_pc_regnum (gdbarch
, 0);
2819 set_gdbarch_sp_regnum (gdbarch
, 40);
2820 set_gdbarch_fp_regnum (gdbarch
, 40);
2821 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, e500_dwarf2_reg_to_regnum
);
2822 set_gdbarch_pseudo_register_read (gdbarch
, e500_pseudo_register_read
);
2823 set_gdbarch_pseudo_register_write (gdbarch
, e500_pseudo_register_write
);
2824 set_gdbarch_extract_return_value (gdbarch
, e500_extract_return_value
);
2825 set_gdbarch_deprecated_store_return_value (gdbarch
, e500_store_return_value
);
2828 tdep
->ppc_vr0_regnum
= -1;
2829 tdep
->ppc_vrsave_regnum
= -1;
2830 tdep
->ppc_ev0_regnum
= -1;
2831 tdep
->ppc_ev31_regnum
= -1;
2835 /* Set lr_frame_offset. */
2837 tdep
->lr_frame_offset
= 16;
2839 tdep
->lr_frame_offset
= 4;
2841 tdep
->lr_frame_offset
= 8;
2843 /* Calculate byte offsets in raw register array. */
2844 tdep
->regoff
= xmalloc (v
->num_tot_regs
* sizeof (int));
2845 for (i
= off
= 0; i
< v
->num_tot_regs
; i
++)
2847 tdep
->regoff
[i
] = off
;
2848 off
+= regsize (v
->regs
+ i
, wordsize
);
2851 /* Select instruction printer. */
2853 set_gdbarch_print_insn (gdbarch
, print_insn_rs6000
);
2855 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_powerpc
);
2857 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
2858 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2859 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
2860 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2861 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
2863 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2864 set_gdbarch_num_pseudo_regs (gdbarch
, v
->npregs
);
2865 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2866 set_gdbarch_register_size (gdbarch
, wordsize
);
2867 set_gdbarch_register_bytes (gdbarch
, off
);
2868 set_gdbarch_register_byte (gdbarch
, rs6000_register_byte
);
2869 set_gdbarch_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2870 set_gdbarch_max_register_raw_size (gdbarch
, 16);
2871 set_gdbarch_register_virtual_size (gdbarch
, generic_register_size
);
2872 set_gdbarch_max_register_virtual_size (gdbarch
, 16);
2873 set_gdbarch_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2875 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2876 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2877 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2878 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2879 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2880 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2881 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2882 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2883 set_gdbarch_char_signed (gdbarch
, 0);
2885 set_gdbarch_call_dummy_length (gdbarch
, 0);
2886 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2887 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
2888 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2889 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2890 set_gdbarch_call_dummy_p (gdbarch
, 1);
2891 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2892 set_gdbarch_fix_call_dummy (gdbarch
, rs6000_fix_call_dummy
);
2893 set_gdbarch_frame_align (gdbarch
, rs6000_frame_align
);
2894 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
2895 set_gdbarch_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2896 set_gdbarch_push_return_address (gdbarch
, ppc_push_return_address
);
2897 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2898 set_gdbarch_coerce_float_to_double (gdbarch
, rs6000_coerce_float_to_double
);
2900 set_gdbarch_register_convertible (gdbarch
, rs6000_register_convertible
);
2901 set_gdbarch_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2902 set_gdbarch_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2903 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2904 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2905 is correct for the SysV ABI when the wordsize is 8, but I'm also
2906 fairly certain that ppc_sysv_abi_push_arguments() will give even
2907 worse results since it only works for 32-bit code. So, for the moment,
2908 we're better off calling rs6000_push_arguments() since it works for
2909 64-bit code. At some point in the future, this matter needs to be
2911 if (sysv_abi
&& wordsize
== 4)
2912 set_gdbarch_push_arguments (gdbarch
, ppc_sysv_abi_push_arguments
);
2914 set_gdbarch_push_arguments (gdbarch
, rs6000_push_arguments
);
2916 set_gdbarch_store_struct_return (gdbarch
, rs6000_store_struct_return
);
2917 set_gdbarch_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2918 set_gdbarch_pop_frame (gdbarch
, rs6000_pop_frame
);
2920 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2921 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2922 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2923 set_gdbarch_function_start_offset (gdbarch
, 0);
2924 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2926 /* Not sure on this. FIXMEmgo */
2927 set_gdbarch_frame_args_skip (gdbarch
, 8);
2930 set_gdbarch_use_struct_convention (gdbarch
,
2931 ppc_sysv_abi_use_struct_convention
);
2933 set_gdbarch_use_struct_convention (gdbarch
,
2934 generic_use_struct_convention
);
2936 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
2938 set_gdbarch_frameless_function_invocation (gdbarch
,
2939 rs6000_frameless_function_invocation
);
2940 set_gdbarch_frame_chain (gdbarch
, rs6000_frame_chain
);
2941 set_gdbarch_frame_saved_pc (gdbarch
, rs6000_frame_saved_pc
);
2943 set_gdbarch_frame_init_saved_regs (gdbarch
, rs6000_frame_init_saved_regs
);
2944 set_gdbarch_init_extra_frame_info (gdbarch
, rs6000_init_extra_frame_info
);
2948 /* Handle RS/6000 function pointers (which are really function
2950 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2951 rs6000_convert_from_func_ptr_addr
);
2953 set_gdbarch_frame_args_address (gdbarch
, rs6000_frame_args_address
);
2954 set_gdbarch_frame_locals_address (gdbarch
, rs6000_frame_args_address
);
2955 set_gdbarch_saved_pc_after_call (gdbarch
, rs6000_saved_pc_after_call
);
2957 /* We can't tell how many args there are
2958 now that the C compiler delays popping them. */
2959 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
2961 /* Hook in ABI-specific overrides, if they have been registered. */
2962 gdbarch_init_osabi (info
, gdbarch
, osabi
);
2968 rs6000_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2970 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2975 fprintf_unfiltered (file
, "rs6000_dump_tdep: OS ABI = %s\n",
2976 gdbarch_osabi_name (tdep
->osabi
));
2979 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
2982 rs6000_info_powerpc_command (char *args
, int from_tty
)
2984 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
2987 /* Initialization code. */
2990 _initialize_rs6000_tdep (void)
2992 gdbarch_register (bfd_arch_rs6000
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2993 gdbarch_register (bfd_arch_powerpc
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2995 /* Add root prefix command for "info powerpc" commands */
2996 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
2997 "Various POWERPC info specific commands.",
2998 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);