1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
31 #include "xcoffsolib.h"
32 #include "arch-utils.h"
34 #include "bfd/libbfd.h" /* for bfd_default_set_arch_mach */
35 #include "coff/internal.h" /* for libcoff.h */
36 #include "bfd/libcoff.h" /* for xcoff_data */
38 /* Some important register numbers. Keep these in the same order as in
39 /usr/mstsave.h `mstsave' structure, for easier processing. */
41 #define GP0_REGNUM 0 /* GPR register 0 */
42 #define TOC_REGNUM 2 /* TOC register */
43 #define PS_REGNUM 65 /* Processor (or machine) status (%msr) */
44 #define CR_REGNUM 66 /* Condition register */
45 #define LR_REGNUM 67 /* Link register */
46 #define CTR_REGNUM 68 /* Count register */
48 /* If the kernel has to deliver a signal, it pushes a sigcontext
49 structure on the stack and then calls the signal handler, passing
50 the address of the sigcontext in an argument register. Usually
51 the signal handler doesn't save this register, so we have to
52 access the sigcontext structure via an offset from the signal handler
54 The following constants were determined by experimentation on AIX 3.2. */
55 #define SIG_FRAME_PC_OFFSET 96
56 #define SIG_FRAME_LR_OFFSET 108
57 #define SIG_FRAME_FP_OFFSET 284
59 /* To be used by skip_prologue. */
61 struct rs6000_framedata
63 int offset
; /* total size of frame --- the distance
64 by which we decrement sp to allocate
66 int saved_gpr
; /* smallest # of saved gpr */
67 int saved_fpr
; /* smallest # of saved fpr */
68 int alloca_reg
; /* alloca register number (frame ptr) */
69 char frameless
; /* true if frameless functions. */
70 char nosavedpc
; /* true if pc not saved. */
71 int gpr_offset
; /* offset of saved gprs from prev sp */
72 int fpr_offset
; /* offset of saved fprs from prev sp */
73 int lr_offset
; /* offset of saved lr */
74 int cr_offset
; /* offset of saved cr */
77 /* Description of a single register. */
81 char *name
; /* name of register */
82 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
83 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
84 unsigned char fpr
; /* whether register is floating-point */
87 /* Private data that this module attaches to struct gdbarch. */
91 int wordsize
; /* size in bytes of fixed-point word */
92 int *regoff
; /* byte offsets in register arrays */
93 const struct reg
*regs
; /* from current variant */
96 /* Return the current architecture's gdbarch_tdep structure. */
98 #define TDEP gdbarch_tdep (current_gdbarch)
100 /* Breakpoint shadows for the single step instructions will be kept here. */
102 static struct sstep_breaks
104 /* Address, or 0 if this is not in use. */
106 /* Shadow contents. */
111 /* Hook for determining the TOC address when calling functions in the
112 inferior under AIX. The initialization code in rs6000-nat.c sets
113 this hook to point to find_toc_address. */
115 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
117 /* Hook to set the current architecture when starting a child process.
118 rs6000-nat.c sets this. */
120 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
122 /* Static function prototypes */
124 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
126 static CORE_ADDR
skip_prologue (CORE_ADDR
, struct rs6000_framedata
*);
127 static void frame_get_saved_regs (struct frame_info
* fi
,
128 struct rs6000_framedata
* fdatap
);
129 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
131 /* Read a LEN-byte address from debugged memory address MEMADDR. */
134 read_memory_addr (CORE_ADDR memaddr
, int len
)
136 return read_memory_unsigned_integer (memaddr
, len
);
140 rs6000_skip_prologue (CORE_ADDR pc
)
142 struct rs6000_framedata frame
;
143 pc
= skip_prologue (pc
, &frame
);
148 /* Fill in fi->saved_regs */
150 struct frame_extra_info
152 /* Functions calling alloca() change the value of the stack
153 pointer. We need to use initial stack pointer (which is saved in
154 r31 by gcc) in such cases. If a compiler emits traceback table,
155 then we should use the alloca register specified in traceback
157 CORE_ADDR initial_sp
; /* initial stack pointer. */
161 rs6000_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
163 fi
->extra_info
= (struct frame_extra_info
*)
164 frame_obstack_alloc (sizeof (struct frame_extra_info
));
165 fi
->extra_info
->initial_sp
= 0;
166 if (fi
->next
!= (CORE_ADDR
) 0
167 && fi
->pc
< TEXT_SEGMENT_BASE
)
168 /* We're in get_prev_frame */
169 /* and this is a special signal frame. */
170 /* (fi->pc will be some low address in the kernel, */
171 /* to which the signal handler returns). */
172 fi
->signal_handler_caller
= 1;
175 /* Put here the code to store, into a struct frame_saved_regs,
176 the addresses of the saved registers of frame described by FRAME_INFO.
177 This includes special registers such as pc and fp saved in special
178 ways in the stack frame. sp is even more special:
179 the address we return for it IS the sp for the next frame. */
181 /* In this implementation for RS/6000, we do *not* save sp. I am
182 not sure if it will be needed. The following function takes care of gpr's
186 rs6000_frame_init_saved_regs (struct frame_info
*fi
)
188 frame_get_saved_regs (fi
, NULL
);
192 rs6000_frame_args_address (struct frame_info
*fi
)
194 if (fi
->extra_info
->initial_sp
!= 0)
195 return fi
->extra_info
->initial_sp
;
197 return frame_initial_stack_address (fi
);
200 /* Immediately after a function call, return the saved pc.
201 Can't go through the frames for this because on some machines
202 the new frame is not set up until the new function executes
203 some instructions. */
206 rs6000_saved_pc_after_call (struct frame_info
*fi
)
208 return read_register (LR_REGNUM
);
211 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
214 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
221 absolute
= (int) ((instr
>> 1) & 1);
226 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
230 dest
= pc
+ immediate
;
234 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
238 dest
= pc
+ immediate
;
242 ext_op
= (instr
>> 1) & 0x3ff;
244 if (ext_op
== 16) /* br conditional register */
246 dest
= read_register (LR_REGNUM
) & ~3;
248 /* If we are about to return from a signal handler, dest is
249 something like 0x3c90. The current frame is a signal handler
250 caller frame, upon completion of the sigreturn system call
251 execution will return to the saved PC in the frame. */
252 if (dest
< TEXT_SEGMENT_BASE
)
254 struct frame_info
*fi
;
256 fi
= get_current_frame ();
258 dest
= read_memory_addr (fi
->frame
+ SIG_FRAME_PC_OFFSET
,
263 else if (ext_op
== 528) /* br cond to count reg */
265 dest
= read_register (CTR_REGNUM
) & ~3;
267 /* If we are about to execute a system call, dest is something
268 like 0x22fc or 0x3b00. Upon completion the system call
269 will return to the address in the link register. */
270 if (dest
< TEXT_SEGMENT_BASE
)
271 dest
= read_register (LR_REGNUM
) & ~3;
280 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
284 /* Sequence of bytes for breakpoint instruction. */
286 #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
287 #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
289 static unsigned char *
290 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
292 static unsigned char big_breakpoint
[] = BIG_BREAKPOINT
;
293 static unsigned char little_breakpoint
[] = LITTLE_BREAKPOINT
;
295 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
296 return big_breakpoint
;
298 return little_breakpoint
;
302 /* AIX does not support PT_STEP. Simulate it. */
305 rs6000_software_single_step (unsigned int signal
, int insert_breakpoints_p
)
307 #define INSNLEN(OPCODE) 4
309 static char le_breakp
[] = LITTLE_BREAKPOINT
;
310 static char be_breakp
[] = BIG_BREAKPOINT
;
311 char *breakp
= TARGET_BYTE_ORDER
== BIG_ENDIAN
? be_breakp
: le_breakp
;
317 if (insert_breakpoints_p
)
322 insn
= read_memory_integer (loc
, 4);
324 breaks
[0] = loc
+ INSNLEN (insn
);
326 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
328 /* Don't put two breakpoints on the same address. */
329 if (breaks
[1] == breaks
[0])
332 stepBreaks
[1].address
= 0;
334 for (ii
= 0; ii
< 2; ++ii
)
337 /* ignore invalid breakpoint. */
338 if (breaks
[ii
] == -1)
341 read_memory (breaks
[ii
], stepBreaks
[ii
].data
, 4);
343 write_memory (breaks
[ii
], breakp
, 4);
344 stepBreaks
[ii
].address
= breaks
[ii
];
351 /* remove step breakpoints. */
352 for (ii
= 0; ii
< 2; ++ii
)
353 if (stepBreaks
[ii
].address
!= 0)
355 (stepBreaks
[ii
].address
, stepBreaks
[ii
].data
, 4);
358 errno
= 0; /* FIXME, don't ignore errors! */
359 /* What errors? {read,write}_memory call error(). */
363 /* return pc value after skipping a function prologue and also return
364 information about a function frame.
366 in struct rs6000_framedata fdata:
367 - frameless is TRUE, if function does not have a frame.
368 - nosavedpc is TRUE, if function does not save %pc value in its frame.
369 - offset is the initial size of this stack frame --- the amount by
370 which we decrement the sp to allocate the frame.
371 - saved_gpr is the number of the first saved gpr.
372 - saved_fpr is the number of the first saved fpr.
373 - alloca_reg is the number of the register used for alloca() handling.
375 - gpr_offset is the offset of the first saved gpr from the previous frame.
376 - fpr_offset is the offset of the first saved fpr from the previous frame.
377 - lr_offset is the offset of the saved lr
378 - cr_offset is the offset of the saved cr
381 #define SIGNED_SHORT(x) \
382 ((sizeof (short) == 2) \
383 ? ((int)(short)(x)) \
384 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
386 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
389 skip_prologue (CORE_ADDR pc
, struct rs6000_framedata
*fdata
)
391 CORE_ADDR orig_pc
= pc
;
392 CORE_ADDR last_prologue_pc
;
400 int minimal_toc_loaded
= 0;
401 int prev_insn_was_prologue_insn
= 1;
403 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
404 fdata
->saved_gpr
= -1;
405 fdata
->saved_fpr
= -1;
406 fdata
->alloca_reg
= -1;
407 fdata
->frameless
= 1;
408 fdata
->nosavedpc
= 1;
415 /* Sometimes it isn't clear if an instruction is a prologue
416 instruction or not. When we encounter one of these ambiguous
417 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
418 Otherwise, we'll assume that it really is a prologue instruction. */
419 if (prev_insn_was_prologue_insn
)
420 last_prologue_pc
= pc
;
421 prev_insn_was_prologue_insn
= 1;
423 if (target_read_memory (pc
, buf
, 4))
425 op
= extract_signed_integer (buf
, 4);
427 if ((op
& 0xfc1fffff) == 0x7c0802a6)
429 lr_reg
= (op
& 0x03e00000) | 0x90010000;
433 else if ((op
& 0xfc1fffff) == 0x7c000026)
435 cr_reg
= (op
& 0x03e00000) | 0x90010000;
439 else if ((op
& 0xfc1f0000) == 0xd8010000)
440 { /* stfd Rx,NUM(r1) */
441 reg
= GET_SRC_REG (op
);
442 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
444 fdata
->saved_fpr
= reg
;
445 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
450 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
451 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
452 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
453 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
456 reg
= GET_SRC_REG (op
);
457 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
459 fdata
->saved_gpr
= reg
;
460 if ((op
& 0xfc1f0003) == 0xf8010000)
462 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
467 else if ((op
& 0xffff0000) == 0x60000000)
470 /* Allow nops in the prologue, but do not consider them to
471 be part of the prologue unless followed by other prologue
473 prev_insn_was_prologue_insn
= 0;
477 else if ((op
& 0xffff0000) == 0x3c000000)
478 { /* addis 0,0,NUM, used
480 fdata
->offset
= (op
& 0x0000ffff) << 16;
481 fdata
->frameless
= 0;
485 else if ((op
& 0xffff0000) == 0x60000000)
486 { /* ori 0,0,NUM, 2nd ha
487 lf of >= 32k frames */
488 fdata
->offset
|= (op
& 0x0000ffff);
489 fdata
->frameless
= 0;
493 else if (lr_reg
!= -1 && (op
& 0xffff0000) == lr_reg
)
496 fdata
->lr_offset
= SIGNED_SHORT (op
) + offset
;
497 fdata
->nosavedpc
= 0;
502 else if (cr_reg
!= -1 && (op
& 0xffff0000) == cr_reg
)
505 fdata
->cr_offset
= SIGNED_SHORT (op
) + offset
;
510 else if (op
== 0x48000005)
516 else if (op
== 0x48000004)
521 else if (((op
& 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used
522 in V.4 -mrelocatable */
523 op
== 0x7fc0f214) && /* add r30,r0,r30, used
524 in V.4 -mrelocatable */
525 lr_reg
== 0x901e0000)
530 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
531 in V.4 -mminimal-toc */
532 (op
& 0xffff0000) == 0x3bde0000)
533 { /* addi 30,30,foo@l */
537 else if ((op
& 0xfc000001) == 0x48000001)
541 fdata
->frameless
= 0;
542 /* Don't skip over the subroutine call if it is not within the first
543 three instructions of the prologue. */
544 if ((pc
- orig_pc
) > 8)
547 op
= read_memory_integer (pc
+ 4, 4);
549 /* At this point, make sure this is not a trampoline function
550 (a function that simply calls another functions, and nothing else).
551 If the next is not a nop, this branch was part of the function
554 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
555 break; /* don't skip over
559 /* update stack pointer */
561 else if ((op
& 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
562 (op
& 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
564 fdata
->frameless
= 0;
565 if ((op
& 0xffff0003) == 0xf8210001)
567 fdata
->offset
= SIGNED_SHORT (op
);
568 offset
= fdata
->offset
;
572 else if (op
== 0x7c21016e)
574 fdata
->frameless
= 0;
575 offset
= fdata
->offset
;
578 /* Load up minimal toc pointer */
580 else if ((op
>> 22) == 0x20f
581 && !minimal_toc_loaded
)
582 { /* l r31,... or l r30,... */
583 minimal_toc_loaded
= 1;
586 /* move parameters from argument registers to local variable
589 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
590 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
591 (((op
>> 21) & 31) <= 10) &&
592 (((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
596 /* store parameters in stack */
598 else if ((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
599 (op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
600 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
601 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
605 /* store parameters in stack via frame pointer */
608 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
609 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
610 (op
& 0xfc1f0000) == 0xfc1f0000))
611 { /* frsp, fp?,NUM(r1) */
614 /* Set up frame pointer */
616 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
619 fdata
->frameless
= 0;
621 fdata
->alloca_reg
= 31;
624 /* Another way to set up the frame pointer. */
626 else if ((op
& 0xfc1fffff) == 0x38010000)
627 { /* addi rX, r1, 0x0 */
628 fdata
->frameless
= 0;
630 fdata
->alloca_reg
= (op
& ~0x38010000) >> 21;
641 /* I have problems with skipping over __main() that I need to address
642 * sometime. Previously, I used to use misc_function_vector which
643 * didn't work as well as I wanted to be. -MGO */
645 /* If the first thing after skipping a prolog is a branch to a function,
646 this might be a call to an initializer in main(), introduced by gcc2.
647 We'd like to skip over it as well. Fortunately, xlc does some extra
648 work before calling a function right after a prologue, thus we can
649 single out such gcc2 behaviour. */
652 if ((op
& 0xfc000001) == 0x48000001)
653 { /* bl foo, an initializer function? */
654 op
= read_memory_integer (pc
+ 4, 4);
656 if (op
== 0x4def7b82)
657 { /* cror 0xf, 0xf, 0xf (nop) */
659 /* check and see if we are in main. If so, skip over this initializer
662 tmp
= find_pc_misc_function (pc
);
663 if (tmp
>= 0 && STREQ (misc_function_vector
[tmp
].name
, "main"))
669 fdata
->offset
= -fdata
->offset
;
670 return last_prologue_pc
;
674 /*************************************************************************
675 Support for creating pushing a dummy frame into the stack, and popping
677 *************************************************************************/
679 extern int stop_stack_dummy
;
682 /* Pop the innermost frame, go back to the caller. */
685 rs6000_pop_frame (void)
687 CORE_ADDR pc
, lr
, sp
, prev_sp
, addr
; /* %pc, %lr, %sp */
688 struct rs6000_framedata fdata
;
689 struct frame_info
*frame
= get_current_frame ();
693 sp
= FRAME_FP (frame
);
695 if (stop_stack_dummy
)
697 generic_pop_dummy_frame ();
698 flush_cached_frames ();
702 /* Make sure that all registers are valid. */
703 read_register_bytes (0, NULL
, REGISTER_BYTES
);
705 /* figure out previous %pc value. If the function is frameless, it is
706 still in the link register, otherwise walk the frames and retrieve the
707 saved %pc value in the previous frame. */
709 addr
= get_pc_function_start (frame
->pc
);
710 (void) skip_prologue (addr
, &fdata
);
712 wordsize
= TDEP
->wordsize
;
716 prev_sp
= read_memory_addr (sp
, wordsize
);
717 if (fdata
.lr_offset
== 0)
718 lr
= read_register (LR_REGNUM
);
720 lr
= read_memory_addr (prev_sp
+ fdata
.lr_offset
, wordsize
);
722 /* reset %pc value. */
723 write_register (PC_REGNUM
, lr
);
725 /* reset register values if any was saved earlier. */
727 if (fdata
.saved_gpr
!= -1)
729 addr
= prev_sp
+ fdata
.gpr_offset
;
730 for (ii
= fdata
.saved_gpr
; ii
<= 31; ++ii
)
732 read_memory (addr
, ®isters
[REGISTER_BYTE (ii
)], wordsize
);
737 if (fdata
.saved_fpr
!= -1)
739 addr
= prev_sp
+ fdata
.fpr_offset
;
740 for (ii
= fdata
.saved_fpr
; ii
<= 31; ++ii
)
742 read_memory (addr
, ®isters
[REGISTER_BYTE (ii
+ FP0_REGNUM
)], 8);
747 write_register (SP_REGNUM
, prev_sp
);
748 target_store_registers (-1);
749 flush_cached_frames ();
752 /* Fixup the call sequence of a dummy function, with the real function
753 address. Its arguments will be passed by gdb. */
756 rs6000_fix_call_dummy (char *dummyname
, CORE_ADDR pc
, CORE_ADDR fun
,
757 int nargs
, value_ptr
*args
, struct type
*type
,
760 #define TOC_ADDR_OFFSET 20
761 #define TARGET_ADDR_OFFSET 28
764 CORE_ADDR target_addr
;
766 if (rs6000_find_toc_address_hook
!= NULL
)
768 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (fun
);
769 write_register (TOC_REGNUM
, tocvalue
);
773 /* Pass the arguments in either registers, or in the stack. In RS/6000,
774 the first eight words of the argument list (that might be less than
775 eight parameters if some parameters occupy more than one word) are
776 passed in r3..r10 registers. float and double parameters are
777 passed in fpr's, in addition to that. Rest of the parameters if any
778 are passed in user stack. There might be cases in which half of the
779 parameter is copied into registers, the other half is pushed into
782 Stack must be aligned on 64-bit boundaries when synthesizing
785 If the function is returning a structure, then the return address is passed
786 in r3, then the first 7 words of the parameters can be passed in registers,
790 rs6000_push_arguments (int nargs
, value_ptr
*args
, CORE_ADDR sp
,
791 int struct_return
, CORE_ADDR struct_addr
)
795 int argno
; /* current argument number */
796 int argbytes
; /* current argument byte */
798 int f_argno
= 0; /* current floating point argno */
799 int wordsize
= TDEP
->wordsize
;
806 /* The first eight words of ther arguments are passed in registers. Copy
809 If the function is returning a `struct', then the first word (which
810 will be passed in r3) is used for struct return address. In that
811 case we should advance one word and start from r4 register to copy
814 ii
= struct_return
? 1 : 0;
817 effectively indirect call... gcc does...
819 return_val example( float, int);
822 float in fp0, int in r3
823 offset of stack on overflow 8/16
824 for varargs, must go by type.
826 float in r3&r4, int in r5
827 offset of stack on overflow different
829 return in r3 or f0. If no float, must study how gcc emulates floats;
830 pay attention to arg promotion.
831 User may have to cast\args to handle promotion correctly
832 since gdb won't know if prototype supplied or not.
835 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
837 int reg_size
= REGISTER_RAW_SIZE (ii
+ 3);
840 type
= check_typedef (VALUE_TYPE (arg
));
841 len
= TYPE_LENGTH (type
);
843 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
846 /* floating point arguments are passed in fpr's, as well as gpr's.
847 There are 13 fpr's reserved for passing parameters. At this point
848 there is no way we would run out of them. */
852 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
854 memcpy (®isters
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
855 VALUE_CONTENTS (arg
),
863 /* Argument takes more than one register. */
864 while (argbytes
< len
)
866 memset (®isters
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
867 memcpy (®isters
[REGISTER_BYTE (ii
+ 3)],
868 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
869 (len
- argbytes
) > reg_size
870 ? reg_size
: len
- argbytes
);
871 ++ii
, argbytes
+= reg_size
;
874 goto ran_out_of_registers_for_arguments
;
880 { /* Argument can fit in one register. No problem. */
881 int adj
= TARGET_BYTE_ORDER
== BIG_ENDIAN
? reg_size
- len
: 0;
882 memset (®isters
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
883 memcpy ((char *)®isters
[REGISTER_BYTE (ii
+ 3)] + adj
,
884 VALUE_CONTENTS (arg
), len
);
889 ran_out_of_registers_for_arguments
:
891 saved_sp
= read_sp ();
892 #ifndef ELF_OBJECT_FORMAT
893 /* location for 8 parameters are always reserved. */
896 /* another six words for back chain, TOC register, link register, etc. */
899 /* stack pointer must be quadword aligned */
903 /* if there are more arguments, allocate space for them in
904 the stack, then push them starting from the ninth one. */
906 if ((argno
< nargs
) || argbytes
)
912 space
+= ((len
- argbytes
+ 3) & -4);
918 for (; jj
< nargs
; ++jj
)
920 value_ptr val
= args
[jj
];
921 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
924 /* add location required for the rest of the parameters */
925 space
= (space
+ 15) & -16;
928 /* This is another instance we need to be concerned about securing our
929 stack space. If we write anything underneath %sp (r1), we might conflict
930 with the kernel who thinks he is free to use this area. So, update %sp
931 first before doing anything else. */
933 write_register (SP_REGNUM
, sp
);
935 /* if the last argument copied into the registers didn't fit there
936 completely, push the rest of it into stack. */
940 write_memory (sp
+ 24 + (ii
* 4),
941 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
944 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
947 /* push the rest of the arguments into stack. */
948 for (; argno
< nargs
; ++argno
)
952 type
= check_typedef (VALUE_TYPE (arg
));
953 len
= TYPE_LENGTH (type
);
956 /* float types should be passed in fpr's, as well as in the stack. */
957 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
962 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
964 memcpy (®isters
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
965 VALUE_CONTENTS (arg
),
970 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
971 ii
+= ((len
+ 3) & -4) / 4;
975 /* Secure stack areas first, before doing anything else. */
976 write_register (SP_REGNUM
, sp
);
978 /* set back chain properly */
979 store_address (tmp_buffer
, 4, saved_sp
);
980 write_memory (sp
, tmp_buffer
, 4);
982 target_store_registers (-1);
986 /* Function: ppc_push_return_address (pc, sp)
987 Set up the return address for the inferior function call. */
990 ppc_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
992 write_register (LR_REGNUM
, CALL_DUMMY_ADDRESS ());
996 /* Extract a function return value of type TYPE from raw register array
997 REGBUF, and copy that return value into VALBUF in virtual format. */
1000 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1004 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1009 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1010 We need to truncate the return value into float size (4 byte) if
1013 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1015 ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)],
1016 TYPE_LENGTH (valtype
));
1019 memcpy (&dd
, ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1021 memcpy (valbuf
, &ff
, sizeof (float));
1026 /* return value is copied starting from r3. */
1027 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
1028 && TYPE_LENGTH (valtype
) < REGISTER_RAW_SIZE (3))
1029 offset
= REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1032 regbuf
+ REGISTER_BYTE (3) + offset
,
1033 TYPE_LENGTH (valtype
));
1037 /* Keep structure return address in this variable.
1038 FIXME: This is a horrid kludge which should not be allowed to continue
1039 living. This only allows a single nested call to a structure-returning
1040 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
1042 static CORE_ADDR rs6000_struct_return_address
;
1044 /* Indirect function calls use a piece of trampoline code to do context
1045 switching, i.e. to set the new TOC table. Skip such code if we are on
1046 its first instruction (as when we have single-stepped to here).
1047 Also skip shared library trampoline code (which is different from
1048 indirect function call trampolines).
1049 Result is desired PC to step until, or NULL if we are not in
1053 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1055 register unsigned int ii
, op
;
1056 CORE_ADDR solib_target_pc
;
1058 static unsigned trampoline_code
[] =
1060 0x800b0000, /* l r0,0x0(r11) */
1061 0x90410014, /* st r2,0x14(r1) */
1062 0x7c0903a6, /* mtctr r0 */
1063 0x804b0004, /* l r2,0x4(r11) */
1064 0x816b0008, /* l r11,0x8(r11) */
1065 0x4e800420, /* bctr */
1066 0x4e800020, /* br */
1070 /* If pc is in a shared library trampoline, return its target. */
1071 solib_target_pc
= find_solib_trampoline_target (pc
);
1072 if (solib_target_pc
)
1073 return solib_target_pc
;
1075 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1077 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1078 if (op
!= trampoline_code
[ii
])
1081 ii
= read_register (11); /* r11 holds destination addr */
1082 pc
= read_memory_addr (ii
, TDEP
->wordsize
); /* (r11) value */
1086 /* Determines whether the function FI has a frame on the stack or not. */
1089 rs6000_frameless_function_invocation (struct frame_info
*fi
)
1091 CORE_ADDR func_start
;
1092 struct rs6000_framedata fdata
;
1094 /* Don't even think about framelessness except on the innermost frame
1095 or if the function was interrupted by a signal. */
1096 if (fi
->next
!= NULL
&& !fi
->next
->signal_handler_caller
)
1099 func_start
= get_pc_function_start (fi
->pc
);
1101 /* If we failed to find the start of the function, it is a mistake
1102 to inspect the instructions. */
1106 /* A frame with a zero PC is usually created by dereferencing a NULL
1107 function pointer, normally causing an immediate core dump of the
1108 inferior. Mark function as frameless, as the inferior has no chance
1109 of setting up a stack frame. */
1116 (void) skip_prologue (func_start
, &fdata
);
1117 return fdata
.frameless
;
1120 /* Return the PC saved in a frame */
1123 rs6000_frame_saved_pc (struct frame_info
*fi
)
1125 CORE_ADDR func_start
;
1126 struct rs6000_framedata fdata
;
1127 int wordsize
= TDEP
->wordsize
;
1129 if (fi
->signal_handler_caller
)
1130 return read_memory_addr (fi
->frame
+ SIG_FRAME_PC_OFFSET
, wordsize
);
1132 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1133 return generic_read_register_dummy (fi
->pc
, fi
->frame
, PC_REGNUM
);
1135 func_start
= get_pc_function_start (fi
->pc
);
1137 /* If we failed to find the start of the function, it is a mistake
1138 to inspect the instructions. */
1142 (void) skip_prologue (func_start
, &fdata
);
1144 if (fdata
.lr_offset
== 0 && fi
->next
!= NULL
)
1146 if (fi
->next
->signal_handler_caller
)
1147 return read_memory_addr (fi
->next
->frame
+ SIG_FRAME_LR_OFFSET
,
1150 return read_memory_addr (FRAME_CHAIN (fi
) + DEFAULT_LR_SAVE
,
1154 if (fdata
.lr_offset
== 0)
1155 return read_register (LR_REGNUM
);
1157 return read_memory_addr (FRAME_CHAIN (fi
) + fdata
.lr_offset
, wordsize
);
1160 /* If saved registers of frame FI are not known yet, read and cache them.
1161 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1162 in which case the framedata are read. */
1165 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1167 CORE_ADDR frame_addr
;
1168 struct rs6000_framedata work_fdata
;
1169 int wordsize
= TDEP
->wordsize
;
1176 fdatap
= &work_fdata
;
1177 (void) skip_prologue (get_pc_function_start (fi
->pc
), fdatap
);
1180 frame_saved_regs_zalloc (fi
);
1182 /* If there were any saved registers, figure out parent's stack
1184 /* The following is true only if the frame doesn't have a call to
1187 if (fdatap
->saved_fpr
== 0 && fdatap
->saved_gpr
== 0
1188 && fdatap
->lr_offset
== 0 && fdatap
->cr_offset
== 0)
1190 else if (fi
->prev
&& fi
->prev
->frame
)
1191 frame_addr
= fi
->prev
->frame
;
1193 frame_addr
= read_memory_addr (fi
->frame
, wordsize
);
1195 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1196 All fpr's from saved_fpr to fp31 are saved. */
1198 if (fdatap
->saved_fpr
>= 0)
1201 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1202 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1204 fi
->saved_regs
[FP0_REGNUM
+ i
] = fpr_addr
;
1209 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1210 All gpr's from saved_gpr to gpr31 are saved. */
1212 if (fdatap
->saved_gpr
>= 0)
1215 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1216 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1218 fi
->saved_regs
[i
] = gpr_addr
;
1219 gpr_addr
+= wordsize
;
1223 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1225 if (fdatap
->cr_offset
!= 0)
1226 fi
->saved_regs
[CR_REGNUM
] = frame_addr
+ fdatap
->cr_offset
;
1228 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1230 if (fdatap
->lr_offset
!= 0)
1231 fi
->saved_regs
[LR_REGNUM
] = frame_addr
+ fdatap
->lr_offset
;
1234 /* Return the address of a frame. This is the inital %sp value when the frame
1235 was first allocated. For functions calling alloca(), it might be saved in
1236 an alloca register. */
1239 frame_initial_stack_address (struct frame_info
*fi
)
1242 struct rs6000_framedata fdata
;
1243 struct frame_info
*callee_fi
;
1245 /* if the initial stack pointer (frame address) of this frame is known,
1248 if (fi
->extra_info
->initial_sp
)
1249 return fi
->extra_info
->initial_sp
;
1251 /* find out if this function is using an alloca register.. */
1253 (void) skip_prologue (get_pc_function_start (fi
->pc
), &fdata
);
1255 /* if saved registers of this frame are not known yet, read and cache them. */
1257 if (!fi
->saved_regs
)
1258 frame_get_saved_regs (fi
, &fdata
);
1260 /* If no alloca register used, then fi->frame is the value of the %sp for
1261 this frame, and it is good enough. */
1263 if (fdata
.alloca_reg
< 0)
1265 fi
->extra_info
->initial_sp
= fi
->frame
;
1266 return fi
->extra_info
->initial_sp
;
1269 /* This function has an alloca register. If this is the top-most frame
1270 (with the lowest address), the value in alloca register is good. */
1273 return fi
->extra_info
->initial_sp
= read_register (fdata
.alloca_reg
);
1275 /* Otherwise, this is a caller frame. Callee has usually already saved
1276 registers, but there are exceptions (such as when the callee
1277 has no parameters). Find the address in which caller's alloca
1278 register is saved. */
1280 for (callee_fi
= fi
->next
; callee_fi
; callee_fi
= callee_fi
->next
)
1283 if (!callee_fi
->saved_regs
)
1284 frame_get_saved_regs (callee_fi
, NULL
);
1286 /* this is the address in which alloca register is saved. */
1288 tmpaddr
= callee_fi
->saved_regs
[fdata
.alloca_reg
];
1291 fi
->extra_info
->initial_sp
=
1292 read_memory_addr (tmpaddr
, TDEP
->wordsize
);
1293 return fi
->extra_info
->initial_sp
;
1296 /* Go look into deeper levels of the frame chain to see if any one of
1297 the callees has saved alloca register. */
1300 /* If alloca register was not saved, by the callee (or any of its callees)
1301 then the value in the register is still good. */
1303 fi
->extra_info
->initial_sp
= read_register (fdata
.alloca_reg
);
1304 return fi
->extra_info
->initial_sp
;
1307 /* Describe the pointer in each stack frame to the previous stack frame
1310 /* FRAME_CHAIN takes a frame's nominal address
1311 and produces the frame's chain-pointer. */
1313 /* In the case of the RS/6000, the frame's nominal address
1314 is the address of a 4-byte word containing the calling frame's address. */
1317 rs6000_frame_chain (struct frame_info
*thisframe
)
1319 CORE_ADDR fp
, fpp
, lr
;
1320 int wordsize
= TDEP
->wordsize
;
1322 if (PC_IN_CALL_DUMMY (thisframe
->pc
, thisframe
->frame
, thisframe
->frame
))
1323 return thisframe
->frame
; /* dummy frame same as caller's frame */
1325 if (inside_entry_file (thisframe
->pc
) ||
1326 thisframe
->pc
== entry_point_address ())
1329 if (thisframe
->signal_handler_caller
)
1330 fp
= read_memory_addr (thisframe
->frame
+ SIG_FRAME_FP_OFFSET
,
1332 else if (thisframe
->next
!= NULL
1333 && thisframe
->next
->signal_handler_caller
1334 && FRAMELESS_FUNCTION_INVOCATION (thisframe
))
1335 /* A frameless function interrupted by a signal did not change the
1337 fp
= FRAME_FP (thisframe
);
1339 fp
= read_memory_addr ((thisframe
)->frame
, wordsize
);
1341 lr
= read_register (LR_REGNUM
);
1342 if (lr
== entry_point_address ())
1343 if (fp
!= 0 && (fpp
= read_memory_addr (fp
, wordsize
)) != 0)
1344 if (PC_IN_CALL_DUMMY (lr
, fpp
, fpp
))
1350 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1351 isn't available with that word size, return 0. */
1354 regsize (const struct reg
*reg
, int wordsize
)
1356 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1359 /* Return the name of register number N, or null if no such register exists
1360 in the current architecture. */
1363 rs6000_register_name (int n
)
1365 struct gdbarch_tdep
*tdep
= TDEP
;
1366 const struct reg
*reg
= tdep
->regs
+ n
;
1368 if (!regsize (reg
, tdep
->wordsize
))
1373 /* Index within `registers' of the first byte of the space for
1377 rs6000_register_byte (int n
)
1379 return TDEP
->regoff
[n
];
1382 /* Return the number of bytes of storage in the actual machine representation
1383 for register N if that register is available, else return 0. */
1386 rs6000_register_raw_size (int n
)
1388 struct gdbarch_tdep
*tdep
= TDEP
;
1389 const struct reg
*reg
= tdep
->regs
+ n
;
1390 return regsize (reg
, tdep
->wordsize
);
1393 /* Number of bytes of storage in the program's representation
1397 rs6000_register_virtual_size (int n
)
1399 return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (n
));
1402 /* Return the GDB type object for the "standard" data type
1403 of data in register N. */
1405 static struct type
*
1406 rs6000_register_virtual_type (n
)
1408 struct gdbarch_tdep
*tdep
= TDEP
;
1409 const struct reg
*reg
= tdep
->regs
+ n
;
1411 return reg
->fpr
? builtin_type_double
:
1412 regsize (reg
, tdep
->wordsize
) == 8 ? builtin_type_int64
:
1416 /* For the PowerPC, it appears that the debug info marks float parameters as
1417 floats regardless of whether the function is prototyped, but the actual
1418 values are always passed in as doubles. Tell gdb to always assume that
1419 floats are passed as doubles and then converted in the callee. */
1422 rs6000_coerce_float_to_double (struct type
*formal
, struct type
*actual
)
1427 /* Return whether register N requires conversion when moving from raw format
1430 The register format for RS/6000 floating point registers is always
1431 double, we need a conversion if the memory format is float. */
1434 rs6000_register_convertible (int n
)
1436 const struct reg
*reg
= TDEP
->regs
+ n
;
1440 /* Convert data from raw format for register N in buffer FROM
1441 to virtual format with type TYPE in buffer TO. */
1444 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1445 char *from
, char *to
)
1447 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1449 double val
= extract_floating (from
, REGISTER_RAW_SIZE (n
));
1450 store_floating (to
, TYPE_LENGTH (type
), val
);
1453 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1456 /* Convert data from virtual format with type TYPE in buffer FROM
1457 to raw format for register N in buffer TO. */
1460 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1461 char *from
, char *to
)
1463 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1465 double val
= extract_floating (from
, TYPE_LENGTH (type
));
1466 store_floating (to
, REGISTER_RAW_SIZE (n
), val
);
1469 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1472 /* Store the address of the place in which to copy the structure the
1473 subroutine will return. This is called from call_function.
1475 In RS/6000, struct return addresses are passed as an extra parameter in r3.
1476 In function return, callee is not responsible of returning this address
1477 back. Since gdb needs to find it, we will store in a designated variable
1478 `rs6000_struct_return_address'. */
1481 rs6000_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1483 write_register (3, addr
);
1484 rs6000_struct_return_address
= addr
;
1487 /* Write into appropriate registers a function return value
1488 of type TYPE, given in virtual format. */
1491 rs6000_store_return_value (struct type
*type
, char *valbuf
)
1493 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1495 /* Floating point values are returned starting from FPR1 and up.
1496 Say a double_double_double type could be returned in
1497 FPR1/FPR2/FPR3 triple. */
1499 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
1500 TYPE_LENGTH (type
));
1502 /* Everything else is returned in GPR3 and up. */
1503 write_register_bytes (REGISTER_BYTE (GP0_REGNUM
+ 3), valbuf
,
1504 TYPE_LENGTH (type
));
1507 /* Extract from an array REGBUF containing the (raw) register state
1508 the address in which a function should return its structure value,
1509 as a CORE_ADDR (or an expression that can be used as one). */
1512 rs6000_extract_struct_value_address (char *regbuf
)
1514 return rs6000_struct_return_address
;
1517 /* Return whether PC is in a dummy function call.
1519 FIXME: This just checks for the end of the stack, which is broken
1520 for things like stepping through gcc nested function stubs. */
1523 rs6000_pc_in_call_dummy (CORE_ADDR pc
, CORE_ADDR sp
, CORE_ADDR fp
)
1525 return sp
< pc
&& pc
< fp
;
1528 /* Hook called when a new child process is started. */
1531 rs6000_create_inferior (int pid
)
1533 if (rs6000_set_host_arch_hook
)
1534 rs6000_set_host_arch_hook (pid
);
1537 /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
1539 Usually a function pointer's representation is simply the address
1540 of the function. On the RS/6000 however, a function pointer is
1541 represented by a pointer to a TOC entry. This TOC entry contains
1542 three words, the first word is the address of the function, the
1543 second word is the TOC pointer (r2), and the third word is the
1544 static chain value. Throughout GDB it is currently assumed that a
1545 function pointer contains the address of the function, which is not
1546 easy to fix. In addition, the conversion of a function address to
1547 a function pointer would require allocation of a TOC entry in the
1548 inferior's memory space, with all its drawbacks. To be able to
1549 call C++ virtual methods in the inferior (which are called via
1550 function pointers), find_function_addr uses this macro to get the
1551 function address from a function pointer. */
1553 /* Return nonzero if ADDR (a function pointer) is in the data space and
1554 is therefore a special function pointer. */
1557 rs6000_convert_from_func_ptr_addr (CORE_ADDR addr
)
1559 struct obj_section
*s
;
1561 s
= find_pc_section (addr
);
1562 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
1565 /* ADDR is in the data space, so it's a special function pointer. */
1566 return read_memory_addr (addr
, TDEP
->wordsize
);
1570 /* Handling the various POWER/PowerPC variants. */
1573 /* The arrays here called registers_MUMBLE hold information about available
1576 For each family of PPC variants, I've tried to isolate out the
1577 common registers and put them up front, so that as long as you get
1578 the general family right, GDB will correctly identify the registers
1579 common to that family. The common register sets are:
1581 For the 60x family: hid0 hid1 iabr dabr pir
1583 For the 505 and 860 family: eie eid nri
1585 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
1586 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
1589 Most of these register groups aren't anything formal. I arrived at
1590 them by looking at the registers that occurred in more than one
1593 /* Convenience macros for populating register arrays. */
1595 /* Within another macro, convert S to a string. */
1599 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
1600 and 64 bits on 64-bit systems. */
1601 #define R(name) { STR(name), 4, 8, 0 }
1603 /* Return a struct reg defining register NAME that's 32 bits on all
1605 #define R4(name) { STR(name), 4, 4, 0 }
1607 /* Return a struct reg defining register NAME that's 64 bits on all
1609 #define R8(name) { STR(name), 8, 8, 0 }
1611 /* Return a struct reg defining floating-point register NAME. */
1612 #define F(name) { STR(name), 8, 8, 1 }
1614 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
1615 systems and that doesn't exist on 64-bit systems. */
1616 #define R32(name) { STR(name), 4, 0, 0 }
1618 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
1619 systems and that doesn't exist on 32-bit systems. */
1620 #define R64(name) { STR(name), 0, 8, 0 }
1622 /* Return a struct reg placeholder for a register that doesn't exist. */
1623 #define R0 { 0, 0, 0, 0 }
1625 /* UISA registers common across all architectures, including POWER. */
1627 #define COMMON_UISA_REGS \
1628 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
1629 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
1630 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
1631 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
1632 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
1633 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
1634 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
1635 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
1636 /* 64 */ R(pc), R(ps)
1638 /* UISA-level SPRs for PowerPC. */
1639 #define PPC_UISA_SPRS \
1640 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
1642 /* Segment registers, for PowerPC. */
1643 #define PPC_SEGMENT_REGS \
1644 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
1645 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
1646 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
1647 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
1649 /* OEA SPRs for PowerPC. */
1650 #define PPC_OEA_SPRS \
1652 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
1653 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
1654 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
1655 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
1656 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
1657 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
1658 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
1659 /* 116 */ R4(dec), R(dabr), R4(ear)
1661 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
1662 user-level SPR's. */
1663 static const struct reg registers_power
[] =
1666 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
)
1669 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
1670 view of the PowerPC. */
1671 static const struct reg registers_powerpc
[] =
1677 /* IBM PowerPC 403. */
1678 static const struct reg registers_403
[] =
1684 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
1685 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
1686 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
1687 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
1688 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
1689 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
1692 /* IBM PowerPC 403GC. */
1693 static const struct reg registers_403GC
[] =
1699 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
1700 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
1701 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
1702 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
1703 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
1704 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
1705 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
1706 /* 147 */ R(tbhu
), R(tblu
)
1709 /* Motorola PowerPC 505. */
1710 static const struct reg registers_505
[] =
1716 /* 119 */ R(eie
), R(eid
), R(nri
)
1719 /* Motorola PowerPC 860 or 850. */
1720 static const struct reg registers_860
[] =
1726 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
1727 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
1728 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
1729 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
1730 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
1731 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
1732 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
1733 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
1734 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
1735 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
1736 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
1737 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
1740 /* Motorola PowerPC 601. Note that the 601 has different register numbers
1741 for reading and writing RTCU and RTCL. However, how one reads and writes a
1742 register is the stub's problem. */
1743 static const struct reg registers_601
[] =
1749 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
1750 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
1753 /* Motorola PowerPC 602. */
1754 static const struct reg registers_602
[] =
1760 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
1761 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
1762 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
1765 /* Motorola/IBM PowerPC 603 or 603e. */
1766 static const struct reg registers_603
[] =
1772 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
1773 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
1774 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
1777 /* Motorola PowerPC 604 or 604e. */
1778 static const struct reg registers_604
[] =
1784 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
1785 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
1786 /* 127 */ R(sia
), R(sda
)
1789 /* Motorola/IBM PowerPC 750 or 740. */
1790 static const struct reg registers_750
[] =
1796 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
1797 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
1798 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
1799 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
1800 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
1801 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
1805 /* Information about a particular processor variant. */
1809 /* Name of this variant. */
1812 /* English description of the variant. */
1815 /* bfd_arch_info.arch corresponding to variant. */
1816 enum bfd_architecture arch
;
1818 /* bfd_arch_info.mach corresponding to variant. */
1821 /* Table of register names; registers[R] is the name of the register
1824 const struct reg
*regs
;
1827 #define num_registers(list) (sizeof (list) / sizeof((list)[0]))
1830 /* Information in this table comes from the following web sites:
1831 IBM: http://www.chips.ibm.com:80/products/embedded/
1832 Motorola: http://www.mot.com/SPS/PowerPC/
1834 I'm sure I've got some of the variant descriptions not quite right.
1835 Please report any inaccuracies you find to GDB's maintainer.
1837 If you add entries to this table, please be sure to allow the new
1838 value as an argument to the --with-cpu flag, in configure.in. */
1840 static const struct variant variants
[] =
1842 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
1843 bfd_mach_ppc
, num_registers (registers_powerpc
), registers_powerpc
},
1844 {"power", "POWER user-level", bfd_arch_rs6000
,
1845 bfd_mach_rs6k
, num_registers (registers_power
), registers_power
},
1846 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
1847 bfd_mach_ppc_403
, num_registers (registers_403
), registers_403
},
1848 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
1849 bfd_mach_ppc_601
, num_registers (registers_601
), registers_601
},
1850 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
1851 bfd_mach_ppc_602
, num_registers (registers_602
), registers_602
},
1852 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
1853 bfd_mach_ppc_603
, num_registers (registers_603
), registers_603
},
1854 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
1855 604, num_registers (registers_604
), registers_604
},
1856 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
1857 bfd_mach_ppc_403gc
, num_registers (registers_403GC
), registers_403GC
},
1858 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
1859 bfd_mach_ppc_505
, num_registers (registers_505
), registers_505
},
1860 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
1861 bfd_mach_ppc_860
, num_registers (registers_860
), registers_860
},
1862 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
1863 bfd_mach_ppc_750
, num_registers (registers_750
), registers_750
},
1865 /* FIXME: I haven't checked the register sets of the following. */
1866 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
1867 bfd_mach_ppc_620
, num_registers (registers_powerpc
), registers_powerpc
},
1868 {"a35", "PowerPC A35", bfd_arch_powerpc
,
1869 bfd_mach_ppc_a35
, num_registers (registers_powerpc
), registers_powerpc
},
1870 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
1871 bfd_mach_rs6k_rs1
, num_registers (registers_power
), registers_power
},
1872 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
1873 bfd_mach_rs6k_rsc
, num_registers (registers_power
), registers_power
},
1874 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
1875 bfd_mach_rs6k_rs2
, num_registers (registers_power
), registers_power
},
1880 #undef num_registers
1882 /* Look up the variant named NAME in the `variants' table. Return a
1883 pointer to the struct variant, or null if we couldn't find it. */
1885 static const struct variant
*
1886 find_variant_by_name (char *name
)
1888 const struct variant
*v
;
1890 for (v
= variants
; v
->name
; v
++)
1891 if (!strcmp (name
, v
->name
))
1897 /* Return the variant corresponding to architecture ARCH and machine number
1898 MACH. If no such variant exists, return null. */
1900 static const struct variant
*
1901 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
1903 const struct variant
*v
;
1905 for (v
= variants
; v
->name
; v
++)
1906 if (arch
== v
->arch
&& mach
== v
->mach
)
1914 /* Initialize the current architecture based on INFO. If possible, re-use an
1915 architecture from ARCHES, which is a list of architectures already created
1916 during this debugging session.
1918 Called e.g. at program startup, when reading a core file, and when reading
1921 static struct gdbarch
*
1922 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1924 struct gdbarch
*gdbarch
;
1925 struct gdbarch_tdep
*tdep
;
1926 int wordsize
, fromexec
, power
, i
, off
;
1928 const struct variant
*v
;
1929 enum bfd_architecture arch
;
1933 fromexec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
1934 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
1936 /* Check word size. If INFO is from a binary file, infer it from that,
1937 else use the previously-inferred size. */
1940 if (xcoff_data (info
.abfd
)->xcoff64
)
1949 wordsize
= tdep
->wordsize
;
1954 /* Find a candidate among extant architectures. */
1955 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1957 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
1959 /* Word size in the various PowerPC bfd_arch_info structs isn't
1960 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
1961 separate word size check. */
1962 tdep
= gdbarch_tdep (arches
->gdbarch
);
1963 if (tdep
&& tdep
->wordsize
== wordsize
)
1964 return arches
->gdbarch
;
1967 /* None found, create a new architecture from INFO, whose bfd_arch_info
1968 validity depends on the source:
1969 - executable useless
1970 - rs6000_host_arch() good
1972 - "set arch" trust blindly
1973 - GDB startup useless but harmless */
1977 arch
= info
.bfd_architecture
;
1978 mach
= info
.bfd_arch_info
->mach
;
1982 arch
= bfd_arch_powerpc
;
1984 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
1985 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
1987 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
1988 tdep
->wordsize
= wordsize
;
1989 gdbarch
= gdbarch_alloc (&info
, tdep
);
1990 power
= arch
== bfd_arch_rs6000
;
1992 /* Select instruction printer. */
1993 tm_print_insn
= arch
== power
? print_insn_rs6000
:
1994 info
.byte_order
== BIG_ENDIAN
? print_insn_big_powerpc
:
1995 print_insn_little_powerpc
;
1997 /* Choose variant. */
1998 v
= find_variant_by_arch (arch
, mach
);
2000 v
= find_variant_by_name (power
? "power" : "powerpc");
2001 tdep
->regs
= v
->regs
;
2003 /* Calculate byte offsets in raw register array. */
2004 tdep
->regoff
= xmalloc (v
->nregs
* sizeof (int));
2005 for (i
= off
= 0; i
< v
->nregs
; i
++)
2007 tdep
->regoff
[i
] = off
;
2008 off
+= regsize (v
->regs
+ i
, wordsize
);
2011 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
2012 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2013 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
2014 set_gdbarch_write_fp (gdbarch
, generic_target_write_fp
);
2015 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2016 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
2018 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2019 set_gdbarch_sp_regnum (gdbarch
, 1);
2020 set_gdbarch_fp_regnum (gdbarch
, 1);
2021 set_gdbarch_pc_regnum (gdbarch
, 64);
2022 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2023 set_gdbarch_register_size (gdbarch
, wordsize
);
2024 set_gdbarch_register_bytes (gdbarch
, off
);
2025 set_gdbarch_register_byte (gdbarch
, rs6000_register_byte
);
2026 set_gdbarch_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2027 set_gdbarch_max_register_raw_size (gdbarch
, 8);
2028 set_gdbarch_register_virtual_size (gdbarch
, rs6000_register_virtual_size
);
2029 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
2030 set_gdbarch_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2032 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2033 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2034 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2035 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2036 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2037 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2038 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2039 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2041 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
2042 set_gdbarch_call_dummy_length (gdbarch
, 0);
2043 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
2044 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2045 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
2046 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2047 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2048 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
2049 set_gdbarch_call_dummy_p (gdbarch
, 1);
2050 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2051 set_gdbarch_get_saved_register (gdbarch
, generic_get_saved_register
);
2052 set_gdbarch_fix_call_dummy (gdbarch
, rs6000_fix_call_dummy
);
2053 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
2054 set_gdbarch_push_return_address (gdbarch
, ppc_push_return_address
);
2055 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2056 set_gdbarch_coerce_float_to_double (gdbarch
, rs6000_coerce_float_to_double
);
2058 set_gdbarch_register_convertible (gdbarch
, rs6000_register_convertible
);
2059 set_gdbarch_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2060 set_gdbarch_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2062 set_gdbarch_extract_return_value (gdbarch
, rs6000_extract_return_value
);
2063 set_gdbarch_push_arguments (gdbarch
, rs6000_push_arguments
);
2065 set_gdbarch_store_struct_return (gdbarch
, rs6000_store_struct_return
);
2066 set_gdbarch_store_return_value (gdbarch
, rs6000_store_return_value
);
2067 set_gdbarch_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2068 set_gdbarch_use_struct_convention (gdbarch
, generic_use_struct_convention
);
2070 set_gdbarch_frame_init_saved_regs (gdbarch
, rs6000_frame_init_saved_regs
);
2071 set_gdbarch_init_extra_frame_info (gdbarch
, rs6000_init_extra_frame_info
);
2073 set_gdbarch_pop_frame (gdbarch
, rs6000_pop_frame
);
2075 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2076 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2077 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2078 set_gdbarch_function_start_offset (gdbarch
, 0);
2079 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2081 /* Not sure on this. FIXMEmgo */
2082 set_gdbarch_frame_args_skip (gdbarch
, 8);
2084 set_gdbarch_frameless_function_invocation (gdbarch
, rs6000_frameless_function_invocation
);
2085 set_gdbarch_frame_chain (gdbarch
, rs6000_frame_chain
);
2086 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
2087 set_gdbarch_frame_saved_pc (gdbarch
, rs6000_frame_saved_pc
);
2088 set_gdbarch_frame_args_address (gdbarch
, rs6000_frame_args_address
);
2089 set_gdbarch_frame_locals_address (gdbarch
, rs6000_frame_args_address
);
2090 set_gdbarch_saved_pc_after_call (gdbarch
, rs6000_saved_pc_after_call
);
2092 /* We can't tell how many args there are
2093 now that the C compiler delays popping them. */
2094 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
2099 /* Initialization code. */
2102 _initialize_rs6000_tdep ()
2104 register_gdbarch_init (bfd_arch_rs6000
, rs6000_gdbarch_init
);
2105 register_gdbarch_init (bfd_arch_powerpc
, rs6000_gdbarch_init
);