* elf-bfd.h (elf_discarded_section): Define.
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001
4 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #include "defs.h"
24 #include "frame.h"
25 #include "inferior.h"
26 #include "symtab.h"
27 #include "target.h"
28 #include "gdbcore.h"
29 #include "gdbcmd.h"
30 #include "symfile.h"
31 #include "objfiles.h"
32 #include "arch-utils.h"
33 #include "regcache.h"
34 #include "doublest.h"
35 #include "value.h"
36
37 #include "bfd/libbfd.h" /* for bfd_default_set_arch_mach */
38 #include "coff/internal.h" /* for libcoff.h */
39 #include "bfd/libcoff.h" /* for xcoff_data */
40
41 #include "elf-bfd.h"
42
43 #include "solib-svr4.h"
44 #include "ppc-tdep.h"
45
46 /* If the kernel has to deliver a signal, it pushes a sigcontext
47 structure on the stack and then calls the signal handler, passing
48 the address of the sigcontext in an argument register. Usually
49 the signal handler doesn't save this register, so we have to
50 access the sigcontext structure via an offset from the signal handler
51 frame.
52 The following constants were determined by experimentation on AIX 3.2. */
53 #define SIG_FRAME_PC_OFFSET 96
54 #define SIG_FRAME_LR_OFFSET 108
55 #define SIG_FRAME_FP_OFFSET 284
56
57 /* To be used by skip_prologue. */
58
59 struct rs6000_framedata
60 {
61 int offset; /* total size of frame --- the distance
62 by which we decrement sp to allocate
63 the frame */
64 int saved_gpr; /* smallest # of saved gpr */
65 int saved_fpr; /* smallest # of saved fpr */
66 int alloca_reg; /* alloca register number (frame ptr) */
67 char frameless; /* true if frameless functions. */
68 char nosavedpc; /* true if pc not saved. */
69 int gpr_offset; /* offset of saved gprs from prev sp */
70 int fpr_offset; /* offset of saved fprs from prev sp */
71 int lr_offset; /* offset of saved lr */
72 int cr_offset; /* offset of saved cr */
73 };
74
75 /* Description of a single register. */
76
77 struct reg
78 {
79 char *name; /* name of register */
80 unsigned char sz32; /* size on 32-bit arch, 0 if nonextant */
81 unsigned char sz64; /* size on 64-bit arch, 0 if nonextant */
82 unsigned char fpr; /* whether register is floating-point */
83 };
84
85 /* Return the current architecture's gdbarch_tdep structure. */
86
87 #define TDEP gdbarch_tdep (current_gdbarch)
88
89 /* Breakpoint shadows for the single step instructions will be kept here. */
90
91 static struct sstep_breaks
92 {
93 /* Address, or 0 if this is not in use. */
94 CORE_ADDR address;
95 /* Shadow contents. */
96 char data[4];
97 }
98 stepBreaks[2];
99
100 /* Hook for determining the TOC address when calling functions in the
101 inferior under AIX. The initialization code in rs6000-nat.c sets
102 this hook to point to find_toc_address. */
103
104 CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL;
105
106 /* Hook to set the current architecture when starting a child process.
107 rs6000-nat.c sets this. */
108
109 void (*rs6000_set_host_arch_hook) (int) = NULL;
110
111 /* Static function prototypes */
112
113 static CORE_ADDR branch_dest (int opcode, int instr, CORE_ADDR pc,
114 CORE_ADDR safety);
115 static CORE_ADDR skip_prologue (CORE_ADDR, CORE_ADDR,
116 struct rs6000_framedata *);
117 static void frame_get_saved_regs (struct frame_info * fi,
118 struct rs6000_framedata * fdatap);
119 static CORE_ADDR frame_initial_stack_address (struct frame_info *);
120
121 /* Read a LEN-byte address from debugged memory address MEMADDR. */
122
123 static CORE_ADDR
124 read_memory_addr (CORE_ADDR memaddr, int len)
125 {
126 return read_memory_unsigned_integer (memaddr, len);
127 }
128
129 static CORE_ADDR
130 rs6000_skip_prologue (CORE_ADDR pc)
131 {
132 struct rs6000_framedata frame;
133 pc = skip_prologue (pc, 0, &frame);
134 return pc;
135 }
136
137
138 /* Fill in fi->saved_regs */
139
140 struct frame_extra_info
141 {
142 /* Functions calling alloca() change the value of the stack
143 pointer. We need to use initial stack pointer (which is saved in
144 r31 by gcc) in such cases. If a compiler emits traceback table,
145 then we should use the alloca register specified in traceback
146 table. FIXME. */
147 CORE_ADDR initial_sp; /* initial stack pointer. */
148 };
149
150 void
151 rs6000_init_extra_frame_info (int fromleaf, struct frame_info *fi)
152 {
153 fi->extra_info = (struct frame_extra_info *)
154 frame_obstack_alloc (sizeof (struct frame_extra_info));
155 fi->extra_info->initial_sp = 0;
156 if (fi->next != (CORE_ADDR) 0
157 && fi->pc < TEXT_SEGMENT_BASE)
158 /* We're in get_prev_frame */
159 /* and this is a special signal frame. */
160 /* (fi->pc will be some low address in the kernel, */
161 /* to which the signal handler returns). */
162 fi->signal_handler_caller = 1;
163 }
164
165 /* Put here the code to store, into a struct frame_saved_regs,
166 the addresses of the saved registers of frame described by FRAME_INFO.
167 This includes special registers such as pc and fp saved in special
168 ways in the stack frame. sp is even more special:
169 the address we return for it IS the sp for the next frame. */
170
171 /* In this implementation for RS/6000, we do *not* save sp. I am
172 not sure if it will be needed. The following function takes care of gpr's
173 and fpr's only. */
174
175 void
176 rs6000_frame_init_saved_regs (struct frame_info *fi)
177 {
178 frame_get_saved_regs (fi, NULL);
179 }
180
181 static CORE_ADDR
182 rs6000_frame_args_address (struct frame_info *fi)
183 {
184 if (fi->extra_info->initial_sp != 0)
185 return fi->extra_info->initial_sp;
186 else
187 return frame_initial_stack_address (fi);
188 }
189
190 /* Immediately after a function call, return the saved pc.
191 Can't go through the frames for this because on some machines
192 the new frame is not set up until the new function executes
193 some instructions. */
194
195 static CORE_ADDR
196 rs6000_saved_pc_after_call (struct frame_info *fi)
197 {
198 return read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum);
199 }
200
201 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
202
203 static CORE_ADDR
204 branch_dest (int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)
205 {
206 CORE_ADDR dest;
207 int immediate;
208 int absolute;
209 int ext_op;
210
211 absolute = (int) ((instr >> 1) & 1);
212
213 switch (opcode)
214 {
215 case 18:
216 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
217 if (absolute)
218 dest = immediate;
219 else
220 dest = pc + immediate;
221 break;
222
223 case 16:
224 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
225 if (absolute)
226 dest = immediate;
227 else
228 dest = pc + immediate;
229 break;
230
231 case 19:
232 ext_op = (instr >> 1) & 0x3ff;
233
234 if (ext_op == 16) /* br conditional register */
235 {
236 dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum) & ~3;
237
238 /* If we are about to return from a signal handler, dest is
239 something like 0x3c90. The current frame is a signal handler
240 caller frame, upon completion of the sigreturn system call
241 execution will return to the saved PC in the frame. */
242 if (dest < TEXT_SEGMENT_BASE)
243 {
244 struct frame_info *fi;
245
246 fi = get_current_frame ();
247 if (fi != NULL)
248 dest = read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET,
249 TDEP->wordsize);
250 }
251 }
252
253 else if (ext_op == 528) /* br cond to count reg */
254 {
255 dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_ctr_regnum) & ~3;
256
257 /* If we are about to execute a system call, dest is something
258 like 0x22fc or 0x3b00. Upon completion the system call
259 will return to the address in the link register. */
260 if (dest < TEXT_SEGMENT_BASE)
261 dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum) & ~3;
262 }
263 else
264 return -1;
265 break;
266
267 default:
268 return -1;
269 }
270 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
271 }
272
273
274 /* Sequence of bytes for breakpoint instruction. */
275
276 #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
277 #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
278
279 static unsigned char *
280 rs6000_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size)
281 {
282 static unsigned char big_breakpoint[] = BIG_BREAKPOINT;
283 static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT;
284 *bp_size = 4;
285 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
286 return big_breakpoint;
287 else
288 return little_breakpoint;
289 }
290
291
292 /* AIX does not support PT_STEP. Simulate it. */
293
294 void
295 rs6000_software_single_step (enum target_signal signal,
296 int insert_breakpoints_p)
297 {
298 #define INSNLEN(OPCODE) 4
299
300 static char le_breakp[] = LITTLE_BREAKPOINT;
301 static char be_breakp[] = BIG_BREAKPOINT;
302 char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp;
303 int ii, insn;
304 CORE_ADDR loc;
305 CORE_ADDR breaks[2];
306 int opcode;
307
308 if (insert_breakpoints_p)
309 {
310
311 loc = read_pc ();
312
313 insn = read_memory_integer (loc, 4);
314
315 breaks[0] = loc + INSNLEN (insn);
316 opcode = insn >> 26;
317 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
318
319 /* Don't put two breakpoints on the same address. */
320 if (breaks[1] == breaks[0])
321 breaks[1] = -1;
322
323 stepBreaks[1].address = 0;
324
325 for (ii = 0; ii < 2; ++ii)
326 {
327
328 /* ignore invalid breakpoint. */
329 if (breaks[ii] == -1)
330 continue;
331
332 read_memory (breaks[ii], stepBreaks[ii].data, 4);
333
334 write_memory (breaks[ii], breakp, 4);
335 stepBreaks[ii].address = breaks[ii];
336 }
337
338 }
339 else
340 {
341
342 /* remove step breakpoints. */
343 for (ii = 0; ii < 2; ++ii)
344 if (stepBreaks[ii].address != 0)
345 write_memory
346 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
347
348 }
349 errno = 0; /* FIXME, don't ignore errors! */
350 /* What errors? {read,write}_memory call error(). */
351 }
352
353
354 /* return pc value after skipping a function prologue and also return
355 information about a function frame.
356
357 in struct rs6000_framedata fdata:
358 - frameless is TRUE, if function does not have a frame.
359 - nosavedpc is TRUE, if function does not save %pc value in its frame.
360 - offset is the initial size of this stack frame --- the amount by
361 which we decrement the sp to allocate the frame.
362 - saved_gpr is the number of the first saved gpr.
363 - saved_fpr is the number of the first saved fpr.
364 - alloca_reg is the number of the register used for alloca() handling.
365 Otherwise -1.
366 - gpr_offset is the offset of the first saved gpr from the previous frame.
367 - fpr_offset is the offset of the first saved fpr from the previous frame.
368 - lr_offset is the offset of the saved lr
369 - cr_offset is the offset of the saved cr
370 */
371
372 #define SIGNED_SHORT(x) \
373 ((sizeof (short) == 2) \
374 ? ((int)(short)(x)) \
375 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
376
377 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
378
379 /* Limit the number of skipped non-prologue instructions, as the examining
380 of the prologue is expensive. */
381 static int max_skip_non_prologue_insns = 10;
382
383 /* Given PC representing the starting address of a function, and
384 LIM_PC which is the (sloppy) limit to which to scan when looking
385 for a prologue, attempt to further refine this limit by using
386 the line data in the symbol table. If successful, a better guess
387 on where the prologue ends is returned, otherwise the previous
388 value of lim_pc is returned. */
389 static CORE_ADDR
390 refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc)
391 {
392 struct symtab_and_line prologue_sal;
393
394 prologue_sal = find_pc_line (pc, 0);
395 if (prologue_sal.line != 0)
396 {
397 int i;
398 CORE_ADDR addr = prologue_sal.end;
399
400 /* Handle the case in which compiler's optimizer/scheduler
401 has moved instructions into the prologue. We scan ahead
402 in the function looking for address ranges whose corresponding
403 line number is less than or equal to the first one that we
404 found for the function. (It can be less than when the
405 scheduler puts a body instruction before the first prologue
406 instruction.) */
407 for (i = 2 * max_skip_non_prologue_insns;
408 i > 0 && (lim_pc == 0 || addr < lim_pc);
409 i--)
410 {
411 struct symtab_and_line sal;
412
413 sal = find_pc_line (addr, 0);
414 if (sal.line == 0)
415 break;
416 if (sal.line <= prologue_sal.line
417 && sal.symtab == prologue_sal.symtab)
418 {
419 prologue_sal = sal;
420 }
421 addr = sal.end;
422 }
423
424 if (lim_pc == 0 || prologue_sal.end < lim_pc)
425 lim_pc = prologue_sal.end;
426 }
427 return lim_pc;
428 }
429
430
431 static CORE_ADDR
432 skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
433 {
434 CORE_ADDR orig_pc = pc;
435 CORE_ADDR last_prologue_pc = pc;
436 char buf[4];
437 unsigned long op;
438 long offset = 0;
439 int lr_reg = -1;
440 int cr_reg = -1;
441 int reg;
442 int framep = 0;
443 int minimal_toc_loaded = 0;
444 int prev_insn_was_prologue_insn = 1;
445 int num_skip_non_prologue_insns = 0;
446
447 /* Attempt to find the end of the prologue when no limit is specified.
448 Note that refine_prologue_limit() has been written so that it may
449 be used to "refine" the limits of non-zero PC values too, but this
450 is only safe if we 1) trust the line information provided by the
451 compiler and 2) iterate enough to actually find the end of the
452 prologue.
453
454 It may become a good idea at some point (for both performance and
455 accuracy) to unconditionally call refine_prologue_limit(). But,
456 until we can make a clear determination that this is beneficial,
457 we'll play it safe and only use it to obtain a limit when none
458 has been specified. */
459 if (lim_pc == 0)
460 lim_pc = refine_prologue_limit (pc, lim_pc);
461
462 memset (fdata, 0, sizeof (struct rs6000_framedata));
463 fdata->saved_gpr = -1;
464 fdata->saved_fpr = -1;
465 fdata->alloca_reg = -1;
466 fdata->frameless = 1;
467 fdata->nosavedpc = 1;
468
469 for (;; pc += 4)
470 {
471 /* Sometimes it isn't clear if an instruction is a prologue
472 instruction or not. When we encounter one of these ambiguous
473 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
474 Otherwise, we'll assume that it really is a prologue instruction. */
475 if (prev_insn_was_prologue_insn)
476 last_prologue_pc = pc;
477
478 /* Stop scanning if we've hit the limit. */
479 if (lim_pc != 0 && pc >= lim_pc)
480 break;
481
482 prev_insn_was_prologue_insn = 1;
483
484 /* Fetch the instruction and convert it to an integer. */
485 if (target_read_memory (pc, buf, 4))
486 break;
487 op = extract_signed_integer (buf, 4);
488
489 if ((op & 0xfc1fffff) == 0x7c0802a6)
490 { /* mflr Rx */
491 lr_reg = (op & 0x03e00000) | 0x90010000;
492 continue;
493
494 }
495 else if ((op & 0xfc1fffff) == 0x7c000026)
496 { /* mfcr Rx */
497 cr_reg = (op & 0x03e00000) | 0x90010000;
498 continue;
499
500 }
501 else if ((op & 0xfc1f0000) == 0xd8010000)
502 { /* stfd Rx,NUM(r1) */
503 reg = GET_SRC_REG (op);
504 if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg)
505 {
506 fdata->saved_fpr = reg;
507 fdata->fpr_offset = SIGNED_SHORT (op) + offset;
508 }
509 continue;
510
511 }
512 else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
513 (((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
514 (op & 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
515 (op & 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
516 {
517
518 reg = GET_SRC_REG (op);
519 if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg)
520 {
521 fdata->saved_gpr = reg;
522 if ((op & 0xfc1f0003) == 0xf8010000)
523 op = (op >> 1) << 1;
524 fdata->gpr_offset = SIGNED_SHORT (op) + offset;
525 }
526 continue;
527
528 }
529 else if ((op & 0xffff0000) == 0x60000000)
530 {
531 /* nop */
532 /* Allow nops in the prologue, but do not consider them to
533 be part of the prologue unless followed by other prologue
534 instructions. */
535 prev_insn_was_prologue_insn = 0;
536 continue;
537
538 }
539 else if ((op & 0xffff0000) == 0x3c000000)
540 { /* addis 0,0,NUM, used
541 for >= 32k frames */
542 fdata->offset = (op & 0x0000ffff) << 16;
543 fdata->frameless = 0;
544 continue;
545
546 }
547 else if ((op & 0xffff0000) == 0x60000000)
548 { /* ori 0,0,NUM, 2nd ha
549 lf of >= 32k frames */
550 fdata->offset |= (op & 0x0000ffff);
551 fdata->frameless = 0;
552 continue;
553
554 }
555 else if (lr_reg != -1 && (op & 0xffff0000) == lr_reg)
556 { /* st Rx,NUM(r1)
557 where Rx == lr */
558 fdata->lr_offset = SIGNED_SHORT (op) + offset;
559 fdata->nosavedpc = 0;
560 lr_reg = 0;
561 continue;
562
563 }
564 else if (cr_reg != -1 && (op & 0xffff0000) == cr_reg)
565 { /* st Rx,NUM(r1)
566 where Rx == cr */
567 fdata->cr_offset = SIGNED_SHORT (op) + offset;
568 cr_reg = 0;
569 continue;
570
571 }
572 else if (op == 0x48000005)
573 { /* bl .+4 used in
574 -mrelocatable */
575 continue;
576
577 }
578 else if (op == 0x48000004)
579 { /* b .+4 (xlc) */
580 break;
581
582 }
583 else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used
584 in V.4 -mrelocatable */
585 op == 0x7fc0f214) && /* add r30,r0,r30, used
586 in V.4 -mrelocatable */
587 lr_reg == 0x901e0000)
588 {
589 continue;
590
591 }
592 else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
593 in V.4 -mminimal-toc */
594 (op & 0xffff0000) == 0x3bde0000)
595 { /* addi 30,30,foo@l */
596 continue;
597
598 }
599 else if ((op & 0xfc000001) == 0x48000001)
600 { /* bl foo,
601 to save fprs??? */
602
603 fdata->frameless = 0;
604 /* Don't skip over the subroutine call if it is not within the first
605 three instructions of the prologue. */
606 if ((pc - orig_pc) > 8)
607 break;
608
609 op = read_memory_integer (pc + 4, 4);
610
611 /* At this point, make sure this is not a trampoline function
612 (a function that simply calls another functions, and nothing else).
613 If the next is not a nop, this branch was part of the function
614 prologue. */
615
616 if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */
617 break; /* don't skip over
618 this branch */
619 continue;
620
621 /* update stack pointer */
622 }
623 else if ((op & 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
624 (op & 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
625 {
626 fdata->frameless = 0;
627 if ((op & 0xffff0003) == 0xf8210001)
628 op = (op >> 1) << 1;
629 fdata->offset = SIGNED_SHORT (op);
630 offset = fdata->offset;
631 continue;
632
633 }
634 else if (op == 0x7c21016e)
635 { /* stwux 1,1,0 */
636 fdata->frameless = 0;
637 offset = fdata->offset;
638 continue;
639
640 /* Load up minimal toc pointer */
641 }
642 else if ((op >> 22) == 0x20f
643 && !minimal_toc_loaded)
644 { /* l r31,... or l r30,... */
645 minimal_toc_loaded = 1;
646 continue;
647
648 /* move parameters from argument registers to local variable
649 registers */
650 }
651 else if ((op & 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
652 (((op >> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
653 (((op >> 21) & 31) <= 10) &&
654 (((op >> 16) & 31) >= fdata->saved_gpr)) /* Rx: local var reg */
655 {
656 continue;
657
658 /* store parameters in stack */
659 }
660 else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
661 (op & 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
662 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
663 (op & 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
664 {
665 continue;
666
667 /* store parameters in stack via frame pointer */
668 }
669 else if (framep &&
670 ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
671 (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
672 (op & 0xfc1f0000) == 0xfc1f0000))
673 { /* frsp, fp?,NUM(r1) */
674 continue;
675
676 /* Set up frame pointer */
677 }
678 else if (op == 0x603f0000 /* oril r31, r1, 0x0 */
679 || op == 0x7c3f0b78)
680 { /* mr r31, r1 */
681 fdata->frameless = 0;
682 framep = 1;
683 fdata->alloca_reg = 31;
684 continue;
685
686 /* Another way to set up the frame pointer. */
687 }
688 else if ((op & 0xfc1fffff) == 0x38010000)
689 { /* addi rX, r1, 0x0 */
690 fdata->frameless = 0;
691 framep = 1;
692 fdata->alloca_reg = (op & ~0x38010000) >> 21;
693 continue;
694
695 }
696 else
697 {
698 /* Not a recognized prologue instruction.
699 Handle optimizer code motions into the prologue by continuing
700 the search if we have no valid frame yet or if the return
701 address is not yet saved in the frame. */
702 if (fdata->frameless == 0
703 && (lr_reg == -1 || fdata->nosavedpc == 0))
704 break;
705
706 if (op == 0x4e800020 /* blr */
707 || op == 0x4e800420) /* bctr */
708 /* Do not scan past epilogue in frameless functions or
709 trampolines. */
710 break;
711 if ((op & 0xf4000000) == 0x40000000) /* bxx */
712 /* Never skip branches. */
713 break;
714
715 if (num_skip_non_prologue_insns++ > max_skip_non_prologue_insns)
716 /* Do not scan too many insns, scanning insns is expensive with
717 remote targets. */
718 break;
719
720 /* Continue scanning. */
721 prev_insn_was_prologue_insn = 0;
722 continue;
723 }
724 }
725
726 #if 0
727 /* I have problems with skipping over __main() that I need to address
728 * sometime. Previously, I used to use misc_function_vector which
729 * didn't work as well as I wanted to be. -MGO */
730
731 /* If the first thing after skipping a prolog is a branch to a function,
732 this might be a call to an initializer in main(), introduced by gcc2.
733 We'd like to skip over it as well. Fortunately, xlc does some extra
734 work before calling a function right after a prologue, thus we can
735 single out such gcc2 behaviour. */
736
737
738 if ((op & 0xfc000001) == 0x48000001)
739 { /* bl foo, an initializer function? */
740 op = read_memory_integer (pc + 4, 4);
741
742 if (op == 0x4def7b82)
743 { /* cror 0xf, 0xf, 0xf (nop) */
744
745 /* check and see if we are in main. If so, skip over this initializer
746 function as well. */
747
748 tmp = find_pc_misc_function (pc);
749 if (tmp >= 0 && STREQ (misc_function_vector[tmp].name, main_name ()))
750 return pc + 8;
751 }
752 }
753 #endif /* 0 */
754
755 fdata->offset = -fdata->offset;
756 return last_prologue_pc;
757 }
758
759
760 /*************************************************************************
761 Support for creating pushing a dummy frame into the stack, and popping
762 frames, etc.
763 *************************************************************************/
764
765
766 /* Pop the innermost frame, go back to the caller. */
767
768 static void
769 rs6000_pop_frame (void)
770 {
771 CORE_ADDR pc, lr, sp, prev_sp, addr; /* %pc, %lr, %sp */
772 struct rs6000_framedata fdata;
773 struct frame_info *frame = get_current_frame ();
774 int ii, wordsize;
775
776 pc = read_pc ();
777 sp = FRAME_FP (frame);
778
779 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
780 {
781 generic_pop_dummy_frame ();
782 flush_cached_frames ();
783 return;
784 }
785
786 /* Make sure that all registers are valid. */
787 read_register_bytes (0, NULL, REGISTER_BYTES);
788
789 /* figure out previous %pc value. If the function is frameless, it is
790 still in the link register, otherwise walk the frames and retrieve the
791 saved %pc value in the previous frame. */
792
793 addr = get_pc_function_start (frame->pc);
794 (void) skip_prologue (addr, frame->pc, &fdata);
795
796 wordsize = TDEP->wordsize;
797 if (fdata.frameless)
798 prev_sp = sp;
799 else
800 prev_sp = read_memory_addr (sp, wordsize);
801 if (fdata.lr_offset == 0)
802 lr = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum);
803 else
804 lr = read_memory_addr (prev_sp + fdata.lr_offset, wordsize);
805
806 /* reset %pc value. */
807 write_register (PC_REGNUM, lr);
808
809 /* reset register values if any was saved earlier. */
810
811 if (fdata.saved_gpr != -1)
812 {
813 addr = prev_sp + fdata.gpr_offset;
814 for (ii = fdata.saved_gpr; ii <= 31; ++ii)
815 {
816 read_memory (addr, &registers[REGISTER_BYTE (ii)], wordsize);
817 addr += wordsize;
818 }
819 }
820
821 if (fdata.saved_fpr != -1)
822 {
823 addr = prev_sp + fdata.fpr_offset;
824 for (ii = fdata.saved_fpr; ii <= 31; ++ii)
825 {
826 read_memory (addr, &registers[REGISTER_BYTE (ii + FP0_REGNUM)], 8);
827 addr += 8;
828 }
829 }
830
831 write_register (SP_REGNUM, prev_sp);
832 target_store_registers (-1);
833 flush_cached_frames ();
834 }
835
836 /* Fixup the call sequence of a dummy function, with the real function
837 address. Its arguments will be passed by gdb. */
838
839 static void
840 rs6000_fix_call_dummy (char *dummyname, CORE_ADDR pc, CORE_ADDR fun,
841 int nargs, struct value **args, struct type *type,
842 int gcc_p)
843 {
844 #define TOC_ADDR_OFFSET 20
845 #define TARGET_ADDR_OFFSET 28
846
847 int ii;
848 CORE_ADDR target_addr;
849
850 if (rs6000_find_toc_address_hook != NULL)
851 {
852 CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (fun);
853 write_register (gdbarch_tdep (current_gdbarch)->ppc_toc_regnum,
854 tocvalue);
855 }
856 }
857
858 /* Pass the arguments in either registers, or in the stack. In RS/6000,
859 the first eight words of the argument list (that might be less than
860 eight parameters if some parameters occupy more than one word) are
861 passed in r3..r10 registers. float and double parameters are
862 passed in fpr's, in addition to that. Rest of the parameters if any
863 are passed in user stack. There might be cases in which half of the
864 parameter is copied into registers, the other half is pushed into
865 stack.
866
867 Stack must be aligned on 64-bit boundaries when synthesizing
868 function calls.
869
870 If the function is returning a structure, then the return address is passed
871 in r3, then the first 7 words of the parameters can be passed in registers,
872 starting from r4. */
873
874 static CORE_ADDR
875 rs6000_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
876 int struct_return, CORE_ADDR struct_addr)
877 {
878 int ii;
879 int len = 0;
880 int argno; /* current argument number */
881 int argbytes; /* current argument byte */
882 char tmp_buffer[50];
883 int f_argno = 0; /* current floating point argno */
884 int wordsize = TDEP->wordsize;
885
886 struct value *arg = 0;
887 struct type *type;
888
889 CORE_ADDR saved_sp;
890
891 /* The first eight words of ther arguments are passed in registers. Copy
892 them appropriately.
893
894 If the function is returning a `struct', then the first word (which
895 will be passed in r3) is used for struct return address. In that
896 case we should advance one word and start from r4 register to copy
897 parameters. */
898
899 ii = struct_return ? 1 : 0;
900
901 /*
902 effectively indirect call... gcc does...
903
904 return_val example( float, int);
905
906 eabi:
907 float in fp0, int in r3
908 offset of stack on overflow 8/16
909 for varargs, must go by type.
910 power open:
911 float in r3&r4, int in r5
912 offset of stack on overflow different
913 both:
914 return in r3 or f0. If no float, must study how gcc emulates floats;
915 pay attention to arg promotion.
916 User may have to cast\args to handle promotion correctly
917 since gdb won't know if prototype supplied or not.
918 */
919
920 for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii)
921 {
922 int reg_size = REGISTER_RAW_SIZE (ii + 3);
923
924 arg = args[argno];
925 type = check_typedef (VALUE_TYPE (arg));
926 len = TYPE_LENGTH (type);
927
928 if (TYPE_CODE (type) == TYPE_CODE_FLT)
929 {
930
931 /* floating point arguments are passed in fpr's, as well as gpr's.
932 There are 13 fpr's reserved for passing parameters. At this point
933 there is no way we would run out of them. */
934
935 if (len > 8)
936 printf_unfiltered (
937 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
938
939 memcpy (&registers[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)],
940 VALUE_CONTENTS (arg),
941 len);
942 ++f_argno;
943 }
944
945 if (len > reg_size)
946 {
947
948 /* Argument takes more than one register. */
949 while (argbytes < len)
950 {
951 memset (&registers[REGISTER_BYTE (ii + 3)], 0, reg_size);
952 memcpy (&registers[REGISTER_BYTE (ii + 3)],
953 ((char *) VALUE_CONTENTS (arg)) + argbytes,
954 (len - argbytes) > reg_size
955 ? reg_size : len - argbytes);
956 ++ii, argbytes += reg_size;
957
958 if (ii >= 8)
959 goto ran_out_of_registers_for_arguments;
960 }
961 argbytes = 0;
962 --ii;
963 }
964 else
965 { /* Argument can fit in one register. No problem. */
966 int adj = TARGET_BYTE_ORDER == BIG_ENDIAN ? reg_size - len : 0;
967 memset (&registers[REGISTER_BYTE (ii + 3)], 0, reg_size);
968 memcpy ((char *)&registers[REGISTER_BYTE (ii + 3)] + adj,
969 VALUE_CONTENTS (arg), len);
970 }
971 ++argno;
972 }
973
974 ran_out_of_registers_for_arguments:
975
976 saved_sp = read_sp ();
977 #ifndef ELF_OBJECT_FORMAT
978 /* location for 8 parameters are always reserved. */
979 sp -= wordsize * 8;
980
981 /* another six words for back chain, TOC register, link register, etc. */
982 sp -= wordsize * 6;
983
984 /* stack pointer must be quadword aligned */
985 sp &= -16;
986 #endif
987
988 /* if there are more arguments, allocate space for them in
989 the stack, then push them starting from the ninth one. */
990
991 if ((argno < nargs) || argbytes)
992 {
993 int space = 0, jj;
994
995 if (argbytes)
996 {
997 space += ((len - argbytes + 3) & -4);
998 jj = argno + 1;
999 }
1000 else
1001 jj = argno;
1002
1003 for (; jj < nargs; ++jj)
1004 {
1005 struct value *val = args[jj];
1006 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
1007 }
1008
1009 /* add location required for the rest of the parameters */
1010 space = (space + 15) & -16;
1011 sp -= space;
1012
1013 /* This is another instance we need to be concerned about securing our
1014 stack space. If we write anything underneath %sp (r1), we might conflict
1015 with the kernel who thinks he is free to use this area. So, update %sp
1016 first before doing anything else. */
1017
1018 write_register (SP_REGNUM, sp);
1019
1020 /* if the last argument copied into the registers didn't fit there
1021 completely, push the rest of it into stack. */
1022
1023 if (argbytes)
1024 {
1025 write_memory (sp + 24 + (ii * 4),
1026 ((char *) VALUE_CONTENTS (arg)) + argbytes,
1027 len - argbytes);
1028 ++argno;
1029 ii += ((len - argbytes + 3) & -4) / 4;
1030 }
1031
1032 /* push the rest of the arguments into stack. */
1033 for (; argno < nargs; ++argno)
1034 {
1035
1036 arg = args[argno];
1037 type = check_typedef (VALUE_TYPE (arg));
1038 len = TYPE_LENGTH (type);
1039
1040
1041 /* float types should be passed in fpr's, as well as in the stack. */
1042 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13)
1043 {
1044
1045 if (len > 8)
1046 printf_unfiltered (
1047 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
1048
1049 memcpy (&registers[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)],
1050 VALUE_CONTENTS (arg),
1051 len);
1052 ++f_argno;
1053 }
1054
1055 write_memory (sp + 24 + (ii * 4), (char *) VALUE_CONTENTS (arg), len);
1056 ii += ((len + 3) & -4) / 4;
1057 }
1058 }
1059 else
1060 /* Secure stack areas first, before doing anything else. */
1061 write_register (SP_REGNUM, sp);
1062
1063 /* set back chain properly */
1064 store_address (tmp_buffer, 4, saved_sp);
1065 write_memory (sp, tmp_buffer, 4);
1066
1067 target_store_registers (-1);
1068 return sp;
1069 }
1070
1071 /* Function: ppc_push_return_address (pc, sp)
1072 Set up the return address for the inferior function call. */
1073
1074 static CORE_ADDR
1075 ppc_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1076 {
1077 write_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum,
1078 CALL_DUMMY_ADDRESS ());
1079 return sp;
1080 }
1081
1082 /* Extract a function return value of type TYPE from raw register array
1083 REGBUF, and copy that return value into VALBUF in virtual format. */
1084
1085 static void
1086 rs6000_extract_return_value (struct type *valtype, char *regbuf, char *valbuf)
1087 {
1088 int offset = 0;
1089
1090 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
1091 {
1092
1093 double dd;
1094 float ff;
1095 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1096 We need to truncate the return value into float size (4 byte) if
1097 necessary. */
1098
1099 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
1100 memcpy (valbuf,
1101 &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
1102 TYPE_LENGTH (valtype));
1103 else
1104 { /* float */
1105 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
1106 ff = (float) dd;
1107 memcpy (valbuf, &ff, sizeof (float));
1108 }
1109 }
1110 else
1111 {
1112 /* return value is copied starting from r3. */
1113 if (TARGET_BYTE_ORDER == BIG_ENDIAN
1114 && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3))
1115 offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype);
1116
1117 memcpy (valbuf,
1118 regbuf + REGISTER_BYTE (3) + offset,
1119 TYPE_LENGTH (valtype));
1120 }
1121 }
1122
1123 /* Keep structure return address in this variable.
1124 FIXME: This is a horrid kludge which should not be allowed to continue
1125 living. This only allows a single nested call to a structure-returning
1126 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
1127
1128 static CORE_ADDR rs6000_struct_return_address;
1129
1130 /* Return whether handle_inferior_event() should proceed through code
1131 starting at PC in function NAME when stepping.
1132
1133 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1134 handle memory references that are too distant to fit in instructions
1135 generated by the compiler. For example, if 'foo' in the following
1136 instruction:
1137
1138 lwz r9,foo(r2)
1139
1140 is greater than 32767, the linker might replace the lwz with a branch to
1141 somewhere in @FIX1 that does the load in 2 instructions and then branches
1142 back to where execution should continue.
1143
1144 GDB should silently step over @FIX code, just like AIX dbx does.
1145 Unfortunately, the linker uses the "b" instruction for the branches,
1146 meaning that the link register doesn't get set. Therefore, GDB's usual
1147 step_over_function() mechanism won't work.
1148
1149 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1150 in handle_inferior_event() to skip past @FIX code. */
1151
1152 int
1153 rs6000_in_solib_return_trampoline (CORE_ADDR pc, char *name)
1154 {
1155 return name && !strncmp (name, "@FIX", 4);
1156 }
1157
1158 /* Skip code that the user doesn't want to see when stepping:
1159
1160 1. Indirect function calls use a piece of trampoline code to do context
1161 switching, i.e. to set the new TOC table. Skip such code if we are on
1162 its first instruction (as when we have single-stepped to here).
1163
1164 2. Skip shared library trampoline code (which is different from
1165 indirect function call trampolines).
1166
1167 3. Skip bigtoc fixup code.
1168
1169 Result is desired PC to step until, or NULL if we are not in
1170 code that should be skipped. */
1171
1172 CORE_ADDR
1173 rs6000_skip_trampoline_code (CORE_ADDR pc)
1174 {
1175 register unsigned int ii, op;
1176 int rel;
1177 CORE_ADDR solib_target_pc;
1178 struct minimal_symbol *msymbol;
1179
1180 static unsigned trampoline_code[] =
1181 {
1182 0x800b0000, /* l r0,0x0(r11) */
1183 0x90410014, /* st r2,0x14(r1) */
1184 0x7c0903a6, /* mtctr r0 */
1185 0x804b0004, /* l r2,0x4(r11) */
1186 0x816b0008, /* l r11,0x8(r11) */
1187 0x4e800420, /* bctr */
1188 0x4e800020, /* br */
1189 0
1190 };
1191
1192 /* Check for bigtoc fixup code. */
1193 msymbol = lookup_minimal_symbol_by_pc (pc);
1194 if (msymbol && rs6000_in_solib_return_trampoline (pc, SYMBOL_NAME (msymbol)))
1195 {
1196 /* Double-check that the third instruction from PC is relative "b". */
1197 op = read_memory_integer (pc + 8, 4);
1198 if ((op & 0xfc000003) == 0x48000000)
1199 {
1200 /* Extract bits 6-29 as a signed 24-bit relative word address and
1201 add it to the containing PC. */
1202 rel = ((int)(op << 6) >> 6);
1203 return pc + 8 + rel;
1204 }
1205 }
1206
1207 /* If pc is in a shared library trampoline, return its target. */
1208 solib_target_pc = find_solib_trampoline_target (pc);
1209 if (solib_target_pc)
1210 return solib_target_pc;
1211
1212 for (ii = 0; trampoline_code[ii]; ++ii)
1213 {
1214 op = read_memory_integer (pc + (ii * 4), 4);
1215 if (op != trampoline_code[ii])
1216 return 0;
1217 }
1218 ii = read_register (11); /* r11 holds destination addr */
1219 pc = read_memory_addr (ii, TDEP->wordsize); /* (r11) value */
1220 return pc;
1221 }
1222
1223 /* Determines whether the function FI has a frame on the stack or not. */
1224
1225 int
1226 rs6000_frameless_function_invocation (struct frame_info *fi)
1227 {
1228 CORE_ADDR func_start;
1229 struct rs6000_framedata fdata;
1230
1231 /* Don't even think about framelessness except on the innermost frame
1232 or if the function was interrupted by a signal. */
1233 if (fi->next != NULL && !fi->next->signal_handler_caller)
1234 return 0;
1235
1236 func_start = get_pc_function_start (fi->pc);
1237
1238 /* If we failed to find the start of the function, it is a mistake
1239 to inspect the instructions. */
1240
1241 if (!func_start)
1242 {
1243 /* A frame with a zero PC is usually created by dereferencing a NULL
1244 function pointer, normally causing an immediate core dump of the
1245 inferior. Mark function as frameless, as the inferior has no chance
1246 of setting up a stack frame. */
1247 if (fi->pc == 0)
1248 return 1;
1249 else
1250 return 0;
1251 }
1252
1253 (void) skip_prologue (func_start, fi->pc, &fdata);
1254 return fdata.frameless;
1255 }
1256
1257 /* Return the PC saved in a frame */
1258
1259 CORE_ADDR
1260 rs6000_frame_saved_pc (struct frame_info *fi)
1261 {
1262 CORE_ADDR func_start;
1263 struct rs6000_framedata fdata;
1264 int wordsize = TDEP->wordsize;
1265
1266 if (fi->signal_handler_caller)
1267 return read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET, wordsize);
1268
1269 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
1270 return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
1271
1272 func_start = get_pc_function_start (fi->pc);
1273
1274 /* If we failed to find the start of the function, it is a mistake
1275 to inspect the instructions. */
1276 if (!func_start)
1277 return 0;
1278
1279 (void) skip_prologue (func_start, fi->pc, &fdata);
1280
1281 if (fdata.lr_offset == 0 && fi->next != NULL)
1282 {
1283 if (fi->next->signal_handler_caller)
1284 return read_memory_addr (fi->next->frame + SIG_FRAME_LR_OFFSET,
1285 wordsize);
1286 else
1287 return read_memory_addr (FRAME_CHAIN (fi) + DEFAULT_LR_SAVE,
1288 wordsize);
1289 }
1290
1291 if (fdata.lr_offset == 0)
1292 return read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum);
1293
1294 return read_memory_addr (FRAME_CHAIN (fi) + fdata.lr_offset, wordsize);
1295 }
1296
1297 /* If saved registers of frame FI are not known yet, read and cache them.
1298 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1299 in which case the framedata are read. */
1300
1301 static void
1302 frame_get_saved_regs (struct frame_info *fi, struct rs6000_framedata *fdatap)
1303 {
1304 CORE_ADDR frame_addr;
1305 struct rs6000_framedata work_fdata;
1306 int wordsize = TDEP->wordsize;
1307
1308 if (fi->saved_regs)
1309 return;
1310
1311 if (fdatap == NULL)
1312 {
1313 fdatap = &work_fdata;
1314 (void) skip_prologue (get_pc_function_start (fi->pc), fi->pc, fdatap);
1315 }
1316
1317 frame_saved_regs_zalloc (fi);
1318
1319 /* If there were any saved registers, figure out parent's stack
1320 pointer. */
1321 /* The following is true only if the frame doesn't have a call to
1322 alloca(), FIXME. */
1323
1324 if (fdatap->saved_fpr == 0 && fdatap->saved_gpr == 0
1325 && fdatap->lr_offset == 0 && fdatap->cr_offset == 0)
1326 frame_addr = 0;
1327 else if (fi->prev && fi->prev->frame)
1328 frame_addr = fi->prev->frame;
1329 else
1330 frame_addr = read_memory_addr (fi->frame, wordsize);
1331
1332 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1333 All fpr's from saved_fpr to fp31 are saved. */
1334
1335 if (fdatap->saved_fpr >= 0)
1336 {
1337 int i;
1338 CORE_ADDR fpr_addr = frame_addr + fdatap->fpr_offset;
1339 for (i = fdatap->saved_fpr; i < 32; i++)
1340 {
1341 fi->saved_regs[FP0_REGNUM + i] = fpr_addr;
1342 fpr_addr += 8;
1343 }
1344 }
1345
1346 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1347 All gpr's from saved_gpr to gpr31 are saved. */
1348
1349 if (fdatap->saved_gpr >= 0)
1350 {
1351 int i;
1352 CORE_ADDR gpr_addr = frame_addr + fdatap->gpr_offset;
1353 for (i = fdatap->saved_gpr; i < 32; i++)
1354 {
1355 fi->saved_regs[i] = gpr_addr;
1356 gpr_addr += wordsize;
1357 }
1358 }
1359
1360 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1361 the CR. */
1362 if (fdatap->cr_offset != 0)
1363 fi->saved_regs[gdbarch_tdep (current_gdbarch)->ppc_cr_regnum] =
1364 frame_addr + fdatap->cr_offset;
1365
1366 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1367 the LR. */
1368 if (fdatap->lr_offset != 0)
1369 fi->saved_regs[gdbarch_tdep (current_gdbarch)->ppc_lr_regnum] =
1370 frame_addr + fdatap->lr_offset;
1371 }
1372
1373 /* Return the address of a frame. This is the inital %sp value when the frame
1374 was first allocated. For functions calling alloca(), it might be saved in
1375 an alloca register. */
1376
1377 static CORE_ADDR
1378 frame_initial_stack_address (struct frame_info *fi)
1379 {
1380 CORE_ADDR tmpaddr;
1381 struct rs6000_framedata fdata;
1382 struct frame_info *callee_fi;
1383
1384 /* if the initial stack pointer (frame address) of this frame is known,
1385 just return it. */
1386
1387 if (fi->extra_info->initial_sp)
1388 return fi->extra_info->initial_sp;
1389
1390 /* find out if this function is using an alloca register.. */
1391
1392 (void) skip_prologue (get_pc_function_start (fi->pc), fi->pc, &fdata);
1393
1394 /* if saved registers of this frame are not known yet, read and cache them. */
1395
1396 if (!fi->saved_regs)
1397 frame_get_saved_regs (fi, &fdata);
1398
1399 /* If no alloca register used, then fi->frame is the value of the %sp for
1400 this frame, and it is good enough. */
1401
1402 if (fdata.alloca_reg < 0)
1403 {
1404 fi->extra_info->initial_sp = fi->frame;
1405 return fi->extra_info->initial_sp;
1406 }
1407
1408 /* This function has an alloca register. If this is the top-most frame
1409 (with the lowest address), the value in alloca register is good. */
1410
1411 if (!fi->next)
1412 return fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
1413
1414 /* Otherwise, this is a caller frame. Callee has usually already saved
1415 registers, but there are exceptions (such as when the callee
1416 has no parameters). Find the address in which caller's alloca
1417 register is saved. */
1418
1419 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next)
1420 {
1421
1422 if (!callee_fi->saved_regs)
1423 frame_get_saved_regs (callee_fi, NULL);
1424
1425 /* this is the address in which alloca register is saved. */
1426
1427 tmpaddr = callee_fi->saved_regs[fdata.alloca_reg];
1428 if (tmpaddr)
1429 {
1430 fi->extra_info->initial_sp =
1431 read_memory_addr (tmpaddr, TDEP->wordsize);
1432 return fi->extra_info->initial_sp;
1433 }
1434
1435 /* Go look into deeper levels of the frame chain to see if any one of
1436 the callees has saved alloca register. */
1437 }
1438
1439 /* If alloca register was not saved, by the callee (or any of its callees)
1440 then the value in the register is still good. */
1441
1442 fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
1443 return fi->extra_info->initial_sp;
1444 }
1445
1446 /* Describe the pointer in each stack frame to the previous stack frame
1447 (its caller). */
1448
1449 /* FRAME_CHAIN takes a frame's nominal address
1450 and produces the frame's chain-pointer. */
1451
1452 /* In the case of the RS/6000, the frame's nominal address
1453 is the address of a 4-byte word containing the calling frame's address. */
1454
1455 CORE_ADDR
1456 rs6000_frame_chain (struct frame_info *thisframe)
1457 {
1458 CORE_ADDR fp, fpp, lr;
1459 int wordsize = TDEP->wordsize;
1460
1461 if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame))
1462 return thisframe->frame; /* dummy frame same as caller's frame */
1463
1464 if (inside_entry_file (thisframe->pc) ||
1465 thisframe->pc == entry_point_address ())
1466 return 0;
1467
1468 if (thisframe->signal_handler_caller)
1469 fp = read_memory_addr (thisframe->frame + SIG_FRAME_FP_OFFSET,
1470 wordsize);
1471 else if (thisframe->next != NULL
1472 && thisframe->next->signal_handler_caller
1473 && FRAMELESS_FUNCTION_INVOCATION (thisframe))
1474 /* A frameless function interrupted by a signal did not change the
1475 frame pointer. */
1476 fp = FRAME_FP (thisframe);
1477 else
1478 fp = read_memory_addr ((thisframe)->frame, wordsize);
1479
1480 lr = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum);
1481 if (lr == entry_point_address ())
1482 if (fp != 0 && (fpp = read_memory_addr (fp, wordsize)) != 0)
1483 if (PC_IN_CALL_DUMMY (lr, fpp, fpp))
1484 return fpp;
1485
1486 return fp;
1487 }
1488
1489 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1490 isn't available with that word size, return 0. */
1491
1492 static int
1493 regsize (const struct reg *reg, int wordsize)
1494 {
1495 return wordsize == 8 ? reg->sz64 : reg->sz32;
1496 }
1497
1498 /* Return the name of register number N, or null if no such register exists
1499 in the current architecture. */
1500
1501 static char *
1502 rs6000_register_name (int n)
1503 {
1504 struct gdbarch_tdep *tdep = TDEP;
1505 const struct reg *reg = tdep->regs + n;
1506
1507 if (!regsize (reg, tdep->wordsize))
1508 return NULL;
1509 return reg->name;
1510 }
1511
1512 /* Index within `registers' of the first byte of the space for
1513 register N. */
1514
1515 static int
1516 rs6000_register_byte (int n)
1517 {
1518 return TDEP->regoff[n];
1519 }
1520
1521 /* Return the number of bytes of storage in the actual machine representation
1522 for register N if that register is available, else return 0. */
1523
1524 static int
1525 rs6000_register_raw_size (int n)
1526 {
1527 struct gdbarch_tdep *tdep = TDEP;
1528 const struct reg *reg = tdep->regs + n;
1529 return regsize (reg, tdep->wordsize);
1530 }
1531
1532 /* Return the GDB type object for the "standard" data type
1533 of data in register N. */
1534
1535 static struct type *
1536 rs6000_register_virtual_type (int n)
1537 {
1538 struct gdbarch_tdep *tdep = TDEP;
1539 const struct reg *reg = tdep->regs + n;
1540
1541 return reg->fpr ? builtin_type_double :
1542 regsize (reg, tdep->wordsize) == 8 ? builtin_type_int64 :
1543 builtin_type_int32;
1544 }
1545
1546 /* For the PowerPC, it appears that the debug info marks float parameters as
1547 floats regardless of whether the function is prototyped, but the actual
1548 values are always passed in as doubles. Tell gdb to always assume that
1549 floats are passed as doubles and then converted in the callee. */
1550
1551 static int
1552 rs6000_coerce_float_to_double (struct type *formal, struct type *actual)
1553 {
1554 return 1;
1555 }
1556
1557 /* Return whether register N requires conversion when moving from raw format
1558 to virtual format.
1559
1560 The register format for RS/6000 floating point registers is always
1561 double, we need a conversion if the memory format is float. */
1562
1563 static int
1564 rs6000_register_convertible (int n)
1565 {
1566 const struct reg *reg = TDEP->regs + n;
1567 return reg->fpr;
1568 }
1569
1570 /* Convert data from raw format for register N in buffer FROM
1571 to virtual format with type TYPE in buffer TO. */
1572
1573 static void
1574 rs6000_register_convert_to_virtual (int n, struct type *type,
1575 char *from, char *to)
1576 {
1577 if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n))
1578 {
1579 double val = extract_floating (from, REGISTER_RAW_SIZE (n));
1580 store_floating (to, TYPE_LENGTH (type), val);
1581 }
1582 else
1583 memcpy (to, from, REGISTER_RAW_SIZE (n));
1584 }
1585
1586 /* Convert data from virtual format with type TYPE in buffer FROM
1587 to raw format for register N in buffer TO. */
1588
1589 static void
1590 rs6000_register_convert_to_raw (struct type *type, int n,
1591 char *from, char *to)
1592 {
1593 if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n))
1594 {
1595 double val = extract_floating (from, TYPE_LENGTH (type));
1596 store_floating (to, REGISTER_RAW_SIZE (n), val);
1597 }
1598 else
1599 memcpy (to, from, REGISTER_RAW_SIZE (n));
1600 }
1601
1602 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1603 REGNUM. */
1604 static int
1605 rs6000_stab_reg_to_regnum (int num)
1606 {
1607 int regnum;
1608 switch (num)
1609 {
1610 case 64:
1611 regnum = gdbarch_tdep (current_gdbarch)->ppc_mq_regnum;
1612 break;
1613 case 65:
1614 regnum = gdbarch_tdep (current_gdbarch)->ppc_lr_regnum;
1615 break;
1616 case 66:
1617 regnum = gdbarch_tdep (current_gdbarch)->ppc_ctr_regnum;
1618 break;
1619 case 76:
1620 regnum = gdbarch_tdep (current_gdbarch)->ppc_xer_regnum;
1621 break;
1622 default:
1623 regnum = num;
1624 break;
1625 }
1626 return regnum;
1627 }
1628
1629 /* Store the address of the place in which to copy the structure the
1630 subroutine will return. This is called from call_function.
1631
1632 In RS/6000, struct return addresses are passed as an extra parameter in r3.
1633 In function return, callee is not responsible of returning this address
1634 back. Since gdb needs to find it, we will store in a designated variable
1635 `rs6000_struct_return_address'. */
1636
1637 static void
1638 rs6000_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1639 {
1640 write_register (3, addr);
1641 rs6000_struct_return_address = addr;
1642 }
1643
1644 /* Write into appropriate registers a function return value
1645 of type TYPE, given in virtual format. */
1646
1647 static void
1648 rs6000_store_return_value (struct type *type, char *valbuf)
1649 {
1650 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1651
1652 /* Floating point values are returned starting from FPR1 and up.
1653 Say a double_double_double type could be returned in
1654 FPR1/FPR2/FPR3 triple. */
1655
1656 write_register_bytes (REGISTER_BYTE (FP0_REGNUM + 1), valbuf,
1657 TYPE_LENGTH (type));
1658 else
1659 /* Everything else is returned in GPR3 and up. */
1660 write_register_bytes (REGISTER_BYTE (gdbarch_tdep (current_gdbarch)->ppc_gp0_regnum + 3),
1661 valbuf, TYPE_LENGTH (type));
1662 }
1663
1664 /* Extract from an array REGBUF containing the (raw) register state
1665 the address in which a function should return its structure value,
1666 as a CORE_ADDR (or an expression that can be used as one). */
1667
1668 static CORE_ADDR
1669 rs6000_extract_struct_value_address (char *regbuf)
1670 {
1671 return rs6000_struct_return_address;
1672 }
1673
1674 /* Return whether PC is in a dummy function call.
1675
1676 FIXME: This just checks for the end of the stack, which is broken
1677 for things like stepping through gcc nested function stubs. */
1678
1679 static int
1680 rs6000_pc_in_call_dummy (CORE_ADDR pc, CORE_ADDR sp, CORE_ADDR fp)
1681 {
1682 return sp < pc && pc < fp;
1683 }
1684
1685 /* Hook called when a new child process is started. */
1686
1687 void
1688 rs6000_create_inferior (int pid)
1689 {
1690 if (rs6000_set_host_arch_hook)
1691 rs6000_set_host_arch_hook (pid);
1692 }
1693 \f
1694 /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
1695
1696 Usually a function pointer's representation is simply the address
1697 of the function. On the RS/6000 however, a function pointer is
1698 represented by a pointer to a TOC entry. This TOC entry contains
1699 three words, the first word is the address of the function, the
1700 second word is the TOC pointer (r2), and the third word is the
1701 static chain value. Throughout GDB it is currently assumed that a
1702 function pointer contains the address of the function, which is not
1703 easy to fix. In addition, the conversion of a function address to
1704 a function pointer would require allocation of a TOC entry in the
1705 inferior's memory space, with all its drawbacks. To be able to
1706 call C++ virtual methods in the inferior (which are called via
1707 function pointers), find_function_addr uses this function to get the
1708 function address from a function pointer. */
1709
1710 /* Return real function address if ADDR (a function pointer) is in the data
1711 space and is therefore a special function pointer. */
1712
1713 CORE_ADDR
1714 rs6000_convert_from_func_ptr_addr (CORE_ADDR addr)
1715 {
1716 struct obj_section *s;
1717
1718 s = find_pc_section (addr);
1719 if (s && s->the_bfd_section->flags & SEC_CODE)
1720 return addr;
1721
1722 /* ADDR is in the data space, so it's a special function pointer. */
1723 return read_memory_addr (addr, TDEP->wordsize);
1724 }
1725 \f
1726
1727 /* Handling the various POWER/PowerPC variants. */
1728
1729
1730 /* The arrays here called registers_MUMBLE hold information about available
1731 registers.
1732
1733 For each family of PPC variants, I've tried to isolate out the
1734 common registers and put them up front, so that as long as you get
1735 the general family right, GDB will correctly identify the registers
1736 common to that family. The common register sets are:
1737
1738 For the 60x family: hid0 hid1 iabr dabr pir
1739
1740 For the 505 and 860 family: eie eid nri
1741
1742 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
1743 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
1744 pbu1 pbl2 pbu2
1745
1746 Most of these register groups aren't anything formal. I arrived at
1747 them by looking at the registers that occurred in more than one
1748 processor. */
1749
1750 /* Convenience macros for populating register arrays. */
1751
1752 /* Within another macro, convert S to a string. */
1753
1754 #define STR(s) #s
1755
1756 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
1757 and 64 bits on 64-bit systems. */
1758 #define R(name) { STR(name), 4, 8, 0 }
1759
1760 /* Return a struct reg defining register NAME that's 32 bits on all
1761 systems. */
1762 #define R4(name) { STR(name), 4, 4, 0 }
1763
1764 /* Return a struct reg defining register NAME that's 64 bits on all
1765 systems. */
1766 #define R8(name) { STR(name), 8, 8, 0 }
1767
1768 /* Return a struct reg defining floating-point register NAME. */
1769 #define F(name) { STR(name), 8, 8, 1 }
1770
1771 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
1772 systems and that doesn't exist on 64-bit systems. */
1773 #define R32(name) { STR(name), 4, 0, 0 }
1774
1775 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
1776 systems and that doesn't exist on 32-bit systems. */
1777 #define R64(name) { STR(name), 0, 8, 0 }
1778
1779 /* Return a struct reg placeholder for a register that doesn't exist. */
1780 #define R0 { 0, 0, 0, 0 }
1781
1782 /* UISA registers common across all architectures, including POWER. */
1783
1784 #define COMMON_UISA_REGS \
1785 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
1786 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
1787 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
1788 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
1789 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
1790 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
1791 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
1792 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
1793 /* 64 */ R(pc), R(ps)
1794
1795 /* UISA-level SPRs for PowerPC. */
1796 #define PPC_UISA_SPRS \
1797 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
1798
1799 /* Segment registers, for PowerPC. */
1800 #define PPC_SEGMENT_REGS \
1801 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
1802 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
1803 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
1804 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
1805
1806 /* OEA SPRs for PowerPC. */
1807 #define PPC_OEA_SPRS \
1808 /* 87 */ R4(pvr), \
1809 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
1810 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
1811 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
1812 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
1813 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
1814 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
1815 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
1816 /* 116 */ R4(dec), R(dabr), R4(ear)
1817
1818 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
1819 user-level SPR's. */
1820 static const struct reg registers_power[] =
1821 {
1822 COMMON_UISA_REGS,
1823 /* 66 */ R4(cnd), R(lr), R(cnt), R4(xer), R4(mq)
1824 };
1825
1826 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
1827 view of the PowerPC. */
1828 static const struct reg registers_powerpc[] =
1829 {
1830 COMMON_UISA_REGS,
1831 PPC_UISA_SPRS
1832 };
1833
1834 /* IBM PowerPC 403. */
1835 static const struct reg registers_403[] =
1836 {
1837 COMMON_UISA_REGS,
1838 PPC_UISA_SPRS,
1839 PPC_SEGMENT_REGS,
1840 PPC_OEA_SPRS,
1841 /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr),
1842 /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit),
1843 /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3),
1844 /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2),
1845 /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr),
1846 /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2)
1847 };
1848
1849 /* IBM PowerPC 403GC. */
1850 static const struct reg registers_403GC[] =
1851 {
1852 COMMON_UISA_REGS,
1853 PPC_UISA_SPRS,
1854 PPC_SEGMENT_REGS,
1855 PPC_OEA_SPRS,
1856 /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr),
1857 /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit),
1858 /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3),
1859 /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2),
1860 /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr),
1861 /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2),
1862 /* 143 */ R(zpr), R(pid), R(sgr), R(dcwr),
1863 /* 147 */ R(tbhu), R(tblu)
1864 };
1865
1866 /* Motorola PowerPC 505. */
1867 static const struct reg registers_505[] =
1868 {
1869 COMMON_UISA_REGS,
1870 PPC_UISA_SPRS,
1871 PPC_SEGMENT_REGS,
1872 PPC_OEA_SPRS,
1873 /* 119 */ R(eie), R(eid), R(nri)
1874 };
1875
1876 /* Motorola PowerPC 860 or 850. */
1877 static const struct reg registers_860[] =
1878 {
1879 COMMON_UISA_REGS,
1880 PPC_UISA_SPRS,
1881 PPC_SEGMENT_REGS,
1882 PPC_OEA_SPRS,
1883 /* 119 */ R(eie), R(eid), R(nri), R(cmpa),
1884 /* 123 */ R(cmpb), R(cmpc), R(cmpd), R(icr),
1885 /* 127 */ R(der), R(counta), R(countb), R(cmpe),
1886 /* 131 */ R(cmpf), R(cmpg), R(cmph), R(lctrl1),
1887 /* 135 */ R(lctrl2), R(ictrl), R(bar), R(ic_cst),
1888 /* 139 */ R(ic_adr), R(ic_dat), R(dc_cst), R(dc_adr),
1889 /* 143 */ R(dc_dat), R(dpdr), R(dpir), R(immr),
1890 /* 147 */ R(mi_ctr), R(mi_ap), R(mi_epn), R(mi_twc),
1891 /* 151 */ R(mi_rpn), R(md_ctr), R(m_casid), R(md_ap),
1892 /* 155 */ R(md_epn), R(md_twb), R(md_twc), R(md_rpn),
1893 /* 159 */ R(m_tw), R(mi_dbcam), R(mi_dbram0), R(mi_dbram1),
1894 /* 163 */ R(md_dbcam), R(md_dbram0), R(md_dbram1)
1895 };
1896
1897 /* Motorola PowerPC 601. Note that the 601 has different register numbers
1898 for reading and writing RTCU and RTCL. However, how one reads and writes a
1899 register is the stub's problem. */
1900 static const struct reg registers_601[] =
1901 {
1902 COMMON_UISA_REGS,
1903 PPC_UISA_SPRS,
1904 PPC_SEGMENT_REGS,
1905 PPC_OEA_SPRS,
1906 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
1907 /* 123 */ R(pir), R(mq), R(rtcu), R(rtcl)
1908 };
1909
1910 /* Motorola PowerPC 602. */
1911 static const struct reg registers_602[] =
1912 {
1913 COMMON_UISA_REGS,
1914 PPC_UISA_SPRS,
1915 PPC_SEGMENT_REGS,
1916 PPC_OEA_SPRS,
1917 /* 119 */ R(hid0), R(hid1), R(iabr), R0,
1918 /* 123 */ R0, R(tcr), R(ibr), R(esassr),
1919 /* 127 */ R(sebr), R(ser), R(sp), R(lt)
1920 };
1921
1922 /* Motorola/IBM PowerPC 603 or 603e. */
1923 static const struct reg registers_603[] =
1924 {
1925 COMMON_UISA_REGS,
1926 PPC_UISA_SPRS,
1927 PPC_SEGMENT_REGS,
1928 PPC_OEA_SPRS,
1929 /* 119 */ R(hid0), R(hid1), R(iabr), R0,
1930 /* 123 */ R0, R(dmiss), R(dcmp), R(hash1),
1931 /* 127 */ R(hash2), R(imiss), R(icmp), R(rpa)
1932 };
1933
1934 /* Motorola PowerPC 604 or 604e. */
1935 static const struct reg registers_604[] =
1936 {
1937 COMMON_UISA_REGS,
1938 PPC_UISA_SPRS,
1939 PPC_SEGMENT_REGS,
1940 PPC_OEA_SPRS,
1941 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
1942 /* 123 */ R(pir), R(mmcr0), R(pmc1), R(pmc2),
1943 /* 127 */ R(sia), R(sda)
1944 };
1945
1946 /* Motorola/IBM PowerPC 750 or 740. */
1947 static const struct reg registers_750[] =
1948 {
1949 COMMON_UISA_REGS,
1950 PPC_UISA_SPRS,
1951 PPC_SEGMENT_REGS,
1952 PPC_OEA_SPRS,
1953 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
1954 /* 123 */ R0, R(ummcr0), R(upmc1), R(upmc2),
1955 /* 127 */ R(usia), R(ummcr1), R(upmc3), R(upmc4),
1956 /* 131 */ R(mmcr0), R(pmc1), R(pmc2), R(sia),
1957 /* 135 */ R(mmcr1), R(pmc3), R(pmc4), R(l2cr),
1958 /* 139 */ R(ictc), R(thrm1), R(thrm2), R(thrm3)
1959 };
1960
1961
1962 /* Information about a particular processor variant. */
1963
1964 struct variant
1965 {
1966 /* Name of this variant. */
1967 char *name;
1968
1969 /* English description of the variant. */
1970 char *description;
1971
1972 /* bfd_arch_info.arch corresponding to variant. */
1973 enum bfd_architecture arch;
1974
1975 /* bfd_arch_info.mach corresponding to variant. */
1976 unsigned long mach;
1977
1978 /* Table of register names; registers[R] is the name of the register
1979 number R. */
1980 int nregs;
1981 const struct reg *regs;
1982 };
1983
1984 #define num_registers(list) (sizeof (list) / sizeof((list)[0]))
1985
1986
1987 /* Information in this table comes from the following web sites:
1988 IBM: http://www.chips.ibm.com:80/products/embedded/
1989 Motorola: http://www.mot.com/SPS/PowerPC/
1990
1991 I'm sure I've got some of the variant descriptions not quite right.
1992 Please report any inaccuracies you find to GDB's maintainer.
1993
1994 If you add entries to this table, please be sure to allow the new
1995 value as an argument to the --with-cpu flag, in configure.in. */
1996
1997 static const struct variant variants[] =
1998 {
1999 {"powerpc", "PowerPC user-level", bfd_arch_powerpc,
2000 bfd_mach_ppc, num_registers (registers_powerpc), registers_powerpc},
2001 {"power", "POWER user-level", bfd_arch_rs6000,
2002 bfd_mach_rs6k, num_registers (registers_power), registers_power},
2003 {"403", "IBM PowerPC 403", bfd_arch_powerpc,
2004 bfd_mach_ppc_403, num_registers (registers_403), registers_403},
2005 {"601", "Motorola PowerPC 601", bfd_arch_powerpc,
2006 bfd_mach_ppc_601, num_registers (registers_601), registers_601},
2007 {"602", "Motorola PowerPC 602", bfd_arch_powerpc,
2008 bfd_mach_ppc_602, num_registers (registers_602), registers_602},
2009 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc,
2010 bfd_mach_ppc_603, num_registers (registers_603), registers_603},
2011 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc,
2012 604, num_registers (registers_604), registers_604},
2013 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc,
2014 bfd_mach_ppc_403gc, num_registers (registers_403GC), registers_403GC},
2015 {"505", "Motorola PowerPC 505", bfd_arch_powerpc,
2016 bfd_mach_ppc_505, num_registers (registers_505), registers_505},
2017 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc,
2018 bfd_mach_ppc_860, num_registers (registers_860), registers_860},
2019 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc,
2020 bfd_mach_ppc_750, num_registers (registers_750), registers_750},
2021
2022 /* FIXME: I haven't checked the register sets of the following. */
2023 {"620", "Motorola PowerPC 620", bfd_arch_powerpc,
2024 bfd_mach_ppc_620, num_registers (registers_powerpc), registers_powerpc},
2025 {"a35", "PowerPC A35", bfd_arch_powerpc,
2026 bfd_mach_ppc_a35, num_registers (registers_powerpc), registers_powerpc},
2027 {"rs1", "IBM POWER RS1", bfd_arch_rs6000,
2028 bfd_mach_rs6k_rs1, num_registers (registers_power), registers_power},
2029 {"rsc", "IBM POWER RSC", bfd_arch_rs6000,
2030 bfd_mach_rs6k_rsc, num_registers (registers_power), registers_power},
2031 {"rs2", "IBM POWER RS2", bfd_arch_rs6000,
2032 bfd_mach_rs6k_rs2, num_registers (registers_power), registers_power},
2033
2034 {0, 0, 0, 0}
2035 };
2036
2037 #undef num_registers
2038
2039 /* Look up the variant named NAME in the `variants' table. Return a
2040 pointer to the struct variant, or null if we couldn't find it. */
2041
2042 static const struct variant *
2043 find_variant_by_name (char *name)
2044 {
2045 const struct variant *v;
2046
2047 for (v = variants; v->name; v++)
2048 if (!strcmp (name, v->name))
2049 return v;
2050
2051 return NULL;
2052 }
2053
2054 /* Return the variant corresponding to architecture ARCH and machine number
2055 MACH. If no such variant exists, return null. */
2056
2057 static const struct variant *
2058 find_variant_by_arch (enum bfd_architecture arch, unsigned long mach)
2059 {
2060 const struct variant *v;
2061
2062 for (v = variants; v->name; v++)
2063 if (arch == v->arch && mach == v->mach)
2064 return v;
2065
2066 return NULL;
2067 }
2068
2069
2070
2071 \f
2072 static void
2073 process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
2074 {
2075 int *os_ident_ptr = obj;
2076 const char *name;
2077 unsigned int sectsize;
2078
2079 name = bfd_get_section_name (abfd, sect);
2080 sectsize = bfd_section_size (abfd, sect);
2081 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
2082 {
2083 unsigned int name_length, data_length, note_type;
2084 char *note = alloca (sectsize);
2085
2086 bfd_get_section_contents (abfd, sect, note,
2087 (file_ptr) 0, (bfd_size_type) sectsize);
2088
2089 name_length = bfd_h_get_32 (abfd, note);
2090 data_length = bfd_h_get_32 (abfd, note + 4);
2091 note_type = bfd_h_get_32 (abfd, note + 8);
2092
2093 if (name_length == 4 && data_length == 16 && note_type == 1
2094 && strcmp (note + 12, "GNU") == 0)
2095 {
2096 int os_number = bfd_h_get_32 (abfd, note + 16);
2097
2098 /* The case numbers are from abi-tags in glibc */
2099 switch (os_number)
2100 {
2101 case 0 :
2102 *os_ident_ptr = ELFOSABI_LINUX;
2103 break;
2104 case 1 :
2105 *os_ident_ptr = ELFOSABI_HURD;
2106 break;
2107 case 2 :
2108 *os_ident_ptr = ELFOSABI_SOLARIS;
2109 break;
2110 default :
2111 internal_error (__FILE__, __LINE__,
2112 "process_note_abi_sections: unknown OS number %d",
2113 os_number);
2114 break;
2115 }
2116 }
2117 }
2118 }
2119
2120 /* Return one of the ELFOSABI_ constants for BFDs representing ELF
2121 executables. If it's not an ELF executable or if the OS/ABI couldn't
2122 be determined, simply return -1. */
2123
2124 static int
2125 get_elfosabi (bfd *abfd)
2126 {
2127 int elfosabi = -1;
2128
2129 if (abfd != NULL && bfd_get_flavour (abfd) == bfd_target_elf_flavour)
2130 {
2131 elfosabi = elf_elfheader (abfd)->e_ident[EI_OSABI];
2132
2133 /* When elfosabi is 0 (ELFOSABI_NONE), this is supposed to indicate
2134 that we're on a SYSV system. However, GNU/Linux uses a note section
2135 to record OS/ABI info, but leaves e_ident[EI_OSABI] zero. So we
2136 have to check the note sections too. */
2137 if (elfosabi == 0)
2138 {
2139 bfd_map_over_sections (abfd,
2140 process_note_abi_tag_sections,
2141 &elfosabi);
2142 }
2143 }
2144
2145 return elfosabi;
2146 }
2147
2148 \f
2149
2150 /* Initialize the current architecture based on INFO. If possible, re-use an
2151 architecture from ARCHES, which is a list of architectures already created
2152 during this debugging session.
2153
2154 Called e.g. at program startup, when reading a core file, and when reading
2155 a binary file. */
2156
2157 static struct gdbarch *
2158 rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2159 {
2160 struct gdbarch *gdbarch;
2161 struct gdbarch_tdep *tdep;
2162 int wordsize, from_xcoff_exec, from_elf_exec, power, i, off;
2163 struct reg *regs;
2164 const struct variant *v;
2165 enum bfd_architecture arch;
2166 unsigned long mach;
2167 bfd abfd;
2168 int osabi, sysv_abi;
2169
2170 from_xcoff_exec = info.abfd && info.abfd->format == bfd_object &&
2171 bfd_get_flavour (info.abfd) == bfd_target_xcoff_flavour;
2172
2173 from_elf_exec = info.abfd && info.abfd->format == bfd_object &&
2174 bfd_get_flavour (info.abfd) == bfd_target_elf_flavour;
2175
2176 sysv_abi = info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour;
2177
2178 osabi = get_elfosabi (info.abfd);
2179
2180 /* Check word size. If INFO is from a binary file, infer it from
2181 that, else choose a likely default. */
2182 if (from_xcoff_exec)
2183 {
2184 if (xcoff_data (info.abfd)->xcoff64)
2185 wordsize = 8;
2186 else
2187 wordsize = 4;
2188 }
2189 else if (from_elf_exec)
2190 {
2191 if (elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64)
2192 wordsize = 8;
2193 else
2194 wordsize = 4;
2195 }
2196 else
2197 {
2198 wordsize = 4;
2199 }
2200
2201 /* Find a candidate among extant architectures. */
2202 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2203 arches != NULL;
2204 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2205 {
2206 /* Word size in the various PowerPC bfd_arch_info structs isn't
2207 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2208 separate word size check. */
2209 tdep = gdbarch_tdep (arches->gdbarch);
2210 if (tdep && tdep->wordsize == wordsize && tdep->osabi == osabi)
2211 return arches->gdbarch;
2212 }
2213
2214 /* None found, create a new architecture from INFO, whose bfd_arch_info
2215 validity depends on the source:
2216 - executable useless
2217 - rs6000_host_arch() good
2218 - core file good
2219 - "set arch" trust blindly
2220 - GDB startup useless but harmless */
2221
2222 if (!from_xcoff_exec)
2223 {
2224 arch = info.bfd_arch_info->arch;
2225 mach = info.bfd_arch_info->mach;
2226 }
2227 else
2228 {
2229 arch = bfd_arch_powerpc;
2230 mach = 0;
2231 bfd_default_set_arch_mach (&abfd, arch, mach);
2232 info.bfd_arch_info = bfd_get_arch_info (&abfd);
2233 }
2234 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2235 tdep->wordsize = wordsize;
2236 tdep->osabi = osabi;
2237 gdbarch = gdbarch_alloc (&info, tdep);
2238 power = arch == bfd_arch_rs6000;
2239
2240 /* Select instruction printer. */
2241 tm_print_insn = arch == power ? print_insn_rs6000 :
2242 info.byte_order == BIG_ENDIAN ? print_insn_big_powerpc :
2243 print_insn_little_powerpc;
2244
2245 /* Choose variant. */
2246 v = find_variant_by_arch (arch, mach);
2247 if (!v)
2248 v = find_variant_by_name (power ? "power" : "powerpc");
2249 tdep->regs = v->regs;
2250
2251 tdep->ppc_gp0_regnum = 0;
2252 tdep->ppc_gplast_regnum = 31;
2253 tdep->ppc_toc_regnum = 2;
2254 tdep->ppc_ps_regnum = 65;
2255 tdep->ppc_cr_regnum = 66;
2256 tdep->ppc_lr_regnum = 67;
2257 tdep->ppc_ctr_regnum = 68;
2258 tdep->ppc_xer_regnum = 69;
2259 if (v->mach == bfd_mach_ppc_601)
2260 tdep->ppc_mq_regnum = 124;
2261 else
2262 tdep->ppc_mq_regnum = 70;
2263
2264 /* Calculate byte offsets in raw register array. */
2265 tdep->regoff = xmalloc (v->nregs * sizeof (int));
2266 for (i = off = 0; i < v->nregs; i++)
2267 {
2268 tdep->regoff[i] = off;
2269 off += regsize (v->regs + i, wordsize);
2270 }
2271
2272 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
2273 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2274 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
2275 set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
2276 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2277 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2278
2279 set_gdbarch_num_regs (gdbarch, v->nregs);
2280 set_gdbarch_sp_regnum (gdbarch, 1);
2281 set_gdbarch_fp_regnum (gdbarch, 1);
2282 set_gdbarch_pc_regnum (gdbarch, 64);
2283 set_gdbarch_register_name (gdbarch, rs6000_register_name);
2284 set_gdbarch_register_size (gdbarch, wordsize);
2285 set_gdbarch_register_bytes (gdbarch, off);
2286 set_gdbarch_register_byte (gdbarch, rs6000_register_byte);
2287 set_gdbarch_register_raw_size (gdbarch, rs6000_register_raw_size);
2288 set_gdbarch_max_register_raw_size (gdbarch, 8);
2289 set_gdbarch_register_virtual_size (gdbarch, generic_register_virtual_size);
2290 set_gdbarch_max_register_virtual_size (gdbarch, 8);
2291 set_gdbarch_register_virtual_type (gdbarch, rs6000_register_virtual_type);
2292
2293 set_gdbarch_ptr_bit (gdbarch, wordsize * TARGET_CHAR_BIT);
2294 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2295 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2296 set_gdbarch_long_bit (gdbarch, wordsize * TARGET_CHAR_BIT);
2297 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2298 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2299 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2300 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2301
2302 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2303 set_gdbarch_call_dummy_length (gdbarch, 0);
2304 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2305 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2306 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2307 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2308 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2309 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2310 set_gdbarch_call_dummy_p (gdbarch, 1);
2311 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2312 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
2313 set_gdbarch_fix_call_dummy (gdbarch, rs6000_fix_call_dummy);
2314 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2315 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
2316 set_gdbarch_push_return_address (gdbarch, ppc_push_return_address);
2317 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2318 set_gdbarch_coerce_float_to_double (gdbarch, rs6000_coerce_float_to_double);
2319
2320 set_gdbarch_register_convertible (gdbarch, rs6000_register_convertible);
2321 set_gdbarch_register_convert_to_virtual (gdbarch, rs6000_register_convert_to_virtual);
2322 set_gdbarch_register_convert_to_raw (gdbarch, rs6000_register_convert_to_raw);
2323 set_gdbarch_stab_reg_to_regnum (gdbarch, rs6000_stab_reg_to_regnum);
2324
2325 set_gdbarch_extract_return_value (gdbarch, rs6000_extract_return_value);
2326
2327 if (sysv_abi)
2328 set_gdbarch_push_arguments (gdbarch, ppc_sysv_abi_push_arguments);
2329 else
2330 set_gdbarch_push_arguments (gdbarch, rs6000_push_arguments);
2331
2332 set_gdbarch_store_struct_return (gdbarch, rs6000_store_struct_return);
2333 set_gdbarch_store_return_value (gdbarch, rs6000_store_return_value);
2334 set_gdbarch_extract_struct_value_address (gdbarch, rs6000_extract_struct_value_address);
2335 set_gdbarch_use_struct_convention (gdbarch, generic_use_struct_convention);
2336
2337 set_gdbarch_pop_frame (gdbarch, rs6000_pop_frame);
2338
2339 set_gdbarch_skip_prologue (gdbarch, rs6000_skip_prologue);
2340 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2341 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2342 set_gdbarch_function_start_offset (gdbarch, 0);
2343 set_gdbarch_breakpoint_from_pc (gdbarch, rs6000_breakpoint_from_pc);
2344
2345 /* Not sure on this. FIXMEmgo */
2346 set_gdbarch_frame_args_skip (gdbarch, 8);
2347
2348 set_gdbarch_frame_chain_valid (gdbarch, file_frame_chain_valid);
2349 if (osabi == ELFOSABI_LINUX)
2350 {
2351 set_gdbarch_frameless_function_invocation (gdbarch,
2352 ppc_linux_frameless_function_invocation);
2353 set_gdbarch_frame_chain (gdbarch, ppc_linux_frame_chain);
2354 set_gdbarch_frame_saved_pc (gdbarch, ppc_linux_frame_saved_pc);
2355
2356 set_gdbarch_frame_init_saved_regs (gdbarch,
2357 ppc_linux_frame_init_saved_regs);
2358 set_gdbarch_init_extra_frame_info (gdbarch,
2359 ppc_linux_init_extra_frame_info);
2360
2361 set_gdbarch_memory_remove_breakpoint (gdbarch,
2362 ppc_linux_memory_remove_breakpoint);
2363 set_solib_svr4_fetch_link_map_offsets
2364 (gdbarch, ppc_linux_svr4_fetch_link_map_offsets);
2365 }
2366 else
2367 {
2368 set_gdbarch_frameless_function_invocation (gdbarch,
2369 rs6000_frameless_function_invocation);
2370 set_gdbarch_frame_chain (gdbarch, rs6000_frame_chain);
2371 set_gdbarch_frame_saved_pc (gdbarch, rs6000_frame_saved_pc);
2372
2373 set_gdbarch_frame_init_saved_regs (gdbarch, rs6000_frame_init_saved_regs);
2374 set_gdbarch_init_extra_frame_info (gdbarch, rs6000_init_extra_frame_info);
2375
2376 /* Handle RS/6000 function pointers. */
2377 set_gdbarch_convert_from_func_ptr_addr (gdbarch,
2378 rs6000_convert_from_func_ptr_addr);
2379 }
2380 set_gdbarch_frame_args_address (gdbarch, rs6000_frame_args_address);
2381 set_gdbarch_frame_locals_address (gdbarch, rs6000_frame_args_address);
2382 set_gdbarch_saved_pc_after_call (gdbarch, rs6000_saved_pc_after_call);
2383
2384 /* We can't tell how many args there are
2385 now that the C compiler delays popping them. */
2386 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2387
2388 return gdbarch;
2389 }
2390
2391 /* Initialization code. */
2392
2393 void
2394 _initialize_rs6000_tdep (void)
2395 {
2396 register_gdbarch_init (bfd_arch_rs6000, rs6000_gdbarch_init);
2397 register_gdbarch_init (bfd_arch_powerpc, rs6000_gdbarch_init);
2398 }
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