1 /* Target-dependent code for GDB, the GNU debugger.
3 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
39 #include "libbfd.h" /* for bfd_default_set_arch_mach */
40 #include "coff/internal.h" /* for libcoff.h */
41 #include "libcoff.h" /* for xcoff_data */
42 #include "coff/xcoff.h"
47 #include "solib-svr4.h"
50 #include "gdb_assert.h"
53 #include "trad-frame.h"
54 #include "frame-unwind.h"
55 #include "frame-base.h"
57 /* If the kernel has to deliver a signal, it pushes a sigcontext
58 structure on the stack and then calls the signal handler, passing
59 the address of the sigcontext in an argument register. Usually
60 the signal handler doesn't save this register, so we have to
61 access the sigcontext structure via an offset from the signal handler
63 The following constants were determined by experimentation on AIX 3.2. */
64 #define SIG_FRAME_PC_OFFSET 96
65 #define SIG_FRAME_LR_OFFSET 108
66 #define SIG_FRAME_FP_OFFSET 284
68 /* To be used by skip_prologue. */
70 struct rs6000_framedata
72 int offset
; /* total size of frame --- the distance
73 by which we decrement sp to allocate
75 int saved_gpr
; /* smallest # of saved gpr */
76 int saved_fpr
; /* smallest # of saved fpr */
77 int saved_vr
; /* smallest # of saved vr */
78 int saved_ev
; /* smallest # of saved ev */
79 int alloca_reg
; /* alloca register number (frame ptr) */
80 char frameless
; /* true if frameless functions. */
81 char nosavedpc
; /* true if pc not saved. */
82 int gpr_offset
; /* offset of saved gprs from prev sp */
83 int fpr_offset
; /* offset of saved fprs from prev sp */
84 int vr_offset
; /* offset of saved vrs from prev sp */
85 int ev_offset
; /* offset of saved evs from prev sp */
86 int lr_offset
; /* offset of saved lr */
87 int cr_offset
; /* offset of saved cr */
88 int vrsave_offset
; /* offset of saved vrsave register */
91 /* Description of a single register. */
95 char *name
; /* name of register */
96 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
97 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
98 unsigned char fpr
; /* whether register is floating-point */
99 unsigned char pseudo
; /* whether register is pseudo */
102 /* Breakpoint shadows for the single step instructions will be kept here. */
104 static struct sstep_breaks
106 /* Address, or 0 if this is not in use. */
108 /* Shadow contents. */
113 /* Hook for determining the TOC address when calling functions in the
114 inferior under AIX. The initialization code in rs6000-nat.c sets
115 this hook to point to find_toc_address. */
117 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
119 /* Hook to set the current architecture when starting a child process.
120 rs6000-nat.c sets this. */
122 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
124 /* Static function prototypes */
126 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
128 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
129 struct rs6000_framedata
*);
130 static void frame_get_saved_regs (struct frame_info
* fi
,
131 struct rs6000_framedata
* fdatap
);
133 /* Is REGNO an AltiVec register? Return 1 if so, 0 otherwise. */
135 altivec_register_p (int regno
)
137 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
138 if (tdep
->ppc_vr0_regnum
< 0 || tdep
->ppc_vrsave_regnum
< 0)
141 return (regno
>= tdep
->ppc_vr0_regnum
&& regno
<= tdep
->ppc_vrsave_regnum
);
144 /* Use the architectures FP registers? */
146 ppc_floating_point_unit_p (struct gdbarch
*gdbarch
)
148 const struct bfd_arch_info
*info
= gdbarch_bfd_arch_info (gdbarch
);
149 if (info
->arch
== bfd_arch_powerpc
)
150 return (info
->mach
!= bfd_mach_ppc_e500
);
151 if (info
->arch
== bfd_arch_rs6000
)
156 /* Read a LEN-byte address from debugged memory address MEMADDR. */
159 read_memory_addr (CORE_ADDR memaddr
, int len
)
161 return read_memory_unsigned_integer (memaddr
, len
);
165 rs6000_skip_prologue (CORE_ADDR pc
)
167 struct rs6000_framedata frame
;
168 pc
= skip_prologue (pc
, 0, &frame
);
173 /* Fill in fi->saved_regs */
175 struct frame_extra_info
177 /* Functions calling alloca() change the value of the stack
178 pointer. We need to use initial stack pointer (which is saved in
179 r31 by gcc) in such cases. If a compiler emits traceback table,
180 then we should use the alloca register specified in traceback
182 CORE_ADDR initial_sp
; /* initial stack pointer. */
185 /* Get the ith function argument for the current function. */
187 rs6000_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
191 get_frame_register (frame
, 3 + argi
, &addr
);
195 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
198 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
205 absolute
= (int) ((instr
>> 1) & 1);
210 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
214 dest
= pc
+ immediate
;
218 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
222 dest
= pc
+ immediate
;
226 ext_op
= (instr
>> 1) & 0x3ff;
228 if (ext_op
== 16) /* br conditional register */
230 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
232 /* If we are about to return from a signal handler, dest is
233 something like 0x3c90. The current frame is a signal handler
234 caller frame, upon completion of the sigreturn system call
235 execution will return to the saved PC in the frame. */
236 if (dest
< TEXT_SEGMENT_BASE
)
238 struct frame_info
*fi
;
240 fi
= get_current_frame ();
242 dest
= read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
243 gdbarch_tdep (current_gdbarch
)->wordsize
);
247 else if (ext_op
== 528) /* br cond to count reg */
249 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
251 /* If we are about to execute a system call, dest is something
252 like 0x22fc or 0x3b00. Upon completion the system call
253 will return to the address in the link register. */
254 if (dest
< TEXT_SEGMENT_BASE
)
255 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
264 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
268 /* Sequence of bytes for breakpoint instruction. */
270 const static unsigned char *
271 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
273 static unsigned char big_breakpoint
[] = { 0x7d, 0x82, 0x10, 0x08 };
274 static unsigned char little_breakpoint
[] = { 0x08, 0x10, 0x82, 0x7d };
276 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
277 return big_breakpoint
;
279 return little_breakpoint
;
283 /* AIX does not support PT_STEP. Simulate it. */
286 rs6000_software_single_step (enum target_signal signal
,
287 int insert_breakpoints_p
)
291 const char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
297 if (insert_breakpoints_p
)
302 insn
= read_memory_integer (loc
, 4);
304 breaks
[0] = loc
+ breakp_sz
;
306 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
308 /* Don't put two breakpoints on the same address. */
309 if (breaks
[1] == breaks
[0])
312 stepBreaks
[1].address
= 0;
314 for (ii
= 0; ii
< 2; ++ii
)
317 /* ignore invalid breakpoint. */
318 if (breaks
[ii
] == -1)
320 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
321 stepBreaks
[ii
].address
= breaks
[ii
];
328 /* remove step breakpoints. */
329 for (ii
= 0; ii
< 2; ++ii
)
330 if (stepBreaks
[ii
].address
!= 0)
331 target_remove_breakpoint (stepBreaks
[ii
].address
,
332 stepBreaks
[ii
].data
);
334 errno
= 0; /* FIXME, don't ignore errors! */
335 /* What errors? {read,write}_memory call error(). */
339 /* return pc value after skipping a function prologue and also return
340 information about a function frame.
342 in struct rs6000_framedata fdata:
343 - frameless is TRUE, if function does not have a frame.
344 - nosavedpc is TRUE, if function does not save %pc value in its frame.
345 - offset is the initial size of this stack frame --- the amount by
346 which we decrement the sp to allocate the frame.
347 - saved_gpr is the number of the first saved gpr.
348 - saved_fpr is the number of the first saved fpr.
349 - saved_vr is the number of the first saved vr.
350 - saved_ev is the number of the first saved ev.
351 - alloca_reg is the number of the register used for alloca() handling.
353 - gpr_offset is the offset of the first saved gpr from the previous frame.
354 - fpr_offset is the offset of the first saved fpr from the previous frame.
355 - vr_offset is the offset of the first saved vr from the previous frame.
356 - ev_offset is the offset of the first saved ev from the previous frame.
357 - lr_offset is the offset of the saved lr
358 - cr_offset is the offset of the saved cr
359 - vrsave_offset is the offset of the saved vrsave register
362 #define SIGNED_SHORT(x) \
363 ((sizeof (short) == 2) \
364 ? ((int)(short)(x)) \
365 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
367 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
369 /* Limit the number of skipped non-prologue instructions, as the examining
370 of the prologue is expensive. */
371 static int max_skip_non_prologue_insns
= 10;
373 /* Given PC representing the starting address of a function, and
374 LIM_PC which is the (sloppy) limit to which to scan when looking
375 for a prologue, attempt to further refine this limit by using
376 the line data in the symbol table. If successful, a better guess
377 on where the prologue ends is returned, otherwise the previous
378 value of lim_pc is returned. */
380 /* FIXME: cagney/2004-02-14: This function and logic have largely been
381 superseded by skip_prologue_using_sal. */
384 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
386 struct symtab_and_line prologue_sal
;
388 prologue_sal
= find_pc_line (pc
, 0);
389 if (prologue_sal
.line
!= 0)
392 CORE_ADDR addr
= prologue_sal
.end
;
394 /* Handle the case in which compiler's optimizer/scheduler
395 has moved instructions into the prologue. We scan ahead
396 in the function looking for address ranges whose corresponding
397 line number is less than or equal to the first one that we
398 found for the function. (It can be less than when the
399 scheduler puts a body instruction before the first prologue
401 for (i
= 2 * max_skip_non_prologue_insns
;
402 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
405 struct symtab_and_line sal
;
407 sal
= find_pc_line (addr
, 0);
410 if (sal
.line
<= prologue_sal
.line
411 && sal
.symtab
== prologue_sal
.symtab
)
418 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
419 lim_pc
= prologue_sal
.end
;
426 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
428 CORE_ADDR orig_pc
= pc
;
429 CORE_ADDR last_prologue_pc
= pc
;
430 CORE_ADDR li_found_pc
= 0;
434 long vr_saved_offset
= 0;
443 int minimal_toc_loaded
= 0;
444 int prev_insn_was_prologue_insn
= 1;
445 int num_skip_non_prologue_insns
= 0;
446 const struct bfd_arch_info
*arch_info
= gdbarch_bfd_arch_info (current_gdbarch
);
447 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
449 /* Attempt to find the end of the prologue when no limit is specified.
450 Note that refine_prologue_limit() has been written so that it may
451 be used to "refine" the limits of non-zero PC values too, but this
452 is only safe if we 1) trust the line information provided by the
453 compiler and 2) iterate enough to actually find the end of the
456 It may become a good idea at some point (for both performance and
457 accuracy) to unconditionally call refine_prologue_limit(). But,
458 until we can make a clear determination that this is beneficial,
459 we'll play it safe and only use it to obtain a limit when none
460 has been specified. */
462 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
464 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
465 fdata
->saved_gpr
= -1;
466 fdata
->saved_fpr
= -1;
467 fdata
->saved_vr
= -1;
468 fdata
->saved_ev
= -1;
469 fdata
->alloca_reg
= -1;
470 fdata
->frameless
= 1;
471 fdata
->nosavedpc
= 1;
475 /* Sometimes it isn't clear if an instruction is a prologue
476 instruction or not. When we encounter one of these ambiguous
477 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
478 Otherwise, we'll assume that it really is a prologue instruction. */
479 if (prev_insn_was_prologue_insn
)
480 last_prologue_pc
= pc
;
482 /* Stop scanning if we've hit the limit. */
483 if (lim_pc
!= 0 && pc
>= lim_pc
)
486 prev_insn_was_prologue_insn
= 1;
488 /* Fetch the instruction and convert it to an integer. */
489 if (target_read_memory (pc
, buf
, 4))
491 op
= extract_signed_integer (buf
, 4);
493 if ((op
& 0xfc1fffff) == 0x7c0802a6)
495 /* Since shared library / PIC code, which needs to get its
496 address at runtime, can appear to save more than one link
510 remember just the first one, but skip over additional
513 lr_reg
= (op
& 0x03e00000);
516 else if ((op
& 0xfc1fffff) == 0x7c000026)
518 cr_reg
= (op
& 0x03e00000);
522 else if ((op
& 0xfc1f0000) == 0xd8010000)
523 { /* stfd Rx,NUM(r1) */
524 reg
= GET_SRC_REG (op
);
525 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
527 fdata
->saved_fpr
= reg
;
528 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
533 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
534 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
535 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
536 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
539 reg
= GET_SRC_REG (op
);
540 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
542 fdata
->saved_gpr
= reg
;
543 if ((op
& 0xfc1f0003) == 0xf8010000)
545 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
550 else if ((op
& 0xffff0000) == 0x60000000)
553 /* Allow nops in the prologue, but do not consider them to
554 be part of the prologue unless followed by other prologue
556 prev_insn_was_prologue_insn
= 0;
560 else if ((op
& 0xffff0000) == 0x3c000000)
561 { /* addis 0,0,NUM, used
563 fdata
->offset
= (op
& 0x0000ffff) << 16;
564 fdata
->frameless
= 0;
568 else if ((op
& 0xffff0000) == 0x60000000)
569 { /* ori 0,0,NUM, 2nd ha
570 lf of >= 32k frames */
571 fdata
->offset
|= (op
& 0x0000ffff);
572 fdata
->frameless
= 0;
576 else if (lr_reg
!= -1 &&
577 /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */
578 (((op
& 0xffff0000) == (lr_reg
| 0xf8010000)) ||
579 /* stw Rx, NUM(r1) */
580 ((op
& 0xffff0000) == (lr_reg
| 0x90010000)) ||
581 /* stwu Rx, NUM(r1) */
582 ((op
& 0xffff0000) == (lr_reg
| 0x94010000))))
583 { /* where Rx == lr */
584 fdata
->lr_offset
= offset
;
585 fdata
->nosavedpc
= 0;
587 if ((op
& 0xfc000003) == 0xf8000000 || /* std */
588 (op
& 0xfc000000) == 0x90000000) /* stw */
590 /* Does not update r1, so add displacement to lr_offset. */
591 fdata
->lr_offset
+= SIGNED_SHORT (op
);
596 else if (cr_reg
!= -1 &&
597 /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */
598 (((op
& 0xffff0000) == (cr_reg
| 0xf8010000)) ||
599 /* stw Rx, NUM(r1) */
600 ((op
& 0xffff0000) == (cr_reg
| 0x90010000)) ||
601 /* stwu Rx, NUM(r1) */
602 ((op
& 0xffff0000) == (cr_reg
| 0x94010000))))
603 { /* where Rx == cr */
604 fdata
->cr_offset
= offset
;
606 if ((op
& 0xfc000003) == 0xf8000000 ||
607 (op
& 0xfc000000) == 0x90000000)
609 /* Does not update r1, so add displacement to cr_offset. */
610 fdata
->cr_offset
+= SIGNED_SHORT (op
);
615 else if (op
== 0x48000005)
621 else if (op
== 0x48000004)
626 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
627 in V.4 -mminimal-toc */
628 (op
& 0xffff0000) == 0x3bde0000)
629 { /* addi 30,30,foo@l */
633 else if ((op
& 0xfc000001) == 0x48000001)
637 fdata
->frameless
= 0;
638 /* Don't skip over the subroutine call if it is not within
639 the first three instructions of the prologue. */
640 if ((pc
- orig_pc
) > 8)
643 op
= read_memory_integer (pc
+ 4, 4);
645 /* At this point, make sure this is not a trampoline
646 function (a function that simply calls another functions,
647 and nothing else). If the next is not a nop, this branch
648 was part of the function prologue. */
650 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
651 break; /* don't skip over
656 /* update stack pointer */
657 else if ((op
& 0xfc1f0000) == 0x94010000)
658 { /* stu rX,NUM(r1) || stwu rX,NUM(r1) */
659 fdata
->frameless
= 0;
660 fdata
->offset
= SIGNED_SHORT (op
);
661 offset
= fdata
->offset
;
664 else if ((op
& 0xfc1f016a) == 0x7c01016e)
665 { /* stwux rX,r1,rY */
666 /* no way to figure out what r1 is going to be */
667 fdata
->frameless
= 0;
668 offset
= fdata
->offset
;
671 else if ((op
& 0xfc1f0003) == 0xf8010001)
672 { /* stdu rX,NUM(r1) */
673 fdata
->frameless
= 0;
674 fdata
->offset
= SIGNED_SHORT (op
& ~3UL);
675 offset
= fdata
->offset
;
678 else if ((op
& 0xfc1f016a) == 0x7c01016a)
679 { /* stdux rX,r1,rY */
680 /* no way to figure out what r1 is going to be */
681 fdata
->frameless
= 0;
682 offset
= fdata
->offset
;
685 /* Load up minimal toc pointer */
686 else if (((op
>> 22) == 0x20f || /* l r31,... or l r30,... */
687 (op
>> 22) == 0x3af) /* ld r31,... or ld r30,... */
688 && !minimal_toc_loaded
)
690 minimal_toc_loaded
= 1;
693 /* move parameters from argument registers to local variable
696 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
697 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
698 (((op
>> 21) & 31) <= 10) &&
699 ((long) ((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
703 /* store parameters in stack */
705 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
706 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
707 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
711 /* store parameters in stack via frame pointer */
714 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
715 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
716 (op
& 0xfc1f0000) == 0xfc1f0000))
717 { /* frsp, fp?,NUM(r1) */
720 /* Set up frame pointer */
722 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
725 fdata
->frameless
= 0;
727 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
+ 31);
730 /* Another way to set up the frame pointer. */
732 else if ((op
& 0xfc1fffff) == 0x38010000)
733 { /* addi rX, r1, 0x0 */
734 fdata
->frameless
= 0;
736 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
737 + ((op
& ~0x38010000) >> 21));
740 /* AltiVec related instructions. */
741 /* Store the vrsave register (spr 256) in another register for
742 later manipulation, or load a register into the vrsave
743 register. 2 instructions are used: mfvrsave and
744 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
745 and mtspr SPR256, Rn. */
746 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
747 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
748 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
750 vrsave_reg
= GET_SRC_REG (op
);
753 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
757 /* Store the register where vrsave was saved to onto the stack:
758 rS is the register where vrsave was stored in a previous
760 /* 100100 sssss 00001 dddddddd dddddddd */
761 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
763 if (vrsave_reg
== GET_SRC_REG (op
))
765 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
770 /* Compute the new value of vrsave, by modifying the register
771 where vrsave was saved to. */
772 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
773 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
777 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
778 in a pair of insns to save the vector registers on the
780 /* 001110 00000 00000 iiii iiii iiii iiii */
781 /* 001110 01110 00000 iiii iiii iiii iiii */
782 else if ((op
& 0xffff0000) == 0x38000000 /* li r0, SIMM */
783 || (op
& 0xffff0000) == 0x39c00000) /* li r14, SIMM */
786 vr_saved_offset
= SIGNED_SHORT (op
);
788 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
789 /* 011111 sssss 11111 00000 00111001110 */
790 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
792 if (pc
== (li_found_pc
+ 4))
794 vr_reg
= GET_SRC_REG (op
);
795 /* If this is the first vector reg to be saved, or if
796 it has a lower number than others previously seen,
797 reupdate the frame info. */
798 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
800 fdata
->saved_vr
= vr_reg
;
801 fdata
->vr_offset
= vr_saved_offset
+ offset
;
803 vr_saved_offset
= -1;
808 /* End AltiVec related instructions. */
810 /* Start BookE related instructions. */
811 /* Store gen register S at (r31+uimm).
812 Any register less than r13 is volatile, so we don't care. */
813 /* 000100 sssss 11111 iiiii 01100100001 */
814 else if (arch_info
->mach
== bfd_mach_ppc_e500
815 && (op
& 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
817 if ((op
& 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
820 ev_reg
= GET_SRC_REG (op
);
821 imm
= (op
>> 11) & 0x1f;
823 /* If this is the first vector reg to be saved, or if
824 it has a lower number than others previously seen,
825 reupdate the frame info. */
826 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
828 fdata
->saved_ev
= ev_reg
;
829 fdata
->ev_offset
= ev_offset
+ offset
;
834 /* Store gen register rS at (r1+rB). */
835 /* 000100 sssss 00001 bbbbb 01100100000 */
836 else if (arch_info
->mach
== bfd_mach_ppc_e500
837 && (op
& 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
839 if (pc
== (li_found_pc
+ 4))
841 ev_reg
= GET_SRC_REG (op
);
842 /* If this is the first vector reg to be saved, or if
843 it has a lower number than others previously seen,
844 reupdate the frame info. */
845 /* We know the contents of rB from the previous instruction. */
846 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
848 fdata
->saved_ev
= ev_reg
;
849 fdata
->ev_offset
= vr_saved_offset
+ offset
;
851 vr_saved_offset
= -1;
857 /* Store gen register r31 at (rA+uimm). */
858 /* 000100 11111 aaaaa iiiii 01100100001 */
859 else if (arch_info
->mach
== bfd_mach_ppc_e500
860 && (op
& 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
862 /* Wwe know that the source register is 31 already, but
863 it can't hurt to compute it. */
864 ev_reg
= GET_SRC_REG (op
);
865 ev_offset
= ((op
>> 11) & 0x1f) * 8;
866 /* If this is the first vector reg to be saved, or if
867 it has a lower number than others previously seen,
868 reupdate the frame info. */
869 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
871 fdata
->saved_ev
= ev_reg
;
872 fdata
->ev_offset
= ev_offset
+ offset
;
877 /* Store gen register S at (r31+r0).
878 Store param on stack when offset from SP bigger than 4 bytes. */
879 /* 000100 sssss 11111 00000 01100100000 */
880 else if (arch_info
->mach
== bfd_mach_ppc_e500
881 && (op
& 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
883 if (pc
== (li_found_pc
+ 4))
885 if ((op
& 0x03e00000) >= 0x01a00000)
887 ev_reg
= GET_SRC_REG (op
);
888 /* If this is the first vector reg to be saved, or if
889 it has a lower number than others previously seen,
890 reupdate the frame info. */
891 /* We know the contents of r0 from the previous
893 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
895 fdata
->saved_ev
= ev_reg
;
896 fdata
->ev_offset
= vr_saved_offset
+ offset
;
900 vr_saved_offset
= -1;
905 /* End BookE related instructions. */
909 /* Not a recognized prologue instruction.
910 Handle optimizer code motions into the prologue by continuing
911 the search if we have no valid frame yet or if the return
912 address is not yet saved in the frame. */
913 if (fdata
->frameless
== 0
914 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
917 if (op
== 0x4e800020 /* blr */
918 || op
== 0x4e800420) /* bctr */
919 /* Do not scan past epilogue in frameless functions or
922 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
923 /* Never skip branches. */
926 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
927 /* Do not scan too many insns, scanning insns is expensive with
931 /* Continue scanning. */
932 prev_insn_was_prologue_insn
= 0;
938 /* I have problems with skipping over __main() that I need to address
939 * sometime. Previously, I used to use misc_function_vector which
940 * didn't work as well as I wanted to be. -MGO */
942 /* If the first thing after skipping a prolog is a branch to a function,
943 this might be a call to an initializer in main(), introduced by gcc2.
944 We'd like to skip over it as well. Fortunately, xlc does some extra
945 work before calling a function right after a prologue, thus we can
946 single out such gcc2 behaviour. */
949 if ((op
& 0xfc000001) == 0x48000001)
950 { /* bl foo, an initializer function? */
951 op
= read_memory_integer (pc
+ 4, 4);
953 if (op
== 0x4def7b82)
954 { /* cror 0xf, 0xf, 0xf (nop) */
956 /* Check and see if we are in main. If so, skip over this
957 initializer function as well. */
959 tmp
= find_pc_misc_function (pc
);
961 && strcmp (misc_function_vector
[tmp
].name
, main_name ()) == 0)
967 fdata
->offset
= -fdata
->offset
;
968 return last_prologue_pc
;
972 /*************************************************************************
973 Support for creating pushing a dummy frame into the stack, and popping
975 *************************************************************************/
978 /* All the ABI's require 16 byte alignment. */
980 rs6000_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
985 /* Pass the arguments in either registers, or in the stack. In RS/6000,
986 the first eight words of the argument list (that might be less than
987 eight parameters if some parameters occupy more than one word) are
988 passed in r3..r10 registers. float and double parameters are
989 passed in fpr's, in addition to that. Rest of the parameters if any
990 are passed in user stack. There might be cases in which half of the
991 parameter is copied into registers, the other half is pushed into
994 Stack must be aligned on 64-bit boundaries when synthesizing
997 If the function is returning a structure, then the return address is passed
998 in r3, then the first 7 words of the parameters can be passed in registers,
1002 rs6000_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1003 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1004 int nargs
, struct value
**args
, CORE_ADDR sp
,
1005 int struct_return
, CORE_ADDR struct_addr
)
1007 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1010 int argno
; /* current argument number */
1011 int argbytes
; /* current argument byte */
1012 char tmp_buffer
[50];
1013 int f_argno
= 0; /* current floating point argno */
1014 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1016 struct value
*arg
= 0;
1021 /* The first eight words of ther arguments are passed in registers.
1022 Copy them appropriately. */
1025 /* If the function is returning a `struct', then the first word
1026 (which will be passed in r3) is used for struct return address.
1027 In that case we should advance one word and start from r4
1028 register to copy parameters. */
1031 regcache_raw_write_unsigned (regcache
, tdep
->ppc_gp0_regnum
+ 3,
1037 effectively indirect call... gcc does...
1039 return_val example( float, int);
1042 float in fp0, int in r3
1043 offset of stack on overflow 8/16
1044 for varargs, must go by type.
1046 float in r3&r4, int in r5
1047 offset of stack on overflow different
1049 return in r3 or f0. If no float, must study how gcc emulates floats;
1050 pay attention to arg promotion.
1051 User may have to cast\args to handle promotion correctly
1052 since gdb won't know if prototype supplied or not.
1055 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
1057 int reg_size
= DEPRECATED_REGISTER_RAW_SIZE (ii
+ 3);
1060 type
= check_typedef (VALUE_TYPE (arg
));
1061 len
= TYPE_LENGTH (type
);
1063 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1066 /* Floating point arguments are passed in fpr's, as well as gpr's.
1067 There are 13 fpr's reserved for passing parameters. At this point
1068 there is no way we would run out of them. */
1072 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1074 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1075 VALUE_CONTENTS (arg
),
1083 /* Argument takes more than one register. */
1084 while (argbytes
< len
)
1086 memset (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)], 0,
1088 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)],
1089 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1090 (len
- argbytes
) > reg_size
1091 ? reg_size
: len
- argbytes
);
1092 ++ii
, argbytes
+= reg_size
;
1095 goto ran_out_of_registers_for_arguments
;
1102 /* Argument can fit in one register. No problem. */
1103 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1104 memset (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1105 memcpy ((char *)&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)] + adj
,
1106 VALUE_CONTENTS (arg
), len
);
1111 ran_out_of_registers_for_arguments
:
1113 saved_sp
= read_sp ();
1115 /* Location for 8 parameters are always reserved. */
1118 /* Another six words for back chain, TOC register, link register, etc. */
1121 /* Stack pointer must be quadword aligned. */
1124 /* If there are more arguments, allocate space for them in
1125 the stack, then push them starting from the ninth one. */
1127 if ((argno
< nargs
) || argbytes
)
1133 space
+= ((len
- argbytes
+ 3) & -4);
1139 for (; jj
< nargs
; ++jj
)
1141 struct value
*val
= args
[jj
];
1142 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1145 /* Add location required for the rest of the parameters. */
1146 space
= (space
+ 15) & -16;
1149 /* This is another instance we need to be concerned about
1150 securing our stack space. If we write anything underneath %sp
1151 (r1), we might conflict with the kernel who thinks he is free
1152 to use this area. So, update %sp first before doing anything
1155 regcache_raw_write_signed (regcache
, SP_REGNUM
, sp
);
1157 /* If the last argument copied into the registers didn't fit there
1158 completely, push the rest of it into stack. */
1162 write_memory (sp
+ 24 + (ii
* 4),
1163 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1166 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1169 /* Push the rest of the arguments into stack. */
1170 for (; argno
< nargs
; ++argno
)
1174 type
= check_typedef (VALUE_TYPE (arg
));
1175 len
= TYPE_LENGTH (type
);
1178 /* Float types should be passed in fpr's, as well as in the
1180 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1185 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1187 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1188 VALUE_CONTENTS (arg
),
1193 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1194 ii
+= ((len
+ 3) & -4) / 4;
1198 /* Set the stack pointer. According to the ABI, the SP is meant to
1199 be set _before_ the corresponding stack space is used. On AIX,
1200 this even applies when the target has been completely stopped!
1201 Not doing this can lead to conflicts with the kernel which thinks
1202 that it still has control over this not-yet-allocated stack
1204 regcache_raw_write_signed (regcache
, SP_REGNUM
, sp
);
1206 /* Set back chain properly. */
1207 store_unsigned_integer (tmp_buffer
, 4, saved_sp
);
1208 write_memory (sp
, tmp_buffer
, 4);
1210 /* Point the inferior function call's return address at the dummy's
1212 regcache_raw_write_signed (regcache
, tdep
->ppc_lr_regnum
, bp_addr
);
1214 /* Set the TOC register, get the value from the objfile reader
1215 which, in turn, gets it from the VMAP table. */
1216 if (rs6000_find_toc_address_hook
!= NULL
)
1218 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (func_addr
);
1219 regcache_raw_write_signed (regcache
, tdep
->ppc_toc_regnum
, tocvalue
);
1222 target_store_registers (-1);
1226 /* PowerOpen always puts structures in memory. Vectors, which were
1227 added later, do get returned in a register though. */
1230 rs6000_use_struct_convention (int gcc_p
, struct type
*value_type
)
1232 if ((TYPE_LENGTH (value_type
) == 16 || TYPE_LENGTH (value_type
) == 8)
1233 && TYPE_VECTOR (value_type
))
1239 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1242 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1244 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1249 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1250 We need to truncate the return value into float size (4 byte) if
1253 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1255 ®buf
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1)],
1256 TYPE_LENGTH (valtype
));
1259 memcpy (&dd
, ®buf
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1261 memcpy (valbuf
, &ff
, sizeof (float));
1264 else if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1265 && TYPE_LENGTH (valtype
) == 16
1266 && TYPE_VECTOR (valtype
))
1268 memcpy (valbuf
, regbuf
+ DEPRECATED_REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1269 TYPE_LENGTH (valtype
));
1273 /* return value is copied starting from r3. */
1274 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1275 && TYPE_LENGTH (valtype
) < DEPRECATED_REGISTER_RAW_SIZE (3))
1276 offset
= DEPRECATED_REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1279 regbuf
+ DEPRECATED_REGISTER_BYTE (3) + offset
,
1280 TYPE_LENGTH (valtype
));
1284 /* Return whether handle_inferior_event() should proceed through code
1285 starting at PC in function NAME when stepping.
1287 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1288 handle memory references that are too distant to fit in instructions
1289 generated by the compiler. For example, if 'foo' in the following
1294 is greater than 32767, the linker might replace the lwz with a branch to
1295 somewhere in @FIX1 that does the load in 2 instructions and then branches
1296 back to where execution should continue.
1298 GDB should silently step over @FIX code, just like AIX dbx does.
1299 Unfortunately, the linker uses the "b" instruction for the branches,
1300 meaning that the link register doesn't get set. Therefore, GDB's usual
1301 step_over_function() mechanism won't work.
1303 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1304 in handle_inferior_event() to skip past @FIX code. */
1307 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1309 return name
&& !strncmp (name
, "@FIX", 4);
1312 /* Skip code that the user doesn't want to see when stepping:
1314 1. Indirect function calls use a piece of trampoline code to do context
1315 switching, i.e. to set the new TOC table. Skip such code if we are on
1316 its first instruction (as when we have single-stepped to here).
1318 2. Skip shared library trampoline code (which is different from
1319 indirect function call trampolines).
1321 3. Skip bigtoc fixup code.
1323 Result is desired PC to step until, or NULL if we are not in
1324 code that should be skipped. */
1327 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1329 unsigned int ii
, op
;
1331 CORE_ADDR solib_target_pc
;
1332 struct minimal_symbol
*msymbol
;
1334 static unsigned trampoline_code
[] =
1336 0x800b0000, /* l r0,0x0(r11) */
1337 0x90410014, /* st r2,0x14(r1) */
1338 0x7c0903a6, /* mtctr r0 */
1339 0x804b0004, /* l r2,0x4(r11) */
1340 0x816b0008, /* l r11,0x8(r11) */
1341 0x4e800420, /* bctr */
1342 0x4e800020, /* br */
1346 /* Check for bigtoc fixup code. */
1347 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1348 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, DEPRECATED_SYMBOL_NAME (msymbol
)))
1350 /* Double-check that the third instruction from PC is relative "b". */
1351 op
= read_memory_integer (pc
+ 8, 4);
1352 if ((op
& 0xfc000003) == 0x48000000)
1354 /* Extract bits 6-29 as a signed 24-bit relative word address and
1355 add it to the containing PC. */
1356 rel
= ((int)(op
<< 6) >> 6);
1357 return pc
+ 8 + rel
;
1361 /* If pc is in a shared library trampoline, return its target. */
1362 solib_target_pc
= find_solib_trampoline_target (pc
);
1363 if (solib_target_pc
)
1364 return solib_target_pc
;
1366 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1368 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1369 if (op
!= trampoline_code
[ii
])
1372 ii
= read_register (11); /* r11 holds destination addr */
1373 pc
= read_memory_addr (ii
, gdbarch_tdep (current_gdbarch
)->wordsize
); /* (r11) value */
1377 /* If saved registers of frame FI are not known yet, read and cache them.
1378 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1379 in which case the framedata are read. */
1382 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1384 CORE_ADDR frame_addr
;
1385 struct rs6000_framedata work_fdata
;
1386 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1387 int wordsize
= tdep
->wordsize
;
1389 if (deprecated_get_frame_saved_regs (fi
))
1394 fdatap
= &work_fdata
;
1395 (void) skip_prologue (get_frame_func (fi
), get_frame_pc (fi
), fdatap
);
1398 frame_saved_regs_zalloc (fi
);
1400 /* If there were any saved registers, figure out parent's stack
1402 /* The following is true only if the frame doesn't have a call to
1405 if (fdatap
->saved_fpr
== 0
1406 && fdatap
->saved_gpr
== 0
1407 && fdatap
->saved_vr
== 0
1408 && fdatap
->saved_ev
== 0
1409 && fdatap
->lr_offset
== 0
1410 && fdatap
->cr_offset
== 0
1411 && fdatap
->vr_offset
== 0
1412 && fdatap
->ev_offset
== 0)
1415 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1416 address of the current frame. Things might be easier if the
1417 ->frame pointed to the outer-most address of the frame. In the
1418 mean time, the address of the prev frame is used as the base
1419 address of this frame. */
1420 frame_addr
= DEPRECATED_FRAME_CHAIN (fi
);
1422 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1423 All fpr's from saved_fpr to fp31 are saved. */
1425 if (fdatap
->saved_fpr
>= 0)
1428 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1429 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1431 deprecated_get_frame_saved_regs (fi
)[FP0_REGNUM
+ i
] = fpr_addr
;
1436 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1437 All gpr's from saved_gpr to gpr31 are saved. */
1439 if (fdatap
->saved_gpr
>= 0)
1442 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1443 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1445 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = gpr_addr
;
1446 gpr_addr
+= wordsize
;
1450 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1451 All vr's from saved_vr to vr31 are saved. */
1452 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1454 if (fdatap
->saved_vr
>= 0)
1457 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1458 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1460 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1461 vr_addr
+= DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1466 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1467 All vr's from saved_ev to ev31 are saved. ????? */
1468 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
1470 if (fdatap
->saved_ev
>= 0)
1473 CORE_ADDR ev_addr
= frame_addr
+ fdatap
->ev_offset
;
1474 for (i
= fdatap
->saved_ev
; i
< 32; i
++)
1476 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_ev0_regnum
+ i
] = ev_addr
;
1477 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = ev_addr
+ 4;
1478 ev_addr
+= DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_ev0_regnum
);
1483 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1485 if (fdatap
->cr_offset
!= 0)
1486 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1488 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1490 if (fdatap
->lr_offset
!= 0)
1491 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1493 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1495 if (fdatap
->vrsave_offset
!= 0)
1496 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1499 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1500 isn't available with that word size, return 0. */
1503 regsize (const struct reg
*reg
, int wordsize
)
1505 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1508 /* Return the name of register number N, or null if no such register exists
1509 in the current architecture. */
1512 rs6000_register_name (int n
)
1514 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1515 const struct reg
*reg
= tdep
->regs
+ n
;
1517 if (!regsize (reg
, tdep
->wordsize
))
1522 /* Index within `registers' of the first byte of the space for
1526 rs6000_register_byte (int n
)
1528 return gdbarch_tdep (current_gdbarch
)->regoff
[n
];
1531 /* Return the number of bytes of storage in the actual machine representation
1532 for register N if that register is available, else return 0. */
1535 rs6000_register_raw_size (int n
)
1537 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1538 const struct reg
*reg
= tdep
->regs
+ n
;
1539 return regsize (reg
, tdep
->wordsize
);
1542 /* Return the GDB type object for the "standard" data type
1543 of data in register N. */
1545 static struct type
*
1546 rs6000_register_virtual_type (int n
)
1548 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1549 const struct reg
*reg
= tdep
->regs
+ n
;
1552 return builtin_type_double
;
1555 int size
= regsize (reg
, tdep
->wordsize
);
1559 return builtin_type_int0
;
1561 return builtin_type_uint32
;
1563 if (tdep
->ppc_ev0_regnum
<= n
&& n
<= tdep
->ppc_ev31_regnum
)
1564 return builtin_type_vec64
;
1566 return builtin_type_uint64
;
1569 return builtin_type_vec128
;
1572 internal_error (__FILE__
, __LINE__
, "Register %d size %d unknown",
1578 /* Return whether register N requires conversion when moving from raw format
1581 The register format for RS/6000 floating point registers is always
1582 double, we need a conversion if the memory format is float. */
1585 rs6000_register_convertible (int n
)
1587 const struct reg
*reg
= gdbarch_tdep (current_gdbarch
)->regs
+ n
;
1591 /* Convert data from raw format for register N in buffer FROM
1592 to virtual format with type TYPE in buffer TO. */
1595 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1596 char *from
, char *to
)
1598 if (TYPE_LENGTH (type
) != DEPRECATED_REGISTER_RAW_SIZE (n
))
1600 double val
= deprecated_extract_floating (from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1601 deprecated_store_floating (to
, TYPE_LENGTH (type
), val
);
1604 memcpy (to
, from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1607 /* Convert data from virtual format with type TYPE in buffer FROM
1608 to raw format for register N in buffer TO. */
1611 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1612 const char *from
, char *to
)
1614 if (TYPE_LENGTH (type
) != DEPRECATED_REGISTER_RAW_SIZE (n
))
1616 double val
= deprecated_extract_floating (from
, TYPE_LENGTH (type
));
1617 deprecated_store_floating (to
, DEPRECATED_REGISTER_RAW_SIZE (n
), val
);
1620 memcpy (to
, from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1624 e500_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1625 int reg_nr
, void *buffer
)
1629 char temp_buffer
[MAX_REGISTER_SIZE
];
1630 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1632 if (reg_nr
>= tdep
->ppc_gp0_regnum
1633 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1635 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1637 /* Build the value in the provided buffer. */
1638 /* Read the raw register of which this one is the lower portion. */
1639 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1640 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1642 memcpy ((char *) buffer
, temp_buffer
+ offset
, 4);
1647 e500_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1648 int reg_nr
, const void *buffer
)
1652 char temp_buffer
[MAX_REGISTER_SIZE
];
1653 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1655 if (reg_nr
>= tdep
->ppc_gp0_regnum
1656 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1658 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1659 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1660 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1663 /* Let's read the value of the base register into a temporary
1664 buffer, so that overwriting the last four bytes with the new
1665 value of the pseudo will leave the upper 4 bytes unchanged. */
1666 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1668 /* Write as an 8 byte quantity. */
1669 memcpy (temp_buffer
+ offset
, (char *) buffer
, 4);
1670 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
1674 /* Convert a dwarf2 register number to a gdb REGNUM. */
1676 e500_dwarf2_reg_to_regnum (int num
)
1679 if (0 <= num
&& num
<= 31)
1680 return num
+ gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
;
1685 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1688 rs6000_stab_reg_to_regnum (int num
)
1694 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
1697 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
1700 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
1703 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
1713 rs6000_store_return_value (struct type
*type
, char *valbuf
)
1715 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1717 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1719 /* Floating point values are returned starting from FPR1 and up.
1720 Say a double_double_double type could be returned in
1721 FPR1/FPR2/FPR3 triple. */
1723 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
1724 TYPE_LENGTH (type
));
1725 else if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
1727 if (TYPE_LENGTH (type
) == 16
1728 && TYPE_VECTOR (type
))
1729 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1730 valbuf
, TYPE_LENGTH (type
));
1733 /* Everything else is returned in GPR3 and up. */
1734 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
1735 valbuf
, TYPE_LENGTH (type
));
1738 /* Extract from an array REGBUF containing the (raw) register state
1739 the address in which a function should return its structure value,
1740 as a CORE_ADDR (or an expression that can be used as one). */
1743 rs6000_extract_struct_value_address (struct regcache
*regcache
)
1745 /* FIXME: cagney/2002-09-26: PR gdb/724: When making an inferior
1746 function call GDB knows the address of the struct return value
1747 and hence, should not need to call this function. Unfortunately,
1748 the current call_function_by_hand() code only saves the most
1749 recent struct address leading to occasional calls. The code
1750 should instead maintain a stack of such addresses (in the dummy
1752 /* NOTE: cagney/2002-09-26: Return 0 which indicates that we've
1753 really got no idea where the return value is being stored. While
1754 r3, on function entry, contained the address it will have since
1755 been reused (scratch) and hence wouldn't be valid */
1759 /* Hook called when a new child process is started. */
1762 rs6000_create_inferior (int pid
)
1764 if (rs6000_set_host_arch_hook
)
1765 rs6000_set_host_arch_hook (pid
);
1768 /* Support for CONVERT_FROM_FUNC_PTR_ADDR (ARCH, ADDR, TARG).
1770 Usually a function pointer's representation is simply the address
1771 of the function. On the RS/6000 however, a function pointer is
1772 represented by a pointer to a TOC entry. This TOC entry contains
1773 three words, the first word is the address of the function, the
1774 second word is the TOC pointer (r2), and the third word is the
1775 static chain value. Throughout GDB it is currently assumed that a
1776 function pointer contains the address of the function, which is not
1777 easy to fix. In addition, the conversion of a function address to
1778 a function pointer would require allocation of a TOC entry in the
1779 inferior's memory space, with all its drawbacks. To be able to
1780 call C++ virtual methods in the inferior (which are called via
1781 function pointers), find_function_addr uses this function to get the
1782 function address from a function pointer. */
1784 /* Return real function address if ADDR (a function pointer) is in the data
1785 space and is therefore a special function pointer. */
1788 rs6000_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
,
1790 struct target_ops
*targ
)
1792 struct obj_section
*s
;
1794 s
= find_pc_section (addr
);
1795 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
1798 /* ADDR is in the data space, so it's a special function pointer. */
1799 return read_memory_addr (addr
, gdbarch_tdep (current_gdbarch
)->wordsize
);
1803 /* Handling the various POWER/PowerPC variants. */
1806 /* The arrays here called registers_MUMBLE hold information about available
1809 For each family of PPC variants, I've tried to isolate out the
1810 common registers and put them up front, so that as long as you get
1811 the general family right, GDB will correctly identify the registers
1812 common to that family. The common register sets are:
1814 For the 60x family: hid0 hid1 iabr dabr pir
1816 For the 505 and 860 family: eie eid nri
1818 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
1819 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
1822 Most of these register groups aren't anything formal. I arrived at
1823 them by looking at the registers that occurred in more than one
1826 Note: kevinb/2002-04-30: Support for the fpscr register was added
1827 during April, 2002. Slot 70 is being used for PowerPC and slot 71
1828 for Power. For PowerPC, slot 70 was unused and was already in the
1829 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
1830 slot 70 was being used for "mq", so the next available slot (71)
1831 was chosen. It would have been nice to be able to make the
1832 register numbers the same across processor cores, but this wasn't
1833 possible without either 1) renumbering some registers for some
1834 processors or 2) assigning fpscr to a really high slot that's
1835 larger than any current register number. Doing (1) is bad because
1836 existing stubs would break. Doing (2) is undesirable because it
1837 would introduce a really large gap between fpscr and the rest of
1838 the registers for most processors. */
1840 /* Convenience macros for populating register arrays. */
1842 /* Within another macro, convert S to a string. */
1846 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
1847 and 64 bits on 64-bit systems. */
1848 #define R(name) { STR(name), 4, 8, 0, 0 }
1850 /* Return a struct reg defining register NAME that's 32 bits on all
1852 #define R4(name) { STR(name), 4, 4, 0, 0 }
1854 /* Return a struct reg defining register NAME that's 64 bits on all
1856 #define R8(name) { STR(name), 8, 8, 0, 0 }
1858 /* Return a struct reg defining register NAME that's 128 bits on all
1860 #define R16(name) { STR(name), 16, 16, 0, 0 }
1862 /* Return a struct reg defining floating-point register NAME. */
1863 #define F(name) { STR(name), 8, 8, 1, 0 }
1865 /* Return a struct reg defining a pseudo register NAME. */
1866 #define P(name) { STR(name), 4, 8, 0, 1}
1868 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
1869 systems and that doesn't exist on 64-bit systems. */
1870 #define R32(name) { STR(name), 4, 0, 0, 0 }
1872 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
1873 systems and that doesn't exist on 32-bit systems. */
1874 #define R64(name) { STR(name), 0, 8, 0, 0 }
1876 /* Return a struct reg placeholder for a register that doesn't exist. */
1877 #define R0 { 0, 0, 0, 0, 0 }
1879 /* UISA registers common across all architectures, including POWER. */
1881 #define COMMON_UISA_REGS \
1882 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
1883 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
1884 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
1885 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
1886 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
1887 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
1888 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
1889 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
1890 /* 64 */ R(pc), R(ps)
1892 #define COMMON_UISA_NOFP_REGS \
1893 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
1894 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
1895 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
1896 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
1897 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
1898 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
1899 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
1900 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
1901 /* 64 */ R(pc), R(ps)
1903 /* UISA-level SPRs for PowerPC. */
1904 #define PPC_UISA_SPRS \
1905 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
1907 /* UISA-level SPRs for PowerPC without floating point support. */
1908 #define PPC_UISA_NOFP_SPRS \
1909 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
1911 /* Segment registers, for PowerPC. */
1912 #define PPC_SEGMENT_REGS \
1913 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
1914 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
1915 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
1916 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
1918 /* OEA SPRs for PowerPC. */
1919 #define PPC_OEA_SPRS \
1921 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
1922 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
1923 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
1924 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
1925 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
1926 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
1927 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
1928 /* 116 */ R4(dec), R(dabr), R4(ear)
1930 /* AltiVec registers. */
1931 #define PPC_ALTIVEC_REGS \
1932 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
1933 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
1934 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
1935 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
1936 /*151*/R4(vscr), R4(vrsave)
1938 /* Vectors of hi-lo general purpose registers. */
1939 #define PPC_EV_REGS \
1940 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
1941 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
1942 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
1943 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
1945 /* Lower half of the EV registers. */
1946 #define PPC_GPRS_PSEUDO_REGS \
1947 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
1948 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
1949 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
1950 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31)
1952 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
1953 user-level SPR's. */
1954 static const struct reg registers_power
[] =
1957 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
1961 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
1962 view of the PowerPC. */
1963 static const struct reg registers_powerpc
[] =
1970 /* PowerPC UISA - a PPC processor as viewed by user-level
1971 code, but without floating point registers. */
1972 static const struct reg registers_powerpc_nofp
[] =
1974 COMMON_UISA_NOFP_REGS
,
1978 /* IBM PowerPC 403. */
1979 static const struct reg registers_403
[] =
1985 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
1986 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
1987 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
1988 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
1989 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
1990 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
1993 /* IBM PowerPC 403GC. */
1994 static const struct reg registers_403GC
[] =
2000 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2001 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2002 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2003 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2004 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2005 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2006 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2007 /* 147 */ R(tbhu
), R(tblu
)
2010 /* Motorola PowerPC 505. */
2011 static const struct reg registers_505
[] =
2017 /* 119 */ R(eie
), R(eid
), R(nri
)
2020 /* Motorola PowerPC 860 or 850. */
2021 static const struct reg registers_860
[] =
2027 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2028 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2029 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2030 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2031 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2032 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2033 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2034 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2035 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2036 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2037 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2038 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2041 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2042 for reading and writing RTCU and RTCL. However, how one reads and writes a
2043 register is the stub's problem. */
2044 static const struct reg registers_601
[] =
2050 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2051 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2054 /* Motorola PowerPC 602. */
2055 static const struct reg registers_602
[] =
2061 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2062 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2063 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2066 /* Motorola/IBM PowerPC 603 or 603e. */
2067 static const struct reg registers_603
[] =
2073 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2074 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2075 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2078 /* Motorola PowerPC 604 or 604e. */
2079 static const struct reg registers_604
[] =
2085 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2086 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2087 /* 127 */ R(sia
), R(sda
)
2090 /* Motorola/IBM PowerPC 750 or 740. */
2091 static const struct reg registers_750
[] =
2097 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2098 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2099 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2100 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2101 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2102 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2106 /* Motorola PowerPC 7400. */
2107 static const struct reg registers_7400
[] =
2109 /* gpr0-gpr31, fpr0-fpr31 */
2111 /* ctr, xre, lr, cr */
2116 /* vr0-vr31, vrsave, vscr */
2118 /* FIXME? Add more registers? */
2121 /* Motorola e500. */
2122 static const struct reg registers_e500
[] =
2125 /* cr, lr, ctr, xer, "" */
2129 R8(acc
), R(spefscr
),
2130 /* NOTE: Add new registers here the end of the raw register
2131 list and just before the first pseudo register. */
2133 PPC_GPRS_PSEUDO_REGS
2136 /* Information about a particular processor variant. */
2140 /* Name of this variant. */
2143 /* English description of the variant. */
2146 /* bfd_arch_info.arch corresponding to variant. */
2147 enum bfd_architecture arch
;
2149 /* bfd_arch_info.mach corresponding to variant. */
2152 /* Number of real registers. */
2155 /* Number of pseudo registers. */
2158 /* Number of total registers (the sum of nregs and npregs). */
2161 /* Table of register names; registers[R] is the name of the register
2163 const struct reg
*regs
;
2166 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2169 num_registers (const struct reg
*reg_list
, int num_tot_regs
)
2174 for (i
= 0; i
< num_tot_regs
; i
++)
2175 if (!reg_list
[i
].pseudo
)
2182 num_pseudo_registers (const struct reg
*reg_list
, int num_tot_regs
)
2187 for (i
= 0; i
< num_tot_regs
; i
++)
2188 if (reg_list
[i
].pseudo
)
2194 /* Information in this table comes from the following web sites:
2195 IBM: http://www.chips.ibm.com:80/products/embedded/
2196 Motorola: http://www.mot.com/SPS/PowerPC/
2198 I'm sure I've got some of the variant descriptions not quite right.
2199 Please report any inaccuracies you find to GDB's maintainer.
2201 If you add entries to this table, please be sure to allow the new
2202 value as an argument to the --with-cpu flag, in configure.in. */
2204 static struct variant variants
[] =
2207 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2208 bfd_mach_ppc
, -1, -1, tot_num_registers (registers_powerpc
),
2210 {"power", "POWER user-level", bfd_arch_rs6000
,
2211 bfd_mach_rs6k
, -1, -1, tot_num_registers (registers_power
),
2213 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2214 bfd_mach_ppc_403
, -1, -1, tot_num_registers (registers_403
),
2216 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2217 bfd_mach_ppc_601
, -1, -1, tot_num_registers (registers_601
),
2219 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2220 bfd_mach_ppc_602
, -1, -1, tot_num_registers (registers_602
),
2222 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2223 bfd_mach_ppc_603
, -1, -1, tot_num_registers (registers_603
),
2225 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2226 604, -1, -1, tot_num_registers (registers_604
),
2228 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2229 bfd_mach_ppc_403gc
, -1, -1, tot_num_registers (registers_403GC
),
2231 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2232 bfd_mach_ppc_505
, -1, -1, tot_num_registers (registers_505
),
2234 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2235 bfd_mach_ppc_860
, -1, -1, tot_num_registers (registers_860
),
2237 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2238 bfd_mach_ppc_750
, -1, -1, tot_num_registers (registers_750
),
2240 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2241 bfd_mach_ppc_7400
, -1, -1, tot_num_registers (registers_7400
),
2243 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc
,
2244 bfd_mach_ppc_e500
, -1, -1, tot_num_registers (registers_e500
),
2248 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2249 bfd_mach_ppc64
, -1, -1, tot_num_registers (registers_powerpc
),
2251 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2252 bfd_mach_ppc_620
, -1, -1, tot_num_registers (registers_powerpc
),
2254 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2255 bfd_mach_ppc_630
, -1, -1, tot_num_registers (registers_powerpc
),
2257 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2258 bfd_mach_ppc_a35
, -1, -1, tot_num_registers (registers_powerpc
),
2260 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2261 bfd_mach_ppc_rs64ii
, -1, -1, tot_num_registers (registers_powerpc
),
2263 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2264 bfd_mach_ppc_rs64iii
, -1, -1, tot_num_registers (registers_powerpc
),
2267 /* FIXME: I haven't checked the register sets of the following. */
2268 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2269 bfd_mach_rs6k_rs1
, -1, -1, tot_num_registers (registers_power
),
2271 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2272 bfd_mach_rs6k_rsc
, -1, -1, tot_num_registers (registers_power
),
2274 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2275 bfd_mach_rs6k_rs2
, -1, -1, tot_num_registers (registers_power
),
2278 {0, 0, 0, 0, 0, 0, 0, 0}
2281 /* Initialize the number of registers and pseudo registers in each variant. */
2284 init_variants (void)
2288 for (v
= variants
; v
->name
; v
++)
2291 v
->nregs
= num_registers (v
->regs
, v
->num_tot_regs
);
2292 if (v
->npregs
== -1)
2293 v
->npregs
= num_pseudo_registers (v
->regs
, v
->num_tot_regs
);
2297 /* Return the variant corresponding to architecture ARCH and machine number
2298 MACH. If no such variant exists, return null. */
2300 static const struct variant
*
2301 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2303 const struct variant
*v
;
2305 for (v
= variants
; v
->name
; v
++)
2306 if (arch
== v
->arch
&& mach
== v
->mach
)
2313 gdb_print_insn_powerpc (bfd_vma memaddr
, disassemble_info
*info
)
2315 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2316 return print_insn_big_powerpc (memaddr
, info
);
2318 return print_insn_little_powerpc (memaddr
, info
);
2322 rs6000_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
2324 return frame_unwind_register_unsigned (next_frame
, PC_REGNUM
);
2327 static struct frame_id
2328 rs6000_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
2330 return frame_id_build (frame_unwind_register_unsigned (next_frame
,
2332 frame_pc_unwind (next_frame
));
2335 struct rs6000_frame_cache
2338 CORE_ADDR initial_sp
;
2339 struct trad_frame_saved_reg
*saved_regs
;
2342 static struct rs6000_frame_cache
*
2343 rs6000_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
2345 struct rs6000_frame_cache
*cache
;
2346 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
2347 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2348 struct rs6000_framedata fdata
;
2349 int wordsize
= tdep
->wordsize
;
2351 if ((*this_cache
) != NULL
)
2352 return (*this_cache
);
2353 cache
= FRAME_OBSTACK_ZALLOC (struct rs6000_frame_cache
);
2354 (*this_cache
) = cache
;
2355 cache
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
2357 skip_prologue (frame_func_unwind (next_frame
), frame_pc_unwind (next_frame
),
2360 /* If there were any saved registers, figure out parent's stack
2362 /* The following is true only if the frame doesn't have a call to
2365 if (fdata
.saved_fpr
== 0
2366 && fdata
.saved_gpr
== 0
2367 && fdata
.saved_vr
== 0
2368 && fdata
.saved_ev
== 0
2369 && fdata
.lr_offset
== 0
2370 && fdata
.cr_offset
== 0
2371 && fdata
.vr_offset
== 0
2372 && fdata
.ev_offset
== 0)
2373 cache
->base
= frame_unwind_register_unsigned (next_frame
, SP_REGNUM
);
2376 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
2377 address of the current frame. Things might be easier if the
2378 ->frame pointed to the outer-most address of the frame. In
2379 the mean time, the address of the prev frame is used as the
2380 base address of this frame. */
2381 cache
->base
= frame_unwind_register_unsigned (next_frame
, SP_REGNUM
);
2382 if (!fdata
.frameless
)
2383 /* Frameless really means stackless. */
2384 cache
->base
= read_memory_addr (cache
->base
, wordsize
);
2386 trad_frame_set_value (cache
->saved_regs
, SP_REGNUM
, cache
->base
);
2388 /* if != -1, fdata.saved_fpr is the smallest number of saved_fpr.
2389 All fpr's from saved_fpr to fp31 are saved. */
2391 if (fdata
.saved_fpr
>= 0)
2394 CORE_ADDR fpr_addr
= cache
->base
+ fdata
.fpr_offset
;
2395 for (i
= fdata
.saved_fpr
; i
< 32; i
++)
2397 cache
->saved_regs
[FP0_REGNUM
+ i
].addr
= fpr_addr
;
2402 /* if != -1, fdata.saved_gpr is the smallest number of saved_gpr.
2403 All gpr's from saved_gpr to gpr31 are saved. */
2405 if (fdata
.saved_gpr
>= 0)
2408 CORE_ADDR gpr_addr
= cache
->base
+ fdata
.gpr_offset
;
2409 for (i
= fdata
.saved_gpr
; i
< 32; i
++)
2411 cache
->saved_regs
[tdep
->ppc_gp0_regnum
+ i
].addr
= gpr_addr
;
2412 gpr_addr
+= wordsize
;
2416 /* if != -1, fdata.saved_vr is the smallest number of saved_vr.
2417 All vr's from saved_vr to vr31 are saved. */
2418 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
2420 if (fdata
.saved_vr
>= 0)
2423 CORE_ADDR vr_addr
= cache
->base
+ fdata
.vr_offset
;
2424 for (i
= fdata
.saved_vr
; i
< 32; i
++)
2426 cache
->saved_regs
[tdep
->ppc_vr0_regnum
+ i
].addr
= vr_addr
;
2427 vr_addr
+= register_size (gdbarch
, tdep
->ppc_vr0_regnum
);
2432 /* if != -1, fdata.saved_ev is the smallest number of saved_ev.
2433 All vr's from saved_ev to ev31 are saved. ????? */
2434 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
2436 if (fdata
.saved_ev
>= 0)
2439 CORE_ADDR ev_addr
= cache
->base
+ fdata
.ev_offset
;
2440 for (i
= fdata
.saved_ev
; i
< 32; i
++)
2442 cache
->saved_regs
[tdep
->ppc_ev0_regnum
+ i
].addr
= ev_addr
;
2443 cache
->saved_regs
[tdep
->ppc_gp0_regnum
+ i
].addr
= ev_addr
+ 4;
2444 ev_addr
+= register_size (gdbarch
, tdep
->ppc_ev0_regnum
);
2449 /* If != 0, fdata.cr_offset is the offset from the frame that
2451 if (fdata
.cr_offset
!= 0)
2452 cache
->saved_regs
[tdep
->ppc_cr_regnum
].addr
= cache
->base
+ fdata
.cr_offset
;
2454 /* If != 0, fdata.lr_offset is the offset from the frame that
2456 if (fdata
.lr_offset
!= 0)
2457 cache
->saved_regs
[tdep
->ppc_lr_regnum
].addr
= cache
->base
+ fdata
.lr_offset
;
2458 /* The PC is found in the link register. */
2459 cache
->saved_regs
[PC_REGNUM
] = cache
->saved_regs
[tdep
->ppc_lr_regnum
];
2461 /* If != 0, fdata.vrsave_offset is the offset from the frame that
2462 holds the VRSAVE. */
2463 if (fdata
.vrsave_offset
!= 0)
2464 cache
->saved_regs
[tdep
->ppc_vrsave_regnum
].addr
= cache
->base
+ fdata
.vrsave_offset
;
2466 if (fdata
.alloca_reg
< 0)
2467 /* If no alloca register used, then fi->frame is the value of the
2468 %sp for this frame, and it is good enough. */
2469 cache
->initial_sp
= frame_unwind_register_unsigned (next_frame
, SP_REGNUM
);
2471 cache
->initial_sp
= frame_unwind_register_unsigned (next_frame
,
2478 rs6000_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2479 struct frame_id
*this_id
)
2481 struct rs6000_frame_cache
*info
= rs6000_frame_cache (next_frame
,
2483 (*this_id
) = frame_id_build (info
->base
, frame_func_unwind (next_frame
));
2487 rs6000_frame_prev_register (struct frame_info
*next_frame
,
2489 int regnum
, int *optimizedp
,
2490 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2491 int *realnump
, void *valuep
)
2493 struct rs6000_frame_cache
*info
= rs6000_frame_cache (next_frame
,
2495 trad_frame_prev_register (next_frame
, info
->saved_regs
, regnum
,
2496 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2499 static const struct frame_unwind rs6000_frame_unwind
=
2502 rs6000_frame_this_id
,
2503 rs6000_frame_prev_register
2506 static const struct frame_unwind
*
2507 rs6000_frame_sniffer (struct frame_info
*next_frame
)
2509 return &rs6000_frame_unwind
;
2515 rs6000_frame_base_address (struct frame_info
*next_frame
,
2518 struct rs6000_frame_cache
*info
= rs6000_frame_cache (next_frame
,
2520 return info
->initial_sp
;
2523 static const struct frame_base rs6000_frame_base
= {
2524 &rs6000_frame_unwind
,
2525 rs6000_frame_base_address
,
2526 rs6000_frame_base_address
,
2527 rs6000_frame_base_address
2530 static const struct frame_base
*
2531 rs6000_frame_base_sniffer (struct frame_info
*next_frame
)
2533 return &rs6000_frame_base
;
2536 /* Initialize the current architecture based on INFO. If possible, re-use an
2537 architecture from ARCHES, which is a list of architectures already created
2538 during this debugging session.
2540 Called e.g. at program startup, when reading a core file, and when reading
2543 static struct gdbarch
*
2544 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2546 struct gdbarch
*gdbarch
;
2547 struct gdbarch_tdep
*tdep
;
2548 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2550 const struct variant
*v
;
2551 enum bfd_architecture arch
;
2557 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2558 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2560 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2561 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2563 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2565 /* Check word size. If INFO is from a binary file, infer it from
2566 that, else choose a likely default. */
2567 if (from_xcoff_exec
)
2569 if (bfd_xcoff_is_xcoff64 (info
.abfd
))
2574 else if (from_elf_exec
)
2576 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2583 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2584 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2585 info
.bfd_arch_info
->bits_per_byte
;
2590 /* Find a candidate among extant architectures. */
2591 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2593 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2595 /* Word size in the various PowerPC bfd_arch_info structs isn't
2596 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2597 separate word size check. */
2598 tdep
= gdbarch_tdep (arches
->gdbarch
);
2599 if (tdep
&& tdep
->wordsize
== wordsize
)
2600 return arches
->gdbarch
;
2603 /* None found, create a new architecture from INFO, whose bfd_arch_info
2604 validity depends on the source:
2605 - executable useless
2606 - rs6000_host_arch() good
2608 - "set arch" trust blindly
2609 - GDB startup useless but harmless */
2611 if (!from_xcoff_exec
)
2613 arch
= info
.bfd_arch_info
->arch
;
2614 mach
= info
.bfd_arch_info
->mach
;
2618 arch
= bfd_arch_powerpc
;
2619 bfd_default_set_arch_mach (&abfd
, arch
, 0);
2620 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2621 mach
= info
.bfd_arch_info
->mach
;
2623 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2624 tdep
->wordsize
= wordsize
;
2626 /* For e500 executables, the apuinfo section is of help here. Such
2627 section contains the identifier and revision number of each
2628 Application-specific Processing Unit that is present on the
2629 chip. The content of the section is determined by the assembler
2630 which looks at each instruction and determines which unit (and
2631 which version of it) can execute it. In our case we just look for
2632 the existance of the section. */
2636 sect
= bfd_get_section_by_name (info
.abfd
, ".PPC.EMB.apuinfo");
2639 arch
= info
.bfd_arch_info
->arch
;
2640 mach
= bfd_mach_ppc_e500
;
2641 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2642 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2646 gdbarch
= gdbarch_alloc (&info
, tdep
);
2647 power
= arch
== bfd_arch_rs6000
;
2649 /* Initialize the number of real and pseudo registers in each variant. */
2652 /* Choose variant. */
2653 v
= find_variant_by_arch (arch
, mach
);
2657 tdep
->regs
= v
->regs
;
2659 tdep
->ppc_gp0_regnum
= 0;
2660 tdep
->ppc_gplast_regnum
= 31;
2661 tdep
->ppc_toc_regnum
= 2;
2662 tdep
->ppc_ps_regnum
= 65;
2663 tdep
->ppc_cr_regnum
= 66;
2664 tdep
->ppc_lr_regnum
= 67;
2665 tdep
->ppc_ctr_regnum
= 68;
2666 tdep
->ppc_xer_regnum
= 69;
2667 if (v
->mach
== bfd_mach_ppc_601
)
2668 tdep
->ppc_mq_regnum
= 124;
2670 tdep
->ppc_mq_regnum
= 70;
2672 tdep
->ppc_mq_regnum
= -1;
2673 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2675 set_gdbarch_pc_regnum (gdbarch
, 64);
2676 set_gdbarch_sp_regnum (gdbarch
, 1);
2677 set_gdbarch_deprecated_fp_regnum (gdbarch
, 1);
2678 if (sysv_abi
&& wordsize
== 8)
2679 set_gdbarch_return_value (gdbarch
, ppc64_sysv_abi_return_value
);
2680 else if (sysv_abi
&& wordsize
== 4)
2681 set_gdbarch_return_value (gdbarch
, ppc_sysv_abi_return_value
);
2684 set_gdbarch_deprecated_extract_return_value (gdbarch
, rs6000_extract_return_value
);
2685 set_gdbarch_deprecated_store_return_value (gdbarch
, rs6000_store_return_value
);
2688 if (v
->arch
== bfd_arch_powerpc
)
2692 tdep
->ppc_vr0_regnum
= 71;
2693 tdep
->ppc_vrsave_regnum
= 104;
2694 tdep
->ppc_ev0_regnum
= -1;
2695 tdep
->ppc_ev31_regnum
= -1;
2697 case bfd_mach_ppc_7400
:
2698 tdep
->ppc_vr0_regnum
= 119;
2699 tdep
->ppc_vrsave_regnum
= 152;
2700 tdep
->ppc_ev0_regnum
= -1;
2701 tdep
->ppc_ev31_regnum
= -1;
2703 case bfd_mach_ppc_e500
:
2704 tdep
->ppc_gp0_regnum
= 41;
2705 tdep
->ppc_gplast_regnum
= tdep
->ppc_gp0_regnum
+ 32 - 1;
2706 tdep
->ppc_toc_regnum
= -1;
2707 tdep
->ppc_ps_regnum
= 1;
2708 tdep
->ppc_cr_regnum
= 2;
2709 tdep
->ppc_lr_regnum
= 3;
2710 tdep
->ppc_ctr_regnum
= 4;
2711 tdep
->ppc_xer_regnum
= 5;
2712 tdep
->ppc_ev0_regnum
= 7;
2713 tdep
->ppc_ev31_regnum
= 38;
2714 set_gdbarch_pc_regnum (gdbarch
, 0);
2715 set_gdbarch_sp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2716 set_gdbarch_deprecated_fp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2717 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, e500_dwarf2_reg_to_regnum
);
2718 set_gdbarch_pseudo_register_read (gdbarch
, e500_pseudo_register_read
);
2719 set_gdbarch_pseudo_register_write (gdbarch
, e500_pseudo_register_write
);
2722 tdep
->ppc_vr0_regnum
= -1;
2723 tdep
->ppc_vrsave_regnum
= -1;
2724 tdep
->ppc_ev0_regnum
= -1;
2725 tdep
->ppc_ev31_regnum
= -1;
2729 /* Sanity check on registers. */
2730 gdb_assert (strcmp (tdep
->regs
[tdep
->ppc_gp0_regnum
].name
, "r0") == 0);
2732 /* Set lr_frame_offset. */
2734 tdep
->lr_frame_offset
= 16;
2736 tdep
->lr_frame_offset
= 4;
2738 tdep
->lr_frame_offset
= 8;
2740 /* Calculate byte offsets in raw register array. */
2741 tdep
->regoff
= xmalloc (v
->num_tot_regs
* sizeof (int));
2742 for (i
= off
= 0; i
< v
->num_tot_regs
; i
++)
2744 tdep
->regoff
[i
] = off
;
2745 off
+= regsize (v
->regs
+ i
, wordsize
);
2748 /* Select instruction printer. */
2750 set_gdbarch_print_insn (gdbarch
, print_insn_rs6000
);
2752 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_powerpc
);
2754 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2756 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2757 set_gdbarch_num_pseudo_regs (gdbarch
, v
->npregs
);
2758 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2759 set_gdbarch_deprecated_register_size (gdbarch
, wordsize
);
2760 set_gdbarch_deprecated_register_bytes (gdbarch
, off
);
2761 set_gdbarch_deprecated_register_byte (gdbarch
, rs6000_register_byte
);
2762 set_gdbarch_deprecated_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2763 set_gdbarch_deprecated_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2765 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2766 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2767 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2768 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2769 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2770 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2771 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2773 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
2775 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2776 set_gdbarch_char_signed (gdbarch
, 0);
2778 set_gdbarch_frame_align (gdbarch
, rs6000_frame_align
);
2779 if (sysv_abi
&& wordsize
== 8)
2781 set_gdbarch_frame_red_zone_size (gdbarch
, 288);
2782 else if (!sysv_abi
&& wordsize
== 4)
2783 /* PowerOpen / AIX 32 bit. The saved area or red zone consists of
2784 19 4 byte GPRS + 18 8 byte FPRs giving a total of 220 bytes.
2785 Problem is, 220 isn't frame (16 byte) aligned. Round it up to
2787 set_gdbarch_frame_red_zone_size (gdbarch
, 224);
2789 set_gdbarch_deprecated_register_convertible (gdbarch
, rs6000_register_convertible
);
2790 set_gdbarch_deprecated_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2791 set_gdbarch_deprecated_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2792 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2793 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2794 is correct for the SysV ABI when the wordsize is 8, but I'm also
2795 fairly certain that ppc_sysv_abi_push_arguments() will give even
2796 worse results since it only works for 32-bit code. So, for the moment,
2797 we're better off calling rs6000_push_arguments() since it works for
2798 64-bit code. At some point in the future, this matter needs to be
2800 if (sysv_abi
&& wordsize
== 4)
2801 set_gdbarch_push_dummy_call (gdbarch
, ppc_sysv_abi_push_dummy_call
);
2802 else if (sysv_abi
&& wordsize
== 8)
2803 set_gdbarch_push_dummy_call (gdbarch
, ppc64_sysv_abi_push_dummy_call
);
2805 set_gdbarch_push_dummy_call (gdbarch
, rs6000_push_dummy_call
);
2807 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2809 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2810 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2811 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2813 /* Handle the 64-bit SVR4 minimal-symbol convention of using "FN"
2814 for the descriptor and ".FN" for the entry-point -- a user
2815 specifying "break FN" will unexpectedly end up with a breakpoint
2816 on the descriptor and not the function. This architecture method
2817 transforms any breakpoints on descriptors into breakpoints on the
2818 corresponding entry point. */
2819 if (sysv_abi
&& wordsize
== 8)
2820 set_gdbarch_adjust_breakpoint_address (gdbarch
, ppc64_sysv_abi_adjust_breakpoint_address
);
2822 /* Not sure on this. FIXMEmgo */
2823 set_gdbarch_frame_args_skip (gdbarch
, 8);
2826 set_gdbarch_use_struct_convention (gdbarch
,
2827 rs6000_use_struct_convention
);
2831 /* Handle RS/6000 function pointers (which are really function
2833 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2834 rs6000_convert_from_func_ptr_addr
);
2837 /* Helpers for function argument information. */
2838 set_gdbarch_fetch_pointer_argument (gdbarch
, rs6000_fetch_pointer_argument
);
2840 /* Hook in ABI-specific overrides, if they have been registered. */
2841 gdbarch_init_osabi (info
, gdbarch
);
2845 case GDB_OSABI_NETBSD_AOUT
:
2846 case GDB_OSABI_NETBSD_ELF
:
2847 case GDB_OSABI_UNKNOWN
:
2848 case GDB_OSABI_LINUX
:
2849 set_gdbarch_unwind_pc (gdbarch
, rs6000_unwind_pc
);
2850 frame_unwind_append_sniffer (gdbarch
, rs6000_frame_sniffer
);
2851 set_gdbarch_unwind_dummy_id (gdbarch
, rs6000_unwind_dummy_id
);
2852 frame_base_append_sniffer (gdbarch
, rs6000_frame_base_sniffer
);
2855 set_gdbarch_deprecated_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2856 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2858 set_gdbarch_unwind_pc (gdbarch
, rs6000_unwind_pc
);
2859 frame_unwind_append_sniffer (gdbarch
, rs6000_frame_sniffer
);
2860 set_gdbarch_unwind_dummy_id (gdbarch
, rs6000_unwind_dummy_id
);
2861 frame_base_append_sniffer (gdbarch
, rs6000_frame_base_sniffer
);
2864 if (from_xcoff_exec
)
2866 /* NOTE: jimix/2003-06-09: This test should really check for
2867 GDB_OSABI_AIX when that is defined and becomes
2868 available. (Actually, once things are properly split apart,
2869 the test goes away.) */
2870 /* RS6000/AIX does not support PT_STEP. Has to be simulated. */
2871 set_gdbarch_software_single_step (gdbarch
, rs6000_software_single_step
);
2878 rs6000_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2880 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2885 /* FIXME: Dump gdbarch_tdep. */
2888 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
2891 rs6000_info_powerpc_command (char *args
, int from_tty
)
2893 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
2896 /* Initialization code. */
2898 extern initialize_file_ftype _initialize_rs6000_tdep
; /* -Wmissing-prototypes */
2901 _initialize_rs6000_tdep (void)
2903 gdbarch_register (bfd_arch_rs6000
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2904 gdbarch_register (bfd_arch_powerpc
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2906 /* Add root prefix command for "info powerpc" commands */
2907 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
2908 "Various POWERPC info specific commands.",
2909 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);