1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
39 #include "libbfd.h" /* for bfd_default_set_arch_mach */
40 #include "coff/internal.h" /* for libcoff.h */
41 #include "libcoff.h" /* for xcoff_data */
42 #include "coff/xcoff.h"
47 #include "solib-svr4.h"
50 #include "gdb_assert.h"
53 /* If the kernel has to deliver a signal, it pushes a sigcontext
54 structure on the stack and then calls the signal handler, passing
55 the address of the sigcontext in an argument register. Usually
56 the signal handler doesn't save this register, so we have to
57 access the sigcontext structure via an offset from the signal handler
59 The following constants were determined by experimentation on AIX 3.2. */
60 #define SIG_FRAME_PC_OFFSET 96
61 #define SIG_FRAME_LR_OFFSET 108
62 #define SIG_FRAME_FP_OFFSET 284
64 /* To be used by skip_prologue. */
66 struct rs6000_framedata
68 int offset
; /* total size of frame --- the distance
69 by which we decrement sp to allocate
71 int saved_gpr
; /* smallest # of saved gpr */
72 int saved_fpr
; /* smallest # of saved fpr */
73 int saved_vr
; /* smallest # of saved vr */
74 int saved_ev
; /* smallest # of saved ev */
75 int alloca_reg
; /* alloca register number (frame ptr) */
76 char frameless
; /* true if frameless functions. */
77 char nosavedpc
; /* true if pc not saved. */
78 int gpr_offset
; /* offset of saved gprs from prev sp */
79 int fpr_offset
; /* offset of saved fprs from prev sp */
80 int vr_offset
; /* offset of saved vrs from prev sp */
81 int ev_offset
; /* offset of saved evs from prev sp */
82 int lr_offset
; /* offset of saved lr */
83 int cr_offset
; /* offset of saved cr */
84 int vrsave_offset
; /* offset of saved vrsave register */
87 /* Description of a single register. */
91 char *name
; /* name of register */
92 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
93 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
94 unsigned char fpr
; /* whether register is floating-point */
95 unsigned char pseudo
; /* whether register is pseudo */
98 /* Breakpoint shadows for the single step instructions will be kept here. */
100 static struct sstep_breaks
102 /* Address, or 0 if this is not in use. */
104 /* Shadow contents. */
109 /* Hook for determining the TOC address when calling functions in the
110 inferior under AIX. The initialization code in rs6000-nat.c sets
111 this hook to point to find_toc_address. */
113 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
115 /* Hook to set the current architecture when starting a child process.
116 rs6000-nat.c sets this. */
118 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
120 /* Static function prototypes */
122 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
124 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
125 struct rs6000_framedata
*);
126 static void frame_get_saved_regs (struct frame_info
* fi
,
127 struct rs6000_framedata
* fdatap
);
128 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
130 /* Is REGNO an AltiVec register? Return 1 if so, 0 otherwise. */
132 altivec_register_p (int regno
)
134 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
135 if (tdep
->ppc_vr0_regnum
< 0 || tdep
->ppc_vrsave_regnum
< 0)
138 return (regno
>= tdep
->ppc_vr0_regnum
&& regno
<= tdep
->ppc_vrsave_regnum
);
141 /* Use the architectures FP registers? */
143 ppc_floating_point_unit_p (struct gdbarch
*gdbarch
)
145 const struct bfd_arch_info
*info
= gdbarch_bfd_arch_info (gdbarch
);
146 if (info
->arch
== bfd_arch_powerpc
)
147 return (info
->mach
!= bfd_mach_ppc_e500
);
148 if (info
->arch
== bfd_arch_rs6000
)
153 /* Read a LEN-byte address from debugged memory address MEMADDR. */
156 read_memory_addr (CORE_ADDR memaddr
, int len
)
158 return read_memory_unsigned_integer (memaddr
, len
);
162 rs6000_skip_prologue (CORE_ADDR pc
)
164 struct rs6000_framedata frame
;
165 pc
= skip_prologue (pc
, 0, &frame
);
170 /* Fill in fi->saved_regs */
172 struct frame_extra_info
174 /* Functions calling alloca() change the value of the stack
175 pointer. We need to use initial stack pointer (which is saved in
176 r31 by gcc) in such cases. If a compiler emits traceback table,
177 then we should use the alloca register specified in traceback
179 CORE_ADDR initial_sp
; /* initial stack pointer. */
183 rs6000_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
185 struct frame_extra_info
*extra_info
=
186 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
187 extra_info
->initial_sp
= 0;
188 if (get_next_frame (fi
) != NULL
189 && get_frame_pc (fi
) < TEXT_SEGMENT_BASE
)
190 /* We're in get_prev_frame */
191 /* and this is a special signal frame. */
192 /* (fi->pc will be some low address in the kernel, */
193 /* to which the signal handler returns). */
194 deprecated_set_frame_type (fi
, SIGTRAMP_FRAME
);
197 /* Put here the code to store, into a struct frame_saved_regs,
198 the addresses of the saved registers of frame described by FRAME_INFO.
199 This includes special registers such as pc and fp saved in special
200 ways in the stack frame. sp is even more special:
201 the address we return for it IS the sp for the next frame. */
203 /* In this implementation for RS/6000, we do *not* save sp. I am
204 not sure if it will be needed. The following function takes care of gpr's
208 rs6000_frame_init_saved_regs (struct frame_info
*fi
)
210 frame_get_saved_regs (fi
, NULL
);
214 rs6000_frame_args_address (struct frame_info
*fi
)
216 struct frame_extra_info
*extra_info
= get_frame_extra_info (fi
);
217 if (extra_info
->initial_sp
!= 0)
218 return extra_info
->initial_sp
;
220 return frame_initial_stack_address (fi
);
223 /* Immediately after a function call, return the saved pc.
224 Can't go through the frames for this because on some machines
225 the new frame is not set up until the new function executes
226 some instructions. */
229 rs6000_saved_pc_after_call (struct frame_info
*fi
)
231 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
234 /* Get the ith function argument for the current function. */
236 rs6000_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
240 get_frame_register (frame
, 3 + argi
, &addr
);
244 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
247 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
254 absolute
= (int) ((instr
>> 1) & 1);
259 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
263 dest
= pc
+ immediate
;
267 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
271 dest
= pc
+ immediate
;
275 ext_op
= (instr
>> 1) & 0x3ff;
277 if (ext_op
== 16) /* br conditional register */
279 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
281 /* If we are about to return from a signal handler, dest is
282 something like 0x3c90. The current frame is a signal handler
283 caller frame, upon completion of the sigreturn system call
284 execution will return to the saved PC in the frame. */
285 if (dest
< TEXT_SEGMENT_BASE
)
287 struct frame_info
*fi
;
289 fi
= get_current_frame ();
291 dest
= read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
292 gdbarch_tdep (current_gdbarch
)->wordsize
);
296 else if (ext_op
== 528) /* br cond to count reg */
298 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
300 /* If we are about to execute a system call, dest is something
301 like 0x22fc or 0x3b00. Upon completion the system call
302 will return to the address in the link register. */
303 if (dest
< TEXT_SEGMENT_BASE
)
304 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
313 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
317 /* Sequence of bytes for breakpoint instruction. */
319 const static unsigned char *
320 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
322 static unsigned char big_breakpoint
[] = { 0x7d, 0x82, 0x10, 0x08 };
323 static unsigned char little_breakpoint
[] = { 0x08, 0x10, 0x82, 0x7d };
325 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
326 return big_breakpoint
;
328 return little_breakpoint
;
332 /* AIX does not support PT_STEP. Simulate it. */
335 rs6000_software_single_step (enum target_signal signal
,
336 int insert_breakpoints_p
)
340 const char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
346 if (insert_breakpoints_p
)
351 insn
= read_memory_integer (loc
, 4);
353 breaks
[0] = loc
+ breakp_sz
;
355 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
357 /* Don't put two breakpoints on the same address. */
358 if (breaks
[1] == breaks
[0])
361 stepBreaks
[1].address
= 0;
363 for (ii
= 0; ii
< 2; ++ii
)
366 /* ignore invalid breakpoint. */
367 if (breaks
[ii
] == -1)
369 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
370 stepBreaks
[ii
].address
= breaks
[ii
];
377 /* remove step breakpoints. */
378 for (ii
= 0; ii
< 2; ++ii
)
379 if (stepBreaks
[ii
].address
!= 0)
380 target_remove_breakpoint (stepBreaks
[ii
].address
,
381 stepBreaks
[ii
].data
);
383 errno
= 0; /* FIXME, don't ignore errors! */
384 /* What errors? {read,write}_memory call error(). */
388 /* return pc value after skipping a function prologue and also return
389 information about a function frame.
391 in struct rs6000_framedata fdata:
392 - frameless is TRUE, if function does not have a frame.
393 - nosavedpc is TRUE, if function does not save %pc value in its frame.
394 - offset is the initial size of this stack frame --- the amount by
395 which we decrement the sp to allocate the frame.
396 - saved_gpr is the number of the first saved gpr.
397 - saved_fpr is the number of the first saved fpr.
398 - saved_vr is the number of the first saved vr.
399 - saved_ev is the number of the first saved ev.
400 - alloca_reg is the number of the register used for alloca() handling.
402 - gpr_offset is the offset of the first saved gpr from the previous frame.
403 - fpr_offset is the offset of the first saved fpr from the previous frame.
404 - vr_offset is the offset of the first saved vr from the previous frame.
405 - ev_offset is the offset of the first saved ev from the previous frame.
406 - lr_offset is the offset of the saved lr
407 - cr_offset is the offset of the saved cr
408 - vrsave_offset is the offset of the saved vrsave register
411 #define SIGNED_SHORT(x) \
412 ((sizeof (short) == 2) \
413 ? ((int)(short)(x)) \
414 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
416 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
418 /* Limit the number of skipped non-prologue instructions, as the examining
419 of the prologue is expensive. */
420 static int max_skip_non_prologue_insns
= 10;
422 /* Given PC representing the starting address of a function, and
423 LIM_PC which is the (sloppy) limit to which to scan when looking
424 for a prologue, attempt to further refine this limit by using
425 the line data in the symbol table. If successful, a better guess
426 on where the prologue ends is returned, otherwise the previous
427 value of lim_pc is returned. */
429 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
431 struct symtab_and_line prologue_sal
;
433 prologue_sal
= find_pc_line (pc
, 0);
434 if (prologue_sal
.line
!= 0)
437 CORE_ADDR addr
= prologue_sal
.end
;
439 /* Handle the case in which compiler's optimizer/scheduler
440 has moved instructions into the prologue. We scan ahead
441 in the function looking for address ranges whose corresponding
442 line number is less than or equal to the first one that we
443 found for the function. (It can be less than when the
444 scheduler puts a body instruction before the first prologue
446 for (i
= 2 * max_skip_non_prologue_insns
;
447 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
450 struct symtab_and_line sal
;
452 sal
= find_pc_line (addr
, 0);
455 if (sal
.line
<= prologue_sal
.line
456 && sal
.symtab
== prologue_sal
.symtab
)
463 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
464 lim_pc
= prologue_sal
.end
;
471 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
473 CORE_ADDR orig_pc
= pc
;
474 CORE_ADDR last_prologue_pc
= pc
;
475 CORE_ADDR li_found_pc
= 0;
479 long vr_saved_offset
= 0;
488 int minimal_toc_loaded
= 0;
489 int prev_insn_was_prologue_insn
= 1;
490 int num_skip_non_prologue_insns
= 0;
491 const struct bfd_arch_info
*arch_info
= gdbarch_bfd_arch_info (current_gdbarch
);
492 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
494 /* Attempt to find the end of the prologue when no limit is specified.
495 Note that refine_prologue_limit() has been written so that it may
496 be used to "refine" the limits of non-zero PC values too, but this
497 is only safe if we 1) trust the line information provided by the
498 compiler and 2) iterate enough to actually find the end of the
501 It may become a good idea at some point (for both performance and
502 accuracy) to unconditionally call refine_prologue_limit(). But,
503 until we can make a clear determination that this is beneficial,
504 we'll play it safe and only use it to obtain a limit when none
505 has been specified. */
507 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
509 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
510 fdata
->saved_gpr
= -1;
511 fdata
->saved_fpr
= -1;
512 fdata
->saved_vr
= -1;
513 fdata
->saved_ev
= -1;
514 fdata
->alloca_reg
= -1;
515 fdata
->frameless
= 1;
516 fdata
->nosavedpc
= 1;
520 /* Sometimes it isn't clear if an instruction is a prologue
521 instruction or not. When we encounter one of these ambiguous
522 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
523 Otherwise, we'll assume that it really is a prologue instruction. */
524 if (prev_insn_was_prologue_insn
)
525 last_prologue_pc
= pc
;
527 /* Stop scanning if we've hit the limit. */
528 if (lim_pc
!= 0 && pc
>= lim_pc
)
531 prev_insn_was_prologue_insn
= 1;
533 /* Fetch the instruction and convert it to an integer. */
534 if (target_read_memory (pc
, buf
, 4))
536 op
= extract_signed_integer (buf
, 4);
538 if ((op
& 0xfc1fffff) == 0x7c0802a6)
540 lr_reg
= (op
& 0x03e00000);
544 else if ((op
& 0xfc1fffff) == 0x7c000026)
546 cr_reg
= (op
& 0x03e00000);
550 else if ((op
& 0xfc1f0000) == 0xd8010000)
551 { /* stfd Rx,NUM(r1) */
552 reg
= GET_SRC_REG (op
);
553 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
555 fdata
->saved_fpr
= reg
;
556 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
561 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
562 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
563 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
564 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
567 reg
= GET_SRC_REG (op
);
568 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
570 fdata
->saved_gpr
= reg
;
571 if ((op
& 0xfc1f0003) == 0xf8010000)
573 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
578 else if ((op
& 0xffff0000) == 0x60000000)
581 /* Allow nops in the prologue, but do not consider them to
582 be part of the prologue unless followed by other prologue
584 prev_insn_was_prologue_insn
= 0;
588 else if ((op
& 0xffff0000) == 0x3c000000)
589 { /* addis 0,0,NUM, used
591 fdata
->offset
= (op
& 0x0000ffff) << 16;
592 fdata
->frameless
= 0;
596 else if ((op
& 0xffff0000) == 0x60000000)
597 { /* ori 0,0,NUM, 2nd ha
598 lf of >= 32k frames */
599 fdata
->offset
|= (op
& 0x0000ffff);
600 fdata
->frameless
= 0;
604 else if (lr_reg
!= -1 &&
605 /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */
606 (((op
& 0xffff0000) == (lr_reg
| 0xf8010000)) ||
607 /* stw Rx, NUM(r1) */
608 ((op
& 0xffff0000) == (lr_reg
| 0x90010000)) ||
609 /* stwu Rx, NUM(r1) */
610 ((op
& 0xffff0000) == (lr_reg
| 0x94010000))))
611 { /* where Rx == lr */
612 fdata
->lr_offset
= offset
;
613 fdata
->nosavedpc
= 0;
615 if ((op
& 0xfc000003) == 0xf8000000 || /* std */
616 (op
& 0xfc000000) == 0x90000000) /* stw */
618 /* Does not update r1, so add displacement to lr_offset. */
619 fdata
->lr_offset
+= SIGNED_SHORT (op
);
624 else if (cr_reg
!= -1 &&
625 /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */
626 (((op
& 0xffff0000) == (cr_reg
| 0xf8010000)) ||
627 /* stw Rx, NUM(r1) */
628 ((op
& 0xffff0000) == (cr_reg
| 0x90010000)) ||
629 /* stwu Rx, NUM(r1) */
630 ((op
& 0xffff0000) == (cr_reg
| 0x94010000))))
631 { /* where Rx == cr */
632 fdata
->cr_offset
= offset
;
634 if ((op
& 0xfc000003) == 0xf8000000 ||
635 (op
& 0xfc000000) == 0x90000000)
637 /* Does not update r1, so add displacement to cr_offset. */
638 fdata
->cr_offset
+= SIGNED_SHORT (op
);
643 else if (op
== 0x48000005)
649 else if (op
== 0x48000004)
654 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
655 in V.4 -mminimal-toc */
656 (op
& 0xffff0000) == 0x3bde0000)
657 { /* addi 30,30,foo@l */
661 else if ((op
& 0xfc000001) == 0x48000001)
665 fdata
->frameless
= 0;
666 /* Don't skip over the subroutine call if it is not within
667 the first three instructions of the prologue. */
668 if ((pc
- orig_pc
) > 8)
671 op
= read_memory_integer (pc
+ 4, 4);
673 /* At this point, make sure this is not a trampoline
674 function (a function that simply calls another functions,
675 and nothing else). If the next is not a nop, this branch
676 was part of the function prologue. */
678 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
679 break; /* don't skip over
684 /* update stack pointer */
685 else if ((op
& 0xfc1f0000) == 0x94010000)
686 { /* stu rX,NUM(r1) || stwu rX,NUM(r1) */
687 fdata
->frameless
= 0;
688 fdata
->offset
= SIGNED_SHORT (op
);
689 offset
= fdata
->offset
;
692 else if ((op
& 0xfc1f016a) == 0x7c01016e)
693 { /* stwux rX,r1,rY */
694 /* no way to figure out what r1 is going to be */
695 fdata
->frameless
= 0;
696 offset
= fdata
->offset
;
699 else if ((op
& 0xfc1f0003) == 0xf8010001)
700 { /* stdu rX,NUM(r1) */
701 fdata
->frameless
= 0;
702 fdata
->offset
= SIGNED_SHORT (op
& ~3UL);
703 offset
= fdata
->offset
;
706 else if ((op
& 0xfc1f016a) == 0x7c01016a)
707 { /* stdux rX,r1,rY */
708 /* no way to figure out what r1 is going to be */
709 fdata
->frameless
= 0;
710 offset
= fdata
->offset
;
713 /* Load up minimal toc pointer */
714 else if (((op
>> 22) == 0x20f || /* l r31,... or l r30,... */
715 (op
>> 22) == 0x3af) /* ld r31,... or ld r30,... */
716 && !minimal_toc_loaded
)
718 minimal_toc_loaded
= 1;
721 /* move parameters from argument registers to local variable
724 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
725 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
726 (((op
>> 21) & 31) <= 10) &&
727 ((long) ((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
731 /* store parameters in stack */
733 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
734 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
735 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
739 /* store parameters in stack via frame pointer */
742 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
743 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
744 (op
& 0xfc1f0000) == 0xfc1f0000))
745 { /* frsp, fp?,NUM(r1) */
748 /* Set up frame pointer */
750 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
753 fdata
->frameless
= 0;
755 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
+ 31);
758 /* Another way to set up the frame pointer. */
760 else if ((op
& 0xfc1fffff) == 0x38010000)
761 { /* addi rX, r1, 0x0 */
762 fdata
->frameless
= 0;
764 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
765 + ((op
& ~0x38010000) >> 21));
768 /* AltiVec related instructions. */
769 /* Store the vrsave register (spr 256) in another register for
770 later manipulation, or load a register into the vrsave
771 register. 2 instructions are used: mfvrsave and
772 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
773 and mtspr SPR256, Rn. */
774 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
775 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
776 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
778 vrsave_reg
= GET_SRC_REG (op
);
781 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
785 /* Store the register where vrsave was saved to onto the stack:
786 rS is the register where vrsave was stored in a previous
788 /* 100100 sssss 00001 dddddddd dddddddd */
789 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
791 if (vrsave_reg
== GET_SRC_REG (op
))
793 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
798 /* Compute the new value of vrsave, by modifying the register
799 where vrsave was saved to. */
800 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
801 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
805 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
806 in a pair of insns to save the vector registers on the
808 /* 001110 00000 00000 iiii iiii iiii iiii */
809 /* 001110 01110 00000 iiii iiii iiii iiii */
810 else if ((op
& 0xffff0000) == 0x38000000 /* li r0, SIMM */
811 || (op
& 0xffff0000) == 0x39c00000) /* li r14, SIMM */
814 vr_saved_offset
= SIGNED_SHORT (op
);
816 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
817 /* 011111 sssss 11111 00000 00111001110 */
818 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
820 if (pc
== (li_found_pc
+ 4))
822 vr_reg
= GET_SRC_REG (op
);
823 /* If this is the first vector reg to be saved, or if
824 it has a lower number than others previously seen,
825 reupdate the frame info. */
826 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
828 fdata
->saved_vr
= vr_reg
;
829 fdata
->vr_offset
= vr_saved_offset
+ offset
;
831 vr_saved_offset
= -1;
836 /* End AltiVec related instructions. */
838 /* Start BookE related instructions. */
839 /* Store gen register S at (r31+uimm).
840 Any register less than r13 is volatile, so we don't care. */
841 /* 000100 sssss 11111 iiiii 01100100001 */
842 else if (arch_info
->mach
== bfd_mach_ppc_e500
843 && (op
& 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
845 if ((op
& 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
848 ev_reg
= GET_SRC_REG (op
);
849 imm
= (op
>> 11) & 0x1f;
851 /* If this is the first vector reg to be saved, or if
852 it has a lower number than others previously seen,
853 reupdate the frame info. */
854 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
856 fdata
->saved_ev
= ev_reg
;
857 fdata
->ev_offset
= ev_offset
+ offset
;
862 /* Store gen register rS at (r1+rB). */
863 /* 000100 sssss 00001 bbbbb 01100100000 */
864 else if (arch_info
->mach
== bfd_mach_ppc_e500
865 && (op
& 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
867 if (pc
== (li_found_pc
+ 4))
869 ev_reg
= GET_SRC_REG (op
);
870 /* If this is the first vector reg to be saved, or if
871 it has a lower number than others previously seen,
872 reupdate the frame info. */
873 /* We know the contents of rB from the previous instruction. */
874 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
876 fdata
->saved_ev
= ev_reg
;
877 fdata
->ev_offset
= vr_saved_offset
+ offset
;
879 vr_saved_offset
= -1;
885 /* Store gen register r31 at (rA+uimm). */
886 /* 000100 11111 aaaaa iiiii 01100100001 */
887 else if (arch_info
->mach
== bfd_mach_ppc_e500
888 && (op
& 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
890 /* Wwe know that the source register is 31 already, but
891 it can't hurt to compute it. */
892 ev_reg
= GET_SRC_REG (op
);
893 ev_offset
= ((op
>> 11) & 0x1f) * 8;
894 /* If this is the first vector reg to be saved, or if
895 it has a lower number than others previously seen,
896 reupdate the frame info. */
897 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
899 fdata
->saved_ev
= ev_reg
;
900 fdata
->ev_offset
= ev_offset
+ offset
;
905 /* Store gen register S at (r31+r0).
906 Store param on stack when offset from SP bigger than 4 bytes. */
907 /* 000100 sssss 11111 00000 01100100000 */
908 else if (arch_info
->mach
== bfd_mach_ppc_e500
909 && (op
& 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
911 if (pc
== (li_found_pc
+ 4))
913 if ((op
& 0x03e00000) >= 0x01a00000)
915 ev_reg
= GET_SRC_REG (op
);
916 /* If this is the first vector reg to be saved, or if
917 it has a lower number than others previously seen,
918 reupdate the frame info. */
919 /* We know the contents of r0 from the previous
921 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
923 fdata
->saved_ev
= ev_reg
;
924 fdata
->ev_offset
= vr_saved_offset
+ offset
;
928 vr_saved_offset
= -1;
933 /* End BookE related instructions. */
937 /* Not a recognized prologue instruction.
938 Handle optimizer code motions into the prologue by continuing
939 the search if we have no valid frame yet or if the return
940 address is not yet saved in the frame. */
941 if (fdata
->frameless
== 0
942 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
945 if (op
== 0x4e800020 /* blr */
946 || op
== 0x4e800420) /* bctr */
947 /* Do not scan past epilogue in frameless functions or
950 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
951 /* Never skip branches. */
954 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
955 /* Do not scan too many insns, scanning insns is expensive with
959 /* Continue scanning. */
960 prev_insn_was_prologue_insn
= 0;
966 /* I have problems with skipping over __main() that I need to address
967 * sometime. Previously, I used to use misc_function_vector which
968 * didn't work as well as I wanted to be. -MGO */
970 /* If the first thing after skipping a prolog is a branch to a function,
971 this might be a call to an initializer in main(), introduced by gcc2.
972 We'd like to skip over it as well. Fortunately, xlc does some extra
973 work before calling a function right after a prologue, thus we can
974 single out such gcc2 behaviour. */
977 if ((op
& 0xfc000001) == 0x48000001)
978 { /* bl foo, an initializer function? */
979 op
= read_memory_integer (pc
+ 4, 4);
981 if (op
== 0x4def7b82)
982 { /* cror 0xf, 0xf, 0xf (nop) */
984 /* Check and see if we are in main. If so, skip over this
985 initializer function as well. */
987 tmp
= find_pc_misc_function (pc
);
988 if (tmp
>= 0 && STREQ (misc_function_vector
[tmp
].name
, main_name ()))
994 fdata
->offset
= -fdata
->offset
;
995 return last_prologue_pc
;
999 /*************************************************************************
1000 Support for creating pushing a dummy frame into the stack, and popping
1002 *************************************************************************/
1005 /* Pop the innermost frame, go back to the caller. */
1008 rs6000_pop_frame (void)
1010 CORE_ADDR pc
, lr
, sp
, prev_sp
, addr
; /* %pc, %lr, %sp */
1011 struct rs6000_framedata fdata
;
1012 struct frame_info
*frame
= get_current_frame ();
1016 sp
= get_frame_base (frame
);
1018 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
1019 get_frame_base (frame
),
1020 get_frame_base (frame
)))
1022 generic_pop_dummy_frame ();
1023 flush_cached_frames ();
1027 /* Make sure that all registers are valid. */
1028 deprecated_read_register_bytes (0, NULL
, DEPRECATED_REGISTER_BYTES
);
1030 /* Figure out previous %pc value. If the function is frameless, it is
1031 still in the link register, otherwise walk the frames and retrieve the
1032 saved %pc value in the previous frame. */
1034 addr
= get_frame_func (frame
);
1035 (void) skip_prologue (addr
, get_frame_pc (frame
), &fdata
);
1037 wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1038 if (fdata
.frameless
)
1041 prev_sp
= read_memory_addr (sp
, wordsize
);
1042 if (fdata
.lr_offset
== 0)
1043 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1045 lr
= read_memory_addr (prev_sp
+ fdata
.lr_offset
, wordsize
);
1047 /* reset %pc value. */
1048 write_register (PC_REGNUM
, lr
);
1050 /* reset register values if any was saved earlier. */
1052 if (fdata
.saved_gpr
!= -1)
1054 addr
= prev_sp
+ fdata
.gpr_offset
;
1055 for (ii
= fdata
.saved_gpr
; ii
<= 31; ++ii
)
1057 read_memory (addr
, &deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
)],
1063 if (fdata
.saved_fpr
!= -1)
1065 addr
= prev_sp
+ fdata
.fpr_offset
;
1066 for (ii
= fdata
.saved_fpr
; ii
<= 31; ++ii
)
1068 read_memory (addr
, &deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ FP0_REGNUM
)], 8);
1073 write_register (SP_REGNUM
, prev_sp
);
1074 target_store_registers (-1);
1075 flush_cached_frames ();
1078 /* All the ABI's require 16 byte alignment. */
1080 rs6000_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1082 return (addr
& -16);
1085 /* Pass the arguments in either registers, or in the stack. In RS/6000,
1086 the first eight words of the argument list (that might be less than
1087 eight parameters if some parameters occupy more than one word) are
1088 passed in r3..r10 registers. float and double parameters are
1089 passed in fpr's, in addition to that. Rest of the parameters if any
1090 are passed in user stack. There might be cases in which half of the
1091 parameter is copied into registers, the other half is pushed into
1094 Stack must be aligned on 64-bit boundaries when synthesizing
1097 If the function is returning a structure, then the return address is passed
1098 in r3, then the first 7 words of the parameters can be passed in registers,
1099 starting from r4. */
1102 rs6000_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1103 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1104 int nargs
, struct value
**args
, CORE_ADDR sp
,
1105 int struct_return
, CORE_ADDR struct_addr
)
1107 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1110 int argno
; /* current argument number */
1111 int argbytes
; /* current argument byte */
1112 char tmp_buffer
[50];
1113 int f_argno
= 0; /* current floating point argno */
1114 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1116 struct value
*arg
= 0;
1121 /* The first eight words of ther arguments are passed in registers.
1122 Copy them appropriately. */
1125 /* If the function is returning a `struct', then the first word
1126 (which will be passed in r3) is used for struct return address.
1127 In that case we should advance one word and start from r4
1128 register to copy parameters. */
1131 regcache_raw_write_unsigned (regcache
, tdep
->ppc_gp0_regnum
+ 3,
1137 effectively indirect call... gcc does...
1139 return_val example( float, int);
1142 float in fp0, int in r3
1143 offset of stack on overflow 8/16
1144 for varargs, must go by type.
1146 float in r3&r4, int in r5
1147 offset of stack on overflow different
1149 return in r3 or f0. If no float, must study how gcc emulates floats;
1150 pay attention to arg promotion.
1151 User may have to cast\args to handle promotion correctly
1152 since gdb won't know if prototype supplied or not.
1155 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
1157 int reg_size
= DEPRECATED_REGISTER_RAW_SIZE (ii
+ 3);
1160 type
= check_typedef (VALUE_TYPE (arg
));
1161 len
= TYPE_LENGTH (type
);
1163 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1166 /* Floating point arguments are passed in fpr's, as well as gpr's.
1167 There are 13 fpr's reserved for passing parameters. At this point
1168 there is no way we would run out of them. */
1172 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1174 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1175 VALUE_CONTENTS (arg
),
1183 /* Argument takes more than one register. */
1184 while (argbytes
< len
)
1186 memset (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)], 0,
1188 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)],
1189 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1190 (len
- argbytes
) > reg_size
1191 ? reg_size
: len
- argbytes
);
1192 ++ii
, argbytes
+= reg_size
;
1195 goto ran_out_of_registers_for_arguments
;
1202 /* Argument can fit in one register. No problem. */
1203 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1204 memset (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1205 memcpy ((char *)&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)] + adj
,
1206 VALUE_CONTENTS (arg
), len
);
1211 ran_out_of_registers_for_arguments
:
1213 saved_sp
= read_sp ();
1215 /* Location for 8 parameters are always reserved. */
1218 /* Another six words for back chain, TOC register, link register, etc. */
1221 /* Stack pointer must be quadword aligned. */
1224 /* If there are more arguments, allocate space for them in
1225 the stack, then push them starting from the ninth one. */
1227 if ((argno
< nargs
) || argbytes
)
1233 space
+= ((len
- argbytes
+ 3) & -4);
1239 for (; jj
< nargs
; ++jj
)
1241 struct value
*val
= args
[jj
];
1242 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1245 /* Add location required for the rest of the parameters. */
1246 space
= (space
+ 15) & -16;
1249 /* If the last argument copied into the registers didn't fit there
1250 completely, push the rest of it into stack. */
1254 write_memory (sp
+ 24 + (ii
* 4),
1255 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1258 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1261 /* Push the rest of the arguments into stack. */
1262 for (; argno
< nargs
; ++argno
)
1266 type
= check_typedef (VALUE_TYPE (arg
));
1267 len
= TYPE_LENGTH (type
);
1270 /* Float types should be passed in fpr's, as well as in the
1272 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1277 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1279 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1280 VALUE_CONTENTS (arg
),
1285 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1286 ii
+= ((len
+ 3) & -4) / 4;
1290 /* set back chain properly */
1291 store_unsigned_integer (tmp_buffer
, 4, saved_sp
);
1292 write_memory (sp
, tmp_buffer
, 4);
1294 /* Set the stack pointer. According to the ABI, the SP is meant to
1295 be set _before_ the corresponding stack space is used. No need
1296 for that here though - the target has been completely stopped -
1297 it isn't possible for an exception handler to stomp on the stack. */
1298 regcache_raw_write_signed (regcache
, SP_REGNUM
, sp
);
1300 /* Point the inferior function call's return address at the dummy's
1302 regcache_raw_write_signed (regcache
, tdep
->ppc_lr_regnum
, bp_addr
);
1304 /* Set the TOC register, get the value from the objfile reader
1305 which, in turn, gets it from the VMAP table. */
1306 if (rs6000_find_toc_address_hook
!= NULL
)
1308 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (func_addr
);
1309 regcache_raw_write_signed (regcache
, tdep
->ppc_toc_regnum
, tocvalue
);
1312 target_store_registers (-1);
1316 /* PowerOpen always puts structures in memory. Vectors, which were
1317 added later, do get returned in a register though. */
1320 rs6000_use_struct_convention (int gcc_p
, struct type
*value_type
)
1322 if ((TYPE_LENGTH (value_type
) == 16 || TYPE_LENGTH (value_type
) == 8)
1323 && TYPE_VECTOR (value_type
))
1329 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1332 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1334 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1339 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1340 We need to truncate the return value into float size (4 byte) if
1343 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1345 ®buf
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1)],
1346 TYPE_LENGTH (valtype
));
1349 memcpy (&dd
, ®buf
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1351 memcpy (valbuf
, &ff
, sizeof (float));
1354 else if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1355 && TYPE_LENGTH (valtype
) == 16
1356 && TYPE_VECTOR (valtype
))
1358 memcpy (valbuf
, regbuf
+ DEPRECATED_REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1359 TYPE_LENGTH (valtype
));
1363 /* return value is copied starting from r3. */
1364 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1365 && TYPE_LENGTH (valtype
) < DEPRECATED_REGISTER_RAW_SIZE (3))
1366 offset
= DEPRECATED_REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1369 regbuf
+ DEPRECATED_REGISTER_BYTE (3) + offset
,
1370 TYPE_LENGTH (valtype
));
1374 /* Return whether handle_inferior_event() should proceed through code
1375 starting at PC in function NAME when stepping.
1377 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1378 handle memory references that are too distant to fit in instructions
1379 generated by the compiler. For example, if 'foo' in the following
1384 is greater than 32767, the linker might replace the lwz with a branch to
1385 somewhere in @FIX1 that does the load in 2 instructions and then branches
1386 back to where execution should continue.
1388 GDB should silently step over @FIX code, just like AIX dbx does.
1389 Unfortunately, the linker uses the "b" instruction for the branches,
1390 meaning that the link register doesn't get set. Therefore, GDB's usual
1391 step_over_function() mechanism won't work.
1393 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1394 in handle_inferior_event() to skip past @FIX code. */
1397 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1399 return name
&& !strncmp (name
, "@FIX", 4);
1402 /* Skip code that the user doesn't want to see when stepping:
1404 1. Indirect function calls use a piece of trampoline code to do context
1405 switching, i.e. to set the new TOC table. Skip such code if we are on
1406 its first instruction (as when we have single-stepped to here).
1408 2. Skip shared library trampoline code (which is different from
1409 indirect function call trampolines).
1411 3. Skip bigtoc fixup code.
1413 Result is desired PC to step until, or NULL if we are not in
1414 code that should be skipped. */
1417 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1419 unsigned int ii
, op
;
1421 CORE_ADDR solib_target_pc
;
1422 struct minimal_symbol
*msymbol
;
1424 static unsigned trampoline_code
[] =
1426 0x800b0000, /* l r0,0x0(r11) */
1427 0x90410014, /* st r2,0x14(r1) */
1428 0x7c0903a6, /* mtctr r0 */
1429 0x804b0004, /* l r2,0x4(r11) */
1430 0x816b0008, /* l r11,0x8(r11) */
1431 0x4e800420, /* bctr */
1432 0x4e800020, /* br */
1436 /* Check for bigtoc fixup code. */
1437 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1438 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, DEPRECATED_SYMBOL_NAME (msymbol
)))
1440 /* Double-check that the third instruction from PC is relative "b". */
1441 op
= read_memory_integer (pc
+ 8, 4);
1442 if ((op
& 0xfc000003) == 0x48000000)
1444 /* Extract bits 6-29 as a signed 24-bit relative word address and
1445 add it to the containing PC. */
1446 rel
= ((int)(op
<< 6) >> 6);
1447 return pc
+ 8 + rel
;
1451 /* If pc is in a shared library trampoline, return its target. */
1452 solib_target_pc
= find_solib_trampoline_target (pc
);
1453 if (solib_target_pc
)
1454 return solib_target_pc
;
1456 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1458 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1459 if (op
!= trampoline_code
[ii
])
1462 ii
= read_register (11); /* r11 holds destination addr */
1463 pc
= read_memory_addr (ii
, gdbarch_tdep (current_gdbarch
)->wordsize
); /* (r11) value */
1467 /* Determines whether the function FI has a frame on the stack or not. */
1470 rs6000_frameless_function_invocation (struct frame_info
*fi
)
1472 CORE_ADDR func_start
;
1473 struct rs6000_framedata fdata
;
1475 /* Don't even think about framelessness except on the innermost frame
1476 or if the function was interrupted by a signal. */
1477 if (get_next_frame (fi
) != NULL
1478 && !(get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1481 func_start
= get_frame_func (fi
);
1483 /* If we failed to find the start of the function, it is a mistake
1484 to inspect the instructions. */
1488 /* A frame with a zero PC is usually created by dereferencing a NULL
1489 function pointer, normally causing an immediate core dump of the
1490 inferior. Mark function as frameless, as the inferior has no chance
1491 of setting up a stack frame. */
1492 if (get_frame_pc (fi
) == 0)
1498 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1499 return fdata
.frameless
;
1502 /* Return the PC saved in a frame. */
1505 rs6000_frame_saved_pc (struct frame_info
*fi
)
1507 CORE_ADDR func_start
;
1508 struct rs6000_framedata fdata
;
1509 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1510 int wordsize
= tdep
->wordsize
;
1512 if ((get_frame_type (fi
) == SIGTRAMP_FRAME
))
1513 return read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
1516 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1517 get_frame_base (fi
),
1518 get_frame_base (fi
)))
1519 return deprecated_read_register_dummy (get_frame_pc (fi
),
1520 get_frame_base (fi
), PC_REGNUM
);
1522 func_start
= get_frame_func (fi
);
1524 /* If we failed to find the start of the function, it is a mistake
1525 to inspect the instructions. */
1529 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1531 if (fdata
.lr_offset
== 0 && get_next_frame (fi
) != NULL
)
1533 if ((get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1534 return read_memory_addr ((get_frame_base (get_next_frame (fi
))
1535 + SIG_FRAME_LR_OFFSET
),
1537 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1538 /* The link register wasn't saved by this frame and the next
1539 (inner, newer) frame is a dummy. Get the link register
1540 value by unwinding it from that [dummy] frame. */
1543 frame_unwind_unsigned_register (get_next_frame (fi
),
1544 tdep
->ppc_lr_regnum
, &lr
);
1548 return read_memory_addr (DEPRECATED_FRAME_CHAIN (fi
)
1549 + tdep
->lr_frame_offset
,
1553 if (fdata
.lr_offset
== 0)
1554 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1556 return read_memory_addr (DEPRECATED_FRAME_CHAIN (fi
) + fdata
.lr_offset
,
1560 /* If saved registers of frame FI are not known yet, read and cache them.
1561 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1562 in which case the framedata are read. */
1565 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1567 CORE_ADDR frame_addr
;
1568 struct rs6000_framedata work_fdata
;
1569 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1570 int wordsize
= tdep
->wordsize
;
1572 if (deprecated_get_frame_saved_regs (fi
))
1577 fdatap
= &work_fdata
;
1578 (void) skip_prologue (get_frame_func (fi
), get_frame_pc (fi
), fdatap
);
1581 frame_saved_regs_zalloc (fi
);
1583 /* If there were any saved registers, figure out parent's stack
1585 /* The following is true only if the frame doesn't have a call to
1588 if (fdatap
->saved_fpr
== 0
1589 && fdatap
->saved_gpr
== 0
1590 && fdatap
->saved_vr
== 0
1591 && fdatap
->saved_ev
== 0
1592 && fdatap
->lr_offset
== 0
1593 && fdatap
->cr_offset
== 0
1594 && fdatap
->vr_offset
== 0
1595 && fdatap
->ev_offset
== 0)
1598 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1599 address of the current frame. Things might be easier if the
1600 ->frame pointed to the outer-most address of the frame. In the
1601 mean time, the address of the prev frame is used as the base
1602 address of this frame. */
1603 frame_addr
= DEPRECATED_FRAME_CHAIN (fi
);
1605 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1606 All fpr's from saved_fpr to fp31 are saved. */
1608 if (fdatap
->saved_fpr
>= 0)
1611 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1612 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1614 deprecated_get_frame_saved_regs (fi
)[FP0_REGNUM
+ i
] = fpr_addr
;
1619 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1620 All gpr's from saved_gpr to gpr31 are saved. */
1622 if (fdatap
->saved_gpr
>= 0)
1625 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1626 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1628 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = gpr_addr
;
1629 gpr_addr
+= wordsize
;
1633 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1634 All vr's from saved_vr to vr31 are saved. */
1635 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1637 if (fdatap
->saved_vr
>= 0)
1640 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1641 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1643 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1644 vr_addr
+= DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1649 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1650 All vr's from saved_ev to ev31 are saved. ????? */
1651 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
1653 if (fdatap
->saved_ev
>= 0)
1656 CORE_ADDR ev_addr
= frame_addr
+ fdatap
->ev_offset
;
1657 for (i
= fdatap
->saved_ev
; i
< 32; i
++)
1659 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_ev0_regnum
+ i
] = ev_addr
;
1660 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = ev_addr
+ 4;
1661 ev_addr
+= DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_ev0_regnum
);
1666 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1668 if (fdatap
->cr_offset
!= 0)
1669 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1671 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1673 if (fdatap
->lr_offset
!= 0)
1674 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1676 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1678 if (fdatap
->vrsave_offset
!= 0)
1679 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1682 /* Return the address of a frame. This is the inital %sp value when the frame
1683 was first allocated. For functions calling alloca(), it might be saved in
1684 an alloca register. */
1687 frame_initial_stack_address (struct frame_info
*fi
)
1690 struct rs6000_framedata fdata
;
1691 struct frame_info
*callee_fi
;
1693 /* If the initial stack pointer (frame address) of this frame is known,
1696 if (get_frame_extra_info (fi
)->initial_sp
)
1697 return get_frame_extra_info (fi
)->initial_sp
;
1699 /* Find out if this function is using an alloca register. */
1701 (void) skip_prologue (get_frame_func (fi
), get_frame_pc (fi
), &fdata
);
1703 /* If saved registers of this frame are not known yet, read and
1706 if (!deprecated_get_frame_saved_regs (fi
))
1707 frame_get_saved_regs (fi
, &fdata
);
1709 /* If no alloca register used, then fi->frame is the value of the %sp for
1710 this frame, and it is good enough. */
1712 if (fdata
.alloca_reg
< 0)
1714 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1715 return get_frame_extra_info (fi
)->initial_sp
;
1718 /* There is an alloca register, use its value, in the current frame,
1719 as the initial stack pointer. */
1721 char tmpbuf
[MAX_REGISTER_SIZE
];
1722 if (frame_register_read (fi
, fdata
.alloca_reg
, tmpbuf
))
1724 get_frame_extra_info (fi
)->initial_sp
1725 = extract_unsigned_integer (tmpbuf
,
1726 DEPRECATED_REGISTER_RAW_SIZE (fdata
.alloca_reg
));
1729 /* NOTE: cagney/2002-04-17: At present the only time
1730 frame_register_read will fail is when the register isn't
1731 available. If that does happen, use the frame. */
1732 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1734 return get_frame_extra_info (fi
)->initial_sp
;
1737 /* Describe the pointer in each stack frame to the previous stack frame
1740 /* DEPRECATED_FRAME_CHAIN takes a frame's nominal address and produces
1741 the frame's chain-pointer. */
1743 /* In the case of the RS/6000, the frame's nominal address
1744 is the address of a 4-byte word containing the calling frame's address. */
1747 rs6000_frame_chain (struct frame_info
*thisframe
)
1749 CORE_ADDR fp
, fpp
, lr
;
1750 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1752 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (thisframe
),
1753 get_frame_base (thisframe
),
1754 get_frame_base (thisframe
)))
1755 /* A dummy frame always correctly chains back to the previous
1757 return read_memory_addr (get_frame_base (thisframe
), wordsize
);
1759 if (deprecated_inside_entry_file (get_frame_pc (thisframe
))
1760 || get_frame_pc (thisframe
) == entry_point_address ())
1763 if ((get_frame_type (thisframe
) == SIGTRAMP_FRAME
))
1764 fp
= read_memory_addr (get_frame_base (thisframe
) + SIG_FRAME_FP_OFFSET
,
1766 else if (get_next_frame (thisframe
) != NULL
1767 && (get_frame_type (get_next_frame (thisframe
)) == SIGTRAMP_FRAME
)
1768 && FRAMELESS_FUNCTION_INVOCATION (thisframe
))
1769 /* A frameless function interrupted by a signal did not change the
1771 fp
= get_frame_base (thisframe
);
1773 fp
= read_memory_addr (get_frame_base (thisframe
), wordsize
);
1777 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1778 isn't available with that word size, return 0. */
1781 regsize (const struct reg
*reg
, int wordsize
)
1783 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1786 /* Return the name of register number N, or null if no such register exists
1787 in the current architecture. */
1790 rs6000_register_name (int n
)
1792 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1793 const struct reg
*reg
= tdep
->regs
+ n
;
1795 if (!regsize (reg
, tdep
->wordsize
))
1800 /* Index within `registers' of the first byte of the space for
1804 rs6000_register_byte (int n
)
1806 return gdbarch_tdep (current_gdbarch
)->regoff
[n
];
1809 /* Return the number of bytes of storage in the actual machine representation
1810 for register N if that register is available, else return 0. */
1813 rs6000_register_raw_size (int n
)
1815 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1816 const struct reg
*reg
= tdep
->regs
+ n
;
1817 return regsize (reg
, tdep
->wordsize
);
1820 /* Return the GDB type object for the "standard" data type
1821 of data in register N. */
1823 static struct type
*
1824 rs6000_register_virtual_type (int n
)
1826 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1827 const struct reg
*reg
= tdep
->regs
+ n
;
1830 return builtin_type_double
;
1833 int size
= regsize (reg
, tdep
->wordsize
);
1837 return builtin_type_int0
;
1839 return builtin_type_int32
;
1841 if (tdep
->ppc_ev0_regnum
<= n
&& n
<= tdep
->ppc_ev31_regnum
)
1842 return builtin_type_vec64
;
1844 return builtin_type_int64
;
1847 return builtin_type_vec128
;
1850 internal_error (__FILE__
, __LINE__
, "Register %d size %d unknown",
1856 /* Return whether register N requires conversion when moving from raw format
1859 The register format for RS/6000 floating point registers is always
1860 double, we need a conversion if the memory format is float. */
1863 rs6000_register_convertible (int n
)
1865 const struct reg
*reg
= gdbarch_tdep (current_gdbarch
)->regs
+ n
;
1869 /* Convert data from raw format for register N in buffer FROM
1870 to virtual format with type TYPE in buffer TO. */
1873 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1874 char *from
, char *to
)
1876 if (TYPE_LENGTH (type
) != DEPRECATED_REGISTER_RAW_SIZE (n
))
1878 double val
= deprecated_extract_floating (from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1879 deprecated_store_floating (to
, TYPE_LENGTH (type
), val
);
1882 memcpy (to
, from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1885 /* Convert data from virtual format with type TYPE in buffer FROM
1886 to raw format for register N in buffer TO. */
1889 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1890 const char *from
, char *to
)
1892 if (TYPE_LENGTH (type
) != DEPRECATED_REGISTER_RAW_SIZE (n
))
1894 double val
= deprecated_extract_floating (from
, TYPE_LENGTH (type
));
1895 deprecated_store_floating (to
, DEPRECATED_REGISTER_RAW_SIZE (n
), val
);
1898 memcpy (to
, from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1902 e500_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1903 int reg_nr
, void *buffer
)
1907 char temp_buffer
[MAX_REGISTER_SIZE
];
1908 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1910 if (reg_nr
>= tdep
->ppc_gp0_regnum
1911 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1913 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1915 /* Build the value in the provided buffer. */
1916 /* Read the raw register of which this one is the lower portion. */
1917 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1918 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1920 memcpy ((char *) buffer
, temp_buffer
+ offset
, 4);
1925 e500_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1926 int reg_nr
, const void *buffer
)
1930 char temp_buffer
[MAX_REGISTER_SIZE
];
1931 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1933 if (reg_nr
>= tdep
->ppc_gp0_regnum
1934 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1936 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1937 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1938 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1941 /* Let's read the value of the base register into a temporary
1942 buffer, so that overwriting the last four bytes with the new
1943 value of the pseudo will leave the upper 4 bytes unchanged. */
1944 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1946 /* Write as an 8 byte quantity. */
1947 memcpy (temp_buffer
+ offset
, (char *) buffer
, 4);
1948 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
1952 /* Convert a dwarf2 register number to a gdb REGNUM. */
1954 e500_dwarf2_reg_to_regnum (int num
)
1957 if (0 <= num
&& num
<= 31)
1958 return num
+ gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
;
1963 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1966 rs6000_stab_reg_to_regnum (int num
)
1972 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
1975 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
1978 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
1981 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
1991 rs6000_store_return_value (struct type
*type
, char *valbuf
)
1993 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1995 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1997 /* Floating point values are returned starting from FPR1 and up.
1998 Say a double_double_double type could be returned in
1999 FPR1/FPR2/FPR3 triple. */
2001 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
2002 TYPE_LENGTH (type
));
2003 else if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
2005 if (TYPE_LENGTH (type
) == 16
2006 && TYPE_VECTOR (type
))
2007 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
2008 valbuf
, TYPE_LENGTH (type
));
2011 /* Everything else is returned in GPR3 and up. */
2012 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
2013 valbuf
, TYPE_LENGTH (type
));
2016 /* Extract from an array REGBUF containing the (raw) register state
2017 the address in which a function should return its structure value,
2018 as a CORE_ADDR (or an expression that can be used as one). */
2021 rs6000_extract_struct_value_address (struct regcache
*regcache
)
2023 /* FIXME: cagney/2002-09-26: PR gdb/724: When making an inferior
2024 function call GDB knows the address of the struct return value
2025 and hence, should not need to call this function. Unfortunately,
2026 the current call_function_by_hand() code only saves the most
2027 recent struct address leading to occasional calls. The code
2028 should instead maintain a stack of such addresses (in the dummy
2030 /* NOTE: cagney/2002-09-26: Return 0 which indicates that we've
2031 really got no idea where the return value is being stored. While
2032 r3, on function entry, contained the address it will have since
2033 been reused (scratch) and hence wouldn't be valid */
2037 /* Return whether PC is in a dummy function call.
2039 FIXME: This just checks for the end of the stack, which is broken
2040 for things like stepping through gcc nested function stubs. */
2043 rs6000_pc_in_call_dummy (CORE_ADDR pc
, CORE_ADDR sp
, CORE_ADDR fp
)
2045 return sp
< pc
&& pc
< fp
;
2048 /* Hook called when a new child process is started. */
2051 rs6000_create_inferior (int pid
)
2053 if (rs6000_set_host_arch_hook
)
2054 rs6000_set_host_arch_hook (pid
);
2057 /* Support for CONVERT_FROM_FUNC_PTR_ADDR (ARCH, ADDR, TARG).
2059 Usually a function pointer's representation is simply the address
2060 of the function. On the RS/6000 however, a function pointer is
2061 represented by a pointer to a TOC entry. This TOC entry contains
2062 three words, the first word is the address of the function, the
2063 second word is the TOC pointer (r2), and the third word is the
2064 static chain value. Throughout GDB it is currently assumed that a
2065 function pointer contains the address of the function, which is not
2066 easy to fix. In addition, the conversion of a function address to
2067 a function pointer would require allocation of a TOC entry in the
2068 inferior's memory space, with all its drawbacks. To be able to
2069 call C++ virtual methods in the inferior (which are called via
2070 function pointers), find_function_addr uses this function to get the
2071 function address from a function pointer. */
2073 /* Return real function address if ADDR (a function pointer) is in the data
2074 space and is therefore a special function pointer. */
2077 rs6000_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
,
2079 struct target_ops
*targ
)
2081 struct obj_section
*s
;
2083 s
= find_pc_section (addr
);
2084 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
2087 /* ADDR is in the data space, so it's a special function pointer. */
2088 return read_memory_addr (addr
, gdbarch_tdep (current_gdbarch
)->wordsize
);
2092 /* Handling the various POWER/PowerPC variants. */
2095 /* The arrays here called registers_MUMBLE hold information about available
2098 For each family of PPC variants, I've tried to isolate out the
2099 common registers and put them up front, so that as long as you get
2100 the general family right, GDB will correctly identify the registers
2101 common to that family. The common register sets are:
2103 For the 60x family: hid0 hid1 iabr dabr pir
2105 For the 505 and 860 family: eie eid nri
2107 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
2108 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
2111 Most of these register groups aren't anything formal. I arrived at
2112 them by looking at the registers that occurred in more than one
2115 Note: kevinb/2002-04-30: Support for the fpscr register was added
2116 during April, 2002. Slot 70 is being used for PowerPC and slot 71
2117 for Power. For PowerPC, slot 70 was unused and was already in the
2118 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
2119 slot 70 was being used for "mq", so the next available slot (71)
2120 was chosen. It would have been nice to be able to make the
2121 register numbers the same across processor cores, but this wasn't
2122 possible without either 1) renumbering some registers for some
2123 processors or 2) assigning fpscr to a really high slot that's
2124 larger than any current register number. Doing (1) is bad because
2125 existing stubs would break. Doing (2) is undesirable because it
2126 would introduce a really large gap between fpscr and the rest of
2127 the registers for most processors. */
2129 /* Convenience macros for populating register arrays. */
2131 /* Within another macro, convert S to a string. */
2135 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
2136 and 64 bits on 64-bit systems. */
2137 #define R(name) { STR(name), 4, 8, 0, 0 }
2139 /* Return a struct reg defining register NAME that's 32 bits on all
2141 #define R4(name) { STR(name), 4, 4, 0, 0 }
2143 /* Return a struct reg defining register NAME that's 64 bits on all
2145 #define R8(name) { STR(name), 8, 8, 0, 0 }
2147 /* Return a struct reg defining register NAME that's 128 bits on all
2149 #define R16(name) { STR(name), 16, 16, 0, 0 }
2151 /* Return a struct reg defining floating-point register NAME. */
2152 #define F(name) { STR(name), 8, 8, 1, 0 }
2154 /* Return a struct reg defining a pseudo register NAME. */
2155 #define P(name) { STR(name), 4, 8, 0, 1}
2157 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
2158 systems and that doesn't exist on 64-bit systems. */
2159 #define R32(name) { STR(name), 4, 0, 0, 0 }
2161 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
2162 systems and that doesn't exist on 32-bit systems. */
2163 #define R64(name) { STR(name), 0, 8, 0, 0 }
2165 /* Return a struct reg placeholder for a register that doesn't exist. */
2166 #define R0 { 0, 0, 0, 0, 0 }
2168 /* UISA registers common across all architectures, including POWER. */
2170 #define COMMON_UISA_REGS \
2171 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2172 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2173 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2174 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2175 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
2176 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
2177 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
2178 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
2179 /* 64 */ R(pc), R(ps)
2181 #define COMMON_UISA_NOFP_REGS \
2182 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2183 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2184 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2185 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2186 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2187 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2188 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2189 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2190 /* 64 */ R(pc), R(ps)
2192 /* UISA-level SPRs for PowerPC. */
2193 #define PPC_UISA_SPRS \
2194 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
2196 /* UISA-level SPRs for PowerPC without floating point support. */
2197 #define PPC_UISA_NOFP_SPRS \
2198 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
2200 /* Segment registers, for PowerPC. */
2201 #define PPC_SEGMENT_REGS \
2202 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2203 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2204 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2205 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2207 /* OEA SPRs for PowerPC. */
2208 #define PPC_OEA_SPRS \
2210 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2211 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2212 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2213 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2214 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2215 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2216 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2217 /* 116 */ R4(dec), R(dabr), R4(ear)
2219 /* AltiVec registers. */
2220 #define PPC_ALTIVEC_REGS \
2221 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2222 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2223 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2224 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2225 /*151*/R4(vscr), R4(vrsave)
2227 /* Vectors of hi-lo general purpose registers. */
2228 #define PPC_EV_REGS \
2229 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
2230 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
2231 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
2232 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2234 /* Lower half of the EV registers. */
2235 #define PPC_GPRS_PSEUDO_REGS \
2236 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2237 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2238 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2239 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31)
2241 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2242 user-level SPR's. */
2243 static const struct reg registers_power
[] =
2246 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
2250 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2251 view of the PowerPC. */
2252 static const struct reg registers_powerpc
[] =
2259 /* PowerPC UISA - a PPC processor as viewed by user-level
2260 code, but without floating point registers. */
2261 static const struct reg registers_powerpc_nofp
[] =
2263 COMMON_UISA_NOFP_REGS
,
2267 /* IBM PowerPC 403. */
2268 static const struct reg registers_403
[] =
2274 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2275 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2276 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2277 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2278 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2279 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
2282 /* IBM PowerPC 403GC. */
2283 static const struct reg registers_403GC
[] =
2289 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2290 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2291 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2292 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2293 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2294 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2295 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2296 /* 147 */ R(tbhu
), R(tblu
)
2299 /* Motorola PowerPC 505. */
2300 static const struct reg registers_505
[] =
2306 /* 119 */ R(eie
), R(eid
), R(nri
)
2309 /* Motorola PowerPC 860 or 850. */
2310 static const struct reg registers_860
[] =
2316 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2317 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2318 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2319 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2320 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2321 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2322 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2323 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2324 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2325 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2326 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2327 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2330 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2331 for reading and writing RTCU and RTCL. However, how one reads and writes a
2332 register is the stub's problem. */
2333 static const struct reg registers_601
[] =
2339 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2340 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2343 /* Motorola PowerPC 602. */
2344 static const struct reg registers_602
[] =
2350 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2351 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2352 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2355 /* Motorola/IBM PowerPC 603 or 603e. */
2356 static const struct reg registers_603
[] =
2362 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2363 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2364 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2367 /* Motorola PowerPC 604 or 604e. */
2368 static const struct reg registers_604
[] =
2374 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2375 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2376 /* 127 */ R(sia
), R(sda
)
2379 /* Motorola/IBM PowerPC 750 or 740. */
2380 static const struct reg registers_750
[] =
2386 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2387 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2388 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2389 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2390 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2391 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2395 /* Motorola PowerPC 7400. */
2396 static const struct reg registers_7400
[] =
2398 /* gpr0-gpr31, fpr0-fpr31 */
2400 /* ctr, xre, lr, cr */
2405 /* vr0-vr31, vrsave, vscr */
2407 /* FIXME? Add more registers? */
2410 /* Motorola e500. */
2411 static const struct reg registers_e500
[] =
2414 /* cr, lr, ctr, xer, "" */
2418 R8(acc
), R(spefscr
),
2419 /* NOTE: Add new registers here the end of the raw register
2420 list and just before the first pseudo register. */
2422 PPC_GPRS_PSEUDO_REGS
2425 /* Information about a particular processor variant. */
2429 /* Name of this variant. */
2432 /* English description of the variant. */
2435 /* bfd_arch_info.arch corresponding to variant. */
2436 enum bfd_architecture arch
;
2438 /* bfd_arch_info.mach corresponding to variant. */
2441 /* Number of real registers. */
2444 /* Number of pseudo registers. */
2447 /* Number of total registers (the sum of nregs and npregs). */
2450 /* Table of register names; registers[R] is the name of the register
2452 const struct reg
*regs
;
2455 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2458 num_registers (const struct reg
*reg_list
, int num_tot_regs
)
2463 for (i
= 0; i
< num_tot_regs
; i
++)
2464 if (!reg_list
[i
].pseudo
)
2471 num_pseudo_registers (const struct reg
*reg_list
, int num_tot_regs
)
2476 for (i
= 0; i
< num_tot_regs
; i
++)
2477 if (reg_list
[i
].pseudo
)
2483 /* Information in this table comes from the following web sites:
2484 IBM: http://www.chips.ibm.com:80/products/embedded/
2485 Motorola: http://www.mot.com/SPS/PowerPC/
2487 I'm sure I've got some of the variant descriptions not quite right.
2488 Please report any inaccuracies you find to GDB's maintainer.
2490 If you add entries to this table, please be sure to allow the new
2491 value as an argument to the --with-cpu flag, in configure.in. */
2493 static struct variant variants
[] =
2496 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2497 bfd_mach_ppc
, -1, -1, tot_num_registers (registers_powerpc
),
2499 {"power", "POWER user-level", bfd_arch_rs6000
,
2500 bfd_mach_rs6k
, -1, -1, tot_num_registers (registers_power
),
2502 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2503 bfd_mach_ppc_403
, -1, -1, tot_num_registers (registers_403
),
2505 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2506 bfd_mach_ppc_601
, -1, -1, tot_num_registers (registers_601
),
2508 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2509 bfd_mach_ppc_602
, -1, -1, tot_num_registers (registers_602
),
2511 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2512 bfd_mach_ppc_603
, -1, -1, tot_num_registers (registers_603
),
2514 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2515 604, -1, -1, tot_num_registers (registers_604
),
2517 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2518 bfd_mach_ppc_403gc
, -1, -1, tot_num_registers (registers_403GC
),
2520 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2521 bfd_mach_ppc_505
, -1, -1, tot_num_registers (registers_505
),
2523 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2524 bfd_mach_ppc_860
, -1, -1, tot_num_registers (registers_860
),
2526 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2527 bfd_mach_ppc_750
, -1, -1, tot_num_registers (registers_750
),
2529 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2530 bfd_mach_ppc_7400
, -1, -1, tot_num_registers (registers_7400
),
2532 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc
,
2533 bfd_mach_ppc_e500
, -1, -1, tot_num_registers (registers_e500
),
2537 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2538 bfd_mach_ppc64
, -1, -1, tot_num_registers (registers_powerpc
),
2540 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2541 bfd_mach_ppc_620
, -1, -1, tot_num_registers (registers_powerpc
),
2543 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2544 bfd_mach_ppc_630
, -1, -1, tot_num_registers (registers_powerpc
),
2546 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2547 bfd_mach_ppc_a35
, -1, -1, tot_num_registers (registers_powerpc
),
2549 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2550 bfd_mach_ppc_rs64ii
, -1, -1, tot_num_registers (registers_powerpc
),
2552 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2553 bfd_mach_ppc_rs64iii
, -1, -1, tot_num_registers (registers_powerpc
),
2556 /* FIXME: I haven't checked the register sets of the following. */
2557 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2558 bfd_mach_rs6k_rs1
, -1, -1, tot_num_registers (registers_power
),
2560 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2561 bfd_mach_rs6k_rsc
, -1, -1, tot_num_registers (registers_power
),
2563 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2564 bfd_mach_rs6k_rs2
, -1, -1, tot_num_registers (registers_power
),
2567 {0, 0, 0, 0, 0, 0, 0, 0}
2570 /* Initialize the number of registers and pseudo registers in each variant. */
2573 init_variants (void)
2577 for (v
= variants
; v
->name
; v
++)
2580 v
->nregs
= num_registers (v
->regs
, v
->num_tot_regs
);
2581 if (v
->npregs
== -1)
2582 v
->npregs
= num_pseudo_registers (v
->regs
, v
->num_tot_regs
);
2586 /* Return the variant corresponding to architecture ARCH and machine number
2587 MACH. If no such variant exists, return null. */
2589 static const struct variant
*
2590 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2592 const struct variant
*v
;
2594 for (v
= variants
; v
->name
; v
++)
2595 if (arch
== v
->arch
&& mach
== v
->mach
)
2602 gdb_print_insn_powerpc (bfd_vma memaddr
, disassemble_info
*info
)
2604 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2605 return print_insn_big_powerpc (memaddr
, info
);
2607 return print_insn_little_powerpc (memaddr
, info
);
2610 /* Initialize the current architecture based on INFO. If possible, re-use an
2611 architecture from ARCHES, which is a list of architectures already created
2612 during this debugging session.
2614 Called e.g. at program startup, when reading a core file, and when reading
2617 static struct gdbarch
*
2618 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2620 struct gdbarch
*gdbarch
;
2621 struct gdbarch_tdep
*tdep
;
2622 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2624 const struct variant
*v
;
2625 enum bfd_architecture arch
;
2631 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2632 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2634 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2635 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2637 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2639 /* Check word size. If INFO is from a binary file, infer it from
2640 that, else choose a likely default. */
2641 if (from_xcoff_exec
)
2643 if (bfd_xcoff_is_xcoff64 (info
.abfd
))
2648 else if (from_elf_exec
)
2650 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2657 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2658 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2659 info
.bfd_arch_info
->bits_per_byte
;
2664 /* Find a candidate among extant architectures. */
2665 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2667 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2669 /* Word size in the various PowerPC bfd_arch_info structs isn't
2670 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2671 separate word size check. */
2672 tdep
= gdbarch_tdep (arches
->gdbarch
);
2673 if (tdep
&& tdep
->wordsize
== wordsize
)
2674 return arches
->gdbarch
;
2677 /* None found, create a new architecture from INFO, whose bfd_arch_info
2678 validity depends on the source:
2679 - executable useless
2680 - rs6000_host_arch() good
2682 - "set arch" trust blindly
2683 - GDB startup useless but harmless */
2685 if (!from_xcoff_exec
)
2687 arch
= info
.bfd_arch_info
->arch
;
2688 mach
= info
.bfd_arch_info
->mach
;
2692 arch
= bfd_arch_powerpc
;
2693 bfd_default_set_arch_mach (&abfd
, arch
, 0);
2694 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2695 mach
= info
.bfd_arch_info
->mach
;
2697 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2698 tdep
->wordsize
= wordsize
;
2700 /* For e500 executables, the apuinfo section is of help here. Such
2701 section contains the identifier and revision number of each
2702 Application-specific Processing Unit that is present on the
2703 chip. The content of the section is determined by the assembler
2704 which looks at each instruction and determines which unit (and
2705 which version of it) can execute it. In our case we just look for
2706 the existance of the section. */
2710 sect
= bfd_get_section_by_name (info
.abfd
, ".PPC.EMB.apuinfo");
2713 arch
= info
.bfd_arch_info
->arch
;
2714 mach
= bfd_mach_ppc_e500
;
2715 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2716 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2720 gdbarch
= gdbarch_alloc (&info
, tdep
);
2721 power
= arch
== bfd_arch_rs6000
;
2723 /* Initialize the number of real and pseudo registers in each variant. */
2726 /* Choose variant. */
2727 v
= find_variant_by_arch (arch
, mach
);
2731 tdep
->regs
= v
->regs
;
2733 tdep
->ppc_gp0_regnum
= 0;
2734 tdep
->ppc_gplast_regnum
= 31;
2735 tdep
->ppc_toc_regnum
= 2;
2736 tdep
->ppc_ps_regnum
= 65;
2737 tdep
->ppc_cr_regnum
= 66;
2738 tdep
->ppc_lr_regnum
= 67;
2739 tdep
->ppc_ctr_regnum
= 68;
2740 tdep
->ppc_xer_regnum
= 69;
2741 if (v
->mach
== bfd_mach_ppc_601
)
2742 tdep
->ppc_mq_regnum
= 124;
2744 tdep
->ppc_mq_regnum
= 70;
2746 tdep
->ppc_mq_regnum
= -1;
2747 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2749 set_gdbarch_pc_regnum (gdbarch
, 64);
2750 set_gdbarch_sp_regnum (gdbarch
, 1);
2751 set_gdbarch_deprecated_fp_regnum (gdbarch
, 1);
2752 if (sysv_abi
&& wordsize
== 8)
2754 set_gdbarch_extract_return_value (gdbarch
, ppc64_sysv_abi_extract_return_value
);
2755 set_gdbarch_store_return_value (gdbarch
, ppc64_sysv_abi_store_return_value
);
2757 else if (sysv_abi
&& wordsize
== 4)
2759 set_gdbarch_extract_return_value (gdbarch
, ppc_sysv_abi_extract_return_value
);
2760 set_gdbarch_store_return_value (gdbarch
, ppc_sysv_abi_store_return_value
);
2764 set_gdbarch_deprecated_extract_return_value (gdbarch
, rs6000_extract_return_value
);
2765 set_gdbarch_deprecated_store_return_value (gdbarch
, rs6000_store_return_value
);
2768 if (v
->arch
== bfd_arch_powerpc
)
2772 tdep
->ppc_vr0_regnum
= 71;
2773 tdep
->ppc_vrsave_regnum
= 104;
2774 tdep
->ppc_ev0_regnum
= -1;
2775 tdep
->ppc_ev31_regnum
= -1;
2777 case bfd_mach_ppc_7400
:
2778 tdep
->ppc_vr0_regnum
= 119;
2779 tdep
->ppc_vrsave_regnum
= 152;
2780 tdep
->ppc_ev0_regnum
= -1;
2781 tdep
->ppc_ev31_regnum
= -1;
2783 case bfd_mach_ppc_e500
:
2784 tdep
->ppc_gp0_regnum
= 41;
2785 tdep
->ppc_gplast_regnum
= tdep
->ppc_gp0_regnum
+ 32 - 1;
2786 tdep
->ppc_toc_regnum
= -1;
2787 tdep
->ppc_ps_regnum
= 1;
2788 tdep
->ppc_cr_regnum
= 2;
2789 tdep
->ppc_lr_regnum
= 3;
2790 tdep
->ppc_ctr_regnum
= 4;
2791 tdep
->ppc_xer_regnum
= 5;
2792 tdep
->ppc_ev0_regnum
= 7;
2793 tdep
->ppc_ev31_regnum
= 38;
2794 set_gdbarch_pc_regnum (gdbarch
, 0);
2795 set_gdbarch_sp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2796 set_gdbarch_deprecated_fp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2797 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, e500_dwarf2_reg_to_regnum
);
2798 set_gdbarch_pseudo_register_read (gdbarch
, e500_pseudo_register_read
);
2799 set_gdbarch_pseudo_register_write (gdbarch
, e500_pseudo_register_write
);
2802 tdep
->ppc_vr0_regnum
= -1;
2803 tdep
->ppc_vrsave_regnum
= -1;
2804 tdep
->ppc_ev0_regnum
= -1;
2805 tdep
->ppc_ev31_regnum
= -1;
2809 /* Sanity check on registers. */
2810 gdb_assert (strcmp (tdep
->regs
[tdep
->ppc_gp0_regnum
].name
, "r0") == 0);
2812 /* Set lr_frame_offset. */
2814 tdep
->lr_frame_offset
= 16;
2816 tdep
->lr_frame_offset
= 4;
2818 tdep
->lr_frame_offset
= 8;
2820 /* Calculate byte offsets in raw register array. */
2821 tdep
->regoff
= xmalloc (v
->num_tot_regs
* sizeof (int));
2822 for (i
= off
= 0; i
< v
->num_tot_regs
; i
++)
2824 tdep
->regoff
[i
] = off
;
2825 off
+= regsize (v
->regs
+ i
, wordsize
);
2828 /* Select instruction printer. */
2830 set_gdbarch_print_insn (gdbarch
, print_insn_rs6000
);
2832 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_powerpc
);
2834 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2836 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2837 set_gdbarch_num_pseudo_regs (gdbarch
, v
->npregs
);
2838 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2839 set_gdbarch_deprecated_register_size (gdbarch
, wordsize
);
2840 set_gdbarch_deprecated_register_bytes (gdbarch
, off
);
2841 set_gdbarch_deprecated_register_byte (gdbarch
, rs6000_register_byte
);
2842 set_gdbarch_deprecated_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2843 set_gdbarch_deprecated_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2845 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2846 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2847 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2848 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2849 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2850 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2851 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2853 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
2855 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2856 set_gdbarch_char_signed (gdbarch
, 0);
2858 set_gdbarch_frame_align (gdbarch
, rs6000_frame_align
);
2859 if (sysv_abi
&& wordsize
== 8)
2861 set_gdbarch_frame_red_zone_size (gdbarch
, 288);
2862 else if (!sysv_abi
&& wordsize
== 4)
2863 /* PowerOpen / AIX 32 bit. The saved area or red zone consists of
2864 19 4 byte GPRS + 18 8 byte FPRs giving a total of 220 bytes.
2865 Problem is, 220 isn't frame (16 byte) aligned. Round it up to
2867 set_gdbarch_frame_red_zone_size (gdbarch
, 224);
2868 set_gdbarch_deprecated_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2869 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2871 set_gdbarch_deprecated_register_convertible (gdbarch
, rs6000_register_convertible
);
2872 set_gdbarch_deprecated_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2873 set_gdbarch_deprecated_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2874 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2875 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2876 is correct for the SysV ABI when the wordsize is 8, but I'm also
2877 fairly certain that ppc_sysv_abi_push_arguments() will give even
2878 worse results since it only works for 32-bit code. So, for the moment,
2879 we're better off calling rs6000_push_arguments() since it works for
2880 64-bit code. At some point in the future, this matter needs to be
2882 if (sysv_abi
&& wordsize
== 4)
2883 set_gdbarch_push_dummy_call (gdbarch
, ppc_sysv_abi_push_dummy_call
);
2884 else if (sysv_abi
&& wordsize
== 8)
2885 set_gdbarch_push_dummy_call (gdbarch
, ppc64_sysv_abi_push_dummy_call
);
2887 set_gdbarch_push_dummy_call (gdbarch
, rs6000_push_dummy_call
);
2889 set_gdbarch_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2890 set_gdbarch_deprecated_pop_frame (gdbarch
, rs6000_pop_frame
);
2892 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2893 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2894 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2895 set_gdbarch_function_start_offset (gdbarch
, 0);
2896 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2898 /* Handle the 64-bit SVR4 minimal-symbol convention of using "FN"
2899 for the descriptor and ".FN" for the entry-point -- a user
2900 specifying "break FN" will unexpectedly end up with a breakpoint
2901 on the descriptor and not the function. This architecture method
2902 transforms any breakpoints on descriptors into breakpoints on the
2903 corresponding entry point. */
2904 if (sysv_abi
&& wordsize
== 8)
2905 set_gdbarch_adjust_breakpoint_address (gdbarch
, ppc64_sysv_abi_adjust_breakpoint_address
);
2907 /* Not sure on this. FIXMEmgo */
2908 set_gdbarch_frame_args_skip (gdbarch
, 8);
2910 if (sysv_abi
&& wordsize
== 4)
2911 set_gdbarch_use_struct_convention (gdbarch
,
2912 ppc_sysv_abi_use_struct_convention
);
2913 else if (sysv_abi
&& wordsize
== 8)
2914 set_gdbarch_use_struct_convention (gdbarch
, ppc64_sysv_abi_use_struct_convention
);
2916 set_gdbarch_use_struct_convention (gdbarch
,
2917 rs6000_use_struct_convention
);
2919 set_gdbarch_frameless_function_invocation (gdbarch
,
2920 rs6000_frameless_function_invocation
);
2921 set_gdbarch_deprecated_frame_chain (gdbarch
, rs6000_frame_chain
);
2922 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, rs6000_frame_saved_pc
);
2924 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, rs6000_frame_init_saved_regs
);
2925 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, rs6000_init_extra_frame_info
);
2929 /* Handle RS/6000 function pointers (which are really function
2931 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2932 rs6000_convert_from_func_ptr_addr
);
2934 set_gdbarch_deprecated_frame_args_address (gdbarch
, rs6000_frame_args_address
);
2935 set_gdbarch_deprecated_frame_locals_address (gdbarch
, rs6000_frame_args_address
);
2936 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, rs6000_saved_pc_after_call
);
2938 /* Helpers for function argument information. */
2939 set_gdbarch_fetch_pointer_argument (gdbarch
, rs6000_fetch_pointer_argument
);
2941 /* Hook in ABI-specific overrides, if they have been registered. */
2942 gdbarch_init_osabi (info
, gdbarch
);
2944 if (from_xcoff_exec
)
2946 /* NOTE: jimix/2003-06-09: This test should really check for
2947 GDB_OSABI_AIX when that is defined and becomes
2948 available. (Actually, once things are properly split apart,
2949 the test goes away.) */
2950 /* RS6000/AIX does not support PT_STEP. Has to be simulated. */
2951 set_gdbarch_software_single_step (gdbarch
, rs6000_software_single_step
);
2958 rs6000_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2960 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2965 /* FIXME: Dump gdbarch_tdep. */
2968 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
2971 rs6000_info_powerpc_command (char *args
, int from_tty
)
2973 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
2976 /* Initialization code. */
2978 extern initialize_file_ftype _initialize_rs6000_tdep
; /* -Wmissing-prototypes */
2981 _initialize_rs6000_tdep (void)
2983 gdbarch_register (bfd_arch_rs6000
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2984 gdbarch_register (bfd_arch_powerpc
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2986 /* Add root prefix command for "info powerpc" commands */
2987 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
2988 "Various POWERPC info specific commands.",
2989 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);