1 /* Target-dependent code for GDB, the GNU debugger.
3 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
39 #include "libbfd.h" /* for bfd_default_set_arch_mach */
40 #include "coff/internal.h" /* for libcoff.h */
41 #include "libcoff.h" /* for xcoff_data */
42 #include "coff/xcoff.h"
47 #include "solib-svr4.h"
50 #include "gdb_assert.h"
53 /* If the kernel has to deliver a signal, it pushes a sigcontext
54 structure on the stack and then calls the signal handler, passing
55 the address of the sigcontext in an argument register. Usually
56 the signal handler doesn't save this register, so we have to
57 access the sigcontext structure via an offset from the signal handler
59 The following constants were determined by experimentation on AIX 3.2. */
60 #define SIG_FRAME_PC_OFFSET 96
61 #define SIG_FRAME_LR_OFFSET 108
62 #define SIG_FRAME_FP_OFFSET 284
64 /* To be used by skip_prologue. */
66 struct rs6000_framedata
68 int offset
; /* total size of frame --- the distance
69 by which we decrement sp to allocate
71 int saved_gpr
; /* smallest # of saved gpr */
72 int saved_fpr
; /* smallest # of saved fpr */
73 int saved_vr
; /* smallest # of saved vr */
74 int saved_ev
; /* smallest # of saved ev */
75 int alloca_reg
; /* alloca register number (frame ptr) */
76 char frameless
; /* true if frameless functions. */
77 char nosavedpc
; /* true if pc not saved. */
78 int gpr_offset
; /* offset of saved gprs from prev sp */
79 int fpr_offset
; /* offset of saved fprs from prev sp */
80 int vr_offset
; /* offset of saved vrs from prev sp */
81 int ev_offset
; /* offset of saved evs from prev sp */
82 int lr_offset
; /* offset of saved lr */
83 int cr_offset
; /* offset of saved cr */
84 int vrsave_offset
; /* offset of saved vrsave register */
87 /* Description of a single register. */
91 char *name
; /* name of register */
92 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
93 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
94 unsigned char fpr
; /* whether register is floating-point */
95 unsigned char pseudo
; /* whether register is pseudo */
98 /* Breakpoint shadows for the single step instructions will be kept here. */
100 static struct sstep_breaks
102 /* Address, or 0 if this is not in use. */
104 /* Shadow contents. */
109 /* Hook for determining the TOC address when calling functions in the
110 inferior under AIX. The initialization code in rs6000-nat.c sets
111 this hook to point to find_toc_address. */
113 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
115 /* Hook to set the current architecture when starting a child process.
116 rs6000-nat.c sets this. */
118 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
120 /* Static function prototypes */
122 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
124 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
125 struct rs6000_framedata
*);
126 static void frame_get_saved_regs (struct frame_info
* fi
,
127 struct rs6000_framedata
* fdatap
);
128 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
130 /* Is REGNO an AltiVec register? Return 1 if so, 0 otherwise. */
132 altivec_register_p (int regno
)
134 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
135 if (tdep
->ppc_vr0_regnum
< 0 || tdep
->ppc_vrsave_regnum
< 0)
138 return (regno
>= tdep
->ppc_vr0_regnum
&& regno
<= tdep
->ppc_vrsave_regnum
);
141 /* Use the architectures FP registers? */
143 ppc_floating_point_unit_p (struct gdbarch
*gdbarch
)
145 const struct bfd_arch_info
*info
= gdbarch_bfd_arch_info (gdbarch
);
146 if (info
->arch
== bfd_arch_powerpc
)
147 return (info
->mach
!= bfd_mach_ppc_e500
);
148 if (info
->arch
== bfd_arch_rs6000
)
153 /* Read a LEN-byte address from debugged memory address MEMADDR. */
156 read_memory_addr (CORE_ADDR memaddr
, int len
)
158 return read_memory_unsigned_integer (memaddr
, len
);
162 rs6000_skip_prologue (CORE_ADDR pc
)
164 struct rs6000_framedata frame
;
165 pc
= skip_prologue (pc
, 0, &frame
);
170 /* Fill in fi->saved_regs */
172 struct frame_extra_info
174 /* Functions calling alloca() change the value of the stack
175 pointer. We need to use initial stack pointer (which is saved in
176 r31 by gcc) in such cases. If a compiler emits traceback table,
177 then we should use the alloca register specified in traceback
179 CORE_ADDR initial_sp
; /* initial stack pointer. */
183 rs6000_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
185 struct frame_extra_info
*extra_info
=
186 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
187 extra_info
->initial_sp
= 0;
188 if (get_next_frame (fi
) != NULL
189 && get_frame_pc (fi
) < TEXT_SEGMENT_BASE
)
190 /* We're in get_prev_frame */
191 /* and this is a special signal frame. */
192 /* (fi->pc will be some low address in the kernel, */
193 /* to which the signal handler returns). */
194 deprecated_set_frame_type (fi
, SIGTRAMP_FRAME
);
197 /* Put here the code to store, into a struct frame_saved_regs,
198 the addresses of the saved registers of frame described by FRAME_INFO.
199 This includes special registers such as pc and fp saved in special
200 ways in the stack frame. sp is even more special:
201 the address we return for it IS the sp for the next frame. */
203 /* In this implementation for RS/6000, we do *not* save sp. I am
204 not sure if it will be needed. The following function takes care of gpr's
208 rs6000_frame_init_saved_regs (struct frame_info
*fi
)
210 frame_get_saved_regs (fi
, NULL
);
214 rs6000_init_frame_pc_first (int fromleaf
, struct frame_info
*prev
)
217 ? DEPRECATED_SAVED_PC_AFTER_CALL (get_next_frame (prev
))
218 : frame_relative_level (prev
) > 0
219 ? DEPRECATED_FRAME_SAVED_PC (get_next_frame (prev
))
224 rs6000_frame_args_address (struct frame_info
*fi
)
226 struct frame_extra_info
*extra_info
= get_frame_extra_info (fi
);
227 if (extra_info
->initial_sp
!= 0)
228 return extra_info
->initial_sp
;
230 return frame_initial_stack_address (fi
);
233 /* Immediately after a function call, return the saved pc.
234 Can't go through the frames for this because on some machines
235 the new frame is not set up until the new function executes
236 some instructions. */
239 rs6000_saved_pc_after_call (struct frame_info
*fi
)
241 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
244 /* Get the ith function argument for the current function. */
246 rs6000_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
250 get_frame_register (frame
, 3 + argi
, &addr
);
254 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
257 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
264 absolute
= (int) ((instr
>> 1) & 1);
269 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
273 dest
= pc
+ immediate
;
277 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
281 dest
= pc
+ immediate
;
285 ext_op
= (instr
>> 1) & 0x3ff;
287 if (ext_op
== 16) /* br conditional register */
289 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
291 /* If we are about to return from a signal handler, dest is
292 something like 0x3c90. The current frame is a signal handler
293 caller frame, upon completion of the sigreturn system call
294 execution will return to the saved PC in the frame. */
295 if (dest
< TEXT_SEGMENT_BASE
)
297 struct frame_info
*fi
;
299 fi
= get_current_frame ();
301 dest
= read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
302 gdbarch_tdep (current_gdbarch
)->wordsize
);
306 else if (ext_op
== 528) /* br cond to count reg */
308 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
310 /* If we are about to execute a system call, dest is something
311 like 0x22fc or 0x3b00. Upon completion the system call
312 will return to the address in the link register. */
313 if (dest
< TEXT_SEGMENT_BASE
)
314 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
323 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
327 /* Sequence of bytes for breakpoint instruction. */
329 const static unsigned char *
330 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
332 static unsigned char big_breakpoint
[] = { 0x7d, 0x82, 0x10, 0x08 };
333 static unsigned char little_breakpoint
[] = { 0x08, 0x10, 0x82, 0x7d };
335 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
336 return big_breakpoint
;
338 return little_breakpoint
;
342 /* AIX does not support PT_STEP. Simulate it. */
345 rs6000_software_single_step (enum target_signal signal
,
346 int insert_breakpoints_p
)
350 const char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
356 if (insert_breakpoints_p
)
361 insn
= read_memory_integer (loc
, 4);
363 breaks
[0] = loc
+ breakp_sz
;
365 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
367 /* Don't put two breakpoints on the same address. */
368 if (breaks
[1] == breaks
[0])
371 stepBreaks
[1].address
= 0;
373 for (ii
= 0; ii
< 2; ++ii
)
376 /* ignore invalid breakpoint. */
377 if (breaks
[ii
] == -1)
379 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
380 stepBreaks
[ii
].address
= breaks
[ii
];
387 /* remove step breakpoints. */
388 for (ii
= 0; ii
< 2; ++ii
)
389 if (stepBreaks
[ii
].address
!= 0)
390 target_remove_breakpoint (stepBreaks
[ii
].address
,
391 stepBreaks
[ii
].data
);
393 errno
= 0; /* FIXME, don't ignore errors! */
394 /* What errors? {read,write}_memory call error(). */
398 /* return pc value after skipping a function prologue and also return
399 information about a function frame.
401 in struct rs6000_framedata fdata:
402 - frameless is TRUE, if function does not have a frame.
403 - nosavedpc is TRUE, if function does not save %pc value in its frame.
404 - offset is the initial size of this stack frame --- the amount by
405 which we decrement the sp to allocate the frame.
406 - saved_gpr is the number of the first saved gpr.
407 - saved_fpr is the number of the first saved fpr.
408 - saved_vr is the number of the first saved vr.
409 - saved_ev is the number of the first saved ev.
410 - alloca_reg is the number of the register used for alloca() handling.
412 - gpr_offset is the offset of the first saved gpr from the previous frame.
413 - fpr_offset is the offset of the first saved fpr from the previous frame.
414 - vr_offset is the offset of the first saved vr from the previous frame.
415 - ev_offset is the offset of the first saved ev from the previous frame.
416 - lr_offset is the offset of the saved lr
417 - cr_offset is the offset of the saved cr
418 - vrsave_offset is the offset of the saved vrsave register
421 #define SIGNED_SHORT(x) \
422 ((sizeof (short) == 2) \
423 ? ((int)(short)(x)) \
424 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
426 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
428 /* Limit the number of skipped non-prologue instructions, as the examining
429 of the prologue is expensive. */
430 static int max_skip_non_prologue_insns
= 10;
432 /* Given PC representing the starting address of a function, and
433 LIM_PC which is the (sloppy) limit to which to scan when looking
434 for a prologue, attempt to further refine this limit by using
435 the line data in the symbol table. If successful, a better guess
436 on where the prologue ends is returned, otherwise the previous
437 value of lim_pc is returned. */
439 /* FIXME: cagney/2004-02-14: This function and logic have largely been
440 superseded by skip_prologue_using_sal. */
443 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
445 struct symtab_and_line prologue_sal
;
447 prologue_sal
= find_pc_line (pc
, 0);
448 if (prologue_sal
.line
!= 0)
451 CORE_ADDR addr
= prologue_sal
.end
;
453 /* Handle the case in which compiler's optimizer/scheduler
454 has moved instructions into the prologue. We scan ahead
455 in the function looking for address ranges whose corresponding
456 line number is less than or equal to the first one that we
457 found for the function. (It can be less than when the
458 scheduler puts a body instruction before the first prologue
460 for (i
= 2 * max_skip_non_prologue_insns
;
461 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
464 struct symtab_and_line sal
;
466 sal
= find_pc_line (addr
, 0);
469 if (sal
.line
<= prologue_sal
.line
470 && sal
.symtab
== prologue_sal
.symtab
)
477 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
478 lim_pc
= prologue_sal
.end
;
485 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
487 CORE_ADDR orig_pc
= pc
;
488 CORE_ADDR last_prologue_pc
= pc
;
489 CORE_ADDR li_found_pc
= 0;
493 long vr_saved_offset
= 0;
502 int minimal_toc_loaded
= 0;
503 int prev_insn_was_prologue_insn
= 1;
504 int num_skip_non_prologue_insns
= 0;
505 const struct bfd_arch_info
*arch_info
= gdbarch_bfd_arch_info (current_gdbarch
);
506 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
508 /* Attempt to find the end of the prologue when no limit is specified.
509 Note that refine_prologue_limit() has been written so that it may
510 be used to "refine" the limits of non-zero PC values too, but this
511 is only safe if we 1) trust the line information provided by the
512 compiler and 2) iterate enough to actually find the end of the
515 It may become a good idea at some point (for both performance and
516 accuracy) to unconditionally call refine_prologue_limit(). But,
517 until we can make a clear determination that this is beneficial,
518 we'll play it safe and only use it to obtain a limit when none
519 has been specified. */
521 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
523 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
524 fdata
->saved_gpr
= -1;
525 fdata
->saved_fpr
= -1;
526 fdata
->saved_vr
= -1;
527 fdata
->saved_ev
= -1;
528 fdata
->alloca_reg
= -1;
529 fdata
->frameless
= 1;
530 fdata
->nosavedpc
= 1;
534 /* Sometimes it isn't clear if an instruction is a prologue
535 instruction or not. When we encounter one of these ambiguous
536 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
537 Otherwise, we'll assume that it really is a prologue instruction. */
538 if (prev_insn_was_prologue_insn
)
539 last_prologue_pc
= pc
;
541 /* Stop scanning if we've hit the limit. */
542 if (lim_pc
!= 0 && pc
>= lim_pc
)
545 prev_insn_was_prologue_insn
= 1;
547 /* Fetch the instruction and convert it to an integer. */
548 if (target_read_memory (pc
, buf
, 4))
550 op
= extract_signed_integer (buf
, 4);
552 if ((op
& 0xfc1fffff) == 0x7c0802a6)
554 /* Since shared library / PIC code, which needs to get its
555 address at runtime, can appear to save more than one link
569 remember just the first one, but skip over additional
572 lr_reg
= (op
& 0x03e00000);
575 else if ((op
& 0xfc1fffff) == 0x7c000026)
577 cr_reg
= (op
& 0x03e00000);
581 else if ((op
& 0xfc1f0000) == 0xd8010000)
582 { /* stfd Rx,NUM(r1) */
583 reg
= GET_SRC_REG (op
);
584 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
586 fdata
->saved_fpr
= reg
;
587 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
592 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
593 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
594 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
595 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
598 reg
= GET_SRC_REG (op
);
599 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
601 fdata
->saved_gpr
= reg
;
602 if ((op
& 0xfc1f0003) == 0xf8010000)
604 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
609 else if ((op
& 0xffff0000) == 0x60000000)
612 /* Allow nops in the prologue, but do not consider them to
613 be part of the prologue unless followed by other prologue
615 prev_insn_was_prologue_insn
= 0;
619 else if ((op
& 0xffff0000) == 0x3c000000)
620 { /* addis 0,0,NUM, used
622 fdata
->offset
= (op
& 0x0000ffff) << 16;
623 fdata
->frameless
= 0;
627 else if ((op
& 0xffff0000) == 0x60000000)
628 { /* ori 0,0,NUM, 2nd ha
629 lf of >= 32k frames */
630 fdata
->offset
|= (op
& 0x0000ffff);
631 fdata
->frameless
= 0;
635 else if (lr_reg
!= -1 &&
636 /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */
637 (((op
& 0xffff0000) == (lr_reg
| 0xf8010000)) ||
638 /* stw Rx, NUM(r1) */
639 ((op
& 0xffff0000) == (lr_reg
| 0x90010000)) ||
640 /* stwu Rx, NUM(r1) */
641 ((op
& 0xffff0000) == (lr_reg
| 0x94010000))))
642 { /* where Rx == lr */
643 fdata
->lr_offset
= offset
;
644 fdata
->nosavedpc
= 0;
646 if ((op
& 0xfc000003) == 0xf8000000 || /* std */
647 (op
& 0xfc000000) == 0x90000000) /* stw */
649 /* Does not update r1, so add displacement to lr_offset. */
650 fdata
->lr_offset
+= SIGNED_SHORT (op
);
655 else if (cr_reg
!= -1 &&
656 /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */
657 (((op
& 0xffff0000) == (cr_reg
| 0xf8010000)) ||
658 /* stw Rx, NUM(r1) */
659 ((op
& 0xffff0000) == (cr_reg
| 0x90010000)) ||
660 /* stwu Rx, NUM(r1) */
661 ((op
& 0xffff0000) == (cr_reg
| 0x94010000))))
662 { /* where Rx == cr */
663 fdata
->cr_offset
= offset
;
665 if ((op
& 0xfc000003) == 0xf8000000 ||
666 (op
& 0xfc000000) == 0x90000000)
668 /* Does not update r1, so add displacement to cr_offset. */
669 fdata
->cr_offset
+= SIGNED_SHORT (op
);
674 else if (op
== 0x48000005)
680 else if (op
== 0x48000004)
685 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
686 in V.4 -mminimal-toc */
687 (op
& 0xffff0000) == 0x3bde0000)
688 { /* addi 30,30,foo@l */
692 else if ((op
& 0xfc000001) == 0x48000001)
696 fdata
->frameless
= 0;
697 /* Don't skip over the subroutine call if it is not within
698 the first three instructions of the prologue. */
699 if ((pc
- orig_pc
) > 8)
702 op
= read_memory_integer (pc
+ 4, 4);
704 /* At this point, make sure this is not a trampoline
705 function (a function that simply calls another functions,
706 and nothing else). If the next is not a nop, this branch
707 was part of the function prologue. */
709 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
710 break; /* don't skip over
715 /* update stack pointer */
716 else if ((op
& 0xfc1f0000) == 0x94010000)
717 { /* stu rX,NUM(r1) || stwu rX,NUM(r1) */
718 fdata
->frameless
= 0;
719 fdata
->offset
= SIGNED_SHORT (op
);
720 offset
= fdata
->offset
;
723 else if ((op
& 0xfc1f016a) == 0x7c01016e)
724 { /* stwux rX,r1,rY */
725 /* no way to figure out what r1 is going to be */
726 fdata
->frameless
= 0;
727 offset
= fdata
->offset
;
730 else if ((op
& 0xfc1f0003) == 0xf8010001)
731 { /* stdu rX,NUM(r1) */
732 fdata
->frameless
= 0;
733 fdata
->offset
= SIGNED_SHORT (op
& ~3UL);
734 offset
= fdata
->offset
;
737 else if ((op
& 0xfc1f016a) == 0x7c01016a)
738 { /* stdux rX,r1,rY */
739 /* no way to figure out what r1 is going to be */
740 fdata
->frameless
= 0;
741 offset
= fdata
->offset
;
744 /* Load up minimal toc pointer */
745 else if (((op
>> 22) == 0x20f || /* l r31,... or l r30,... */
746 (op
>> 22) == 0x3af) /* ld r31,... or ld r30,... */
747 && !minimal_toc_loaded
)
749 minimal_toc_loaded
= 1;
752 /* move parameters from argument registers to local variable
755 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
756 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
757 (((op
>> 21) & 31) <= 10) &&
758 ((long) ((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
762 /* store parameters in stack */
764 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
765 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
766 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
770 /* store parameters in stack via frame pointer */
773 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
774 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
775 (op
& 0xfc1f0000) == 0xfc1f0000))
776 { /* frsp, fp?,NUM(r1) */
779 /* Set up frame pointer */
781 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
784 fdata
->frameless
= 0;
786 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
+ 31);
789 /* Another way to set up the frame pointer. */
791 else if ((op
& 0xfc1fffff) == 0x38010000)
792 { /* addi rX, r1, 0x0 */
793 fdata
->frameless
= 0;
795 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
796 + ((op
& ~0x38010000) >> 21));
799 /* AltiVec related instructions. */
800 /* Store the vrsave register (spr 256) in another register for
801 later manipulation, or load a register into the vrsave
802 register. 2 instructions are used: mfvrsave and
803 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
804 and mtspr SPR256, Rn. */
805 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
806 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
807 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
809 vrsave_reg
= GET_SRC_REG (op
);
812 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
816 /* Store the register where vrsave was saved to onto the stack:
817 rS is the register where vrsave was stored in a previous
819 /* 100100 sssss 00001 dddddddd dddddddd */
820 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
822 if (vrsave_reg
== GET_SRC_REG (op
))
824 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
829 /* Compute the new value of vrsave, by modifying the register
830 where vrsave was saved to. */
831 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
832 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
836 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
837 in a pair of insns to save the vector registers on the
839 /* 001110 00000 00000 iiii iiii iiii iiii */
840 /* 001110 01110 00000 iiii iiii iiii iiii */
841 else if ((op
& 0xffff0000) == 0x38000000 /* li r0, SIMM */
842 || (op
& 0xffff0000) == 0x39c00000) /* li r14, SIMM */
845 vr_saved_offset
= SIGNED_SHORT (op
);
847 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
848 /* 011111 sssss 11111 00000 00111001110 */
849 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
851 if (pc
== (li_found_pc
+ 4))
853 vr_reg
= GET_SRC_REG (op
);
854 /* If this is the first vector reg to be saved, or if
855 it has a lower number than others previously seen,
856 reupdate the frame info. */
857 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
859 fdata
->saved_vr
= vr_reg
;
860 fdata
->vr_offset
= vr_saved_offset
+ offset
;
862 vr_saved_offset
= -1;
867 /* End AltiVec related instructions. */
869 /* Start BookE related instructions. */
870 /* Store gen register S at (r31+uimm).
871 Any register less than r13 is volatile, so we don't care. */
872 /* 000100 sssss 11111 iiiii 01100100001 */
873 else if (arch_info
->mach
== bfd_mach_ppc_e500
874 && (op
& 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
876 if ((op
& 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
879 ev_reg
= GET_SRC_REG (op
);
880 imm
= (op
>> 11) & 0x1f;
882 /* If this is the first vector reg to be saved, or if
883 it has a lower number than others previously seen,
884 reupdate the frame info. */
885 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
887 fdata
->saved_ev
= ev_reg
;
888 fdata
->ev_offset
= ev_offset
+ offset
;
893 /* Store gen register rS at (r1+rB). */
894 /* 000100 sssss 00001 bbbbb 01100100000 */
895 else if (arch_info
->mach
== bfd_mach_ppc_e500
896 && (op
& 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
898 if (pc
== (li_found_pc
+ 4))
900 ev_reg
= GET_SRC_REG (op
);
901 /* If this is the first vector reg to be saved, or if
902 it has a lower number than others previously seen,
903 reupdate the frame info. */
904 /* We know the contents of rB from the previous instruction. */
905 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
907 fdata
->saved_ev
= ev_reg
;
908 fdata
->ev_offset
= vr_saved_offset
+ offset
;
910 vr_saved_offset
= -1;
916 /* Store gen register r31 at (rA+uimm). */
917 /* 000100 11111 aaaaa iiiii 01100100001 */
918 else if (arch_info
->mach
== bfd_mach_ppc_e500
919 && (op
& 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
921 /* Wwe know that the source register is 31 already, but
922 it can't hurt to compute it. */
923 ev_reg
= GET_SRC_REG (op
);
924 ev_offset
= ((op
>> 11) & 0x1f) * 8;
925 /* If this is the first vector reg to be saved, or if
926 it has a lower number than others previously seen,
927 reupdate the frame info. */
928 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
930 fdata
->saved_ev
= ev_reg
;
931 fdata
->ev_offset
= ev_offset
+ offset
;
936 /* Store gen register S at (r31+r0).
937 Store param on stack when offset from SP bigger than 4 bytes. */
938 /* 000100 sssss 11111 00000 01100100000 */
939 else if (arch_info
->mach
== bfd_mach_ppc_e500
940 && (op
& 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
942 if (pc
== (li_found_pc
+ 4))
944 if ((op
& 0x03e00000) >= 0x01a00000)
946 ev_reg
= GET_SRC_REG (op
);
947 /* If this is the first vector reg to be saved, or if
948 it has a lower number than others previously seen,
949 reupdate the frame info. */
950 /* We know the contents of r0 from the previous
952 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
954 fdata
->saved_ev
= ev_reg
;
955 fdata
->ev_offset
= vr_saved_offset
+ offset
;
959 vr_saved_offset
= -1;
964 /* End BookE related instructions. */
968 /* Not a recognized prologue instruction.
969 Handle optimizer code motions into the prologue by continuing
970 the search if we have no valid frame yet or if the return
971 address is not yet saved in the frame. */
972 if (fdata
->frameless
== 0
973 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
976 if (op
== 0x4e800020 /* blr */
977 || op
== 0x4e800420) /* bctr */
978 /* Do not scan past epilogue in frameless functions or
981 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
982 /* Never skip branches. */
985 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
986 /* Do not scan too many insns, scanning insns is expensive with
990 /* Continue scanning. */
991 prev_insn_was_prologue_insn
= 0;
997 /* I have problems with skipping over __main() that I need to address
998 * sometime. Previously, I used to use misc_function_vector which
999 * didn't work as well as I wanted to be. -MGO */
1001 /* If the first thing after skipping a prolog is a branch to a function,
1002 this might be a call to an initializer in main(), introduced by gcc2.
1003 We'd like to skip over it as well. Fortunately, xlc does some extra
1004 work before calling a function right after a prologue, thus we can
1005 single out such gcc2 behaviour. */
1008 if ((op
& 0xfc000001) == 0x48000001)
1009 { /* bl foo, an initializer function? */
1010 op
= read_memory_integer (pc
+ 4, 4);
1012 if (op
== 0x4def7b82)
1013 { /* cror 0xf, 0xf, 0xf (nop) */
1015 /* Check and see if we are in main. If so, skip over this
1016 initializer function as well. */
1018 tmp
= find_pc_misc_function (pc
);
1020 && strcmp (misc_function_vector
[tmp
].name
, main_name ()) == 0)
1026 fdata
->offset
= -fdata
->offset
;
1027 return last_prologue_pc
;
1031 /*************************************************************************
1032 Support for creating pushing a dummy frame into the stack, and popping
1034 *************************************************************************/
1037 /* Pop the innermost frame, go back to the caller. */
1040 rs6000_pop_frame (void)
1042 CORE_ADDR pc
, lr
, sp
, prev_sp
, addr
; /* %pc, %lr, %sp */
1043 struct rs6000_framedata fdata
;
1044 struct frame_info
*frame
= get_current_frame ();
1048 sp
= get_frame_base (frame
);
1050 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
1051 get_frame_base (frame
),
1052 get_frame_base (frame
)))
1054 generic_pop_dummy_frame ();
1055 flush_cached_frames ();
1059 /* Make sure that all registers are valid. */
1060 deprecated_read_register_bytes (0, NULL
, DEPRECATED_REGISTER_BYTES
);
1062 /* Figure out previous %pc value. If the function is frameless, it is
1063 still in the link register, otherwise walk the frames and retrieve the
1064 saved %pc value in the previous frame. */
1066 addr
= get_frame_func (frame
);
1067 (void) skip_prologue (addr
, get_frame_pc (frame
), &fdata
);
1069 wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1070 if (fdata
.frameless
)
1073 prev_sp
= read_memory_addr (sp
, wordsize
);
1074 if (fdata
.lr_offset
== 0)
1075 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1077 lr
= read_memory_addr (prev_sp
+ fdata
.lr_offset
, wordsize
);
1079 /* reset %pc value. */
1080 write_register (PC_REGNUM
, lr
);
1082 /* reset register values if any was saved earlier. */
1084 if (fdata
.saved_gpr
!= -1)
1086 addr
= prev_sp
+ fdata
.gpr_offset
;
1087 for (ii
= fdata
.saved_gpr
; ii
<= 31; ++ii
)
1089 read_memory (addr
, &deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
)],
1095 if (fdata
.saved_fpr
!= -1)
1097 addr
= prev_sp
+ fdata
.fpr_offset
;
1098 for (ii
= fdata
.saved_fpr
; ii
<= 31; ++ii
)
1100 read_memory (addr
, &deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ FP0_REGNUM
)], 8);
1105 write_register (SP_REGNUM
, prev_sp
);
1106 target_store_registers (-1);
1107 flush_cached_frames ();
1110 /* All the ABI's require 16 byte alignment. */
1112 rs6000_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1114 return (addr
& -16);
1117 /* Pass the arguments in either registers, or in the stack. In RS/6000,
1118 the first eight words of the argument list (that might be less than
1119 eight parameters if some parameters occupy more than one word) are
1120 passed in r3..r10 registers. float and double parameters are
1121 passed in fpr's, in addition to that. Rest of the parameters if any
1122 are passed in user stack. There might be cases in which half of the
1123 parameter is copied into registers, the other half is pushed into
1126 Stack must be aligned on 64-bit boundaries when synthesizing
1129 If the function is returning a structure, then the return address is passed
1130 in r3, then the first 7 words of the parameters can be passed in registers,
1131 starting from r4. */
1134 rs6000_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1135 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1136 int nargs
, struct value
**args
, CORE_ADDR sp
,
1137 int struct_return
, CORE_ADDR struct_addr
)
1139 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1142 int argno
; /* current argument number */
1143 int argbytes
; /* current argument byte */
1144 char tmp_buffer
[50];
1145 int f_argno
= 0; /* current floating point argno */
1146 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1148 struct value
*arg
= 0;
1153 /* The first eight words of ther arguments are passed in registers.
1154 Copy them appropriately. */
1157 /* If the function is returning a `struct', then the first word
1158 (which will be passed in r3) is used for struct return address.
1159 In that case we should advance one word and start from r4
1160 register to copy parameters. */
1163 regcache_raw_write_unsigned (regcache
, tdep
->ppc_gp0_regnum
+ 3,
1169 effectively indirect call... gcc does...
1171 return_val example( float, int);
1174 float in fp0, int in r3
1175 offset of stack on overflow 8/16
1176 for varargs, must go by type.
1178 float in r3&r4, int in r5
1179 offset of stack on overflow different
1181 return in r3 or f0. If no float, must study how gcc emulates floats;
1182 pay attention to arg promotion.
1183 User may have to cast\args to handle promotion correctly
1184 since gdb won't know if prototype supplied or not.
1187 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
1189 int reg_size
= DEPRECATED_REGISTER_RAW_SIZE (ii
+ 3);
1192 type
= check_typedef (VALUE_TYPE (arg
));
1193 len
= TYPE_LENGTH (type
);
1195 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1198 /* Floating point arguments are passed in fpr's, as well as gpr's.
1199 There are 13 fpr's reserved for passing parameters. At this point
1200 there is no way we would run out of them. */
1204 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1206 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1207 VALUE_CONTENTS (arg
),
1215 /* Argument takes more than one register. */
1216 while (argbytes
< len
)
1218 memset (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)], 0,
1220 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)],
1221 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1222 (len
- argbytes
) > reg_size
1223 ? reg_size
: len
- argbytes
);
1224 ++ii
, argbytes
+= reg_size
;
1227 goto ran_out_of_registers_for_arguments
;
1234 /* Argument can fit in one register. No problem. */
1235 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1236 memset (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1237 memcpy ((char *)&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)] + adj
,
1238 VALUE_CONTENTS (arg
), len
);
1243 ran_out_of_registers_for_arguments
:
1245 saved_sp
= read_sp ();
1247 /* Location for 8 parameters are always reserved. */
1250 /* Another six words for back chain, TOC register, link register, etc. */
1253 /* Stack pointer must be quadword aligned. */
1256 /* If there are more arguments, allocate space for them in
1257 the stack, then push them starting from the ninth one. */
1259 if ((argno
< nargs
) || argbytes
)
1265 space
+= ((len
- argbytes
+ 3) & -4);
1271 for (; jj
< nargs
; ++jj
)
1273 struct value
*val
= args
[jj
];
1274 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1277 /* Add location required for the rest of the parameters. */
1278 space
= (space
+ 15) & -16;
1281 /* This is another instance we need to be concerned about
1282 securing our stack space. If we write anything underneath %sp
1283 (r1), we might conflict with the kernel who thinks he is free
1284 to use this area. So, update %sp first before doing anything
1287 regcache_raw_write_signed (regcache
, SP_REGNUM
, sp
);
1289 /* If the last argument copied into the registers didn't fit there
1290 completely, push the rest of it into stack. */
1294 write_memory (sp
+ 24 + (ii
* 4),
1295 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1298 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1301 /* Push the rest of the arguments into stack. */
1302 for (; argno
< nargs
; ++argno
)
1306 type
= check_typedef (VALUE_TYPE (arg
));
1307 len
= TYPE_LENGTH (type
);
1310 /* Float types should be passed in fpr's, as well as in the
1312 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1317 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1319 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1320 VALUE_CONTENTS (arg
),
1325 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1326 ii
+= ((len
+ 3) & -4) / 4;
1330 /* Set the stack pointer. According to the ABI, the SP is meant to
1331 be set _before_ the corresponding stack space is used. On AIX,
1332 this even applies when the target has been completely stopped!
1333 Not doing this can lead to conflicts with the kernel which thinks
1334 that it still has control over this not-yet-allocated stack
1336 regcache_raw_write_signed (regcache
, SP_REGNUM
, sp
);
1338 /* Set back chain properly. */
1339 store_unsigned_integer (tmp_buffer
, 4, saved_sp
);
1340 write_memory (sp
, tmp_buffer
, 4);
1342 /* Point the inferior function call's return address at the dummy's
1344 regcache_raw_write_signed (regcache
, tdep
->ppc_lr_regnum
, bp_addr
);
1346 /* Set the TOC register, get the value from the objfile reader
1347 which, in turn, gets it from the VMAP table. */
1348 if (rs6000_find_toc_address_hook
!= NULL
)
1350 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (func_addr
);
1351 regcache_raw_write_signed (regcache
, tdep
->ppc_toc_regnum
, tocvalue
);
1354 target_store_registers (-1);
1358 /* PowerOpen always puts structures in memory. Vectors, which were
1359 added later, do get returned in a register though. */
1362 rs6000_use_struct_convention (int gcc_p
, struct type
*value_type
)
1364 if ((TYPE_LENGTH (value_type
) == 16 || TYPE_LENGTH (value_type
) == 8)
1365 && TYPE_VECTOR (value_type
))
1371 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1374 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1376 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1381 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1382 We need to truncate the return value into float size (4 byte) if
1385 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1387 ®buf
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1)],
1388 TYPE_LENGTH (valtype
));
1391 memcpy (&dd
, ®buf
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1393 memcpy (valbuf
, &ff
, sizeof (float));
1396 else if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1397 && TYPE_LENGTH (valtype
) == 16
1398 && TYPE_VECTOR (valtype
))
1400 memcpy (valbuf
, regbuf
+ DEPRECATED_REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1401 TYPE_LENGTH (valtype
));
1405 /* return value is copied starting from r3. */
1406 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1407 && TYPE_LENGTH (valtype
) < DEPRECATED_REGISTER_RAW_SIZE (3))
1408 offset
= DEPRECATED_REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1411 regbuf
+ DEPRECATED_REGISTER_BYTE (3) + offset
,
1412 TYPE_LENGTH (valtype
));
1416 /* Return whether handle_inferior_event() should proceed through code
1417 starting at PC in function NAME when stepping.
1419 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1420 handle memory references that are too distant to fit in instructions
1421 generated by the compiler. For example, if 'foo' in the following
1426 is greater than 32767, the linker might replace the lwz with a branch to
1427 somewhere in @FIX1 that does the load in 2 instructions and then branches
1428 back to where execution should continue.
1430 GDB should silently step over @FIX code, just like AIX dbx does.
1431 Unfortunately, the linker uses the "b" instruction for the branches,
1432 meaning that the link register doesn't get set. Therefore, GDB's usual
1433 step_over_function() mechanism won't work.
1435 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1436 in handle_inferior_event() to skip past @FIX code. */
1439 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1441 return name
&& !strncmp (name
, "@FIX", 4);
1444 /* Skip code that the user doesn't want to see when stepping:
1446 1. Indirect function calls use a piece of trampoline code to do context
1447 switching, i.e. to set the new TOC table. Skip such code if we are on
1448 its first instruction (as when we have single-stepped to here).
1450 2. Skip shared library trampoline code (which is different from
1451 indirect function call trampolines).
1453 3. Skip bigtoc fixup code.
1455 Result is desired PC to step until, or NULL if we are not in
1456 code that should be skipped. */
1459 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1461 unsigned int ii
, op
;
1463 CORE_ADDR solib_target_pc
;
1464 struct minimal_symbol
*msymbol
;
1466 static unsigned trampoline_code
[] =
1468 0x800b0000, /* l r0,0x0(r11) */
1469 0x90410014, /* st r2,0x14(r1) */
1470 0x7c0903a6, /* mtctr r0 */
1471 0x804b0004, /* l r2,0x4(r11) */
1472 0x816b0008, /* l r11,0x8(r11) */
1473 0x4e800420, /* bctr */
1474 0x4e800020, /* br */
1478 /* Check for bigtoc fixup code. */
1479 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1480 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, DEPRECATED_SYMBOL_NAME (msymbol
)))
1482 /* Double-check that the third instruction from PC is relative "b". */
1483 op
= read_memory_integer (pc
+ 8, 4);
1484 if ((op
& 0xfc000003) == 0x48000000)
1486 /* Extract bits 6-29 as a signed 24-bit relative word address and
1487 add it to the containing PC. */
1488 rel
= ((int)(op
<< 6) >> 6);
1489 return pc
+ 8 + rel
;
1493 /* If pc is in a shared library trampoline, return its target. */
1494 solib_target_pc
= find_solib_trampoline_target (pc
);
1495 if (solib_target_pc
)
1496 return solib_target_pc
;
1498 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1500 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1501 if (op
!= trampoline_code
[ii
])
1504 ii
= read_register (11); /* r11 holds destination addr */
1505 pc
= read_memory_addr (ii
, gdbarch_tdep (current_gdbarch
)->wordsize
); /* (r11) value */
1509 /* Determines whether the function FI has a frame on the stack or not. */
1512 rs6000_frameless_function_invocation (struct frame_info
*fi
)
1514 CORE_ADDR func_start
;
1515 struct rs6000_framedata fdata
;
1517 /* Don't even think about framelessness except on the innermost frame
1518 or if the function was interrupted by a signal. */
1519 if (get_next_frame (fi
) != NULL
1520 && !(get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1523 func_start
= get_frame_func (fi
);
1525 /* If we failed to find the start of the function, it is a mistake
1526 to inspect the instructions. */
1530 /* A frame with a zero PC is usually created by dereferencing a NULL
1531 function pointer, normally causing an immediate core dump of the
1532 inferior. Mark function as frameless, as the inferior has no chance
1533 of setting up a stack frame. */
1534 if (get_frame_pc (fi
) == 0)
1540 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1541 return fdata
.frameless
;
1544 /* Return the PC saved in a frame. */
1547 rs6000_frame_saved_pc (struct frame_info
*fi
)
1549 CORE_ADDR func_start
;
1550 struct rs6000_framedata fdata
;
1551 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1552 int wordsize
= tdep
->wordsize
;
1554 if ((get_frame_type (fi
) == SIGTRAMP_FRAME
))
1555 return read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
1558 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1559 get_frame_base (fi
),
1560 get_frame_base (fi
)))
1561 return deprecated_read_register_dummy (get_frame_pc (fi
),
1562 get_frame_base (fi
), PC_REGNUM
);
1564 func_start
= get_frame_func (fi
);
1566 /* If we failed to find the start of the function, it is a mistake
1567 to inspect the instructions. */
1571 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1573 if (fdata
.lr_offset
== 0 && get_next_frame (fi
) != NULL
)
1575 if ((get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1576 return read_memory_addr ((get_frame_base (get_next_frame (fi
))
1577 + SIG_FRAME_LR_OFFSET
),
1579 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1580 /* The link register wasn't saved by this frame and the next
1581 (inner, newer) frame is a dummy. Get the link register
1582 value by unwinding it from that [dummy] frame. */
1585 frame_unwind_unsigned_register (get_next_frame (fi
),
1586 tdep
->ppc_lr_regnum
, &lr
);
1590 return read_memory_addr (DEPRECATED_FRAME_CHAIN (fi
)
1591 + tdep
->lr_frame_offset
,
1595 if (fdata
.lr_offset
== 0)
1596 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1598 return read_memory_addr (DEPRECATED_FRAME_CHAIN (fi
) + fdata
.lr_offset
,
1602 /* If saved registers of frame FI are not known yet, read and cache them.
1603 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1604 in which case the framedata are read. */
1607 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1609 CORE_ADDR frame_addr
;
1610 struct rs6000_framedata work_fdata
;
1611 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1612 int wordsize
= tdep
->wordsize
;
1614 if (deprecated_get_frame_saved_regs (fi
))
1619 fdatap
= &work_fdata
;
1620 (void) skip_prologue (get_frame_func (fi
), get_frame_pc (fi
), fdatap
);
1623 frame_saved_regs_zalloc (fi
);
1625 /* If there were any saved registers, figure out parent's stack
1627 /* The following is true only if the frame doesn't have a call to
1630 if (fdatap
->saved_fpr
== 0
1631 && fdatap
->saved_gpr
== 0
1632 && fdatap
->saved_vr
== 0
1633 && fdatap
->saved_ev
== 0
1634 && fdatap
->lr_offset
== 0
1635 && fdatap
->cr_offset
== 0
1636 && fdatap
->vr_offset
== 0
1637 && fdatap
->ev_offset
== 0)
1640 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1641 address of the current frame. Things might be easier if the
1642 ->frame pointed to the outer-most address of the frame. In the
1643 mean time, the address of the prev frame is used as the base
1644 address of this frame. */
1645 frame_addr
= DEPRECATED_FRAME_CHAIN (fi
);
1647 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1648 All fpr's from saved_fpr to fp31 are saved. */
1650 if (fdatap
->saved_fpr
>= 0)
1653 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1654 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1656 deprecated_get_frame_saved_regs (fi
)[FP0_REGNUM
+ i
] = fpr_addr
;
1661 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1662 All gpr's from saved_gpr to gpr31 are saved. */
1664 if (fdatap
->saved_gpr
>= 0)
1667 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1668 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1670 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = gpr_addr
;
1671 gpr_addr
+= wordsize
;
1675 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1676 All vr's from saved_vr to vr31 are saved. */
1677 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1679 if (fdatap
->saved_vr
>= 0)
1682 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1683 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1685 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1686 vr_addr
+= DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1691 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1692 All vr's from saved_ev to ev31 are saved. ????? */
1693 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
1695 if (fdatap
->saved_ev
>= 0)
1698 CORE_ADDR ev_addr
= frame_addr
+ fdatap
->ev_offset
;
1699 for (i
= fdatap
->saved_ev
; i
< 32; i
++)
1701 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_ev0_regnum
+ i
] = ev_addr
;
1702 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = ev_addr
+ 4;
1703 ev_addr
+= DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_ev0_regnum
);
1708 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1710 if (fdatap
->cr_offset
!= 0)
1711 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1713 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1715 if (fdatap
->lr_offset
!= 0)
1716 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1718 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1720 if (fdatap
->vrsave_offset
!= 0)
1721 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1724 /* Return the address of a frame. This is the inital %sp value when the frame
1725 was first allocated. For functions calling alloca(), it might be saved in
1726 an alloca register. */
1729 frame_initial_stack_address (struct frame_info
*fi
)
1732 struct rs6000_framedata fdata
;
1733 struct frame_info
*callee_fi
;
1735 /* If the initial stack pointer (frame address) of this frame is known,
1738 if (get_frame_extra_info (fi
)->initial_sp
)
1739 return get_frame_extra_info (fi
)->initial_sp
;
1741 /* Find out if this function is using an alloca register. */
1743 (void) skip_prologue (get_frame_func (fi
), get_frame_pc (fi
), &fdata
);
1745 /* If saved registers of this frame are not known yet, read and
1748 if (!deprecated_get_frame_saved_regs (fi
))
1749 frame_get_saved_regs (fi
, &fdata
);
1751 /* If no alloca register used, then fi->frame is the value of the %sp for
1752 this frame, and it is good enough. */
1754 if (fdata
.alloca_reg
< 0)
1756 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1757 return get_frame_extra_info (fi
)->initial_sp
;
1760 /* There is an alloca register, use its value, in the current frame,
1761 as the initial stack pointer. */
1763 char tmpbuf
[MAX_REGISTER_SIZE
];
1764 if (frame_register_read (fi
, fdata
.alloca_reg
, tmpbuf
))
1766 get_frame_extra_info (fi
)->initial_sp
1767 = extract_unsigned_integer (tmpbuf
,
1768 DEPRECATED_REGISTER_RAW_SIZE (fdata
.alloca_reg
));
1771 /* NOTE: cagney/2002-04-17: At present the only time
1772 frame_register_read will fail is when the register isn't
1773 available. If that does happen, use the frame. */
1774 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1776 return get_frame_extra_info (fi
)->initial_sp
;
1779 /* Describe the pointer in each stack frame to the previous stack frame
1782 /* DEPRECATED_FRAME_CHAIN takes a frame's nominal address and produces
1783 the frame's chain-pointer. */
1785 /* In the case of the RS/6000, the frame's nominal address
1786 is the address of a 4-byte word containing the calling frame's address. */
1789 rs6000_frame_chain (struct frame_info
*thisframe
)
1791 CORE_ADDR fp
, fpp
, lr
;
1792 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1794 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (thisframe
),
1795 get_frame_base (thisframe
),
1796 get_frame_base (thisframe
)))
1797 /* A dummy frame always correctly chains back to the previous
1799 return read_memory_addr (get_frame_base (thisframe
), wordsize
);
1801 if (deprecated_inside_entry_file (get_frame_pc (thisframe
))
1802 || get_frame_pc (thisframe
) == entry_point_address ())
1805 if ((get_frame_type (thisframe
) == SIGTRAMP_FRAME
))
1806 fp
= read_memory_addr (get_frame_base (thisframe
) + SIG_FRAME_FP_OFFSET
,
1808 else if (get_next_frame (thisframe
) != NULL
1809 && (get_frame_type (get_next_frame (thisframe
)) == SIGTRAMP_FRAME
)
1810 && (DEPRECATED_FRAMELESS_FUNCTION_INVOCATION_P ()
1811 && DEPRECATED_FRAMELESS_FUNCTION_INVOCATION (thisframe
)))
1812 /* A frameless function interrupted by a signal did not change the
1814 fp
= get_frame_base (thisframe
);
1816 fp
= read_memory_addr (get_frame_base (thisframe
), wordsize
);
1820 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1821 isn't available with that word size, return 0. */
1824 regsize (const struct reg
*reg
, int wordsize
)
1826 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1829 /* Return the name of register number N, or null if no such register exists
1830 in the current architecture. */
1833 rs6000_register_name (int n
)
1835 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1836 const struct reg
*reg
= tdep
->regs
+ n
;
1838 if (!regsize (reg
, tdep
->wordsize
))
1843 /* Index within `registers' of the first byte of the space for
1847 rs6000_register_byte (int n
)
1849 return gdbarch_tdep (current_gdbarch
)->regoff
[n
];
1852 /* Return the number of bytes of storage in the actual machine representation
1853 for register N if that register is available, else return 0. */
1856 rs6000_register_raw_size (int n
)
1858 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1859 const struct reg
*reg
= tdep
->regs
+ n
;
1860 return regsize (reg
, tdep
->wordsize
);
1863 /* Return the GDB type object for the "standard" data type
1864 of data in register N. */
1866 static struct type
*
1867 rs6000_register_virtual_type (int n
)
1869 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1870 const struct reg
*reg
= tdep
->regs
+ n
;
1873 return builtin_type_double
;
1876 int size
= regsize (reg
, tdep
->wordsize
);
1880 return builtin_type_int0
;
1882 return builtin_type_uint32
;
1884 if (tdep
->ppc_ev0_regnum
<= n
&& n
<= tdep
->ppc_ev31_regnum
)
1885 return builtin_type_vec64
;
1887 return builtin_type_uint64
;
1890 return builtin_type_vec128
;
1893 internal_error (__FILE__
, __LINE__
, "Register %d size %d unknown",
1899 /* Return whether register N requires conversion when moving from raw format
1902 The register format for RS/6000 floating point registers is always
1903 double, we need a conversion if the memory format is float. */
1906 rs6000_register_convertible (int n
)
1908 const struct reg
*reg
= gdbarch_tdep (current_gdbarch
)->regs
+ n
;
1912 /* Convert data from raw format for register N in buffer FROM
1913 to virtual format with type TYPE in buffer TO. */
1916 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1917 char *from
, char *to
)
1919 if (TYPE_LENGTH (type
) != DEPRECATED_REGISTER_RAW_SIZE (n
))
1921 double val
= deprecated_extract_floating (from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1922 deprecated_store_floating (to
, TYPE_LENGTH (type
), val
);
1925 memcpy (to
, from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1928 /* Convert data from virtual format with type TYPE in buffer FROM
1929 to raw format for register N in buffer TO. */
1932 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1933 const char *from
, char *to
)
1935 if (TYPE_LENGTH (type
) != DEPRECATED_REGISTER_RAW_SIZE (n
))
1937 double val
= deprecated_extract_floating (from
, TYPE_LENGTH (type
));
1938 deprecated_store_floating (to
, DEPRECATED_REGISTER_RAW_SIZE (n
), val
);
1941 memcpy (to
, from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1945 e500_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1946 int reg_nr
, void *buffer
)
1950 char temp_buffer
[MAX_REGISTER_SIZE
];
1951 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1953 if (reg_nr
>= tdep
->ppc_gp0_regnum
1954 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1956 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1958 /* Build the value in the provided buffer. */
1959 /* Read the raw register of which this one is the lower portion. */
1960 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1961 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1963 memcpy ((char *) buffer
, temp_buffer
+ offset
, 4);
1968 e500_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1969 int reg_nr
, const void *buffer
)
1973 char temp_buffer
[MAX_REGISTER_SIZE
];
1974 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1976 if (reg_nr
>= tdep
->ppc_gp0_regnum
1977 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1979 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1980 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1981 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1984 /* Let's read the value of the base register into a temporary
1985 buffer, so that overwriting the last four bytes with the new
1986 value of the pseudo will leave the upper 4 bytes unchanged. */
1987 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1989 /* Write as an 8 byte quantity. */
1990 memcpy (temp_buffer
+ offset
, (char *) buffer
, 4);
1991 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
1995 /* Convert a dwarf2 register number to a gdb REGNUM. */
1997 e500_dwarf2_reg_to_regnum (int num
)
2000 if (0 <= num
&& num
<= 31)
2001 return num
+ gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
;
2006 /* Convert a dbx stab register number (from `r' declaration) to a gdb
2009 rs6000_stab_reg_to_regnum (int num
)
2015 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
2018 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
2021 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
2024 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
2034 rs6000_store_return_value (struct type
*type
, char *valbuf
)
2036 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2038 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2040 /* Floating point values are returned starting from FPR1 and up.
2041 Say a double_double_double type could be returned in
2042 FPR1/FPR2/FPR3 triple. */
2044 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
2045 TYPE_LENGTH (type
));
2046 else if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
2048 if (TYPE_LENGTH (type
) == 16
2049 && TYPE_VECTOR (type
))
2050 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
2051 valbuf
, TYPE_LENGTH (type
));
2054 /* Everything else is returned in GPR3 and up. */
2055 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
2056 valbuf
, TYPE_LENGTH (type
));
2059 /* Extract from an array REGBUF containing the (raw) register state
2060 the address in which a function should return its structure value,
2061 as a CORE_ADDR (or an expression that can be used as one). */
2064 rs6000_extract_struct_value_address (struct regcache
*regcache
)
2066 /* FIXME: cagney/2002-09-26: PR gdb/724: When making an inferior
2067 function call GDB knows the address of the struct return value
2068 and hence, should not need to call this function. Unfortunately,
2069 the current call_function_by_hand() code only saves the most
2070 recent struct address leading to occasional calls. The code
2071 should instead maintain a stack of such addresses (in the dummy
2073 /* NOTE: cagney/2002-09-26: Return 0 which indicates that we've
2074 really got no idea where the return value is being stored. While
2075 r3, on function entry, contained the address it will have since
2076 been reused (scratch) and hence wouldn't be valid */
2080 /* Hook called when a new child process is started. */
2083 rs6000_create_inferior (int pid
)
2085 if (rs6000_set_host_arch_hook
)
2086 rs6000_set_host_arch_hook (pid
);
2089 /* Support for CONVERT_FROM_FUNC_PTR_ADDR (ARCH, ADDR, TARG).
2091 Usually a function pointer's representation is simply the address
2092 of the function. On the RS/6000 however, a function pointer is
2093 represented by a pointer to a TOC entry. This TOC entry contains
2094 three words, the first word is the address of the function, the
2095 second word is the TOC pointer (r2), and the third word is the
2096 static chain value. Throughout GDB it is currently assumed that a
2097 function pointer contains the address of the function, which is not
2098 easy to fix. In addition, the conversion of a function address to
2099 a function pointer would require allocation of a TOC entry in the
2100 inferior's memory space, with all its drawbacks. To be able to
2101 call C++ virtual methods in the inferior (which are called via
2102 function pointers), find_function_addr uses this function to get the
2103 function address from a function pointer. */
2105 /* Return real function address if ADDR (a function pointer) is in the data
2106 space and is therefore a special function pointer. */
2109 rs6000_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
,
2111 struct target_ops
*targ
)
2113 struct obj_section
*s
;
2115 s
= find_pc_section (addr
);
2116 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
2119 /* ADDR is in the data space, so it's a special function pointer. */
2120 return read_memory_addr (addr
, gdbarch_tdep (current_gdbarch
)->wordsize
);
2124 /* Handling the various POWER/PowerPC variants. */
2127 /* The arrays here called registers_MUMBLE hold information about available
2130 For each family of PPC variants, I've tried to isolate out the
2131 common registers and put them up front, so that as long as you get
2132 the general family right, GDB will correctly identify the registers
2133 common to that family. The common register sets are:
2135 For the 60x family: hid0 hid1 iabr dabr pir
2137 For the 505 and 860 family: eie eid nri
2139 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
2140 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
2143 Most of these register groups aren't anything formal. I arrived at
2144 them by looking at the registers that occurred in more than one
2147 Note: kevinb/2002-04-30: Support for the fpscr register was added
2148 during April, 2002. Slot 70 is being used for PowerPC and slot 71
2149 for Power. For PowerPC, slot 70 was unused and was already in the
2150 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
2151 slot 70 was being used for "mq", so the next available slot (71)
2152 was chosen. It would have been nice to be able to make the
2153 register numbers the same across processor cores, but this wasn't
2154 possible without either 1) renumbering some registers for some
2155 processors or 2) assigning fpscr to a really high slot that's
2156 larger than any current register number. Doing (1) is bad because
2157 existing stubs would break. Doing (2) is undesirable because it
2158 would introduce a really large gap between fpscr and the rest of
2159 the registers for most processors. */
2161 /* Convenience macros for populating register arrays. */
2163 /* Within another macro, convert S to a string. */
2167 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
2168 and 64 bits on 64-bit systems. */
2169 #define R(name) { STR(name), 4, 8, 0, 0 }
2171 /* Return a struct reg defining register NAME that's 32 bits on all
2173 #define R4(name) { STR(name), 4, 4, 0, 0 }
2175 /* Return a struct reg defining register NAME that's 64 bits on all
2177 #define R8(name) { STR(name), 8, 8, 0, 0 }
2179 /* Return a struct reg defining register NAME that's 128 bits on all
2181 #define R16(name) { STR(name), 16, 16, 0, 0 }
2183 /* Return a struct reg defining floating-point register NAME. */
2184 #define F(name) { STR(name), 8, 8, 1, 0 }
2186 /* Return a struct reg defining a pseudo register NAME. */
2187 #define P(name) { STR(name), 4, 8, 0, 1}
2189 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
2190 systems and that doesn't exist on 64-bit systems. */
2191 #define R32(name) { STR(name), 4, 0, 0, 0 }
2193 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
2194 systems and that doesn't exist on 32-bit systems. */
2195 #define R64(name) { STR(name), 0, 8, 0, 0 }
2197 /* Return a struct reg placeholder for a register that doesn't exist. */
2198 #define R0 { 0, 0, 0, 0, 0 }
2200 /* UISA registers common across all architectures, including POWER. */
2202 #define COMMON_UISA_REGS \
2203 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2204 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2205 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2206 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2207 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
2208 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
2209 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
2210 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
2211 /* 64 */ R(pc), R(ps)
2213 #define COMMON_UISA_NOFP_REGS \
2214 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2215 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2216 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2217 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2218 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2219 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2220 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2221 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2222 /* 64 */ R(pc), R(ps)
2224 /* UISA-level SPRs for PowerPC. */
2225 #define PPC_UISA_SPRS \
2226 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
2228 /* UISA-level SPRs for PowerPC without floating point support. */
2229 #define PPC_UISA_NOFP_SPRS \
2230 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
2232 /* Segment registers, for PowerPC. */
2233 #define PPC_SEGMENT_REGS \
2234 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2235 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2236 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2237 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2239 /* OEA SPRs for PowerPC. */
2240 #define PPC_OEA_SPRS \
2242 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2243 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2244 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2245 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2246 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2247 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2248 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2249 /* 116 */ R4(dec), R(dabr), R4(ear)
2251 /* AltiVec registers. */
2252 #define PPC_ALTIVEC_REGS \
2253 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2254 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2255 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2256 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2257 /*151*/R4(vscr), R4(vrsave)
2259 /* Vectors of hi-lo general purpose registers. */
2260 #define PPC_EV_REGS \
2261 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
2262 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
2263 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
2264 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2266 /* Lower half of the EV registers. */
2267 #define PPC_GPRS_PSEUDO_REGS \
2268 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2269 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2270 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2271 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31)
2273 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2274 user-level SPR's. */
2275 static const struct reg registers_power
[] =
2278 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
2282 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2283 view of the PowerPC. */
2284 static const struct reg registers_powerpc
[] =
2291 /* PowerPC UISA - a PPC processor as viewed by user-level
2292 code, but without floating point registers. */
2293 static const struct reg registers_powerpc_nofp
[] =
2295 COMMON_UISA_NOFP_REGS
,
2299 /* IBM PowerPC 403. */
2300 static const struct reg registers_403
[] =
2306 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2307 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2308 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2309 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2310 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2311 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
2314 /* IBM PowerPC 403GC. */
2315 static const struct reg registers_403GC
[] =
2321 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2322 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2323 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2324 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2325 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2326 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2327 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2328 /* 147 */ R(tbhu
), R(tblu
)
2331 /* Motorola PowerPC 505. */
2332 static const struct reg registers_505
[] =
2338 /* 119 */ R(eie
), R(eid
), R(nri
)
2341 /* Motorola PowerPC 860 or 850. */
2342 static const struct reg registers_860
[] =
2348 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2349 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2350 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2351 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2352 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2353 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2354 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2355 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2356 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2357 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2358 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2359 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2362 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2363 for reading and writing RTCU and RTCL. However, how one reads and writes a
2364 register is the stub's problem. */
2365 static const struct reg registers_601
[] =
2371 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2372 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2375 /* Motorola PowerPC 602. */
2376 static const struct reg registers_602
[] =
2382 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2383 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2384 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2387 /* Motorola/IBM PowerPC 603 or 603e. */
2388 static const struct reg registers_603
[] =
2394 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2395 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2396 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2399 /* Motorola PowerPC 604 or 604e. */
2400 static const struct reg registers_604
[] =
2406 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2407 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2408 /* 127 */ R(sia
), R(sda
)
2411 /* Motorola/IBM PowerPC 750 or 740. */
2412 static const struct reg registers_750
[] =
2418 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2419 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2420 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2421 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2422 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2423 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2427 /* Motorola PowerPC 7400. */
2428 static const struct reg registers_7400
[] =
2430 /* gpr0-gpr31, fpr0-fpr31 */
2432 /* ctr, xre, lr, cr */
2437 /* vr0-vr31, vrsave, vscr */
2439 /* FIXME? Add more registers? */
2442 /* Motorola e500. */
2443 static const struct reg registers_e500
[] =
2446 /* cr, lr, ctr, xer, "" */
2450 R8(acc
), R(spefscr
),
2451 /* NOTE: Add new registers here the end of the raw register
2452 list and just before the first pseudo register. */
2454 PPC_GPRS_PSEUDO_REGS
2457 /* Information about a particular processor variant. */
2461 /* Name of this variant. */
2464 /* English description of the variant. */
2467 /* bfd_arch_info.arch corresponding to variant. */
2468 enum bfd_architecture arch
;
2470 /* bfd_arch_info.mach corresponding to variant. */
2473 /* Number of real registers. */
2476 /* Number of pseudo registers. */
2479 /* Number of total registers (the sum of nregs and npregs). */
2482 /* Table of register names; registers[R] is the name of the register
2484 const struct reg
*regs
;
2487 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2490 num_registers (const struct reg
*reg_list
, int num_tot_regs
)
2495 for (i
= 0; i
< num_tot_regs
; i
++)
2496 if (!reg_list
[i
].pseudo
)
2503 num_pseudo_registers (const struct reg
*reg_list
, int num_tot_regs
)
2508 for (i
= 0; i
< num_tot_regs
; i
++)
2509 if (reg_list
[i
].pseudo
)
2515 /* Information in this table comes from the following web sites:
2516 IBM: http://www.chips.ibm.com:80/products/embedded/
2517 Motorola: http://www.mot.com/SPS/PowerPC/
2519 I'm sure I've got some of the variant descriptions not quite right.
2520 Please report any inaccuracies you find to GDB's maintainer.
2522 If you add entries to this table, please be sure to allow the new
2523 value as an argument to the --with-cpu flag, in configure.in. */
2525 static struct variant variants
[] =
2528 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2529 bfd_mach_ppc
, -1, -1, tot_num_registers (registers_powerpc
),
2531 {"power", "POWER user-level", bfd_arch_rs6000
,
2532 bfd_mach_rs6k
, -1, -1, tot_num_registers (registers_power
),
2534 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2535 bfd_mach_ppc_403
, -1, -1, tot_num_registers (registers_403
),
2537 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2538 bfd_mach_ppc_601
, -1, -1, tot_num_registers (registers_601
),
2540 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2541 bfd_mach_ppc_602
, -1, -1, tot_num_registers (registers_602
),
2543 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2544 bfd_mach_ppc_603
, -1, -1, tot_num_registers (registers_603
),
2546 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2547 604, -1, -1, tot_num_registers (registers_604
),
2549 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2550 bfd_mach_ppc_403gc
, -1, -1, tot_num_registers (registers_403GC
),
2552 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2553 bfd_mach_ppc_505
, -1, -1, tot_num_registers (registers_505
),
2555 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2556 bfd_mach_ppc_860
, -1, -1, tot_num_registers (registers_860
),
2558 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2559 bfd_mach_ppc_750
, -1, -1, tot_num_registers (registers_750
),
2561 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2562 bfd_mach_ppc_7400
, -1, -1, tot_num_registers (registers_7400
),
2564 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc
,
2565 bfd_mach_ppc_e500
, -1, -1, tot_num_registers (registers_e500
),
2569 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2570 bfd_mach_ppc64
, -1, -1, tot_num_registers (registers_powerpc
),
2572 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2573 bfd_mach_ppc_620
, -1, -1, tot_num_registers (registers_powerpc
),
2575 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2576 bfd_mach_ppc_630
, -1, -1, tot_num_registers (registers_powerpc
),
2578 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2579 bfd_mach_ppc_a35
, -1, -1, tot_num_registers (registers_powerpc
),
2581 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2582 bfd_mach_ppc_rs64ii
, -1, -1, tot_num_registers (registers_powerpc
),
2584 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2585 bfd_mach_ppc_rs64iii
, -1, -1, tot_num_registers (registers_powerpc
),
2588 /* FIXME: I haven't checked the register sets of the following. */
2589 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2590 bfd_mach_rs6k_rs1
, -1, -1, tot_num_registers (registers_power
),
2592 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2593 bfd_mach_rs6k_rsc
, -1, -1, tot_num_registers (registers_power
),
2595 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2596 bfd_mach_rs6k_rs2
, -1, -1, tot_num_registers (registers_power
),
2599 {0, 0, 0, 0, 0, 0, 0, 0}
2602 /* Initialize the number of registers and pseudo registers in each variant. */
2605 init_variants (void)
2609 for (v
= variants
; v
->name
; v
++)
2612 v
->nregs
= num_registers (v
->regs
, v
->num_tot_regs
);
2613 if (v
->npregs
== -1)
2614 v
->npregs
= num_pseudo_registers (v
->regs
, v
->num_tot_regs
);
2618 /* Return the variant corresponding to architecture ARCH and machine number
2619 MACH. If no such variant exists, return null. */
2621 static const struct variant
*
2622 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2624 const struct variant
*v
;
2626 for (v
= variants
; v
->name
; v
++)
2627 if (arch
== v
->arch
&& mach
== v
->mach
)
2634 gdb_print_insn_powerpc (bfd_vma memaddr
, disassemble_info
*info
)
2636 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2637 return print_insn_big_powerpc (memaddr
, info
);
2639 return print_insn_little_powerpc (memaddr
, info
);
2642 /* Initialize the current architecture based on INFO. If possible, re-use an
2643 architecture from ARCHES, which is a list of architectures already created
2644 during this debugging session.
2646 Called e.g. at program startup, when reading a core file, and when reading
2649 static struct gdbarch
*
2650 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2652 struct gdbarch
*gdbarch
;
2653 struct gdbarch_tdep
*tdep
;
2654 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2656 const struct variant
*v
;
2657 enum bfd_architecture arch
;
2663 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2664 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2666 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2667 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2669 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2671 /* Check word size. If INFO is from a binary file, infer it from
2672 that, else choose a likely default. */
2673 if (from_xcoff_exec
)
2675 if (bfd_xcoff_is_xcoff64 (info
.abfd
))
2680 else if (from_elf_exec
)
2682 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2689 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2690 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2691 info
.bfd_arch_info
->bits_per_byte
;
2696 /* Find a candidate among extant architectures. */
2697 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2699 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2701 /* Word size in the various PowerPC bfd_arch_info structs isn't
2702 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2703 separate word size check. */
2704 tdep
= gdbarch_tdep (arches
->gdbarch
);
2705 if (tdep
&& tdep
->wordsize
== wordsize
)
2706 return arches
->gdbarch
;
2709 /* None found, create a new architecture from INFO, whose bfd_arch_info
2710 validity depends on the source:
2711 - executable useless
2712 - rs6000_host_arch() good
2714 - "set arch" trust blindly
2715 - GDB startup useless but harmless */
2717 if (!from_xcoff_exec
)
2719 arch
= info
.bfd_arch_info
->arch
;
2720 mach
= info
.bfd_arch_info
->mach
;
2724 arch
= bfd_arch_powerpc
;
2725 bfd_default_set_arch_mach (&abfd
, arch
, 0);
2726 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2727 mach
= info
.bfd_arch_info
->mach
;
2729 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2730 tdep
->wordsize
= wordsize
;
2732 /* For e500 executables, the apuinfo section is of help here. Such
2733 section contains the identifier and revision number of each
2734 Application-specific Processing Unit that is present on the
2735 chip. The content of the section is determined by the assembler
2736 which looks at each instruction and determines which unit (and
2737 which version of it) can execute it. In our case we just look for
2738 the existance of the section. */
2742 sect
= bfd_get_section_by_name (info
.abfd
, ".PPC.EMB.apuinfo");
2745 arch
= info
.bfd_arch_info
->arch
;
2746 mach
= bfd_mach_ppc_e500
;
2747 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2748 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2752 gdbarch
= gdbarch_alloc (&info
, tdep
);
2753 power
= arch
== bfd_arch_rs6000
;
2755 /* Initialize the number of real and pseudo registers in each variant. */
2758 /* Choose variant. */
2759 v
= find_variant_by_arch (arch
, mach
);
2763 tdep
->regs
= v
->regs
;
2765 tdep
->ppc_gp0_regnum
= 0;
2766 tdep
->ppc_gplast_regnum
= 31;
2767 tdep
->ppc_toc_regnum
= 2;
2768 tdep
->ppc_ps_regnum
= 65;
2769 tdep
->ppc_cr_regnum
= 66;
2770 tdep
->ppc_lr_regnum
= 67;
2771 tdep
->ppc_ctr_regnum
= 68;
2772 tdep
->ppc_xer_regnum
= 69;
2773 if (v
->mach
== bfd_mach_ppc_601
)
2774 tdep
->ppc_mq_regnum
= 124;
2776 tdep
->ppc_mq_regnum
= 70;
2778 tdep
->ppc_mq_regnum
= -1;
2779 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2781 set_gdbarch_pc_regnum (gdbarch
, 64);
2782 set_gdbarch_sp_regnum (gdbarch
, 1);
2783 set_gdbarch_deprecated_fp_regnum (gdbarch
, 1);
2784 if (sysv_abi
&& wordsize
== 8)
2785 set_gdbarch_return_value (gdbarch
, ppc64_sysv_abi_return_value
);
2786 else if (sysv_abi
&& wordsize
== 4)
2787 set_gdbarch_return_value (gdbarch
, ppc_sysv_abi_return_value
);
2790 set_gdbarch_deprecated_extract_return_value (gdbarch
, rs6000_extract_return_value
);
2791 set_gdbarch_deprecated_store_return_value (gdbarch
, rs6000_store_return_value
);
2794 if (v
->arch
== bfd_arch_powerpc
)
2798 tdep
->ppc_vr0_regnum
= 71;
2799 tdep
->ppc_vrsave_regnum
= 104;
2800 tdep
->ppc_ev0_regnum
= -1;
2801 tdep
->ppc_ev31_regnum
= -1;
2803 case bfd_mach_ppc_7400
:
2804 tdep
->ppc_vr0_regnum
= 119;
2805 tdep
->ppc_vrsave_regnum
= 152;
2806 tdep
->ppc_ev0_regnum
= -1;
2807 tdep
->ppc_ev31_regnum
= -1;
2809 case bfd_mach_ppc_e500
:
2810 tdep
->ppc_gp0_regnum
= 41;
2811 tdep
->ppc_gplast_regnum
= tdep
->ppc_gp0_regnum
+ 32 - 1;
2812 tdep
->ppc_toc_regnum
= -1;
2813 tdep
->ppc_ps_regnum
= 1;
2814 tdep
->ppc_cr_regnum
= 2;
2815 tdep
->ppc_lr_regnum
= 3;
2816 tdep
->ppc_ctr_regnum
= 4;
2817 tdep
->ppc_xer_regnum
= 5;
2818 tdep
->ppc_ev0_regnum
= 7;
2819 tdep
->ppc_ev31_regnum
= 38;
2820 set_gdbarch_pc_regnum (gdbarch
, 0);
2821 set_gdbarch_sp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2822 set_gdbarch_deprecated_fp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2823 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, e500_dwarf2_reg_to_regnum
);
2824 set_gdbarch_pseudo_register_read (gdbarch
, e500_pseudo_register_read
);
2825 set_gdbarch_pseudo_register_write (gdbarch
, e500_pseudo_register_write
);
2828 tdep
->ppc_vr0_regnum
= -1;
2829 tdep
->ppc_vrsave_regnum
= -1;
2830 tdep
->ppc_ev0_regnum
= -1;
2831 tdep
->ppc_ev31_regnum
= -1;
2835 /* Sanity check on registers. */
2836 gdb_assert (strcmp (tdep
->regs
[tdep
->ppc_gp0_regnum
].name
, "r0") == 0);
2838 /* Set lr_frame_offset. */
2840 tdep
->lr_frame_offset
= 16;
2842 tdep
->lr_frame_offset
= 4;
2844 tdep
->lr_frame_offset
= 8;
2846 /* Calculate byte offsets in raw register array. */
2847 tdep
->regoff
= xmalloc (v
->num_tot_regs
* sizeof (int));
2848 for (i
= off
= 0; i
< v
->num_tot_regs
; i
++)
2850 tdep
->regoff
[i
] = off
;
2851 off
+= regsize (v
->regs
+ i
, wordsize
);
2854 /* Select instruction printer. */
2856 set_gdbarch_print_insn (gdbarch
, print_insn_rs6000
);
2858 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_powerpc
);
2860 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2862 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2863 set_gdbarch_num_pseudo_regs (gdbarch
, v
->npregs
);
2864 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2865 set_gdbarch_deprecated_register_size (gdbarch
, wordsize
);
2866 set_gdbarch_deprecated_register_bytes (gdbarch
, off
);
2867 set_gdbarch_deprecated_register_byte (gdbarch
, rs6000_register_byte
);
2868 set_gdbarch_deprecated_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2869 set_gdbarch_deprecated_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2871 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2872 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2873 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2874 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2875 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2876 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2877 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2879 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
2881 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2882 set_gdbarch_char_signed (gdbarch
, 0);
2884 set_gdbarch_frame_align (gdbarch
, rs6000_frame_align
);
2885 if (sysv_abi
&& wordsize
== 8)
2887 set_gdbarch_frame_red_zone_size (gdbarch
, 288);
2888 else if (!sysv_abi
&& wordsize
== 4)
2889 /* PowerOpen / AIX 32 bit. The saved area or red zone consists of
2890 19 4 byte GPRS + 18 8 byte FPRs giving a total of 220 bytes.
2891 Problem is, 220 isn't frame (16 byte) aligned. Round it up to
2893 set_gdbarch_frame_red_zone_size (gdbarch
, 224);
2894 set_gdbarch_deprecated_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2895 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2897 set_gdbarch_deprecated_register_convertible (gdbarch
, rs6000_register_convertible
);
2898 set_gdbarch_deprecated_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2899 set_gdbarch_deprecated_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2900 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2901 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2902 is correct for the SysV ABI when the wordsize is 8, but I'm also
2903 fairly certain that ppc_sysv_abi_push_arguments() will give even
2904 worse results since it only works for 32-bit code. So, for the moment,
2905 we're better off calling rs6000_push_arguments() since it works for
2906 64-bit code. At some point in the future, this matter needs to be
2908 if (sysv_abi
&& wordsize
== 4)
2909 set_gdbarch_push_dummy_call (gdbarch
, ppc_sysv_abi_push_dummy_call
);
2910 else if (sysv_abi
&& wordsize
== 8)
2911 set_gdbarch_push_dummy_call (gdbarch
, ppc64_sysv_abi_push_dummy_call
);
2913 set_gdbarch_push_dummy_call (gdbarch
, rs6000_push_dummy_call
);
2915 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2916 set_gdbarch_deprecated_pop_frame (gdbarch
, rs6000_pop_frame
);
2918 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2919 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2920 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2922 /* Handle the 64-bit SVR4 minimal-symbol convention of using "FN"
2923 for the descriptor and ".FN" for the entry-point -- a user
2924 specifying "break FN" will unexpectedly end up with a breakpoint
2925 on the descriptor and not the function. This architecture method
2926 transforms any breakpoints on descriptors into breakpoints on the
2927 corresponding entry point. */
2928 if (sysv_abi
&& wordsize
== 8)
2929 set_gdbarch_adjust_breakpoint_address (gdbarch
, ppc64_sysv_abi_adjust_breakpoint_address
);
2931 /* Not sure on this. FIXMEmgo */
2932 set_gdbarch_frame_args_skip (gdbarch
, 8);
2935 set_gdbarch_use_struct_convention (gdbarch
,
2936 rs6000_use_struct_convention
);
2938 set_gdbarch_deprecated_frameless_function_invocation (gdbarch
, rs6000_frameless_function_invocation
);
2939 set_gdbarch_deprecated_frame_chain (gdbarch
, rs6000_frame_chain
);
2940 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, rs6000_frame_saved_pc
);
2942 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, rs6000_frame_init_saved_regs
);
2943 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, rs6000_init_extra_frame_info
);
2944 set_gdbarch_deprecated_init_frame_pc_first (gdbarch
, rs6000_init_frame_pc_first
);
2948 /* Handle RS/6000 function pointers (which are really function
2950 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2951 rs6000_convert_from_func_ptr_addr
);
2953 set_gdbarch_deprecated_frame_args_address (gdbarch
, rs6000_frame_args_address
);
2954 set_gdbarch_deprecated_frame_locals_address (gdbarch
, rs6000_frame_args_address
);
2955 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, rs6000_saved_pc_after_call
);
2957 /* Helpers for function argument information. */
2958 set_gdbarch_fetch_pointer_argument (gdbarch
, rs6000_fetch_pointer_argument
);
2960 /* Hook in ABI-specific overrides, if they have been registered. */
2961 gdbarch_init_osabi (info
, gdbarch
);
2963 if (from_xcoff_exec
)
2965 /* NOTE: jimix/2003-06-09: This test should really check for
2966 GDB_OSABI_AIX when that is defined and becomes
2967 available. (Actually, once things are properly split apart,
2968 the test goes away.) */
2969 /* RS6000/AIX does not support PT_STEP. Has to be simulated. */
2970 set_gdbarch_software_single_step (gdbarch
, rs6000_software_single_step
);
2977 rs6000_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2979 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2984 /* FIXME: Dump gdbarch_tdep. */
2987 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
2990 rs6000_info_powerpc_command (char *args
, int from_tty
)
2992 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
2995 /* Initialization code. */
2997 extern initialize_file_ftype _initialize_rs6000_tdep
; /* -Wmissing-prototypes */
3000 _initialize_rs6000_tdep (void)
3002 gdbarch_register (bfd_arch_rs6000
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
3003 gdbarch_register (bfd_arch_powerpc
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
3005 /* Add root prefix command for "info powerpc" commands */
3006 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
3007 "Various POWERPC info specific commands.",
3008 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);