1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
39 #include "libbfd.h" /* for bfd_default_set_arch_mach */
40 #include "coff/internal.h" /* for libcoff.h */
41 #include "libcoff.h" /* for xcoff_data */
42 #include "coff/xcoff.h"
47 #include "solib-svr4.h"
50 #include "gdb_assert.h"
52 /* If the kernel has to deliver a signal, it pushes a sigcontext
53 structure on the stack and then calls the signal handler, passing
54 the address of the sigcontext in an argument register. Usually
55 the signal handler doesn't save this register, so we have to
56 access the sigcontext structure via an offset from the signal handler
58 The following constants were determined by experimentation on AIX 3.2. */
59 #define SIG_FRAME_PC_OFFSET 96
60 #define SIG_FRAME_LR_OFFSET 108
61 #define SIG_FRAME_FP_OFFSET 284
63 /* To be used by skip_prologue. */
65 struct rs6000_framedata
67 int offset
; /* total size of frame --- the distance
68 by which we decrement sp to allocate
70 int saved_gpr
; /* smallest # of saved gpr */
71 int saved_fpr
; /* smallest # of saved fpr */
72 int saved_vr
; /* smallest # of saved vr */
73 int saved_ev
; /* smallest # of saved ev */
74 int alloca_reg
; /* alloca register number (frame ptr) */
75 char frameless
; /* true if frameless functions. */
76 char nosavedpc
; /* true if pc not saved. */
77 int gpr_offset
; /* offset of saved gprs from prev sp */
78 int fpr_offset
; /* offset of saved fprs from prev sp */
79 int vr_offset
; /* offset of saved vrs from prev sp */
80 int ev_offset
; /* offset of saved evs from prev sp */
81 int lr_offset
; /* offset of saved lr */
82 int cr_offset
; /* offset of saved cr */
83 int vrsave_offset
; /* offset of saved vrsave register */
86 /* Description of a single register. */
90 char *name
; /* name of register */
91 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
92 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
93 unsigned char fpr
; /* whether register is floating-point */
94 unsigned char pseudo
; /* whether register is pseudo */
97 /* Breakpoint shadows for the single step instructions will be kept here. */
99 static struct sstep_breaks
101 /* Address, or 0 if this is not in use. */
103 /* Shadow contents. */
108 /* Hook for determining the TOC address when calling functions in the
109 inferior under AIX. The initialization code in rs6000-nat.c sets
110 this hook to point to find_toc_address. */
112 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
114 /* Hook to set the current architecture when starting a child process.
115 rs6000-nat.c sets this. */
117 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
119 /* Static function prototypes */
121 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
123 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
124 struct rs6000_framedata
*);
125 static void frame_get_saved_regs (struct frame_info
* fi
,
126 struct rs6000_framedata
* fdatap
);
127 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
129 /* Is REGNO an AltiVec register? Return 1 if so, 0 otherwise. */
131 altivec_register_p (int regno
)
133 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
134 if (tdep
->ppc_vr0_regnum
< 0 || tdep
->ppc_vrsave_regnum
< 0)
137 return (regno
>= tdep
->ppc_vr0_regnum
&& regno
<= tdep
->ppc_vrsave_regnum
);
140 /* Read a LEN-byte address from debugged memory address MEMADDR. */
143 read_memory_addr (CORE_ADDR memaddr
, int len
)
145 return read_memory_unsigned_integer (memaddr
, len
);
149 rs6000_skip_prologue (CORE_ADDR pc
)
151 struct rs6000_framedata frame
;
152 pc
= skip_prologue (pc
, 0, &frame
);
157 /* Fill in fi->saved_regs */
159 struct frame_extra_info
161 /* Functions calling alloca() change the value of the stack
162 pointer. We need to use initial stack pointer (which is saved in
163 r31 by gcc) in such cases. If a compiler emits traceback table,
164 then we should use the alloca register specified in traceback
166 CORE_ADDR initial_sp
; /* initial stack pointer. */
170 rs6000_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
172 struct frame_extra_info
*extra_info
=
173 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
174 extra_info
->initial_sp
= 0;
175 if (get_next_frame (fi
) != NULL
176 && get_frame_pc (fi
) < TEXT_SEGMENT_BASE
)
177 /* We're in get_prev_frame */
178 /* and this is a special signal frame. */
179 /* (fi->pc will be some low address in the kernel, */
180 /* to which the signal handler returns). */
181 deprecated_set_frame_type (fi
, SIGTRAMP_FRAME
);
184 /* Put here the code to store, into a struct frame_saved_regs,
185 the addresses of the saved registers of frame described by FRAME_INFO.
186 This includes special registers such as pc and fp saved in special
187 ways in the stack frame. sp is even more special:
188 the address we return for it IS the sp for the next frame. */
190 /* In this implementation for RS/6000, we do *not* save sp. I am
191 not sure if it will be needed. The following function takes care of gpr's
195 rs6000_frame_init_saved_regs (struct frame_info
*fi
)
197 frame_get_saved_regs (fi
, NULL
);
201 rs6000_frame_args_address (struct frame_info
*fi
)
203 struct frame_extra_info
*extra_info
= get_frame_extra_info (fi
);
204 if (extra_info
->initial_sp
!= 0)
205 return extra_info
->initial_sp
;
207 return frame_initial_stack_address (fi
);
210 /* Immediately after a function call, return the saved pc.
211 Can't go through the frames for this because on some machines
212 the new frame is not set up until the new function executes
213 some instructions. */
216 rs6000_saved_pc_after_call (struct frame_info
*fi
)
218 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
221 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
224 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
231 absolute
= (int) ((instr
>> 1) & 1);
236 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
240 dest
= pc
+ immediate
;
244 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
248 dest
= pc
+ immediate
;
252 ext_op
= (instr
>> 1) & 0x3ff;
254 if (ext_op
== 16) /* br conditional register */
256 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
258 /* If we are about to return from a signal handler, dest is
259 something like 0x3c90. The current frame is a signal handler
260 caller frame, upon completion of the sigreturn system call
261 execution will return to the saved PC in the frame. */
262 if (dest
< TEXT_SEGMENT_BASE
)
264 struct frame_info
*fi
;
266 fi
= get_current_frame ();
268 dest
= read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
269 gdbarch_tdep (current_gdbarch
)->wordsize
);
273 else if (ext_op
== 528) /* br cond to count reg */
275 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
277 /* If we are about to execute a system call, dest is something
278 like 0x22fc or 0x3b00. Upon completion the system call
279 will return to the address in the link register. */
280 if (dest
< TEXT_SEGMENT_BASE
)
281 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
290 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
294 /* Sequence of bytes for breakpoint instruction. */
296 #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
297 #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
299 const static unsigned char *
300 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
302 static unsigned char big_breakpoint
[] = BIG_BREAKPOINT
;
303 static unsigned char little_breakpoint
[] = LITTLE_BREAKPOINT
;
305 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
306 return big_breakpoint
;
308 return little_breakpoint
;
312 /* AIX does not support PT_STEP. Simulate it. */
315 rs6000_software_single_step (enum target_signal signal
,
316 int insert_breakpoints_p
)
320 const char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
326 if (insert_breakpoints_p
)
331 insn
= read_memory_integer (loc
, 4);
333 breaks
[0] = loc
+ breakp_sz
;
335 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
337 /* Don't put two breakpoints on the same address. */
338 if (breaks
[1] == breaks
[0])
341 stepBreaks
[1].address
= 0;
343 for (ii
= 0; ii
< 2; ++ii
)
346 /* ignore invalid breakpoint. */
347 if (breaks
[ii
] == -1)
349 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
350 stepBreaks
[ii
].address
= breaks
[ii
];
357 /* remove step breakpoints. */
358 for (ii
= 0; ii
< 2; ++ii
)
359 if (stepBreaks
[ii
].address
!= 0)
360 target_remove_breakpoint (stepBreaks
[ii
].address
,
361 stepBreaks
[ii
].data
);
363 errno
= 0; /* FIXME, don't ignore errors! */
364 /* What errors? {read,write}_memory call error(). */
368 /* return pc value after skipping a function prologue and also return
369 information about a function frame.
371 in struct rs6000_framedata fdata:
372 - frameless is TRUE, if function does not have a frame.
373 - nosavedpc is TRUE, if function does not save %pc value in its frame.
374 - offset is the initial size of this stack frame --- the amount by
375 which we decrement the sp to allocate the frame.
376 - saved_gpr is the number of the first saved gpr.
377 - saved_fpr is the number of the first saved fpr.
378 - saved_vr is the number of the first saved vr.
379 - saved_ev is the number of the first saved ev.
380 - alloca_reg is the number of the register used for alloca() handling.
382 - gpr_offset is the offset of the first saved gpr from the previous frame.
383 - fpr_offset is the offset of the first saved fpr from the previous frame.
384 - vr_offset is the offset of the first saved vr from the previous frame.
385 - ev_offset is the offset of the first saved ev from the previous frame.
386 - lr_offset is the offset of the saved lr
387 - cr_offset is the offset of the saved cr
388 - vrsave_offset is the offset of the saved vrsave register
391 #define SIGNED_SHORT(x) \
392 ((sizeof (short) == 2) \
393 ? ((int)(short)(x)) \
394 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
396 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
398 /* Limit the number of skipped non-prologue instructions, as the examining
399 of the prologue is expensive. */
400 static int max_skip_non_prologue_insns
= 10;
402 /* Given PC representing the starting address of a function, and
403 LIM_PC which is the (sloppy) limit to which to scan when looking
404 for a prologue, attempt to further refine this limit by using
405 the line data in the symbol table. If successful, a better guess
406 on where the prologue ends is returned, otherwise the previous
407 value of lim_pc is returned. */
409 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
411 struct symtab_and_line prologue_sal
;
413 prologue_sal
= find_pc_line (pc
, 0);
414 if (prologue_sal
.line
!= 0)
417 CORE_ADDR addr
= prologue_sal
.end
;
419 /* Handle the case in which compiler's optimizer/scheduler
420 has moved instructions into the prologue. We scan ahead
421 in the function looking for address ranges whose corresponding
422 line number is less than or equal to the first one that we
423 found for the function. (It can be less than when the
424 scheduler puts a body instruction before the first prologue
426 for (i
= 2 * max_skip_non_prologue_insns
;
427 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
430 struct symtab_and_line sal
;
432 sal
= find_pc_line (addr
, 0);
435 if (sal
.line
<= prologue_sal
.line
436 && sal
.symtab
== prologue_sal
.symtab
)
443 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
444 lim_pc
= prologue_sal
.end
;
451 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
453 CORE_ADDR orig_pc
= pc
;
454 CORE_ADDR last_prologue_pc
= pc
;
455 CORE_ADDR li_found_pc
= 0;
459 long vr_saved_offset
= 0;
468 int minimal_toc_loaded
= 0;
469 int prev_insn_was_prologue_insn
= 1;
470 int num_skip_non_prologue_insns
= 0;
471 const struct bfd_arch_info
*arch_info
= gdbarch_bfd_arch_info (current_gdbarch
);
472 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
474 /* Attempt to find the end of the prologue when no limit is specified.
475 Note that refine_prologue_limit() has been written so that it may
476 be used to "refine" the limits of non-zero PC values too, but this
477 is only safe if we 1) trust the line information provided by the
478 compiler and 2) iterate enough to actually find the end of the
481 It may become a good idea at some point (for both performance and
482 accuracy) to unconditionally call refine_prologue_limit(). But,
483 until we can make a clear determination that this is beneficial,
484 we'll play it safe and only use it to obtain a limit when none
485 has been specified. */
487 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
489 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
490 fdata
->saved_gpr
= -1;
491 fdata
->saved_fpr
= -1;
492 fdata
->saved_vr
= -1;
493 fdata
->saved_ev
= -1;
494 fdata
->alloca_reg
= -1;
495 fdata
->frameless
= 1;
496 fdata
->nosavedpc
= 1;
500 /* Sometimes it isn't clear if an instruction is a prologue
501 instruction or not. When we encounter one of these ambiguous
502 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
503 Otherwise, we'll assume that it really is a prologue instruction. */
504 if (prev_insn_was_prologue_insn
)
505 last_prologue_pc
= pc
;
507 /* Stop scanning if we've hit the limit. */
508 if (lim_pc
!= 0 && pc
>= lim_pc
)
511 prev_insn_was_prologue_insn
= 1;
513 /* Fetch the instruction and convert it to an integer. */
514 if (target_read_memory (pc
, buf
, 4))
516 op
= extract_signed_integer (buf
, 4);
518 if ((op
& 0xfc1fffff) == 0x7c0802a6)
520 lr_reg
= (op
& 0x03e00000) | 0x90010000;
524 else if ((op
& 0xfc1fffff) == 0x7c000026)
526 cr_reg
= (op
& 0x03e00000) | 0x90010000;
530 else if ((op
& 0xfc1f0000) == 0xd8010000)
531 { /* stfd Rx,NUM(r1) */
532 reg
= GET_SRC_REG (op
);
533 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
535 fdata
->saved_fpr
= reg
;
536 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
541 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
542 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
543 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
544 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
547 reg
= GET_SRC_REG (op
);
548 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
550 fdata
->saved_gpr
= reg
;
551 if ((op
& 0xfc1f0003) == 0xf8010000)
553 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
558 else if ((op
& 0xffff0000) == 0x60000000)
561 /* Allow nops in the prologue, but do not consider them to
562 be part of the prologue unless followed by other prologue
564 prev_insn_was_prologue_insn
= 0;
568 else if ((op
& 0xffff0000) == 0x3c000000)
569 { /* addis 0,0,NUM, used
571 fdata
->offset
= (op
& 0x0000ffff) << 16;
572 fdata
->frameless
= 0;
576 else if ((op
& 0xffff0000) == 0x60000000)
577 { /* ori 0,0,NUM, 2nd ha
578 lf of >= 32k frames */
579 fdata
->offset
|= (op
& 0x0000ffff);
580 fdata
->frameless
= 0;
584 else if (lr_reg
!= -1 && (op
& 0xffff0000) == lr_reg
)
587 fdata
->lr_offset
= SIGNED_SHORT (op
) + offset
;
588 fdata
->nosavedpc
= 0;
593 else if (cr_reg
!= -1 && (op
& 0xffff0000) == cr_reg
)
596 fdata
->cr_offset
= SIGNED_SHORT (op
) + offset
;
601 else if (op
== 0x48000005)
607 else if (op
== 0x48000004)
612 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
613 in V.4 -mminimal-toc */
614 (op
& 0xffff0000) == 0x3bde0000)
615 { /* addi 30,30,foo@l */
619 else if ((op
& 0xfc000001) == 0x48000001)
623 fdata
->frameless
= 0;
624 /* Don't skip over the subroutine call if it is not within
625 the first three instructions of the prologue. */
626 if ((pc
- orig_pc
) > 8)
629 op
= read_memory_integer (pc
+ 4, 4);
631 /* At this point, make sure this is not a trampoline
632 function (a function that simply calls another functions,
633 and nothing else). If the next is not a nop, this branch
634 was part of the function prologue. */
636 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
637 break; /* don't skip over
641 /* update stack pointer */
643 else if ((op
& 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
644 (op
& 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
646 fdata
->frameless
= 0;
647 if ((op
& 0xffff0003) == 0xf8210001)
649 fdata
->offset
= SIGNED_SHORT (op
);
650 offset
= fdata
->offset
;
654 else if (op
== 0x7c21016e)
656 fdata
->frameless
= 0;
657 offset
= fdata
->offset
;
660 /* Load up minimal toc pointer */
662 else if ((op
>> 22) == 0x20f
663 && !minimal_toc_loaded
)
664 { /* l r31,... or l r30,... */
665 minimal_toc_loaded
= 1;
668 /* move parameters from argument registers to local variable
671 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
672 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
673 (((op
>> 21) & 31) <= 10) &&
674 ((long) ((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
678 /* store parameters in stack */
680 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
681 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
682 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
686 /* store parameters in stack via frame pointer */
689 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
690 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
691 (op
& 0xfc1f0000) == 0xfc1f0000))
692 { /* frsp, fp?,NUM(r1) */
695 /* Set up frame pointer */
697 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
700 fdata
->frameless
= 0;
702 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
+ 31);
705 /* Another way to set up the frame pointer. */
707 else if ((op
& 0xfc1fffff) == 0x38010000)
708 { /* addi rX, r1, 0x0 */
709 fdata
->frameless
= 0;
711 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
712 + ((op
& ~0x38010000) >> 21));
715 /* AltiVec related instructions. */
716 /* Store the vrsave register (spr 256) in another register for
717 later manipulation, or load a register into the vrsave
718 register. 2 instructions are used: mfvrsave and
719 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
720 and mtspr SPR256, Rn. */
721 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
722 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
723 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
725 vrsave_reg
= GET_SRC_REG (op
);
728 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
732 /* Store the register where vrsave was saved to onto the stack:
733 rS is the register where vrsave was stored in a previous
735 /* 100100 sssss 00001 dddddddd dddddddd */
736 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
738 if (vrsave_reg
== GET_SRC_REG (op
))
740 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
745 /* Compute the new value of vrsave, by modifying the register
746 where vrsave was saved to. */
747 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
748 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
752 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
753 in a pair of insns to save the vector registers on the
755 /* 001110 00000 00000 iiii iiii iiii iiii */
756 /* 001110 01110 00000 iiii iiii iiii iiii */
757 else if ((op
& 0xffff0000) == 0x38000000 /* li r0, SIMM */
758 || (op
& 0xffff0000) == 0x39c00000) /* li r14, SIMM */
761 vr_saved_offset
= SIGNED_SHORT (op
);
763 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
764 /* 011111 sssss 11111 00000 00111001110 */
765 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
767 if (pc
== (li_found_pc
+ 4))
769 vr_reg
= GET_SRC_REG (op
);
770 /* If this is the first vector reg to be saved, or if
771 it has a lower number than others previously seen,
772 reupdate the frame info. */
773 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
775 fdata
->saved_vr
= vr_reg
;
776 fdata
->vr_offset
= vr_saved_offset
+ offset
;
778 vr_saved_offset
= -1;
783 /* End AltiVec related instructions. */
785 /* Start BookE related instructions. */
786 /* Store gen register S at (r31+uimm).
787 Any register less than r13 is volatile, so we don't care. */
788 /* 000100 sssss 11111 iiiii 01100100001 */
789 else if (arch_info
->mach
== bfd_mach_ppc_e500
790 && (op
& 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
792 if ((op
& 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
795 ev_reg
= GET_SRC_REG (op
);
796 imm
= (op
>> 11) & 0x1f;
798 /* If this is the first vector reg to be saved, or if
799 it has a lower number than others previously seen,
800 reupdate the frame info. */
801 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
803 fdata
->saved_ev
= ev_reg
;
804 fdata
->ev_offset
= ev_offset
+ offset
;
809 /* Store gen register rS at (r1+rB). */
810 /* 000100 sssss 00001 bbbbb 01100100000 */
811 else if (arch_info
->mach
== bfd_mach_ppc_e500
812 && (op
& 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
814 if (pc
== (li_found_pc
+ 4))
816 ev_reg
= GET_SRC_REG (op
);
817 /* If this is the first vector reg to be saved, or if
818 it has a lower number than others previously seen,
819 reupdate the frame info. */
820 /* We know the contents of rB from the previous instruction. */
821 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
823 fdata
->saved_ev
= ev_reg
;
824 fdata
->ev_offset
= vr_saved_offset
+ offset
;
826 vr_saved_offset
= -1;
832 /* Store gen register r31 at (rA+uimm). */
833 /* 000100 11111 aaaaa iiiii 01100100001 */
834 else if (arch_info
->mach
== bfd_mach_ppc_e500
835 && (op
& 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
837 /* Wwe know that the source register is 31 already, but
838 it can't hurt to compute it. */
839 ev_reg
= GET_SRC_REG (op
);
840 ev_offset
= ((op
>> 11) & 0x1f) * 8;
841 /* If this is the first vector reg to be saved, or if
842 it has a lower number than others previously seen,
843 reupdate the frame info. */
844 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
846 fdata
->saved_ev
= ev_reg
;
847 fdata
->ev_offset
= ev_offset
+ offset
;
852 /* Store gen register S at (r31+r0).
853 Store param on stack when offset from SP bigger than 4 bytes. */
854 /* 000100 sssss 11111 00000 01100100000 */
855 else if (arch_info
->mach
== bfd_mach_ppc_e500
856 && (op
& 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
858 if (pc
== (li_found_pc
+ 4))
860 if ((op
& 0x03e00000) >= 0x01a00000)
862 ev_reg
= GET_SRC_REG (op
);
863 /* If this is the first vector reg to be saved, or if
864 it has a lower number than others previously seen,
865 reupdate the frame info. */
866 /* We know the contents of r0 from the previous
868 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
870 fdata
->saved_ev
= ev_reg
;
871 fdata
->ev_offset
= vr_saved_offset
+ offset
;
875 vr_saved_offset
= -1;
880 /* End BookE related instructions. */
884 /* Not a recognized prologue instruction.
885 Handle optimizer code motions into the prologue by continuing
886 the search if we have no valid frame yet or if the return
887 address is not yet saved in the frame. */
888 if (fdata
->frameless
== 0
889 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
892 if (op
== 0x4e800020 /* blr */
893 || op
== 0x4e800420) /* bctr */
894 /* Do not scan past epilogue in frameless functions or
897 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
898 /* Never skip branches. */
901 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
902 /* Do not scan too many insns, scanning insns is expensive with
906 /* Continue scanning. */
907 prev_insn_was_prologue_insn
= 0;
913 /* I have problems with skipping over __main() that I need to address
914 * sometime. Previously, I used to use misc_function_vector which
915 * didn't work as well as I wanted to be. -MGO */
917 /* If the first thing after skipping a prolog is a branch to a function,
918 this might be a call to an initializer in main(), introduced by gcc2.
919 We'd like to skip over it as well. Fortunately, xlc does some extra
920 work before calling a function right after a prologue, thus we can
921 single out such gcc2 behaviour. */
924 if ((op
& 0xfc000001) == 0x48000001)
925 { /* bl foo, an initializer function? */
926 op
= read_memory_integer (pc
+ 4, 4);
928 if (op
== 0x4def7b82)
929 { /* cror 0xf, 0xf, 0xf (nop) */
931 /* Check and see if we are in main. If so, skip over this
932 initializer function as well. */
934 tmp
= find_pc_misc_function (pc
);
935 if (tmp
>= 0 && STREQ (misc_function_vector
[tmp
].name
, main_name ()))
941 fdata
->offset
= -fdata
->offset
;
942 return last_prologue_pc
;
946 /*************************************************************************
947 Support for creating pushing a dummy frame into the stack, and popping
949 *************************************************************************/
952 /* Pop the innermost frame, go back to the caller. */
955 rs6000_pop_frame (void)
957 CORE_ADDR pc
, lr
, sp
, prev_sp
, addr
; /* %pc, %lr, %sp */
958 struct rs6000_framedata fdata
;
959 struct frame_info
*frame
= get_current_frame ();
963 sp
= get_frame_base (frame
);
965 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
966 get_frame_base (frame
),
967 get_frame_base (frame
)))
969 generic_pop_dummy_frame ();
970 flush_cached_frames ();
974 /* Make sure that all registers are valid. */
975 deprecated_read_register_bytes (0, NULL
, REGISTER_BYTES
);
977 /* Figure out previous %pc value. If the function is frameless, it is
978 still in the link register, otherwise walk the frames and retrieve the
979 saved %pc value in the previous frame. */
981 addr
= get_pc_function_start (get_frame_pc (frame
));
982 (void) skip_prologue (addr
, get_frame_pc (frame
), &fdata
);
984 wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
988 prev_sp
= read_memory_addr (sp
, wordsize
);
989 if (fdata
.lr_offset
== 0)
990 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
992 lr
= read_memory_addr (prev_sp
+ fdata
.lr_offset
, wordsize
);
994 /* reset %pc value. */
995 write_register (PC_REGNUM
, lr
);
997 /* reset register values if any was saved earlier. */
999 if (fdata
.saved_gpr
!= -1)
1001 addr
= prev_sp
+ fdata
.gpr_offset
;
1002 for (ii
= fdata
.saved_gpr
; ii
<= 31; ++ii
)
1004 read_memory (addr
, &deprecated_registers
[REGISTER_BYTE (ii
)],
1010 if (fdata
.saved_fpr
!= -1)
1012 addr
= prev_sp
+ fdata
.fpr_offset
;
1013 for (ii
= fdata
.saved_fpr
; ii
<= 31; ++ii
)
1015 read_memory (addr
, &deprecated_registers
[REGISTER_BYTE (ii
+ FP0_REGNUM
)], 8);
1020 write_register (SP_REGNUM
, prev_sp
);
1021 target_store_registers (-1);
1022 flush_cached_frames ();
1025 /* Fixup the call sequence of a dummy function, with the real function
1026 address. Its arguments will be passed by gdb. */
1029 rs6000_fix_call_dummy (char *dummyname
, CORE_ADDR pc
, CORE_ADDR fun
,
1030 int nargs
, struct value
**args
, struct type
*type
,
1034 CORE_ADDR target_addr
;
1036 if (rs6000_find_toc_address_hook
!= NULL
)
1038 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (fun
);
1039 write_register (gdbarch_tdep (current_gdbarch
)->ppc_toc_regnum
,
1044 /* All the ABI's require 16 byte alignment. */
1046 rs6000_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1048 return (addr
& -16);
1051 /* Pass the arguments in either registers, or in the stack. In RS/6000,
1052 the first eight words of the argument list (that might be less than
1053 eight parameters if some parameters occupy more than one word) are
1054 passed in r3..r10 registers. float and double parameters are
1055 passed in fpr's, in addition to that. Rest of the parameters if any
1056 are passed in user stack. There might be cases in which half of the
1057 parameter is copied into registers, the other half is pushed into
1060 Stack must be aligned on 64-bit boundaries when synthesizing
1063 If the function is returning a structure, then the return address is passed
1064 in r3, then the first 7 words of the parameters can be passed in registers,
1065 starting from r4. */
1068 rs6000_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1069 int struct_return
, CORE_ADDR struct_addr
)
1073 int argno
; /* current argument number */
1074 int argbytes
; /* current argument byte */
1075 char tmp_buffer
[50];
1076 int f_argno
= 0; /* current floating point argno */
1077 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1079 struct value
*arg
= 0;
1084 /* The first eight words of ther arguments are passed in registers.
1085 Copy them appropriately.
1087 If the function is returning a `struct', then the first word (which
1088 will be passed in r3) is used for struct return address. In that
1089 case we should advance one word and start from r4 register to copy
1092 ii
= struct_return
? 1 : 0;
1095 effectively indirect call... gcc does...
1097 return_val example( float, int);
1100 float in fp0, int in r3
1101 offset of stack on overflow 8/16
1102 for varargs, must go by type.
1104 float in r3&r4, int in r5
1105 offset of stack on overflow different
1107 return in r3 or f0. If no float, must study how gcc emulates floats;
1108 pay attention to arg promotion.
1109 User may have to cast\args to handle promotion correctly
1110 since gdb won't know if prototype supplied or not.
1113 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
1115 int reg_size
= REGISTER_RAW_SIZE (ii
+ 3);
1118 type
= check_typedef (VALUE_TYPE (arg
));
1119 len
= TYPE_LENGTH (type
);
1121 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1124 /* Floating point arguments are passed in fpr's, as well as gpr's.
1125 There are 13 fpr's reserved for passing parameters. At this point
1126 there is no way we would run out of them. */
1130 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1132 memcpy (&deprecated_registers
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1133 VALUE_CONTENTS (arg
),
1141 /* Argument takes more than one register. */
1142 while (argbytes
< len
)
1144 memset (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)], 0,
1146 memcpy (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)],
1147 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1148 (len
- argbytes
) > reg_size
1149 ? reg_size
: len
- argbytes
);
1150 ++ii
, argbytes
+= reg_size
;
1153 goto ran_out_of_registers_for_arguments
;
1160 /* Argument can fit in one register. No problem. */
1161 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1162 memset (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1163 memcpy ((char *)&deprecated_registers
[REGISTER_BYTE (ii
+ 3)] + adj
,
1164 VALUE_CONTENTS (arg
), len
);
1169 ran_out_of_registers_for_arguments
:
1171 saved_sp
= read_sp ();
1173 /* Location for 8 parameters are always reserved. */
1176 /* Another six words for back chain, TOC register, link register, etc. */
1179 /* Stack pointer must be quadword aligned. */
1182 /* If there are more arguments, allocate space for them in
1183 the stack, then push them starting from the ninth one. */
1185 if ((argno
< nargs
) || argbytes
)
1191 space
+= ((len
- argbytes
+ 3) & -4);
1197 for (; jj
< nargs
; ++jj
)
1199 struct value
*val
= args
[jj
];
1200 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1203 /* Add location required for the rest of the parameters. */
1204 space
= (space
+ 15) & -16;
1207 /* This is another instance we need to be concerned about
1208 securing our stack space. If we write anything underneath %sp
1209 (r1), we might conflict with the kernel who thinks he is free
1210 to use this area. So, update %sp first before doing anything
1213 write_register (SP_REGNUM
, sp
);
1215 /* If the last argument copied into the registers didn't fit there
1216 completely, push the rest of it into stack. */
1220 write_memory (sp
+ 24 + (ii
* 4),
1221 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1224 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1227 /* Push the rest of the arguments into stack. */
1228 for (; argno
< nargs
; ++argno
)
1232 type
= check_typedef (VALUE_TYPE (arg
));
1233 len
= TYPE_LENGTH (type
);
1236 /* Float types should be passed in fpr's, as well as in the
1238 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1243 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1245 memcpy (&deprecated_registers
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1246 VALUE_CONTENTS (arg
),
1251 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1252 ii
+= ((len
+ 3) & -4) / 4;
1256 /* Secure stack areas first, before doing anything else. */
1257 write_register (SP_REGNUM
, sp
);
1259 /* set back chain properly */
1260 store_address (tmp_buffer
, 4, saved_sp
);
1261 write_memory (sp
, tmp_buffer
, 4);
1263 target_store_registers (-1);
1267 /* Function: ppc_push_return_address (pc, sp)
1268 Set up the return address for the inferior function call. */
1271 ppc_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1273 write_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
,
1274 CALL_DUMMY_ADDRESS ());
1278 /* Extract a function return value of type TYPE from raw register array
1279 REGBUF, and copy that return value into VALBUF in virtual format. */
1281 e500_extract_return_value (struct type
*valtype
, struct regcache
*regbuf
, void *valbuf
)
1284 int vallen
= TYPE_LENGTH (valtype
);
1285 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1287 if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1289 && TYPE_VECTOR (valtype
))
1291 regcache_raw_read (regbuf
, tdep
->ppc_ev0_regnum
+ 3, valbuf
);
1295 /* Return value is copied starting from r3. Note that r3 for us
1296 is a pseudo register. */
1298 int return_regnum
= tdep
->ppc_gp0_regnum
+ 3;
1299 int reg_size
= REGISTER_RAW_SIZE (return_regnum
);
1305 /* Compute where we will start storing the value from. */
1306 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1308 if (vallen
<= reg_size
)
1309 offset
= reg_size
- vallen
;
1311 offset
= reg_size
+ (reg_size
- vallen
);
1314 /* How big does the local buffer need to be? */
1315 if (vallen
<= reg_size
)
1316 val_buffer
= alloca (reg_size
);
1318 val_buffer
= alloca (vallen
);
1320 /* Read all we need into our private buffer. We copy it in
1321 chunks that are as long as one register, never shorter, even
1322 if the value is smaller than the register. */
1323 while (copied
< vallen
)
1325 reg_part_size
= REGISTER_RAW_SIZE (return_regnum
+ i
);
1326 /* It is a pseudo/cooked register. */
1327 regcache_cooked_read (regbuf
, return_regnum
+ i
,
1328 val_buffer
+ copied
);
1329 copied
+= reg_part_size
;
1332 /* Put the stuff in the return buffer. */
1333 memcpy (valbuf
, val_buffer
+ offset
, vallen
);
1338 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1341 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1343 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1348 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1349 We need to truncate the return value into float size (4 byte) if
1352 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1354 ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)],
1355 TYPE_LENGTH (valtype
));
1358 memcpy (&dd
, ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1360 memcpy (valbuf
, &ff
, sizeof (float));
1363 else if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1364 && TYPE_LENGTH (valtype
) == 16
1365 && TYPE_VECTOR (valtype
))
1367 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1368 TYPE_LENGTH (valtype
));
1372 /* return value is copied starting from r3. */
1373 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1374 && TYPE_LENGTH (valtype
) < REGISTER_RAW_SIZE (3))
1375 offset
= REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1378 regbuf
+ REGISTER_BYTE (3) + offset
,
1379 TYPE_LENGTH (valtype
));
1383 /* Return whether handle_inferior_event() should proceed through code
1384 starting at PC in function NAME when stepping.
1386 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1387 handle memory references that are too distant to fit in instructions
1388 generated by the compiler. For example, if 'foo' in the following
1393 is greater than 32767, the linker might replace the lwz with a branch to
1394 somewhere in @FIX1 that does the load in 2 instructions and then branches
1395 back to where execution should continue.
1397 GDB should silently step over @FIX code, just like AIX dbx does.
1398 Unfortunately, the linker uses the "b" instruction for the branches,
1399 meaning that the link register doesn't get set. Therefore, GDB's usual
1400 step_over_function() mechanism won't work.
1402 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1403 in handle_inferior_event() to skip past @FIX code. */
1406 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1408 return name
&& !strncmp (name
, "@FIX", 4);
1411 /* Skip code that the user doesn't want to see when stepping:
1413 1. Indirect function calls use a piece of trampoline code to do context
1414 switching, i.e. to set the new TOC table. Skip such code if we are on
1415 its first instruction (as when we have single-stepped to here).
1417 2. Skip shared library trampoline code (which is different from
1418 indirect function call trampolines).
1420 3. Skip bigtoc fixup code.
1422 Result is desired PC to step until, or NULL if we are not in
1423 code that should be skipped. */
1426 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1428 register unsigned int ii
, op
;
1430 CORE_ADDR solib_target_pc
;
1431 struct minimal_symbol
*msymbol
;
1433 static unsigned trampoline_code
[] =
1435 0x800b0000, /* l r0,0x0(r11) */
1436 0x90410014, /* st r2,0x14(r1) */
1437 0x7c0903a6, /* mtctr r0 */
1438 0x804b0004, /* l r2,0x4(r11) */
1439 0x816b0008, /* l r11,0x8(r11) */
1440 0x4e800420, /* bctr */
1441 0x4e800020, /* br */
1445 /* Check for bigtoc fixup code. */
1446 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1447 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, DEPRECATED_SYMBOL_NAME (msymbol
)))
1449 /* Double-check that the third instruction from PC is relative "b". */
1450 op
= read_memory_integer (pc
+ 8, 4);
1451 if ((op
& 0xfc000003) == 0x48000000)
1453 /* Extract bits 6-29 as a signed 24-bit relative word address and
1454 add it to the containing PC. */
1455 rel
= ((int)(op
<< 6) >> 6);
1456 return pc
+ 8 + rel
;
1460 /* If pc is in a shared library trampoline, return its target. */
1461 solib_target_pc
= find_solib_trampoline_target (pc
);
1462 if (solib_target_pc
)
1463 return solib_target_pc
;
1465 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1467 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1468 if (op
!= trampoline_code
[ii
])
1471 ii
= read_register (11); /* r11 holds destination addr */
1472 pc
= read_memory_addr (ii
, gdbarch_tdep (current_gdbarch
)->wordsize
); /* (r11) value */
1476 /* Determines whether the function FI has a frame on the stack or not. */
1479 rs6000_frameless_function_invocation (struct frame_info
*fi
)
1481 CORE_ADDR func_start
;
1482 struct rs6000_framedata fdata
;
1484 /* Don't even think about framelessness except on the innermost frame
1485 or if the function was interrupted by a signal. */
1486 if (get_next_frame (fi
) != NULL
1487 && !(get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1490 func_start
= get_pc_function_start (get_frame_pc (fi
));
1492 /* If we failed to find the start of the function, it is a mistake
1493 to inspect the instructions. */
1497 /* A frame with a zero PC is usually created by dereferencing a NULL
1498 function pointer, normally causing an immediate core dump of the
1499 inferior. Mark function as frameless, as the inferior has no chance
1500 of setting up a stack frame. */
1501 if (get_frame_pc (fi
) == 0)
1507 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1508 return fdata
.frameless
;
1511 /* Return the PC saved in a frame. */
1514 rs6000_frame_saved_pc (struct frame_info
*fi
)
1516 CORE_ADDR func_start
;
1517 struct rs6000_framedata fdata
;
1518 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1519 int wordsize
= tdep
->wordsize
;
1521 if ((get_frame_type (fi
) == SIGTRAMP_FRAME
))
1522 return read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
1525 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1526 get_frame_base (fi
),
1527 get_frame_base (fi
)))
1528 return deprecated_read_register_dummy (get_frame_pc (fi
),
1529 get_frame_base (fi
), PC_REGNUM
);
1531 func_start
= get_pc_function_start (get_frame_pc (fi
));
1533 /* If we failed to find the start of the function, it is a mistake
1534 to inspect the instructions. */
1538 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1540 if (fdata
.lr_offset
== 0 && get_next_frame (fi
) != NULL
)
1542 if ((get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1543 return read_memory_addr ((get_frame_base (get_next_frame (fi
))
1544 + SIG_FRAME_LR_OFFSET
),
1546 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1547 /* The link register wasn't saved by this frame and the next
1548 (inner, newer) frame is a dummy. Get the link register
1549 value by unwinding it from that [dummy] frame. */
1552 frame_unwind_unsigned_register (get_next_frame (fi
),
1553 tdep
->ppc_lr_regnum
, &lr
);
1557 return read_memory_addr (FRAME_CHAIN (fi
) + tdep
->lr_frame_offset
,
1561 if (fdata
.lr_offset
== 0)
1562 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1564 return read_memory_addr (FRAME_CHAIN (fi
) + fdata
.lr_offset
, wordsize
);
1567 /* If saved registers of frame FI are not known yet, read and cache them.
1568 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1569 in which case the framedata are read. */
1572 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1574 CORE_ADDR frame_addr
;
1575 struct rs6000_framedata work_fdata
;
1576 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1577 int wordsize
= tdep
->wordsize
;
1579 if (get_frame_saved_regs (fi
))
1584 fdatap
= &work_fdata
;
1585 (void) skip_prologue (get_pc_function_start (get_frame_pc (fi
)),
1586 get_frame_pc (fi
), fdatap
);
1589 frame_saved_regs_zalloc (fi
);
1591 /* If there were any saved registers, figure out parent's stack
1593 /* The following is true only if the frame doesn't have a call to
1596 if (fdatap
->saved_fpr
== 0
1597 && fdatap
->saved_gpr
== 0
1598 && fdatap
->saved_vr
== 0
1599 && fdatap
->saved_ev
== 0
1600 && fdatap
->lr_offset
== 0
1601 && fdatap
->cr_offset
== 0
1602 && fdatap
->vr_offset
== 0
1603 && fdatap
->ev_offset
== 0)
1606 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1607 address of the current frame. Things might be easier if the
1608 ->frame pointed to the outer-most address of the frame. In the
1609 mean time, the address of the prev frame is used as the base
1610 address of this frame. */
1611 frame_addr
= FRAME_CHAIN (fi
);
1613 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1614 All fpr's from saved_fpr to fp31 are saved. */
1616 if (fdatap
->saved_fpr
>= 0)
1619 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1620 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1622 get_frame_saved_regs (fi
)[FP0_REGNUM
+ i
] = fpr_addr
;
1627 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1628 All gpr's from saved_gpr to gpr31 are saved. */
1630 if (fdatap
->saved_gpr
>= 0)
1633 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1634 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1636 get_frame_saved_regs (fi
)[i
] = gpr_addr
;
1637 gpr_addr
+= wordsize
;
1641 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1642 All vr's from saved_vr to vr31 are saved. */
1643 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1645 if (fdatap
->saved_vr
>= 0)
1648 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1649 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1651 get_frame_saved_regs (fi
)[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1652 vr_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1657 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1658 All vr's from saved_ev to ev31 are saved. ????? */
1659 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
1661 if (fdatap
->saved_ev
>= 0)
1664 CORE_ADDR ev_addr
= frame_addr
+ fdatap
->ev_offset
;
1665 for (i
= fdatap
->saved_ev
; i
< 32; i
++)
1667 get_frame_saved_regs (fi
)[tdep
->ppc_ev0_regnum
+ i
] = ev_addr
;
1668 get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = ev_addr
+ 4;
1669 ev_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_ev0_regnum
);
1674 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1676 if (fdatap
->cr_offset
!= 0)
1677 get_frame_saved_regs (fi
)[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1679 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1681 if (fdatap
->lr_offset
!= 0)
1682 get_frame_saved_regs (fi
)[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1684 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1686 if (fdatap
->vrsave_offset
!= 0)
1687 get_frame_saved_regs (fi
)[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1690 /* Return the address of a frame. This is the inital %sp value when the frame
1691 was first allocated. For functions calling alloca(), it might be saved in
1692 an alloca register. */
1695 frame_initial_stack_address (struct frame_info
*fi
)
1698 struct rs6000_framedata fdata
;
1699 struct frame_info
*callee_fi
;
1701 /* If the initial stack pointer (frame address) of this frame is known,
1704 if (get_frame_extra_info (fi
)->initial_sp
)
1705 return get_frame_extra_info (fi
)->initial_sp
;
1707 /* Find out if this function is using an alloca register. */
1709 (void) skip_prologue (get_pc_function_start (get_frame_pc (fi
)),
1710 get_frame_pc (fi
), &fdata
);
1712 /* If saved registers of this frame are not known yet, read and
1715 if (!get_frame_saved_regs (fi
))
1716 frame_get_saved_regs (fi
, &fdata
);
1718 /* If no alloca register used, then fi->frame is the value of the %sp for
1719 this frame, and it is good enough. */
1721 if (fdata
.alloca_reg
< 0)
1723 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1724 return get_frame_extra_info (fi
)->initial_sp
;
1727 /* There is an alloca register, use its value, in the current frame,
1728 as the initial stack pointer. */
1730 char *tmpbuf
= alloca (MAX_REGISTER_RAW_SIZE
);
1731 if (frame_register_read (fi
, fdata
.alloca_reg
, tmpbuf
))
1733 get_frame_extra_info (fi
)->initial_sp
1734 = extract_unsigned_integer (tmpbuf
,
1735 REGISTER_RAW_SIZE (fdata
.alloca_reg
));
1738 /* NOTE: cagney/2002-04-17: At present the only time
1739 frame_register_read will fail is when the register isn't
1740 available. If that does happen, use the frame. */
1741 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1743 return get_frame_extra_info (fi
)->initial_sp
;
1746 /* Describe the pointer in each stack frame to the previous stack frame
1749 /* FRAME_CHAIN takes a frame's nominal address
1750 and produces the frame's chain-pointer. */
1752 /* In the case of the RS/6000, the frame's nominal address
1753 is the address of a 4-byte word containing the calling frame's address. */
1756 rs6000_frame_chain (struct frame_info
*thisframe
)
1758 CORE_ADDR fp
, fpp
, lr
;
1759 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1761 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (thisframe
),
1762 get_frame_base (thisframe
),
1763 get_frame_base (thisframe
)))
1764 /* A dummy frame always correctly chains back to the previous
1766 return read_memory_addr (get_frame_base (thisframe
), wordsize
);
1768 if (inside_entry_file (get_frame_pc (thisframe
))
1769 || get_frame_pc (thisframe
) == entry_point_address ())
1772 if ((get_frame_type (thisframe
) == SIGTRAMP_FRAME
))
1773 fp
= read_memory_addr (get_frame_base (thisframe
) + SIG_FRAME_FP_OFFSET
,
1775 else if (get_next_frame (thisframe
) != NULL
1776 && (get_frame_type (get_next_frame (thisframe
)) == SIGTRAMP_FRAME
)
1777 && FRAMELESS_FUNCTION_INVOCATION (thisframe
))
1778 /* A frameless function interrupted by a signal did not change the
1780 fp
= get_frame_base (thisframe
);
1782 fp
= read_memory_addr (get_frame_base (thisframe
), wordsize
);
1786 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1787 isn't available with that word size, return 0. */
1790 regsize (const struct reg
*reg
, int wordsize
)
1792 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1795 /* Return the name of register number N, or null if no such register exists
1796 in the current architecture. */
1799 rs6000_register_name (int n
)
1801 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1802 const struct reg
*reg
= tdep
->regs
+ n
;
1804 if (!regsize (reg
, tdep
->wordsize
))
1809 /* Index within `registers' of the first byte of the space for
1813 rs6000_register_byte (int n
)
1815 return gdbarch_tdep (current_gdbarch
)->regoff
[n
];
1818 /* Return the number of bytes of storage in the actual machine representation
1819 for register N if that register is available, else return 0. */
1822 rs6000_register_raw_size (int n
)
1824 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1825 const struct reg
*reg
= tdep
->regs
+ n
;
1826 return regsize (reg
, tdep
->wordsize
);
1829 /* Return the GDB type object for the "standard" data type
1830 of data in register N. */
1832 static struct type
*
1833 rs6000_register_virtual_type (int n
)
1835 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1836 const struct reg
*reg
= tdep
->regs
+ n
;
1839 return builtin_type_double
;
1842 int size
= regsize (reg
, tdep
->wordsize
);
1846 if (tdep
->ppc_ev0_regnum
<= n
&& n
<= tdep
->ppc_ev31_regnum
)
1847 return builtin_type_vec64
;
1849 return builtin_type_int64
;
1852 return builtin_type_vec128
;
1855 return builtin_type_int32
;
1861 /* Return whether register N requires conversion when moving from raw format
1864 The register format for RS/6000 floating point registers is always
1865 double, we need a conversion if the memory format is float. */
1868 rs6000_register_convertible (int n
)
1870 const struct reg
*reg
= gdbarch_tdep (current_gdbarch
)->regs
+ n
;
1874 /* Convert data from raw format for register N in buffer FROM
1875 to virtual format with type TYPE in buffer TO. */
1878 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1879 char *from
, char *to
)
1881 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1883 double val
= extract_floating (from
, REGISTER_RAW_SIZE (n
));
1884 store_floating (to
, TYPE_LENGTH (type
), val
);
1887 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1890 /* Convert data from virtual format with type TYPE in buffer FROM
1891 to raw format for register N in buffer TO. */
1894 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1895 char *from
, char *to
)
1897 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1899 double val
= extract_floating (from
, TYPE_LENGTH (type
));
1900 store_floating (to
, REGISTER_RAW_SIZE (n
), val
);
1903 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1907 e500_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1908 int reg_nr
, void *buffer
)
1912 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1913 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1915 if (reg_nr
>= tdep
->ppc_gp0_regnum
1916 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1918 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1920 /* Build the value in the provided buffer. */
1921 /* Read the raw register of which this one is the lower portion. */
1922 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1923 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1925 memcpy ((char *) buffer
, temp_buffer
+ offset
, 4);
1930 e500_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1931 int reg_nr
, const void *buffer
)
1935 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1936 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1938 if (reg_nr
>= tdep
->ppc_gp0_regnum
1939 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1941 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1942 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1943 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1946 /* Let's read the value of the base register into a temporary
1947 buffer, so that overwriting the last four bytes with the new
1948 value of the pseudo will leave the upper 4 bytes unchanged. */
1949 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1951 /* Write as an 8 byte quantity. */
1952 memcpy (temp_buffer
+ offset
, (char *) buffer
, 4);
1953 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
1957 /* Convert a dwarf2 register number to a gdb REGNUM. */
1959 e500_dwarf2_reg_to_regnum (int num
)
1962 if (0 <= num
&& num
<= 31)
1963 return num
+ gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
;
1968 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1971 rs6000_stab_reg_to_regnum (int num
)
1977 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
1980 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
1983 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
1986 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
1995 /* Store the address of the place in which to copy the structure the
1996 subroutine will return. */
1999 rs6000_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2001 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2002 write_register (tdep
->ppc_gp0_regnum
+ 3, addr
);
2005 /* Write into appropriate registers a function return value
2006 of type TYPE, given in virtual format. */
2008 e500_store_return_value (struct type
*type
, char *valbuf
)
2010 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2012 /* Everything is returned in GPR3 and up. */
2015 int len
= TYPE_LENGTH (type
);
2016 while (copied
< len
)
2018 int regnum
= gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3 + i
;
2019 int reg_size
= REGISTER_RAW_SIZE (regnum
);
2020 char *reg_val_buf
= alloca (reg_size
);
2022 memcpy (reg_val_buf
, valbuf
+ copied
, reg_size
);
2024 deprecated_write_register_gen (regnum
, reg_val_buf
);
2030 rs6000_store_return_value (struct type
*type
, char *valbuf
)
2032 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2034 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2036 /* Floating point values are returned starting from FPR1 and up.
2037 Say a double_double_double type could be returned in
2038 FPR1/FPR2/FPR3 triple. */
2040 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
2041 TYPE_LENGTH (type
));
2042 else if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
2044 if (TYPE_LENGTH (type
) == 16
2045 && TYPE_VECTOR (type
))
2046 deprecated_write_register_bytes (REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
2047 valbuf
, TYPE_LENGTH (type
));
2050 /* Everything else is returned in GPR3 and up. */
2051 deprecated_write_register_bytes (REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
2052 valbuf
, TYPE_LENGTH (type
));
2055 /* Extract from an array REGBUF containing the (raw) register state
2056 the address in which a function should return its structure value,
2057 as a CORE_ADDR (or an expression that can be used as one). */
2060 rs6000_extract_struct_value_address (struct regcache
*regcache
)
2062 /* FIXME: cagney/2002-09-26: PR gdb/724: When making an inferior
2063 function call GDB knows the address of the struct return value
2064 and hence, should not need to call this function. Unfortunately,
2065 the current hand_function_call() code only saves the most recent
2066 struct address leading to occasional calls. The code should
2067 instead maintain a stack of such addresses (in the dummy frame
2069 /* NOTE: cagney/2002-09-26: Return 0 which indicates that we've
2070 really got no idea where the return value is being stored. While
2071 r3, on function entry, contained the address it will have since
2072 been reused (scratch) and hence wouldn't be valid */
2076 /* Return whether PC is in a dummy function call.
2078 FIXME: This just checks for the end of the stack, which is broken
2079 for things like stepping through gcc nested function stubs. */
2082 rs6000_pc_in_call_dummy (CORE_ADDR pc
, CORE_ADDR sp
, CORE_ADDR fp
)
2084 return sp
< pc
&& pc
< fp
;
2087 /* Hook called when a new child process is started. */
2090 rs6000_create_inferior (int pid
)
2092 if (rs6000_set_host_arch_hook
)
2093 rs6000_set_host_arch_hook (pid
);
2096 /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
2098 Usually a function pointer's representation is simply the address
2099 of the function. On the RS/6000 however, a function pointer is
2100 represented by a pointer to a TOC entry. This TOC entry contains
2101 three words, the first word is the address of the function, the
2102 second word is the TOC pointer (r2), and the third word is the
2103 static chain value. Throughout GDB it is currently assumed that a
2104 function pointer contains the address of the function, which is not
2105 easy to fix. In addition, the conversion of a function address to
2106 a function pointer would require allocation of a TOC entry in the
2107 inferior's memory space, with all its drawbacks. To be able to
2108 call C++ virtual methods in the inferior (which are called via
2109 function pointers), find_function_addr uses this function to get the
2110 function address from a function pointer. */
2112 /* Return real function address if ADDR (a function pointer) is in the data
2113 space and is therefore a special function pointer. */
2116 rs6000_convert_from_func_ptr_addr (CORE_ADDR addr
)
2118 struct obj_section
*s
;
2120 s
= find_pc_section (addr
);
2121 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
2124 /* ADDR is in the data space, so it's a special function pointer. */
2125 return read_memory_addr (addr
, gdbarch_tdep (current_gdbarch
)->wordsize
);
2129 /* Handling the various POWER/PowerPC variants. */
2132 /* The arrays here called registers_MUMBLE hold information about available
2135 For each family of PPC variants, I've tried to isolate out the
2136 common registers and put them up front, so that as long as you get
2137 the general family right, GDB will correctly identify the registers
2138 common to that family. The common register sets are:
2140 For the 60x family: hid0 hid1 iabr dabr pir
2142 For the 505 and 860 family: eie eid nri
2144 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
2145 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
2148 Most of these register groups aren't anything formal. I arrived at
2149 them by looking at the registers that occurred in more than one
2152 Note: kevinb/2002-04-30: Support for the fpscr register was added
2153 during April, 2002. Slot 70 is being used for PowerPC and slot 71
2154 for Power. For PowerPC, slot 70 was unused and was already in the
2155 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
2156 slot 70 was being used for "mq", so the next available slot (71)
2157 was chosen. It would have been nice to be able to make the
2158 register numbers the same across processor cores, but this wasn't
2159 possible without either 1) renumbering some registers for some
2160 processors or 2) assigning fpscr to a really high slot that's
2161 larger than any current register number. Doing (1) is bad because
2162 existing stubs would break. Doing (2) is undesirable because it
2163 would introduce a really large gap between fpscr and the rest of
2164 the registers for most processors. */
2166 /* Convenience macros for populating register arrays. */
2168 /* Within another macro, convert S to a string. */
2172 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
2173 and 64 bits on 64-bit systems. */
2174 #define R(name) { STR(name), 4, 8, 0, 0 }
2176 /* Return a struct reg defining register NAME that's 32 bits on all
2178 #define R4(name) { STR(name), 4, 4, 0, 0 }
2180 /* Return a struct reg defining register NAME that's 64 bits on all
2182 #define R8(name) { STR(name), 8, 8, 0, 0 }
2184 /* Return a struct reg defining register NAME that's 128 bits on all
2186 #define R16(name) { STR(name), 16, 16, 0, 0 }
2188 /* Return a struct reg defining floating-point register NAME. */
2189 #define F(name) { STR(name), 8, 8, 1, 0 }
2191 /* Return a struct reg defining a pseudo register NAME. */
2192 #define P(name) { STR(name), 4, 8, 0, 1}
2194 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
2195 systems and that doesn't exist on 64-bit systems. */
2196 #define R32(name) { STR(name), 4, 0, 0, 0 }
2198 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
2199 systems and that doesn't exist on 32-bit systems. */
2200 #define R64(name) { STR(name), 0, 8, 0, 0 }
2202 /* Return a struct reg placeholder for a register that doesn't exist. */
2203 #define R0 { 0, 0, 0, 0, 0 }
2205 /* UISA registers common across all architectures, including POWER. */
2207 #define COMMON_UISA_REGS \
2208 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2209 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2210 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2211 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2212 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
2213 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
2214 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
2215 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
2216 /* 64 */ R(pc), R(ps)
2218 #define COMMON_UISA_NOFP_REGS \
2219 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2220 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2221 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2222 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2223 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2224 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2225 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2226 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2227 /* 64 */ R(pc), R(ps)
2229 /* UISA-level SPRs for PowerPC. */
2230 #define PPC_UISA_SPRS \
2231 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
2233 /* UISA-level SPRs for PowerPC without floating point support. */
2234 #define PPC_UISA_NOFP_SPRS \
2235 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
2237 /* Segment registers, for PowerPC. */
2238 #define PPC_SEGMENT_REGS \
2239 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2240 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2241 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2242 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2244 /* OEA SPRs for PowerPC. */
2245 #define PPC_OEA_SPRS \
2247 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2248 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2249 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2250 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2251 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2252 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2253 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2254 /* 116 */ R4(dec), R(dabr), R4(ear)
2256 /* AltiVec registers. */
2257 #define PPC_ALTIVEC_REGS \
2258 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2259 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2260 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2261 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2262 /*151*/R4(vscr), R4(vrsave)
2264 /* Vectors of hi-lo general purpose registers. */
2265 #define PPC_EV_REGS \
2266 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
2267 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
2268 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
2269 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2271 /* Lower half of the EV registers. */
2272 #define PPC_GPRS_PSEUDO_REGS \
2273 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2274 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2275 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2276 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31)
2278 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2279 user-level SPR's. */
2280 static const struct reg registers_power
[] =
2283 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
2287 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2288 view of the PowerPC. */
2289 static const struct reg registers_powerpc
[] =
2296 /* PowerPC UISA - a PPC processor as viewed by user-level
2297 code, but without floating point registers. */
2298 static const struct reg registers_powerpc_nofp
[] =
2300 COMMON_UISA_NOFP_REGS
,
2304 /* IBM PowerPC 403. */
2305 static const struct reg registers_403
[] =
2311 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2312 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2313 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2314 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2315 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2316 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
2319 /* IBM PowerPC 403GC. */
2320 static const struct reg registers_403GC
[] =
2326 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2327 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2328 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2329 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2330 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2331 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2332 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2333 /* 147 */ R(tbhu
), R(tblu
)
2336 /* Motorola PowerPC 505. */
2337 static const struct reg registers_505
[] =
2343 /* 119 */ R(eie
), R(eid
), R(nri
)
2346 /* Motorola PowerPC 860 or 850. */
2347 static const struct reg registers_860
[] =
2353 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2354 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2355 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2356 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2357 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2358 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2359 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2360 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2361 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2362 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2363 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2364 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2367 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2368 for reading and writing RTCU and RTCL. However, how one reads and writes a
2369 register is the stub's problem. */
2370 static const struct reg registers_601
[] =
2376 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2377 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2380 /* Motorola PowerPC 602. */
2381 static const struct reg registers_602
[] =
2387 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2388 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2389 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2392 /* Motorola/IBM PowerPC 603 or 603e. */
2393 static const struct reg registers_603
[] =
2399 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2400 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2401 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2404 /* Motorola PowerPC 604 or 604e. */
2405 static const struct reg registers_604
[] =
2411 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2412 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2413 /* 127 */ R(sia
), R(sda
)
2416 /* Motorola/IBM PowerPC 750 or 740. */
2417 static const struct reg registers_750
[] =
2423 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2424 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2425 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2426 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2427 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2428 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2432 /* Motorola PowerPC 7400. */
2433 static const struct reg registers_7400
[] =
2435 /* gpr0-gpr31, fpr0-fpr31 */
2437 /* ctr, xre, lr, cr */
2442 /* vr0-vr31, vrsave, vscr */
2444 /* FIXME? Add more registers? */
2447 /* Motorola e500. */
2448 static const struct reg registers_e500
[] =
2451 /* cr, lr, ctr, xer, "" */
2455 R8(acc
), R(spefscr
),
2456 /* NOTE: Add new registers here the end of the raw register
2457 list and just before the first pseudo register. */
2459 PPC_GPRS_PSEUDO_REGS
2462 /* Information about a particular processor variant. */
2466 /* Name of this variant. */
2469 /* English description of the variant. */
2472 /* bfd_arch_info.arch corresponding to variant. */
2473 enum bfd_architecture arch
;
2475 /* bfd_arch_info.mach corresponding to variant. */
2478 /* Number of real registers. */
2481 /* Number of pseudo registers. */
2484 /* Number of total registers (the sum of nregs and npregs). */
2487 /* Table of register names; registers[R] is the name of the register
2489 const struct reg
*regs
;
2492 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2495 num_registers (const struct reg
*reg_list
, int num_tot_regs
)
2500 for (i
= 0; i
< num_tot_regs
; i
++)
2501 if (!reg_list
[i
].pseudo
)
2508 num_pseudo_registers (const struct reg
*reg_list
, int num_tot_regs
)
2513 for (i
= 0; i
< num_tot_regs
; i
++)
2514 if (reg_list
[i
].pseudo
)
2520 /* Information in this table comes from the following web sites:
2521 IBM: http://www.chips.ibm.com:80/products/embedded/
2522 Motorola: http://www.mot.com/SPS/PowerPC/
2524 I'm sure I've got some of the variant descriptions not quite right.
2525 Please report any inaccuracies you find to GDB's maintainer.
2527 If you add entries to this table, please be sure to allow the new
2528 value as an argument to the --with-cpu flag, in configure.in. */
2530 static struct variant variants
[] =
2533 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2534 bfd_mach_ppc
, -1, -1, tot_num_registers (registers_powerpc
),
2536 {"power", "POWER user-level", bfd_arch_rs6000
,
2537 bfd_mach_rs6k
, -1, -1, tot_num_registers (registers_power
),
2539 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2540 bfd_mach_ppc_403
, -1, -1, tot_num_registers (registers_403
),
2542 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2543 bfd_mach_ppc_601
, -1, -1, tot_num_registers (registers_601
),
2545 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2546 bfd_mach_ppc_602
, -1, -1, tot_num_registers (registers_602
),
2548 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2549 bfd_mach_ppc_603
, -1, -1, tot_num_registers (registers_603
),
2551 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2552 604, -1, -1, tot_num_registers (registers_604
),
2554 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2555 bfd_mach_ppc_403gc
, -1, -1, tot_num_registers (registers_403GC
),
2557 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2558 bfd_mach_ppc_505
, -1, -1, tot_num_registers (registers_505
),
2560 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2561 bfd_mach_ppc_860
, -1, -1, tot_num_registers (registers_860
),
2563 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2564 bfd_mach_ppc_750
, -1, -1, tot_num_registers (registers_750
),
2566 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2567 bfd_mach_ppc_7400
, -1, -1, tot_num_registers (registers_7400
),
2569 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc
,
2570 bfd_mach_ppc_e500
, -1, -1, tot_num_registers (registers_e500
),
2574 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2575 bfd_mach_ppc64
, -1, -1, tot_num_registers (registers_powerpc
),
2577 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2578 bfd_mach_ppc_620
, -1, -1, tot_num_registers (registers_powerpc
),
2580 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2581 bfd_mach_ppc_630
, -1, -1, tot_num_registers (registers_powerpc
),
2583 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2584 bfd_mach_ppc_a35
, -1, -1, tot_num_registers (registers_powerpc
),
2586 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2587 bfd_mach_ppc_rs64ii
, -1, -1, tot_num_registers (registers_powerpc
),
2589 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2590 bfd_mach_ppc_rs64iii
, -1, -1, tot_num_registers (registers_powerpc
),
2593 /* FIXME: I haven't checked the register sets of the following. */
2594 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2595 bfd_mach_rs6k_rs1
, -1, -1, tot_num_registers (registers_power
),
2597 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2598 bfd_mach_rs6k_rsc
, -1, -1, tot_num_registers (registers_power
),
2600 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2601 bfd_mach_rs6k_rs2
, -1, -1, tot_num_registers (registers_power
),
2604 {0, 0, 0, 0, 0, 0, 0, 0}
2607 /* Initialize the number of registers and pseudo registers in each variant. */
2610 init_variants (void)
2614 for (v
= variants
; v
->name
; v
++)
2617 v
->nregs
= num_registers (v
->regs
, v
->num_tot_regs
);
2618 if (v
->npregs
== -1)
2619 v
->npregs
= num_pseudo_registers (v
->regs
, v
->num_tot_regs
);
2623 /* Return the variant corresponding to architecture ARCH and machine number
2624 MACH. If no such variant exists, return null. */
2626 static const struct variant
*
2627 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2629 const struct variant
*v
;
2631 for (v
= variants
; v
->name
; v
++)
2632 if (arch
== v
->arch
&& mach
== v
->mach
)
2639 gdb_print_insn_powerpc (bfd_vma memaddr
, disassemble_info
*info
)
2641 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2642 return print_insn_big_powerpc (memaddr
, info
);
2644 return print_insn_little_powerpc (memaddr
, info
);
2647 /* Initialize the current architecture based on INFO. If possible, re-use an
2648 architecture from ARCHES, which is a list of architectures already created
2649 during this debugging session.
2651 Called e.g. at program startup, when reading a core file, and when reading
2654 static struct gdbarch
*
2655 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2657 struct gdbarch
*gdbarch
;
2658 struct gdbarch_tdep
*tdep
;
2659 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2661 const struct variant
*v
;
2662 enum bfd_architecture arch
;
2668 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2669 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2671 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2672 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2674 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2676 /* Check word size. If INFO is from a binary file, infer it from
2677 that, else choose a likely default. */
2678 if (from_xcoff_exec
)
2680 if (bfd_xcoff_is_xcoff64 (info
.abfd
))
2685 else if (from_elf_exec
)
2687 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2694 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2695 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2696 info
.bfd_arch_info
->bits_per_byte
;
2701 /* Find a candidate among extant architectures. */
2702 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2704 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2706 /* Word size in the various PowerPC bfd_arch_info structs isn't
2707 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2708 separate word size check. */
2709 tdep
= gdbarch_tdep (arches
->gdbarch
);
2710 if (tdep
&& tdep
->wordsize
== wordsize
)
2711 return arches
->gdbarch
;
2714 /* None found, create a new architecture from INFO, whose bfd_arch_info
2715 validity depends on the source:
2716 - executable useless
2717 - rs6000_host_arch() good
2719 - "set arch" trust blindly
2720 - GDB startup useless but harmless */
2722 if (!from_xcoff_exec
)
2724 arch
= info
.bfd_arch_info
->arch
;
2725 mach
= info
.bfd_arch_info
->mach
;
2729 arch
= bfd_arch_powerpc
;
2731 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2732 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2734 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2735 tdep
->wordsize
= wordsize
;
2737 /* For e500 executables, the apuinfo section is of help here. Such
2738 section contains the identifier and revision number of each
2739 Application-specific Processing Unit that is present on the
2740 chip. The content of the section is determined by the assembler
2741 which looks at each instruction and determines which unit (and
2742 which version of it) can execute it. In our case we just look for
2743 the existance of the section. */
2747 sect
= bfd_get_section_by_name (info
.abfd
, ".PPC.EMB.apuinfo");
2750 arch
= info
.bfd_arch_info
->arch
;
2751 mach
= bfd_mach_ppc_e500
;
2752 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2753 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2757 gdbarch
= gdbarch_alloc (&info
, tdep
);
2758 power
= arch
== bfd_arch_rs6000
;
2760 /* Initialize the number of real and pseudo registers in each variant. */
2763 /* Choose variant. */
2764 v
= find_variant_by_arch (arch
, mach
);
2768 tdep
->regs
= v
->regs
;
2770 tdep
->ppc_gp0_regnum
= 0;
2771 tdep
->ppc_gplast_regnum
= 31;
2772 tdep
->ppc_toc_regnum
= 2;
2773 tdep
->ppc_ps_regnum
= 65;
2774 tdep
->ppc_cr_regnum
= 66;
2775 tdep
->ppc_lr_regnum
= 67;
2776 tdep
->ppc_ctr_regnum
= 68;
2777 tdep
->ppc_xer_regnum
= 69;
2778 if (v
->mach
== bfd_mach_ppc_601
)
2779 tdep
->ppc_mq_regnum
= 124;
2781 tdep
->ppc_mq_regnum
= 70;
2783 tdep
->ppc_mq_regnum
= -1;
2784 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2786 set_gdbarch_pc_regnum (gdbarch
, 64);
2787 set_gdbarch_sp_regnum (gdbarch
, 1);
2788 set_gdbarch_fp_regnum (gdbarch
, 1);
2789 set_gdbarch_deprecated_extract_return_value (gdbarch
,
2790 rs6000_extract_return_value
);
2791 set_gdbarch_deprecated_store_return_value (gdbarch
, rs6000_store_return_value
);
2793 if (v
->arch
== bfd_arch_powerpc
)
2797 tdep
->ppc_vr0_regnum
= 71;
2798 tdep
->ppc_vrsave_regnum
= 104;
2799 tdep
->ppc_ev0_regnum
= -1;
2800 tdep
->ppc_ev31_regnum
= -1;
2802 case bfd_mach_ppc_7400
:
2803 tdep
->ppc_vr0_regnum
= 119;
2804 tdep
->ppc_vrsave_regnum
= 152;
2805 tdep
->ppc_ev0_regnum
= -1;
2806 tdep
->ppc_ev31_regnum
= -1;
2808 case bfd_mach_ppc_e500
:
2809 tdep
->ppc_gp0_regnum
= 41;
2810 tdep
->ppc_gplast_regnum
= tdep
->ppc_gp0_regnum
+ 32 - 1;
2811 tdep
->ppc_toc_regnum
= -1;
2812 tdep
->ppc_ps_regnum
= 1;
2813 tdep
->ppc_cr_regnum
= 2;
2814 tdep
->ppc_lr_regnum
= 3;
2815 tdep
->ppc_ctr_regnum
= 4;
2816 tdep
->ppc_xer_regnum
= 5;
2817 tdep
->ppc_ev0_regnum
= 7;
2818 tdep
->ppc_ev31_regnum
= 38;
2819 set_gdbarch_pc_regnum (gdbarch
, 0);
2820 set_gdbarch_sp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2821 set_gdbarch_fp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2822 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, e500_dwarf2_reg_to_regnum
);
2823 set_gdbarch_pseudo_register_read (gdbarch
, e500_pseudo_register_read
);
2824 set_gdbarch_pseudo_register_write (gdbarch
, e500_pseudo_register_write
);
2825 set_gdbarch_extract_return_value (gdbarch
, e500_extract_return_value
);
2826 set_gdbarch_deprecated_store_return_value (gdbarch
, e500_store_return_value
);
2829 tdep
->ppc_vr0_regnum
= -1;
2830 tdep
->ppc_vrsave_regnum
= -1;
2831 tdep
->ppc_ev0_regnum
= -1;
2832 tdep
->ppc_ev31_regnum
= -1;
2836 /* Sanity check on registers. */
2837 gdb_assert (strcmp (tdep
->regs
[tdep
->ppc_gp0_regnum
].name
, "r0") == 0);
2839 /* Set lr_frame_offset. */
2841 tdep
->lr_frame_offset
= 16;
2843 tdep
->lr_frame_offset
= 4;
2845 tdep
->lr_frame_offset
= 8;
2847 /* Calculate byte offsets in raw register array. */
2848 tdep
->regoff
= xmalloc (v
->num_tot_regs
* sizeof (int));
2849 for (i
= off
= 0; i
< v
->num_tot_regs
; i
++)
2851 tdep
->regoff
[i
] = off
;
2852 off
+= regsize (v
->regs
+ i
, wordsize
);
2855 /* Select instruction printer. */
2857 set_gdbarch_print_insn (gdbarch
, print_insn_rs6000
);
2859 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_powerpc
);
2861 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
2862 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2863 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
2864 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2865 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
2867 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2868 set_gdbarch_num_pseudo_regs (gdbarch
, v
->npregs
);
2869 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2870 set_gdbarch_register_size (gdbarch
, wordsize
);
2871 set_gdbarch_register_bytes (gdbarch
, off
);
2872 set_gdbarch_register_byte (gdbarch
, rs6000_register_byte
);
2873 set_gdbarch_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2874 set_gdbarch_max_register_raw_size (gdbarch
, 16);
2875 set_gdbarch_register_virtual_size (gdbarch
, generic_register_size
);
2876 set_gdbarch_max_register_virtual_size (gdbarch
, 16);
2877 set_gdbarch_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2879 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2880 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2881 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2882 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2883 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2884 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2885 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2886 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2887 set_gdbarch_char_signed (gdbarch
, 0);
2889 set_gdbarch_call_dummy_length (gdbarch
, 0);
2890 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2891 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
2892 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2893 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2894 set_gdbarch_call_dummy_p (gdbarch
, 1);
2895 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2896 set_gdbarch_fix_call_dummy (gdbarch
, rs6000_fix_call_dummy
);
2897 set_gdbarch_frame_align (gdbarch
, rs6000_frame_align
);
2898 set_gdbarch_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2899 set_gdbarch_push_return_address (gdbarch
, ppc_push_return_address
);
2900 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2902 set_gdbarch_register_convertible (gdbarch
, rs6000_register_convertible
);
2903 set_gdbarch_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2904 set_gdbarch_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2905 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2906 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2907 is correct for the SysV ABI when the wordsize is 8, but I'm also
2908 fairly certain that ppc_sysv_abi_push_arguments() will give even
2909 worse results since it only works for 32-bit code. So, for the moment,
2910 we're better off calling rs6000_push_arguments() since it works for
2911 64-bit code. At some point in the future, this matter needs to be
2913 if (sysv_abi
&& wordsize
== 4)
2914 set_gdbarch_push_arguments (gdbarch
, ppc_sysv_abi_push_arguments
);
2916 set_gdbarch_push_arguments (gdbarch
, rs6000_push_arguments
);
2918 set_gdbarch_store_struct_return (gdbarch
, rs6000_store_struct_return
);
2919 set_gdbarch_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2920 set_gdbarch_pop_frame (gdbarch
, rs6000_pop_frame
);
2922 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2923 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2924 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2925 set_gdbarch_function_start_offset (gdbarch
, 0);
2926 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2928 /* Not sure on this. FIXMEmgo */
2929 set_gdbarch_frame_args_skip (gdbarch
, 8);
2932 set_gdbarch_use_struct_convention (gdbarch
,
2933 ppc_sysv_abi_use_struct_convention
);
2935 set_gdbarch_use_struct_convention (gdbarch
,
2936 generic_use_struct_convention
);
2938 set_gdbarch_frameless_function_invocation (gdbarch
,
2939 rs6000_frameless_function_invocation
);
2940 set_gdbarch_frame_chain (gdbarch
, rs6000_frame_chain
);
2941 set_gdbarch_frame_saved_pc (gdbarch
, rs6000_frame_saved_pc
);
2943 set_gdbarch_frame_init_saved_regs (gdbarch
, rs6000_frame_init_saved_regs
);
2944 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, rs6000_init_extra_frame_info
);
2948 /* Handle RS/6000 function pointers (which are really function
2950 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2951 rs6000_convert_from_func_ptr_addr
);
2953 set_gdbarch_frame_args_address (gdbarch
, rs6000_frame_args_address
);
2954 set_gdbarch_frame_locals_address (gdbarch
, rs6000_frame_args_address
);
2955 set_gdbarch_saved_pc_after_call (gdbarch
, rs6000_saved_pc_after_call
);
2957 /* We can't tell how many args there are
2958 now that the C compiler delays popping them. */
2959 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
2961 /* Hook in ABI-specific overrides, if they have been registered. */
2962 gdbarch_init_osabi (info
, gdbarch
);
2968 rs6000_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2970 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2975 /* FIXME: Dump gdbarch_tdep. */
2978 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
2981 rs6000_info_powerpc_command (char *args
, int from_tty
)
2983 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
2986 /* Initialization code. */
2989 _initialize_rs6000_tdep (void)
2991 gdbarch_register (bfd_arch_rs6000
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2992 gdbarch_register (bfd_arch_powerpc
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2994 /* Add root prefix command for "info powerpc" commands */
2995 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
2996 "Various POWERPC info specific commands.",
2997 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);