1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
39 #include "libbfd.h" /* for bfd_default_set_arch_mach */
40 #include "coff/internal.h" /* for libcoff.h */
41 #include "libcoff.h" /* for xcoff_data */
42 #include "coff/xcoff.h"
47 #include "solib-svr4.h"
50 #include "gdb_assert.h"
52 /* If the kernel has to deliver a signal, it pushes a sigcontext
53 structure on the stack and then calls the signal handler, passing
54 the address of the sigcontext in an argument register. Usually
55 the signal handler doesn't save this register, so we have to
56 access the sigcontext structure via an offset from the signal handler
58 The following constants were determined by experimentation on AIX 3.2. */
59 #define SIG_FRAME_PC_OFFSET 96
60 #define SIG_FRAME_LR_OFFSET 108
61 #define SIG_FRAME_FP_OFFSET 284
63 /* To be used by skip_prologue. */
65 struct rs6000_framedata
67 int offset
; /* total size of frame --- the distance
68 by which we decrement sp to allocate
70 int saved_gpr
; /* smallest # of saved gpr */
71 int saved_fpr
; /* smallest # of saved fpr */
72 int saved_vr
; /* smallest # of saved vr */
73 int saved_ev
; /* smallest # of saved ev */
74 int alloca_reg
; /* alloca register number (frame ptr) */
75 char frameless
; /* true if frameless functions. */
76 char nosavedpc
; /* true if pc not saved. */
77 int gpr_offset
; /* offset of saved gprs from prev sp */
78 int fpr_offset
; /* offset of saved fprs from prev sp */
79 int vr_offset
; /* offset of saved vrs from prev sp */
80 int ev_offset
; /* offset of saved evs from prev sp */
81 int lr_offset
; /* offset of saved lr */
82 int cr_offset
; /* offset of saved cr */
83 int vrsave_offset
; /* offset of saved vrsave register */
86 /* Description of a single register. */
90 char *name
; /* name of register */
91 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
92 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
93 unsigned char fpr
; /* whether register is floating-point */
94 unsigned char pseudo
; /* whether register is pseudo */
97 /* Breakpoint shadows for the single step instructions will be kept here. */
99 static struct sstep_breaks
101 /* Address, or 0 if this is not in use. */
103 /* Shadow contents. */
108 /* Hook for determining the TOC address when calling functions in the
109 inferior under AIX. The initialization code in rs6000-nat.c sets
110 this hook to point to find_toc_address. */
112 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
114 /* Hook to set the current architecture when starting a child process.
115 rs6000-nat.c sets this. */
117 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
119 /* Static function prototypes */
121 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
123 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
124 struct rs6000_framedata
*);
125 static void frame_get_saved_regs (struct frame_info
* fi
,
126 struct rs6000_framedata
* fdatap
);
127 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
129 /* Is REGNO an AltiVec register? Return 1 if so, 0 otherwise. */
131 altivec_register_p (int regno
)
133 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
134 if (tdep
->ppc_vr0_regnum
< 0 || tdep
->ppc_vrsave_regnum
< 0)
137 return (regno
>= tdep
->ppc_vr0_regnum
&& regno
<= tdep
->ppc_vrsave_regnum
);
140 /* Use the architectures FP registers? */
142 ppc_floating_point_unit_p (struct gdbarch
*gdbarch
)
144 const struct bfd_arch_info
*info
= gdbarch_bfd_arch_info (gdbarch
);
145 if (info
->arch
== bfd_arch_powerpc
)
146 return (info
->mach
!= bfd_mach_ppc_e500
);
147 if (info
->arch
== bfd_arch_rs6000
)
152 /* Read a LEN-byte address from debugged memory address MEMADDR. */
155 read_memory_addr (CORE_ADDR memaddr
, int len
)
157 return read_memory_unsigned_integer (memaddr
, len
);
161 rs6000_skip_prologue (CORE_ADDR pc
)
163 struct rs6000_framedata frame
;
164 pc
= skip_prologue (pc
, 0, &frame
);
169 /* Fill in fi->saved_regs */
171 struct frame_extra_info
173 /* Functions calling alloca() change the value of the stack
174 pointer. We need to use initial stack pointer (which is saved in
175 r31 by gcc) in such cases. If a compiler emits traceback table,
176 then we should use the alloca register specified in traceback
178 CORE_ADDR initial_sp
; /* initial stack pointer. */
182 rs6000_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
184 struct frame_extra_info
*extra_info
=
185 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
186 extra_info
->initial_sp
= 0;
187 if (get_next_frame (fi
) != NULL
188 && get_frame_pc (fi
) < TEXT_SEGMENT_BASE
)
189 /* We're in get_prev_frame */
190 /* and this is a special signal frame. */
191 /* (fi->pc will be some low address in the kernel, */
192 /* to which the signal handler returns). */
193 deprecated_set_frame_type (fi
, SIGTRAMP_FRAME
);
196 /* Put here the code to store, into a struct frame_saved_regs,
197 the addresses of the saved registers of frame described by FRAME_INFO.
198 This includes special registers such as pc and fp saved in special
199 ways in the stack frame. sp is even more special:
200 the address we return for it IS the sp for the next frame. */
202 /* In this implementation for RS/6000, we do *not* save sp. I am
203 not sure if it will be needed. The following function takes care of gpr's
207 rs6000_frame_init_saved_regs (struct frame_info
*fi
)
209 frame_get_saved_regs (fi
, NULL
);
213 rs6000_frame_args_address (struct frame_info
*fi
)
215 struct frame_extra_info
*extra_info
= get_frame_extra_info (fi
);
216 if (extra_info
->initial_sp
!= 0)
217 return extra_info
->initial_sp
;
219 return frame_initial_stack_address (fi
);
222 /* Immediately after a function call, return the saved pc.
223 Can't go through the frames for this because on some machines
224 the new frame is not set up until the new function executes
225 some instructions. */
228 rs6000_saved_pc_after_call (struct frame_info
*fi
)
230 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
233 /* Get the ith function argument for the current function. */
235 rs6000_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
239 frame_read_register (frame
, 3 + argi
, &addr
);
243 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
246 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
253 absolute
= (int) ((instr
>> 1) & 1);
258 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
262 dest
= pc
+ immediate
;
266 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
270 dest
= pc
+ immediate
;
274 ext_op
= (instr
>> 1) & 0x3ff;
276 if (ext_op
== 16) /* br conditional register */
278 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
280 /* If we are about to return from a signal handler, dest is
281 something like 0x3c90. The current frame is a signal handler
282 caller frame, upon completion of the sigreturn system call
283 execution will return to the saved PC in the frame. */
284 if (dest
< TEXT_SEGMENT_BASE
)
286 struct frame_info
*fi
;
288 fi
= get_current_frame ();
290 dest
= read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
291 gdbarch_tdep (current_gdbarch
)->wordsize
);
295 else if (ext_op
== 528) /* br cond to count reg */
297 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
299 /* If we are about to execute a system call, dest is something
300 like 0x22fc or 0x3b00. Upon completion the system call
301 will return to the address in the link register. */
302 if (dest
< TEXT_SEGMENT_BASE
)
303 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
312 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
316 /* Sequence of bytes for breakpoint instruction. */
318 const static unsigned char *
319 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
321 static unsigned char big_breakpoint
[] = { 0x7d, 0x82, 0x10, 0x08 };
322 static unsigned char little_breakpoint
[] = { 0x08, 0x10, 0x82, 0x7d };
324 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
325 return big_breakpoint
;
327 return little_breakpoint
;
331 /* AIX does not support PT_STEP. Simulate it. */
334 rs6000_software_single_step (enum target_signal signal
,
335 int insert_breakpoints_p
)
339 const char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
345 if (insert_breakpoints_p
)
350 insn
= read_memory_integer (loc
, 4);
352 breaks
[0] = loc
+ breakp_sz
;
354 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
356 /* Don't put two breakpoints on the same address. */
357 if (breaks
[1] == breaks
[0])
360 stepBreaks
[1].address
= 0;
362 for (ii
= 0; ii
< 2; ++ii
)
365 /* ignore invalid breakpoint. */
366 if (breaks
[ii
] == -1)
368 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
369 stepBreaks
[ii
].address
= breaks
[ii
];
376 /* remove step breakpoints. */
377 for (ii
= 0; ii
< 2; ++ii
)
378 if (stepBreaks
[ii
].address
!= 0)
379 target_remove_breakpoint (stepBreaks
[ii
].address
,
380 stepBreaks
[ii
].data
);
382 errno
= 0; /* FIXME, don't ignore errors! */
383 /* What errors? {read,write}_memory call error(). */
387 /* return pc value after skipping a function prologue and also return
388 information about a function frame.
390 in struct rs6000_framedata fdata:
391 - frameless is TRUE, if function does not have a frame.
392 - nosavedpc is TRUE, if function does not save %pc value in its frame.
393 - offset is the initial size of this stack frame --- the amount by
394 which we decrement the sp to allocate the frame.
395 - saved_gpr is the number of the first saved gpr.
396 - saved_fpr is the number of the first saved fpr.
397 - saved_vr is the number of the first saved vr.
398 - saved_ev is the number of the first saved ev.
399 - alloca_reg is the number of the register used for alloca() handling.
401 - gpr_offset is the offset of the first saved gpr from the previous frame.
402 - fpr_offset is the offset of the first saved fpr from the previous frame.
403 - vr_offset is the offset of the first saved vr from the previous frame.
404 - ev_offset is the offset of the first saved ev from the previous frame.
405 - lr_offset is the offset of the saved lr
406 - cr_offset is the offset of the saved cr
407 - vrsave_offset is the offset of the saved vrsave register
410 #define SIGNED_SHORT(x) \
411 ((sizeof (short) == 2) \
412 ? ((int)(short)(x)) \
413 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
415 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
417 /* Limit the number of skipped non-prologue instructions, as the examining
418 of the prologue is expensive. */
419 static int max_skip_non_prologue_insns
= 10;
421 /* Given PC representing the starting address of a function, and
422 LIM_PC which is the (sloppy) limit to which to scan when looking
423 for a prologue, attempt to further refine this limit by using
424 the line data in the symbol table. If successful, a better guess
425 on where the prologue ends is returned, otherwise the previous
426 value of lim_pc is returned. */
428 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
430 struct symtab_and_line prologue_sal
;
432 prologue_sal
= find_pc_line (pc
, 0);
433 if (prologue_sal
.line
!= 0)
436 CORE_ADDR addr
= prologue_sal
.end
;
438 /* Handle the case in which compiler's optimizer/scheduler
439 has moved instructions into the prologue. We scan ahead
440 in the function looking for address ranges whose corresponding
441 line number is less than or equal to the first one that we
442 found for the function. (It can be less than when the
443 scheduler puts a body instruction before the first prologue
445 for (i
= 2 * max_skip_non_prologue_insns
;
446 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
449 struct symtab_and_line sal
;
451 sal
= find_pc_line (addr
, 0);
454 if (sal
.line
<= prologue_sal
.line
455 && sal
.symtab
== prologue_sal
.symtab
)
462 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
463 lim_pc
= prologue_sal
.end
;
470 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
472 CORE_ADDR orig_pc
= pc
;
473 CORE_ADDR last_prologue_pc
= pc
;
474 CORE_ADDR li_found_pc
= 0;
478 long vr_saved_offset
= 0;
487 int minimal_toc_loaded
= 0;
488 int prev_insn_was_prologue_insn
= 1;
489 int num_skip_non_prologue_insns
= 0;
490 const struct bfd_arch_info
*arch_info
= gdbarch_bfd_arch_info (current_gdbarch
);
491 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
493 /* Attempt to find the end of the prologue when no limit is specified.
494 Note that refine_prologue_limit() has been written so that it may
495 be used to "refine" the limits of non-zero PC values too, but this
496 is only safe if we 1) trust the line information provided by the
497 compiler and 2) iterate enough to actually find the end of the
500 It may become a good idea at some point (for both performance and
501 accuracy) to unconditionally call refine_prologue_limit(). But,
502 until we can make a clear determination that this is beneficial,
503 we'll play it safe and only use it to obtain a limit when none
504 has been specified. */
506 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
508 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
509 fdata
->saved_gpr
= -1;
510 fdata
->saved_fpr
= -1;
511 fdata
->saved_vr
= -1;
512 fdata
->saved_ev
= -1;
513 fdata
->alloca_reg
= -1;
514 fdata
->frameless
= 1;
515 fdata
->nosavedpc
= 1;
519 /* Sometimes it isn't clear if an instruction is a prologue
520 instruction or not. When we encounter one of these ambiguous
521 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
522 Otherwise, we'll assume that it really is a prologue instruction. */
523 if (prev_insn_was_prologue_insn
)
524 last_prologue_pc
= pc
;
526 /* Stop scanning if we've hit the limit. */
527 if (lim_pc
!= 0 && pc
>= lim_pc
)
530 prev_insn_was_prologue_insn
= 1;
532 /* Fetch the instruction and convert it to an integer. */
533 if (target_read_memory (pc
, buf
, 4))
535 op
= extract_signed_integer (buf
, 4);
537 if ((op
& 0xfc1fffff) == 0x7c0802a6)
539 lr_reg
= (op
& 0x03e00000);
543 else if ((op
& 0xfc1fffff) == 0x7c000026)
545 cr_reg
= (op
& 0x03e00000);
549 else if ((op
& 0xfc1f0000) == 0xd8010000)
550 { /* stfd Rx,NUM(r1) */
551 reg
= GET_SRC_REG (op
);
552 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
554 fdata
->saved_fpr
= reg
;
555 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
560 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
561 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
562 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
563 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
566 reg
= GET_SRC_REG (op
);
567 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
569 fdata
->saved_gpr
= reg
;
570 if ((op
& 0xfc1f0003) == 0xf8010000)
572 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
577 else if ((op
& 0xffff0000) == 0x60000000)
580 /* Allow nops in the prologue, but do not consider them to
581 be part of the prologue unless followed by other prologue
583 prev_insn_was_prologue_insn
= 0;
587 else if ((op
& 0xffff0000) == 0x3c000000)
588 { /* addis 0,0,NUM, used
590 fdata
->offset
= (op
& 0x0000ffff) << 16;
591 fdata
->frameless
= 0;
595 else if ((op
& 0xffff0000) == 0x60000000)
596 { /* ori 0,0,NUM, 2nd ha
597 lf of >= 32k frames */
598 fdata
->offset
|= (op
& 0x0000ffff);
599 fdata
->frameless
= 0;
603 else if (lr_reg
!= -1 &&
604 /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */
605 (((op
& 0xffff0000) == (lr_reg
| 0xf8010000)) ||
606 /* stw Rx, NUM(r1) */
607 ((op
& 0xffff0000) == (lr_reg
| 0x90010000)) ||
608 /* stwu Rx, NUM(r1) */
609 ((op
& 0xffff0000) == (lr_reg
| 0x94010000))))
610 { /* where Rx == lr */
611 fdata
->lr_offset
= offset
;
612 fdata
->nosavedpc
= 0;
614 if ((op
& 0xfc000003) == 0xf8000000 || /* std */
615 (op
& 0xfc000000) == 0x90000000) /* stw */
617 /* Does not update r1, so add displacement to lr_offset. */
618 fdata
->lr_offset
+= SIGNED_SHORT (op
);
623 else if (cr_reg
!= -1 &&
624 /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */
625 (((op
& 0xffff0000) == (cr_reg
| 0xf8010000)) ||
626 /* stw Rx, NUM(r1) */
627 ((op
& 0xffff0000) == (cr_reg
| 0x90010000)) ||
628 /* stwu Rx, NUM(r1) */
629 ((op
& 0xffff0000) == (cr_reg
| 0x94010000))))
630 { /* where Rx == cr */
631 fdata
->cr_offset
= offset
;
633 if ((op
& 0xfc000003) == 0xf8000000 ||
634 (op
& 0xfc000000) == 0x90000000)
636 /* Does not update r1, so add displacement to cr_offset. */
637 fdata
->cr_offset
+= SIGNED_SHORT (op
);
642 else if (op
== 0x48000005)
648 else if (op
== 0x48000004)
653 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
654 in V.4 -mminimal-toc */
655 (op
& 0xffff0000) == 0x3bde0000)
656 { /* addi 30,30,foo@l */
660 else if ((op
& 0xfc000001) == 0x48000001)
664 fdata
->frameless
= 0;
665 /* Don't skip over the subroutine call if it is not within
666 the first three instructions of the prologue. */
667 if ((pc
- orig_pc
) > 8)
670 op
= read_memory_integer (pc
+ 4, 4);
672 /* At this point, make sure this is not a trampoline
673 function (a function that simply calls another functions,
674 and nothing else). If the next is not a nop, this branch
675 was part of the function prologue. */
677 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
678 break; /* don't skip over
683 /* update stack pointer */
684 else if ((op
& 0xfc1f0000) == 0x94010000)
685 { /* stu rX,NUM(r1) || stwu rX,NUM(r1) */
686 fdata
->frameless
= 0;
687 fdata
->offset
= SIGNED_SHORT (op
);
688 offset
= fdata
->offset
;
691 else if ((op
& 0xfc1f016a) == 0x7c01016e)
692 { /* stwux rX,r1,rY */
693 /* no way to figure out what r1 is going to be */
694 fdata
->frameless
= 0;
695 offset
= fdata
->offset
;
698 else if ((op
& 0xfc1f0003) == 0xf8010001)
699 { /* stdu rX,NUM(r1) */
700 fdata
->frameless
= 0;
701 fdata
->offset
= SIGNED_SHORT (op
& ~3UL);
702 offset
= fdata
->offset
;
705 else if ((op
& 0xfc1f016a) == 0x7c01016a)
706 { /* stdux rX,r1,rY */
707 /* no way to figure out what r1 is going to be */
708 fdata
->frameless
= 0;
709 offset
= fdata
->offset
;
712 /* Load up minimal toc pointer */
713 else if (((op
>> 22) == 0x20f || /* l r31,... or l r30,... */
714 (op
>> 22) == 0x3af) /* ld r31,... or ld r30,... */
715 && !minimal_toc_loaded
)
717 minimal_toc_loaded
= 1;
720 /* move parameters from argument registers to local variable
723 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
724 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
725 (((op
>> 21) & 31) <= 10) &&
726 ((long) ((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
730 /* store parameters in stack */
732 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
733 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
734 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
738 /* store parameters in stack via frame pointer */
741 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
742 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
743 (op
& 0xfc1f0000) == 0xfc1f0000))
744 { /* frsp, fp?,NUM(r1) */
747 /* Set up frame pointer */
749 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
752 fdata
->frameless
= 0;
754 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
+ 31);
757 /* Another way to set up the frame pointer. */
759 else if ((op
& 0xfc1fffff) == 0x38010000)
760 { /* addi rX, r1, 0x0 */
761 fdata
->frameless
= 0;
763 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
764 + ((op
& ~0x38010000) >> 21));
767 /* AltiVec related instructions. */
768 /* Store the vrsave register (spr 256) in another register for
769 later manipulation, or load a register into the vrsave
770 register. 2 instructions are used: mfvrsave and
771 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
772 and mtspr SPR256, Rn. */
773 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
774 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
775 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
777 vrsave_reg
= GET_SRC_REG (op
);
780 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
784 /* Store the register where vrsave was saved to onto the stack:
785 rS is the register where vrsave was stored in a previous
787 /* 100100 sssss 00001 dddddddd dddddddd */
788 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
790 if (vrsave_reg
== GET_SRC_REG (op
))
792 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
797 /* Compute the new value of vrsave, by modifying the register
798 where vrsave was saved to. */
799 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
800 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
804 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
805 in a pair of insns to save the vector registers on the
807 /* 001110 00000 00000 iiii iiii iiii iiii */
808 /* 001110 01110 00000 iiii iiii iiii iiii */
809 else if ((op
& 0xffff0000) == 0x38000000 /* li r0, SIMM */
810 || (op
& 0xffff0000) == 0x39c00000) /* li r14, SIMM */
813 vr_saved_offset
= SIGNED_SHORT (op
);
815 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
816 /* 011111 sssss 11111 00000 00111001110 */
817 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
819 if (pc
== (li_found_pc
+ 4))
821 vr_reg
= GET_SRC_REG (op
);
822 /* If this is the first vector reg to be saved, or if
823 it has a lower number than others previously seen,
824 reupdate the frame info. */
825 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
827 fdata
->saved_vr
= vr_reg
;
828 fdata
->vr_offset
= vr_saved_offset
+ offset
;
830 vr_saved_offset
= -1;
835 /* End AltiVec related instructions. */
837 /* Start BookE related instructions. */
838 /* Store gen register S at (r31+uimm).
839 Any register less than r13 is volatile, so we don't care. */
840 /* 000100 sssss 11111 iiiii 01100100001 */
841 else if (arch_info
->mach
== bfd_mach_ppc_e500
842 && (op
& 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
844 if ((op
& 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
847 ev_reg
= GET_SRC_REG (op
);
848 imm
= (op
>> 11) & 0x1f;
850 /* If this is the first vector reg to be saved, or if
851 it has a lower number than others previously seen,
852 reupdate the frame info. */
853 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
855 fdata
->saved_ev
= ev_reg
;
856 fdata
->ev_offset
= ev_offset
+ offset
;
861 /* Store gen register rS at (r1+rB). */
862 /* 000100 sssss 00001 bbbbb 01100100000 */
863 else if (arch_info
->mach
== bfd_mach_ppc_e500
864 && (op
& 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
866 if (pc
== (li_found_pc
+ 4))
868 ev_reg
= GET_SRC_REG (op
);
869 /* If this is the first vector reg to be saved, or if
870 it has a lower number than others previously seen,
871 reupdate the frame info. */
872 /* We know the contents of rB from the previous instruction. */
873 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
875 fdata
->saved_ev
= ev_reg
;
876 fdata
->ev_offset
= vr_saved_offset
+ offset
;
878 vr_saved_offset
= -1;
884 /* Store gen register r31 at (rA+uimm). */
885 /* 000100 11111 aaaaa iiiii 01100100001 */
886 else if (arch_info
->mach
== bfd_mach_ppc_e500
887 && (op
& 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
889 /* Wwe know that the source register is 31 already, but
890 it can't hurt to compute it. */
891 ev_reg
= GET_SRC_REG (op
);
892 ev_offset
= ((op
>> 11) & 0x1f) * 8;
893 /* If this is the first vector reg to be saved, or if
894 it has a lower number than others previously seen,
895 reupdate the frame info. */
896 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
898 fdata
->saved_ev
= ev_reg
;
899 fdata
->ev_offset
= ev_offset
+ offset
;
904 /* Store gen register S at (r31+r0).
905 Store param on stack when offset from SP bigger than 4 bytes. */
906 /* 000100 sssss 11111 00000 01100100000 */
907 else if (arch_info
->mach
== bfd_mach_ppc_e500
908 && (op
& 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
910 if (pc
== (li_found_pc
+ 4))
912 if ((op
& 0x03e00000) >= 0x01a00000)
914 ev_reg
= GET_SRC_REG (op
);
915 /* If this is the first vector reg to be saved, or if
916 it has a lower number than others previously seen,
917 reupdate the frame info. */
918 /* We know the contents of r0 from the previous
920 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
922 fdata
->saved_ev
= ev_reg
;
923 fdata
->ev_offset
= vr_saved_offset
+ offset
;
927 vr_saved_offset
= -1;
932 /* End BookE related instructions. */
936 /* Not a recognized prologue instruction.
937 Handle optimizer code motions into the prologue by continuing
938 the search if we have no valid frame yet or if the return
939 address is not yet saved in the frame. */
940 if (fdata
->frameless
== 0
941 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
944 if (op
== 0x4e800020 /* blr */
945 || op
== 0x4e800420) /* bctr */
946 /* Do not scan past epilogue in frameless functions or
949 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
950 /* Never skip branches. */
953 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
954 /* Do not scan too many insns, scanning insns is expensive with
958 /* Continue scanning. */
959 prev_insn_was_prologue_insn
= 0;
965 /* I have problems with skipping over __main() that I need to address
966 * sometime. Previously, I used to use misc_function_vector which
967 * didn't work as well as I wanted to be. -MGO */
969 /* If the first thing after skipping a prolog is a branch to a function,
970 this might be a call to an initializer in main(), introduced by gcc2.
971 We'd like to skip over it as well. Fortunately, xlc does some extra
972 work before calling a function right after a prologue, thus we can
973 single out such gcc2 behaviour. */
976 if ((op
& 0xfc000001) == 0x48000001)
977 { /* bl foo, an initializer function? */
978 op
= read_memory_integer (pc
+ 4, 4);
980 if (op
== 0x4def7b82)
981 { /* cror 0xf, 0xf, 0xf (nop) */
983 /* Check and see if we are in main. If so, skip over this
984 initializer function as well. */
986 tmp
= find_pc_misc_function (pc
);
987 if (tmp
>= 0 && STREQ (misc_function_vector
[tmp
].name
, main_name ()))
993 fdata
->offset
= -fdata
->offset
;
994 return last_prologue_pc
;
998 /*************************************************************************
999 Support for creating pushing a dummy frame into the stack, and popping
1001 *************************************************************************/
1004 /* Pop the innermost frame, go back to the caller. */
1007 rs6000_pop_frame (void)
1009 CORE_ADDR pc
, lr
, sp
, prev_sp
, addr
; /* %pc, %lr, %sp */
1010 struct rs6000_framedata fdata
;
1011 struct frame_info
*frame
= get_current_frame ();
1015 sp
= get_frame_base (frame
);
1017 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
1018 get_frame_base (frame
),
1019 get_frame_base (frame
)))
1021 generic_pop_dummy_frame ();
1022 flush_cached_frames ();
1026 /* Make sure that all registers are valid. */
1027 deprecated_read_register_bytes (0, NULL
, DEPRECATED_REGISTER_BYTES
);
1029 /* Figure out previous %pc value. If the function is frameless, it is
1030 still in the link register, otherwise walk the frames and retrieve the
1031 saved %pc value in the previous frame. */
1033 addr
= get_frame_func (frame
);
1034 (void) skip_prologue (addr
, get_frame_pc (frame
), &fdata
);
1036 wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1037 if (fdata
.frameless
)
1040 prev_sp
= read_memory_addr (sp
, wordsize
);
1041 if (fdata
.lr_offset
== 0)
1042 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1044 lr
= read_memory_addr (prev_sp
+ fdata
.lr_offset
, wordsize
);
1046 /* reset %pc value. */
1047 write_register (PC_REGNUM
, lr
);
1049 /* reset register values if any was saved earlier. */
1051 if (fdata
.saved_gpr
!= -1)
1053 addr
= prev_sp
+ fdata
.gpr_offset
;
1054 for (ii
= fdata
.saved_gpr
; ii
<= 31; ++ii
)
1056 read_memory (addr
, &deprecated_registers
[REGISTER_BYTE (ii
)],
1062 if (fdata
.saved_fpr
!= -1)
1064 addr
= prev_sp
+ fdata
.fpr_offset
;
1065 for (ii
= fdata
.saved_fpr
; ii
<= 31; ++ii
)
1067 read_memory (addr
, &deprecated_registers
[REGISTER_BYTE (ii
+ FP0_REGNUM
)], 8);
1072 write_register (SP_REGNUM
, prev_sp
);
1073 target_store_registers (-1);
1074 flush_cached_frames ();
1077 /* Fixup the call sequence of a dummy function, with the real function
1078 address. Its arguments will be passed by gdb. */
1081 rs6000_fix_call_dummy (char *dummyname
, CORE_ADDR pc
, CORE_ADDR fun
,
1082 int nargs
, struct value
**args
, struct type
*type
,
1086 CORE_ADDR target_addr
;
1088 if (rs6000_find_toc_address_hook
!= NULL
)
1090 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (fun
);
1091 write_register (gdbarch_tdep (current_gdbarch
)->ppc_toc_regnum
,
1096 /* All the ABI's require 16 byte alignment. */
1098 rs6000_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1100 return (addr
& -16);
1103 /* Pass the arguments in either registers, or in the stack. In RS/6000,
1104 the first eight words of the argument list (that might be less than
1105 eight parameters if some parameters occupy more than one word) are
1106 passed in r3..r10 registers. float and double parameters are
1107 passed in fpr's, in addition to that. Rest of the parameters if any
1108 are passed in user stack. There might be cases in which half of the
1109 parameter is copied into registers, the other half is pushed into
1112 Stack must be aligned on 64-bit boundaries when synthesizing
1115 If the function is returning a structure, then the return address is passed
1116 in r3, then the first 7 words of the parameters can be passed in registers,
1117 starting from r4. */
1120 rs6000_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1121 int struct_return
, CORE_ADDR struct_addr
)
1125 int argno
; /* current argument number */
1126 int argbytes
; /* current argument byte */
1127 char tmp_buffer
[50];
1128 int f_argno
= 0; /* current floating point argno */
1129 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1131 struct value
*arg
= 0;
1136 /* The first eight words of ther arguments are passed in registers.
1137 Copy them appropriately.
1139 If the function is returning a `struct', then the first word (which
1140 will be passed in r3) is used for struct return address. In that
1141 case we should advance one word and start from r4 register to copy
1144 ii
= struct_return
? 1 : 0;
1147 effectively indirect call... gcc does...
1149 return_val example( float, int);
1152 float in fp0, int in r3
1153 offset of stack on overflow 8/16
1154 for varargs, must go by type.
1156 float in r3&r4, int in r5
1157 offset of stack on overflow different
1159 return in r3 or f0. If no float, must study how gcc emulates floats;
1160 pay attention to arg promotion.
1161 User may have to cast\args to handle promotion correctly
1162 since gdb won't know if prototype supplied or not.
1165 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
1167 int reg_size
= REGISTER_RAW_SIZE (ii
+ 3);
1170 type
= check_typedef (VALUE_TYPE (arg
));
1171 len
= TYPE_LENGTH (type
);
1173 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1176 /* Floating point arguments are passed in fpr's, as well as gpr's.
1177 There are 13 fpr's reserved for passing parameters. At this point
1178 there is no way we would run out of them. */
1182 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1184 memcpy (&deprecated_registers
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1185 VALUE_CONTENTS (arg
),
1193 /* Argument takes more than one register. */
1194 while (argbytes
< len
)
1196 memset (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)], 0,
1198 memcpy (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)],
1199 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1200 (len
- argbytes
) > reg_size
1201 ? reg_size
: len
- argbytes
);
1202 ++ii
, argbytes
+= reg_size
;
1205 goto ran_out_of_registers_for_arguments
;
1212 /* Argument can fit in one register. No problem. */
1213 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1214 memset (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1215 memcpy ((char *)&deprecated_registers
[REGISTER_BYTE (ii
+ 3)] + adj
,
1216 VALUE_CONTENTS (arg
), len
);
1221 ran_out_of_registers_for_arguments
:
1223 saved_sp
= read_sp ();
1225 /* Location for 8 parameters are always reserved. */
1228 /* Another six words for back chain, TOC register, link register, etc. */
1231 /* Stack pointer must be quadword aligned. */
1234 /* If there are more arguments, allocate space for them in
1235 the stack, then push them starting from the ninth one. */
1237 if ((argno
< nargs
) || argbytes
)
1243 space
+= ((len
- argbytes
+ 3) & -4);
1249 for (; jj
< nargs
; ++jj
)
1251 struct value
*val
= args
[jj
];
1252 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1255 /* Add location required for the rest of the parameters. */
1256 space
= (space
+ 15) & -16;
1259 /* This is another instance we need to be concerned about
1260 securing our stack space. If we write anything underneath %sp
1261 (r1), we might conflict with the kernel who thinks he is free
1262 to use this area. So, update %sp first before doing anything
1265 write_register (SP_REGNUM
, sp
);
1267 /* If the last argument copied into the registers didn't fit there
1268 completely, push the rest of it into stack. */
1272 write_memory (sp
+ 24 + (ii
* 4),
1273 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1276 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1279 /* Push the rest of the arguments into stack. */
1280 for (; argno
< nargs
; ++argno
)
1284 type
= check_typedef (VALUE_TYPE (arg
));
1285 len
= TYPE_LENGTH (type
);
1288 /* Float types should be passed in fpr's, as well as in the
1290 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1295 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1297 memcpy (&deprecated_registers
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1298 VALUE_CONTENTS (arg
),
1303 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1304 ii
+= ((len
+ 3) & -4) / 4;
1308 /* Secure stack areas first, before doing anything else. */
1309 write_register (SP_REGNUM
, sp
);
1311 /* set back chain properly */
1312 store_unsigned_integer (tmp_buffer
, 4, saved_sp
);
1313 write_memory (sp
, tmp_buffer
, 4);
1315 target_store_registers (-1);
1319 /* Function: ppc_push_return_address (pc, sp)
1320 Set up the return address for the inferior function call. */
1323 ppc_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1325 write_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
,
1326 CALL_DUMMY_ADDRESS ());
1330 /* Extract a function return value of type TYPE from raw register array
1331 REGBUF, and copy that return value into VALBUF in virtual format. */
1333 e500_extract_return_value (struct type
*valtype
, struct regcache
*regbuf
, void *valbuf
)
1336 int vallen
= TYPE_LENGTH (valtype
);
1337 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1339 if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1341 && TYPE_VECTOR (valtype
))
1343 regcache_raw_read (regbuf
, tdep
->ppc_ev0_regnum
+ 3, valbuf
);
1347 /* Return value is copied starting from r3. Note that r3 for us
1348 is a pseudo register. */
1350 int return_regnum
= tdep
->ppc_gp0_regnum
+ 3;
1351 int reg_size
= REGISTER_RAW_SIZE (return_regnum
);
1357 /* Compute where we will start storing the value from. */
1358 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1360 if (vallen
<= reg_size
)
1361 offset
= reg_size
- vallen
;
1363 offset
= reg_size
+ (reg_size
- vallen
);
1366 /* How big does the local buffer need to be? */
1367 if (vallen
<= reg_size
)
1368 val_buffer
= alloca (reg_size
);
1370 val_buffer
= alloca (vallen
);
1372 /* Read all we need into our private buffer. We copy it in
1373 chunks that are as long as one register, never shorter, even
1374 if the value is smaller than the register. */
1375 while (copied
< vallen
)
1377 reg_part_size
= REGISTER_RAW_SIZE (return_regnum
+ i
);
1378 /* It is a pseudo/cooked register. */
1379 regcache_cooked_read (regbuf
, return_regnum
+ i
,
1380 val_buffer
+ copied
);
1381 copied
+= reg_part_size
;
1384 /* Put the stuff in the return buffer. */
1385 memcpy (valbuf
, val_buffer
+ offset
, vallen
);
1390 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1393 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1395 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1400 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1401 We need to truncate the return value into float size (4 byte) if
1404 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1406 ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)],
1407 TYPE_LENGTH (valtype
));
1410 memcpy (&dd
, ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1412 memcpy (valbuf
, &ff
, sizeof (float));
1415 else if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1416 && TYPE_LENGTH (valtype
) == 16
1417 && TYPE_VECTOR (valtype
))
1419 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1420 TYPE_LENGTH (valtype
));
1424 /* return value is copied starting from r3. */
1425 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1426 && TYPE_LENGTH (valtype
) < REGISTER_RAW_SIZE (3))
1427 offset
= REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1430 regbuf
+ REGISTER_BYTE (3) + offset
,
1431 TYPE_LENGTH (valtype
));
1435 /* Return whether handle_inferior_event() should proceed through code
1436 starting at PC in function NAME when stepping.
1438 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1439 handle memory references that are too distant to fit in instructions
1440 generated by the compiler. For example, if 'foo' in the following
1445 is greater than 32767, the linker might replace the lwz with a branch to
1446 somewhere in @FIX1 that does the load in 2 instructions and then branches
1447 back to where execution should continue.
1449 GDB should silently step over @FIX code, just like AIX dbx does.
1450 Unfortunately, the linker uses the "b" instruction for the branches,
1451 meaning that the link register doesn't get set. Therefore, GDB's usual
1452 step_over_function() mechanism won't work.
1454 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1455 in handle_inferior_event() to skip past @FIX code. */
1458 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1460 return name
&& !strncmp (name
, "@FIX", 4);
1463 /* Skip code that the user doesn't want to see when stepping:
1465 1. Indirect function calls use a piece of trampoline code to do context
1466 switching, i.e. to set the new TOC table. Skip such code if we are on
1467 its first instruction (as when we have single-stepped to here).
1469 2. Skip shared library trampoline code (which is different from
1470 indirect function call trampolines).
1472 3. Skip bigtoc fixup code.
1474 Result is desired PC to step until, or NULL if we are not in
1475 code that should be skipped. */
1478 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1480 register unsigned int ii
, op
;
1482 CORE_ADDR solib_target_pc
;
1483 struct minimal_symbol
*msymbol
;
1485 static unsigned trampoline_code
[] =
1487 0x800b0000, /* l r0,0x0(r11) */
1488 0x90410014, /* st r2,0x14(r1) */
1489 0x7c0903a6, /* mtctr r0 */
1490 0x804b0004, /* l r2,0x4(r11) */
1491 0x816b0008, /* l r11,0x8(r11) */
1492 0x4e800420, /* bctr */
1493 0x4e800020, /* br */
1497 /* Check for bigtoc fixup code. */
1498 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1499 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, DEPRECATED_SYMBOL_NAME (msymbol
)))
1501 /* Double-check that the third instruction from PC is relative "b". */
1502 op
= read_memory_integer (pc
+ 8, 4);
1503 if ((op
& 0xfc000003) == 0x48000000)
1505 /* Extract bits 6-29 as a signed 24-bit relative word address and
1506 add it to the containing PC. */
1507 rel
= ((int)(op
<< 6) >> 6);
1508 return pc
+ 8 + rel
;
1512 /* If pc is in a shared library trampoline, return its target. */
1513 solib_target_pc
= find_solib_trampoline_target (pc
);
1514 if (solib_target_pc
)
1515 return solib_target_pc
;
1517 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1519 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1520 if (op
!= trampoline_code
[ii
])
1523 ii
= read_register (11); /* r11 holds destination addr */
1524 pc
= read_memory_addr (ii
, gdbarch_tdep (current_gdbarch
)->wordsize
); /* (r11) value */
1528 /* Determines whether the function FI has a frame on the stack or not. */
1531 rs6000_frameless_function_invocation (struct frame_info
*fi
)
1533 CORE_ADDR func_start
;
1534 struct rs6000_framedata fdata
;
1536 /* Don't even think about framelessness except on the innermost frame
1537 or if the function was interrupted by a signal. */
1538 if (get_next_frame (fi
) != NULL
1539 && !(get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1542 func_start
= get_frame_func (fi
);
1544 /* If we failed to find the start of the function, it is a mistake
1545 to inspect the instructions. */
1549 /* A frame with a zero PC is usually created by dereferencing a NULL
1550 function pointer, normally causing an immediate core dump of the
1551 inferior. Mark function as frameless, as the inferior has no chance
1552 of setting up a stack frame. */
1553 if (get_frame_pc (fi
) == 0)
1559 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1560 return fdata
.frameless
;
1563 /* Return the PC saved in a frame. */
1566 rs6000_frame_saved_pc (struct frame_info
*fi
)
1568 CORE_ADDR func_start
;
1569 struct rs6000_framedata fdata
;
1570 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1571 int wordsize
= tdep
->wordsize
;
1573 if ((get_frame_type (fi
) == SIGTRAMP_FRAME
))
1574 return read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
1577 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1578 get_frame_base (fi
),
1579 get_frame_base (fi
)))
1580 return deprecated_read_register_dummy (get_frame_pc (fi
),
1581 get_frame_base (fi
), PC_REGNUM
);
1583 func_start
= get_frame_func (fi
);
1585 /* If we failed to find the start of the function, it is a mistake
1586 to inspect the instructions. */
1590 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1592 if (fdata
.lr_offset
== 0 && get_next_frame (fi
) != NULL
)
1594 if ((get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1595 return read_memory_addr ((get_frame_base (get_next_frame (fi
))
1596 + SIG_FRAME_LR_OFFSET
),
1598 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1599 /* The link register wasn't saved by this frame and the next
1600 (inner, newer) frame is a dummy. Get the link register
1601 value by unwinding it from that [dummy] frame. */
1604 frame_unwind_unsigned_register (get_next_frame (fi
),
1605 tdep
->ppc_lr_regnum
, &lr
);
1609 return read_memory_addr (DEPRECATED_FRAME_CHAIN (fi
)
1610 + tdep
->lr_frame_offset
,
1614 if (fdata
.lr_offset
== 0)
1615 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1617 return read_memory_addr (DEPRECATED_FRAME_CHAIN (fi
) + fdata
.lr_offset
,
1621 /* If saved registers of frame FI are not known yet, read and cache them.
1622 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1623 in which case the framedata are read. */
1626 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1628 CORE_ADDR frame_addr
;
1629 struct rs6000_framedata work_fdata
;
1630 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1631 int wordsize
= tdep
->wordsize
;
1633 if (get_frame_saved_regs (fi
))
1638 fdatap
= &work_fdata
;
1639 (void) skip_prologue (get_frame_func (fi
), get_frame_pc (fi
), fdatap
);
1642 frame_saved_regs_zalloc (fi
);
1644 /* If there were any saved registers, figure out parent's stack
1646 /* The following is true only if the frame doesn't have a call to
1649 if (fdatap
->saved_fpr
== 0
1650 && fdatap
->saved_gpr
== 0
1651 && fdatap
->saved_vr
== 0
1652 && fdatap
->saved_ev
== 0
1653 && fdatap
->lr_offset
== 0
1654 && fdatap
->cr_offset
== 0
1655 && fdatap
->vr_offset
== 0
1656 && fdatap
->ev_offset
== 0)
1659 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1660 address of the current frame. Things might be easier if the
1661 ->frame pointed to the outer-most address of the frame. In the
1662 mean time, the address of the prev frame is used as the base
1663 address of this frame. */
1664 frame_addr
= DEPRECATED_FRAME_CHAIN (fi
);
1666 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1667 All fpr's from saved_fpr to fp31 are saved. */
1669 if (fdatap
->saved_fpr
>= 0)
1672 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1673 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1675 get_frame_saved_regs (fi
)[FP0_REGNUM
+ i
] = fpr_addr
;
1680 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1681 All gpr's from saved_gpr to gpr31 are saved. */
1683 if (fdatap
->saved_gpr
>= 0)
1686 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1687 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1689 get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = gpr_addr
;
1690 gpr_addr
+= wordsize
;
1694 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1695 All vr's from saved_vr to vr31 are saved. */
1696 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1698 if (fdatap
->saved_vr
>= 0)
1701 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1702 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1704 get_frame_saved_regs (fi
)[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1705 vr_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1710 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1711 All vr's from saved_ev to ev31 are saved. ????? */
1712 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
1714 if (fdatap
->saved_ev
>= 0)
1717 CORE_ADDR ev_addr
= frame_addr
+ fdatap
->ev_offset
;
1718 for (i
= fdatap
->saved_ev
; i
< 32; i
++)
1720 get_frame_saved_regs (fi
)[tdep
->ppc_ev0_regnum
+ i
] = ev_addr
;
1721 get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = ev_addr
+ 4;
1722 ev_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_ev0_regnum
);
1727 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1729 if (fdatap
->cr_offset
!= 0)
1730 get_frame_saved_regs (fi
)[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1732 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1734 if (fdatap
->lr_offset
!= 0)
1735 get_frame_saved_regs (fi
)[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1737 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1739 if (fdatap
->vrsave_offset
!= 0)
1740 get_frame_saved_regs (fi
)[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1743 /* Return the address of a frame. This is the inital %sp value when the frame
1744 was first allocated. For functions calling alloca(), it might be saved in
1745 an alloca register. */
1748 frame_initial_stack_address (struct frame_info
*fi
)
1751 struct rs6000_framedata fdata
;
1752 struct frame_info
*callee_fi
;
1754 /* If the initial stack pointer (frame address) of this frame is known,
1757 if (get_frame_extra_info (fi
)->initial_sp
)
1758 return get_frame_extra_info (fi
)->initial_sp
;
1760 /* Find out if this function is using an alloca register. */
1762 (void) skip_prologue (get_frame_func (fi
), get_frame_pc (fi
), &fdata
);
1764 /* If saved registers of this frame are not known yet, read and
1767 if (!get_frame_saved_regs (fi
))
1768 frame_get_saved_regs (fi
, &fdata
);
1770 /* If no alloca register used, then fi->frame is the value of the %sp for
1771 this frame, and it is good enough. */
1773 if (fdata
.alloca_reg
< 0)
1775 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1776 return get_frame_extra_info (fi
)->initial_sp
;
1779 /* There is an alloca register, use its value, in the current frame,
1780 as the initial stack pointer. */
1782 char tmpbuf
[MAX_REGISTER_SIZE
];
1783 if (frame_register_read (fi
, fdata
.alloca_reg
, tmpbuf
))
1785 get_frame_extra_info (fi
)->initial_sp
1786 = extract_unsigned_integer (tmpbuf
,
1787 REGISTER_RAW_SIZE (fdata
.alloca_reg
));
1790 /* NOTE: cagney/2002-04-17: At present the only time
1791 frame_register_read will fail is when the register isn't
1792 available. If that does happen, use the frame. */
1793 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1795 return get_frame_extra_info (fi
)->initial_sp
;
1798 /* Describe the pointer in each stack frame to the previous stack frame
1801 /* DEPRECATED_FRAME_CHAIN takes a frame's nominal address and produces
1802 the frame's chain-pointer. */
1804 /* In the case of the RS/6000, the frame's nominal address
1805 is the address of a 4-byte word containing the calling frame's address. */
1808 rs6000_frame_chain (struct frame_info
*thisframe
)
1810 CORE_ADDR fp
, fpp
, lr
;
1811 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1813 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (thisframe
),
1814 get_frame_base (thisframe
),
1815 get_frame_base (thisframe
)))
1816 /* A dummy frame always correctly chains back to the previous
1818 return read_memory_addr (get_frame_base (thisframe
), wordsize
);
1820 if (inside_entry_file (get_frame_pc (thisframe
))
1821 || get_frame_pc (thisframe
) == entry_point_address ())
1824 if ((get_frame_type (thisframe
) == SIGTRAMP_FRAME
))
1825 fp
= read_memory_addr (get_frame_base (thisframe
) + SIG_FRAME_FP_OFFSET
,
1827 else if (get_next_frame (thisframe
) != NULL
1828 && (get_frame_type (get_next_frame (thisframe
)) == SIGTRAMP_FRAME
)
1829 && FRAMELESS_FUNCTION_INVOCATION (thisframe
))
1830 /* A frameless function interrupted by a signal did not change the
1832 fp
= get_frame_base (thisframe
);
1834 fp
= read_memory_addr (get_frame_base (thisframe
), wordsize
);
1838 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1839 isn't available with that word size, return 0. */
1842 regsize (const struct reg
*reg
, int wordsize
)
1844 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1847 /* Return the name of register number N, or null if no such register exists
1848 in the current architecture. */
1851 rs6000_register_name (int n
)
1853 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1854 const struct reg
*reg
= tdep
->regs
+ n
;
1856 if (!regsize (reg
, tdep
->wordsize
))
1861 /* Index within `registers' of the first byte of the space for
1865 rs6000_register_byte (int n
)
1867 return gdbarch_tdep (current_gdbarch
)->regoff
[n
];
1870 /* Return the number of bytes of storage in the actual machine representation
1871 for register N if that register is available, else return 0. */
1874 rs6000_register_raw_size (int n
)
1876 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1877 const struct reg
*reg
= tdep
->regs
+ n
;
1878 return regsize (reg
, tdep
->wordsize
);
1881 /* Return the GDB type object for the "standard" data type
1882 of data in register N. */
1884 static struct type
*
1885 rs6000_register_virtual_type (int n
)
1887 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1888 const struct reg
*reg
= tdep
->regs
+ n
;
1891 return builtin_type_double
;
1894 int size
= regsize (reg
, tdep
->wordsize
);
1898 if (tdep
->ppc_ev0_regnum
<= n
&& n
<= tdep
->ppc_ev31_regnum
)
1899 return builtin_type_vec64
;
1901 return builtin_type_int64
;
1904 return builtin_type_vec128
;
1907 return builtin_type_int32
;
1913 /* Return whether register N requires conversion when moving from raw format
1916 The register format for RS/6000 floating point registers is always
1917 double, we need a conversion if the memory format is float. */
1920 rs6000_register_convertible (int n
)
1922 const struct reg
*reg
= gdbarch_tdep (current_gdbarch
)->regs
+ n
;
1926 /* Convert data from raw format for register N in buffer FROM
1927 to virtual format with type TYPE in buffer TO. */
1930 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1931 char *from
, char *to
)
1933 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1935 double val
= deprecated_extract_floating (from
, REGISTER_RAW_SIZE (n
));
1936 deprecated_store_floating (to
, TYPE_LENGTH (type
), val
);
1939 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1942 /* Convert data from virtual format with type TYPE in buffer FROM
1943 to raw format for register N in buffer TO. */
1946 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1947 const char *from
, char *to
)
1949 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1951 double val
= deprecated_extract_floating (from
, TYPE_LENGTH (type
));
1952 deprecated_store_floating (to
, REGISTER_RAW_SIZE (n
), val
);
1955 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1959 e500_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1960 int reg_nr
, void *buffer
)
1964 char temp_buffer
[MAX_REGISTER_SIZE
];
1965 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1967 if (reg_nr
>= tdep
->ppc_gp0_regnum
1968 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1970 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1972 /* Build the value in the provided buffer. */
1973 /* Read the raw register of which this one is the lower portion. */
1974 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1975 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1977 memcpy ((char *) buffer
, temp_buffer
+ offset
, 4);
1982 e500_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1983 int reg_nr
, const void *buffer
)
1987 char temp_buffer
[MAX_REGISTER_SIZE
];
1988 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1990 if (reg_nr
>= tdep
->ppc_gp0_regnum
1991 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1993 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1994 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1995 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1998 /* Let's read the value of the base register into a temporary
1999 buffer, so that overwriting the last four bytes with the new
2000 value of the pseudo will leave the upper 4 bytes unchanged. */
2001 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
2003 /* Write as an 8 byte quantity. */
2004 memcpy (temp_buffer
+ offset
, (char *) buffer
, 4);
2005 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
2009 /* Convert a dwarf2 register number to a gdb REGNUM. */
2011 e500_dwarf2_reg_to_regnum (int num
)
2014 if (0 <= num
&& num
<= 31)
2015 return num
+ gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
;
2020 /* Convert a dbx stab register number (from `r' declaration) to a gdb
2023 rs6000_stab_reg_to_regnum (int num
)
2029 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
2032 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
2035 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
2038 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
2047 /* Store the address of the place in which to copy the structure the
2048 subroutine will return. */
2051 rs6000_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2053 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2054 write_register (tdep
->ppc_gp0_regnum
+ 3, addr
);
2057 /* Write into appropriate registers a function return value
2058 of type TYPE, given in virtual format. */
2060 e500_store_return_value (struct type
*type
, char *valbuf
)
2062 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2064 /* Everything is returned in GPR3 and up. */
2067 int len
= TYPE_LENGTH (type
);
2068 while (copied
< len
)
2070 int regnum
= gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3 + i
;
2071 int reg_size
= REGISTER_RAW_SIZE (regnum
);
2072 char *reg_val_buf
= alloca (reg_size
);
2074 memcpy (reg_val_buf
, valbuf
+ copied
, reg_size
);
2076 deprecated_write_register_gen (regnum
, reg_val_buf
);
2082 rs6000_store_return_value (struct type
*type
, char *valbuf
)
2084 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2086 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2088 /* Floating point values are returned starting from FPR1 and up.
2089 Say a double_double_double type could be returned in
2090 FPR1/FPR2/FPR3 triple. */
2092 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
2093 TYPE_LENGTH (type
));
2094 else if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
2096 if (TYPE_LENGTH (type
) == 16
2097 && TYPE_VECTOR (type
))
2098 deprecated_write_register_bytes (REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
2099 valbuf
, TYPE_LENGTH (type
));
2102 /* Everything else is returned in GPR3 and up. */
2103 deprecated_write_register_bytes (REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
2104 valbuf
, TYPE_LENGTH (type
));
2107 /* Extract from an array REGBUF containing the (raw) register state
2108 the address in which a function should return its structure value,
2109 as a CORE_ADDR (or an expression that can be used as one). */
2112 rs6000_extract_struct_value_address (struct regcache
*regcache
)
2114 /* FIXME: cagney/2002-09-26: PR gdb/724: When making an inferior
2115 function call GDB knows the address of the struct return value
2116 and hence, should not need to call this function. Unfortunately,
2117 the current call_function_by_hand() code only saves the most
2118 recent struct address leading to occasional calls. The code
2119 should instead maintain a stack of such addresses (in the dummy
2121 /* NOTE: cagney/2002-09-26: Return 0 which indicates that we've
2122 really got no idea where the return value is being stored. While
2123 r3, on function entry, contained the address it will have since
2124 been reused (scratch) and hence wouldn't be valid */
2128 /* Return whether PC is in a dummy function call.
2130 FIXME: This just checks for the end of the stack, which is broken
2131 for things like stepping through gcc nested function stubs. */
2134 rs6000_pc_in_call_dummy (CORE_ADDR pc
, CORE_ADDR sp
, CORE_ADDR fp
)
2136 return sp
< pc
&& pc
< fp
;
2139 /* Hook called when a new child process is started. */
2142 rs6000_create_inferior (int pid
)
2144 if (rs6000_set_host_arch_hook
)
2145 rs6000_set_host_arch_hook (pid
);
2148 /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
2150 Usually a function pointer's representation is simply the address
2151 of the function. On the RS/6000 however, a function pointer is
2152 represented by a pointer to a TOC entry. This TOC entry contains
2153 three words, the first word is the address of the function, the
2154 second word is the TOC pointer (r2), and the third word is the
2155 static chain value. Throughout GDB it is currently assumed that a
2156 function pointer contains the address of the function, which is not
2157 easy to fix. In addition, the conversion of a function address to
2158 a function pointer would require allocation of a TOC entry in the
2159 inferior's memory space, with all its drawbacks. To be able to
2160 call C++ virtual methods in the inferior (which are called via
2161 function pointers), find_function_addr uses this function to get the
2162 function address from a function pointer. */
2164 /* Return real function address if ADDR (a function pointer) is in the data
2165 space and is therefore a special function pointer. */
2168 rs6000_convert_from_func_ptr_addr (CORE_ADDR addr
)
2170 struct obj_section
*s
;
2172 s
= find_pc_section (addr
);
2173 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
2176 /* ADDR is in the data space, so it's a special function pointer. */
2177 return read_memory_addr (addr
, gdbarch_tdep (current_gdbarch
)->wordsize
);
2181 /* Handling the various POWER/PowerPC variants. */
2184 /* The arrays here called registers_MUMBLE hold information about available
2187 For each family of PPC variants, I've tried to isolate out the
2188 common registers and put them up front, so that as long as you get
2189 the general family right, GDB will correctly identify the registers
2190 common to that family. The common register sets are:
2192 For the 60x family: hid0 hid1 iabr dabr pir
2194 For the 505 and 860 family: eie eid nri
2196 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
2197 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
2200 Most of these register groups aren't anything formal. I arrived at
2201 them by looking at the registers that occurred in more than one
2204 Note: kevinb/2002-04-30: Support for the fpscr register was added
2205 during April, 2002. Slot 70 is being used for PowerPC and slot 71
2206 for Power. For PowerPC, slot 70 was unused and was already in the
2207 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
2208 slot 70 was being used for "mq", so the next available slot (71)
2209 was chosen. It would have been nice to be able to make the
2210 register numbers the same across processor cores, but this wasn't
2211 possible without either 1) renumbering some registers for some
2212 processors or 2) assigning fpscr to a really high slot that's
2213 larger than any current register number. Doing (1) is bad because
2214 existing stubs would break. Doing (2) is undesirable because it
2215 would introduce a really large gap between fpscr and the rest of
2216 the registers for most processors. */
2218 /* Convenience macros for populating register arrays. */
2220 /* Within another macro, convert S to a string. */
2224 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
2225 and 64 bits on 64-bit systems. */
2226 #define R(name) { STR(name), 4, 8, 0, 0 }
2228 /* Return a struct reg defining register NAME that's 32 bits on all
2230 #define R4(name) { STR(name), 4, 4, 0, 0 }
2232 /* Return a struct reg defining register NAME that's 64 bits on all
2234 #define R8(name) { STR(name), 8, 8, 0, 0 }
2236 /* Return a struct reg defining register NAME that's 128 bits on all
2238 #define R16(name) { STR(name), 16, 16, 0, 0 }
2240 /* Return a struct reg defining floating-point register NAME. */
2241 #define F(name) { STR(name), 8, 8, 1, 0 }
2243 /* Return a struct reg defining a pseudo register NAME. */
2244 #define P(name) { STR(name), 4, 8, 0, 1}
2246 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
2247 systems and that doesn't exist on 64-bit systems. */
2248 #define R32(name) { STR(name), 4, 0, 0, 0 }
2250 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
2251 systems and that doesn't exist on 32-bit systems. */
2252 #define R64(name) { STR(name), 0, 8, 0, 0 }
2254 /* Return a struct reg placeholder for a register that doesn't exist. */
2255 #define R0 { 0, 0, 0, 0, 0 }
2257 /* UISA registers common across all architectures, including POWER. */
2259 #define COMMON_UISA_REGS \
2260 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2261 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2262 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2263 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2264 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
2265 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
2266 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
2267 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
2268 /* 64 */ R(pc), R(ps)
2270 #define COMMON_UISA_NOFP_REGS \
2271 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2272 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2273 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2274 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2275 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2276 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2277 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2278 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2279 /* 64 */ R(pc), R(ps)
2281 /* UISA-level SPRs for PowerPC. */
2282 #define PPC_UISA_SPRS \
2283 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
2285 /* UISA-level SPRs for PowerPC without floating point support. */
2286 #define PPC_UISA_NOFP_SPRS \
2287 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
2289 /* Segment registers, for PowerPC. */
2290 #define PPC_SEGMENT_REGS \
2291 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2292 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2293 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2294 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2296 /* OEA SPRs for PowerPC. */
2297 #define PPC_OEA_SPRS \
2299 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2300 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2301 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2302 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2303 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2304 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2305 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2306 /* 116 */ R4(dec), R(dabr), R4(ear)
2308 /* AltiVec registers. */
2309 #define PPC_ALTIVEC_REGS \
2310 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2311 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2312 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2313 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2314 /*151*/R4(vscr), R4(vrsave)
2316 /* Vectors of hi-lo general purpose registers. */
2317 #define PPC_EV_REGS \
2318 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
2319 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
2320 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
2321 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2323 /* Lower half of the EV registers. */
2324 #define PPC_GPRS_PSEUDO_REGS \
2325 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2326 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2327 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2328 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31)
2330 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2331 user-level SPR's. */
2332 static const struct reg registers_power
[] =
2335 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
2339 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2340 view of the PowerPC. */
2341 static const struct reg registers_powerpc
[] =
2348 /* PowerPC UISA - a PPC processor as viewed by user-level
2349 code, but without floating point registers. */
2350 static const struct reg registers_powerpc_nofp
[] =
2352 COMMON_UISA_NOFP_REGS
,
2356 /* IBM PowerPC 403. */
2357 static const struct reg registers_403
[] =
2363 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2364 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2365 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2366 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2367 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2368 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
2371 /* IBM PowerPC 403GC. */
2372 static const struct reg registers_403GC
[] =
2378 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2379 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2380 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2381 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2382 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2383 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2384 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2385 /* 147 */ R(tbhu
), R(tblu
)
2388 /* Motorola PowerPC 505. */
2389 static const struct reg registers_505
[] =
2395 /* 119 */ R(eie
), R(eid
), R(nri
)
2398 /* Motorola PowerPC 860 or 850. */
2399 static const struct reg registers_860
[] =
2405 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2406 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2407 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2408 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2409 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2410 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2411 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2412 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2413 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2414 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2415 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2416 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2419 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2420 for reading and writing RTCU and RTCL. However, how one reads and writes a
2421 register is the stub's problem. */
2422 static const struct reg registers_601
[] =
2428 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2429 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2432 /* Motorola PowerPC 602. */
2433 static const struct reg registers_602
[] =
2439 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2440 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2441 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2444 /* Motorola/IBM PowerPC 603 or 603e. */
2445 static const struct reg registers_603
[] =
2451 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2452 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2453 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2456 /* Motorola PowerPC 604 or 604e. */
2457 static const struct reg registers_604
[] =
2463 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2464 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2465 /* 127 */ R(sia
), R(sda
)
2468 /* Motorola/IBM PowerPC 750 or 740. */
2469 static const struct reg registers_750
[] =
2475 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2476 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2477 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2478 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2479 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2480 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2484 /* Motorola PowerPC 7400. */
2485 static const struct reg registers_7400
[] =
2487 /* gpr0-gpr31, fpr0-fpr31 */
2489 /* ctr, xre, lr, cr */
2494 /* vr0-vr31, vrsave, vscr */
2496 /* FIXME? Add more registers? */
2499 /* Motorola e500. */
2500 static const struct reg registers_e500
[] =
2503 /* cr, lr, ctr, xer, "" */
2507 R8(acc
), R(spefscr
),
2508 /* NOTE: Add new registers here the end of the raw register
2509 list and just before the first pseudo register. */
2511 PPC_GPRS_PSEUDO_REGS
2514 /* Information about a particular processor variant. */
2518 /* Name of this variant. */
2521 /* English description of the variant. */
2524 /* bfd_arch_info.arch corresponding to variant. */
2525 enum bfd_architecture arch
;
2527 /* bfd_arch_info.mach corresponding to variant. */
2530 /* Number of real registers. */
2533 /* Number of pseudo registers. */
2536 /* Number of total registers (the sum of nregs and npregs). */
2539 /* Table of register names; registers[R] is the name of the register
2541 const struct reg
*regs
;
2544 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2547 num_registers (const struct reg
*reg_list
, int num_tot_regs
)
2552 for (i
= 0; i
< num_tot_regs
; i
++)
2553 if (!reg_list
[i
].pseudo
)
2560 num_pseudo_registers (const struct reg
*reg_list
, int num_tot_regs
)
2565 for (i
= 0; i
< num_tot_regs
; i
++)
2566 if (reg_list
[i
].pseudo
)
2572 /* Information in this table comes from the following web sites:
2573 IBM: http://www.chips.ibm.com:80/products/embedded/
2574 Motorola: http://www.mot.com/SPS/PowerPC/
2576 I'm sure I've got some of the variant descriptions not quite right.
2577 Please report any inaccuracies you find to GDB's maintainer.
2579 If you add entries to this table, please be sure to allow the new
2580 value as an argument to the --with-cpu flag, in configure.in. */
2582 static struct variant variants
[] =
2585 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2586 bfd_mach_ppc
, -1, -1, tot_num_registers (registers_powerpc
),
2588 {"power", "POWER user-level", bfd_arch_rs6000
,
2589 bfd_mach_rs6k
, -1, -1, tot_num_registers (registers_power
),
2591 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2592 bfd_mach_ppc_403
, -1, -1, tot_num_registers (registers_403
),
2594 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2595 bfd_mach_ppc_601
, -1, -1, tot_num_registers (registers_601
),
2597 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2598 bfd_mach_ppc_602
, -1, -1, tot_num_registers (registers_602
),
2600 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2601 bfd_mach_ppc_603
, -1, -1, tot_num_registers (registers_603
),
2603 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2604 604, -1, -1, tot_num_registers (registers_604
),
2606 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2607 bfd_mach_ppc_403gc
, -1, -1, tot_num_registers (registers_403GC
),
2609 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2610 bfd_mach_ppc_505
, -1, -1, tot_num_registers (registers_505
),
2612 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2613 bfd_mach_ppc_860
, -1, -1, tot_num_registers (registers_860
),
2615 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2616 bfd_mach_ppc_750
, -1, -1, tot_num_registers (registers_750
),
2618 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2619 bfd_mach_ppc_7400
, -1, -1, tot_num_registers (registers_7400
),
2621 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc
,
2622 bfd_mach_ppc_e500
, -1, -1, tot_num_registers (registers_e500
),
2626 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2627 bfd_mach_ppc64
, -1, -1, tot_num_registers (registers_powerpc
),
2629 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2630 bfd_mach_ppc_620
, -1, -1, tot_num_registers (registers_powerpc
),
2632 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2633 bfd_mach_ppc_630
, -1, -1, tot_num_registers (registers_powerpc
),
2635 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2636 bfd_mach_ppc_a35
, -1, -1, tot_num_registers (registers_powerpc
),
2638 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2639 bfd_mach_ppc_rs64ii
, -1, -1, tot_num_registers (registers_powerpc
),
2641 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2642 bfd_mach_ppc_rs64iii
, -1, -1, tot_num_registers (registers_powerpc
),
2645 /* FIXME: I haven't checked the register sets of the following. */
2646 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2647 bfd_mach_rs6k_rs1
, -1, -1, tot_num_registers (registers_power
),
2649 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2650 bfd_mach_rs6k_rsc
, -1, -1, tot_num_registers (registers_power
),
2652 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2653 bfd_mach_rs6k_rs2
, -1, -1, tot_num_registers (registers_power
),
2656 {0, 0, 0, 0, 0, 0, 0, 0}
2659 /* Initialize the number of registers and pseudo registers in each variant. */
2662 init_variants (void)
2666 for (v
= variants
; v
->name
; v
++)
2669 v
->nregs
= num_registers (v
->regs
, v
->num_tot_regs
);
2670 if (v
->npregs
== -1)
2671 v
->npregs
= num_pseudo_registers (v
->regs
, v
->num_tot_regs
);
2675 /* Return the variant corresponding to architecture ARCH and machine number
2676 MACH. If no such variant exists, return null. */
2678 static const struct variant
*
2679 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2681 const struct variant
*v
;
2683 for (v
= variants
; v
->name
; v
++)
2684 if (arch
== v
->arch
&& mach
== v
->mach
)
2691 gdb_print_insn_powerpc (bfd_vma memaddr
, disassemble_info
*info
)
2693 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2694 return print_insn_big_powerpc (memaddr
, info
);
2696 return print_insn_little_powerpc (memaddr
, info
);
2699 /* Initialize the current architecture based on INFO. If possible, re-use an
2700 architecture from ARCHES, which is a list of architectures already created
2701 during this debugging session.
2703 Called e.g. at program startup, when reading a core file, and when reading
2706 static struct gdbarch
*
2707 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2709 struct gdbarch
*gdbarch
;
2710 struct gdbarch_tdep
*tdep
;
2711 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2713 const struct variant
*v
;
2714 enum bfd_architecture arch
;
2720 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2721 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2723 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2724 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2726 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2728 /* Check word size. If INFO is from a binary file, infer it from
2729 that, else choose a likely default. */
2730 if (from_xcoff_exec
)
2732 if (bfd_xcoff_is_xcoff64 (info
.abfd
))
2737 else if (from_elf_exec
)
2739 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2746 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2747 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2748 info
.bfd_arch_info
->bits_per_byte
;
2753 /* Find a candidate among extant architectures. */
2754 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2756 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2758 /* Word size in the various PowerPC bfd_arch_info structs isn't
2759 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2760 separate word size check. */
2761 tdep
= gdbarch_tdep (arches
->gdbarch
);
2762 if (tdep
&& tdep
->wordsize
== wordsize
)
2763 return arches
->gdbarch
;
2766 /* None found, create a new architecture from INFO, whose bfd_arch_info
2767 validity depends on the source:
2768 - executable useless
2769 - rs6000_host_arch() good
2771 - "set arch" trust blindly
2772 - GDB startup useless but harmless */
2774 if (!from_xcoff_exec
)
2776 arch
= info
.bfd_arch_info
->arch
;
2777 mach
= info
.bfd_arch_info
->mach
;
2781 arch
= bfd_arch_powerpc
;
2782 bfd_default_set_arch_mach (&abfd
, arch
, 0);
2783 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2784 mach
= info
.bfd_arch_info
->mach
;
2786 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2787 tdep
->wordsize
= wordsize
;
2789 /* For e500 executables, the apuinfo section is of help here. Such
2790 section contains the identifier and revision number of each
2791 Application-specific Processing Unit that is present on the
2792 chip. The content of the section is determined by the assembler
2793 which looks at each instruction and determines which unit (and
2794 which version of it) can execute it. In our case we just look for
2795 the existance of the section. */
2799 sect
= bfd_get_section_by_name (info
.abfd
, ".PPC.EMB.apuinfo");
2802 arch
= info
.bfd_arch_info
->arch
;
2803 mach
= bfd_mach_ppc_e500
;
2804 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2805 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2809 gdbarch
= gdbarch_alloc (&info
, tdep
);
2810 power
= arch
== bfd_arch_rs6000
;
2812 /* Initialize the number of real and pseudo registers in each variant. */
2815 /* Choose variant. */
2816 v
= find_variant_by_arch (arch
, mach
);
2820 tdep
->regs
= v
->regs
;
2822 tdep
->ppc_gp0_regnum
= 0;
2823 tdep
->ppc_gplast_regnum
= 31;
2824 tdep
->ppc_toc_regnum
= 2;
2825 tdep
->ppc_ps_regnum
= 65;
2826 tdep
->ppc_cr_regnum
= 66;
2827 tdep
->ppc_lr_regnum
= 67;
2828 tdep
->ppc_ctr_regnum
= 68;
2829 tdep
->ppc_xer_regnum
= 69;
2830 if (v
->mach
== bfd_mach_ppc_601
)
2831 tdep
->ppc_mq_regnum
= 124;
2833 tdep
->ppc_mq_regnum
= 70;
2835 tdep
->ppc_mq_regnum
= -1;
2836 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2838 set_gdbarch_pc_regnum (gdbarch
, 64);
2839 set_gdbarch_sp_regnum (gdbarch
, 1);
2840 set_gdbarch_deprecated_fp_regnum (gdbarch
, 1);
2841 set_gdbarch_deprecated_extract_return_value (gdbarch
,
2842 rs6000_extract_return_value
);
2843 set_gdbarch_deprecated_store_return_value (gdbarch
, rs6000_store_return_value
);
2845 if (v
->arch
== bfd_arch_powerpc
)
2849 tdep
->ppc_vr0_regnum
= 71;
2850 tdep
->ppc_vrsave_regnum
= 104;
2851 tdep
->ppc_ev0_regnum
= -1;
2852 tdep
->ppc_ev31_regnum
= -1;
2854 case bfd_mach_ppc_7400
:
2855 tdep
->ppc_vr0_regnum
= 119;
2856 tdep
->ppc_vrsave_regnum
= 152;
2857 tdep
->ppc_ev0_regnum
= -1;
2858 tdep
->ppc_ev31_regnum
= -1;
2860 case bfd_mach_ppc_e500
:
2861 tdep
->ppc_gp0_regnum
= 41;
2862 tdep
->ppc_gplast_regnum
= tdep
->ppc_gp0_regnum
+ 32 - 1;
2863 tdep
->ppc_toc_regnum
= -1;
2864 tdep
->ppc_ps_regnum
= 1;
2865 tdep
->ppc_cr_regnum
= 2;
2866 tdep
->ppc_lr_regnum
= 3;
2867 tdep
->ppc_ctr_regnum
= 4;
2868 tdep
->ppc_xer_regnum
= 5;
2869 tdep
->ppc_ev0_regnum
= 7;
2870 tdep
->ppc_ev31_regnum
= 38;
2871 set_gdbarch_pc_regnum (gdbarch
, 0);
2872 set_gdbarch_sp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2873 set_gdbarch_deprecated_fp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2874 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, e500_dwarf2_reg_to_regnum
);
2875 set_gdbarch_pseudo_register_read (gdbarch
, e500_pseudo_register_read
);
2876 set_gdbarch_pseudo_register_write (gdbarch
, e500_pseudo_register_write
);
2877 set_gdbarch_extract_return_value (gdbarch
, e500_extract_return_value
);
2878 set_gdbarch_deprecated_store_return_value (gdbarch
, e500_store_return_value
);
2881 tdep
->ppc_vr0_regnum
= -1;
2882 tdep
->ppc_vrsave_regnum
= -1;
2883 tdep
->ppc_ev0_regnum
= -1;
2884 tdep
->ppc_ev31_regnum
= -1;
2888 /* Sanity check on registers. */
2889 gdb_assert (strcmp (tdep
->regs
[tdep
->ppc_gp0_regnum
].name
, "r0") == 0);
2891 /* Set lr_frame_offset. */
2893 tdep
->lr_frame_offset
= 16;
2895 tdep
->lr_frame_offset
= 4;
2897 tdep
->lr_frame_offset
= 8;
2899 /* Calculate byte offsets in raw register array. */
2900 tdep
->regoff
= xmalloc (v
->num_tot_regs
* sizeof (int));
2901 for (i
= off
= 0; i
< v
->num_tot_regs
; i
++)
2903 tdep
->regoff
[i
] = off
;
2904 off
+= regsize (v
->regs
+ i
, wordsize
);
2907 /* Select instruction printer. */
2909 set_gdbarch_print_insn (gdbarch
, print_insn_rs6000
);
2911 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_powerpc
);
2913 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2914 set_gdbarch_deprecated_dummy_write_sp (gdbarch
, deprecated_write_sp
);
2916 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2917 set_gdbarch_num_pseudo_regs (gdbarch
, v
->npregs
);
2918 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2919 set_gdbarch_deprecated_register_size (gdbarch
, wordsize
);
2920 set_gdbarch_deprecated_register_bytes (gdbarch
, off
);
2921 set_gdbarch_deprecated_register_byte (gdbarch
, rs6000_register_byte
);
2922 set_gdbarch_deprecated_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2923 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, 16);
2924 set_gdbarch_deprecated_register_virtual_size (gdbarch
, generic_register_size
);
2925 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, 16);
2926 set_gdbarch_deprecated_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2928 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2929 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2930 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2931 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2932 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2933 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2934 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2936 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
2938 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2939 set_gdbarch_char_signed (gdbarch
, 0);
2941 set_gdbarch_deprecated_fix_call_dummy (gdbarch
, rs6000_fix_call_dummy
);
2942 set_gdbarch_frame_align (gdbarch
, rs6000_frame_align
);
2943 set_gdbarch_deprecated_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2944 set_gdbarch_deprecated_push_return_address (gdbarch
, ppc_push_return_address
);
2945 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2947 set_gdbarch_deprecated_register_convertible (gdbarch
, rs6000_register_convertible
);
2948 set_gdbarch_deprecated_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2949 set_gdbarch_deprecated_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2950 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2951 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2952 is correct for the SysV ABI when the wordsize is 8, but I'm also
2953 fairly certain that ppc_sysv_abi_push_arguments() will give even
2954 worse results since it only works for 32-bit code. So, for the moment,
2955 we're better off calling rs6000_push_arguments() since it works for
2956 64-bit code. At some point in the future, this matter needs to be
2958 if (sysv_abi
&& wordsize
== 4)
2959 set_gdbarch_deprecated_push_arguments (gdbarch
, ppc_sysv_abi_push_arguments
);
2961 set_gdbarch_deprecated_push_arguments (gdbarch
, rs6000_push_arguments
);
2963 set_gdbarch_deprecated_store_struct_return (gdbarch
, rs6000_store_struct_return
);
2964 set_gdbarch_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2965 set_gdbarch_deprecated_pop_frame (gdbarch
, rs6000_pop_frame
);
2967 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2968 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2969 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2970 set_gdbarch_function_start_offset (gdbarch
, 0);
2971 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2973 /* Not sure on this. FIXMEmgo */
2974 set_gdbarch_frame_args_skip (gdbarch
, 8);
2977 set_gdbarch_use_struct_convention (gdbarch
,
2978 ppc_sysv_abi_use_struct_convention
);
2980 set_gdbarch_use_struct_convention (gdbarch
,
2981 generic_use_struct_convention
);
2983 set_gdbarch_frameless_function_invocation (gdbarch
,
2984 rs6000_frameless_function_invocation
);
2985 set_gdbarch_deprecated_frame_chain (gdbarch
, rs6000_frame_chain
);
2986 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, rs6000_frame_saved_pc
);
2988 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, rs6000_frame_init_saved_regs
);
2989 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, rs6000_init_extra_frame_info
);
2993 /* Handle RS/6000 function pointers (which are really function
2995 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2996 rs6000_convert_from_func_ptr_addr
);
2998 set_gdbarch_frame_args_address (gdbarch
, rs6000_frame_args_address
);
2999 set_gdbarch_frame_locals_address (gdbarch
, rs6000_frame_args_address
);
3000 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, rs6000_saved_pc_after_call
);
3002 /* Helpers for function argument information. */
3003 set_gdbarch_fetch_pointer_argument (gdbarch
, rs6000_fetch_pointer_argument
);
3005 /* Hook in ABI-specific overrides, if they have been registered. */
3006 gdbarch_init_osabi (info
, gdbarch
);
3012 rs6000_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
3014 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3019 /* FIXME: Dump gdbarch_tdep. */
3022 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
3025 rs6000_info_powerpc_command (char *args
, int from_tty
)
3027 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
3030 /* Initialization code. */
3032 extern initialize_file_ftype _initialize_rs6000_tdep
; /* -Wmissing-prototypes */
3035 _initialize_rs6000_tdep (void)
3037 gdbarch_register (bfd_arch_rs6000
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
3038 gdbarch_register (bfd_arch_powerpc
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
3040 /* Add root prefix command for "info powerpc" commands */
3041 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
3042 "Various POWERPC info specific commands.",
3043 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);