1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
38 #include "libbfd.h" /* for bfd_default_set_arch_mach */
39 #include "coff/internal.h" /* for libcoff.h */
40 #include "libcoff.h" /* for xcoff_data */
41 #include "coff/xcoff.h"
46 #include "solib-svr4.h"
49 /* If the kernel has to deliver a signal, it pushes a sigcontext
50 structure on the stack and then calls the signal handler, passing
51 the address of the sigcontext in an argument register. Usually
52 the signal handler doesn't save this register, so we have to
53 access the sigcontext structure via an offset from the signal handler
55 The following constants were determined by experimentation on AIX 3.2. */
56 #define SIG_FRAME_PC_OFFSET 96
57 #define SIG_FRAME_LR_OFFSET 108
58 #define SIG_FRAME_FP_OFFSET 284
60 /* To be used by skip_prologue. */
62 struct rs6000_framedata
64 int offset
; /* total size of frame --- the distance
65 by which we decrement sp to allocate
67 int saved_gpr
; /* smallest # of saved gpr */
68 int saved_fpr
; /* smallest # of saved fpr */
69 int saved_vr
; /* smallest # of saved vr */
70 int saved_ev
; /* smallest # of saved ev */
71 int alloca_reg
; /* alloca register number (frame ptr) */
72 char frameless
; /* true if frameless functions. */
73 char nosavedpc
; /* true if pc not saved. */
74 int gpr_offset
; /* offset of saved gprs from prev sp */
75 int fpr_offset
; /* offset of saved fprs from prev sp */
76 int vr_offset
; /* offset of saved vrs from prev sp */
77 int ev_offset
; /* offset of saved evs from prev sp */
78 int lr_offset
; /* offset of saved lr */
79 int cr_offset
; /* offset of saved cr */
80 int vrsave_offset
; /* offset of saved vrsave register */
83 /* Description of a single register. */
87 char *name
; /* name of register */
88 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
89 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
90 unsigned char fpr
; /* whether register is floating-point */
91 unsigned char pseudo
; /* whether register is pseudo */
94 /* Breakpoint shadows for the single step instructions will be kept here. */
96 static struct sstep_breaks
98 /* Address, or 0 if this is not in use. */
100 /* Shadow contents. */
105 /* Hook for determining the TOC address when calling functions in the
106 inferior under AIX. The initialization code in rs6000-nat.c sets
107 this hook to point to find_toc_address. */
109 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
111 /* Hook to set the current architecture when starting a child process.
112 rs6000-nat.c sets this. */
114 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
116 /* Static function prototypes */
118 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
120 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
121 struct rs6000_framedata
*);
122 static void frame_get_saved_regs (struct frame_info
* fi
,
123 struct rs6000_framedata
* fdatap
);
124 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
126 /* Read a LEN-byte address from debugged memory address MEMADDR. */
129 read_memory_addr (CORE_ADDR memaddr
, int len
)
131 return read_memory_unsigned_integer (memaddr
, len
);
135 rs6000_skip_prologue (CORE_ADDR pc
)
137 struct rs6000_framedata frame
;
138 pc
= skip_prologue (pc
, 0, &frame
);
143 /* Fill in fi->saved_regs */
145 struct frame_extra_info
147 /* Functions calling alloca() change the value of the stack
148 pointer. We need to use initial stack pointer (which is saved in
149 r31 by gcc) in such cases. If a compiler emits traceback table,
150 then we should use the alloca register specified in traceback
152 CORE_ADDR initial_sp
; /* initial stack pointer. */
156 rs6000_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
158 fi
->extra_info
= (struct frame_extra_info
*)
159 frame_obstack_alloc (sizeof (struct frame_extra_info
));
160 fi
->extra_info
->initial_sp
= 0;
161 if (fi
->next
!= (CORE_ADDR
) 0
162 && fi
->pc
< TEXT_SEGMENT_BASE
)
163 /* We're in get_prev_frame */
164 /* and this is a special signal frame. */
165 /* (fi->pc will be some low address in the kernel, */
166 /* to which the signal handler returns). */
167 fi
->signal_handler_caller
= 1;
170 /* Put here the code to store, into a struct frame_saved_regs,
171 the addresses of the saved registers of frame described by FRAME_INFO.
172 This includes special registers such as pc and fp saved in special
173 ways in the stack frame. sp is even more special:
174 the address we return for it IS the sp for the next frame. */
176 /* In this implementation for RS/6000, we do *not* save sp. I am
177 not sure if it will be needed. The following function takes care of gpr's
181 rs6000_frame_init_saved_regs (struct frame_info
*fi
)
183 frame_get_saved_regs (fi
, NULL
);
187 rs6000_frame_args_address (struct frame_info
*fi
)
189 if (fi
->extra_info
->initial_sp
!= 0)
190 return fi
->extra_info
->initial_sp
;
192 return frame_initial_stack_address (fi
);
195 /* Immediately after a function call, return the saved pc.
196 Can't go through the frames for this because on some machines
197 the new frame is not set up until the new function executes
198 some instructions. */
201 rs6000_saved_pc_after_call (struct frame_info
*fi
)
203 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
206 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
209 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
216 absolute
= (int) ((instr
>> 1) & 1);
221 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
225 dest
= pc
+ immediate
;
229 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
233 dest
= pc
+ immediate
;
237 ext_op
= (instr
>> 1) & 0x3ff;
239 if (ext_op
== 16) /* br conditional register */
241 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
243 /* If we are about to return from a signal handler, dest is
244 something like 0x3c90. The current frame is a signal handler
245 caller frame, upon completion of the sigreturn system call
246 execution will return to the saved PC in the frame. */
247 if (dest
< TEXT_SEGMENT_BASE
)
249 struct frame_info
*fi
;
251 fi
= get_current_frame ();
253 dest
= read_memory_addr (fi
->frame
+ SIG_FRAME_PC_OFFSET
,
254 gdbarch_tdep (current_gdbarch
)->wordsize
);
258 else if (ext_op
== 528) /* br cond to count reg */
260 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
262 /* If we are about to execute a system call, dest is something
263 like 0x22fc or 0x3b00. Upon completion the system call
264 will return to the address in the link register. */
265 if (dest
< TEXT_SEGMENT_BASE
)
266 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
275 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
279 /* Sequence of bytes for breakpoint instruction. */
281 #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
282 #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
284 const static unsigned char *
285 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
287 static unsigned char big_breakpoint
[] = BIG_BREAKPOINT
;
288 static unsigned char little_breakpoint
[] = LITTLE_BREAKPOINT
;
290 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
291 return big_breakpoint
;
293 return little_breakpoint
;
297 /* AIX does not support PT_STEP. Simulate it. */
300 rs6000_software_single_step (enum target_signal signal
,
301 int insert_breakpoints_p
)
305 const char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
311 if (insert_breakpoints_p
)
316 insn
= read_memory_integer (loc
, 4);
318 breaks
[0] = loc
+ breakp_sz
;
320 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
322 /* Don't put two breakpoints on the same address. */
323 if (breaks
[1] == breaks
[0])
326 stepBreaks
[1].address
= 0;
328 for (ii
= 0; ii
< 2; ++ii
)
331 /* ignore invalid breakpoint. */
332 if (breaks
[ii
] == -1)
334 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
335 stepBreaks
[ii
].address
= breaks
[ii
];
342 /* remove step breakpoints. */
343 for (ii
= 0; ii
< 2; ++ii
)
344 if (stepBreaks
[ii
].address
!= 0)
345 target_remove_breakpoint (stepBreaks
[ii
].address
,
346 stepBreaks
[ii
].data
);
348 errno
= 0; /* FIXME, don't ignore errors! */
349 /* What errors? {read,write}_memory call error(). */
353 /* return pc value after skipping a function prologue and also return
354 information about a function frame.
356 in struct rs6000_framedata fdata:
357 - frameless is TRUE, if function does not have a frame.
358 - nosavedpc is TRUE, if function does not save %pc value in its frame.
359 - offset is the initial size of this stack frame --- the amount by
360 which we decrement the sp to allocate the frame.
361 - saved_gpr is the number of the first saved gpr.
362 - saved_fpr is the number of the first saved fpr.
363 - saved_vr is the number of the first saved vr.
364 - saved_ev is the number of the first saved ev.
365 - alloca_reg is the number of the register used for alloca() handling.
367 - gpr_offset is the offset of the first saved gpr from the previous frame.
368 - fpr_offset is the offset of the first saved fpr from the previous frame.
369 - vr_offset is the offset of the first saved vr from the previous frame.
370 - ev_offset is the offset of the first saved ev from the previous frame.
371 - lr_offset is the offset of the saved lr
372 - cr_offset is the offset of the saved cr
373 - vrsave_offset is the offset of the saved vrsave register
376 #define SIGNED_SHORT(x) \
377 ((sizeof (short) == 2) \
378 ? ((int)(short)(x)) \
379 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
381 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
383 /* Limit the number of skipped non-prologue instructions, as the examining
384 of the prologue is expensive. */
385 static int max_skip_non_prologue_insns
= 10;
387 /* Given PC representing the starting address of a function, and
388 LIM_PC which is the (sloppy) limit to which to scan when looking
389 for a prologue, attempt to further refine this limit by using
390 the line data in the symbol table. If successful, a better guess
391 on where the prologue ends is returned, otherwise the previous
392 value of lim_pc is returned. */
394 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
396 struct symtab_and_line prologue_sal
;
398 prologue_sal
= find_pc_line (pc
, 0);
399 if (prologue_sal
.line
!= 0)
402 CORE_ADDR addr
= prologue_sal
.end
;
404 /* Handle the case in which compiler's optimizer/scheduler
405 has moved instructions into the prologue. We scan ahead
406 in the function looking for address ranges whose corresponding
407 line number is less than or equal to the first one that we
408 found for the function. (It can be less than when the
409 scheduler puts a body instruction before the first prologue
411 for (i
= 2 * max_skip_non_prologue_insns
;
412 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
415 struct symtab_and_line sal
;
417 sal
= find_pc_line (addr
, 0);
420 if (sal
.line
<= prologue_sal
.line
421 && sal
.symtab
== prologue_sal
.symtab
)
428 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
429 lim_pc
= prologue_sal
.end
;
436 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
438 CORE_ADDR orig_pc
= pc
;
439 CORE_ADDR last_prologue_pc
= pc
;
440 CORE_ADDR li_found_pc
= 0;
444 long vr_saved_offset
= 0;
453 int minimal_toc_loaded
= 0;
454 int prev_insn_was_prologue_insn
= 1;
455 int num_skip_non_prologue_insns
= 0;
456 const struct bfd_arch_info
*arch_info
= gdbarch_bfd_arch_info (current_gdbarch
);
458 /* Attempt to find the end of the prologue when no limit is specified.
459 Note that refine_prologue_limit() has been written so that it may
460 be used to "refine" the limits of non-zero PC values too, but this
461 is only safe if we 1) trust the line information provided by the
462 compiler and 2) iterate enough to actually find the end of the
465 It may become a good idea at some point (for both performance and
466 accuracy) to unconditionally call refine_prologue_limit(). But,
467 until we can make a clear determination that this is beneficial,
468 we'll play it safe and only use it to obtain a limit when none
469 has been specified. */
471 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
473 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
474 fdata
->saved_gpr
= -1;
475 fdata
->saved_fpr
= -1;
476 fdata
->saved_vr
= -1;
477 fdata
->saved_ev
= -1;
478 fdata
->alloca_reg
= -1;
479 fdata
->frameless
= 1;
480 fdata
->nosavedpc
= 1;
484 /* Sometimes it isn't clear if an instruction is a prologue
485 instruction or not. When we encounter one of these ambiguous
486 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
487 Otherwise, we'll assume that it really is a prologue instruction. */
488 if (prev_insn_was_prologue_insn
)
489 last_prologue_pc
= pc
;
491 /* Stop scanning if we've hit the limit. */
492 if (lim_pc
!= 0 && pc
>= lim_pc
)
495 prev_insn_was_prologue_insn
= 1;
497 /* Fetch the instruction and convert it to an integer. */
498 if (target_read_memory (pc
, buf
, 4))
500 op
= extract_signed_integer (buf
, 4);
502 if ((op
& 0xfc1fffff) == 0x7c0802a6)
504 lr_reg
= (op
& 0x03e00000) | 0x90010000;
508 else if ((op
& 0xfc1fffff) == 0x7c000026)
510 cr_reg
= (op
& 0x03e00000) | 0x90010000;
514 else if ((op
& 0xfc1f0000) == 0xd8010000)
515 { /* stfd Rx,NUM(r1) */
516 reg
= GET_SRC_REG (op
);
517 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
519 fdata
->saved_fpr
= reg
;
520 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
525 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
526 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
527 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
528 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
531 reg
= GET_SRC_REG (op
);
532 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
534 fdata
->saved_gpr
= reg
;
535 if ((op
& 0xfc1f0003) == 0xf8010000)
537 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
542 else if ((op
& 0xffff0000) == 0x60000000)
545 /* Allow nops in the prologue, but do not consider them to
546 be part of the prologue unless followed by other prologue
548 prev_insn_was_prologue_insn
= 0;
552 else if ((op
& 0xffff0000) == 0x3c000000)
553 { /* addis 0,0,NUM, used
555 fdata
->offset
= (op
& 0x0000ffff) << 16;
556 fdata
->frameless
= 0;
560 else if ((op
& 0xffff0000) == 0x60000000)
561 { /* ori 0,0,NUM, 2nd ha
562 lf of >= 32k frames */
563 fdata
->offset
|= (op
& 0x0000ffff);
564 fdata
->frameless
= 0;
568 else if (lr_reg
!= -1 && (op
& 0xffff0000) == lr_reg
)
571 fdata
->lr_offset
= SIGNED_SHORT (op
) + offset
;
572 fdata
->nosavedpc
= 0;
577 else if (cr_reg
!= -1 && (op
& 0xffff0000) == cr_reg
)
580 fdata
->cr_offset
= SIGNED_SHORT (op
) + offset
;
585 else if (op
== 0x48000005)
591 else if (op
== 0x48000004)
596 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
597 in V.4 -mminimal-toc */
598 (op
& 0xffff0000) == 0x3bde0000)
599 { /* addi 30,30,foo@l */
603 else if ((op
& 0xfc000001) == 0x48000001)
607 fdata
->frameless
= 0;
608 /* Don't skip over the subroutine call if it is not within
609 the first three instructions of the prologue. */
610 if ((pc
- orig_pc
) > 8)
613 op
= read_memory_integer (pc
+ 4, 4);
615 /* At this point, make sure this is not a trampoline
616 function (a function that simply calls another functions,
617 and nothing else). If the next is not a nop, this branch
618 was part of the function prologue. */
620 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
621 break; /* don't skip over
625 /* update stack pointer */
627 else if ((op
& 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
628 (op
& 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
630 fdata
->frameless
= 0;
631 if ((op
& 0xffff0003) == 0xf8210001)
633 fdata
->offset
= SIGNED_SHORT (op
);
634 offset
= fdata
->offset
;
638 else if (op
== 0x7c21016e)
640 fdata
->frameless
= 0;
641 offset
= fdata
->offset
;
644 /* Load up minimal toc pointer */
646 else if ((op
>> 22) == 0x20f
647 && !minimal_toc_loaded
)
648 { /* l r31,... or l r30,... */
649 minimal_toc_loaded
= 1;
652 /* move parameters from argument registers to local variable
655 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
656 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
657 (((op
>> 21) & 31) <= 10) &&
658 ((long) ((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
662 /* store parameters in stack */
664 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
665 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
666 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
670 /* store parameters in stack via frame pointer */
673 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
674 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
675 (op
& 0xfc1f0000) == 0xfc1f0000))
676 { /* frsp, fp?,NUM(r1) */
679 /* Set up frame pointer */
681 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
684 fdata
->frameless
= 0;
686 fdata
->alloca_reg
= 31;
689 /* Another way to set up the frame pointer. */
691 else if ((op
& 0xfc1fffff) == 0x38010000)
692 { /* addi rX, r1, 0x0 */
693 fdata
->frameless
= 0;
695 fdata
->alloca_reg
= (op
& ~0x38010000) >> 21;
698 /* AltiVec related instructions. */
699 /* Store the vrsave register (spr 256) in another register for
700 later manipulation, or load a register into the vrsave
701 register. 2 instructions are used: mfvrsave and
702 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
703 and mtspr SPR256, Rn. */
704 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
705 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
706 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
708 vrsave_reg
= GET_SRC_REG (op
);
711 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
715 /* Store the register where vrsave was saved to onto the stack:
716 rS is the register where vrsave was stored in a previous
718 /* 100100 sssss 00001 dddddddd dddddddd */
719 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
721 if (vrsave_reg
== GET_SRC_REG (op
))
723 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
728 /* Compute the new value of vrsave, by modifying the register
729 where vrsave was saved to. */
730 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
731 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
735 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
736 in a pair of insns to save the vector registers on the
738 /* 001110 00000 00000 iiii iiii iiii iiii */
739 /* 001110 01110 00000 iiii iiii iiii iiii */
740 else if ((op
& 0xffff0000) == 0x38000000 /* li r0, SIMM */
741 || (op
& 0xffff0000) == 0x39c00000) /* li r14, SIMM */
744 vr_saved_offset
= SIGNED_SHORT (op
);
746 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
747 /* 011111 sssss 11111 00000 00111001110 */
748 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
750 if (pc
== (li_found_pc
+ 4))
752 vr_reg
= GET_SRC_REG (op
);
753 /* If this is the first vector reg to be saved, or if
754 it has a lower number than others previously seen,
755 reupdate the frame info. */
756 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
758 fdata
->saved_vr
= vr_reg
;
759 fdata
->vr_offset
= vr_saved_offset
+ offset
;
761 vr_saved_offset
= -1;
766 /* End AltiVec related instructions. */
768 /* Start BookE related instructions. */
769 /* Store gen register S at (r31+uimm).
770 Any register less than r13 is volatile, so we don't care. */
771 /* 000100 sssss 11111 iiiii 01100100001 */
772 else if (arch_info
->mach
== bfd_mach_ppc_e500
773 && (op
& 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
775 if ((op
& 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
778 ev_reg
= GET_SRC_REG (op
);
779 imm
= (op
>> 11) & 0x1f;
781 /* If this is the first vector reg to be saved, or if
782 it has a lower number than others previously seen,
783 reupdate the frame info. */
784 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
786 fdata
->saved_ev
= ev_reg
;
787 fdata
->ev_offset
= ev_offset
+ offset
;
792 /* Store gen register rS at (r1+rB). */
793 /* 000100 sssss 00001 bbbbb 01100100000 */
794 else if (arch_info
->mach
== bfd_mach_ppc_e500
795 && (op
& 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
797 if (pc
== (li_found_pc
+ 4))
799 ev_reg
= GET_SRC_REG (op
);
800 /* If this is the first vector reg to be saved, or if
801 it has a lower number than others previously seen,
802 reupdate the frame info. */
803 /* We know the contents of rB from the previous instruction. */
804 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
806 fdata
->saved_ev
= ev_reg
;
807 fdata
->ev_offset
= vr_saved_offset
+ offset
;
809 vr_saved_offset
= -1;
815 /* Store gen register r31 at (rA+uimm). */
816 /* 000100 11111 aaaaa iiiii 01100100001 */
817 else if (arch_info
->mach
== bfd_mach_ppc_e500
818 && (op
& 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
820 /* Wwe know that the source register is 31 already, but
821 it can't hurt to compute it. */
822 ev_reg
= GET_SRC_REG (op
);
823 ev_offset
= ((op
>> 11) & 0x1f) * 8;
824 /* If this is the first vector reg to be saved, or if
825 it has a lower number than others previously seen,
826 reupdate the frame info. */
827 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
829 fdata
->saved_ev
= ev_reg
;
830 fdata
->ev_offset
= ev_offset
+ offset
;
835 /* Store gen register S at (r31+r0).
836 Store param on stack when offset from SP bigger than 4 bytes. */
837 /* 000100 sssss 11111 00000 01100100000 */
838 else if (arch_info
->mach
== bfd_mach_ppc_e500
839 && (op
& 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
841 if (pc
== (li_found_pc
+ 4))
843 if ((op
& 0x03e00000) >= 0x01a00000)
845 ev_reg
= GET_SRC_REG (op
);
846 /* If this is the first vector reg to be saved, or if
847 it has a lower number than others previously seen,
848 reupdate the frame info. */
849 /* We know the contents of r0 from the previous
851 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
853 fdata
->saved_ev
= ev_reg
;
854 fdata
->ev_offset
= vr_saved_offset
+ offset
;
858 vr_saved_offset
= -1;
863 /* End BookE related instructions. */
867 /* Not a recognized prologue instruction.
868 Handle optimizer code motions into the prologue by continuing
869 the search if we have no valid frame yet or if the return
870 address is not yet saved in the frame. */
871 if (fdata
->frameless
== 0
872 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
875 if (op
== 0x4e800020 /* blr */
876 || op
== 0x4e800420) /* bctr */
877 /* Do not scan past epilogue in frameless functions or
880 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
881 /* Never skip branches. */
884 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
885 /* Do not scan too many insns, scanning insns is expensive with
889 /* Continue scanning. */
890 prev_insn_was_prologue_insn
= 0;
896 /* I have problems with skipping over __main() that I need to address
897 * sometime. Previously, I used to use misc_function_vector which
898 * didn't work as well as I wanted to be. -MGO */
900 /* If the first thing after skipping a prolog is a branch to a function,
901 this might be a call to an initializer in main(), introduced by gcc2.
902 We'd like to skip over it as well. Fortunately, xlc does some extra
903 work before calling a function right after a prologue, thus we can
904 single out such gcc2 behaviour. */
907 if ((op
& 0xfc000001) == 0x48000001)
908 { /* bl foo, an initializer function? */
909 op
= read_memory_integer (pc
+ 4, 4);
911 if (op
== 0x4def7b82)
912 { /* cror 0xf, 0xf, 0xf (nop) */
914 /* Check and see if we are in main. If so, skip over this
915 initializer function as well. */
917 tmp
= find_pc_misc_function (pc
);
918 if (tmp
>= 0 && STREQ (misc_function_vector
[tmp
].name
, main_name ()))
924 fdata
->offset
= -fdata
->offset
;
925 return last_prologue_pc
;
929 /*************************************************************************
930 Support for creating pushing a dummy frame into the stack, and popping
932 *************************************************************************/
935 /* Pop the innermost frame, go back to the caller. */
938 rs6000_pop_frame (void)
940 CORE_ADDR pc
, lr
, sp
, prev_sp
, addr
; /* %pc, %lr, %sp */
941 struct rs6000_framedata fdata
;
942 struct frame_info
*frame
= get_current_frame ();
946 sp
= FRAME_FP (frame
);
948 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
950 generic_pop_dummy_frame ();
951 flush_cached_frames ();
955 /* Make sure that all registers are valid. */
956 read_register_bytes (0, NULL
, REGISTER_BYTES
);
958 /* Figure out previous %pc value. If the function is frameless, it is
959 still in the link register, otherwise walk the frames and retrieve the
960 saved %pc value in the previous frame. */
962 addr
= get_pc_function_start (frame
->pc
);
963 (void) skip_prologue (addr
, frame
->pc
, &fdata
);
965 wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
969 prev_sp
= read_memory_addr (sp
, wordsize
);
970 if (fdata
.lr_offset
== 0)
971 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
973 lr
= read_memory_addr (prev_sp
+ fdata
.lr_offset
, wordsize
);
975 /* reset %pc value. */
976 write_register (PC_REGNUM
, lr
);
978 /* reset register values if any was saved earlier. */
980 if (fdata
.saved_gpr
!= -1)
982 addr
= prev_sp
+ fdata
.gpr_offset
;
983 for (ii
= fdata
.saved_gpr
; ii
<= 31; ++ii
)
985 read_memory (addr
, ®isters
[REGISTER_BYTE (ii
)], wordsize
);
990 if (fdata
.saved_fpr
!= -1)
992 addr
= prev_sp
+ fdata
.fpr_offset
;
993 for (ii
= fdata
.saved_fpr
; ii
<= 31; ++ii
)
995 read_memory (addr
, ®isters
[REGISTER_BYTE (ii
+ FP0_REGNUM
)], 8);
1000 write_register (SP_REGNUM
, prev_sp
);
1001 target_store_registers (-1);
1002 flush_cached_frames ();
1005 /* Fixup the call sequence of a dummy function, with the real function
1006 address. Its arguments will be passed by gdb. */
1009 rs6000_fix_call_dummy (char *dummyname
, CORE_ADDR pc
, CORE_ADDR fun
,
1010 int nargs
, struct value
**args
, struct type
*type
,
1014 CORE_ADDR target_addr
;
1016 if (rs6000_find_toc_address_hook
!= NULL
)
1018 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (fun
);
1019 write_register (gdbarch_tdep (current_gdbarch
)->ppc_toc_regnum
,
1024 /* Pass the arguments in either registers, or in the stack. In RS/6000,
1025 the first eight words of the argument list (that might be less than
1026 eight parameters if some parameters occupy more than one word) are
1027 passed in r3..r10 registers. float and double parameters are
1028 passed in fpr's, in addition to that. Rest of the parameters if any
1029 are passed in user stack. There might be cases in which half of the
1030 parameter is copied into registers, the other half is pushed into
1033 Stack must be aligned on 64-bit boundaries when synthesizing
1036 If the function is returning a structure, then the return address is passed
1037 in r3, then the first 7 words of the parameters can be passed in registers,
1038 starting from r4. */
1041 rs6000_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1042 int struct_return
, CORE_ADDR struct_addr
)
1046 int argno
; /* current argument number */
1047 int argbytes
; /* current argument byte */
1048 char tmp_buffer
[50];
1049 int f_argno
= 0; /* current floating point argno */
1050 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1052 struct value
*arg
= 0;
1057 /* The first eight words of ther arguments are passed in registers.
1058 Copy them appropriately.
1060 If the function is returning a `struct', then the first word (which
1061 will be passed in r3) is used for struct return address. In that
1062 case we should advance one word and start from r4 register to copy
1065 ii
= struct_return
? 1 : 0;
1068 effectively indirect call... gcc does...
1070 return_val example( float, int);
1073 float in fp0, int in r3
1074 offset of stack on overflow 8/16
1075 for varargs, must go by type.
1077 float in r3&r4, int in r5
1078 offset of stack on overflow different
1080 return in r3 or f0. If no float, must study how gcc emulates floats;
1081 pay attention to arg promotion.
1082 User may have to cast\args to handle promotion correctly
1083 since gdb won't know if prototype supplied or not.
1086 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
1088 int reg_size
= REGISTER_RAW_SIZE (ii
+ 3);
1091 type
= check_typedef (VALUE_TYPE (arg
));
1092 len
= TYPE_LENGTH (type
);
1094 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1097 /* Floating point arguments are passed in fpr's, as well as gpr's.
1098 There are 13 fpr's reserved for passing parameters. At this point
1099 there is no way we would run out of them. */
1103 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1105 memcpy (®isters
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1106 VALUE_CONTENTS (arg
),
1114 /* Argument takes more than one register. */
1115 while (argbytes
< len
)
1117 memset (®isters
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1118 memcpy (®isters
[REGISTER_BYTE (ii
+ 3)],
1119 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1120 (len
- argbytes
) > reg_size
1121 ? reg_size
: len
- argbytes
);
1122 ++ii
, argbytes
+= reg_size
;
1125 goto ran_out_of_registers_for_arguments
;
1132 /* Argument can fit in one register. No problem. */
1133 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1134 memset (®isters
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1135 memcpy ((char *)®isters
[REGISTER_BYTE (ii
+ 3)] + adj
,
1136 VALUE_CONTENTS (arg
), len
);
1141 ran_out_of_registers_for_arguments
:
1143 saved_sp
= read_sp ();
1145 /* Location for 8 parameters are always reserved. */
1148 /* Another six words for back chain, TOC register, link register, etc. */
1151 /* Stack pointer must be quadword aligned. */
1154 /* If there are more arguments, allocate space for them in
1155 the stack, then push them starting from the ninth one. */
1157 if ((argno
< nargs
) || argbytes
)
1163 space
+= ((len
- argbytes
+ 3) & -4);
1169 for (; jj
< nargs
; ++jj
)
1171 struct value
*val
= args
[jj
];
1172 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1175 /* Add location required for the rest of the parameters. */
1176 space
= (space
+ 15) & -16;
1179 /* This is another instance we need to be concerned about
1180 securing our stack space. If we write anything underneath %sp
1181 (r1), we might conflict with the kernel who thinks he is free
1182 to use this area. So, update %sp first before doing anything
1185 write_register (SP_REGNUM
, sp
);
1187 /* If the last argument copied into the registers didn't fit there
1188 completely, push the rest of it into stack. */
1192 write_memory (sp
+ 24 + (ii
* 4),
1193 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1196 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1199 /* Push the rest of the arguments into stack. */
1200 for (; argno
< nargs
; ++argno
)
1204 type
= check_typedef (VALUE_TYPE (arg
));
1205 len
= TYPE_LENGTH (type
);
1208 /* Float types should be passed in fpr's, as well as in the
1210 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1215 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1217 memcpy (®isters
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1218 VALUE_CONTENTS (arg
),
1223 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1224 ii
+= ((len
+ 3) & -4) / 4;
1228 /* Secure stack areas first, before doing anything else. */
1229 write_register (SP_REGNUM
, sp
);
1231 /* set back chain properly */
1232 store_address (tmp_buffer
, 4, saved_sp
);
1233 write_memory (sp
, tmp_buffer
, 4);
1235 target_store_registers (-1);
1239 /* Function: ppc_push_return_address (pc, sp)
1240 Set up the return address for the inferior function call. */
1243 ppc_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1245 write_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
,
1246 CALL_DUMMY_ADDRESS ());
1250 /* Extract a function return value of type TYPE from raw register array
1251 REGBUF, and copy that return value into VALBUF in virtual format. */
1253 e500_extract_return_value (struct type
*valtype
, struct regcache
*regbuf
, char *valbuf
)
1256 int vallen
= TYPE_LENGTH (valtype
);
1257 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1259 if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1261 && TYPE_VECTOR (valtype
))
1263 regcache_raw_read (regbuf
, tdep
->ppc_ev0_regnum
+ 3, valbuf
);
1267 /* Return value is copied starting from r3. Note that r3 for us
1268 is a pseudo register. */
1270 int return_regnum
= tdep
->ppc_gp0_regnum
+ 3;
1271 int reg_size
= REGISTER_RAW_SIZE (return_regnum
);
1277 /* Compute where we will start storing the value from. */
1278 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1280 if (vallen
<= reg_size
)
1281 offset
= reg_size
- vallen
;
1283 offset
= reg_size
+ (reg_size
- vallen
);
1286 /* How big does the local buffer need to be? */
1287 if (vallen
<= reg_size
)
1288 val_buffer
= alloca (reg_size
);
1290 val_buffer
= alloca (vallen
);
1292 /* Read all we need into our private buffer. We copy it in
1293 chunks that are as long as one register, never shorter, even
1294 if the value is smaller than the register. */
1295 while (copied
< vallen
)
1297 reg_part_size
= REGISTER_RAW_SIZE (return_regnum
+ i
);
1298 /* It is a pseudo/cooked register. */
1299 regcache_cooked_read (regbuf
, return_regnum
+ i
,
1300 val_buffer
+ copied
);
1301 copied
+= reg_part_size
;
1304 /* Put the stuff in the return buffer. */
1305 memcpy (valbuf
, val_buffer
+ offset
, vallen
);
1310 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1313 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1315 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1320 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1321 We need to truncate the return value into float size (4 byte) if
1324 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1326 ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)],
1327 TYPE_LENGTH (valtype
));
1330 memcpy (&dd
, ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1332 memcpy (valbuf
, &ff
, sizeof (float));
1335 else if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1336 && TYPE_LENGTH (valtype
) == 16
1337 && TYPE_VECTOR (valtype
))
1339 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1340 TYPE_LENGTH (valtype
));
1344 /* return value is copied starting from r3. */
1345 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1346 && TYPE_LENGTH (valtype
) < REGISTER_RAW_SIZE (3))
1347 offset
= REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1350 regbuf
+ REGISTER_BYTE (3) + offset
,
1351 TYPE_LENGTH (valtype
));
1355 /* Keep structure return address in this variable.
1356 FIXME: This is a horrid kludge which should not be allowed to continue
1357 living. This only allows a single nested call to a structure-returning
1358 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
1360 static CORE_ADDR rs6000_struct_return_address
;
1362 /* Return whether handle_inferior_event() should proceed through code
1363 starting at PC in function NAME when stepping.
1365 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1366 handle memory references that are too distant to fit in instructions
1367 generated by the compiler. For example, if 'foo' in the following
1372 is greater than 32767, the linker might replace the lwz with a branch to
1373 somewhere in @FIX1 that does the load in 2 instructions and then branches
1374 back to where execution should continue.
1376 GDB should silently step over @FIX code, just like AIX dbx does.
1377 Unfortunately, the linker uses the "b" instruction for the branches,
1378 meaning that the link register doesn't get set. Therefore, GDB's usual
1379 step_over_function() mechanism won't work.
1381 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1382 in handle_inferior_event() to skip past @FIX code. */
1385 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1387 return name
&& !strncmp (name
, "@FIX", 4);
1390 /* Skip code that the user doesn't want to see when stepping:
1392 1. Indirect function calls use a piece of trampoline code to do context
1393 switching, i.e. to set the new TOC table. Skip such code if we are on
1394 its first instruction (as when we have single-stepped to here).
1396 2. Skip shared library trampoline code (which is different from
1397 indirect function call trampolines).
1399 3. Skip bigtoc fixup code.
1401 Result is desired PC to step until, or NULL if we are not in
1402 code that should be skipped. */
1405 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1407 register unsigned int ii
, op
;
1409 CORE_ADDR solib_target_pc
;
1410 struct minimal_symbol
*msymbol
;
1412 static unsigned trampoline_code
[] =
1414 0x800b0000, /* l r0,0x0(r11) */
1415 0x90410014, /* st r2,0x14(r1) */
1416 0x7c0903a6, /* mtctr r0 */
1417 0x804b0004, /* l r2,0x4(r11) */
1418 0x816b0008, /* l r11,0x8(r11) */
1419 0x4e800420, /* bctr */
1420 0x4e800020, /* br */
1424 /* Check for bigtoc fixup code. */
1425 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1426 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, SYMBOL_NAME (msymbol
)))
1428 /* Double-check that the third instruction from PC is relative "b". */
1429 op
= read_memory_integer (pc
+ 8, 4);
1430 if ((op
& 0xfc000003) == 0x48000000)
1432 /* Extract bits 6-29 as a signed 24-bit relative word address and
1433 add it to the containing PC. */
1434 rel
= ((int)(op
<< 6) >> 6);
1435 return pc
+ 8 + rel
;
1439 /* If pc is in a shared library trampoline, return its target. */
1440 solib_target_pc
= find_solib_trampoline_target (pc
);
1441 if (solib_target_pc
)
1442 return solib_target_pc
;
1444 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1446 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1447 if (op
!= trampoline_code
[ii
])
1450 ii
= read_register (11); /* r11 holds destination addr */
1451 pc
= read_memory_addr (ii
, gdbarch_tdep (current_gdbarch
)->wordsize
); /* (r11) value */
1455 /* Determines whether the function FI has a frame on the stack or not. */
1458 rs6000_frameless_function_invocation (struct frame_info
*fi
)
1460 CORE_ADDR func_start
;
1461 struct rs6000_framedata fdata
;
1463 /* Don't even think about framelessness except on the innermost frame
1464 or if the function was interrupted by a signal. */
1465 if (fi
->next
!= NULL
&& !fi
->next
->signal_handler_caller
)
1468 func_start
= get_pc_function_start (fi
->pc
);
1470 /* If we failed to find the start of the function, it is a mistake
1471 to inspect the instructions. */
1475 /* A frame with a zero PC is usually created by dereferencing a NULL
1476 function pointer, normally causing an immediate core dump of the
1477 inferior. Mark function as frameless, as the inferior has no chance
1478 of setting up a stack frame. */
1485 (void) skip_prologue (func_start
, fi
->pc
, &fdata
);
1486 return fdata
.frameless
;
1489 /* Return the PC saved in a frame. */
1492 rs6000_frame_saved_pc (struct frame_info
*fi
)
1494 CORE_ADDR func_start
;
1495 struct rs6000_framedata fdata
;
1496 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1497 int wordsize
= tdep
->wordsize
;
1499 if (fi
->signal_handler_caller
)
1500 return read_memory_addr (fi
->frame
+ SIG_FRAME_PC_OFFSET
, wordsize
);
1502 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1503 return generic_read_register_dummy (fi
->pc
, fi
->frame
, PC_REGNUM
);
1505 func_start
= get_pc_function_start (fi
->pc
);
1507 /* If we failed to find the start of the function, it is a mistake
1508 to inspect the instructions. */
1512 (void) skip_prologue (func_start
, fi
->pc
, &fdata
);
1514 if (fdata
.lr_offset
== 0 && fi
->next
!= NULL
)
1516 if (fi
->next
->signal_handler_caller
)
1517 return read_memory_addr (fi
->next
->frame
+ SIG_FRAME_LR_OFFSET
,
1520 return read_memory_addr (FRAME_CHAIN (fi
) + tdep
->lr_frame_offset
,
1524 if (fdata
.lr_offset
== 0)
1525 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1527 return read_memory_addr (FRAME_CHAIN (fi
) + fdata
.lr_offset
, wordsize
);
1530 /* If saved registers of frame FI are not known yet, read and cache them.
1531 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1532 in which case the framedata are read. */
1535 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1537 CORE_ADDR frame_addr
;
1538 struct rs6000_framedata work_fdata
;
1539 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1540 int wordsize
= tdep
->wordsize
;
1547 fdatap
= &work_fdata
;
1548 (void) skip_prologue (get_pc_function_start (fi
->pc
), fi
->pc
, fdatap
);
1551 frame_saved_regs_zalloc (fi
);
1553 /* If there were any saved registers, figure out parent's stack
1555 /* The following is true only if the frame doesn't have a call to
1558 if (fdatap
->saved_fpr
== 0
1559 && fdatap
->saved_gpr
== 0
1560 && fdatap
->saved_vr
== 0
1561 && fdatap
->saved_ev
== 0
1562 && fdatap
->lr_offset
== 0
1563 && fdatap
->cr_offset
== 0
1564 && fdatap
->vr_offset
== 0
1565 && fdatap
->ev_offset
== 0)
1568 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1569 address of the current frame. Things might be easier if the
1570 ->frame pointed to the outer-most address of the frame. In the
1571 mean time, the address of the prev frame is used as the base
1572 address of this frame. */
1573 frame_addr
= FRAME_CHAIN (fi
);
1575 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1576 All fpr's from saved_fpr to fp31 are saved. */
1578 if (fdatap
->saved_fpr
>= 0)
1581 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1582 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1584 fi
->saved_regs
[FP0_REGNUM
+ i
] = fpr_addr
;
1589 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1590 All gpr's from saved_gpr to gpr31 are saved. */
1592 if (fdatap
->saved_gpr
>= 0)
1595 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1596 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1598 fi
->saved_regs
[i
] = gpr_addr
;
1599 gpr_addr
+= wordsize
;
1603 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1604 All vr's from saved_vr to vr31 are saved. */
1605 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1607 if (fdatap
->saved_vr
>= 0)
1610 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1611 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1613 fi
->saved_regs
[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1614 vr_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1619 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1620 All vr's from saved_ev to ev31 are saved. ????? */
1621 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
1623 if (fdatap
->saved_ev
>= 0)
1626 CORE_ADDR ev_addr
= frame_addr
+ fdatap
->ev_offset
;
1627 for (i
= fdatap
->saved_ev
; i
< 32; i
++)
1629 fi
->saved_regs
[tdep
->ppc_ev0_regnum
+ i
] = ev_addr
;
1630 fi
->saved_regs
[tdep
->ppc_gp0_regnum
+ i
] = ev_addr
+ 4;
1631 ev_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_ev0_regnum
);
1636 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1638 if (fdatap
->cr_offset
!= 0)
1639 fi
->saved_regs
[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1641 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1643 if (fdatap
->lr_offset
!= 0)
1644 fi
->saved_regs
[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1646 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1648 if (fdatap
->vrsave_offset
!= 0)
1649 fi
->saved_regs
[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1652 /* Return the address of a frame. This is the inital %sp value when the frame
1653 was first allocated. For functions calling alloca(), it might be saved in
1654 an alloca register. */
1657 frame_initial_stack_address (struct frame_info
*fi
)
1660 struct rs6000_framedata fdata
;
1661 struct frame_info
*callee_fi
;
1663 /* If the initial stack pointer (frame address) of this frame is known,
1666 if (fi
->extra_info
->initial_sp
)
1667 return fi
->extra_info
->initial_sp
;
1669 /* Find out if this function is using an alloca register. */
1671 (void) skip_prologue (get_pc_function_start (fi
->pc
), fi
->pc
, &fdata
);
1673 /* If saved registers of this frame are not known yet, read and
1676 if (!fi
->saved_regs
)
1677 frame_get_saved_regs (fi
, &fdata
);
1679 /* If no alloca register used, then fi->frame is the value of the %sp for
1680 this frame, and it is good enough. */
1682 if (fdata
.alloca_reg
< 0)
1684 fi
->extra_info
->initial_sp
= fi
->frame
;
1685 return fi
->extra_info
->initial_sp
;
1688 /* There is an alloca register, use its value, in the current frame,
1689 as the initial stack pointer. */
1691 char *tmpbuf
= alloca (MAX_REGISTER_RAW_SIZE
);
1692 if (frame_register_read (fi
, fdata
.alloca_reg
, tmpbuf
))
1694 fi
->extra_info
->initial_sp
1695 = extract_unsigned_integer (tmpbuf
,
1696 REGISTER_RAW_SIZE (fdata
.alloca_reg
));
1699 /* NOTE: cagney/2002-04-17: At present the only time
1700 frame_register_read will fail is when the register isn't
1701 available. If that does happen, use the frame. */
1702 fi
->extra_info
->initial_sp
= fi
->frame
;
1704 return fi
->extra_info
->initial_sp
;
1707 /* Describe the pointer in each stack frame to the previous stack frame
1710 /* FRAME_CHAIN takes a frame's nominal address
1711 and produces the frame's chain-pointer. */
1713 /* In the case of the RS/6000, the frame's nominal address
1714 is the address of a 4-byte word containing the calling frame's address. */
1717 rs6000_frame_chain (struct frame_info
*thisframe
)
1719 CORE_ADDR fp
, fpp
, lr
;
1720 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1722 if (PC_IN_CALL_DUMMY (thisframe
->pc
, thisframe
->frame
, thisframe
->frame
))
1723 return thisframe
->frame
; /* dummy frame same as caller's frame */
1725 if (inside_entry_file (thisframe
->pc
) ||
1726 thisframe
->pc
== entry_point_address ())
1729 if (thisframe
->signal_handler_caller
)
1730 fp
= read_memory_addr (thisframe
->frame
+ SIG_FRAME_FP_OFFSET
,
1732 else if (thisframe
->next
!= NULL
1733 && thisframe
->next
->signal_handler_caller
1734 && FRAMELESS_FUNCTION_INVOCATION (thisframe
))
1735 /* A frameless function interrupted by a signal did not change the
1737 fp
= FRAME_FP (thisframe
);
1739 fp
= read_memory_addr ((thisframe
)->frame
, wordsize
);
1741 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1742 if (lr
== entry_point_address ())
1743 if (fp
!= 0 && (fpp
= read_memory_addr (fp
, wordsize
)) != 0)
1744 if (PC_IN_CALL_DUMMY (lr
, fpp
, fpp
))
1750 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1751 isn't available with that word size, return 0. */
1754 regsize (const struct reg
*reg
, int wordsize
)
1756 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1759 /* Return the name of register number N, or null if no such register exists
1760 in the current architecture. */
1763 rs6000_register_name (int n
)
1765 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1766 const struct reg
*reg
= tdep
->regs
+ n
;
1768 if (!regsize (reg
, tdep
->wordsize
))
1773 /* Index within `registers' of the first byte of the space for
1777 rs6000_register_byte (int n
)
1779 return gdbarch_tdep (current_gdbarch
)->regoff
[n
];
1782 /* Return the number of bytes of storage in the actual machine representation
1783 for register N if that register is available, else return 0. */
1786 rs6000_register_raw_size (int n
)
1788 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1789 const struct reg
*reg
= tdep
->regs
+ n
;
1790 return regsize (reg
, tdep
->wordsize
);
1793 /* Return the GDB type object for the "standard" data type
1794 of data in register N. */
1796 static struct type
*
1797 rs6000_register_virtual_type (int n
)
1799 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1800 const struct reg
*reg
= tdep
->regs
+ n
;
1803 return builtin_type_double
;
1806 int size
= regsize (reg
, tdep
->wordsize
);
1810 if (tdep
->ppc_ev0_regnum
<= n
&& n
<= tdep
->ppc_ev31_regnum
)
1811 return builtin_type_vec64
;
1813 return builtin_type_int64
;
1816 return builtin_type_vec128
;
1819 return builtin_type_int32
;
1825 /* For the PowerPC, it appears that the debug info marks float parameters as
1826 floats regardless of whether the function is prototyped, but the actual
1827 values are always passed in as doubles. Tell gdb to always assume that
1828 floats are passed as doubles and then converted in the callee. */
1831 rs6000_coerce_float_to_double (struct type
*formal
, struct type
*actual
)
1836 /* Return whether register N requires conversion when moving from raw format
1839 The register format for RS/6000 floating point registers is always
1840 double, we need a conversion if the memory format is float. */
1843 rs6000_register_convertible (int n
)
1845 const struct reg
*reg
= gdbarch_tdep (current_gdbarch
)->regs
+ n
;
1849 /* Convert data from raw format for register N in buffer FROM
1850 to virtual format with type TYPE in buffer TO. */
1853 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1854 char *from
, char *to
)
1856 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1858 double val
= extract_floating (from
, REGISTER_RAW_SIZE (n
));
1859 store_floating (to
, TYPE_LENGTH (type
), val
);
1862 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1865 /* Convert data from virtual format with type TYPE in buffer FROM
1866 to raw format for register N in buffer TO. */
1869 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1870 char *from
, char *to
)
1872 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1874 double val
= extract_floating (from
, TYPE_LENGTH (type
));
1875 store_floating (to
, REGISTER_RAW_SIZE (n
), val
);
1878 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1882 e500_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1883 int reg_nr
, void *buffer
)
1887 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1888 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1890 if (reg_nr
>= tdep
->ppc_gp0_regnum
1891 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1893 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1895 /* Build the value in the provided buffer. */
1896 /* Read the raw register of which this one is the lower portion. */
1897 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1898 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1900 memcpy ((char *) buffer
, temp_buffer
+ offset
, 4);
1905 e500_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1906 int reg_nr
, const void *buffer
)
1910 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1911 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1913 if (reg_nr
>= tdep
->ppc_gp0_regnum
1914 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1916 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1917 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1918 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1921 /* Let's read the value of the base register into a temporary
1922 buffer, so that overwriting the last four bytes with the new
1923 value of the pseudo will leave the upper 4 bytes unchanged. */
1924 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1926 /* Write as an 8 byte quantity. */
1927 memcpy (temp_buffer
+ offset
, (char *) buffer
, 4);
1928 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
1932 /* Convert a dwarf2 register number to a gdb REGNUM. */
1934 e500_dwarf2_reg_to_regnum (int num
)
1937 if (0 <= num
&& num
<= 31)
1938 return num
+ gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
;
1943 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1946 rs6000_stab_reg_to_regnum (int num
)
1952 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
1955 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
1958 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
1961 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
1970 /* Store the address of the place in which to copy the structure the
1971 subroutine will return. This is called from call_function.
1973 In RS/6000, struct return addresses are passed as an extra parameter in r3.
1974 In function return, callee is not responsible of returning this address
1975 back. Since gdb needs to find it, we will store in a designated variable
1976 `rs6000_struct_return_address'. */
1979 rs6000_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1981 write_register (3, addr
);
1982 rs6000_struct_return_address
= addr
;
1985 /* Write into appropriate registers a function return value
1986 of type TYPE, given in virtual format. */
1988 e500_store_return_value (struct type
*type
, char *valbuf
)
1990 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1992 /* Everything is returned in GPR3 and up. */
1995 int len
= TYPE_LENGTH (type
);
1996 while (copied
< len
)
1998 int regnum
= gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3 + i
;
1999 int reg_size
= REGISTER_RAW_SIZE (regnum
);
2000 char *reg_val_buf
= alloca (reg_size
);
2002 memcpy (reg_val_buf
, valbuf
+ copied
, reg_size
);
2004 write_register_gen (regnum
, reg_val_buf
);
2010 rs6000_store_return_value (struct type
*type
, char *valbuf
)
2012 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2014 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2016 /* Floating point values are returned starting from FPR1 and up.
2017 Say a double_double_double type could be returned in
2018 FPR1/FPR2/FPR3 triple. */
2020 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
2021 TYPE_LENGTH (type
));
2022 else if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
2024 if (TYPE_LENGTH (type
) == 16
2025 && TYPE_VECTOR (type
))
2026 write_register_bytes (REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
2027 valbuf
, TYPE_LENGTH (type
));
2030 /* Everything else is returned in GPR3 and up. */
2031 write_register_bytes (REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
2032 valbuf
, TYPE_LENGTH (type
));
2035 /* Extract from an array REGBUF containing the (raw) register state
2036 the address in which a function should return its structure value,
2037 as a CORE_ADDR (or an expression that can be used as one). */
2040 rs6000_extract_struct_value_address (char *regbuf
)
2042 return rs6000_struct_return_address
;
2045 /* Return whether PC is in a dummy function call.
2047 FIXME: This just checks for the end of the stack, which is broken
2048 for things like stepping through gcc nested function stubs. */
2051 rs6000_pc_in_call_dummy (CORE_ADDR pc
, CORE_ADDR sp
, CORE_ADDR fp
)
2053 return sp
< pc
&& pc
< fp
;
2056 /* Hook called when a new child process is started. */
2059 rs6000_create_inferior (int pid
)
2061 if (rs6000_set_host_arch_hook
)
2062 rs6000_set_host_arch_hook (pid
);
2065 /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
2067 Usually a function pointer's representation is simply the address
2068 of the function. On the RS/6000 however, a function pointer is
2069 represented by a pointer to a TOC entry. This TOC entry contains
2070 three words, the first word is the address of the function, the
2071 second word is the TOC pointer (r2), and the third word is the
2072 static chain value. Throughout GDB it is currently assumed that a
2073 function pointer contains the address of the function, which is not
2074 easy to fix. In addition, the conversion of a function address to
2075 a function pointer would require allocation of a TOC entry in the
2076 inferior's memory space, with all its drawbacks. To be able to
2077 call C++ virtual methods in the inferior (which are called via
2078 function pointers), find_function_addr uses this function to get the
2079 function address from a function pointer. */
2081 /* Return real function address if ADDR (a function pointer) is in the data
2082 space and is therefore a special function pointer. */
2085 rs6000_convert_from_func_ptr_addr (CORE_ADDR addr
)
2087 struct obj_section
*s
;
2089 s
= find_pc_section (addr
);
2090 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
2093 /* ADDR is in the data space, so it's a special function pointer. */
2094 return read_memory_addr (addr
, gdbarch_tdep (current_gdbarch
)->wordsize
);
2098 /* Handling the various POWER/PowerPC variants. */
2101 /* The arrays here called registers_MUMBLE hold information about available
2104 For each family of PPC variants, I've tried to isolate out the
2105 common registers and put them up front, so that as long as you get
2106 the general family right, GDB will correctly identify the registers
2107 common to that family. The common register sets are:
2109 For the 60x family: hid0 hid1 iabr dabr pir
2111 For the 505 and 860 family: eie eid nri
2113 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
2114 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
2117 Most of these register groups aren't anything formal. I arrived at
2118 them by looking at the registers that occurred in more than one
2121 Note: kevinb/2002-04-30: Support for the fpscr register was added
2122 during April, 2002. Slot 70 is being used for PowerPC and slot 71
2123 for Power. For PowerPC, slot 70 was unused and was already in the
2124 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
2125 slot 70 was being used for "mq", so the next available slot (71)
2126 was chosen. It would have been nice to be able to make the
2127 register numbers the same across processor cores, but this wasn't
2128 possible without either 1) renumbering some registers for some
2129 processors or 2) assigning fpscr to a really high slot that's
2130 larger than any current register number. Doing (1) is bad because
2131 existing stubs would break. Doing (2) is undesirable because it
2132 would introduce a really large gap between fpscr and the rest of
2133 the registers for most processors. */
2135 /* Convenience macros for populating register arrays. */
2137 /* Within another macro, convert S to a string. */
2141 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
2142 and 64 bits on 64-bit systems. */
2143 #define R(name) { STR(name), 4, 8, 0, 0 }
2145 /* Return a struct reg defining register NAME that's 32 bits on all
2147 #define R4(name) { STR(name), 4, 4, 0, 0 }
2149 /* Return a struct reg defining register NAME that's 64 bits on all
2151 #define R8(name) { STR(name), 8, 8, 0, 0 }
2153 /* Return a struct reg defining register NAME that's 128 bits on all
2155 #define R16(name) { STR(name), 16, 16, 0, 0 }
2157 /* Return a struct reg defining floating-point register NAME. */
2158 #define F(name) { STR(name), 8, 8, 1, 0 }
2160 /* Return a struct reg defining a pseudo register NAME. */
2161 #define P(name) { STR(name), 4, 8, 0, 1}
2163 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
2164 systems and that doesn't exist on 64-bit systems. */
2165 #define R32(name) { STR(name), 4, 0, 0, 0 }
2167 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
2168 systems and that doesn't exist on 32-bit systems. */
2169 #define R64(name) { STR(name), 0, 8, 0, 0 }
2171 /* Return a struct reg placeholder for a register that doesn't exist. */
2172 #define R0 { 0, 0, 0, 0, 0 }
2174 /* UISA registers common across all architectures, including POWER. */
2176 #define COMMON_UISA_REGS \
2177 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2178 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2179 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2180 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2181 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
2182 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
2183 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
2184 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
2185 /* 64 */ R(pc), R(ps)
2187 #define COMMON_UISA_NOFP_REGS \
2188 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2189 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2190 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2191 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2192 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2193 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2194 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2195 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2196 /* 64 */ R(pc), R(ps)
2198 /* UISA-level SPRs for PowerPC. */
2199 #define PPC_UISA_SPRS \
2200 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
2202 /* UISA-level SPRs for PowerPC without floating point support. */
2203 #define PPC_UISA_NOFP_SPRS \
2204 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
2206 /* Segment registers, for PowerPC. */
2207 #define PPC_SEGMENT_REGS \
2208 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2209 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2210 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2211 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2213 /* OEA SPRs for PowerPC. */
2214 #define PPC_OEA_SPRS \
2216 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2217 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2218 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2219 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2220 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2221 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2222 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2223 /* 116 */ R4(dec), R(dabr), R4(ear)
2225 /* AltiVec registers. */
2226 #define PPC_ALTIVEC_REGS \
2227 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2228 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2229 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2230 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2231 /*151*/R4(vscr), R4(vrsave)
2233 /* Vectors of hi-lo general purpose registers. */
2234 #define PPC_EV_REGS \
2235 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
2236 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
2237 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
2238 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2240 /* Lower half of the EV registers. */
2241 #define PPC_GPRS_PSEUDO_REGS \
2242 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2243 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2244 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2245 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31), \
2247 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2248 user-level SPR's. */
2249 static const struct reg registers_power
[] =
2252 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
2256 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2257 view of the PowerPC. */
2258 static const struct reg registers_powerpc
[] =
2265 /* PowerPC UISA - a PPC processor as viewed by user-level
2266 code, but without floating point registers. */
2267 static const struct reg registers_powerpc_nofp
[] =
2269 COMMON_UISA_NOFP_REGS
,
2273 /* IBM PowerPC 403. */
2274 static const struct reg registers_403
[] =
2280 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2281 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2282 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2283 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2284 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2285 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
2288 /* IBM PowerPC 403GC. */
2289 static const struct reg registers_403GC
[] =
2295 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2296 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2297 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2298 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2299 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2300 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2301 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2302 /* 147 */ R(tbhu
), R(tblu
)
2305 /* Motorola PowerPC 505. */
2306 static const struct reg registers_505
[] =
2312 /* 119 */ R(eie
), R(eid
), R(nri
)
2315 /* Motorola PowerPC 860 or 850. */
2316 static const struct reg registers_860
[] =
2322 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2323 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2324 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2325 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2326 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2327 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2328 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2329 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2330 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2331 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2332 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2333 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2336 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2337 for reading and writing RTCU and RTCL. However, how one reads and writes a
2338 register is the stub's problem. */
2339 static const struct reg registers_601
[] =
2345 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2346 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2349 /* Motorola PowerPC 602. */
2350 static const struct reg registers_602
[] =
2356 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2357 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2358 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2361 /* Motorola/IBM PowerPC 603 or 603e. */
2362 static const struct reg registers_603
[] =
2368 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2369 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2370 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2373 /* Motorola PowerPC 604 or 604e. */
2374 static const struct reg registers_604
[] =
2380 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2381 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2382 /* 127 */ R(sia
), R(sda
)
2385 /* Motorola/IBM PowerPC 750 or 740. */
2386 static const struct reg registers_750
[] =
2392 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2393 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2394 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2395 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2396 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2397 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2401 /* Motorola PowerPC 7400. */
2402 static const struct reg registers_7400
[] =
2404 /* gpr0-gpr31, fpr0-fpr31 */
2406 /* ctr, xre, lr, cr */
2411 /* vr0-vr31, vrsave, vscr */
2413 /* FIXME? Add more registers? */
2416 /* Motorola e500. */
2417 static const struct reg registers_e500
[] =
2420 /* cr, lr, ctr, xer, "" */
2425 PPC_GPRS_PSEUDO_REGS
2428 /* Information about a particular processor variant. */
2432 /* Name of this variant. */
2435 /* English description of the variant. */
2438 /* bfd_arch_info.arch corresponding to variant. */
2439 enum bfd_architecture arch
;
2441 /* bfd_arch_info.mach corresponding to variant. */
2444 /* Number of real registers. */
2447 /* Number of pseudo registers. */
2450 /* Number of total registers (the sum of nregs and npregs). */
2453 /* Table of register names; registers[R] is the name of the register
2455 const struct reg
*regs
;
2458 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2461 num_registers (const struct reg
*reg_list
, int num_tot_regs
)
2466 for (i
= 0; i
< num_tot_regs
; i
++)
2467 if (!reg_list
[i
].pseudo
)
2474 num_pseudo_registers (const struct reg
*reg_list
, int num_tot_regs
)
2479 for (i
= 0; i
< num_tot_regs
; i
++)
2480 if (reg_list
[i
].pseudo
)
2486 /* Information in this table comes from the following web sites:
2487 IBM: http://www.chips.ibm.com:80/products/embedded/
2488 Motorola: http://www.mot.com/SPS/PowerPC/
2490 I'm sure I've got some of the variant descriptions not quite right.
2491 Please report any inaccuracies you find to GDB's maintainer.
2493 If you add entries to this table, please be sure to allow the new
2494 value as an argument to the --with-cpu flag, in configure.in. */
2496 static struct variant variants
[] =
2499 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2500 bfd_mach_ppc
, -1, -1, tot_num_registers (registers_powerpc
),
2502 {"power", "POWER user-level", bfd_arch_rs6000
,
2503 bfd_mach_rs6k
, -1, -1, tot_num_registers (registers_power
),
2505 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2506 bfd_mach_ppc_403
, -1, -1, tot_num_registers (registers_403
),
2508 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2509 bfd_mach_ppc_601
, -1, -1, tot_num_registers (registers_601
),
2511 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2512 bfd_mach_ppc_602
, -1, -1, tot_num_registers (registers_602
),
2514 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2515 bfd_mach_ppc_603
, -1, -1, tot_num_registers (registers_603
),
2517 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2518 604, -1, -1, tot_num_registers (registers_604
),
2520 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2521 bfd_mach_ppc_403gc
, -1, -1, tot_num_registers (registers_403GC
),
2523 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2524 bfd_mach_ppc_505
, -1, -1, tot_num_registers (registers_505
),
2526 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2527 bfd_mach_ppc_860
, -1, -1, tot_num_registers (registers_860
),
2529 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2530 bfd_mach_ppc_750
, -1, -1, tot_num_registers (registers_750
),
2532 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2533 bfd_mach_ppc_7400
, -1, -1, tot_num_registers (registers_7400
),
2535 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc
,
2536 bfd_mach_ppc_e500
, -1, -1, tot_num_registers (registers_e500
),
2540 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2541 bfd_mach_ppc64
, -1, -1, tot_num_registers (registers_powerpc
),
2543 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2544 bfd_mach_ppc_620
, -1, -1, tot_num_registers (registers_powerpc
),
2546 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2547 bfd_mach_ppc_630
, -1, -1, tot_num_registers (registers_powerpc
),
2549 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2550 bfd_mach_ppc_a35
, -1, -1, tot_num_registers (registers_powerpc
),
2552 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2553 bfd_mach_ppc_rs64ii
, -1, -1, tot_num_registers (registers_powerpc
),
2555 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2556 bfd_mach_ppc_rs64iii
, -1, -1, tot_num_registers (registers_powerpc
),
2559 /* FIXME: I haven't checked the register sets of the following. */
2560 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2561 bfd_mach_rs6k_rs1
, -1, -1, tot_num_registers (registers_power
),
2563 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2564 bfd_mach_rs6k_rsc
, -1, -1, tot_num_registers (registers_power
),
2566 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2567 bfd_mach_rs6k_rs2
, -1, -1, tot_num_registers (registers_power
),
2570 {0, 0, 0, 0, 0, 0, 0, 0}
2573 /* Initialize the number of registers and pseudo registers in each variant. */
2576 init_variants (void)
2580 for (v
= variants
; v
->name
; v
++)
2583 v
->nregs
= num_registers (v
->regs
, v
->num_tot_regs
);
2584 if (v
->npregs
== -1)
2585 v
->npregs
= num_pseudo_registers (v
->regs
, v
->num_tot_regs
);
2589 /* Return the variant corresponding to architecture ARCH and machine number
2590 MACH. If no such variant exists, return null. */
2592 static const struct variant
*
2593 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2595 const struct variant
*v
;
2597 for (v
= variants
; v
->name
; v
++)
2598 if (arch
== v
->arch
&& mach
== v
->mach
)
2605 gdb_print_insn_powerpc (bfd_vma memaddr
, disassemble_info
*info
)
2607 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2608 return print_insn_big_powerpc (memaddr
, info
);
2610 return print_insn_little_powerpc (memaddr
, info
);
2613 /* Initialize the current architecture based on INFO. If possible, re-use an
2614 architecture from ARCHES, which is a list of architectures already created
2615 during this debugging session.
2617 Called e.g. at program startup, when reading a core file, and when reading
2620 static struct gdbarch
*
2621 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2623 struct gdbarch
*gdbarch
;
2624 struct gdbarch_tdep
*tdep
;
2625 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2627 const struct variant
*v
;
2628 enum bfd_architecture arch
;
2632 enum gdb_osabi osabi
= GDB_OSABI_UNKNOWN
;
2635 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2636 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2638 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2639 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2641 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2644 osabi
= gdbarch_lookup_osabi (info
.abfd
);
2646 /* Check word size. If INFO is from a binary file, infer it from
2647 that, else choose a likely default. */
2648 if (from_xcoff_exec
)
2650 if (bfd_xcoff_is_xcoff64 (info
.abfd
))
2655 else if (from_elf_exec
)
2657 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2664 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2665 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2666 info
.bfd_arch_info
->bits_per_byte
;
2671 /* Find a candidate among extant architectures. */
2672 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2674 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2676 /* Word size in the various PowerPC bfd_arch_info structs isn't
2677 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2678 separate word size check. */
2679 tdep
= gdbarch_tdep (arches
->gdbarch
);
2680 if (tdep
&& tdep
->wordsize
== wordsize
&& tdep
->osabi
== osabi
)
2681 return arches
->gdbarch
;
2684 /* None found, create a new architecture from INFO, whose bfd_arch_info
2685 validity depends on the source:
2686 - executable useless
2687 - rs6000_host_arch() good
2689 - "set arch" trust blindly
2690 - GDB startup useless but harmless */
2692 if (!from_xcoff_exec
)
2694 arch
= info
.bfd_arch_info
->arch
;
2695 mach
= info
.bfd_arch_info
->mach
;
2699 arch
= bfd_arch_powerpc
;
2701 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2702 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2704 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2705 tdep
->wordsize
= wordsize
;
2706 tdep
->osabi
= osabi
;
2708 /* For e500 executables, the apuinfo section is of help here. Such
2709 section contains the identifier and revision number of each
2710 Application-specific Processing Unit that is present on the
2711 chip. The content of the section is determined by the assembler
2712 which looks at each instruction and determines which unit (and
2713 which version of it) can execute it. In our case we just look for
2714 the existance of the section. */
2718 sect
= bfd_get_section_by_name (info
.abfd
, ".PPC.EMB.apuinfo");
2721 arch
= info
.bfd_arch_info
->arch
;
2722 mach
= bfd_mach_ppc_e500
;
2723 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2724 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2728 gdbarch
= gdbarch_alloc (&info
, tdep
);
2729 power
= arch
== bfd_arch_rs6000
;
2731 /* Initialize the number of real and pseudo registers in each variant. */
2734 /* Choose variant. */
2735 v
= find_variant_by_arch (arch
, mach
);
2739 tdep
->regs
= v
->regs
;
2741 tdep
->ppc_gp0_regnum
= 0;
2742 tdep
->ppc_gplast_regnum
= 31;
2743 tdep
->ppc_toc_regnum
= 2;
2744 tdep
->ppc_ps_regnum
= 65;
2745 tdep
->ppc_cr_regnum
= 66;
2746 tdep
->ppc_lr_regnum
= 67;
2747 tdep
->ppc_ctr_regnum
= 68;
2748 tdep
->ppc_xer_regnum
= 69;
2749 if (v
->mach
== bfd_mach_ppc_601
)
2750 tdep
->ppc_mq_regnum
= 124;
2752 tdep
->ppc_mq_regnum
= 70;
2754 tdep
->ppc_mq_regnum
= -1;
2755 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2757 set_gdbarch_pc_regnum (gdbarch
, 64);
2758 set_gdbarch_sp_regnum (gdbarch
, 1);
2759 set_gdbarch_fp_regnum (gdbarch
, 1);
2760 set_gdbarch_deprecated_extract_return_value (gdbarch
,
2761 rs6000_extract_return_value
);
2762 set_gdbarch_store_return_value (gdbarch
, rs6000_store_return_value
);
2764 if (v
->arch
== bfd_arch_powerpc
)
2768 tdep
->ppc_vr0_regnum
= 71;
2769 tdep
->ppc_vrsave_regnum
= 104;
2770 tdep
->ppc_ev0_regnum
= -1;
2771 tdep
->ppc_ev31_regnum
= -1;
2773 case bfd_mach_ppc_7400
:
2774 tdep
->ppc_vr0_regnum
= 119;
2775 tdep
->ppc_vrsave_regnum
= 153;
2776 tdep
->ppc_ev0_regnum
= -1;
2777 tdep
->ppc_ev31_regnum
= -1;
2779 case bfd_mach_ppc_e500
:
2780 tdep
->ppc_gp0_regnum
= 39;
2781 tdep
->ppc_gplast_regnum
= 70;
2782 tdep
->ppc_toc_regnum
= -1;
2783 tdep
->ppc_ps_regnum
= 1;
2784 tdep
->ppc_cr_regnum
= 2;
2785 tdep
->ppc_lr_regnum
= 3;
2786 tdep
->ppc_ctr_regnum
= 4;
2787 tdep
->ppc_xer_regnum
= 5;
2788 tdep
->ppc_ev0_regnum
= 7;
2789 tdep
->ppc_ev31_regnum
= 38;
2790 set_gdbarch_pc_regnum (gdbarch
, 0);
2791 set_gdbarch_sp_regnum (gdbarch
, 40);
2792 set_gdbarch_fp_regnum (gdbarch
, 40);
2793 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, e500_dwarf2_reg_to_regnum
);
2794 set_gdbarch_pseudo_register_read (gdbarch
, e500_pseudo_register_read
);
2795 set_gdbarch_pseudo_register_write (gdbarch
, e500_pseudo_register_write
);
2796 set_gdbarch_extract_return_value (gdbarch
, e500_extract_return_value
);
2797 set_gdbarch_store_return_value (gdbarch
, e500_store_return_value
);
2800 tdep
->ppc_vr0_regnum
= -1;
2801 tdep
->ppc_vrsave_regnum
= -1;
2802 tdep
->ppc_ev0_regnum
= -1;
2803 tdep
->ppc_ev31_regnum
= -1;
2807 /* Set lr_frame_offset. */
2809 tdep
->lr_frame_offset
= 16;
2811 tdep
->lr_frame_offset
= 4;
2813 tdep
->lr_frame_offset
= 8;
2815 /* Calculate byte offsets in raw register array. */
2816 tdep
->regoff
= xmalloc (v
->num_tot_regs
* sizeof (int));
2817 for (i
= off
= 0; i
< v
->num_tot_regs
; i
++)
2819 tdep
->regoff
[i
] = off
;
2820 off
+= regsize (v
->regs
+ i
, wordsize
);
2823 /* Select instruction printer. */
2825 set_gdbarch_print_insn (gdbarch
, print_insn_rs6000
);
2827 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_powerpc
);
2829 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
2830 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2831 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
2832 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2833 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
2835 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2836 set_gdbarch_num_pseudo_regs (gdbarch
, v
->npregs
);
2837 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2838 set_gdbarch_register_size (gdbarch
, wordsize
);
2839 set_gdbarch_register_bytes (gdbarch
, off
);
2840 set_gdbarch_register_byte (gdbarch
, rs6000_register_byte
);
2841 set_gdbarch_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2842 set_gdbarch_max_register_raw_size (gdbarch
, 16);
2843 set_gdbarch_register_virtual_size (gdbarch
, generic_register_size
);
2844 set_gdbarch_max_register_virtual_size (gdbarch
, 16);
2845 set_gdbarch_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2847 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2848 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2849 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2850 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2851 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2852 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2853 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2854 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2855 set_gdbarch_char_signed (gdbarch
, 0);
2857 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
2858 set_gdbarch_call_dummy_length (gdbarch
, 0);
2859 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
2860 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2861 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
2862 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2863 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2864 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
2865 set_gdbarch_call_dummy_p (gdbarch
, 1);
2866 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2867 set_gdbarch_get_saved_register (gdbarch
, generic_unwind_get_saved_register
);
2868 set_gdbarch_fix_call_dummy (gdbarch
, rs6000_fix_call_dummy
);
2869 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
2870 set_gdbarch_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2871 set_gdbarch_push_return_address (gdbarch
, ppc_push_return_address
);
2872 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2873 set_gdbarch_coerce_float_to_double (gdbarch
, rs6000_coerce_float_to_double
);
2875 set_gdbarch_register_convertible (gdbarch
, rs6000_register_convertible
);
2876 set_gdbarch_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2877 set_gdbarch_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2878 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2879 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2880 is correct for the SysV ABI when the wordsize is 8, but I'm also
2881 fairly certain that ppc_sysv_abi_push_arguments() will give even
2882 worse results since it only works for 32-bit code. So, for the moment,
2883 we're better off calling rs6000_push_arguments() since it works for
2884 64-bit code. At some point in the future, this matter needs to be
2886 if (sysv_abi
&& wordsize
== 4)
2887 set_gdbarch_push_arguments (gdbarch
, ppc_sysv_abi_push_arguments
);
2889 set_gdbarch_push_arguments (gdbarch
, rs6000_push_arguments
);
2891 set_gdbarch_store_struct_return (gdbarch
, rs6000_store_struct_return
);
2892 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2893 set_gdbarch_pop_frame (gdbarch
, rs6000_pop_frame
);
2895 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2896 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2897 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2898 set_gdbarch_function_start_offset (gdbarch
, 0);
2899 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2901 /* Not sure on this. FIXMEmgo */
2902 set_gdbarch_frame_args_skip (gdbarch
, 8);
2905 set_gdbarch_use_struct_convention (gdbarch
,
2906 ppc_sysv_abi_use_struct_convention
);
2908 set_gdbarch_use_struct_convention (gdbarch
,
2909 generic_use_struct_convention
);
2911 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
2913 set_gdbarch_frameless_function_invocation (gdbarch
,
2914 rs6000_frameless_function_invocation
);
2915 set_gdbarch_frame_chain (gdbarch
, rs6000_frame_chain
);
2916 set_gdbarch_frame_saved_pc (gdbarch
, rs6000_frame_saved_pc
);
2918 set_gdbarch_frame_init_saved_regs (gdbarch
, rs6000_frame_init_saved_regs
);
2919 set_gdbarch_init_extra_frame_info (gdbarch
, rs6000_init_extra_frame_info
);
2923 /* Handle RS/6000 function pointers (which are really function
2925 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2926 rs6000_convert_from_func_ptr_addr
);
2928 set_gdbarch_frame_args_address (gdbarch
, rs6000_frame_args_address
);
2929 set_gdbarch_frame_locals_address (gdbarch
, rs6000_frame_args_address
);
2930 set_gdbarch_saved_pc_after_call (gdbarch
, rs6000_saved_pc_after_call
);
2932 /* We can't tell how many args there are
2933 now that the C compiler delays popping them. */
2934 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
2936 /* Hook in ABI-specific overrides, if they have been registered. */
2937 gdbarch_init_osabi (info
, gdbarch
, osabi
);
2943 rs6000_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2945 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2950 fprintf_unfiltered (file
, "rs6000_dump_tdep: OS ABI = %s\n",
2951 gdbarch_osabi_name (tdep
->osabi
));
2954 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
2957 rs6000_info_powerpc_command (char *args
, int from_tty
)
2959 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
2962 /* Initialization code. */
2965 _initialize_rs6000_tdep (void)
2967 gdbarch_register (bfd_arch_rs6000
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2968 gdbarch_register (bfd_arch_powerpc
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2970 /* Add root prefix command for "info powerpc" commands */
2971 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
2972 "Various POWERPC info specific commands.",
2973 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);