gdb/rs6000-xdep.c

   1 /* IBM RS/6000 host-dependent code for GDB, the GNU debugger.
   2    Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
   3
   4 This file is part of GDB.
   5
   6 This program is free software; you can redistribute it and/or modify
   7 it under the terms of the GNU General Public License as published by
   8 the Free Software Foundation; either version 2 of the License, or
   9 (at your option) any later version.
  10
  11 This program is distributed in the hope that it will be useful,
  12 but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 GNU General Public License for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with this program; if not, write to the Free Software
  18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
  19
  20 #include <stdio.h>
  21 #include "defs.h"
  22 #include "frame.h"
  23 #include "inferior.h"
  24 #include "symtab.h"
  25 #include "target.h"
  26
  27 #include <sys/param.h>
  28 #include <sys/dir.h>
  29 #include <sys/user.h>
  30 #include <signal.h>
  31 #include <sys/ioctl.h>
  32 #include <fcntl.h>
  33
  34 #include <sys/ptrace.h>
  35 #include <sys/reg.h>
  36
  37 #include <a.out.h>
  38 #include <sys/file.h>
  39 #include <sys/stat.h>
  40 #include <sys/core.h>
  41 #include <sys/ldr.h>
  42 #include <sys/utsname.h>
  43
  44 extern int errno;
  45 extern int attach_flag;
  46
  47 /* Conversion from gdb-to-system special purpose register numbers.. */
  48
  49 static int special_regs[] = {
  50   IAR,                          /* PC_REGNUM    */
  51   MSR,                          /* PS_REGNUM    */
  52   CR,                           /* CR_REGNUM    */
  53   LR,                           /* LR_REGNUM    */
  54   CTR,                          /* CTR_REGNUM   */
  55   XER,                          /* XER_REGNUM   */
  56   MQ                            /* MQ_REGNUM    */
  57 };
  58
  59
  60 /* Nonzero if we just simulated a single step break. */
  61 extern int one_stepped;
  62
  63 extern char register_valid[];
  64
  65 \f
  66 void
  67 fetch_inferior_registers (regno)
  68   int regno;
  69 {
  70   int ii;
  71   extern char registers[];
  72
  73   if (regno < 0) {                      /* for all registers */
  74
  75     /* read 32 general purpose registers. */
  76
  77     for (ii=0; ii < 32; ++ii)
  78       *(int*)&registers[REGISTER_BYTE (ii)] =
  79         ptrace (PT_READ_GPR, inferior_pid, ii, 0, 0);
  80
  81     /* read general purpose floating point registers. */
  82
  83     for (ii=0; ii < 32; ++ii)
  84       ptrace (PT_READ_FPR, inferior_pid,
  85         (int*)&registers [REGISTER_BYTE (FP0_REGNUM+ii)], FPR0+ii, 0);
  86
  87     /* read special registers. */
  88     for (ii=0; ii <= LAST_SP_REGNUM-FIRST_SP_REGNUM; ++ii)
  89       *(int*)&registers[REGISTER_BYTE (FIRST_SP_REGNUM+ii)] =
  90         ptrace (PT_READ_GPR, inferior_pid, special_regs[ii], 0, 0);
  91
  92     registers_fetched ();
  93     return;
  94   }
  95
  96   /* else an individual register is addressed. */
  97
  98   else if (regno < FP0_REGNUM) {                /* a GPR */
  99     *(int*)&registers[REGISTER_BYTE (regno)] =
 100         ptrace (PT_READ_GPR, inferior_pid, regno, 0, 0);
 101   }
 102   else if (regno <= FPLAST_REGNUM) {            /* a FPR */
 103     ptrace (PT_READ_FPR, inferior_pid,
 104         (int*)&registers [REGISTER_BYTE (regno)], (regno-FP0_REGNUM+FPR0), 0);
 105   }
 106   else if (regno <= LAST_SP_REGNUM) {           /* a special register */
 107     *(int*)&registers[REGISTER_BYTE (regno)] =
 108         ptrace (PT_READ_GPR, inferior_pid,
 109                 special_regs[regno-FIRST_SP_REGNUM], 0, 0);
 110   }
 111   else
 112     fprintf (stderr, "gdb error: register no %d not implemented.\n", regno);
 113
 114   register_valid [regno] = 1;
 115 }
 116
 117 /* Store our register values back into the inferior.
 118    If REGNO is -1, do this for all registers.
 119    Otherwise, REGNO specifies which register (so we can save time).  */
 120
 121 void
 122 store_inferior_registers (regno)
 123      int regno;
 124 {
 125   extern char registers[];
 126
 127   errno = 0;
 128
 129   if (regno == -1) {                    /* for all registers..  */
 130       int ii;
 131
 132        /* execute one dummy instruction (which is a breakpoint) in inferior
 133           process. So give kernel a chance to do internal house keeping.
 134           Otherwise the following ptrace(2) calls will mess up user stack
 135           since kernel will get confused about the bottom of the stack (%sp) */
 136
 137        exec_one_dummy_insn ();
 138
 139       /* write general purpose registers first! */
 140       for ( ii=GPR0; ii<=GPR31; ++ii) {
 141         ptrace (PT_WRITE_GPR, inferior_pid, ii,
 142                 *(int*)&registers[REGISTER_BYTE (ii)], 0);
 143         if ( errno ) {
 144           perror ("ptrace write_gpr"); errno = 0;
 145         }
 146       }
 147
 148       /* write floating point registers now. */
 149       for ( ii=0; ii < 32; ++ii) {
 150         ptrace (PT_WRITE_FPR, inferior_pid,
 151                   (int*)&registers[REGISTER_BYTE (FP0_REGNUM+ii)], FPR0+ii, 0);
 152         if ( errno ) {
 153           perror ("ptrace write_fpr"); errno = 0;
 154         }
 155       }
 156
 157       /* write special registers. */
 158       for (ii=0; ii <= LAST_SP_REGNUM-FIRST_SP_REGNUM; ++ii) {
 159         ptrace (PT_WRITE_GPR, inferior_pid, special_regs[ii],
 160                  *(int*)&registers[REGISTER_BYTE (FIRST_SP_REGNUM+ii)], 0);
 161         if ( errno ) {
 162           perror ("ptrace write_gpr"); errno = 0;
 163         }
 164       }
 165   }
 166
 167   /* else, a specific register number is given... */
 168
 169   else if (regno < FP0_REGNUM) {                /* a GPR */
 170
 171     ptrace (PT_WRITE_GPR, inferior_pid, regno,
 172                 *(int*)&registers[REGISTER_BYTE (regno)], 0);
 173   }
 174
 175   else if (regno <= FPLAST_REGNUM) {            /* a FPR */
 176     ptrace (PT_WRITE_FPR, inferior_pid,
 177         (int*)&registers[REGISTER_BYTE (regno)], regno-FP0_REGNUM+FPR0, 0);
 178   }
 179
 180   else if (regno <= LAST_SP_REGNUM) {           /* a special register */
 181
 182     ptrace (PT_WRITE_GPR, inferior_pid, special_regs [regno-FIRST_SP_REGNUM],
 183                 *(int*)&registers[REGISTER_BYTE (regno)], 0);
 184   }
 185
 186   else
 187     fprintf (stderr, "Gdb error: register no %d not implemented.\n", regno);
 188
 189   if ( errno ) {
 190     perror ("ptrace write");  errno = 0;
 191   }
 192 }
 193
 194 void
 195 fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
 196      char *core_reg_sect;
 197      unsigned core_reg_size;
 198      int which;
 199      unsigned int reg_addr;     /* Unused in this version */
 200 {
 201   /* fetch GPRs and special registers from the first register section
 202      in core bfd. */
 203   if (which == 0) {
 204
 205     /* copy GPRs first. */
 206     bcopy (core_reg_sect, registers, 32 * 4);
 207
 208     /* gdb's internal register template and bfd's register section layout
 209        should share a common include file. FIXMEmgo */
 210     /* then comes special registes. They are supposed to be in the same
 211        order in gdb template and bfd `.reg' section. */
 212     core_reg_sect += (32 * 4);
 213     bcopy (core_reg_sect, &registers [REGISTER_BYTE (FIRST_SP_REGNUM)],
 214                         (LAST_SP_REGNUM - FIRST_SP_REGNUM + 1) * 4);
 215   }
 216
 217   /* fetch floating point registers from register section 2 in core bfd. */
 218   else if (which == 2)
 219     bcopy (core_reg_sect, &registers [REGISTER_BYTE (FP0_REGNUM)], 32 * 8);
 220
 221   else
 222     fprintf (stderr, "Gdb error: unknown parameter to fetch_core_registers().\n");
 223 }
 224
 225
 226 frameless_function_invocation (fi)
 227 struct frame_info *fi;
 228 {
 229   CORE_ADDR func_start;
 230   int frameless, dummy;
 231
 232   func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
 233
 234   /* If we failed to find the start of the function, it is a mistake
 235      to inspect the instructions. */
 236
 237   if (!func_start)
 238     return 0;
 239
 240   function_frame_info (func_start, &frameless, &dummy, &dummy, &dummy);
 241   return frameless;
 242 }
 243
 244
 245 /* aixcoff_relocate_symtab -    hook for symbol table relocation.
 246    also reads shared libraries.. */
 247
 248 aixcoff_relocate_symtab (pid)
 249 unsigned int pid;
 250 {
 251 #define MAX_LOAD_SEGS 64                /* maximum number of load segments */
 252
 253     struct ld_info *ldi;
 254     int temp;
 255
 256     ldi = (void *) alloca(MAX_LOAD_SEGS * sizeof (*ldi));
 257
 258     /* According to my humble theory, aixcoff has some timing problems and
 259        when the user stack grows, kernel doesn't update stack info in time
 260        and ptrace calls step on user stack. That is why we sleep here a little,
 261        and give kernel to update its internals. */
 262
 263     usleep (36000);
 264
 265     errno = 0;
 266     ptrace(PT_LDINFO, pid, ldi, MAX_LOAD_SEGS * sizeof(*ldi), ldi);
 267     if (errno) {
 268       perror_with_name ("ptrace ldinfo");
 269       return 0;
 270     }
 271
 272     vmap_ldinfo(ldi);
 273
 274    do {
 275      add_text_to_loadinfo (ldi->ldinfo_textorg, ldi->ldinfo_dataorg);
 276     } while (ldi->ldinfo_next
 277              && (ldi = (void *) (ldi->ldinfo_next + (char *) ldi)));
 278
 279 #if 0
 280   /* Now that we've jumbled things around, re-sort them.  */
 281   sort_minimal_symbols ();
 282 #endif
 283
 284   /* relocate the exec and core sections as well. */
 285   vmap_exec ();
 286 }
 287
 288
 289 /* Keep an array of load segment information and their TOC table addresses.
 290    This info will be useful when calling a shared library function by hand. */
 291
 292 typedef struct {
 293   unsigned long textorg, dataorg, toc_offset;
 294 } LoadInfo;
 295
 296 #define LOADINFOLEN     10
 297
 298 static  LoadInfo *loadInfo = NULL;
 299 static  int     loadInfoLen = 0;
 300 static  int     loadInfoTocIndex = 0;
 301 int     aix_loadInfoTextIndex = 0;
 302
 303
 304 xcoff_init_loadinfo ()
 305 {
 306   loadInfoTocIndex = 0;
 307   aix_loadInfoTextIndex = 0;
 308
 309   if (loadInfoLen == 0) {
 310     loadInfo = (void*) xmalloc (sizeof (LoadInfo) * LOADINFOLEN);
 311     loadInfoLen = LOADINFOLEN;
 312   }
 313 }
 314
 315
 316 free_loadinfo ()
 317 {
 318   if (loadInfo)
 319     free (loadInfo);
 320   loadInfo = NULL;
 321   loadInfoLen = 0;
 322   loadInfoTocIndex = 0;
 323   aix_loadInfoTextIndex = 0;
 324 }
 325
 326
 327 xcoff_add_toc_to_loadinfo (unsigned long tocaddr)
 328 {
 329   while (loadInfoTocIndex >= loadInfoLen) {
 330     loadInfoLen += LOADINFOLEN;
 331     loadInfo = (void*) xrealloc (loadInfo, sizeof(LoadInfo) * loadInfoLen);
 332   }
 333   loadInfo [loadInfoTocIndex++].toc_offset = tocaddr;
 334 }
 335
 336
 337 add_text_to_loadinfo (unsigned long textaddr, unsigned long dataaddr)
 338 {
 339   while (aix_loadInfoTextIndex >= loadInfoLen) {
 340     loadInfoLen += LOADINFOLEN;
 341     loadInfo = (void*) xrealloc (loadInfo, sizeof(LoadInfo) * loadInfoLen);
 342   }
 343   loadInfo [aix_loadInfoTextIndex].textorg = textaddr;
 344   loadInfo [aix_loadInfoTextIndex].dataorg = dataaddr;
 345   ++aix_loadInfoTextIndex;
 346 }
 347
 348
 349 unsigned long
 350 find_toc_address (unsigned long pc)
 351 {
 352   int ii, toc_entry, tocbase = 0;
 353
 354   for (ii=0; ii < aix_loadInfoTextIndex; ++ii)
 355     if (pc > loadInfo [ii].textorg && loadInfo [ii].textorg > tocbase) {
 356       toc_entry = ii;
 357       tocbase =  loadInfo [ii].textorg;
 358     }
 359
 360   return loadInfo [toc_entry].dataorg + loadInfo [toc_entry].toc_offset;
 361 }
 362
 363
 364 /* execute one dummy breakpoint instruction. This way we give kernel
 365    a chance to do some housekeeping and update inferior's internal data,
 366    including u_area. */
 367
 368 exec_one_dummy_insn ()
 369 {
 370 #define DUMMY_INSN_ADDR (TEXT_SEGMENT_BASE)+0x200
 371
 372   unsigned long shadow;
 373   unsigned int status, pid;
 374
 375   /* We plant one dummy breakpoint into DUMMY_INSN_ADDR address. We assume that
 376      this address will never be executed again by the real code. */
 377
 378   target_insert_breakpoint (DUMMY_INSN_ADDR, &shadow);
 379
 380   errno = 0;
 381   ptrace (PT_CONTINUE, inferior_pid, DUMMY_INSN_ADDR, 0, 0);
 382   if (errno)
 383     perror ("pt_continue");
 384
 385   do {
 386     pid = wait (&status);
 387   } while (pid != inferior_pid);
 388
 389   target_remove_breakpoint (DUMMY_INSN_ADDR, &shadow);
 390 }
 391
 392
 393 /* Return the number of initial trap signals we need to ignore once the inferior
 394    process starts running. This will be `2' for aix-3.1, `3' for aix-3.2 */
 395
 396 int
 397 aix_starting_inferior_traps ()
 398 {
 399   struct utsname unamebuf;
 400
 401   if (uname (&unamebuf) == -1)
 402     fatal ("uname(3) failed.");
 403
 404   /* Assume the future versions will behave like 3.2 and return '3' for
 405      anything other than 3.1x. The extra trap in 3.2 is the "trap after the
 406      program is loaded" signal. */
 407
 408   if (unamebuf.version[0] == '3' && unamebuf.release[0] == '1')
 409     return 2;
 410   else
 411     return 3;
 412 }