gdb/rs6000-xdep.c

   1 /* IBM RS/6000 host-dependent code for GDB, the GNU debugger.
   2    Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
   3
   4 This file is part of GDB.
   5
   6 This program is free software; you can redistribute it and/or modify
   7 it under the terms of the GNU General Public License as published by
   8 the Free Software Foundation; either version 2 of the License, or
   9 (at your option) any later version.
  10
  11 This program is distributed in the hope that it will be useful,
  12 but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 GNU General Public License for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with this program; if not, write to the Free Software
  18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
  19
  20 #include <stdio.h>
  21 #include "defs.h"
  22 #include "frame.h"
  23 #include "inferior.h"
  24 #include "symtab.h"
  25 #include "target.h"
  26
  27 #include <sys/param.h>
  28 #include <sys/dir.h>
  29 #include <sys/user.h>
  30 #include <signal.h>
  31 #include <sys/ioctl.h>
  32 #include <fcntl.h>
  33
  34 #include <sys/ptrace.h>
  35 #include <sys/reg.h>
  36
  37 #include <a.out.h>
  38 #include <sys/file.h>
  39 #include <sys/stat.h>
  40 #include <sys/core.h>
  41 #include <sys/ldr.h>
  42 #include <sys/utsname.h>
  43
  44 extern int errno;
  45 extern int attach_flag;
  46
  47 /* Conversion from gdb-to-system special purpose register numbers.. */
  48
  49 static int special_regs[] = {
  50   IAR,                          /* PC_REGNUM    */
  51   MSR,                          /* PS_REGNUM    */
  52   CR,                           /* CR_REGNUM    */
  53   LR,                           /* LR_REGNUM    */
  54   CTR,                          /* CTR_REGNUM   */
  55   XER,                          /* XER_REGNUM   */
  56   MQ                            /* MQ_REGNUM    */
  57 };
  58
  59
  60 /* Nonzero if we just simulated a single step break. */
  61 extern int one_stepped;
  62
  63 extern char register_valid[];
  64 extern struct obstack frame_cache_obstack;
  65
  66 \f
  67 void
  68 fetch_inferior_registers (regno)
  69   int regno;
  70 {
  71   int ii;
  72   extern char registers[];
  73
  74   if (regno < 0) {                      /* for all registers */
  75
  76     /* read 32 general purpose registers. */
  77
  78     for (ii=0; ii < 32; ++ii)
  79       *(int*)&registers[REGISTER_BYTE (ii)] =
  80         ptrace (PT_READ_GPR, inferior_pid, ii, 0, 0);
  81
  82     /* read general purpose floating point registers. */
  83
  84     for (ii=0; ii < 32; ++ii)
  85       ptrace (PT_READ_FPR, inferior_pid,
  86         (int*)&registers [REGISTER_BYTE (FP0_REGNUM+ii)], FPR0+ii, 0);
  87
  88     /* read special registers. */
  89     for (ii=0; ii <= LAST_SP_REGNUM-FIRST_SP_REGNUM; ++ii)
  90       *(int*)&registers[REGISTER_BYTE (FIRST_SP_REGNUM+ii)] =
  91         ptrace (PT_READ_GPR, inferior_pid, special_regs[ii], 0, 0);
  92
  93     registers_fetched ();
  94     return;
  95   }
  96
  97   /* else an individual register is addressed. */
  98
  99   else if (regno < FP0_REGNUM) {                /* a GPR */
 100     *(int*)&registers[REGISTER_BYTE (regno)] =
 101         ptrace (PT_READ_GPR, inferior_pid, regno, 0, 0);
 102   }
 103   else if (regno <= FPLAST_REGNUM) {            /* a FPR */
 104     ptrace (PT_READ_FPR, inferior_pid,
 105         (int*)&registers [REGISTER_BYTE (regno)], (regno-FP0_REGNUM+FPR0), 0);
 106   }
 107   else if (regno <= LAST_SP_REGNUM) {           /* a special register */
 108     *(int*)&registers[REGISTER_BYTE (regno)] =
 109         ptrace (PT_READ_GPR, inferior_pid,
 110                 special_regs[regno-FIRST_SP_REGNUM], 0, 0);
 111   }
 112   else
 113     fprintf (stderr, "gdb error: register no %d not implemented.\n", regno);
 114
 115   register_valid [regno] = 1;
 116 }
 117
 118 /* Store our register values back into the inferior.
 119    If REGNO is -1, do this for all registers.
 120    Otherwise, REGNO specifies which register (so we can save time).  */
 121
 122 void
 123 store_inferior_registers (regno)
 124      int regno;
 125 {
 126   extern char registers[];
 127
 128   errno = 0;
 129
 130   if (regno == -1) {                    /* for all registers..  */
 131       int ii;
 132
 133        /* execute one dummy instruction (which is a breakpoint) in inferior
 134           process. So give kernel a chance to do internal house keeping.
 135           Otherwise the following ptrace(2) calls will mess up user stack
 136           since kernel will get confused about the bottom of the stack (%sp) */
 137
 138        exec_one_dummy_insn ();
 139
 140       /* write general purpose registers first! */
 141       for ( ii=GPR0; ii<=GPR31; ++ii) {
 142         ptrace (PT_WRITE_GPR, inferior_pid, ii,
 143                 *(int*)&registers[REGISTER_BYTE (ii)], 0);
 144         if ( errno ) {
 145           perror ("ptrace write_gpr"); errno = 0;
 146         }
 147       }
 148
 149       /* write floating point registers now. */
 150       for ( ii=0; ii < 32; ++ii) {
 151         ptrace (PT_WRITE_FPR, inferior_pid,
 152                   (int*)&registers[REGISTER_BYTE (FP0_REGNUM+ii)], FPR0+ii, 0);
 153         if ( errno ) {
 154           perror ("ptrace write_fpr"); errno = 0;
 155         }
 156       }
 157
 158       /* write special registers. */
 159       for (ii=0; ii <= LAST_SP_REGNUM-FIRST_SP_REGNUM; ++ii) {
 160         ptrace (PT_WRITE_GPR, inferior_pid, special_regs[ii],
 161                  *(int*)&registers[REGISTER_BYTE (FIRST_SP_REGNUM+ii)], 0);
 162         if ( errno ) {
 163           perror ("ptrace write_gpr"); errno = 0;
 164         }
 165       }
 166   }
 167
 168   /* else, a specific register number is given... */
 169
 170   else if (regno < FP0_REGNUM) {                /* a GPR */
 171
 172     ptrace (PT_WRITE_GPR, inferior_pid, regno,
 173                 *(int*)&registers[REGISTER_BYTE (regno)], 0);
 174   }
 175
 176   else if (regno <= FPLAST_REGNUM) {            /* a FPR */
 177     ptrace (PT_WRITE_FPR, inferior_pid,
 178         (int*)&registers[REGISTER_BYTE (regno)], regno-FP0_REGNUM+FPR0, 0);
 179   }
 180
 181   else if (regno <= LAST_SP_REGNUM) {           /* a special register */
 182
 183     ptrace (PT_WRITE_GPR, inferior_pid, special_regs [regno-FIRST_SP_REGNUM],
 184                 *(int*)&registers[REGISTER_BYTE (regno)], 0);
 185   }
 186
 187   else
 188     fprintf (stderr, "Gdb error: register no %d not implemented.\n", regno);
 189
 190   if ( errno ) {
 191     perror ("ptrace write");  errno = 0;
 192   }
 193 }
 194
 195 void
 196 fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
 197      char *core_reg_sect;
 198      unsigned core_reg_size;
 199      int which;
 200      unsigned int reg_addr;     /* Unused in this version */
 201 {
 202   /* fetch GPRs and special registers from the first register section
 203      in core bfd. */
 204   if (which == 0) {
 205
 206     /* copy GPRs first. */
 207     bcopy (core_reg_sect, registers, 32 * 4);
 208
 209     /* gdb's internal register template and bfd's register section layout
 210        should share a common include file. FIXMEmgo */
 211     /* then comes special registes. They are supposed to be in the same
 212        order in gdb template and bfd `.reg' section. */
 213     core_reg_sect += (32 * 4);
 214     bcopy (core_reg_sect, &registers [REGISTER_BYTE (FIRST_SP_REGNUM)],
 215                         (LAST_SP_REGNUM - FIRST_SP_REGNUM + 1) * 4);
 216   }
 217
 218   /* fetch floating point registers from register section 2 in core bfd. */
 219   else if (which == 2)
 220     bcopy (core_reg_sect, &registers [REGISTER_BYTE (FP0_REGNUM)], 32 * 8);
 221
 222   else
 223     fprintf (stderr, "Gdb error: unknown parameter to fetch_core_registers().\n");
 224 }
 225
 226
 227 frameless_function_invocation (fi)
 228 struct frame_info *fi;
 229 {
 230   CORE_ADDR func_start;
 231   struct aix_framedata fdata;
 232
 233   func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
 234
 235   /* If we failed to find the start of the function, it is a mistake
 236      to inspect the instructions. */
 237
 238   if (!func_start)
 239     return 0;
 240
 241   function_frame_info (func_start, &fdata);
 242   return fdata.frameless;
 243 }
 244
 245
 246 /* If saved registers of frame FI are not known yet, read and cache them.
 247    &FDATAP contains aix_framedata; TDATAP can be NULL,
 248    in which case the framedata are read.
 249  */
 250
 251 static void
 252 frame_get_cache_fsr (fi, fdatap)
 253      struct frame_info *fi;
 254      struct aix_framedata *fdatap;
 255 {
 256   int ii;
 257   CORE_ADDR frame_addr;
 258   struct aix_framedata work_fdata;
 259   if (fi->cache_fsr)
 260     return;
 261
 262   if (fdatap = NULL) {
 263     fdatap = &work_fdata;
 264     function_frame_info (get_pc_function_start (fi->pc), fdatap);
 265   }
 266
 267   fi->cache_fsr = (struct frame_saved_regs *)
 268       obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
 269   bzero (fi->cache_fsr, sizeof (struct frame_saved_regs));
 270
 271   if (fi->prev && fi->prev->frame)
 272     frame_addr = fi->prev->frame;
 273   else
 274     frame_addr = read_memory_integer (fi->frame, 4);
 275
 276   /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
 277      All fpr's from saved_fpr to fp31 are saved right underneath caller
 278      stack pointer, starting from fp31 first. */
 279
 280   if (fdatap->saved_fpr >= 0) {
 281     for (ii=31; ii >= fdatap->saved_fpr; --ii)
 282       fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8);
 283     frame_addr -= (32 - fdatap->saved_fpr) * 8;
 284   }
 285
 286   /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
 287      All gpr's from saved_gpr to gpr31 are saved right under saved fprs,
 288      starting from r31 first. */
 289
 290   if (fdatap->saved_gpr >= 0)
 291     for (ii=31; ii >= fdatap->saved_gpr; --ii)
 292       fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4);
 293 }
 294
 295 /* Return the address of a frame. This is the inital %sp value when the frame
 296    was first allocated. For functions calling alloca(), it might be saved in
 297    an alloca register. */
 298
 299 CORE_ADDR
 300 frame_initial_stack_address (fi)
 301      struct frame_info *fi;
 302 {
 303   CORE_ADDR tmpaddr;
 304   struct aix_framedata fdata;
 305   struct frame_info *callee_fi;
 306
 307   /* if the initial stack pointer (frame address) of this frame is known,
 308      just return it. */
 309
 310   if (fi->initial_sp)
 311     return fi->initial_sp;
 312
 313   /* find out if this function is using an alloca register.. */
 314
 315   function_frame_info (get_pc_function_start (fi->pc), &fdata);
 316
 317   /* if saved registers of this frame are not known yet, read and cache them. */
 318
 319   if (!fi->cache_fsr)
 320     frame_get_cache_fsr (fi, &fdata);
 321
 322   /* If no alloca register used, then fi->frame is the value of the %sp for
 323      this frame, and it is good enough. */
 324
 325   if (fdata.alloca_reg < 0) {
 326     fi->initial_sp = fi->frame;
 327     return fi->initial_sp;
 328   }
 329
 330   /* This function has an alloca register. If this is the top-most frame
 331      (with the lowest address), the value in alloca register is good. */
 332
 333   if (!fi->next)
 334     return fi->initial_sp = read_register (fdata.alloca_reg);
 335
 336   /* Otherwise, this is a caller frame. Callee has usually already saved
 337      registers, but there are are exceptions (such as when the callee
 338      has no parameters). Find the address in which caller's alloca
 339      register is saved. */
 340
 341   for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
 342
 343     if (!callee_fi->cache_fsr)
 344       frame_get_cache_fsr (fi, NULL);
 345
 346     /* this is the address in which alloca register is saved. */
 347
 348     tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
 349     if (tmpaddr) {
 350       fi->initial_sp = read_memory_integer (tmpaddr, 4);
 351       return fi->initial_sp;
 352     }
 353
 354     /* Go look into deeper levels of the frame chain to see if any one of
 355        the callees has saved alloca register. */
 356   }
 357
 358   /* If alloca register was not saved, by the callee (or any of its callees)
 359      then the value in the register is still good. */
 360
 361   return fi->initial_sp = read_register (fdata.alloca_reg);
 362 }
 363
 364
 365
 366 /* aixcoff_relocate_symtab -    hook for symbol table relocation.
 367    also reads shared libraries.. */
 368
 369 aixcoff_relocate_symtab (pid)
 370 unsigned int pid;
 371 {
 372 #define MAX_LOAD_SEGS 64                /* maximum number of load segments */
 373
 374     struct ld_info *ldi;
 375     int temp;
 376
 377     ldi = (void *) alloca(MAX_LOAD_SEGS * sizeof (*ldi));
 378
 379     /* According to my humble theory, aixcoff has some timing problems and
 380        when the user stack grows, kernel doesn't update stack info in time
 381        and ptrace calls step on user stack. That is why we sleep here a little,
 382        and give kernel to update its internals. */
 383
 384     usleep (36000);
 385
 386     errno = 0;
 387     ptrace(PT_LDINFO, pid, ldi, MAX_LOAD_SEGS * sizeof(*ldi), ldi);
 388     if (errno) {
 389       perror_with_name ("ptrace ldinfo");
 390       return 0;
 391     }
 392
 393     vmap_ldinfo(ldi);
 394
 395    do {
 396      add_text_to_loadinfo (ldi->ldinfo_textorg, ldi->ldinfo_dataorg);
 397     } while (ldi->ldinfo_next
 398              && (ldi = (void *) (ldi->ldinfo_next + (char *) ldi)));
 399
 400 #if 0
 401   /* Now that we've jumbled things around, re-sort them.  */
 402   sort_minimal_symbols ();
 403 #endif
 404
 405   /* relocate the exec and core sections as well. */
 406   vmap_exec ();
 407 }
 408
 409
 410 /* Keep an array of load segment information and their TOC table addresses.
 411    This info will be useful when calling a shared library function by hand. */
 412
 413 typedef struct {
 414   unsigned long textorg, dataorg, toc_offset;
 415 } LoadInfo;
 416
 417 #define LOADINFOLEN     10
 418
 419 static  LoadInfo *loadInfo = NULL;
 420 static  int     loadInfoLen = 0;
 421 static  int     loadInfoTocIndex = 0;
 422 int     aix_loadInfoTextIndex = 0;
 423
 424
 425 xcoff_init_loadinfo ()
 426 {
 427   loadInfoTocIndex = 0;
 428   aix_loadInfoTextIndex = 0;
 429
 430   if (loadInfoLen == 0) {
 431     loadInfo = (void*) xmalloc (sizeof (LoadInfo) * LOADINFOLEN);
 432     loadInfoLen = LOADINFOLEN;
 433   }
 434 }
 435
 436
 437 free_loadinfo ()
 438 {
 439   if (loadInfo)
 440     free (loadInfo);
 441   loadInfo = NULL;
 442   loadInfoLen = 0;
 443   loadInfoTocIndex = 0;
 444   aix_loadInfoTextIndex = 0;
 445 }
 446
 447
 448 xcoff_add_toc_to_loadinfo (unsigned long tocaddr)
 449 {
 450   while (loadInfoTocIndex >= loadInfoLen) {
 451     loadInfoLen += LOADINFOLEN;
 452     loadInfo = (void*) xrealloc (loadInfo, sizeof(LoadInfo) * loadInfoLen);
 453   }
 454   loadInfo [loadInfoTocIndex++].toc_offset = tocaddr;
 455 }
 456
 457
 458 add_text_to_loadinfo (unsigned long textaddr, unsigned long dataaddr)
 459 {
 460   while (aix_loadInfoTextIndex >= loadInfoLen) {
 461     loadInfoLen += LOADINFOLEN;
 462     loadInfo = (void*) xrealloc (loadInfo, sizeof(LoadInfo) * loadInfoLen);
 463   }
 464   loadInfo [aix_loadInfoTextIndex].textorg = textaddr;
 465   loadInfo [aix_loadInfoTextIndex].dataorg = dataaddr;
 466   ++aix_loadInfoTextIndex;
 467 }
 468
 469
 470 unsigned long
 471 find_toc_address (unsigned long pc)
 472 {
 473   int ii, toc_entry, tocbase = 0;
 474
 475   for (ii=0; ii < aix_loadInfoTextIndex; ++ii)
 476     if (pc > loadInfo [ii].textorg && loadInfo [ii].textorg > tocbase) {
 477       toc_entry = ii;
 478       tocbase =  loadInfo [ii].textorg;
 479     }
 480
 481   return loadInfo [toc_entry].dataorg + loadInfo [toc_entry].toc_offset;
 482 }
 483
 484
 485 /* execute one dummy breakpoint instruction. This way we give kernel
 486    a chance to do some housekeeping and update inferior's internal data,
 487    including u_area. */
 488
 489 exec_one_dummy_insn ()
 490 {
 491 #define DUMMY_INSN_ADDR (TEXT_SEGMENT_BASE)+0x200
 492
 493   unsigned long shadow;
 494   unsigned int status, pid;
 495
 496   /* We plant one dummy breakpoint into DUMMY_INSN_ADDR address. We assume that
 497      this address will never be executed again by the real code. */
 498
 499   target_insert_breakpoint (DUMMY_INSN_ADDR, &shadow);
 500
 501   errno = 0;
 502   ptrace (PT_CONTINUE, inferior_pid, DUMMY_INSN_ADDR, 0, 0);
 503   if (errno)
 504     perror ("pt_continue");
 505
 506   do {
 507     pid = wait (&status);
 508   } while (pid != inferior_pid);
 509
 510   target_remove_breakpoint (DUMMY_INSN_ADDR, &shadow);
 511 }
 512
 513
 514 /* Return the number of initial trap signals we need to ignore once the inferior
 515    process starts running. This will be `2' for aix-3.1, `3' for aix-3.2 */
 516
 517 int
 518 aix_starting_inferior_traps ()
 519 {
 520   struct utsname unamebuf;
 521
 522   if (uname (&unamebuf) == -1)
 523     fatal ("uname(3) failed.");
 524
 525   /* Assume the future versions will behave like 3.2 and return '3' for
 526      anything other than 3.1x. The extra trap in 3.2 is the "trap after the
 527      program is loaded" signal. */
 528
 529   if (unamebuf.version[0] == '3' && unamebuf.release[0] == '1')
 530     return 2;
 531   else
 532     return 3;
 533 }