Remove regcache_raw_write
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
1 /* Target-dependent code for s390.
2
3 Copyright (C) 2001-2018 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21
22 #include "arch-utils.h"
23 #include "ax-gdb.h"
24 #include "dwarf2-frame.h"
25 #include "elf/s390.h"
26 #include "elf-bfd.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
29 #include "gdbarch.h"
30 #include "gdbcore.h"
31 #include "infrun.h"
32 #include "linux-tdep.h"
33 #include "objfiles.h"
34 #include "osabi.h"
35 #include "record-full.h"
36 #include "regcache.h"
37 #include "reggroups.h"
38 #include "s390-tdep.h"
39 #include "target-descriptions.h"
40 #include "trad-frame.h"
41 #include "value.h"
42
43 #include "features/s390-linux32.c"
44 #include "features/s390x-linux64.c"
45
46 /* Holds the current set of options to be passed to the disassembler. */
47 static char *s390_disassembler_options;
48
49 /* Breakpoints. */
50
51 constexpr gdb_byte s390_break_insn[] = { 0x0, 0x1 };
52
53 typedef BP_MANIPULATION (s390_break_insn) s390_breakpoint;
54
55 /* Decoding S/390 instructions. */
56
57 /* Read a single instruction from address AT. */
58
59 static int
60 s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
61 {
62 static int s390_instrlen[] = { 2, 4, 4, 6 };
63 int instrlen;
64
65 if (target_read_memory (at, &instr[0], 2))
66 return -1;
67 instrlen = s390_instrlen[instr[0] >> 6];
68 if (instrlen > 2)
69 {
70 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
71 return -1;
72 }
73 return instrlen;
74 }
75
76 /* The functions below are for recognizing and decoding S/390
77 instructions of various formats. Each of them checks whether INSN
78 is an instruction of the given format, with the specified opcodes.
79 If it is, it sets the remaining arguments to the values of the
80 instruction's fields, and returns a non-zero value; otherwise, it
81 returns zero.
82
83 These functions' arguments appear in the order they appear in the
84 instruction, not in the machine-language form. So, opcodes always
85 come first, even though they're sometimes scattered around the
86 instructions. And displacements appear before base and extension
87 registers, as they do in the assembly syntax, not at the end, as
88 they do in the machine language.
89
90 Test for RI instruction format. */
91
92 static int
93 is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
94 {
95 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
96 {
97 *r1 = (insn[1] >> 4) & 0xf;
98 /* i2 is a 16-bit signed quantity. */
99 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
100 return 1;
101 }
102 else
103 return 0;
104 }
105
106 /* Test for RIL instruction format. See comment on is_ri for details. */
107
108 static int
109 is_ril (bfd_byte *insn, int op1, int op2,
110 unsigned int *r1, int *i2)
111 {
112 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
113 {
114 *r1 = (insn[1] >> 4) & 0xf;
115 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
116 no sign extension is necessary, but we don't want to assume
117 that. */
118 *i2 = (((insn[2] << 24)
119 | (insn[3] << 16)
120 | (insn[4] << 8)
121 | (insn[5])) ^ 0x80000000) - 0x80000000;
122 return 1;
123 }
124 else
125 return 0;
126 }
127
128 /* Test for RR instruction format. See comment on is_ri for details. */
129
130 static int
131 is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
132 {
133 if (insn[0] == op)
134 {
135 *r1 = (insn[1] >> 4) & 0xf;
136 *r2 = insn[1] & 0xf;
137 return 1;
138 }
139 else
140 return 0;
141 }
142
143 /* Test for RRE instruction format. See comment on is_ri for details. */
144
145 static int
146 is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
147 {
148 if (((insn[0] << 8) | insn[1]) == op)
149 {
150 /* Yes, insn[3]. insn[2] is unused in RRE format. */
151 *r1 = (insn[3] >> 4) & 0xf;
152 *r2 = insn[3] & 0xf;
153 return 1;
154 }
155 else
156 return 0;
157 }
158
159 /* Test for RS instruction format. See comment on is_ri for details. */
160
161 static int
162 is_rs (bfd_byte *insn, int op,
163 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
164 {
165 if (insn[0] == op)
166 {
167 *r1 = (insn[1] >> 4) & 0xf;
168 *r3 = insn[1] & 0xf;
169 *b2 = (insn[2] >> 4) & 0xf;
170 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
171 return 1;
172 }
173 else
174 return 0;
175 }
176
177 /* Test for RSY instruction format. See comment on is_ri for details. */
178
179 static int
180 is_rsy (bfd_byte *insn, int op1, int op2,
181 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
182 {
183 if (insn[0] == op1
184 && insn[5] == op2)
185 {
186 *r1 = (insn[1] >> 4) & 0xf;
187 *r3 = insn[1] & 0xf;
188 *b2 = (insn[2] >> 4) & 0xf;
189 /* The 'long displacement' is a 20-bit signed integer. */
190 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
191 ^ 0x80000) - 0x80000;
192 return 1;
193 }
194 else
195 return 0;
196 }
197
198 /* Test for RX instruction format. See comment on is_ri for details. */
199
200 static int
201 is_rx (bfd_byte *insn, int op,
202 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
203 {
204 if (insn[0] == op)
205 {
206 *r1 = (insn[1] >> 4) & 0xf;
207 *x2 = insn[1] & 0xf;
208 *b2 = (insn[2] >> 4) & 0xf;
209 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
210 return 1;
211 }
212 else
213 return 0;
214 }
215
216 /* Test for RXY instruction format. See comment on is_ri for details. */
217
218 static int
219 is_rxy (bfd_byte *insn, int op1, int op2,
220 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
221 {
222 if (insn[0] == op1
223 && insn[5] == op2)
224 {
225 *r1 = (insn[1] >> 4) & 0xf;
226 *x2 = insn[1] & 0xf;
227 *b2 = (insn[2] >> 4) & 0xf;
228 /* The 'long displacement' is a 20-bit signed integer. */
229 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
230 ^ 0x80000) - 0x80000;
231 return 1;
232 }
233 else
234 return 0;
235 }
236
237 /* A helper for s390_software_single_step, decides if an instruction
238 is a partial-execution instruction that needs to be executed until
239 completion when in record mode. If it is, returns 1 and writes
240 instruction length to a pointer. */
241
242 static int
243 s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len)
244 {
245 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
246 uint16_t insn;
247
248 insn = read_memory_integer (loc, 2, byte_order);
249
250 switch (insn >> 8)
251 {
252 case 0xa8: /* MVCLE */
253 *len = 4;
254 return 1;
255
256 case 0xeb:
257 {
258 insn = read_memory_integer (loc + 4, 2, byte_order);
259 if ((insn & 0xff) == 0x8e)
260 {
261 /* MVCLU */
262 *len = 6;
263 return 1;
264 }
265 }
266 break;
267 }
268
269 switch (insn)
270 {
271 case 0xb255: /* MVST */
272 case 0xb263: /* CMPSC */
273 case 0xb2a5: /* TRE */
274 case 0xb2a6: /* CU21 */
275 case 0xb2a7: /* CU12 */
276 case 0xb9b0: /* CU14 */
277 case 0xb9b1: /* CU24 */
278 case 0xb9b2: /* CU41 */
279 case 0xb9b3: /* CU42 */
280 case 0xb92a: /* KMF */
281 case 0xb92b: /* KMO */
282 case 0xb92f: /* KMC */
283 case 0xb92d: /* KMCTR */
284 case 0xb92e: /* KM */
285 case 0xb93c: /* PPNO */
286 case 0xb990: /* TRTT */
287 case 0xb991: /* TRTO */
288 case 0xb992: /* TROT */
289 case 0xb993: /* TROO */
290 *len = 4;
291 return 1;
292 }
293
294 return 0;
295 }
296
297 /* Implement the "software_single_step" gdbarch method, needed to single step
298 through instructions like MVCLE in record mode, to make sure they are
299 executed to completion. Without that, record will save the full length
300 of destination buffer on every iteration, even though the CPU will only
301 process about 4kiB of it each time, leading to O(n**2) memory and time
302 complexity. */
303
304 static std::vector<CORE_ADDR>
305 s390_software_single_step (struct regcache *regcache)
306 {
307 struct gdbarch *gdbarch = regcache->arch ();
308 CORE_ADDR loc = regcache_read_pc (regcache);
309 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
310 int len;
311 uint16_t insn;
312
313 /* Special handling only if recording. */
314 if (!record_full_is_used ())
315 return {};
316
317 /* First, match a partial instruction. */
318 if (!s390_is_partial_instruction (gdbarch, loc, &len))
319 return {};
320
321 loc += len;
322
323 /* Second, look for a branch back to it. */
324 insn = read_memory_integer (loc, 2, byte_order);
325 if (insn != 0xa714) /* BRC with mask 1 */
326 return {};
327
328 insn = read_memory_integer (loc + 2, 2, byte_order);
329 if (insn != (uint16_t) -(len / 2))
330 return {};
331
332 loc += 4;
333
334 /* Found it, step past the whole thing. */
335 return {loc};
336 }
337
338 /* Displaced stepping. */
339
340 /* Return true if INSN is a non-branch RIL-b or RIL-c format
341 instruction. */
342
343 static int
344 is_non_branch_ril (gdb_byte *insn)
345 {
346 gdb_byte op1 = insn[0];
347
348 if (op1 == 0xc4)
349 {
350 gdb_byte op2 = insn[1] & 0x0f;
351
352 switch (op2)
353 {
354 case 0x02: /* llhrl */
355 case 0x04: /* lghrl */
356 case 0x05: /* lhrl */
357 case 0x06: /* llghrl */
358 case 0x07: /* sthrl */
359 case 0x08: /* lgrl */
360 case 0x0b: /* stgrl */
361 case 0x0c: /* lgfrl */
362 case 0x0d: /* lrl */
363 case 0x0e: /* llgfrl */
364 case 0x0f: /* strl */
365 return 1;
366 }
367 }
368 else if (op1 == 0xc6)
369 {
370 gdb_byte op2 = insn[1] & 0x0f;
371
372 switch (op2)
373 {
374 case 0x00: /* exrl */
375 case 0x02: /* pfdrl */
376 case 0x04: /* cghrl */
377 case 0x05: /* chrl */
378 case 0x06: /* clghrl */
379 case 0x07: /* clhrl */
380 case 0x08: /* cgrl */
381 case 0x0a: /* clgrl */
382 case 0x0c: /* cgfrl */
383 case 0x0d: /* crl */
384 case 0x0e: /* clgfrl */
385 case 0x0f: /* clrl */
386 return 1;
387 }
388 }
389
390 return 0;
391 }
392
393 typedef buf_displaced_step_closure s390_displaced_step_closure;
394
395 /* Implementation of gdbarch_displaced_step_copy_insn. */
396
397 static struct displaced_step_closure *
398 s390_displaced_step_copy_insn (struct gdbarch *gdbarch,
399 CORE_ADDR from, CORE_ADDR to,
400 struct regcache *regs)
401 {
402 size_t len = gdbarch_max_insn_length (gdbarch);
403 std::unique_ptr<s390_displaced_step_closure> closure
404 (new s390_displaced_step_closure (len));
405 gdb_byte *buf = closure->buf.data ();
406
407 read_memory (from, buf, len);
408
409 /* Adjust the displacement field of PC-relative RIL instructions,
410 except branches. The latter are handled in the fixup hook. */
411 if (is_non_branch_ril (buf))
412 {
413 LONGEST offset;
414
415 offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG);
416 offset = (from - to + offset * 2) / 2;
417
418 /* If the instruction is too far from the jump pad, punt. This
419 will usually happen with instructions in shared libraries.
420 We could probably support these by rewriting them to be
421 absolute or fully emulating them. */
422 if (offset < INT32_MIN || offset > INT32_MAX)
423 {
424 /* Let the core fall back to stepping over the breakpoint
425 in-line. */
426 if (debug_displaced)
427 {
428 fprintf_unfiltered (gdb_stdlog,
429 "displaced: can't displaced step "
430 "RIL instruction: offset %s out of range\n",
431 plongest (offset));
432 }
433
434 return NULL;
435 }
436
437 store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset);
438 }
439
440 write_memory (to, buf, len);
441
442 if (debug_displaced)
443 {
444 fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
445 paddress (gdbarch, from), paddress (gdbarch, to));
446 displaced_step_dump_bytes (gdb_stdlog, buf, len);
447 }
448
449 return closure.release ();
450 }
451
452 /* Fix up the state of registers and memory after having single-stepped
453 a displaced instruction. */
454
455 static void
456 s390_displaced_step_fixup (struct gdbarch *gdbarch,
457 struct displaced_step_closure *closure_,
458 CORE_ADDR from, CORE_ADDR to,
459 struct regcache *regs)
460 {
461 /* Our closure is a copy of the instruction. */
462 s390_displaced_step_closure *closure
463 = (s390_displaced_step_closure *) closure_;
464 gdb_byte *insn = closure->buf.data ();
465 static int s390_instrlen[] = { 2, 4, 4, 6 };
466 int insnlen = s390_instrlen[insn[0] >> 6];
467
468 /* Fields for various kinds of instructions. */
469 unsigned int b2, r1, r2, x2, r3;
470 int i2, d2;
471
472 /* Get current PC and addressing mode bit. */
473 CORE_ADDR pc = regcache_read_pc (regs);
474 ULONGEST amode = 0;
475
476 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
477 {
478 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
479 amode &= 0x80000000;
480 }
481
482 if (debug_displaced)
483 fprintf_unfiltered (gdb_stdlog,
484 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
485 paddress (gdbarch, from), paddress (gdbarch, to),
486 paddress (gdbarch, pc), insnlen, (int) amode);
487
488 /* Handle absolute branch and save instructions. */
489 if (is_rr (insn, op_basr, &r1, &r2)
490 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
491 {
492 /* Recompute saved return address in R1. */
493 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
494 amode | (from + insnlen));
495 }
496
497 /* Handle absolute branch instructions. */
498 else if (is_rr (insn, op_bcr, &r1, &r2)
499 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
500 || is_rr (insn, op_bctr, &r1, &r2)
501 || is_rre (insn, op_bctgr, &r1, &r2)
502 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
503 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
504 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
505 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
506 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
507 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
508 {
509 /* Update PC iff branch was *not* taken. */
510 if (pc == to + insnlen)
511 regcache_write_pc (regs, from + insnlen);
512 }
513
514 /* Handle PC-relative branch and save instructions. */
515 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
516 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
517 {
518 /* Update PC. */
519 regcache_write_pc (regs, pc - to + from);
520 /* Recompute saved return address in R1. */
521 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
522 amode | (from + insnlen));
523 }
524
525 /* Handle LOAD ADDRESS RELATIVE LONG. */
526 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
527 {
528 /* Update PC. */
529 regcache_write_pc (regs, from + insnlen);
530 /* Recompute output address in R1. */
531 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
532 amode | (from + i2 * 2));
533 }
534
535 /* If we executed a breakpoint instruction, point PC right back at it. */
536 else if (insn[0] == 0x0 && insn[1] == 0x1)
537 regcache_write_pc (regs, from);
538
539 /* For any other insn, adjust PC by negated displacement. PC then
540 points right after the original instruction, except for PC-relative
541 branches, where it points to the adjusted branch target. */
542 else
543 regcache_write_pc (regs, pc - to + from);
544
545 if (debug_displaced)
546 fprintf_unfiltered (gdb_stdlog,
547 "displaced: (s390) pc is now %s\n",
548 paddress (gdbarch, regcache_read_pc (regs)));
549 }
550
551 /* Implement displaced_step_hw_singlestep gdbarch method. */
552
553 static int
554 s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
555 struct displaced_step_closure *closure)
556 {
557 return 1;
558 }
559
560 /* Prologue analysis. */
561
562 struct s390_prologue_data {
563
564 /* The stack. */
565 struct pv_area *stack;
566
567 /* The size and byte-order of a GPR or FPR. */
568 int gpr_size;
569 int fpr_size;
570 enum bfd_endian byte_order;
571
572 /* The general-purpose registers. */
573 pv_t gpr[S390_NUM_GPRS];
574
575 /* The floating-point registers. */
576 pv_t fpr[S390_NUM_FPRS];
577
578 /* The offset relative to the CFA where the incoming GPR N was saved
579 by the function prologue. 0 if not saved or unknown. */
580 int gpr_slot[S390_NUM_GPRS];
581
582 /* Likewise for FPRs. */
583 int fpr_slot[S390_NUM_FPRS];
584
585 /* Nonzero if the backchain was saved. This is assumed to be the
586 case when the incoming SP is saved at the current SP location. */
587 int back_chain_saved_p;
588 };
589
590 /* Return the effective address for an X-style instruction, like:
591
592 L R1, D2(X2, B2)
593
594 Here, X2 and B2 are registers, and D2 is a signed 20-bit
595 constant; the effective address is the sum of all three. If either
596 X2 or B2 are zero, then it doesn't contribute to the sum --- this
597 means that r0 can't be used as either X2 or B2. */
598
599 static pv_t
600 s390_addr (struct s390_prologue_data *data,
601 int d2, unsigned int x2, unsigned int b2)
602 {
603 pv_t result;
604
605 result = pv_constant (d2);
606 if (x2)
607 result = pv_add (result, data->gpr[x2]);
608 if (b2)
609 result = pv_add (result, data->gpr[b2]);
610
611 return result;
612 }
613
614 /* Do a SIZE-byte store of VALUE to D2(X2,B2). */
615
616 static void
617 s390_store (struct s390_prologue_data *data,
618 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
619 pv_t value)
620 {
621 pv_t addr = s390_addr (data, d2, x2, b2);
622 pv_t offset;
623
624 /* Check whether we are storing the backchain. */
625 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
626
627 if (pv_is_constant (offset) && offset.k == 0)
628 if (size == data->gpr_size
629 && pv_is_register_k (value, S390_SP_REGNUM, 0))
630 {
631 data->back_chain_saved_p = 1;
632 return;
633 }
634
635 /* Check whether we are storing a register into the stack. */
636 if (!data->stack->store_would_trash (addr))
637 data->stack->store (addr, size, value);
638
639 /* Note: If this is some store we cannot identify, you might think we
640 should forget our cached values, as any of those might have been hit.
641
642 However, we make the assumption that the register save areas are only
643 ever stored to once in any given function, and we do recognize these
644 stores. Thus every store we cannot recognize does not hit our data. */
645 }
646
647 /* Do a SIZE-byte load from D2(X2,B2). */
648
649 static pv_t
650 s390_load (struct s390_prologue_data *data,
651 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
652
653 {
654 pv_t addr = s390_addr (data, d2, x2, b2);
655
656 /* If it's a load from an in-line constant pool, then we can
657 simulate that, under the assumption that the code isn't
658 going to change between the time the processor actually
659 executed it creating the current frame, and the time when
660 we're analyzing the code to unwind past that frame. */
661 if (pv_is_constant (addr))
662 {
663 struct target_section *secp;
664 secp = target_section_by_addr (target_stack, addr.k);
665 if (secp != NULL
666 && (bfd_get_section_flags (secp->the_bfd_section->owner,
667 secp->the_bfd_section)
668 & SEC_READONLY))
669 return pv_constant (read_memory_integer (addr.k, size,
670 data->byte_order));
671 }
672
673 /* Check whether we are accessing one of our save slots. */
674 return data->stack->fetch (addr, size);
675 }
676
677 /* Function for finding saved registers in a 'struct pv_area'; we pass
678 this to pv_area::scan.
679
680 If VALUE is a saved register, ADDR says it was saved at a constant
681 offset from the frame base, and SIZE indicates that the whole
682 register was saved, record its offset in the reg_offset table in
683 PROLOGUE_UNTYPED. */
684
685 static void
686 s390_check_for_saved (void *data_untyped, pv_t addr,
687 CORE_ADDR size, pv_t value)
688 {
689 struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped;
690 int i, offset;
691
692 if (!pv_is_register (addr, S390_SP_REGNUM))
693 return;
694
695 offset = 16 * data->gpr_size + 32 - addr.k;
696
697 /* If we are storing the original value of a register, we want to
698 record the CFA offset. If the same register is stored multiple
699 times, the stack slot with the highest address counts. */
700
701 for (i = 0; i < S390_NUM_GPRS; i++)
702 if (size == data->gpr_size
703 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
704 if (data->gpr_slot[i] == 0
705 || data->gpr_slot[i] > offset)
706 {
707 data->gpr_slot[i] = offset;
708 return;
709 }
710
711 for (i = 0; i < S390_NUM_FPRS; i++)
712 if (size == data->fpr_size
713 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
714 if (data->fpr_slot[i] == 0
715 || data->fpr_slot[i] > offset)
716 {
717 data->fpr_slot[i] = offset;
718 return;
719 }
720 }
721
722 /* Analyze the prologue of the function starting at START_PC, continuing at
723 most until CURRENT_PC. Initialize DATA to hold all information we find
724 out about the state of the registers and stack slots. Return the address
725 of the instruction after the last one that changed the SP, FP, or back
726 chain; or zero on error. */
727
728 static CORE_ADDR
729 s390_analyze_prologue (struct gdbarch *gdbarch,
730 CORE_ADDR start_pc,
731 CORE_ADDR current_pc,
732 struct s390_prologue_data *data)
733 {
734 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
735
736 /* Our return value:
737 The address of the instruction after the last one that changed
738 the SP, FP, or back chain; zero if we got an error trying to
739 read memory. */
740 CORE_ADDR result = start_pc;
741
742 /* The current PC for our abstract interpretation. */
743 CORE_ADDR pc;
744
745 /* The address of the next instruction after that. */
746 CORE_ADDR next_pc;
747
748 pv_area stack (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
749 scoped_restore restore_stack = make_scoped_restore (&data->stack, &stack);
750
751 /* Set up everything's initial value. */
752 {
753 int i;
754
755 /* For the purpose of prologue tracking, we consider the GPR size to
756 be equal to the ABI word size, even if it is actually larger
757 (i.e. when running a 32-bit binary under a 64-bit kernel). */
758 data->gpr_size = word_size;
759 data->fpr_size = 8;
760 data->byte_order = gdbarch_byte_order (gdbarch);
761
762 for (i = 0; i < S390_NUM_GPRS; i++)
763 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
764
765 for (i = 0; i < S390_NUM_FPRS; i++)
766 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
767
768 for (i = 0; i < S390_NUM_GPRS; i++)
769 data->gpr_slot[i] = 0;
770
771 for (i = 0; i < S390_NUM_FPRS; i++)
772 data->fpr_slot[i] = 0;
773
774 data->back_chain_saved_p = 0;
775 }
776
777 /* Start interpreting instructions, until we hit the frame's
778 current PC or the first branch instruction. */
779 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
780 {
781 bfd_byte insn[S390_MAX_INSTR_SIZE];
782 int insn_len = s390_readinstruction (insn, pc);
783
784 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
785 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
786 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
787
788 /* Fields for various kinds of instructions. */
789 unsigned int b2, r1, r2, x2, r3;
790 int i2, d2;
791
792 /* The values of SP and FP before this instruction,
793 for detecting instructions that change them. */
794 pv_t pre_insn_sp, pre_insn_fp;
795 /* Likewise for the flag whether the back chain was saved. */
796 int pre_insn_back_chain_saved_p;
797
798 /* If we got an error trying to read the instruction, report it. */
799 if (insn_len < 0)
800 {
801 result = 0;
802 break;
803 }
804
805 next_pc = pc + insn_len;
806
807 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
808 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
809 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
810
811 /* LHI r1, i2 --- load halfword immediate. */
812 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
813 /* LGFI r1, i2 --- load fullword immediate. */
814 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
815 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
816 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
817 data->gpr[r1] = pv_constant (i2);
818
819 /* LR r1, r2 --- load from register. */
820 /* LGR r1, r2 --- load from register (64-bit version). */
821 else if (is_rr (insn32, op_lr, &r1, &r2)
822 || is_rre (insn64, op_lgr, &r1, &r2))
823 data->gpr[r1] = data->gpr[r2];
824
825 /* L r1, d2(x2, b2) --- load. */
826 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
827 /* LG r1, d2(x2, b2) --- load (64-bit version). */
828 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
829 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
830 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
831 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
832
833 /* ST r1, d2(x2, b2) --- store. */
834 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
835 /* STG r1, d2(x2, b2) --- store (64-bit version). */
836 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
837 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
838 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
839 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
840
841 /* STD r1, d2(x2,b2) --- store floating-point register. */
842 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
843 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
844
845 /* STM r1, r3, d2(b2) --- store multiple. */
846 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
847 version). */
848 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
849 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
850 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
851 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
852 {
853 for (; r1 <= r3; r1++, d2 += data->gpr_size)
854 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
855 }
856
857 /* AHI r1, i2 --- add halfword immediate. */
858 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
859 /* AFI r1, i2 --- add fullword immediate. */
860 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
861 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
862 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
863 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
864 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
865 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
866
867 /* ALFI r1, i2 --- add logical immediate. */
868 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
869 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
870 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
871 data->gpr[r1] = pv_add_constant (data->gpr[r1],
872 (CORE_ADDR)i2 & 0xffffffff);
873
874 /* AR r1, r2 -- add register. */
875 /* AGR r1, r2 -- add register (64-bit version). */
876 else if (is_rr (insn32, op_ar, &r1, &r2)
877 || is_rre (insn64, op_agr, &r1, &r2))
878 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
879
880 /* A r1, d2(x2, b2) -- add. */
881 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
882 /* AG r1, d2(x2, b2) -- add (64-bit version). */
883 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
884 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
885 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
886 data->gpr[r1] = pv_add (data->gpr[r1],
887 s390_load (data, d2, x2, b2, data->gpr_size));
888
889 /* SLFI r1, i2 --- subtract logical immediate. */
890 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
891 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
892 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
893 data->gpr[r1] = pv_add_constant (data->gpr[r1],
894 -((CORE_ADDR)i2 & 0xffffffff));
895
896 /* SR r1, r2 -- subtract register. */
897 /* SGR r1, r2 -- subtract register (64-bit version). */
898 else if (is_rr (insn32, op_sr, &r1, &r2)
899 || is_rre (insn64, op_sgr, &r1, &r2))
900 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
901
902 /* S r1, d2(x2, b2) -- subtract. */
903 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
904 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
905 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
906 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
907 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
908 data->gpr[r1] = pv_subtract (data->gpr[r1],
909 s390_load (data, d2, x2, b2, data->gpr_size));
910
911 /* LA r1, d2(x2, b2) --- load address. */
912 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
913 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
914 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
915 data->gpr[r1] = s390_addr (data, d2, x2, b2);
916
917 /* LARL r1, i2 --- load address relative long. */
918 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
919 data->gpr[r1] = pv_constant (pc + i2 * 2);
920
921 /* BASR r1, 0 --- branch and save.
922 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
923 else if (is_rr (insn, op_basr, &r1, &r2)
924 && r2 == 0)
925 data->gpr[r1] = pv_constant (next_pc);
926
927 /* BRAS r1, i2 --- branch relative and save. */
928 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
929 {
930 data->gpr[r1] = pv_constant (next_pc);
931 next_pc = pc + i2 * 2;
932
933 /* We'd better not interpret any backward branches. We'll
934 never terminate. */
935 if (next_pc <= pc)
936 break;
937 }
938
939 /* BRC/BRCL -- branch relative on condition. Ignore "branch
940 never", branch to following instruction, and "conditional
941 trap" (BRC +2). Otherwise terminate search. */
942 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2))
943 {
944 if (r1 != 0 && i2 != 1 && i2 != 2)
945 break;
946 }
947 else if (is_ril (insn, op1_brcl, op2_brcl, &r1, &i2))
948 {
949 if (r1 != 0 && i2 != 3)
950 break;
951 }
952
953 /* Terminate search when hitting any other branch instruction. */
954 else if (is_rr (insn, op_basr, &r1, &r2)
955 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
956 || is_rr (insn, op_bcr, &r1, &r2)
957 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
958 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
959 break;
960
961 else
962 {
963 /* An instruction we don't know how to simulate. The only
964 safe thing to do would be to set every value we're tracking
965 to 'unknown'. Instead, we'll be optimistic: we assume that
966 we *can* interpret every instruction that the compiler uses
967 to manipulate any of the data we're interested in here --
968 then we can just ignore anything else. */
969 }
970
971 /* Record the address after the last instruction that changed
972 the FP, SP, or backlink. Ignore instructions that changed
973 them back to their original values --- those are probably
974 restore instructions. (The back chain is never restored,
975 just popped.) */
976 {
977 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
978 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
979
980 if ((! pv_is_identical (pre_insn_sp, sp)
981 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
982 && sp.kind != pvk_unknown)
983 || (! pv_is_identical (pre_insn_fp, fp)
984 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
985 && fp.kind != pvk_unknown)
986 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
987 result = next_pc;
988 }
989 }
990
991 /* Record where all the registers were saved. */
992 data->stack->scan (s390_check_for_saved, data);
993
994 return result;
995 }
996
997 /* Advance PC across any function entry prologue instructions to reach
998 some "real" code. */
999
1000 static CORE_ADDR
1001 s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1002 {
1003 struct s390_prologue_data data;
1004 CORE_ADDR skip_pc, func_addr;
1005
1006 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1007 {
1008 CORE_ADDR post_prologue_pc
1009 = skip_prologue_using_sal (gdbarch, func_addr);
1010 if (post_prologue_pc != 0)
1011 return std::max (pc, post_prologue_pc);
1012 }
1013
1014 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
1015 return skip_pc ? skip_pc : pc;
1016 }
1017
1018 /* Register handling. */
1019
1020 /* ABI call-saved register information. */
1021
1022 static int
1023 s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
1024 {
1025 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1026
1027 switch (tdep->abi)
1028 {
1029 case ABI_LINUX_S390:
1030 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1031 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
1032 || regnum == S390_A0_REGNUM)
1033 return 1;
1034
1035 break;
1036
1037 case ABI_LINUX_ZSERIES:
1038 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1039 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
1040 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
1041 return 1;
1042
1043 break;
1044 }
1045
1046 return 0;
1047 }
1048
1049 /* The "guess_tracepoint_registers" gdbarch method. */
1050
1051 static void
1052 s390_guess_tracepoint_registers (struct gdbarch *gdbarch,
1053 struct regcache *regcache,
1054 CORE_ADDR addr)
1055 {
1056 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1057 int sz = register_size (gdbarch, S390_PSWA_REGNUM);
1058 gdb_byte *reg = (gdb_byte *) alloca (sz);
1059 ULONGEST pswm, pswa;
1060
1061 /* Set PSWA from the location and a default PSWM (the only part we're
1062 unlikely to get right is the CC). */
1063 if (tdep->abi == ABI_LINUX_S390)
1064 {
1065 /* 31-bit PSWA needs high bit set (it's very unlikely the target
1066 was in 24-bit mode). */
1067 pswa = addr | 0x80000000UL;
1068 pswm = 0x070d0000UL;
1069 }
1070 else
1071 {
1072 pswa = addr;
1073 pswm = 0x0705000180000000ULL;
1074 }
1075
1076 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa);
1077 regcache_raw_supply (regcache, S390_PSWA_REGNUM, reg);
1078
1079 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm);
1080 regcache_raw_supply (regcache, S390_PSWM_REGNUM, reg);
1081 }
1082
1083 /* Return the name of register REGNO. Return the empty string for
1084 registers that shouldn't be visible. */
1085
1086 static const char *
1087 s390_register_name (struct gdbarch *gdbarch, int regnum)
1088 {
1089 if (regnum >= S390_V0_LOWER_REGNUM
1090 && regnum <= S390_V15_LOWER_REGNUM)
1091 return "";
1092 return tdesc_register_name (gdbarch, regnum);
1093 }
1094
1095 /* DWARF Register Mapping. */
1096
1097 static const short s390_dwarf_regmap[] =
1098 {
1099 /* 0-15: General Purpose Registers. */
1100 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1101 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1102 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1103 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1104
1105 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
1106 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
1107 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
1108 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
1109 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
1110
1111 /* 32-47: Control Registers (not mapped). */
1112 -1, -1, -1, -1, -1, -1, -1, -1,
1113 -1, -1, -1, -1, -1, -1, -1, -1,
1114
1115 /* 48-63: Access Registers. */
1116 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
1117 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
1118 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
1119 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
1120
1121 /* 64-65: Program Status Word. */
1122 S390_PSWM_REGNUM,
1123 S390_PSWA_REGNUM,
1124
1125 /* 66-67: Reserved. */
1126 -1, -1,
1127
1128 /* 68-83: Vector Registers 16-31. */
1129 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
1130 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
1131 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
1132 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
1133
1134 /* End of "official" DWARF registers. The remainder of the map is
1135 for GDB internal use only. */
1136
1137 /* GPR Lower Half Access. */
1138 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1139 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1140 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1141 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1142 };
1143
1144 enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
1145
1146 /* Convert DWARF register number REG to the appropriate register
1147 number used by GDB. */
1148
1149 static int
1150 s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1151 {
1152 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1153 int gdb_reg = -1;
1154
1155 /* In a 32-on-64 debug scenario, debug info refers to the full
1156 64-bit GPRs. Note that call frame information still refers to
1157 the 32-bit lower halves, because s390_adjust_frame_regnum uses
1158 special register numbers to access GPRs. */
1159 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
1160 return tdep->gpr_full_regnum + reg;
1161
1162 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
1163 gdb_reg = s390_dwarf_regmap[reg];
1164
1165 if (tdep->v0_full_regnum == -1)
1166 {
1167 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
1168 gdb_reg = -1;
1169 }
1170 else
1171 {
1172 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
1173 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
1174 }
1175
1176 return gdb_reg;
1177 }
1178
1179 /* Pseudo registers. */
1180
1181 /* Check whether REGNUM indicates a coupled general purpose register.
1182 These pseudo-registers are composed of two adjacent gprs. */
1183
1184 static int
1185 regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
1186 {
1187 return (tdep->gpr_full_regnum != -1
1188 && regnum >= tdep->gpr_full_regnum
1189 && regnum <= tdep->gpr_full_regnum + 15);
1190 }
1191
1192 /* Check whether REGNUM indicates a full vector register (v0-v15).
1193 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
1194
1195 static int
1196 regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum)
1197 {
1198 return (tdep->v0_full_regnum != -1
1199 && regnum >= tdep->v0_full_regnum
1200 && regnum <= tdep->v0_full_regnum + 15);
1201 }
1202
1203 /* 'float' values are stored in the upper half of floating-point
1204 registers, even though we are otherwise a big-endian platform. The
1205 same applies to a 'float' value within a vector. */
1206
1207 static struct value *
1208 s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
1209 int regnum, struct frame_id frame_id)
1210 {
1211 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1212 struct value *value = default_value_from_register (gdbarch, type,
1213 regnum, frame_id);
1214 check_typedef (type);
1215
1216 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
1217 && TYPE_LENGTH (type) < 8)
1218 || regnum_is_vxr_full (tdep, regnum)
1219 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
1220 set_value_offset (value, 0);
1221
1222 return value;
1223 }
1224
1225 /* Implement pseudo_register_name tdesc method. */
1226
1227 static const char *
1228 s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
1229 {
1230 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1231
1232 if (regnum == tdep->pc_regnum)
1233 return "pc";
1234
1235 if (regnum == tdep->cc_regnum)
1236 return "cc";
1237
1238 if (regnum_is_gpr_full (tdep, regnum))
1239 {
1240 static const char *full_name[] = {
1241 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1242 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1243 };
1244 return full_name[regnum - tdep->gpr_full_regnum];
1245 }
1246
1247 if (regnum_is_vxr_full (tdep, regnum))
1248 {
1249 static const char *full_name[] = {
1250 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
1251 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
1252 };
1253 return full_name[regnum - tdep->v0_full_regnum];
1254 }
1255
1256 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1257 }
1258
1259 /* Implement pseudo_register_type tdesc method. */
1260
1261 static struct type *
1262 s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
1263 {
1264 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1265
1266 if (regnum == tdep->pc_regnum)
1267 return builtin_type (gdbarch)->builtin_func_ptr;
1268
1269 if (regnum == tdep->cc_regnum)
1270 return builtin_type (gdbarch)->builtin_int;
1271
1272 if (regnum_is_gpr_full (tdep, regnum))
1273 return builtin_type (gdbarch)->builtin_uint64;
1274
1275 if (regnum_is_vxr_full (tdep, regnum))
1276 return tdesc_find_type (gdbarch, "vec128");
1277
1278 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1279 }
1280
1281 /* Implement pseudo_register_read gdbarch method. */
1282
1283 static enum register_status
1284 s390_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
1285 int regnum, gdb_byte *buf)
1286 {
1287 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1288 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1289 int regsize = register_size (gdbarch, regnum);
1290 ULONGEST val;
1291
1292 if (regnum == tdep->pc_regnum)
1293 {
1294 enum register_status status;
1295
1296 status = regcache->raw_read (S390_PSWA_REGNUM, &val);
1297 if (status == REG_VALID)
1298 {
1299 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1300 val &= 0x7fffffff;
1301 store_unsigned_integer (buf, regsize, byte_order, val);
1302 }
1303 return status;
1304 }
1305
1306 if (regnum == tdep->cc_regnum)
1307 {
1308 enum register_status status;
1309
1310 status = regcache->raw_read (S390_PSWM_REGNUM, &val);
1311 if (status == REG_VALID)
1312 {
1313 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1314 val = (val >> 12) & 3;
1315 else
1316 val = (val >> 44) & 3;
1317 store_unsigned_integer (buf, regsize, byte_order, val);
1318 }
1319 return status;
1320 }
1321
1322 if (regnum_is_gpr_full (tdep, regnum))
1323 {
1324 enum register_status status;
1325 ULONGEST val_upper;
1326
1327 regnum -= tdep->gpr_full_regnum;
1328
1329 status = regcache->raw_read (S390_R0_REGNUM + regnum, &val);
1330 if (status == REG_VALID)
1331 status = regcache->raw_read (S390_R0_UPPER_REGNUM + regnum,
1332 &val_upper);
1333 if (status == REG_VALID)
1334 {
1335 val |= val_upper << 32;
1336 store_unsigned_integer (buf, regsize, byte_order, val);
1337 }
1338 return status;
1339 }
1340
1341 if (regnum_is_vxr_full (tdep, regnum))
1342 {
1343 enum register_status status;
1344
1345 regnum -= tdep->v0_full_regnum;
1346
1347 status = regcache->raw_read (S390_F0_REGNUM + regnum, buf);
1348 if (status == REG_VALID)
1349 status = regcache->raw_read (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1350 return status;
1351 }
1352
1353 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1354 }
1355
1356 /* Implement pseudo_register_write gdbarch method. */
1357
1358 static void
1359 s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1360 int regnum, const gdb_byte *buf)
1361 {
1362 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1363 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1364 int regsize = register_size (gdbarch, regnum);
1365 ULONGEST val, psw;
1366
1367 if (regnum == tdep->pc_regnum)
1368 {
1369 val = extract_unsigned_integer (buf, regsize, byte_order);
1370 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1371 {
1372 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
1373 val = (psw & 0x80000000) | (val & 0x7fffffff);
1374 }
1375 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
1376 return;
1377 }
1378
1379 if (regnum == tdep->cc_regnum)
1380 {
1381 val = extract_unsigned_integer (buf, regsize, byte_order);
1382 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
1383 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1384 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
1385 else
1386 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
1387 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
1388 return;
1389 }
1390
1391 if (regnum_is_gpr_full (tdep, regnum))
1392 {
1393 regnum -= tdep->gpr_full_regnum;
1394 val = extract_unsigned_integer (buf, regsize, byte_order);
1395 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
1396 val & 0xffffffff);
1397 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
1398 val >> 32);
1399 return;
1400 }
1401
1402 if (regnum_is_vxr_full (tdep, regnum))
1403 {
1404 regnum -= tdep->v0_full_regnum;
1405 regcache->raw_write (S390_F0_REGNUM + regnum, buf);
1406 regcache->raw_write (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1407 return;
1408 }
1409
1410 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1411 }
1412
1413 /* Register groups. */
1414
1415 /* Implement pseudo_register_reggroup_p tdesc method. */
1416
1417 static int
1418 s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1419 struct reggroup *group)
1420 {
1421 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1422
1423 /* We usually save/restore the whole PSW, which includes PC and CC.
1424 However, some older gdbservers may not support saving/restoring
1425 the whole PSW yet, and will return an XML register description
1426 excluding those from the save/restore register groups. In those
1427 cases, we still need to explicitly save/restore PC and CC in order
1428 to push or pop frames. Since this doesn't hurt anything if we
1429 already save/restore the whole PSW (it's just redundant), we add
1430 PC and CC at this point unconditionally. */
1431 if (group == save_reggroup || group == restore_reggroup)
1432 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
1433
1434 if (group == vector_reggroup)
1435 return regnum_is_vxr_full (tdep, regnum);
1436
1437 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
1438 return 0;
1439
1440 return default_register_reggroup_p (gdbarch, regnum, group);
1441 }
1442
1443 /* The "ax_pseudo_register_collect" gdbarch method. */
1444
1445 static int
1446 s390_ax_pseudo_register_collect (struct gdbarch *gdbarch,
1447 struct agent_expr *ax, int regnum)
1448 {
1449 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1450 if (regnum == tdep->pc_regnum)
1451 {
1452 ax_reg_mask (ax, S390_PSWA_REGNUM);
1453 }
1454 else if (regnum == tdep->cc_regnum)
1455 {
1456 ax_reg_mask (ax, S390_PSWM_REGNUM);
1457 }
1458 else if (regnum_is_gpr_full (tdep, regnum))
1459 {
1460 regnum -= tdep->gpr_full_regnum;
1461 ax_reg_mask (ax, S390_R0_REGNUM + regnum);
1462 ax_reg_mask (ax, S390_R0_UPPER_REGNUM + regnum);
1463 }
1464 else if (regnum_is_vxr_full (tdep, regnum))
1465 {
1466 regnum -= tdep->v0_full_regnum;
1467 ax_reg_mask (ax, S390_F0_REGNUM + regnum);
1468 ax_reg_mask (ax, S390_V0_LOWER_REGNUM + regnum);
1469 }
1470 else
1471 {
1472 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1473 }
1474 return 0;
1475 }
1476
1477 /* The "ax_pseudo_register_push_stack" gdbarch method. */
1478
1479 static int
1480 s390_ax_pseudo_register_push_stack (struct gdbarch *gdbarch,
1481 struct agent_expr *ax, int regnum)
1482 {
1483 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1484 if (regnum == tdep->pc_regnum)
1485 {
1486 ax_reg (ax, S390_PSWA_REGNUM);
1487 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1488 {
1489 ax_zero_ext (ax, 31);
1490 }
1491 }
1492 else if (regnum == tdep->cc_regnum)
1493 {
1494 ax_reg (ax, S390_PSWM_REGNUM);
1495 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1496 ax_const_l (ax, 12);
1497 else
1498 ax_const_l (ax, 44);
1499 ax_simple (ax, aop_rsh_unsigned);
1500 ax_zero_ext (ax, 2);
1501 }
1502 else if (regnum_is_gpr_full (tdep, regnum))
1503 {
1504 regnum -= tdep->gpr_full_regnum;
1505 ax_reg (ax, S390_R0_REGNUM + regnum);
1506 ax_reg (ax, S390_R0_UPPER_REGNUM + regnum);
1507 ax_const_l (ax, 32);
1508 ax_simple (ax, aop_lsh);
1509 ax_simple (ax, aop_bit_or);
1510 }
1511 else if (regnum_is_vxr_full (tdep, regnum))
1512 {
1513 /* Too large to stuff on the stack. */
1514 return 1;
1515 }
1516 else
1517 {
1518 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1519 }
1520 return 0;
1521 }
1522
1523 /* The "gen_return_address" gdbarch method. Since this is supposed to be
1524 just a best-effort method, and we don't really have the means to run
1525 the full unwinder here, just collect the link register. */
1526
1527 static void
1528 s390_gen_return_address (struct gdbarch *gdbarch,
1529 struct agent_expr *ax, struct axs_value *value,
1530 CORE_ADDR scope)
1531 {
1532 value->type = register_type (gdbarch, S390_R14_REGNUM);
1533 value->kind = axs_lvalue_register;
1534 value->u.reg = S390_R14_REGNUM;
1535 }
1536
1537 /* Address handling. */
1538
1539 /* Implement addr_bits_remove gdbarch method.
1540 Only used for ABI_LINUX_S390. */
1541
1542 static CORE_ADDR
1543 s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
1544 {
1545 return addr & 0x7fffffff;
1546 }
1547
1548 /* Implement addr_class_type_flags gdbarch method.
1549 Only used for ABI_LINUX_ZSERIES. */
1550
1551 static int
1552 s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
1553 {
1554 if (byte_size == 4)
1555 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1556 else
1557 return 0;
1558 }
1559
1560 /* Implement addr_class_type_flags_to_name gdbarch method.
1561 Only used for ABI_LINUX_ZSERIES. */
1562
1563 static const char *
1564 s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
1565 {
1566 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
1567 return "mode32";
1568 else
1569 return NULL;
1570 }
1571
1572 /* Implement addr_class_name_to_type_flags gdbarch method.
1573 Only used for ABI_LINUX_ZSERIES. */
1574
1575 static int
1576 s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
1577 const char *name,
1578 int *type_flags_ptr)
1579 {
1580 if (strcmp (name, "mode32") == 0)
1581 {
1582 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1583 return 1;
1584 }
1585 else
1586 return 0;
1587 }
1588
1589 /* Inferior function calls. */
1590
1591 /* Dummy function calls. */
1592
1593 /* Unwrap any single-field structs in TYPE and return the effective
1594 "inner" type. E.g., yield "float" for all these cases:
1595
1596 float x;
1597 struct { float x };
1598 struct { struct { float x; } x; };
1599 struct { struct { struct { float x; } x; } x; };
1600
1601 However, if an inner type is smaller than MIN_SIZE, abort the
1602 unwrapping. */
1603
1604 static struct type *
1605 s390_effective_inner_type (struct type *type, unsigned int min_size)
1606 {
1607 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1608 && TYPE_NFIELDS (type) == 1)
1609 {
1610 struct type *inner = check_typedef (TYPE_FIELD_TYPE (type, 0));
1611
1612 if (TYPE_LENGTH (inner) < min_size)
1613 break;
1614 type = inner;
1615 }
1616
1617 return type;
1618 }
1619
1620 /* Return non-zero if TYPE should be passed like "float" or
1621 "double". */
1622
1623 static int
1624 s390_function_arg_float (struct type *type)
1625 {
1626 /* Note that long double as well as complex types are intentionally
1627 excluded. */
1628 if (TYPE_LENGTH (type) > 8)
1629 return 0;
1630
1631 /* A struct containing just a float or double is passed like a float
1632 or double. */
1633 type = s390_effective_inner_type (type, 0);
1634
1635 return (TYPE_CODE (type) == TYPE_CODE_FLT
1636 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT);
1637 }
1638
1639 /* Return non-zero if TYPE should be passed like a vector. */
1640
1641 static int
1642 s390_function_arg_vector (struct type *type)
1643 {
1644 if (TYPE_LENGTH (type) > 16)
1645 return 0;
1646
1647 /* Structs containing just a vector are passed like a vector. */
1648 type = s390_effective_inner_type (type, TYPE_LENGTH (type));
1649
1650 return TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type);
1651 }
1652
1653 /* Determine whether N is a power of two. */
1654
1655 static int
1656 is_power_of_two (unsigned int n)
1657 {
1658 return n && ((n & (n - 1)) == 0);
1659 }
1660
1661 /* For an argument whose type is TYPE and which is not passed like a
1662 float or vector, return non-zero if it should be passed like "int"
1663 or "long long". */
1664
1665 static int
1666 s390_function_arg_integer (struct type *type)
1667 {
1668 enum type_code code = TYPE_CODE (type);
1669
1670 if (TYPE_LENGTH (type) > 8)
1671 return 0;
1672
1673 if (code == TYPE_CODE_INT
1674 || code == TYPE_CODE_ENUM
1675 || code == TYPE_CODE_RANGE
1676 || code == TYPE_CODE_CHAR
1677 || code == TYPE_CODE_BOOL
1678 || code == TYPE_CODE_PTR
1679 || TYPE_IS_REFERENCE (type))
1680 return 1;
1681
1682 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
1683 && is_power_of_two (TYPE_LENGTH (type)));
1684 }
1685
1686 /* Argument passing state: Internal data structure passed to helper
1687 routines of s390_push_dummy_call. */
1688
1689 struct s390_arg_state
1690 {
1691 /* Register cache, or NULL, if we are in "preparation mode". */
1692 struct regcache *regcache;
1693 /* Next available general/floating-point/vector register for
1694 argument passing. */
1695 int gr, fr, vr;
1696 /* Current pointer to copy area (grows downwards). */
1697 CORE_ADDR copy;
1698 /* Current pointer to parameter area (grows upwards). */
1699 CORE_ADDR argp;
1700 };
1701
1702 /* Prepare one argument ARG for a dummy call and update the argument
1703 passing state AS accordingly. If the regcache field in AS is set,
1704 operate in "write mode" and write ARG into the inferior. Otherwise
1705 run "preparation mode" and skip all updates to the inferior. */
1706
1707 static void
1708 s390_handle_arg (struct s390_arg_state *as, struct value *arg,
1709 struct gdbarch_tdep *tdep, int word_size,
1710 enum bfd_endian byte_order, int is_unnamed)
1711 {
1712 struct type *type = check_typedef (value_type (arg));
1713 unsigned int length = TYPE_LENGTH (type);
1714 int write_mode = as->regcache != NULL;
1715
1716 if (s390_function_arg_float (type))
1717 {
1718 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
1719 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
1720 6. */
1721 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
1722 {
1723 /* When we store a single-precision value in an FP register,
1724 it occupies the leftmost bits. */
1725 if (write_mode)
1726 regcache_cooked_write_part (as->regcache,
1727 S390_F0_REGNUM + as->fr,
1728 0, length,
1729 value_contents (arg));
1730 as->fr += 2;
1731 }
1732 else
1733 {
1734 /* When we store a single-precision value in a stack slot,
1735 it occupies the rightmost bits. */
1736 as->argp = align_up (as->argp + length, word_size);
1737 if (write_mode)
1738 write_memory (as->argp - length, value_contents (arg),
1739 length);
1740 }
1741 }
1742 else if (tdep->vector_abi == S390_VECTOR_ABI_128
1743 && s390_function_arg_vector (type))
1744 {
1745 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
1746
1747 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
1748 {
1749 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
1750
1751 if (write_mode)
1752 regcache_cooked_write_part (as->regcache, regnum,
1753 0, length,
1754 value_contents (arg));
1755 as->vr++;
1756 }
1757 else
1758 {
1759 if (write_mode)
1760 write_memory (as->argp, value_contents (arg), length);
1761 as->argp = align_up (as->argp + length, word_size);
1762 }
1763 }
1764 else if (s390_function_arg_integer (type) && length <= word_size)
1765 {
1766 /* Initialize it just to avoid a GCC false warning. */
1767 ULONGEST val = 0;
1768
1769 if (write_mode)
1770 {
1771 /* Place value in least significant bits of the register or
1772 memory word and sign- or zero-extend to full word size.
1773 This also applies to a struct or union. */
1774 val = TYPE_UNSIGNED (type)
1775 ? extract_unsigned_integer (value_contents (arg),
1776 length, byte_order)
1777 : extract_signed_integer (value_contents (arg),
1778 length, byte_order);
1779 }
1780
1781 if (as->gr <= 6)
1782 {
1783 if (write_mode)
1784 regcache_cooked_write_unsigned (as->regcache,
1785 S390_R0_REGNUM + as->gr,
1786 val);
1787 as->gr++;
1788 }
1789 else
1790 {
1791 if (write_mode)
1792 write_memory_unsigned_integer (as->argp, word_size,
1793 byte_order, val);
1794 as->argp += word_size;
1795 }
1796 }
1797 else if (s390_function_arg_integer (type) && length == 8)
1798 {
1799 if (as->gr <= 5)
1800 {
1801 if (write_mode)
1802 {
1803 regcache_cooked_write (as->regcache,
1804 S390_R0_REGNUM + as->gr,
1805 value_contents (arg));
1806 regcache_cooked_write (as->regcache,
1807 S390_R0_REGNUM + as->gr + 1,
1808 value_contents (arg) + word_size);
1809 }
1810 as->gr += 2;
1811 }
1812 else
1813 {
1814 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
1815 in it, then don't go back and use it again later. */
1816 as->gr = 7;
1817
1818 if (write_mode)
1819 write_memory (as->argp, value_contents (arg), length);
1820 as->argp += length;
1821 }
1822 }
1823 else
1824 {
1825 /* This argument type is never passed in registers. Place the
1826 value in the copy area and pass a pointer to it. Use 8-byte
1827 alignment as a conservative assumption. */
1828 as->copy = align_down (as->copy - length, 8);
1829 if (write_mode)
1830 write_memory (as->copy, value_contents (arg), length);
1831
1832 if (as->gr <= 6)
1833 {
1834 if (write_mode)
1835 regcache_cooked_write_unsigned (as->regcache,
1836 S390_R0_REGNUM + as->gr,
1837 as->copy);
1838 as->gr++;
1839 }
1840 else
1841 {
1842 if (write_mode)
1843 write_memory_unsigned_integer (as->argp, word_size,
1844 byte_order, as->copy);
1845 as->argp += word_size;
1846 }
1847 }
1848 }
1849
1850 /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
1851 place to be passed to a function, as specified by the "GNU/Linux
1852 for S/390 ELF Application Binary Interface Supplement".
1853
1854 SP is the current stack pointer. We must put arguments, links,
1855 padding, etc. whereever they belong, and return the new stack
1856 pointer value.
1857
1858 If STRUCT_RETURN is non-zero, then the function we're calling is
1859 going to return a structure by value; STRUCT_ADDR is the address of
1860 a block we've allocated for it on the stack.
1861
1862 Our caller has taken care of any type promotions needed to satisfy
1863 prototypes or the old K&R argument-passing rules. */
1864
1865 static CORE_ADDR
1866 s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1867 struct regcache *regcache, CORE_ADDR bp_addr,
1868 int nargs, struct value **args, CORE_ADDR sp,
1869 int struct_return, CORE_ADDR struct_addr)
1870 {
1871 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1872 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1873 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1874 int i;
1875 struct s390_arg_state arg_state, arg_prep;
1876 CORE_ADDR param_area_start, new_sp;
1877 struct type *ftype = check_typedef (value_type (function));
1878
1879 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
1880 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
1881
1882 arg_prep.copy = sp;
1883 arg_prep.gr = struct_return ? 3 : 2;
1884 arg_prep.fr = 0;
1885 arg_prep.vr = 0;
1886 arg_prep.argp = 0;
1887 arg_prep.regcache = NULL;
1888
1889 /* Initialize arg_state for "preparation mode". */
1890 arg_state = arg_prep;
1891
1892 /* Update arg_state.copy with the start of the reference-to-copy area
1893 and arg_state.argp with the size of the parameter area. */
1894 for (i = 0; i < nargs; i++)
1895 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1896 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1897
1898 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
1899
1900 /* Allocate the standard frame areas: the register save area, the
1901 word reserved for the compiler, and the back chain pointer. */
1902 new_sp = param_area_start - (16 * word_size + 32);
1903
1904 /* Now we have the final stack pointer. Make sure we didn't
1905 underflow; on 31-bit, this would result in addresses with the
1906 high bit set, which causes confusion elsewhere. Note that if we
1907 error out here, stack and registers remain untouched. */
1908 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
1909 error (_("Stack overflow"));
1910
1911 /* Pass the structure return address in general register 2. */
1912 if (struct_return)
1913 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
1914
1915 /* Initialize arg_state for "write mode". */
1916 arg_state = arg_prep;
1917 arg_state.argp = param_area_start;
1918 arg_state.regcache = regcache;
1919
1920 /* Write all parameters. */
1921 for (i = 0; i < nargs; i++)
1922 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1923 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1924
1925 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
1926 if (word_size == 4)
1927 {
1928 ULONGEST pswa;
1929 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
1930 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
1931 }
1932 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
1933
1934 /* Store updated stack pointer. */
1935 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
1936
1937 /* We need to return the 'stack part' of the frame ID,
1938 which is actually the top of the register save area. */
1939 return param_area_start;
1940 }
1941
1942 /* Assuming THIS_FRAME is a dummy, return the frame ID of that
1943 dummy frame. The frame ID's base needs to match the TOS value
1944 returned by push_dummy_call, and the PC match the dummy frame's
1945 breakpoint. */
1946
1947 static struct frame_id
1948 s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1949 {
1950 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1951 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1952 sp = gdbarch_addr_bits_remove (gdbarch, sp);
1953
1954 return frame_id_build (sp + 16*word_size + 32,
1955 get_frame_pc (this_frame));
1956 }
1957
1958 /* Implement frame_align gdbarch method. */
1959
1960 static CORE_ADDR
1961 s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1962 {
1963 /* Both the 32- and 64-bit ABI's say that the stack pointer should
1964 always be aligned on an eight-byte boundary. */
1965 return (addr & -8);
1966 }
1967
1968 /* Helper for s390_return_value: Set or retrieve a function return
1969 value if it resides in a register. */
1970
1971 static void
1972 s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
1973 struct regcache *regcache,
1974 gdb_byte *out, const gdb_byte *in)
1975 {
1976 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1977 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1978 int length = TYPE_LENGTH (type);
1979 int code = TYPE_CODE (type);
1980
1981 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
1982 {
1983 /* Float-like value: left-aligned in f0. */
1984 if (in != NULL)
1985 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
1986 0, length, in);
1987 else
1988 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
1989 0, length, out);
1990 }
1991 else if (code == TYPE_CODE_ARRAY)
1992 {
1993 /* Vector: left-aligned in v24. */
1994 if (in != NULL)
1995 regcache_cooked_write_part (regcache, S390_V24_REGNUM,
1996 0, length, in);
1997 else
1998 regcache_cooked_read_part (regcache, S390_V24_REGNUM,
1999 0, length, out);
2000 }
2001 else if (length <= word_size)
2002 {
2003 /* Integer: zero- or sign-extended in r2. */
2004 if (out != NULL)
2005 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2006 word_size - length, length, out);
2007 else if (TYPE_UNSIGNED (type))
2008 regcache_cooked_write_unsigned
2009 (regcache, S390_R2_REGNUM,
2010 extract_unsigned_integer (in, length, byte_order));
2011 else
2012 regcache_cooked_write_signed
2013 (regcache, S390_R2_REGNUM,
2014 extract_signed_integer (in, length, byte_order));
2015 }
2016 else if (length == 2 * word_size)
2017 {
2018 /* Double word: in r2 and r3. */
2019 if (in != NULL)
2020 {
2021 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
2022 regcache_cooked_write (regcache, S390_R3_REGNUM,
2023 in + word_size);
2024 }
2025 else
2026 {
2027 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
2028 regcache_cooked_read (regcache, S390_R3_REGNUM,
2029 out + word_size);
2030 }
2031 }
2032 else
2033 internal_error (__FILE__, __LINE__, _("invalid return type"));
2034 }
2035
2036 /* Implement the 'return_value' gdbarch method. */
2037
2038 static enum return_value_convention
2039 s390_return_value (struct gdbarch *gdbarch, struct value *function,
2040 struct type *type, struct regcache *regcache,
2041 gdb_byte *out, const gdb_byte *in)
2042 {
2043 enum return_value_convention rvc;
2044
2045 type = check_typedef (type);
2046
2047 switch (TYPE_CODE (type))
2048 {
2049 case TYPE_CODE_STRUCT:
2050 case TYPE_CODE_UNION:
2051 case TYPE_CODE_COMPLEX:
2052 rvc = RETURN_VALUE_STRUCT_CONVENTION;
2053 break;
2054 case TYPE_CODE_ARRAY:
2055 rvc = (gdbarch_tdep (gdbarch)->vector_abi == S390_VECTOR_ABI_128
2056 && TYPE_LENGTH (type) <= 16 && TYPE_VECTOR (type))
2057 ? RETURN_VALUE_REGISTER_CONVENTION
2058 : RETURN_VALUE_STRUCT_CONVENTION;
2059 break;
2060 default:
2061 rvc = TYPE_LENGTH (type) <= 8
2062 ? RETURN_VALUE_REGISTER_CONVENTION
2063 : RETURN_VALUE_STRUCT_CONVENTION;
2064 }
2065
2066 if (in != NULL || out != NULL)
2067 {
2068 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
2069 s390_register_return_value (gdbarch, type, regcache, out, in);
2070 else if (in != NULL)
2071 error (_("Cannot set function return value."));
2072 else
2073 error (_("Function return value unknown."));
2074 }
2075
2076 return rvc;
2077 }
2078
2079 /* Frame unwinding. */
2080
2081 /* Implmement the stack_frame_destroyed_p gdbarch method. */
2082
2083 static int
2084 s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
2085 {
2086 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2087
2088 /* In frameless functions, there's no frame to destroy and thus
2089 we don't care about the epilogue.
2090
2091 In functions with frame, the epilogue sequence is a pair of
2092 a LM-type instruction that restores (amongst others) the
2093 return register %r14 and the stack pointer %r15, followed
2094 by a branch 'br %r14' --or equivalent-- that effects the
2095 actual return.
2096
2097 In that situation, this function needs to return 'true' in
2098 exactly one case: when pc points to that branch instruction.
2099
2100 Thus we try to disassemble the one instructions immediately
2101 preceding pc and check whether it is an LM-type instruction
2102 modifying the stack pointer.
2103
2104 Note that disassembling backwards is not reliable, so there
2105 is a slight chance of false positives here ... */
2106
2107 bfd_byte insn[6];
2108 unsigned int r1, r3, b2;
2109 int d2;
2110
2111 if (word_size == 4
2112 && !target_read_memory (pc - 4, insn, 4)
2113 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
2114 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2115 return 1;
2116
2117 if (word_size == 4
2118 && !target_read_memory (pc - 6, insn, 6)
2119 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
2120 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2121 return 1;
2122
2123 if (word_size == 8
2124 && !target_read_memory (pc - 6, insn, 6)
2125 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
2126 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2127 return 1;
2128
2129 return 0;
2130 }
2131
2132 /* Implement unwind_pc gdbarch method. */
2133
2134 static CORE_ADDR
2135 s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2136 {
2137 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2138 ULONGEST pc;
2139 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
2140 return gdbarch_addr_bits_remove (gdbarch, pc);
2141 }
2142
2143 /* Implement unwind_sp gdbarch method. */
2144
2145 static CORE_ADDR
2146 s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2147 {
2148 ULONGEST sp;
2149 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2150 return gdbarch_addr_bits_remove (gdbarch, sp);
2151 }
2152
2153 /* Helper routine to unwind pseudo registers. */
2154
2155 static struct value *
2156 s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
2157 {
2158 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2159 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2160 struct type *type = register_type (gdbarch, regnum);
2161
2162 /* Unwind PC via PSW address. */
2163 if (regnum == tdep->pc_regnum)
2164 {
2165 struct value *val;
2166
2167 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
2168 if (!value_optimized_out (val))
2169 {
2170 LONGEST pswa = value_as_long (val);
2171
2172 if (TYPE_LENGTH (type) == 4)
2173 return value_from_pointer (type, pswa & 0x7fffffff);
2174 else
2175 return value_from_pointer (type, pswa);
2176 }
2177 }
2178
2179 /* Unwind CC via PSW mask. */
2180 if (regnum == tdep->cc_regnum)
2181 {
2182 struct value *val;
2183
2184 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
2185 if (!value_optimized_out (val))
2186 {
2187 LONGEST pswm = value_as_long (val);
2188
2189 if (TYPE_LENGTH (type) == 4)
2190 return value_from_longest (type, (pswm >> 12) & 3);
2191 else
2192 return value_from_longest (type, (pswm >> 44) & 3);
2193 }
2194 }
2195
2196 /* Unwind full GPRs to show at least the lower halves (as the
2197 upper halves are undefined). */
2198 if (regnum_is_gpr_full (tdep, regnum))
2199 {
2200 int reg = regnum - tdep->gpr_full_regnum;
2201 struct value *val;
2202
2203 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
2204 if (!value_optimized_out (val))
2205 return value_cast (type, val);
2206 }
2207
2208 return allocate_optimized_out_value (type);
2209 }
2210
2211 /* Translate a .eh_frame register to DWARF register, or adjust a
2212 .debug_frame register. */
2213
2214 static int
2215 s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
2216 {
2217 /* See s390_dwarf_reg_to_regnum for comments. */
2218 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
2219 }
2220
2221 /* DWARF-2 frame unwinding. */
2222
2223 /* Function to unwind a pseudo-register in dwarf2_frame unwinder. Used by
2224 s390_dwarf2_frame_init_reg. */
2225
2226 static struct value *
2227 s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2228 int regnum)
2229 {
2230 return s390_unwind_pseudo_register (this_frame, regnum);
2231 }
2232
2233 /* Implement init_reg dwarf2_frame method. */
2234
2235 static void
2236 s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2237 struct dwarf2_frame_state_reg *reg,
2238 struct frame_info *this_frame)
2239 {
2240 /* The condition code (and thus PSW mask) is call-clobbered. */
2241 if (regnum == S390_PSWM_REGNUM)
2242 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2243
2244 /* The PSW address unwinds to the return address. */
2245 else if (regnum == S390_PSWA_REGNUM)
2246 reg->how = DWARF2_FRAME_REG_RA;
2247
2248 /* Fixed registers are call-saved or call-clobbered
2249 depending on the ABI in use. */
2250 else if (regnum < S390_NUM_REGS)
2251 {
2252 if (s390_register_call_saved (gdbarch, regnum))
2253 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2254 else
2255 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2256 }
2257
2258 /* We install a special function to unwind pseudos. */
2259 else
2260 {
2261 reg->how = DWARF2_FRAME_REG_FN;
2262 reg->loc.fn = s390_dwarf2_prev_register;
2263 }
2264 }
2265
2266 /* Frame unwinding. */
2267
2268 /* Wrapper for trad_frame_get_prev_register to allow for s390 pseudo
2269 register translation. */
2270
2271 struct value *
2272 s390_trad_frame_prev_register (struct frame_info *this_frame,
2273 struct trad_frame_saved_reg saved_regs[],
2274 int regnum)
2275 {
2276 if (regnum < S390_NUM_REGS)
2277 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
2278 else
2279 return s390_unwind_pseudo_register (this_frame, regnum);
2280 }
2281
2282 /* Normal stack frames. */
2283
2284 struct s390_unwind_cache {
2285
2286 CORE_ADDR func;
2287 CORE_ADDR frame_base;
2288 CORE_ADDR local_base;
2289
2290 struct trad_frame_saved_reg *saved_regs;
2291 };
2292
2293 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2294 prologue analysis. Helper for s390_frame_unwind_cache. */
2295
2296 static int
2297 s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
2298 struct s390_unwind_cache *info)
2299 {
2300 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2301 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2302 struct s390_prologue_data data;
2303 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
2304 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2305 int i;
2306 CORE_ADDR cfa;
2307 CORE_ADDR func;
2308 CORE_ADDR result;
2309 ULONGEST reg;
2310 CORE_ADDR prev_sp;
2311 int frame_pointer;
2312 int size;
2313 struct frame_info *next_frame;
2314
2315 /* Try to find the function start address. If we can't find it, we don't
2316 bother searching for it -- with modern compilers this would be mostly
2317 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2318 or else a valid backchain ... */
2319 if (!get_frame_func_if_available (this_frame, &info->func))
2320 {
2321 info->func = -1;
2322 return 0;
2323 }
2324 func = info->func;
2325
2326 /* Try to analyze the prologue. */
2327 result = s390_analyze_prologue (gdbarch, func,
2328 get_frame_pc (this_frame), &data);
2329 if (!result)
2330 return 0;
2331
2332 /* If this was successful, we should have found the instruction that
2333 sets the stack pointer register to the previous value of the stack
2334 pointer minus the frame size. */
2335 if (!pv_is_register (*sp, S390_SP_REGNUM))
2336 return 0;
2337
2338 /* A frame size of zero at this point can mean either a real
2339 frameless function, or else a failure to find the prologue.
2340 Perform some sanity checks to verify we really have a
2341 frameless function. */
2342 if (sp->k == 0)
2343 {
2344 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2345 size zero. This is only possible if the next frame is a sentinel
2346 frame, a dummy frame, or a signal trampoline frame. */
2347 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2348 needed, instead the code should simpliy rely on its
2349 analysis. */
2350 next_frame = get_next_frame (this_frame);
2351 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2352 next_frame = get_next_frame (next_frame);
2353 if (next_frame
2354 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
2355 return 0;
2356
2357 /* If we really have a frameless function, %r14 must be valid
2358 -- in particular, it must point to a different function. */
2359 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
2360 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
2361 if (get_pc_function_start (reg) == func)
2362 {
2363 /* However, there is one case where it *is* valid for %r14
2364 to point to the same function -- if this is a recursive
2365 call, and we have stopped in the prologue *before* the
2366 stack frame was allocated.
2367
2368 Recognize this case by looking ahead a bit ... */
2369
2370 struct s390_prologue_data data2;
2371 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2372
2373 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
2374 && pv_is_register (*sp, S390_SP_REGNUM)
2375 && sp->k != 0))
2376 return 0;
2377 }
2378 }
2379
2380 /* OK, we've found valid prologue data. */
2381 size = -sp->k;
2382
2383 /* If the frame pointer originally also holds the same value
2384 as the stack pointer, we're probably using it. If it holds
2385 some other value -- even a constant offset -- it is most
2386 likely used as temp register. */
2387 if (pv_is_identical (*sp, *fp))
2388 frame_pointer = S390_FRAME_REGNUM;
2389 else
2390 frame_pointer = S390_SP_REGNUM;
2391
2392 /* If we've detected a function with stack frame, we'll still have to
2393 treat it as frameless if we're currently within the function epilog
2394 code at a point where the frame pointer has already been restored.
2395 This can only happen in an innermost frame. */
2396 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2397 instead the code should simpliy rely on its analysis. */
2398 next_frame = get_next_frame (this_frame);
2399 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2400 next_frame = get_next_frame (next_frame);
2401 if (size > 0
2402 && (next_frame == NULL
2403 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
2404 {
2405 /* See the comment in s390_stack_frame_destroyed_p on why this is
2406 not completely reliable ... */
2407 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
2408 {
2409 memset (&data, 0, sizeof (data));
2410 size = 0;
2411 frame_pointer = S390_SP_REGNUM;
2412 }
2413 }
2414
2415 /* Once we know the frame register and the frame size, we can unwind
2416 the current value of the frame register from the next frame, and
2417 add back the frame size to arrive that the previous frame's
2418 stack pointer value. */
2419 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
2420 cfa = prev_sp + 16*word_size + 32;
2421
2422 /* Set up ABI call-saved/call-clobbered registers. */
2423 for (i = 0; i < S390_NUM_REGS; i++)
2424 if (!s390_register_call_saved (gdbarch, i))
2425 trad_frame_set_unknown (info->saved_regs, i);
2426
2427 /* CC is always call-clobbered. */
2428 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2429
2430 /* Record the addresses of all register spill slots the prologue parser
2431 has recognized. Consider only registers defined as call-saved by the
2432 ABI; for call-clobbered registers the parser may have recognized
2433 spurious stores. */
2434
2435 for (i = 0; i < 16; i++)
2436 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
2437 && data.gpr_slot[i] != 0)
2438 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
2439
2440 for (i = 0; i < 16; i++)
2441 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
2442 && data.fpr_slot[i] != 0)
2443 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
2444
2445 /* Function return will set PC to %r14. */
2446 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
2447
2448 /* In frameless functions, we unwind simply by moving the return
2449 address to the PC. However, if we actually stored to the
2450 save area, use that -- we might only think the function frameless
2451 because we're in the middle of the prologue ... */
2452 if (size == 0
2453 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2454 {
2455 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2456 }
2457
2458 /* Another sanity check: unless this is a frameless function,
2459 we should have found spill slots for SP and PC.
2460 If not, we cannot unwind further -- this happens e.g. in
2461 libc's thread_start routine. */
2462 if (size > 0)
2463 {
2464 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
2465 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2466 prev_sp = -1;
2467 }
2468
2469 /* We use the current value of the frame register as local_base,
2470 and the top of the register save area as frame_base. */
2471 if (prev_sp != -1)
2472 {
2473 info->frame_base = prev_sp + 16*word_size + 32;
2474 info->local_base = prev_sp - size;
2475 }
2476
2477 return 1;
2478 }
2479
2480 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2481 back chain unwinding. Helper for s390_frame_unwind_cache. */
2482
2483 static void
2484 s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
2485 struct s390_unwind_cache *info)
2486 {
2487 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2488 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2489 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2490 CORE_ADDR backchain;
2491 ULONGEST reg;
2492 LONGEST sp, tmp;
2493 int i;
2494
2495 /* Set up ABI call-saved/call-clobbered registers. */
2496 for (i = 0; i < S390_NUM_REGS; i++)
2497 if (!s390_register_call_saved (gdbarch, i))
2498 trad_frame_set_unknown (info->saved_regs, i);
2499
2500 /* CC is always call-clobbered. */
2501 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2502
2503 /* Get the backchain. */
2504 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2505 if (!safe_read_memory_integer (reg, word_size, byte_order, &tmp))
2506 tmp = 0;
2507 backchain = (CORE_ADDR) tmp;
2508
2509 /* A zero backchain terminates the frame chain. As additional
2510 sanity check, let's verify that the spill slot for SP in the
2511 save area pointed to by the backchain in fact links back to
2512 the save area. */
2513 if (backchain != 0
2514 && safe_read_memory_integer (backchain + 15*word_size,
2515 word_size, byte_order, &sp)
2516 && (CORE_ADDR)sp == backchain)
2517 {
2518 /* We don't know which registers were saved, but it will have
2519 to be at least %r14 and %r15. This will allow us to continue
2520 unwinding, but other prev-frame registers may be incorrect ... */
2521 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2522 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2523
2524 /* Function return will set PC to %r14. */
2525 info->saved_regs[S390_PSWA_REGNUM]
2526 = info->saved_regs[S390_RETADDR_REGNUM];
2527
2528 /* We use the current value of the frame register as local_base,
2529 and the top of the register save area as frame_base. */
2530 info->frame_base = backchain + 16*word_size + 32;
2531 info->local_base = reg;
2532 }
2533
2534 info->func = get_frame_pc (this_frame);
2535 }
2536
2537 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2538 s390_frame_unwind and s390_frame_base. */
2539
2540 static struct s390_unwind_cache *
2541 s390_frame_unwind_cache (struct frame_info *this_frame,
2542 void **this_prologue_cache)
2543 {
2544 struct s390_unwind_cache *info;
2545
2546 if (*this_prologue_cache)
2547 return (struct s390_unwind_cache *) *this_prologue_cache;
2548
2549 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2550 *this_prologue_cache = info;
2551 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2552 info->func = -1;
2553 info->frame_base = -1;
2554 info->local_base = -1;
2555
2556 TRY
2557 {
2558 /* Try to use prologue analysis to fill the unwind cache.
2559 If this fails, fall back to reading the stack backchain. */
2560 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2561 s390_backchain_frame_unwind_cache (this_frame, info);
2562 }
2563 CATCH (ex, RETURN_MASK_ERROR)
2564 {
2565 if (ex.error != NOT_AVAILABLE_ERROR)
2566 throw_exception (ex);
2567 }
2568 END_CATCH
2569
2570 return info;
2571 }
2572
2573 /* Implement this_id frame_unwind method for s390_frame_unwind. */
2574
2575 static void
2576 s390_frame_this_id (struct frame_info *this_frame,
2577 void **this_prologue_cache,
2578 struct frame_id *this_id)
2579 {
2580 struct s390_unwind_cache *info
2581 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2582
2583 if (info->frame_base == -1)
2584 {
2585 if (info->func != -1)
2586 *this_id = frame_id_build_unavailable_stack (info->func);
2587 return;
2588 }
2589
2590 *this_id = frame_id_build (info->frame_base, info->func);
2591 }
2592
2593 /* Implement prev_register frame_unwind method for s390_frame_unwind. */
2594
2595 static struct value *
2596 s390_frame_prev_register (struct frame_info *this_frame,
2597 void **this_prologue_cache, int regnum)
2598 {
2599 struct s390_unwind_cache *info
2600 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2601
2602 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2603 }
2604
2605 /* Default S390 frame unwinder. */
2606
2607 static const struct frame_unwind s390_frame_unwind = {
2608 NORMAL_FRAME,
2609 default_frame_unwind_stop_reason,
2610 s390_frame_this_id,
2611 s390_frame_prev_register,
2612 NULL,
2613 default_frame_sniffer
2614 };
2615
2616 /* Code stubs and their stack frames. For things like PLTs and NULL
2617 function calls (where there is no true frame and the return address
2618 is in the RETADDR register). */
2619
2620 struct s390_stub_unwind_cache
2621 {
2622 CORE_ADDR frame_base;
2623 struct trad_frame_saved_reg *saved_regs;
2624 };
2625
2626 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2627 s390_stub_frame_unwind. */
2628
2629 static struct s390_stub_unwind_cache *
2630 s390_stub_frame_unwind_cache (struct frame_info *this_frame,
2631 void **this_prologue_cache)
2632 {
2633 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2634 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2635 struct s390_stub_unwind_cache *info;
2636 ULONGEST reg;
2637
2638 if (*this_prologue_cache)
2639 return (struct s390_stub_unwind_cache *) *this_prologue_cache;
2640
2641 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
2642 *this_prologue_cache = info;
2643 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2644
2645 /* The return address is in register %r14. */
2646 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2647
2648 /* Retrieve stack pointer and determine our frame base. */
2649 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2650 info->frame_base = reg + 16*word_size + 32;
2651
2652 return info;
2653 }
2654
2655 /* Implement this_id frame_unwind method for s390_stub_frame_unwind. */
2656
2657 static void
2658 s390_stub_frame_this_id (struct frame_info *this_frame,
2659 void **this_prologue_cache,
2660 struct frame_id *this_id)
2661 {
2662 struct s390_stub_unwind_cache *info
2663 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2664 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
2665 }
2666
2667 /* Implement prev_register frame_unwind method for s390_stub_frame_unwind. */
2668
2669 static struct value *
2670 s390_stub_frame_prev_register (struct frame_info *this_frame,
2671 void **this_prologue_cache, int regnum)
2672 {
2673 struct s390_stub_unwind_cache *info
2674 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2675 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2676 }
2677
2678 /* Implement sniffer frame_unwind method for s390_stub_frame_unwind. */
2679
2680 static int
2681 s390_stub_frame_sniffer (const struct frame_unwind *self,
2682 struct frame_info *this_frame,
2683 void **this_prologue_cache)
2684 {
2685 CORE_ADDR addr_in_block;
2686 bfd_byte insn[S390_MAX_INSTR_SIZE];
2687
2688 /* If the current PC points to non-readable memory, we assume we
2689 have trapped due to an invalid function pointer call. We handle
2690 the non-existing current function like a PLT stub. */
2691 addr_in_block = get_frame_address_in_block (this_frame);
2692 if (in_plt_section (addr_in_block)
2693 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2694 return 1;
2695 return 0;
2696 }
2697
2698 /* S390 stub frame unwinder. */
2699
2700 static const struct frame_unwind s390_stub_frame_unwind = {
2701 NORMAL_FRAME,
2702 default_frame_unwind_stop_reason,
2703 s390_stub_frame_this_id,
2704 s390_stub_frame_prev_register,
2705 NULL,
2706 s390_stub_frame_sniffer
2707 };
2708
2709 /* Frame base handling. */
2710
2711 static CORE_ADDR
2712 s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
2713 {
2714 struct s390_unwind_cache *info
2715 = s390_frame_unwind_cache (this_frame, this_cache);
2716 return info->frame_base;
2717 }
2718
2719 static CORE_ADDR
2720 s390_local_base_address (struct frame_info *this_frame, void **this_cache)
2721 {
2722 struct s390_unwind_cache *info
2723 = s390_frame_unwind_cache (this_frame, this_cache);
2724 return info->local_base;
2725 }
2726
2727 static const struct frame_base s390_frame_base = {
2728 &s390_frame_unwind,
2729 s390_frame_base_address,
2730 s390_local_base_address,
2731 s390_local_base_address
2732 };
2733
2734 /* Process record-replay */
2735
2736 /* Takes the intermediate sum of address calculations and masks off upper
2737 bits according to current addressing mode. */
2738
2739 static CORE_ADDR
2740 s390_record_address_mask (struct gdbarch *gdbarch, struct regcache *regcache,
2741 CORE_ADDR val)
2742 {
2743 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2744 ULONGEST pswm, pswa;
2745 int am;
2746 if (tdep->abi == ABI_LINUX_S390)
2747 {
2748 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2749 am = pswa >> 31 & 1;
2750 }
2751 else
2752 {
2753 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &pswm);
2754 am = pswm >> 31 & 3;
2755 }
2756 switch (am)
2757 {
2758 case 0:
2759 return val & 0xffffff;
2760 case 1:
2761 return val & 0x7fffffff;
2762 case 3:
2763 return val;
2764 default:
2765 fprintf_unfiltered (gdb_stdlog, "Warning: Addressing mode %d used.", am);
2766 return 0;
2767 }
2768 }
2769
2770 /* Calculates memory address using pre-calculated index, raw instruction word
2771 with b and d/dl fields, and raw instruction byte with dh field. Index and
2772 dh should be set to 0 if unused. */
2773
2774 static CORE_ADDR
2775 s390_record_calc_disp_common (struct gdbarch *gdbarch, struct regcache *regcache,
2776 ULONGEST x, uint16_t bd, int8_t dh)
2777 {
2778 uint8_t rb = bd >> 12 & 0xf;
2779 int32_t d = (bd & 0xfff) | ((int32_t)dh << 12);
2780 ULONGEST b;
2781 CORE_ADDR res = d + x;
2782 if (rb)
2783 {
2784 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rb, &b);
2785 res += b;
2786 }
2787 return s390_record_address_mask (gdbarch, regcache, res);
2788 }
2789
2790 /* Calculates memory address using raw x, b + d/dl, dh fields from
2791 instruction. rx and dh should be set to 0 if unused. */
2792
2793 static CORE_ADDR
2794 s390_record_calc_disp (struct gdbarch *gdbarch, struct regcache *regcache,
2795 uint8_t rx, uint16_t bd, int8_t dh)
2796 {
2797 ULONGEST x = 0;
2798 if (rx)
2799 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rx, &x);
2800 return s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2801 }
2802
2803 /* Calculates memory address for VSCE[GF] instructions. */
2804
2805 static int
2806 s390_record_calc_disp_vsce (struct gdbarch *gdbarch, struct regcache *regcache,
2807 uint8_t vx, uint8_t el, uint8_t es, uint16_t bd,
2808 int8_t dh, CORE_ADDR *res)
2809 {
2810 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2811 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2812 ULONGEST x;
2813 gdb_byte buf[16];
2814 if (tdep->v0_full_regnum == -1 || el * es >= 16)
2815 return -1;
2816 if (vx < 16)
2817 regcache_cooked_read (regcache, tdep->v0_full_regnum + vx, buf);
2818 else
2819 regcache->raw_read (S390_V16_REGNUM + vx - 16, buf);
2820 x = extract_unsigned_integer (buf + el * es, es, byte_order);
2821 *res = s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2822 return 0;
2823 }
2824
2825 /* Calculates memory address for instructions with relative long addressing. */
2826
2827 static CORE_ADDR
2828 s390_record_calc_rl (struct gdbarch *gdbarch, struct regcache *regcache,
2829 CORE_ADDR addr, uint16_t i1, uint16_t i2)
2830 {
2831 int32_t ri = i1 << 16 | i2;
2832 return s390_record_address_mask (gdbarch, regcache, addr + (LONGEST)ri * 2);
2833 }
2834
2835 /* Population count helper. */
2836
2837 static int s390_popcnt (unsigned int x) {
2838 int res = 0;
2839 while (x)
2840 {
2841 if (x & 1)
2842 res++;
2843 x >>= 1;
2844 }
2845 return res;
2846 }
2847
2848 /* Record 64-bit register. */
2849
2850 static int
2851 s390_record_gpr_g (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2852 {
2853 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2854 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2855 return -1;
2856 if (tdep->abi == ABI_LINUX_S390)
2857 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2858 return -1;
2859 return 0;
2860 }
2861
2862 /* Record high 32 bits of a register. */
2863
2864 static int
2865 s390_record_gpr_h (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2866 {
2867 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2868 if (tdep->abi == ABI_LINUX_S390)
2869 {
2870 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2871 return -1;
2872 }
2873 else
2874 {
2875 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2876 return -1;
2877 }
2878 return 0;
2879 }
2880
2881 /* Record vector register. */
2882
2883 static int
2884 s390_record_vr (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2885 {
2886 if (i < 16)
2887 {
2888 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
2889 return -1;
2890 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
2891 return -1;
2892 }
2893 else
2894 {
2895 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i - 16))
2896 return -1;
2897 }
2898 return 0;
2899 }
2900
2901 /* Implement process_record gdbarch method. */
2902
2903 static int
2904 s390_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
2905 CORE_ADDR addr)
2906 {
2907 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2908 uint16_t insn[3] = {0};
2909 /* Instruction as bytes. */
2910 uint8_t ibyte[6];
2911 /* Instruction as nibbles. */
2912 uint8_t inib[12];
2913 /* Instruction vector registers. */
2914 uint8_t ivec[4];
2915 CORE_ADDR oaddr, oaddr2, oaddr3;
2916 ULONGEST tmp;
2917 int i, n;
2918 /* if EX/EXRL instruction used, here's the reg parameter */
2919 int ex = -1;
2920 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2921
2922 /* Attempting to use EX or EXRL jumps back here */
2923 ex:
2924
2925 /* Read instruction. */
2926 insn[0] = read_memory_unsigned_integer (addr, 2, byte_order);
2927 /* If execute was involved, do the adjustment. */
2928 if (ex != -1)
2929 insn[0] |= ex & 0xff;
2930 /* Two highest bits determine instruction size. */
2931 if (insn[0] >= 0x4000)
2932 insn[1] = read_memory_unsigned_integer (addr+2, 2, byte_order);
2933 else
2934 /* Not necessary, but avoids uninitialized variable warnings. */
2935 insn[1] = 0;
2936 if (insn[0] >= 0xc000)
2937 insn[2] = read_memory_unsigned_integer (addr+4, 2, byte_order);
2938 else
2939 insn[2] = 0;
2940 /* Split instruction into bytes and nibbles. */
2941 for (i = 0; i < 3; i++)
2942 {
2943 ibyte[i*2] = insn[i] >> 8 & 0xff;
2944 ibyte[i*2+1] = insn[i] & 0xff;
2945 }
2946 for (i = 0; i < 6; i++)
2947 {
2948 inib[i*2] = ibyte[i] >> 4 & 0xf;
2949 inib[i*2+1] = ibyte[i] & 0xf;
2950 }
2951 /* Compute vector registers, if applicable. */
2952 ivec[0] = (inib[9] >> 3 & 1) << 4 | inib[2];
2953 ivec[1] = (inib[9] >> 2 & 1) << 4 | inib[3];
2954 ivec[2] = (inib[9] >> 1 & 1) << 4 | inib[4];
2955 ivec[3] = (inib[9] >> 0 & 1) << 4 | inib[8];
2956
2957 switch (ibyte[0])
2958 {
2959 /* 0x00 undefined */
2960
2961 case 0x01:
2962 /* E-format instruction */
2963 switch (ibyte[1])
2964 {
2965 /* 0x00 undefined */
2966 /* 0x01 unsupported: PR - program return */
2967 /* 0x02 unsupported: UPT */
2968 /* 0x03 undefined */
2969 /* 0x04 privileged: PTFF - perform timing facility function */
2970 /* 0x05-0x06 undefined */
2971 /* 0x07 privileged: SCKPF - set clock programmable field */
2972 /* 0x08-0x09 undefined */
2973
2974 case 0x0a: /* PFPO - perform floating point operation */
2975 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
2976 if (!(tmp & 0x80000000u))
2977 {
2978 uint8_t ofc = tmp >> 16 & 0xff;
2979 switch (ofc)
2980 {
2981 case 0x00: /* HFP32 */
2982 case 0x01: /* HFP64 */
2983 case 0x05: /* BFP32 */
2984 case 0x06: /* BFP64 */
2985 case 0x08: /* DFP32 */
2986 case 0x09: /* DFP64 */
2987 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
2988 return -1;
2989 break;
2990 case 0x02: /* HFP128 */
2991 case 0x07: /* BFP128 */
2992 case 0x0a: /* DFP128 */
2993 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
2994 return -1;
2995 if (record_full_arch_list_add_reg (regcache, S390_F2_REGNUM))
2996 return -1;
2997 break;
2998 default:
2999 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PFPO OFC %02x at %s.\n",
3000 ofc, paddress (gdbarch, addr));
3001 return -1;
3002 }
3003
3004 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3005 return -1;
3006 }
3007 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3008 return -1;
3009 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3010 return -1;
3011 break;
3012
3013 case 0x0b: /* TAM - test address mode */
3014 case 0x0c: /* SAM24 - set address mode 24 */
3015 case 0x0d: /* SAM31 - set address mode 31 */
3016 case 0x0e: /* SAM64 - set address mode 64 */
3017 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3018 return -1;
3019 break;
3020
3021 /* 0x0f-0xfe undefined */
3022
3023 /* 0xff unsupported: TRAP */
3024
3025 default:
3026 goto UNKNOWN_OP;
3027 }
3028 break;
3029
3030 /* 0x02 undefined */
3031 /* 0x03 undefined */
3032
3033 case 0x04: /* SPM - set program mask */
3034 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3035 return -1;
3036 break;
3037
3038 case 0x05: /* BALR - branch and link */
3039 case 0x45: /* BAL - branch and link */
3040 case 0x06: /* BCTR - branch on count */
3041 case 0x46: /* BCT - branch on count */
3042 case 0x0d: /* BASR - branch and save */
3043 case 0x4d: /* BAS - branch and save */
3044 case 0x84: /* BRXH - branch relative on index high */
3045 case 0x85: /* BRXLE - branch relative on index low or equal */
3046 case 0x86: /* BXH - branch on index high */
3047 case 0x87: /* BXLE - branch on index low or equal */
3048 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3049 use 32-bit destination as counter. */
3050 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3051 return -1;
3052 break;
3053
3054 case 0x07: /* BCR - branch on condition */
3055 case 0x47: /* BC - branch on condition */
3056 /* No effect other than PC transfer. */
3057 break;
3058
3059 /* 0x08 undefined */
3060 /* 0x09 undefined */
3061
3062 case 0x0a:
3063 /* SVC - supervisor call */
3064 if (tdep->s390_syscall_record != NULL)
3065 {
3066 if (tdep->s390_syscall_record (regcache, ibyte[1]))
3067 return -1;
3068 }
3069 else
3070 {
3071 printf_unfiltered (_("no syscall record support\n"));
3072 return -1;
3073 }
3074 break;
3075
3076 case 0x0b: /* BSM - branch and set mode */
3077 if (inib[2])
3078 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3079 return -1;
3080 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3081 return -1;
3082 break;
3083
3084 case 0x0c: /* BASSM - branch and save and set mode */
3085 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3086 return -1;
3087 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3088 return -1;
3089 break;
3090
3091 case 0x0e: /* MVCL - move long [interruptible] */
3092 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3093 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3094 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3095 tmp &= 0xffffff;
3096 if (record_full_arch_list_add_mem (oaddr, tmp))
3097 return -1;
3098 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3099 return -1;
3100 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3101 return -1;
3102 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3103 return -1;
3104 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3105 return -1;
3106 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3107 return -1;
3108 break;
3109
3110 case 0x0f: /* CLCL - compare logical long [interruptible] */
3111 case 0xa9: /* CLCLE - compare logical long extended [partial] */
3112 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3113 return -1;
3114 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3115 return -1;
3116 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3117 return -1;
3118 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3119 return -1;
3120 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3121 return -1;
3122 break;
3123
3124 case 0x10: /* LPR - load positive */
3125 case 0x11: /* LNR - load negative */
3126 case 0x12: /* LTR - load and test */
3127 case 0x13: /* LCR - load complement */
3128 case 0x14: /* NR - and */
3129 case 0x16: /* OR - or */
3130 case 0x17: /* XR - xor */
3131 case 0x1a: /* AR - add */
3132 case 0x1b: /* SR - subtract */
3133 case 0x1e: /* ALR - add logical */
3134 case 0x1f: /* SLR - subtract logical */
3135 case 0x54: /* N - and */
3136 case 0x56: /* O - or */
3137 case 0x57: /* X - xor */
3138 case 0x5a: /* A - add */
3139 case 0x5b: /* S - subtract */
3140 case 0x5e: /* AL - add logical */
3141 case 0x5f: /* SL - subtract logical */
3142 case 0x4a: /* AH - add halfword */
3143 case 0x4b: /* SH - subtract halfword */
3144 case 0x8a: /* SRA - shift right single */
3145 case 0x8b: /* SLA - shift left single */
3146 case 0xbf: /* ICM - insert characters under mask */
3147 /* 32-bit destination + flags */
3148 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3149 return -1;
3150 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3151 return -1;
3152 break;
3153
3154 case 0x15: /* CLR - compare logical */
3155 case 0x55: /* CL - compare logical */
3156 case 0x19: /* CR - compare */
3157 case 0x29: /* CDR - compare */
3158 case 0x39: /* CER - compare */
3159 case 0x49: /* CH - compare halfword */
3160 case 0x59: /* C - compare */
3161 case 0x69: /* CD - compare */
3162 case 0x79: /* CE - compare */
3163 case 0x91: /* TM - test under mask */
3164 case 0x95: /* CLI - compare logical */
3165 case 0xbd: /* CLM - compare logical under mask */
3166 case 0xd5: /* CLC - compare logical */
3167 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3168 return -1;
3169 break;
3170
3171 case 0x18: /* LR - load */
3172 case 0x48: /* LH - load halfword */
3173 case 0x58: /* L - load */
3174 case 0x41: /* LA - load address */
3175 case 0x43: /* IC - insert character */
3176 case 0x4c: /* MH - multiply halfword */
3177 case 0x71: /* MS - multiply single */
3178 case 0x88: /* SRL - shift right single logical */
3179 case 0x89: /* SLL - shift left single logical */
3180 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
3181 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3182 return -1;
3183 break;
3184
3185 case 0x1c: /* MR - multiply */
3186 case 0x5c: /* M - multiply */
3187 case 0x1d: /* DR - divide */
3188 case 0x5d: /* D - divide */
3189 case 0x8c: /* SRDL - shift right double logical */
3190 case 0x8d: /* SLDL - shift left double logical */
3191 /* 32-bit pair destination, no flags */
3192 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3193 return -1;
3194 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3195 return -1;
3196 break;
3197
3198 case 0x20: /* LPDR - load positive */
3199 case 0x30: /* LPER - load positive */
3200 case 0x21: /* LNDR - load negative */
3201 case 0x31: /* LNER - load negative */
3202 case 0x22: /* LTDR - load and test */
3203 case 0x32: /* LTER - load and test */
3204 case 0x23: /* LCDR - load complement */
3205 case 0x33: /* LCER - load complement */
3206 case 0x2a: /* ADR - add */
3207 case 0x3a: /* AER - add */
3208 case 0x6a: /* AD - add */
3209 case 0x7a: /* AE - add */
3210 case 0x2b: /* SDR - subtract */
3211 case 0x3b: /* SER - subtract */
3212 case 0x6b: /* SD - subtract */
3213 case 0x7b: /* SE - subtract */
3214 case 0x2e: /* AWR - add unnormalized */
3215 case 0x3e: /* AUR - add unnormalized */
3216 case 0x6e: /* AW - add unnormalized */
3217 case 0x7e: /* AU - add unnormalized */
3218 case 0x2f: /* SWR - subtract unnormalized */
3219 case 0x3f: /* SUR - subtract unnormalized */
3220 case 0x6f: /* SW - subtract unnormalized */
3221 case 0x7f: /* SU - subtract unnormalized */
3222 /* float destination + flags */
3223 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3224 return -1;
3225 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3226 return -1;
3227 break;
3228
3229 case 0x24: /* HDR - halve */
3230 case 0x34: /* HER - halve */
3231 case 0x25: /* LDXR - load rounded */
3232 case 0x35: /* LEDR - load rounded */
3233 case 0x28: /* LDR - load */
3234 case 0x38: /* LER - load */
3235 case 0x68: /* LD - load */
3236 case 0x78: /* LE - load */
3237 case 0x2c: /* MDR - multiply */
3238 case 0x3c: /* MDER - multiply */
3239 case 0x6c: /* MD - multiply */
3240 case 0x7c: /* MDE - multiply */
3241 case 0x2d: /* DDR - divide */
3242 case 0x3d: /* DER - divide */
3243 case 0x6d: /* DD - divide */
3244 case 0x7d: /* DE - divide */
3245 /* float destination, no flags */
3246 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3247 return -1;
3248 break;
3249
3250 case 0x26: /* MXR - multiply */
3251 case 0x27: /* MXDR - multiply */
3252 case 0x67: /* MXD - multiply */
3253 /* float pair destination, no flags */
3254 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3255 return -1;
3256 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3257 return -1;
3258 break;
3259
3260 case 0x36: /* AXR - add */
3261 case 0x37: /* SXR - subtract */
3262 /* float pair destination + flags */
3263 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3264 return -1;
3265 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3266 return -1;
3267 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3268 return -1;
3269 break;
3270
3271 case 0x40: /* STH - store halfword */
3272 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3273 if (record_full_arch_list_add_mem (oaddr, 2))
3274 return -1;
3275 break;
3276
3277 case 0x42: /* STC - store character */
3278 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3279 if (record_full_arch_list_add_mem (oaddr, 1))
3280 return -1;
3281 break;
3282
3283 case 0x44: /* EX - execute */
3284 if (ex != -1)
3285 {
3286 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
3287 paddress (gdbarch, addr));
3288 return -1;
3289 }
3290 addr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3291 if (inib[2])
3292 {
3293 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3294 ex = tmp & 0xff;
3295 }
3296 else
3297 {
3298 ex = 0;
3299 }
3300 goto ex;
3301
3302 case 0x4e: /* CVD - convert to decimal */
3303 case 0x60: /* STD - store */
3304 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3305 if (record_full_arch_list_add_mem (oaddr, 8))
3306 return -1;
3307 break;
3308
3309 case 0x4f: /* CVB - convert to binary */
3310 /* 32-bit gpr destination + FPC (DXC write) */
3311 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3312 return -1;
3313 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3314 return -1;
3315 break;
3316
3317 case 0x50: /* ST - store */
3318 case 0x70: /* STE - store */
3319 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3320 if (record_full_arch_list_add_mem (oaddr, 4))
3321 return -1;
3322 break;
3323
3324 case 0x51: /* LAE - load address extended */
3325 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3326 return -1;
3327 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
3328 return -1;
3329 break;
3330
3331 /* 0x52 undefined */
3332 /* 0x53 undefined */
3333
3334 /* 0x61-0x66 undefined */
3335
3336 /* 0x72-0x77 undefined */
3337
3338 /* 0x80 privileged: SSM - set system mask */
3339 /* 0x81 undefined */
3340 /* 0x82 privileged: LPSW - load PSW */
3341 /* 0x83 privileged: diagnose */
3342
3343 case 0x8e: /* SRDA - shift right double */
3344 case 0x8f: /* SLDA - shift left double */
3345 /* 32-bit pair destination + flags */
3346 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3347 return -1;
3348 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3349 return -1;
3350 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3351 return -1;
3352 break;
3353
3354 case 0x90: /* STM - store multiple */
3355 case 0x9b: /* STAM - store access multiple */
3356 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3357 if (inib[2] <= inib[3])
3358 n = inib[3] - inib[2] + 1;
3359 else
3360 n = inib[3] + 0x10 - inib[2] + 1;
3361 if (record_full_arch_list_add_mem (oaddr, n * 4))
3362 return -1;
3363 break;
3364
3365 case 0x92: /* MVI - move */
3366 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3367 if (record_full_arch_list_add_mem (oaddr, 1))
3368 return -1;
3369 break;
3370
3371 case 0x93: /* TS - test and set */
3372 case 0x94: /* NI - and */
3373 case 0x96: /* OI - or */
3374 case 0x97: /* XI - xor */
3375 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3376 if (record_full_arch_list_add_mem (oaddr, 1))
3377 return -1;
3378 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3379 return -1;
3380 break;
3381
3382 case 0x98: /* LM - load multiple */
3383 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3384 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3385 return -1;
3386 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3387 return -1;
3388 break;
3389
3390 /* 0x99 privileged: TRACE */
3391
3392 case 0x9a: /* LAM - load access multiple */
3393 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3394 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
3395 return -1;
3396 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
3397 return -1;
3398 break;
3399
3400 /* 0x9c-0x9f privileged and obsolete (old I/O) */
3401 /* 0xa0-0xa4 undefined */
3402
3403 case 0xa5:
3404 case 0xa7:
3405 /* RI-format instruction */
3406 switch (ibyte[0] << 4 | inib[3])
3407 {
3408 case 0xa50: /* IIHH - insert immediate */
3409 case 0xa51: /* IIHL - insert immediate */
3410 /* high 32-bit destination */
3411 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3412 return -1;
3413 break;
3414
3415 case 0xa52: /* IILH - insert immediate */
3416 case 0xa53: /* IILL - insert immediate */
3417 case 0xa75: /* BRAS - branch relative and save */
3418 case 0xa76: /* BRCT - branch relative on count */
3419 case 0xa78: /* LHI - load halfword immediate */
3420 case 0xa7c: /* MHI - multiply halfword immediate */
3421 /* 32-bit or native destination */
3422 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3423 return -1;
3424 break;
3425
3426 case 0xa54: /* NIHH - and immediate */
3427 case 0xa55: /* NIHL - and immediate */
3428 case 0xa58: /* OIHH - or immediate */
3429 case 0xa59: /* OIHL - or immediate */
3430 /* high 32-bit destination + flags */
3431 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3432 return -1;
3433 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3434 return -1;
3435 break;
3436
3437 case 0xa56: /* NILH - and immediate */
3438 case 0xa57: /* NILL - and immediate */
3439 case 0xa5a: /* OILH - or immediate */
3440 case 0xa5b: /* OILL - or immediate */
3441 case 0xa7a: /* AHI - add halfword immediate */
3442 /* 32-bit destination + flags */
3443 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3444 return -1;
3445 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3446 return -1;
3447 break;
3448
3449 case 0xa5c: /* LLIHH - load logical immediate */
3450 case 0xa5d: /* LLIHL - load logical immediate */
3451 case 0xa5e: /* LLILH - load logical immediate */
3452 case 0xa5f: /* LLILL - load logical immediate */
3453 case 0xa77: /* BRCTG - branch relative on count */
3454 case 0xa79: /* LGHI - load halfword immediate */
3455 case 0xa7d: /* MGHI - multiply halfword immediate */
3456 /* 64-bit destination */
3457 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3458 return -1;
3459 break;
3460
3461 case 0xa70: /* TMLH - test under mask */
3462 case 0xa71: /* TMLL - test under mask */
3463 case 0xa72: /* TMHH - test under mask */
3464 case 0xa73: /* TMHL - test under mask */
3465 case 0xa7e: /* CHI - compare halfword immediate */
3466 case 0xa7f: /* CGHI - compare halfword immediate */
3467 /* flags only */
3468 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3469 return -1;
3470 break;
3471
3472 case 0xa74: /* BRC - branch relative on condition */
3473 /* no register change */
3474 break;
3475
3476 case 0xa7b: /* AGHI - add halfword immediate */
3477 /* 64-bit destination + flags */
3478 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3479 return -1;
3480 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3481 return -1;
3482 break;
3483
3484 default:
3485 goto UNKNOWN_OP;
3486 }
3487 break;
3488
3489 /* 0xa6 undefined */
3490
3491 case 0xa8: /* MVCLE - move long extended [partial] */
3492 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3493 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3494 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3495 if (record_full_arch_list_add_mem (oaddr, tmp))
3496 return -1;
3497 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3498 return -1;
3499 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3500 return -1;
3501 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3502 return -1;
3503 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3504 return -1;
3505 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3506 return -1;
3507 break;
3508
3509 /* 0xaa-0xab undefined */
3510 /* 0xac privileged: STNSM - store then and system mask */
3511 /* 0xad privileged: STOSM - store then or system mask */
3512 /* 0xae privileged: SIGP - signal processor */
3513 /* 0xaf unsupported: MC - monitor call */
3514 /* 0xb0 undefined */
3515 /* 0xb1 privileged: LRA - load real address */
3516
3517 case 0xb2:
3518 case 0xb3:
3519 case 0xb9:
3520 /* S/RRD/RRE/RRF/IE-format instruction */
3521 switch (insn[0])
3522 {
3523 /* 0xb200-0xb204 undefined or privileged */
3524
3525 case 0xb205: /* STCK - store clock */
3526 case 0xb27c: /* STCKF - store clock fast */
3527 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3528 if (record_full_arch_list_add_mem (oaddr, 8))
3529 return -1;
3530 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3531 return -1;
3532 break;
3533
3534 /* 0xb206-0xb219 undefined, privileged, or unsupported */
3535 /* 0xb21a unsupported: CFC */
3536 /* 0xb21b-0xb221 undefined or privileged */
3537
3538 case 0xb222: /* IPM - insert program mask */
3539 case 0xb24f: /* EAR - extract access */
3540 case 0xb252: /* MSR - multiply single */
3541 case 0xb2ec: /* ETND - extract transaction nesting depth */
3542 case 0xb38c: /* EFPC - extract fpc */
3543 case 0xb91f: /* LRVR - load reversed */
3544 case 0xb926: /* LBR - load byte */
3545 case 0xb927: /* LHR - load halfword */
3546 case 0xb994: /* LLCR - load logical character */
3547 case 0xb995: /* LLHR - load logical halfword */
3548 case 0xb9f2: /* LOCR - load on condition */
3549 /* 32-bit gpr destination */
3550 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3551 return -1;
3552 break;
3553
3554 /* 0xb223-0xb22c privileged or unsupported */
3555
3556 case 0xb22d: /* DXR - divide */
3557 case 0xb325: /* LXDR - load lengthened */
3558 case 0xb326: /* LXER - load lengthened */
3559 case 0xb336: /* SQXR - square root */
3560 case 0xb365: /* LXR - load */
3561 case 0xb367: /* FIXR - load fp integer */
3562 case 0xb376: /* LZXR - load zero */
3563 case 0xb3b6: /* CXFR - convert from fixed */
3564 case 0xb3c6: /* CXGR - convert from fixed */
3565 case 0xb3fe: /* IEXTR - insert biased exponent */
3566 /* float pair destination */
3567 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3568 return -1;
3569 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3570 return -1;
3571 break;
3572
3573 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
3574
3575 case 0xb241: /* CKSM - checksum [partial] */
3576 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3577 return -1;
3578 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3579 return -1;
3580 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3581 return -1;
3582 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3583 return -1;
3584 break;
3585
3586 /* 0xb242-0xb243 undefined */
3587
3588 case 0xb244: /* SQDR - square root */
3589 case 0xb245: /* SQER - square root */
3590 case 0xb324: /* LDER - load lengthened */
3591 case 0xb337: /* MEER - multiply */
3592 case 0xb366: /* LEXR - load rounded */
3593 case 0xb370: /* LPDFR - load positive */
3594 case 0xb371: /* LNDFR - load negative */
3595 case 0xb372: /* CSDFR - copy sign */
3596 case 0xb373: /* LCDFR - load complement */
3597 case 0xb374: /* LZER - load zero */
3598 case 0xb375: /* LZDR - load zero */
3599 case 0xb377: /* FIER - load fp integer */
3600 case 0xb37f: /* FIDR - load fp integer */
3601 case 0xb3b4: /* CEFR - convert from fixed */
3602 case 0xb3b5: /* CDFR - convert from fixed */
3603 case 0xb3c1: /* LDGR - load fpr from gr */
3604 case 0xb3c4: /* CEGR - convert from fixed */
3605 case 0xb3c5: /* CDGR - convert from fixed */
3606 case 0xb3f6: /* IEDTR - insert biased exponent */
3607 /* float destination */
3608 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3609 return -1;
3610 break;
3611
3612 /* 0xb246-0xb24c: privileged or unsupported */
3613
3614 case 0xb24d: /* CPYA - copy access */
3615 case 0xb24e: /* SAR - set access */
3616 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[6]))
3617 return -1;
3618 break;
3619
3620 /* 0xb250-0xb251 undefined or privileged */
3621 /* 0xb253-0xb254 undefined or privileged */
3622
3623 case 0xb255: /* MVST - move string [partial] */
3624 {
3625 uint8_t end;
3626 gdb_byte cur;
3627 ULONGEST num = 0;
3628 /* Read ending byte. */
3629 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3630 end = tmp & 0xff;
3631 /* Get address of second operand. */
3632 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[7], &tmp);
3633 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3634 /* Search for ending byte and compute length. */
3635 do {
3636 num++;
3637 if (target_read_memory (oaddr, &cur, 1))
3638 return -1;
3639 oaddr++;
3640 } while (cur != end);
3641 /* Get address of first operand and record it. */
3642 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3643 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3644 if (record_full_arch_list_add_mem (oaddr, num))
3645 return -1;
3646 /* Record the registers. */
3647 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3648 return -1;
3649 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3650 return -1;
3651 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3652 return -1;
3653 }
3654 break;
3655
3656 /* 0xb256 undefined */
3657
3658 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
3659 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3660 return -1;
3661 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3662 return -1;
3663 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3664 return -1;
3665 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3666 return -1;
3667 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3668 return -1;
3669 break;
3670
3671 /* 0xb258-0xb25c undefined, privileged, or unsupported */
3672
3673 case 0xb25d: /* CLST - compare logical string [partial] */
3674 case 0xb25e: /* SRST - search string [partial] */
3675 case 0xb9be: /* SRSTU - search string unicode [partial] */
3676 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3677 return -1;
3678 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3679 return -1;
3680 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3681 return -1;
3682 break;
3683
3684 /* 0xb25f-0xb262 undefined */
3685
3686 case 0xb263: /* CMPSC - compression call [interruptible] */
3687 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3688 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3689 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3690 if (record_full_arch_list_add_mem (oaddr, tmp))
3691 return -1;
3692 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3693 return -1;
3694 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3695 return -1;
3696 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3697 return -1;
3698 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3699 return -1;
3700 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3701 return -1;
3702 /* DXC may be written */
3703 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3704 return -1;
3705 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3706 return -1;
3707 break;
3708
3709 /* 0xb264-0xb277 undefined, privileged, or unsupported */
3710
3711 case 0xb278: /* STCKE - store clock extended */
3712 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3713 if (record_full_arch_list_add_mem (oaddr, 16))
3714 return -1;
3715 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3716 return -1;
3717 break;
3718
3719 /* 0xb279-0xb27b undefined or unsupported */
3720 /* 0xb27d-0xb298 undefined or privileged */
3721
3722 case 0xb299: /* SRNM - set rounding mode */
3723 case 0xb2b8: /* SRNMB - set bfp rounding mode */
3724 case 0xb2b9: /* SRNMT - set dfp rounding mode */
3725 case 0xb29d: /* LFPC - load fpc */
3726 case 0xb2bd: /* LFAS - load fpc and signal */
3727 case 0xb384: /* SFPC - set fpc */
3728 case 0xb385: /* SFASR - set fpc and signal */
3729 case 0xb960: /* CGRT - compare and trap */
3730 case 0xb961: /* CLGRT - compare logical and trap */
3731 case 0xb972: /* CRT - compare and trap */
3732 case 0xb973: /* CLRT - compare logical and trap */
3733 /* fpc only - including possible DXC write for trapping insns */
3734 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3735 return -1;
3736 break;
3737
3738 /* 0xb29a-0xb29b undefined */
3739
3740 case 0xb29c: /* STFPC - store fpc */
3741 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3742 if (record_full_arch_list_add_mem (oaddr, 4))
3743 return -1;
3744 break;
3745
3746 /* 0xb29e-0xb2a4 undefined */
3747
3748 case 0xb2a5: /* TRE - translate extended [partial] */
3749 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3750 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3751 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3752 if (record_full_arch_list_add_mem (oaddr, tmp))
3753 return -1;
3754 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3755 return -1;
3756 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3757 return -1;
3758 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3759 return -1;
3760 break;
3761
3762 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
3763 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
3764 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
3765 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
3766 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
3767 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
3768 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3769 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3770 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3771 if (record_full_arch_list_add_mem (oaddr, tmp))
3772 return -1;
3773 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3774 return -1;
3775 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3776 return -1;
3777 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3778 return -1;
3779 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3780 return -1;
3781 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3782 return -1;
3783 break;
3784
3785 /* 0xb2a8-0xb2af undefined */
3786
3787 case 0xb2b0: /* STFLE - store facility list extended */
3788 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3789 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3790 tmp &= 0xff;
3791 if (record_full_arch_list_add_mem (oaddr, 8 * (tmp + 1)))
3792 return -1;
3793 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM))
3794 return -1;
3795 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3796 return -1;
3797 break;
3798
3799 /* 0xb2b1-0xb2b7 undefined or privileged */
3800 /* 0xb2ba-0xb2bc undefined */
3801 /* 0xb2be-0xb2e7 undefined */
3802 /* 0xb2e9-0xb2eb undefined */
3803 /* 0xb2ed-0xb2f7 undefined */
3804 /* 0xb2f8 unsupported: TEND */
3805 /* 0xb2f9 undefined */
3806
3807 case 0xb2e8: /* PPA - perform processor assist */
3808 case 0xb2fa: /* NIAI - next instruction access intent */
3809 /* no visible effects */
3810 break;
3811
3812 /* 0xb2fb undefined */
3813 /* 0xb2fc unsupported: TABORT */
3814 /* 0xb2fd-0xb2fe undefined */
3815 /* 0xb2ff unsupported: TRAP */
3816
3817 case 0xb300: /* LPEBR - load positive */
3818 case 0xb301: /* LNEBR - load negative */
3819 case 0xb303: /* LCEBR - load complement */
3820 case 0xb310: /* LPDBR - load positive */
3821 case 0xb311: /* LNDBR - load negative */
3822 case 0xb313: /* LCDBR - load complement */
3823 case 0xb350: /* TBEDR - convert hfp to bfp */
3824 case 0xb351: /* TBDR - convert hfp to bfp */
3825 case 0xb358: /* THDER - convert bfp to hfp */
3826 case 0xb359: /* THDR - convert bfp to hfp */
3827 /* float destination + flags */
3828 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3829 return -1;
3830 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3831 return -1;
3832 break;
3833
3834 case 0xb304: /* LDEBR - load lengthened */
3835 case 0xb30c: /* MDEBR - multiply */
3836 case 0xb30d: /* DEBR - divide */
3837 case 0xb314: /* SQEBR - square root */
3838 case 0xb315: /* SQDBR - square root */
3839 case 0xb317: /* MEEBR - multiply */
3840 case 0xb31c: /* MDBR - multiply */
3841 case 0xb31d: /* DDBR - divide */
3842 case 0xb344: /* LEDBRA - load rounded */
3843 case 0xb345: /* LDXBRA - load rounded */
3844 case 0xb346: /* LEXBRA - load rounded */
3845 case 0xb357: /* FIEBRA - load fp integer */
3846 case 0xb35f: /* FIDBRA - load fp integer */
3847 case 0xb390: /* CELFBR - convert from logical */
3848 case 0xb391: /* CDLFBR - convert from logical */
3849 case 0xb394: /* CEFBR - convert from fixed */
3850 case 0xb395: /* CDFBR - convert from fixed */
3851 case 0xb3a0: /* CELGBR - convert from logical */
3852 case 0xb3a1: /* CDLGBR - convert from logical */
3853 case 0xb3a4: /* CEGBR - convert from fixed */
3854 case 0xb3a5: /* CDGBR - convert from fixed */
3855 case 0xb3d0: /* MDTR - multiply */
3856 case 0xb3d1: /* DDTR - divide */
3857 case 0xb3d4: /* LDETR - load lengthened */
3858 case 0xb3d5: /* LEDTR - load lengthened */
3859 case 0xb3d7: /* FIDTR - load fp integer */
3860 case 0xb3dd: /* LDXTR - load lengthened */
3861 case 0xb3f1: /* CDGTR - convert from fixed */
3862 case 0xb3f2: /* CDUTR - convert from unsigned packed */
3863 case 0xb3f3: /* CDSTR - convert from signed packed */
3864 case 0xb3f5: /* QADTR - quantize */
3865 case 0xb3f7: /* RRDTR - reround */
3866 case 0xb951: /* CDFTR - convert from fixed */
3867 case 0xb952: /* CDLGTR - convert from logical */
3868 case 0xb953: /* CDLFTR - convert from logical */
3869 /* float destination + fpc */
3870 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3871 return -1;
3872 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3873 return -1;
3874 break;
3875
3876 case 0xb305: /* LXDBR - load lengthened */
3877 case 0xb306: /* LXEBR - load lengthened */
3878 case 0xb307: /* MXDBR - multiply */
3879 case 0xb316: /* SQXBR - square root */
3880 case 0xb34c: /* MXBR - multiply */
3881 case 0xb34d: /* DXBR - divide */
3882 case 0xb347: /* FIXBRA - load fp integer */
3883 case 0xb392: /* CXLFBR - convert from logical */
3884 case 0xb396: /* CXFBR - convert from fixed */
3885 case 0xb3a2: /* CXLGBR - convert from logical */
3886 case 0xb3a6: /* CXGBR - convert from fixed */
3887 case 0xb3d8: /* MXTR - multiply */
3888 case 0xb3d9: /* DXTR - divide */
3889 case 0xb3dc: /* LXDTR - load lengthened */
3890 case 0xb3df: /* FIXTR - load fp integer */
3891 case 0xb3f9: /* CXGTR - convert from fixed */
3892 case 0xb3fa: /* CXUTR - convert from unsigned packed */
3893 case 0xb3fb: /* CXSTR - convert from signed packed */
3894 case 0xb3fd: /* QAXTR - quantize */
3895 case 0xb3ff: /* RRXTR - reround */
3896 case 0xb959: /* CXFTR - convert from fixed */
3897 case 0xb95a: /* CXLGTR - convert from logical */
3898 case 0xb95b: /* CXLFTR - convert from logical */
3899 /* float pair destination + fpc */
3900 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3901 return -1;
3902 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3903 return -1;
3904 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3905 return -1;
3906 break;
3907
3908 case 0xb308: /* KEBR - compare and signal */
3909 case 0xb309: /* CEBR - compare */
3910 case 0xb318: /* KDBR - compare and signal */
3911 case 0xb319: /* CDBR - compare */
3912 case 0xb348: /* KXBR - compare and signal */
3913 case 0xb349: /* CXBR - compare */
3914 case 0xb3e0: /* KDTR - compare and signal */
3915 case 0xb3e4: /* CDTR - compare */
3916 case 0xb3e8: /* KXTR - compare and signal */
3917 case 0xb3ec: /* CXTR - compare */
3918 /* flags + fpc only */
3919 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3920 return -1;
3921 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3922 return -1;
3923 break;
3924
3925 case 0xb302: /* LTEBR - load and test */
3926 case 0xb312: /* LTDBR - load and test */
3927 case 0xb30a: /* AEBR - add */
3928 case 0xb30b: /* SEBR - subtract */
3929 case 0xb31a: /* ADBR - add */
3930 case 0xb31b: /* SDBR - subtract */
3931 case 0xb3d2: /* ADTR - add */
3932 case 0xb3d3: /* SDTR - subtract */
3933 case 0xb3d6: /* LTDTR - load and test */
3934 /* float destination + flags + fpc */
3935 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3936 return -1;
3937 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3938 return -1;
3939 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3940 return -1;
3941 break;
3942
3943 case 0xb30e: /* MAEBR - multiply and add */
3944 case 0xb30f: /* MSEBR - multiply and subtract */
3945 case 0xb31e: /* MADBR - multiply and add */
3946 case 0xb31f: /* MSDBR - multiply and subtract */
3947 /* float destination [RRD] + fpc */
3948 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3949 return -1;
3950 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3951 return -1;
3952 break;
3953
3954 /* 0xb320-0xb323 undefined */
3955 /* 0xb327-0xb32d undefined */
3956
3957 case 0xb32e: /* MAER - multiply and add */
3958 case 0xb32f: /* MSER - multiply and subtract */
3959 case 0xb338: /* MAYLR - multiply and add unnormalized */
3960 case 0xb339: /* MYLR - multiply unnormalized */
3961 case 0xb33c: /* MAYHR - multiply and add unnormalized */
3962 case 0xb33d: /* MYHR - multiply unnormalized */
3963 case 0xb33e: /* MADR - multiply and add */
3964 case 0xb33f: /* MSDR - multiply and subtract */
3965 /* float destination [RRD] */
3966 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3967 return -1;
3968 break;
3969
3970 /* 0xb330-0xb335 undefined */
3971
3972 case 0xb33a: /* MAYR - multiply and add unnormalized */
3973 case 0xb33b: /* MYR - multiply unnormalized */
3974 /* float pair destination [RRD] */
3975 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3976 return -1;
3977 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
3978 return -1;
3979 break;
3980
3981 case 0xb340: /* LPXBR - load positive */
3982 case 0xb341: /* LNXBR - load negative */
3983 case 0xb343: /* LCXBR - load complement */
3984 case 0xb360: /* LPXR - load positive */
3985 case 0xb361: /* LNXR - load negative */
3986 case 0xb362: /* LTXR - load and test */
3987 case 0xb363: /* LCXR - load complement */
3988 /* float pair destination + flags */
3989 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3990 return -1;
3991 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3992 return -1;
3993 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3994 return -1;
3995 break;
3996
3997 case 0xb342: /* LTXBR - load and test */
3998 case 0xb34a: /* AXBR - add */
3999 case 0xb34b: /* SXBR - subtract */
4000 case 0xb3da: /* AXTR - add */
4001 case 0xb3db: /* SXTR - subtract */
4002 case 0xb3de: /* LTXTR - load and test */
4003 /* float pair destination + flags + fpc */
4004 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4005 return -1;
4006 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4007 return -1;
4008 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4009 return -1;
4010 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4011 return -1;
4012 break;
4013
4014 /* 0xb34e-0xb34f undefined */
4015 /* 0xb352 undefined */
4016
4017 case 0xb353: /* DIEBR - divide to integer */
4018 case 0xb35b: /* DIDBR - divide to integer */
4019 /* two float destinations + flags + fpc */
4020 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4021 return -1;
4022 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4023 return -1;
4024 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4025 return -1;
4026 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4027 return -1;
4028 break;
4029
4030 /* 0xb354-0xb356 undefined */
4031 /* 0xb35a undefined */
4032
4033 /* 0xb35c-0xb35e undefined */
4034 /* 0xb364 undefined */
4035 /* 0xb368 undefined */
4036
4037 case 0xb369: /* CXR - compare */
4038 case 0xb3f4: /* CEDTR - compare biased exponent */
4039 case 0xb3fc: /* CEXTR - compare biased exponent */
4040 case 0xb920: /* CGR - compare */
4041 case 0xb921: /* CLGR - compare logical */
4042 case 0xb930: /* CGFR - compare */
4043 case 0xb931: /* CLGFR - compare logical */
4044 case 0xb9cd: /* CHHR - compare high */
4045 case 0xb9cf: /* CLHHR - compare logical high */
4046 case 0xb9dd: /* CHLR - compare high */
4047 case 0xb9df: /* CLHLR - compare logical high */
4048 /* flags only */
4049 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4050 return -1;
4051 break;
4052
4053 /* 0xb36a-0xb36f undefined */
4054 /* 0xb377-0xb37e undefined */
4055 /* 0xb380-0xb383 undefined */
4056 /* 0xb386-0xb38b undefined */
4057 /* 0xb38d-0xb38f undefined */
4058 /* 0xb393 undefined */
4059 /* 0xb397 undefined */
4060
4061 case 0xb398: /* CFEBR - convert to fixed */
4062 case 0xb399: /* CFDBR - convert to fixed */
4063 case 0xb39a: /* CFXBR - convert to fixed */
4064 case 0xb39c: /* CLFEBR - convert to logical */
4065 case 0xb39d: /* CLFDBR - convert to logical */
4066 case 0xb39e: /* CLFXBR - convert to logical */
4067 case 0xb941: /* CFDTR - convert to fixed */
4068 case 0xb949: /* CFXTR - convert to fixed */
4069 case 0xb943: /* CLFDTR - convert to logical */
4070 case 0xb94b: /* CLFXTR - convert to logical */
4071 /* 32-bit gpr destination + flags + fpc */
4072 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4073 return -1;
4074 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4075 return -1;
4076 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4077 return -1;
4078 break;
4079
4080 /* 0xb39b undefined */
4081 /* 0xb39f undefined */
4082
4083 /* 0xb3a3 undefined */
4084 /* 0xb3a7 undefined */
4085
4086 case 0xb3a8: /* CGEBR - convert to fixed */
4087 case 0xb3a9: /* CGDBR - convert to fixed */
4088 case 0xb3aa: /* CGXBR - convert to fixed */
4089 case 0xb3ac: /* CLGEBR - convert to logical */
4090 case 0xb3ad: /* CLGDBR - convert to logical */
4091 case 0xb3ae: /* CLGXBR - convert to logical */
4092 case 0xb3e1: /* CGDTR - convert to fixed */
4093 case 0xb3e9: /* CGXTR - convert to fixed */
4094 case 0xb942: /* CLGDTR - convert to logical */
4095 case 0xb94a: /* CLGXTR - convert to logical */
4096 /* 64-bit gpr destination + flags + fpc */
4097 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4098 return -1;
4099 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4100 return -1;
4101 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4102 return -1;
4103 break;
4104
4105 /* 0xb3ab undefined */
4106 /* 0xb3af-0xb3b3 undefined */
4107 /* 0xb3b7 undefined */
4108
4109 case 0xb3b8: /* CFER - convert to fixed */
4110 case 0xb3b9: /* CFDR - convert to fixed */
4111 case 0xb3ba: /* CFXR - convert to fixed */
4112 case 0xb998: /* ALCR - add logical with carry */
4113 case 0xb999: /* SLBR - subtract logical with borrow */
4114 case 0xb9f4: /* NRK - and */
4115 case 0xb9f6: /* ORK - or */
4116 case 0xb9f7: /* XRK - xor */
4117 case 0xb9f8: /* ARK - add */
4118 case 0xb9f9: /* SRK - subtract */
4119 case 0xb9fa: /* ALRK - add logical */
4120 case 0xb9fb: /* SLRK - subtract logical */
4121 /* 32-bit gpr destination + flags */
4122 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4123 return -1;
4124 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4125 return -1;
4126 break;
4127
4128 case 0xb3c8: /* CGER - convert to fixed */
4129 case 0xb3c9: /* CGDR - convert to fixed */
4130 case 0xb3ca: /* CGXR - convert to fixed */
4131 case 0xb900: /* LPGR - load positive */
4132 case 0xb901: /* LNGR - load negative */
4133 case 0xb902: /* LTGR - load and test */
4134 case 0xb903: /* LCGR - load complement */
4135 case 0xb908: /* AGR - add */
4136 case 0xb909: /* SGR - subtract */
4137 case 0xb90a: /* ALGR - add logical */
4138 case 0xb90b: /* SLGR - subtract logical */
4139 case 0xb910: /* LPGFR - load positive */
4140 case 0xb911: /* LNGFR - load negative */
4141 case 0xb912: /* LTGFR - load and test */
4142 case 0xb913: /* LCGFR - load complement */
4143 case 0xb918: /* AGFR - add */
4144 case 0xb919: /* SGFR - subtract */
4145 case 0xb91a: /* ALGFR - add logical */
4146 case 0xb91b: /* SLGFR - subtract logical */
4147 case 0xb980: /* NGR - and */
4148 case 0xb981: /* OGR - or */
4149 case 0xb982: /* XGR - xor */
4150 case 0xb988: /* ALCGR - add logical with carry */
4151 case 0xb989: /* SLBGR - subtract logical with borrow */
4152 case 0xb9e1: /* POPCNT - population count */
4153 case 0xb9e4: /* NGRK - and */
4154 case 0xb9e6: /* OGRK - or */
4155 case 0xb9e7: /* XGRK - xor */
4156 case 0xb9e8: /* AGRK - add */
4157 case 0xb9e9: /* SGRK - subtract */
4158 case 0xb9ea: /* ALGRK - add logical */
4159 case 0xb9eb: /* SLGRK - subtract logical */
4160 case 0xb9ed: /* MSGRKC - multiply single 64x64 -> 64 */
4161 case 0xb9fd: /* MSRKC - multiply single 32x32 -> 32 */
4162 /* 64-bit gpr destination + flags */
4163 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4164 return -1;
4165 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4166 return -1;
4167 break;
4168
4169 /* 0xb3bb-0xb3c0 undefined */
4170 /* 0xb3c2-0xb3c3 undefined */
4171 /* 0xb3c7 undefined */
4172 /* 0xb3cb-0xb3cc undefined */
4173
4174 case 0xb3cd: /* LGDR - load gr from fpr */
4175 case 0xb3e2: /* CUDTR - convert to unsigned packed */
4176 case 0xb3e3: /* CSDTR - convert to signed packed */
4177 case 0xb3e5: /* EEDTR - extract biased exponent */
4178 case 0xb3e7: /* ESDTR - extract significance */
4179 case 0xb3ed: /* EEXTR - extract biased exponent */
4180 case 0xb3ef: /* ESXTR - extract significance */
4181 case 0xb904: /* LGR - load */
4182 case 0xb906: /* LGBR - load byte */
4183 case 0xb907: /* LGHR - load halfword */
4184 case 0xb90c: /* MSGR - multiply single */
4185 case 0xb90f: /* LRVGR - load reversed */
4186 case 0xb914: /* LGFR - load */
4187 case 0xb916: /* LLGFR - load logical */
4188 case 0xb917: /* LLGTR - load logical thirty one bits */
4189 case 0xb91c: /* MSGFR - multiply single 64<32 */
4190 case 0xb946: /* BCTGR - branch on count */
4191 case 0xb984: /* LLGCR - load logical character */
4192 case 0xb985: /* LLGHR - load logical halfword */
4193 case 0xb9e2: /* LOCGR - load on condition */
4194 /* 64-bit gpr destination */
4195 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4196 return -1;
4197 break;
4198
4199 /* 0xb3ce-0xb3cf undefined */
4200 /* 0xb3e6 undefined */
4201
4202 case 0xb3ea: /* CUXTR - convert to unsigned packed */
4203 case 0xb3eb: /* CSXTR - convert to signed packed */
4204 case 0xb90d: /* DSGR - divide single */
4205 case 0xb91d: /* DSGFR - divide single */
4206 case 0xb986: /* MLGR - multiply logical */
4207 case 0xb987: /* DLGR - divide logical */
4208 case 0xb9ec: /* MGRK - multiply 64x64 -> 128 */
4209 /* 64-bit gpr pair destination */
4210 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4211 return -1;
4212 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4213 return -1;
4214 break;
4215
4216 /* 0xb3ee undefined */
4217 /* 0xb3f0 undefined */
4218 /* 0xb3f8 undefined */
4219
4220 /* 0xb905 privileged */
4221
4222 /* 0xb90e unsupported: EREGG */
4223
4224 /* 0xb915 undefined */
4225
4226 case 0xb91e: /* KMAC - compute message authentication code [partial] */
4227 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4228 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4229 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4230 tmp &= 0xff;
4231 switch (tmp)
4232 {
4233 case 0x00: /* KMAC-Query */
4234 if (record_full_arch_list_add_mem (oaddr, 16))
4235 return -1;
4236 break;
4237
4238 case 0x01: /* KMAC-DEA */
4239 case 0x02: /* KMAC-TDEA-128 */
4240 case 0x03: /* KMAC-TDEA-192 */
4241 case 0x09: /* KMAC-Encrypted-DEA */
4242 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
4243 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
4244 if (record_full_arch_list_add_mem (oaddr, 8))
4245 return -1;
4246 break;
4247
4248 case 0x12: /* KMAC-AES-128 */
4249 case 0x13: /* KMAC-AES-192 */
4250 case 0x14: /* KMAC-AES-256 */
4251 case 0x1a: /* KMAC-Encrypted-AES-128 */
4252 case 0x1b: /* KMAC-Encrypted-AES-192 */
4253 case 0x1c: /* KMAC-Encrypted-AES-256 */
4254 if (record_full_arch_list_add_mem (oaddr, 16))
4255 return -1;
4256 break;
4257
4258 default:
4259 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4260 (int)tmp, paddress (gdbarch, addr));
4261 return -1;
4262 }
4263 if (tmp != 0)
4264 {
4265 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4266 return -1;
4267 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4268 return -1;
4269 }
4270 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4271 return -1;
4272 break;
4273
4274 /* 0xb922-0xb924 undefined */
4275 /* 0xb925 privileged */
4276 /* 0xb928 privileged */
4277
4278 case 0xb929: /* KMA - cipher message with authentication */
4279 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
4280 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
4281 case 0xb92f: /* KMC - cipher message with chaining [partial] */
4282 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4283 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4284 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4285 tmp &= 0x7f;
4286 switch (tmp)
4287 {
4288 case 0x00: /* KM*-Query */
4289 if (record_full_arch_list_add_mem (oaddr, 16))
4290 return -1;
4291 break;
4292
4293 case 0x01: /* KM*-DEA */
4294 case 0x02: /* KM*-TDEA-128 */
4295 case 0x03: /* KM*-TDEA-192 */
4296 case 0x09: /* KM*-Encrypted-DEA */
4297 case 0x0a: /* KM*-Encrypted-TDEA-128 */
4298 case 0x0b: /* KM*-Encrypted-TDEA-192 */
4299 if (record_full_arch_list_add_mem (oaddr, 8))
4300 return -1;
4301 break;
4302
4303 case 0x12: /* KM*-AES-128 */
4304 case 0x13: /* KM*-AES-192 */
4305 case 0x14: /* KM*-AES-256 */
4306 case 0x1a: /* KM*-Encrypted-AES-128 */
4307 case 0x1b: /* KM*-Encrypted-AES-192 */
4308 case 0x1c: /* KM*-Encrypted-AES-256 */
4309 if (record_full_arch_list_add_mem (oaddr, 16))
4310 return -1;
4311 break;
4312
4313 case 0x43: /* KMC-PRNG */
4314 /* Only valid for KMC. */
4315 if (insn[0] == 0xb92f)
4316 {
4317 if (record_full_arch_list_add_mem (oaddr, 8))
4318 return -1;
4319 break;
4320 }
4321 /* For other instructions... */
4322 /* Fall through. */
4323 default:
4324 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
4325 (int)tmp, paddress (gdbarch, addr));
4326 return -1;
4327 }
4328 if (tmp != 0)
4329 {
4330 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4331 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4332 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4333 if (record_full_arch_list_add_mem (oaddr2, tmp))
4334 return -1;
4335 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4336 return -1;
4337 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4338 return -1;
4339 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4340 return -1;
4341 }
4342 if (tmp != 0 && insn[0] == 0xb929)
4343 {
4344 if (record_full_arch_list_add_reg (regcache,
4345 S390_R0_REGNUM + inib[4]))
4346 return -1;
4347 if (record_full_arch_list_add_reg (regcache,
4348 S390_R0_REGNUM + (inib[4] | 1)))
4349 return -1;
4350 }
4351 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4352 return -1;
4353 break;
4354
4355 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
4356 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4357 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4358 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4359 tmp &= 0x7f;
4360 switch (tmp)
4361 {
4362 case 0x00: /* PCC-Query */
4363 if (record_full_arch_list_add_mem (oaddr, 16))
4364 return -1;
4365 break;
4366
4367 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
4368 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
4369 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
4370 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
4371 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
4372 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
4373 if (record_full_arch_list_add_mem (oaddr + 0x10, 8))
4374 return -1;
4375 break;
4376
4377 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
4378 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
4379 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
4380 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
4381 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
4382 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
4383 if (record_full_arch_list_add_mem (oaddr + 0x18, 16))
4384 return -1;
4385 break;
4386
4387 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
4388 if (record_full_arch_list_add_mem (oaddr + 0x30, 32))
4389 return -1;
4390 break;
4391
4392 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
4393 if (record_full_arch_list_add_mem (oaddr + 0x40, 32))
4394 return -1;
4395 break;
4396
4397 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
4398 if (record_full_arch_list_add_mem (oaddr + 0x50, 32))
4399 return -1;
4400 break;
4401
4402 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
4403 if (record_full_arch_list_add_mem (oaddr + 0x60, 32))
4404 return -1;
4405 break;
4406
4407 default:
4408 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PCC function %02x at %s.\n",
4409 (int)tmp, paddress (gdbarch, addr));
4410 return -1;
4411 }
4412 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4413 return -1;
4414 break;
4415
4416 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
4417 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4418 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4419 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4420 tmp &= 0x7f;
4421 switch (tmp)
4422 {
4423 case 0x00: /* KMCTR-Query */
4424 if (record_full_arch_list_add_mem (oaddr, 16))
4425 return -1;
4426 break;
4427
4428 case 0x01: /* KMCTR-DEA */
4429 case 0x02: /* KMCTR-TDEA-128 */
4430 case 0x03: /* KMCTR-TDEA-192 */
4431 case 0x09: /* KMCTR-Encrypted-DEA */
4432 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
4433 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
4434 case 0x12: /* KMCTR-AES-128 */
4435 case 0x13: /* KMCTR-AES-192 */
4436 case 0x14: /* KMCTR-AES-256 */
4437 case 0x1a: /* KMCTR-Encrypted-AES-128 */
4438 case 0x1b: /* KMCTR-Encrypted-AES-192 */
4439 case 0x1c: /* KMCTR-Encrypted-AES-256 */
4440 break;
4441
4442 default:
4443 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMCTR function %02x at %s.\n",
4444 (int)tmp, paddress (gdbarch, addr));
4445 return -1;
4446 }
4447 if (tmp != 0)
4448 {
4449 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4450 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4451 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4452 if (record_full_arch_list_add_mem (oaddr2, tmp))
4453 return -1;
4454 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4455 return -1;
4456 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4457 return -1;
4458 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4459 return -1;
4460 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[4]))
4461 return -1;
4462 }
4463 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4464 return -1;
4465 break;
4466
4467 case 0xb92e: /* KM - cipher message [partial] */
4468 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4469 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4470 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4471 tmp &= 0x7f;
4472 switch (tmp)
4473 {
4474 case 0x00: /* KM-Query */
4475 if (record_full_arch_list_add_mem (oaddr, 16))
4476 return -1;
4477 break;
4478
4479 case 0x01: /* KM-DEA */
4480 case 0x02: /* KM-TDEA-128 */
4481 case 0x03: /* KM-TDEA-192 */
4482 case 0x09: /* KM-Encrypted-DEA */
4483 case 0x0a: /* KM-Encrypted-TDEA-128 */
4484 case 0x0b: /* KM-Encrypted-TDEA-192 */
4485 case 0x12: /* KM-AES-128 */
4486 case 0x13: /* KM-AES-192 */
4487 case 0x14: /* KM-AES-256 */
4488 case 0x1a: /* KM-Encrypted-AES-128 */
4489 case 0x1b: /* KM-Encrypted-AES-192 */
4490 case 0x1c: /* KM-Encrypted-AES-256 */
4491 break;
4492
4493 case 0x32: /* KM-XTS-AES-128 */
4494 if (record_full_arch_list_add_mem (oaddr + 0x10, 16))
4495 return -1;
4496 break;
4497
4498 case 0x34: /* KM-XTS-AES-256 */
4499 if (record_full_arch_list_add_mem (oaddr + 0x20, 16))
4500 return -1;
4501 break;
4502
4503 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
4504 if (record_full_arch_list_add_mem (oaddr + 0x30, 16))
4505 return -1;
4506 break;
4507
4508 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
4509 if (record_full_arch_list_add_mem (oaddr + 0x40, 16))
4510 return -1;
4511 break;
4512
4513 default:
4514 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM function %02x at %s.\n",
4515 (int)tmp, paddress (gdbarch, addr));
4516 return -1;
4517 }
4518 if (tmp != 0)
4519 {
4520 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4521 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4522 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4523 if (record_full_arch_list_add_mem (oaddr2, tmp))
4524 return -1;
4525 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4526 return -1;
4527 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4528 return -1;
4529 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4530 return -1;
4531 }
4532 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4533 return -1;
4534 break;
4535
4536 /* 0xb932-0xb93b undefined */
4537
4538 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
4539 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4540 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4541 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4542 tmp &= 0xff;
4543 switch (tmp)
4544 {
4545 case 0x00: /* PPNO-Query */
4546 case 0x80: /* PPNO-Query */
4547 if (record_full_arch_list_add_mem (oaddr, 16))
4548 return -1;
4549 break;
4550
4551 case 0x03: /* PPNO-SHA-512-DRNG - generate */
4552 if (record_full_arch_list_add_mem (oaddr, 240))
4553 return -1;
4554 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4555 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4556 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4557 if (record_full_arch_list_add_mem (oaddr2, tmp))
4558 return -1;
4559 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4560 return -1;
4561 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4562 return -1;
4563 break;
4564
4565 case 0x83: /* PPNO-SHA-512-DRNG - seed */
4566 if (record_full_arch_list_add_mem (oaddr, 240))
4567 return -1;
4568 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4569 return -1;
4570 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4571 return -1;
4572 break;
4573
4574 default:
4575 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PPNO function %02x at %s.\n",
4576 (int)tmp, paddress (gdbarch, addr));
4577 return -1;
4578 }
4579 /* DXC may be written */
4580 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4581 return -1;
4582 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4583 return -1;
4584 break;
4585
4586 /* 0xb93d undefined */
4587
4588 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
4589 case 0xb93f: /* KLMD - compute last message digest [partial] */
4590 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4591 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4592 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4593 tmp &= 0xff;
4594 switch (tmp)
4595 {
4596 case 0x00: /* K*MD-Query */
4597 if (record_full_arch_list_add_mem (oaddr, 16))
4598 return -1;
4599 break;
4600
4601 case 0x01: /* K*MD-SHA-1 */
4602 if (record_full_arch_list_add_mem (oaddr, 20))
4603 return -1;
4604 break;
4605
4606 case 0x02: /* K*MD-SHA-256 */
4607 if (record_full_arch_list_add_mem (oaddr, 32))
4608 return -1;
4609 break;
4610
4611 case 0x03: /* K*MD-SHA-512 */
4612 if (record_full_arch_list_add_mem (oaddr, 64))
4613 return -1;
4614 break;
4615
4616 case 0x41: /* KIMD-GHASH */
4617 /* Only valid for KIMD. */
4618 if (insn[0] == 0xb93e)
4619 {
4620 if (record_full_arch_list_add_mem (oaddr, 16))
4621 return -1;
4622 break;
4623 }
4624 /* For KLMD... */
4625 /* Fall through. */
4626 default:
4627 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4628 (int)tmp, paddress (gdbarch, addr));
4629 return -1;
4630 }
4631 if (tmp != 0)
4632 {
4633 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4634 return -1;
4635 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4636 return -1;
4637 }
4638 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4639 return -1;
4640 break;
4641
4642 /* 0xb940 undefined */
4643 /* 0xb944-0xb945 undefined */
4644 /* 0xb947-0xb948 undefined */
4645 /* 0xb94c-0xb950 undefined */
4646 /* 0xb954-0xb958 undefined */
4647 /* 0xb95c-0xb95f undefined */
4648 /* 0xb962-0xb971 undefined */
4649 /* 0xb974-0xb97f undefined */
4650
4651 case 0xb983: /* FLOGR - find leftmost one */
4652 /* 64-bit gpr pair destination + flags */
4653 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4654 return -1;
4655 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4656 return -1;
4657 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4658 return -1;
4659 break;
4660
4661 /* 0xb98a privileged */
4662 /* 0xb98b-0xb98c undefined */
4663
4664 case 0xb98d: /* EPSW - extract psw */
4665 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4666 return -1;
4667 if (inib[7])
4668 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4669 return -1;
4670 break;
4671
4672 /* 0xb98e-0xb98f privileged */
4673
4674 case 0xb990: /* TRTT - translate two to two [partial] */
4675 case 0xb991: /* TRTO - translate two to one [partial] */
4676 case 0xb992: /* TROT - translate one to two [partial] */
4677 case 0xb993: /* TROO - translate one to one [partial] */
4678 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4679 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4680 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4681 /* tmp is source length, we want destination length. Adjust. */
4682 if (insn[0] == 0xb991)
4683 tmp >>= 1;
4684 if (insn[0] == 0xb992)
4685 tmp <<= 1;
4686 if (record_full_arch_list_add_mem (oaddr, tmp))
4687 return -1;
4688 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4689 return -1;
4690 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4691 return -1;
4692 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4693 return -1;
4694 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4695 return -1;
4696 break;
4697
4698 case 0xb996: /* MLR - multiply logical */
4699 case 0xb997: /* DLR - divide logical */
4700 /* 32-bit gpr pair destination */
4701 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4702 return -1;
4703 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4704 return -1;
4705 break;
4706
4707 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
4708 /* 0xb9b4-0xb9bc undefined */
4709
4710 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
4711 case 0xb9bf: /* TRTE - translate and test extended [partial] */
4712 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4713 return -1;
4714 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4715 return -1;
4716 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4717 return -1;
4718 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4719 return -1;
4720 break;
4721
4722 /* 0xb9c0-0xb9c7 undefined */
4723
4724 case 0xb9c8: /* AHHHR - add high */
4725 case 0xb9c9: /* SHHHR - subtract high */
4726 case 0xb9ca: /* ALHHHR - add logical high */
4727 case 0xb9cb: /* SLHHHR - subtract logical high */
4728 case 0xb9d8: /* AHHLR - add high */
4729 case 0xb9d9: /* SHHLR - subtract high */
4730 case 0xb9da: /* ALHHLR - add logical high */
4731 case 0xb9db: /* SLHHLR - subtract logical high */
4732 /* 32-bit high gpr destination + flags */
4733 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4734 return -1;
4735 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4736 return -1;
4737 break;
4738
4739 /* 0xb9cc undefined */
4740 /* 0xb9ce undefined */
4741 /* 0xb9d0-0xb9d7 undefined */
4742 /* 0xb9dc undefined */
4743 /* 0xb9de undefined */
4744
4745 case 0xb9e0: /* LOCFHR - load high on condition */
4746 /* 32-bit high gpr destination */
4747 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4748 return -1;
4749 break;
4750
4751 /* 0xb9e3 undefined */
4752 /* 0xb9e5 undefined */
4753 /* 0xb9ee-0xb9f1 undefined */
4754 /* 0xb9f3 undefined */
4755 /* 0xb9f5 undefined */
4756 /* 0xb9fc undefined */
4757 /* 0xb9fe -0xb9ff undefined */
4758
4759 default:
4760 goto UNKNOWN_OP;
4761 }
4762 break;
4763
4764 /* 0xb4-0xb5 undefined */
4765 /* 0xb6 privileged: STCTL - store control */
4766 /* 0xb7 privileged: LCTL - load control */
4767 /* 0xb8 undefined */
4768
4769 case 0xba: /* CS - compare and swap */
4770 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4771 if (record_full_arch_list_add_mem (oaddr, 4))
4772 return -1;
4773 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4774 return -1;
4775 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4776 return -1;
4777 break;
4778
4779 case 0xbb: /* CDS - compare double and swap */
4780 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4781 if (record_full_arch_list_add_mem (oaddr, 8))
4782 return -1;
4783 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4784 return -1;
4785 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4786 return -1;
4787 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4788 return -1;
4789 break;
4790
4791 /* 0xbc undefined */
4792
4793 case 0xbe: /* STCM - store characters under mask */
4794 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4795 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
4796 return -1;
4797 break;
4798
4799 case 0xc0:
4800 case 0xc2:
4801 case 0xc4:
4802 case 0xc6:
4803 case 0xcc:
4804 /* RIL-format instruction */
4805 switch (ibyte[0] << 4 | inib[3])
4806 {
4807 case 0xc00: /* LARL - load address relative long */
4808 case 0xc05: /* BRASL - branch relative and save long */
4809 case 0xc09: /* IILF - insert immediate */
4810 case 0xc21: /* MSFI - multiply single immediate */
4811 case 0xc42: /* LLHRL - load logical halfword relative long */
4812 case 0xc45: /* LHRL - load halfword relative long */
4813 case 0xc4d: /* LRL - load relative long */
4814 /* 32-bit or native gpr destination */
4815 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4816 return -1;
4817 break;
4818
4819 case 0xc01: /* LGFI - load immediate */
4820 case 0xc0e: /* LLIHF - load logical immediate */
4821 case 0xc0f: /* LLILF - load logical immediate */
4822 case 0xc20: /* MSGFI - multiply single immediate */
4823 case 0xc44: /* LGHRL - load halfword relative long */
4824 case 0xc46: /* LLGHRL - load logical halfword relative long */
4825 case 0xc48: /* LGRL - load relative long */
4826 case 0xc4c: /* LGFRL - load relative long */
4827 case 0xc4e: /* LLGFRL - load logical relative long */
4828 /* 64-bit gpr destination */
4829 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4830 return -1;
4831 break;
4832
4833 /* 0xc02-0xc03 undefined */
4834
4835 case 0xc04: /* BRCL - branch relative on condition long */
4836 case 0xc62: /* PFDRL - prefetch data relative long */
4837 break;
4838
4839 case 0xc06: /* XIHF - xor immediate */
4840 case 0xc0a: /* NIHF - and immediate */
4841 case 0xc0c: /* OIHF - or immediate */
4842 case 0xcc8: /* AIH - add immediate high */
4843 case 0xcca: /* ALSIH - add logical with signed immediate high */
4844 /* 32-bit high gpr destination + flags */
4845 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4846 return -1;
4847 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4848 return -1;
4849 break;
4850
4851 case 0xc07: /* XILF - xor immediate */
4852 case 0xc0b: /* NILF - and immediate */
4853 case 0xc0d: /* OILF - or immediate */
4854 case 0xc25: /* SLFI - subtract logical immediate */
4855 case 0xc29: /* AFI - add immediate */
4856 case 0xc2b: /* ALFI - add logical immediate */
4857 /* 32-bit gpr destination + flags */
4858 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4859 return -1;
4860 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4861 return -1;
4862 break;
4863
4864 case 0xc08: /* IIHF - insert immediate */
4865 case 0xcc6: /* BRCTH - branch relative on count high */
4866 case 0xccb: /* ALSIHN - add logical with signed immediate high */
4867 /* 32-bit high gpr destination */
4868 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4869 return -1;
4870 break;
4871
4872 /* 0xc22-0xc23 undefined */
4873
4874 case 0xc24: /* SLGFI - subtract logical immediate */
4875 case 0xc28: /* AGFI - add immediate */
4876 case 0xc2a: /* ALGFI - add logical immediate */
4877 /* 64-bit gpr destination + flags */
4878 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4879 return -1;
4880 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4881 return -1;
4882 break;
4883
4884 /* 0xc26-0xc27 undefined */
4885
4886 case 0xc2c: /* CGFI - compare immediate */
4887 case 0xc2d: /* CFI - compare immediate */
4888 case 0xc2e: /* CLGFI - compare logical immediate */
4889 case 0xc2f: /* CLFI - compare logical immediate */
4890 case 0xc64: /* CGHRL - compare halfword relative long */
4891 case 0xc65: /* CHRL - compare halfword relative long */
4892 case 0xc66: /* CLGHRL - compare logical halfword relative long */
4893 case 0xc67: /* CLHRL - compare logical halfword relative long */
4894 case 0xc68: /* CGRL - compare relative long */
4895 case 0xc6a: /* CLGRL - compare logical relative long */
4896 case 0xc6c: /* CGFRL - compare relative long */
4897 case 0xc6d: /* CRL - compare relative long */
4898 case 0xc6e: /* CLGFRL - compare logical relative long */
4899 case 0xc6f: /* CLRL - compare logical relative long */
4900 case 0xccd: /* CIH - compare immediate high */
4901 case 0xccf: /* CLIH - compare logical immediate high */
4902 /* flags only */
4903 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4904 return -1;
4905 break;
4906
4907 /* 0xc40-0xc41 undefined */
4908 /* 0xc43 undefined */
4909
4910 case 0xc47: /* STHRL - store halfword relative long */
4911 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4912 if (record_full_arch_list_add_mem (oaddr, 2))
4913 return -1;
4914 break;
4915
4916 /* 0xc49-0xc4a undefined */
4917
4918 case 0xc4b: /* STGRL - store relative long */
4919 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4920 if (record_full_arch_list_add_mem (oaddr, 8))
4921 return -1;
4922 break;
4923
4924 case 0xc4f: /* STRL - store relative long */
4925 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4926 if (record_full_arch_list_add_mem (oaddr, 4))
4927 return -1;
4928 break;
4929
4930 case 0xc60: /* EXRL - execute relative long */
4931 if (ex != -1)
4932 {
4933 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
4934 paddress (gdbarch, addr));
4935 return -1;
4936 }
4937 addr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4938 if (inib[2])
4939 {
4940 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4941 ex = tmp & 0xff;
4942 }
4943 else
4944 {
4945 ex = 0;
4946 }
4947 goto ex;
4948
4949 /* 0xc61 undefined */
4950 /* 0xc63 undefined */
4951 /* 0xc69 undefined */
4952 /* 0xc6b undefined */
4953 /* 0xcc0-0xcc5 undefined */
4954 /* 0xcc7 undefined */
4955 /* 0xcc9 undefined */
4956 /* 0xccc undefined */
4957 /* 0xcce undefined */
4958
4959 default:
4960 goto UNKNOWN_OP;
4961 }
4962 break;
4963
4964 /* 0xc1 undefined */
4965 /* 0xc3 undefined */
4966
4967 case 0xc5: /* BPRP - branch prediction relative preload */
4968 case 0xc7: /* BPP - branch prediction preload */
4969 /* no visible effect */
4970 break;
4971
4972 case 0xc8:
4973 /* SSF-format instruction */
4974 switch (ibyte[0] << 4 | inib[3])
4975 {
4976 /* 0xc80 unsupported */
4977
4978 case 0xc81: /* ECTG - extract cpu time */
4979 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4980 return -1;
4981 if (s390_record_gpr_g (gdbarch, regcache, 0))
4982 return -1;
4983 if (s390_record_gpr_g (gdbarch, regcache, 1))
4984 return -1;
4985 break;
4986
4987 case 0xc82: /* CSST - compare and swap and store */
4988 {
4989 uint8_t fc, sc;
4990 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4991 fc = tmp & 0xff;
4992 sc = tmp >> 8 & 0xff;
4993
4994 /* First and third operands. */
4995 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4996 switch (fc)
4997 {
4998 case 0x00: /* 32-bit */
4999 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5000 return -1;
5001 if (record_full_arch_list_add_mem (oaddr, 4))
5002 return -1;
5003 break;
5004
5005 case 0x01: /* 64-bit */
5006 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5007 return -1;
5008 if (record_full_arch_list_add_mem (oaddr, 8))
5009 return -1;
5010 break;
5011
5012 case 0x02: /* 128-bit */
5013 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5014 return -1;
5015 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5016 return -1;
5017 if (record_full_arch_list_add_mem (oaddr, 16))
5018 return -1;
5019 break;
5020
5021 default:
5022 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5023 fc, paddress (gdbarch, addr));
5024 return -1;
5025 }
5026
5027 /* Second operand. */
5028 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
5029 if (sc > 4)
5030 {
5031 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5032 sc, paddress (gdbarch, addr));
5033 return -1;
5034 }
5035
5036 if (record_full_arch_list_add_mem (oaddr2, 1 << sc))
5037 return -1;
5038
5039 /* Flags. */
5040 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5041 return -1;
5042 }
5043 break;
5044
5045 /* 0xc83 undefined */
5046
5047 case 0xc84: /* LPD - load pair disjoint */
5048 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5049 return -1;
5050 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5051 return -1;
5052 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5053 return -1;
5054 break;
5055
5056 case 0xc85: /* LPDG - load pair disjoint */
5057 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5058 return -1;
5059 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5060 return -1;
5061 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5062 return -1;
5063 break;
5064
5065 /* 0xc86-0xc8f undefined */
5066
5067 default:
5068 goto UNKNOWN_OP;
5069 }
5070 break;
5071
5072 /* 0xc9-0xcb undefined */
5073 /* 0xcd-0xcf undefined */
5074
5075 case 0xd0: /* TRTR - translate and test reversed */
5076 case 0xdd: /* TRT - translate and test */
5077 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5078 return -1;
5079 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
5080 return -1;
5081 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5082 return -1;
5083 break;
5084
5085 case 0xd1: /* MVN - move numbers */
5086 case 0xd2: /* MVC - move */
5087 case 0xd3: /* MVZ - move zones */
5088 case 0xdc: /* TR - translate */
5089 case 0xe8: /* MVCIN - move inverse */
5090 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5091 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5092 return -1;
5093 break;
5094
5095 case 0xd4: /* NC - and */
5096 case 0xd6: /* OC - or*/
5097 case 0xd7: /* XC - xor */
5098 case 0xe2: /* UNPKU - unpack unicode */
5099 case 0xea: /* UNPKA - unpack ASCII */
5100 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5101 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5102 return -1;
5103 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5104 return -1;
5105 break;
5106
5107 case 0xde: /* ED - edit */
5108 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5109 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5110 return -1;
5111 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5112 return -1;
5113 /* DXC may be written */
5114 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5115 return -1;
5116 break;
5117
5118 case 0xdf: /* EDMK - edit and mark */
5119 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5120 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5121 return -1;
5122 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5123 return -1;
5124 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5125 return -1;
5126 /* DXC may be written */
5127 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5128 return -1;
5129 break;
5130
5131 /* 0xd8 undefined */
5132 /* 0xd9 unsupported: MVCK - move with key */
5133 /* 0xda unsupported: MVCP - move to primary */
5134 /* 0xdb unsupported: MVCS - move to secondary */
5135 /* 0xe0 undefined */
5136
5137 case 0xe1: /* PKU - pack unicode */
5138 case 0xe9: /* PKA - pack ASCII */
5139 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5140 if (record_full_arch_list_add_mem (oaddr, 16))
5141 return -1;
5142 break;
5143
5144 case 0xe3:
5145 case 0xe6:
5146 case 0xe7:
5147 case 0xeb:
5148 case 0xed:
5149 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
5150 switch (ibyte[0] << 8 | ibyte[5])
5151 {
5152 /* 0xe300-0xe301 undefined */
5153
5154 case 0xe302: /* LTG - load and test */
5155 case 0xe308: /* AG - add */
5156 case 0xe309: /* SG - subtract */
5157 case 0xe30a: /* ALG - add logical */
5158 case 0xe30b: /* SLG - subtract logical */
5159 case 0xe318: /* AGF - add */
5160 case 0xe319: /* SGF - subtract */
5161 case 0xe31a: /* ALGF - add logical */
5162 case 0xe31b: /* SLGF - subtract logical */
5163 case 0xe332: /* LTGF - load and test */
5164 case 0xe380: /* NG - and */
5165 case 0xe381: /* OG - or */
5166 case 0xe382: /* XG - xor */
5167 case 0xe388: /* ALCG - add logical with carry */
5168 case 0xe389: /* SLBG - subtract logical with borrow */
5169 case 0xeb0a: /* SRAG - shift right single */
5170 case 0xeb0b: /* SLAG - shift left single */
5171 /* 64-bit gpr destination + flags */
5172 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5173 return -1;
5174 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5175 return -1;
5176 break;
5177
5178 /* 0xe303 privileged */
5179
5180 case 0xe304: /* LG - load */
5181 case 0xe30c: /* MSG - multiply single */
5182 case 0xe30f: /* LRVG - load reversed */
5183 case 0xe314: /* LGF - load */
5184 case 0xe315: /* LGH - load halfword */
5185 case 0xe316: /* LLGF - load logical */
5186 case 0xe317: /* LLGT - load logical thirty one bits */
5187 case 0xe31c: /* MSGF - multiply single */
5188 case 0xe32a: /* LZRG - load and zero rightmost byte */
5189 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
5190 case 0xe33c: /* MGH - multiply halfword 64x16mem -> 64 */
5191 case 0xe346: /* BCTG - branch on count */
5192 case 0xe377: /* LGB - load byte */
5193 case 0xe390: /* LLGC - load logical character */
5194 case 0xe391: /* LLGH - load logical halfword */
5195 case 0xeb0c: /* SRLG - shift right single logical */
5196 case 0xeb0d: /* SLLG - shift left single logical */
5197 case 0xeb1c: /* RLLG - rotate left single logical */
5198 case 0xeb44: /* BXHG - branch on index high */
5199 case 0xeb45: /* BXLEG - branch on index low or equal */
5200 case 0xeb4c: /* ECAG - extract cpu attribute */
5201 case 0xebe2: /* LOCG - load on condition */
5202 /* 64-bit gpr destination */
5203 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5204 return -1;
5205 break;
5206
5207 /* 0xe305 undefined */
5208
5209 case 0xe306: /* CVBY - convert to binary */
5210 /* 32-bit or native gpr destination + FPC (DXC write) */
5211 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5212 return -1;
5213 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5214 return -1;
5215 break;
5216
5217 /* 0xe307 undefined */
5218
5219 case 0xe30d: /* DSG - divide single */
5220 case 0xe31d: /* DSGF - divide single */
5221 case 0xe384: /* MG - multiply 64x64mem -> 128 */
5222 case 0xe386: /* MLG - multiply logical */
5223 case 0xe387: /* DLG - divide logical */
5224 case 0xe38f: /* LPQ - load pair from quadword */
5225 /* 64-bit gpr pair destination */
5226 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5227 return -1;
5228 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5229 return -1;
5230 break;
5231
5232 case 0xe30e: /* CVBG - convert to binary */
5233 /* 64-bit gpr destination + FPC (DXC write) */
5234 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5235 return -1;
5236 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5237 return -1;
5238 break;
5239
5240 /* 0xe310-0xe311 undefined */
5241
5242 case 0xe312: /* LT - load and test */
5243 case 0xe338: /* AGH - add halfword to 64 bit value */
5244 case 0xe339: /* SGH - subtract halfword from 64 bit value */
5245 case 0xe353: /* MSC - multiply single 32x32mem -> 32 */
5246 case 0xe354: /* NY - and */
5247 case 0xe356: /* OY - or */
5248 case 0xe357: /* XY - xor */
5249 case 0xe35a: /* AY - add */
5250 case 0xe35b: /* SY - subtract */
5251 case 0xe35e: /* ALY - add logical */
5252 case 0xe35f: /* SLY - subtract logical */
5253 case 0xe37a: /* AHY - add halfword */
5254 case 0xe37b: /* SHY - subtract halfword */
5255 case 0xe383: /* MSGC - multiply single 64x64mem -> 64 */
5256 case 0xe398: /* ALC - add logical with carry */
5257 case 0xe399: /* SLB - subtract logical with borrow */
5258 case 0xe727: /* LCBB - load count to block bounduary */
5259 case 0xeb81: /* ICMY - insert characters under mask */
5260 case 0xebdc: /* SRAK - shift left single */
5261 case 0xebdd: /* SLAK - shift left single */
5262 /* 32/64-bit gpr destination + flags */
5263 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5264 return -1;
5265 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5266 return -1;
5267 break;
5268
5269 /* 0xe313 privileged */
5270
5271 case 0xe31e: /* LRV - load reversed */
5272 case 0xe31f: /* LRVH - load reversed */
5273 case 0xe33b: /* LZRF - load and zero rightmost byte */
5274 case 0xe351: /* MSY - multiply single */
5275 case 0xe358: /* LY - load */
5276 case 0xe371: /* LAY - load address */
5277 case 0xe373: /* ICY - insert character */
5278 case 0xe376: /* LB - load byte */
5279 case 0xe378: /* LHY - load */
5280 case 0xe37c: /* MHY - multiply halfword */
5281 case 0xe394: /* LLC - load logical character */
5282 case 0xe395: /* LLH - load logical halfword */
5283 case 0xeb1d: /* RLL - rotate left single logical */
5284 case 0xebde: /* SRLK - shift left single logical */
5285 case 0xebdf: /* SLLK - shift left single logical */
5286 case 0xebf2: /* LOC - load on condition */
5287 /* 32-bit or native gpr destination */
5288 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5289 return -1;
5290 break;
5291
5292 case 0xe320: /* CG - compare */
5293 case 0xe321: /* CLG - compare logical */
5294 case 0xe330: /* CGF - compare */
5295 case 0xe331: /* CLGF - compare logical */
5296 case 0xe334: /* CGH - compare halfword */
5297 case 0xe355: /* CLY - compare logical */
5298 case 0xe359: /* CY - compare */
5299 case 0xe379: /* CHY - compare halfword */
5300 case 0xe3cd: /* CHF - compare high */
5301 case 0xe3cf: /* CLHF - compare logical high */
5302 case 0xeb20: /* CLMH - compare logical under mask high */
5303 case 0xeb21: /* CLMY - compare logical under mask */
5304 case 0xeb51: /* TMY - test under mask */
5305 case 0xeb55: /* CLIY - compare logical */
5306 case 0xebc0: /* TP - test decimal */
5307 case 0xed10: /* TCEB - test data class */
5308 case 0xed11: /* TCDB - test data class */
5309 case 0xed12: /* TCXB - test data class */
5310 case 0xed50: /* TDCET - test data class */
5311 case 0xed51: /* TDGET - test data group */
5312 case 0xed54: /* TDCDT - test data class */
5313 case 0xed55: /* TDGDT - test data group */
5314 case 0xed58: /* TDCXT - test data class */
5315 case 0xed59: /* TDGXT - test data group */
5316 /* flags only */
5317 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5318 return -1;
5319 break;
5320
5321 /* 0xe322-0xe323 undefined */
5322
5323 case 0xe324: /* STG - store */
5324 case 0xe325: /* NTSTG - nontransactional store */
5325 case 0xe326: /* CVDY - convert to decimal */
5326 case 0xe32f: /* STRVG - store reversed */
5327 case 0xebe3: /* STOCG - store on condition */
5328 case 0xed67: /* STDY - store */
5329 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5330 if (record_full_arch_list_add_mem (oaddr, 8))
5331 return -1;
5332 break;
5333
5334 /* 0xe327-0xe329 undefined */
5335 /* 0xe32b-0xe32d undefined */
5336
5337 case 0xe32e: /* CVDG - convert to decimal */
5338 case 0xe38e: /* STPQ - store pair to quadword */
5339 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5340 if (record_full_arch_list_add_mem (oaddr, 16))
5341 return -1;
5342 break;
5343
5344 /* 0xe333 undefined */
5345 /* 0xe335 undefined */
5346
5347 case 0xe336: /* PFD - prefetch data */
5348 break;
5349
5350 /* 0xe337 undefined */
5351 /* 0xe33c-0xe33d undefined */
5352
5353 case 0xe33e: /* STRV - store reversed */
5354 case 0xe350: /* STY - store */
5355 case 0xe3cb: /* STFH - store high */
5356 case 0xebe1: /* STOCFH - store high on condition */
5357 case 0xebf3: /* STOC - store on condition */
5358 case 0xed66: /* STEY - store */
5359 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5360 if (record_full_arch_list_add_mem (oaddr, 4))
5361 return -1;
5362 break;
5363
5364 case 0xe33f: /* STRVH - store reversed */
5365 case 0xe370: /* STHY - store halfword */
5366 case 0xe3c7: /* STHH - store halfword high */
5367 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5368 if (record_full_arch_list_add_mem (oaddr, 2))
5369 return -1;
5370 break;
5371
5372 /* 0xe340-0xe345 undefined */
5373
5374 case 0xe347: /* BIC - branch indirect on condition */
5375 break;
5376
5377 /* 0xe348-0xe34f undefined */
5378 /* 0xe352 undefined */
5379
5380 case 0xe35c: /* MFY - multiply */
5381 case 0xe396: /* ML - multiply logical */
5382 case 0xe397: /* DL - divide logical */
5383 /* 32-bit gpr pair destination */
5384 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5385 return -1;
5386 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5387 return -1;
5388 break;
5389
5390 /* 0xe35d undefined */
5391 /* 0xe360-0xe36f undefined */
5392
5393 case 0xe372: /* STCY - store character */
5394 case 0xe3c3: /* STCH - store character high */
5395 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5396 if (record_full_arch_list_add_mem (oaddr, 1))
5397 return -1;
5398 break;
5399
5400 /* 0xe374 undefined */
5401
5402 case 0xe375: /* LAEY - load address extended */
5403 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5404 return -1;
5405 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
5406 return -1;
5407 break;
5408
5409 /* 0xe37d-0xe37f undefined */
5410
5411 case 0xe385: /* LGAT - load and trap */
5412 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
5413 case 0xe39d: /* LLGFAT - load logical and trap */
5414 case 0xe650: /* VCVB - vector convert to binary 32 bit*/
5415 case 0xe652: /* VCVBG - vector convert to binary 64 bit*/
5416 case 0xe721: /* VLGV - vector load gr from vr element */
5417 /* 64-bit gpr destination + fpc for possible DXC write */
5418 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5419 return -1;
5420 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5421 return -1;
5422 break;
5423
5424 /* 0xe38a-0xe38d undefined */
5425 /* 0xe392-0xe393 undefined */
5426 /* 0xe39a-0xe39b undefined */
5427 /* 0xe39e undefined */
5428
5429 case 0xe39f: /* LAT - load and trap */
5430 /* 32-bit gpr destination + fpc for possible DXC write */
5431 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5432 return -1;
5433 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5434 return -1;
5435 break;
5436
5437 /* 0xe3a0-0xe3bf undefined */
5438
5439 case 0xe3c0: /* LBH - load byte high */
5440 case 0xe3c2: /* LLCH - load logical character high */
5441 case 0xe3c4: /* LHH - load halfword high */
5442 case 0xe3c6: /* LLHH - load logical halfword high */
5443 case 0xe3ca: /* LFH - load high */
5444 case 0xebe0: /* LOCFH - load high on condition */
5445 /* 32-bit high gpr destination */
5446 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5447 return -1;
5448 break;
5449
5450 /* 0xe3c1 undefined */
5451 /* 0xe3c5 undefined */
5452
5453 case 0xe3c8: /* LFHAT - load high and trap */
5454 /* 32-bit high gpr destination + fpc for possible DXC write */
5455 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5456 return -1;
5457 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5458 return -1;
5459 break;
5460
5461 /* 0xe3c9 undefined */
5462 /* 0xe3cc undefined */
5463 /* 0xe3ce undefined */
5464 /* 0xe3d0-0xe3ff undefined */
5465
5466 case 0xe634: /* VPKZ - vector pack zoned */
5467 case 0xe635: /* VLRL - vector load rightmost with immed. length */
5468 case 0xe637: /* VLRLR - vector load rightmost with length */
5469 case 0xe649: /* VLIP - vector load immediate decimal */
5470 case 0xe700: /* VLEB - vector load element */
5471 case 0xe701: /* VLEH - vector load element */
5472 case 0xe702: /* VLEG - vector load element */
5473 case 0xe703: /* VLEF - vector load element */
5474 case 0xe704: /* VLLEZ - vector load logical element and zero */
5475 case 0xe705: /* VLREP - vector load and replicate */
5476 case 0xe706: /* VL - vector load */
5477 case 0xe707: /* VLBB - vector load to block bounduary */
5478 case 0xe712: /* VGEG - vector gather element */
5479 case 0xe713: /* VGEF - vector gather element */
5480 case 0xe722: /* VLVG - vector load vr element from gr */
5481 case 0xe730: /* VESL - vector element shift left */
5482 case 0xe733: /* VERLL - vector element rotate left logical */
5483 case 0xe737: /* VLL - vector load with length */
5484 case 0xe738: /* VESRL - vector element shift right logical */
5485 case 0xe73a: /* VESRA - vector element shift right arithmetic */
5486 case 0xe740: /* VLEIB - vector load element immediate */
5487 case 0xe741: /* VLEIH - vector load element immediate */
5488 case 0xe742: /* VLEIG - vector load element immediate */
5489 case 0xe743: /* VLEIF - vector load element immediate */
5490 case 0xe744: /* VGBM - vector generate byte mask */
5491 case 0xe745: /* VREPI - vector replicate immediate */
5492 case 0xe746: /* VGM - vector generate mask */
5493 case 0xe74d: /* VREP - vector replicate */
5494 case 0xe750: /* VPOPCT - vector population count */
5495 case 0xe752: /* VCTZ - vector count trailing zeros */
5496 case 0xe753: /* VCLZ - vector count leading zeros */
5497 case 0xe756: /* VLR - vector load */
5498 case 0xe75f: /* VSEG -vector sign extend to doubleword */
5499 case 0xe760: /* VMRL - vector merge low */
5500 case 0xe761: /* VMRH - vector merge high */
5501 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
5502 case 0xe764: /* VSUM - vector sum across word */
5503 case 0xe765: /* VSUMG - vector sum across doubleword */
5504 case 0xe766: /* VCKSM - vector checksum */
5505 case 0xe767: /* VSUMQ - vector sum across quadword */
5506 case 0xe768: /* VN - vector and */
5507 case 0xe769: /* VNC - vector and with complement */
5508 case 0xe76a: /* VO - vector or */
5509 case 0xe76b: /* VNO - vector nor */
5510 case 0xe76c: /* VNX - vector not exclusive or */
5511 case 0xe76d: /* VX - vector xor */
5512 case 0xe76e: /* VNN - vector nand */
5513 case 0xe76f: /* VOC - vector or with complement */
5514 case 0xe770: /* VESLV - vector element shift left */
5515 case 0xe772: /* VERIM - vector element rotate and insert under mask */
5516 case 0xe773: /* VERLLV - vector element rotate left logical */
5517 case 0xe774: /* VSL - vector shift left */
5518 case 0xe775: /* VSLB - vector shift left by byte */
5519 case 0xe777: /* VSLDB - vector shift left double by byte */
5520 case 0xe778: /* VESRLV - vector element shift right logical */
5521 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
5522 case 0xe77c: /* VSRL - vector shift right logical */
5523 case 0xe77d: /* VSRLB - vector shift right logical by byte */
5524 case 0xe77e: /* VSRA - vector shift right arithmetic */
5525 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
5526 case 0xe784: /* VPDI - vector permute doubleword immediate */
5527 case 0xe785: /* VBPERM - vector bit permute */
5528 case 0xe78c: /* VPERM - vector permute */
5529 case 0xe78d: /* VSEL - vector select */
5530 case 0xe78e: /* VFMS - vector fp multiply and subtract */
5531 case 0xe78f: /* VFMA - vector fp multiply and add */
5532 case 0xe794: /* VPK - vector pack */
5533 case 0xe79e: /* VFNMS - vector fp negative multiply and subtract */
5534 case 0xe79f: /* VFNMA - vector fp negative multiply and add */
5535 case 0xe7a1: /* VMLH - vector multiply logical high */
5536 case 0xe7a2: /* VML - vector multiply low */
5537 case 0xe7a3: /* VMH - vector multiply high */
5538 case 0xe7a4: /* VMLE - vector multiply logical even */
5539 case 0xe7a5: /* VMLO - vector multiply logical odd */
5540 case 0xe7a6: /* VME - vector multiply even */
5541 case 0xe7a7: /* VMO - vector multiply odd */
5542 case 0xe7a9: /* VMALH - vector multiply and add logical high */
5543 case 0xe7aa: /* VMAL - vector multiply and add low */
5544 case 0xe7ab: /* VMAH - vector multiply and add high */
5545 case 0xe7ac: /* VMALE - vector multiply and add logical even */
5546 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
5547 case 0xe7ae: /* VMAE - vector multiply and add even */
5548 case 0xe7af: /* VMAO - vector multiply and add odd */
5549 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
5550 case 0xe7b8: /* VMSL - vector multiply sum logical */
5551 case 0xe7b9: /* VACCC - vector add with carry compute carry */
5552 case 0xe7bb: /* VAC - vector add with carry */
5553 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
5554 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
5555 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
5556 case 0xe7c0: /* VCLGD - vector convert to logical 64-bit */
5557 case 0xe7c1: /* VCDLG - vector convert from logical 64-bit */
5558 case 0xe7c2: /* VCGD - vector convert to fixed 64-bit */
5559 case 0xe7c3: /* VCDG - vector convert from fixed 64-bit */
5560 case 0xe7c4: /* VLDE/VFLL - vector fp load lengthened */
5561 case 0xe7c5: /* VLED/VFLR - vector fp load rounded */
5562 case 0xe7c7: /* VFI - vector load fp integer */
5563 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
5564 case 0xe7ce: /* VFSQ - vector fp square root */
5565 case 0xe7d4: /* VUPLL - vector unpack logical low */
5566 case 0xe7d6: /* VUPL - vector unpack low */
5567 case 0xe7d5: /* VUPLH - vector unpack logical high */
5568 case 0xe7d7: /* VUPH - vector unpack high */
5569 case 0xe7de: /* VLC - vector load complement */
5570 case 0xe7df: /* VLP - vector load positive */
5571 case 0xe7e2: /* VFA - vector fp subtract */
5572 case 0xe7e3: /* VFA - vector fp add */
5573 case 0xe7e5: /* VFD - vector fp divide */
5574 case 0xe7e7: /* VFM - vector fp multiply */
5575 case 0xe7ee: /* VFMIN - vector fp minimum */
5576 case 0xe7ef: /* VFMAX - vector fp maximum */
5577 case 0xe7f0: /* VAVGL - vector average logical */
5578 case 0xe7f1: /* VACC - vector add and compute carry */
5579 case 0xe7f2: /* VAVG - vector average */
5580 case 0xe7f3: /* VA - vector add */
5581 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
5582 case 0xe7f7: /* VS - vector subtract */
5583 case 0xe7fc: /* VMNL - vector minimum logical */
5584 case 0xe7fd: /* VMXL - vector maximum logical */
5585 case 0xe7fe: /* VMN - vector minimum */
5586 case 0xe7ff: /* VMX - vector maximum */
5587 /* vector destination + FPC */
5588 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5589 return -1;
5590 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5591 return -1;
5592 break;
5593
5594 case 0xe63d: /* VSTRL - vector store rightmost with immed. length */
5595 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5596 if (record_full_arch_list_add_mem (oaddr, inib[3] + 1))
5597 return -1;
5598 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5599 return -1;
5600 break;
5601
5602 case 0xe708: /* VSTEB - vector store element */
5603 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5604 if (record_full_arch_list_add_mem (oaddr, 1))
5605 return -1;
5606 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5607 return -1;
5608 break;
5609
5610 case 0xe709: /* VSTEH - vector store element */
5611 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5612 if (record_full_arch_list_add_mem (oaddr, 2))
5613 return -1;
5614 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5615 return -1;
5616 break;
5617
5618 case 0xe70a: /* VSTEG - vector store element */
5619 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5620 if (record_full_arch_list_add_mem (oaddr, 8))
5621 return -1;
5622 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5623 return -1;
5624 break;
5625
5626 case 0xe70b: /* VSTEF - vector store element */
5627 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5628 if (record_full_arch_list_add_mem (oaddr, 4))
5629 return -1;
5630 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5631 return -1;
5632 break;
5633
5634 /* 0xe70c-0xe70d undefined */
5635
5636 case 0xe70e: /* VST - vector store */
5637 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5638 if (record_full_arch_list_add_mem (oaddr, 16))
5639 return -1;
5640 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5641 return -1;
5642 break;
5643
5644 /* 0xe70f-0xe711 undefined */
5645 /* 0xe714-0xe719 undefined */
5646
5647 case 0xe71a: /* VSCEG - vector scatter element */
5648 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 8, insn[1], 0, &oaddr))
5649 return -1;
5650 if (record_full_arch_list_add_mem (oaddr, 8))
5651 return -1;
5652 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5653 return -1;
5654 break;
5655
5656 case 0xe71b: /* VSCEF - vector scatter element */
5657 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 4, insn[1], 0, &oaddr))
5658 return -1;
5659 if (record_full_arch_list_add_mem (oaddr, 4))
5660 return -1;
5661 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5662 return -1;
5663 break;
5664
5665 /* 0xe71c-0xe720 undefined */
5666 /* 0xe723-0xe726 undefined */
5667 /* 0xe728-0xe72f undefined */
5668 /* 0xe731-0xe732 undefined */
5669 /* 0xe734-0xe735 undefined */
5670
5671 case 0xe736: /* VLM - vector load multiple */
5672 for (i = ivec[0]; i != ivec[1]; i++, i &= 0x1f)
5673 if (s390_record_vr (gdbarch, regcache, i))
5674 return -1;
5675 if (s390_record_vr (gdbarch, regcache, ivec[1]))
5676 return -1;
5677 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5678 return -1;
5679 break;
5680
5681 /* 0xe739 undefined */
5682 /* 0xe73b-0xe73d undefined */
5683
5684 case 0xe73e: /* VSTM - vector store multiple */
5685 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5686 if (ivec[0] <= ivec[1])
5687 n = ivec[1] - ivec[0] + 1;
5688 else
5689 n = ivec[1] + 0x20 - ivec[0] + 1;
5690 if (record_full_arch_list_add_mem (oaddr, n * 16))
5691 return -1;
5692 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5693 return -1;
5694 break;
5695
5696 case 0xe63c: /* VUPKZ - vector unpack zoned */
5697 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5698 if (record_full_arch_list_add_mem (oaddr, (ibyte[1] + 1) & 31))
5699 return -1;
5700 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5701 return -1;
5702 break;
5703
5704 case 0xe63f: /* VSTRLR - vector store rightmost with length */
5705 case 0xe73f: /* VSTL - vector store with length */
5706 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5707 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[3], &tmp);
5708 tmp &= 0xffffffffu;
5709 if (tmp > 15)
5710 tmp = 15;
5711 if (record_full_arch_list_add_mem (oaddr, tmp + 1))
5712 return -1;
5713 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5714 return -1;
5715 break;
5716
5717 /* 0xe747-0xe749 undefined */
5718
5719 case 0xe658: /* VCVD - vector convert to decimal 32 bit */
5720 case 0xe659: /* VSRP - vector shift and round decimal */
5721 case 0xe65a: /* VCVDG - vector convert to decimal 64 bit*/
5722 case 0xe65b: /* VPSOP - vector perform sign operation decimal */
5723 case 0xe671: /* VAP - vector add decimal */
5724 case 0xe673: /* VSP - vector subtract decimal */
5725 case 0xe678: /* VMP - vector multiply decimal */
5726 case 0xe679: /* VMSP - vector multiply decimal */
5727 case 0xe67a: /* VDP - vector divide decimal */
5728 case 0xe67b: /* VRP - vector remainder decimal */
5729 case 0xe67e: /* VSDP - vector shift and divide decimal */
5730 case 0xe74a: /* VFTCI - vector fp test data class immediate */
5731 case 0xe75c: /* VISTR - vector isolate string */
5732 case 0xe780: /* VFEE - vector find element equal */
5733 case 0xe781: /* VFENE - vector find element not equal */
5734 case 0xe782: /* VFA - vector find any element equal */
5735 case 0xe78a: /* VSTRC - vector string range compare */
5736 case 0xe795: /* VPKLS - vector pack logical saturate */
5737 case 0xe797: /* VPKS - vector pack saturate */
5738 case 0xe7e8: /* VFCE - vector fp compare equal */
5739 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
5740 case 0xe7eb: /* VFCH - vector fp compare high */
5741 case 0xe7f8: /* VCEQ - vector compare equal */
5742 case 0xe7f9: /* VCHL - vector compare high logical */
5743 case 0xe7fb: /* VCH - vector compare high */
5744 /* vector destination + flags + FPC */
5745 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5746 return -1;
5747 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5748 return -1;
5749 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5750 return -1;
5751 break;
5752
5753 case 0xe65f: /* VTP - vector test decimal */
5754 /* flags + FPC */
5755 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5756 return -1;
5757 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5758 return -1;
5759 break;
5760
5761 /* 0xe74b-0xe74c undefined */
5762 /* 0xe74e-0xe74f undefined */
5763 /* 0xe751 undefined */
5764 /* 0xe754-0xe755 undefined */
5765 /* 0xe757-0xe75b undefined */
5766 /* 0xe75d-0xe75e undefined */
5767 /* 0xe763 undefined */
5768 /* 0xe771 undefined */
5769 /* 0xe776 undefined */
5770 /* 0xe779 undefined */
5771 /* 0xe77b undefined */
5772 /* 0xe783 undefined */
5773 /* 0xe786-0xe789 undefined */
5774 /* 0xe78b undefined */
5775 /* 0xe790-0xe793 undefined */
5776 /* 0xe796 undefined */
5777 /* 0xe798-0xe79d undefined */
5778 /* 0xe7a0 undefined */
5779 /* 0xe7a8 undefined */
5780 /* 0xe7b0-0xe7b3 undefined */
5781 /* 0xe7b5-0xe7b7 undefined */
5782 /* 0xe7ba undefined */
5783 /* 0xe7be undefined */
5784 /* 0xe7c6 undefined */
5785 /* 0xe7c8-0xe7c9 undefined */
5786
5787 case 0xe677: /* VCP - vector compare decimal */
5788 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
5789 case 0xe7cb: /* WFC - vector fp compare scalar */
5790 case 0xe7d8: /* VTM - vector test under mask */
5791 case 0xe7d9: /* VECL - vector element compare logical */
5792 case 0xe7db: /* VEC - vector element compare */
5793 case 0xed08: /* KEB - compare and signal */
5794 case 0xed09: /* CEB - compare */
5795 case 0xed18: /* KDB - compare and signal */
5796 case 0xed19: /* CDB - compare */
5797 /* flags + fpc only */
5798 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5799 return -1;
5800 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5801 return -1;
5802 break;
5803
5804 /* 0xe7cd undefined */
5805 /* 0xe7cf-0xe7d3 undefined */
5806 /* 0xe7da undefined */
5807 /* 0xe7dc-0xe7dd undefined */
5808 /* 0xe7e0-0xe7e1 undefined */
5809 /* 0xe7e4 undefined */
5810 /* 0xe7e6 undefined */
5811 /* 0xe7e9 undefined */
5812 /* 0xe7ec-0xe7ed undefined */
5813 /* 0xe7f4 undefined */
5814 /* 0xe7f6 undefined */
5815 /* 0xe7fa undefined */
5816
5817 /* 0xeb00-0xeb03 undefined */
5818
5819 case 0xeb04: /* LMG - load multiple */
5820 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
5821 if (s390_record_gpr_g (gdbarch, regcache, i))
5822 return -1;
5823 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
5824 return -1;
5825 break;
5826
5827 /* 0xeb05-0xeb09 undefined */
5828 /* 0xeb0e undefined */
5829 /* 0xeb0f privileged: TRACG */
5830 /* 0xeb10-0xeb13 undefined */
5831
5832 case 0xeb14: /* CSY - compare and swap */
5833 case 0xebf4: /* LAN - load and and */
5834 case 0xebf6: /* LAO - load and or */
5835 case 0xebf7: /* LAX - load and xor */
5836 case 0xebf8: /* LAA - load and add */
5837 case 0xebfa: /* LAAL - load and add logical */
5838 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5839 if (record_full_arch_list_add_mem (oaddr, 4))
5840 return -1;
5841 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5842 return -1;
5843 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5844 return -1;
5845 break;
5846
5847 /* 0xeb15-0xeb1b undefined */
5848 /* 0xeb1e-0xeb1f undefined */
5849 /* 0xeb22 undefined */
5850
5851 case 0xeb23: /* CLT - compare logical and trap */
5852 case 0xeb2b: /* CLGT - compare logical and trap */
5853 /* fpc only - including possible DXC write for trapping insns */
5854 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5855 return -1;
5856 break;
5857
5858 case 0xeb24: /* STMG - store multiple */
5859 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5860 if (inib[2] <= inib[3])
5861 n = inib[3] - inib[2] + 1;
5862 else
5863 n = inib[3] + 0x10 - inib[2] + 1;
5864 if (record_full_arch_list_add_mem (oaddr, n * 8))
5865 return -1;
5866 break;
5867
5868 /* 0xeb25 privileged */
5869
5870 case 0xeb26: /* STMH - store multiple high */
5871 case 0xeb90: /* STMY - store multiple */
5872 case 0xeb9b: /* STAMY - store access multiple */
5873 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5874 if (inib[2] <= inib[3])
5875 n = inib[3] - inib[2] + 1;
5876 else
5877 n = inib[3] + 0x10 - inib[2] + 1;
5878 if (record_full_arch_list_add_mem (oaddr, n * 4))
5879 return -1;
5880 break;
5881
5882 /* 0xeb27-0xeb2a undefined */
5883
5884 case 0xeb2c: /* STCMH - store characters under mask */
5885 case 0xeb2d: /* STCMY - store characters under mask */
5886 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5887 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
5888 return -1;
5889 break;
5890
5891 /* 0xeb2e undefined */
5892 /* 0xeb2f privileged */
5893
5894 case 0xeb30: /* CSG - compare and swap */
5895 case 0xebe4: /* LANG - load and and */
5896 case 0xebe6: /* LAOG - load and or */
5897 case 0xebe7: /* LAXG - load and xor */
5898 case 0xebe8: /* LAAG - load and add */
5899 case 0xebea: /* LAALG - load and add logical */
5900 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5901 if (record_full_arch_list_add_mem (oaddr, 8))
5902 return -1;
5903 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5904 return -1;
5905 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5906 return -1;
5907 break;
5908
5909 case 0xeb31: /* CDSY - compare double and swap */
5910 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5911 if (record_full_arch_list_add_mem (oaddr, 8))
5912 return -1;
5913 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5914 return -1;
5915 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5916 return -1;
5917 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5918 return -1;
5919 break;
5920
5921 /* 0xeb32-0xeb3d undefined */
5922
5923 case 0xeb3e: /* CDSG - compare double and swap */
5924 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5925 if (record_full_arch_list_add_mem (oaddr, 16))
5926 return -1;
5927 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5928 return -1;
5929 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5930 return -1;
5931 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5932 return -1;
5933 break;
5934
5935 /* 0xeb3f-0xeb43 undefined */
5936 /* 0xeb46-0xeb4b undefined */
5937 /* 0xeb4d-0xeb50 undefined */
5938
5939 case 0xeb52: /* MVIY - move */
5940 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5941 if (record_full_arch_list_add_mem (oaddr, 1))
5942 return -1;
5943 break;
5944
5945 case 0xeb54: /* NIY - and */
5946 case 0xeb56: /* OIY - or */
5947 case 0xeb57: /* XIY - xor */
5948 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5949 if (record_full_arch_list_add_mem (oaddr, 1))
5950 return -1;
5951 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5952 return -1;
5953 break;
5954
5955 /* 0xeb53 undefined */
5956 /* 0xeb58-0xeb69 undefined */
5957
5958 case 0xeb6a: /* ASI - add immediate */
5959 case 0xeb6e: /* ALSI - add immediate */
5960 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5961 if (record_full_arch_list_add_mem (oaddr, 4))
5962 return -1;
5963 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5964 return -1;
5965 break;
5966
5967 /* 0xeb6b-0xeb6d undefined */
5968 /* 0xeb6f-0xeb79 undefined */
5969
5970 case 0xeb7a: /* AGSI - add immediate */
5971 case 0xeb7e: /* ALGSI - add immediate */
5972 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5973 if (record_full_arch_list_add_mem (oaddr, 8))
5974 return -1;
5975 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5976 return -1;
5977 break;
5978
5979 /* 0xeb7b-0xeb7d undefined */
5980 /* 0xeb7f undefined */
5981
5982 case 0xeb80: /* ICMH - insert characters under mask */
5983 /* 32-bit high gpr destination + flags */
5984 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5985 return -1;
5986 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5987 return -1;
5988 break;
5989
5990 /* 0xeb82-0xeb8d undefined */
5991
5992 case 0xeb8e: /* MVCLU - move long unicode [partial] */
5993 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
5994 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5995 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
5996 if (record_full_arch_list_add_mem (oaddr, tmp))
5997 return -1;
5998 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5999 return -1;
6000 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6001 return -1;
6002 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6003 return -1;
6004 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6005 return -1;
6006 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6007 return -1;
6008 break;
6009
6010 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6011 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6012 return -1;
6013 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6014 return -1;
6015 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6016 return -1;
6017 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6018 return -1;
6019 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6020 return -1;
6021 break;
6022
6023 /* 0xeb91-0xeb95 undefined */
6024
6025 case 0xeb96: /* LMH - load multiple high */
6026 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6027 if (s390_record_gpr_h (gdbarch, regcache, i))
6028 return -1;
6029 if (s390_record_gpr_h (gdbarch, regcache, inib[3]))
6030 return -1;
6031 break;
6032
6033 /* 0xeb97 undefined */
6034
6035 case 0xeb98: /* LMY - load multiple */
6036 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6037 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
6038 return -1;
6039 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6040 return -1;
6041 break;
6042
6043 /* 0xeb99 undefined */
6044
6045 case 0xeb9a: /* LAMY - load access multiple */
6046 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6047 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
6048 return -1;
6049 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
6050 return -1;
6051 break;
6052
6053 /* 0xeb9c-0xebbf undefined */
6054 /* 0xebc1-0xebdb undefined */
6055 /* 0xebe5 undefined */
6056 /* 0xebe9 undefined */
6057 /* 0xebeb-0xebf1 undefined */
6058 /* 0xebf5 undefined */
6059 /* 0xebf9 undefined */
6060 /* 0xebfb-0xebff undefined */
6061
6062 /* 0xed00-0xed03 undefined */
6063
6064 case 0xed04: /* LDEB - load lengthened */
6065 case 0xed0c: /* MDEB - multiply */
6066 case 0xed0d: /* DEB - divide */
6067 case 0xed14: /* SQEB - square root */
6068 case 0xed15: /* SQDB - square root */
6069 case 0xed17: /* MEEB - multiply */
6070 case 0xed1c: /* MDB - multiply */
6071 case 0xed1d: /* DDB - divide */
6072 /* float destination + fpc */
6073 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6074 return -1;
6075 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6076 return -1;
6077 break;
6078
6079 case 0xed05: /* LXDB - load lengthened */
6080 case 0xed06: /* LXEB - load lengthened */
6081 case 0xed07: /* MXDB - multiply */
6082 /* float pair destination + fpc */
6083 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6084 return -1;
6085 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6086 return -1;
6087 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6088 return -1;
6089 break;
6090
6091 case 0xed0a: /* AEB - add */
6092 case 0xed0b: /* SEB - subtract */
6093 case 0xed1a: /* ADB - add */
6094 case 0xed1b: /* SDB - subtract */
6095 /* float destination + flags + fpc */
6096 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6097 return -1;
6098 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6099 return -1;
6100 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6101 return -1;
6102 break;
6103
6104 case 0xed0e: /* MAEB - multiply and add */
6105 case 0xed0f: /* MSEB - multiply and subtract */
6106 case 0xed1e: /* MADB - multiply and add */
6107 case 0xed1f: /* MSDB - multiply and subtract */
6108 case 0xed40: /* SLDT - shift significand left */
6109 case 0xed41: /* SRDT - shift significand right */
6110 case 0xedaa: /* CDZT - convert from zoned */
6111 case 0xedae: /* CDPT - convert from packed */
6112 /* float destination [RXF] + fpc */
6113 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6114 return -1;
6115 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6116 return -1;
6117 break;
6118
6119 /* 0xed13 undefined */
6120 /* 0xed16 undefined */
6121 /* 0xed20-0xed23 undefined */
6122
6123 case 0xed24: /* LDE - load lengthened */
6124 case 0xed34: /* SQE - square root */
6125 case 0xed35: /* SQD - square root */
6126 case 0xed37: /* MEE - multiply */
6127 case 0xed64: /* LEY - load */
6128 case 0xed65: /* LDY - load */
6129 /* float destination */
6130 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6131 return -1;
6132 break;
6133
6134 case 0xed25: /* LXD - load lengthened */
6135 case 0xed26: /* LXE - load lengthened */
6136 /* float pair destination */
6137 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6138 return -1;
6139 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6140 return -1;
6141 break;
6142
6143 /* 0xed27-0xed2d undefined */
6144
6145 case 0xed2e: /* MAE - multiply and add */
6146 case 0xed2f: /* MSE - multiply and subtract */
6147 case 0xed38: /* MAYL - multiply and add unnormalized */
6148 case 0xed39: /* MYL - multiply unnormalized */
6149 case 0xed3c: /* MAYH - multiply and add unnormalized */
6150 case 0xed3d: /* MYH - multiply unnormalized */
6151 case 0xed3e: /* MAD - multiply and add */
6152 case 0xed3f: /* MSD - multiply and subtract */
6153 /* float destination [RXF] */
6154 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6155 return -1;
6156 break;
6157
6158 /* 0xed30-0xed33 undefined */
6159 /* 0xed36 undefined */
6160
6161 case 0xed3a: /* MAY - multiply and add unnormalized */
6162 case 0xed3b: /* MY - multiply unnormalized */
6163 /* float pair destination [RXF] */
6164 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6165 return -1;
6166 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6167 return -1;
6168 break;
6169
6170 /* 0xed42-0xed47 undefind */
6171
6172 case 0xed48: /* SLXT - shift significand left */
6173 case 0xed49: /* SRXT - shift significand right */
6174 case 0xedab: /* CXZT - convert from zoned */
6175 case 0xedaf: /* CXPT - convert from packed */
6176 /* float pair destination [RXF] + fpc */
6177 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6178 return -1;
6179 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6180 return -1;
6181 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6182 return -1;
6183 break;
6184
6185 /* 0xed4a-0xed4f undefind */
6186 /* 0xed52-0xed53 undefind */
6187 /* 0xed56-0xed57 undefind */
6188 /* 0xed5a-0xed63 undefind */
6189 /* 0xed68-0xeda7 undefined */
6190
6191 case 0xeda8: /* CZDT - convert to zoned */
6192 case 0xeda9: /* CZXT - convert to zoned */
6193 case 0xedac: /* CPDT - convert to packed */
6194 case 0xedad: /* CPXT - convert to packed */
6195 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6196 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
6197 return -1;
6198 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6199 return -1;
6200 break;
6201
6202 /* 0xedb0-0xedff undefined */
6203
6204 default:
6205 goto UNKNOWN_OP;
6206 }
6207 break;
6208
6209 /* 0xe4 undefined */
6210
6211 case 0xe5:
6212 /* SSE/SIL-format instruction */
6213 switch (insn[0])
6214 {
6215 /* 0xe500-0xe543 undefined, privileged, or unsupported */
6216
6217 case 0xe544: /* MVHHI - move */
6218 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6219 if (record_full_arch_list_add_mem (oaddr, 2))
6220 return -1;
6221 break;
6222
6223 /* 0xe545-0xe547 undefined */
6224
6225 case 0xe548: /* MVGHI - move */
6226 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6227 if (record_full_arch_list_add_mem (oaddr, 8))
6228 return -1;
6229 break;
6230
6231 /* 0xe549-0xe54b undefined */
6232
6233 case 0xe54c: /* MVHI - move */
6234 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6235 if (record_full_arch_list_add_mem (oaddr, 4))
6236 return -1;
6237 break;
6238
6239 /* 0xe54d-0xe553 undefined */
6240
6241 case 0xe554: /* CHHSI - compare halfword immediate */
6242 case 0xe555: /* CLHHSI - compare logical immediate */
6243 case 0xe558: /* CGHSI - compare halfword immediate */
6244 case 0xe559: /* CLGHSI - compare logical immediate */
6245 case 0xe55c: /* CHSI - compare halfword immediate */
6246 case 0xe55d: /* CLFHSI - compare logical immediate */
6247 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6248 return -1;
6249 break;
6250
6251 /* 0xe556-0xe557 undefined */
6252 /* 0xe55a-0xe55b undefined */
6253 /* 0xe55e-0xe55f undefined */
6254
6255 case 0xe560: /* TBEGIN - transaction begin */
6256 /* The transaction will be immediately aborted after this
6257 instruction, due to single-stepping. This instruction is
6258 only supported so that the program can fail a few times
6259 and go to the non-transactional fallback. */
6260 if (inib[4])
6261 {
6262 /* Transaction diagnostic block - user. */
6263 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6264 if (record_full_arch_list_add_mem (oaddr, 256))
6265 return -1;
6266 }
6267 /* Transaction diagnostic block - supervisor. */
6268 if (record_full_arch_list_add_reg (regcache, S390_TDB_DWORD0_REGNUM))
6269 return -1;
6270 if (record_full_arch_list_add_reg (regcache, S390_TDB_ABORT_CODE_REGNUM))
6271 return -1;
6272 if (record_full_arch_list_add_reg (regcache, S390_TDB_CONFLICT_TOKEN_REGNUM))
6273 return -1;
6274 if (record_full_arch_list_add_reg (regcache, S390_TDB_ATIA_REGNUM))
6275 return -1;
6276 for (i = 0; i < 16; i++)
6277 if (record_full_arch_list_add_reg (regcache, S390_TDB_R0_REGNUM + i))
6278 return -1;
6279 /* And flags. */
6280 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6281 return -1;
6282 break;
6283
6284 /* 0xe561 unsupported: TBEGINC */
6285 /* 0xe562-0xe5ff undefined */
6286
6287 default:
6288 goto UNKNOWN_OP;
6289 }
6290 break;
6291
6292 case 0xec:
6293 /* RIE/RIS/RRS-format instruction */
6294 switch (ibyte[0] << 8 | ibyte[5])
6295 {
6296 /* 0xec00-0xec41 undefined */
6297
6298 case 0xec42: /* LOCHI - load halfword immediate on condition */
6299 case 0xec51: /* RISBLG - rotate then insert selected bits low */
6300 /* 32-bit or native gpr destination */
6301 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6302 return -1;
6303 break;
6304
6305 /* 0xec43 undefined */
6306
6307 case 0xec44: /* BRXHG - branch relative on index high */
6308 case 0xec45: /* BRXLG - branch relative on index low or equal */
6309 case 0xec46: /* LOCGHI - load halfword immediate on condition */
6310 case 0xec59: /* RISBGN - rotate then insert selected bits */
6311 /* 64-bit gpr destination */
6312 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6313 return -1;
6314 break;
6315
6316 /* 0xec47-0xec4d undefined */
6317
6318 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
6319 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
6320 /* 32-bit high gpr destination */
6321 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6322 return -1;
6323 break;
6324
6325 /* 0xec4f-0xec50 undefined */
6326 /* 0xec52-0xec53 undefined */
6327
6328 case 0xec54: /* RNSBG - rotate then and selected bits */
6329 case 0xec55: /* RISBG - rotate then insert selected bits */
6330 case 0xec56: /* ROSBG - rotate then or selected bits */
6331 case 0xec57: /* RXSBG - rotate then xor selected bits */
6332 case 0xecd9: /* AGHIK - add immediate */
6333 case 0xecdb: /* ALGHSIK - add logical immediate */
6334 /* 64-bit gpr destination + flags */
6335 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6336 return -1;
6337 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6338 return -1;
6339 break;
6340
6341 /* 0xec58 undefined */
6342 /* 0xec5a-0xec5c undefined */
6343 /* 0xec5e-0xec63 undefined */
6344
6345 case 0xec64: /* CGRJ - compare and branch relative */
6346 case 0xec65: /* CLGRJ - compare logical and branch relative */
6347 case 0xec76: /* CRJ - compare and branch relative */
6348 case 0xec77: /* CLRJ - compare logical and branch relative */
6349 case 0xec7c: /* CGIJ - compare immediate and branch relative */
6350 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
6351 case 0xec7e: /* CIJ - compare immediate and branch relative */
6352 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
6353 case 0xece4: /* CGRB - compare and branch */
6354 case 0xece5: /* CLGRB - compare logical and branch */
6355 case 0xecf6: /* CRB - compare and branch */
6356 case 0xecf7: /* CLRB - compare logical and branch */
6357 case 0xecfc: /* CGIB - compare immediate and branch */
6358 case 0xecfd: /* CLGIB - compare logical immediate and branch */
6359 case 0xecfe: /* CIB - compare immediate and branch */
6360 case 0xecff: /* CLIB - compare logical immediate and branch */
6361 break;
6362
6363 /* 0xec66-0xec6f undefined */
6364
6365 case 0xec70: /* CGIT - compare immediate and trap */
6366 case 0xec71: /* CLGIT - compare logical immediate and trap */
6367 case 0xec72: /* CIT - compare immediate and trap */
6368 case 0xec73: /* CLFIT - compare logical immediate and trap */
6369 /* fpc only - including possible DXC write for trapping insns */
6370 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6371 return -1;
6372 break;
6373
6374 /* 0xec74-0xec75 undefined */
6375 /* 0xec78-0xec7b undefined */
6376
6377 /* 0xec80-0xecd7 undefined */
6378
6379 case 0xecd8: /* AHIK - add immediate */
6380 case 0xecda: /* ALHSIK - add logical immediate */
6381 /* 32-bit gpr destination + flags */
6382 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6383 return -1;
6384 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6385 return -1;
6386 break;
6387
6388 /* 0xecdc-0xece3 undefined */
6389 /* 0xece6-0xecf5 undefined */
6390 /* 0xecf8-0xecfb undefined */
6391
6392 default:
6393 goto UNKNOWN_OP;
6394 }
6395 break;
6396
6397 case 0xee: /* PLO - perform locked operation */
6398 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
6399 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6400 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
6401 if (!(tmp & 0x100))
6402 {
6403 uint8_t fc = tmp & 0xff;
6404 gdb_byte buf[8];
6405 switch (fc)
6406 {
6407 case 0x00: /* CL */
6408 /* op1c */
6409 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6410 return -1;
6411 /* op3 */
6412 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6413 return -1;
6414 break;
6415
6416 case 0x01: /* CLG */
6417 /* op1c */
6418 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6419 return -1;
6420 /* op3 */
6421 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6422 return -1;
6423 break;
6424
6425 case 0x02: /* CLGR */
6426 /* op1c */
6427 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6428 return -1;
6429 /* op3 */
6430 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6431 return -1;
6432 break;
6433
6434 case 0x03: /* CLX */
6435 /* op1c */
6436 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6437 return -1;
6438 /* op3 */
6439 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6440 return -1;
6441 break;
6442
6443 case 0x08: /* DCS */
6444 /* op3c */
6445 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6446 return -1;
6447 /* fallthru */
6448 case 0x0c: /* CSST */
6449 /* op4 */
6450 if (record_full_arch_list_add_mem (oaddr2, 4))
6451 return -1;
6452 goto CS;
6453
6454 case 0x14: /* CSTST */
6455 /* op8 */
6456 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6457 return -1;
6458 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6459 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6460 if (record_full_arch_list_add_mem (oaddr3, 4))
6461 return -1;
6462 /* fallthru */
6463 case 0x10: /* CSDST */
6464 /* op6 */
6465 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6466 return -1;
6467 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6468 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6469 if (record_full_arch_list_add_mem (oaddr3, 4))
6470 return -1;
6471 /* op4 */
6472 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6473 return -1;
6474 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6475 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6476 if (record_full_arch_list_add_mem (oaddr3, 4))
6477 return -1;
6478 /* fallthru */
6479 case 0x04: /* CS */
6480 CS:
6481 /* op1c */
6482 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6483 return -1;
6484 /* op2 */
6485 if (record_full_arch_list_add_mem (oaddr, 4))
6486 return -1;
6487 break;
6488
6489 case 0x09: /* DCSG */
6490 /* op3c */
6491 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6492 return -1;
6493 goto CSSTG;
6494
6495 case 0x15: /* CSTSTG */
6496 /* op8 */
6497 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6498 return -1;
6499 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6500 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6501 if (record_full_arch_list_add_mem (oaddr3, 8))
6502 return -1;
6503 /* fallthru */
6504 case 0x11: /* CSDSTG */
6505 /* op6 */
6506 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6507 return -1;
6508 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6509 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6510 if (record_full_arch_list_add_mem (oaddr3, 8))
6511 return -1;
6512 /* fallthru */
6513 case 0x0d: /* CSSTG */
6514 CSSTG:
6515 /* op4 */
6516 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6517 return -1;
6518 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6519 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6520 if (record_full_arch_list_add_mem (oaddr3, 8))
6521 return -1;
6522 /* fallthru */
6523 case 0x05: /* CSG */
6524 /* op1c */
6525 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6526 return -1;
6527 /* op2 */
6528 if (record_full_arch_list_add_mem (oaddr, 8))
6529 return -1;
6530 break;
6531
6532 case 0x0a: /* DCSGR */
6533 /* op3c */
6534 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6535 return -1;
6536 /* fallthru */
6537 case 0x0e: /* CSSTGR */
6538 /* op4 */
6539 if (record_full_arch_list_add_mem (oaddr2, 8))
6540 return -1;
6541 goto CSGR;
6542
6543 case 0x16: /* CSTSTGR */
6544 /* op8 */
6545 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6546 return -1;
6547 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6548 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6549 if (record_full_arch_list_add_mem (oaddr3, 8))
6550 return -1;
6551 /* fallthru */
6552 case 0x12: /* CSDSTGR */
6553 /* op6 */
6554 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6555 return -1;
6556 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6557 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6558 if (record_full_arch_list_add_mem (oaddr3, 8))
6559 return -1;
6560 /* op4 */
6561 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6562 return -1;
6563 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6564 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6565 if (record_full_arch_list_add_mem (oaddr3, 8))
6566 return -1;
6567 /* fallthru */
6568 case 0x06: /* CSGR */
6569 CSGR:
6570 /* op1c */
6571 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6572 return -1;
6573 /* op2 */
6574 if (record_full_arch_list_add_mem (oaddr, 8))
6575 return -1;
6576 break;
6577
6578 case 0x0b: /* DCSX */
6579 /* op3c */
6580 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6581 return -1;
6582 goto CSSTX;
6583
6584 case 0x17: /* CSTSTX */
6585 /* op8 */
6586 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6587 return -1;
6588 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6589 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6590 if (record_full_arch_list_add_mem (oaddr3, 16))
6591 return -1;
6592 /* fallthru */
6593 case 0x13: /* CSDSTX */
6594 /* op6 */
6595 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6596 return -1;
6597 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6598 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6599 if (record_full_arch_list_add_mem (oaddr3, 16))
6600 return -1;
6601 /* fallthru */
6602 case 0x0f: /* CSSTX */
6603 CSSTX:
6604 /* op4 */
6605 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6606 return -1;
6607 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6608 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6609 if (record_full_arch_list_add_mem (oaddr3, 16))
6610 return -1;
6611 /* fallthru */
6612 case 0x07: /* CSX */
6613 /* op1c */
6614 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6615 return -1;
6616 /* op2 */
6617 if (record_full_arch_list_add_mem (oaddr, 16))
6618 return -1;
6619 break;
6620
6621 default:
6622 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PLO FC %02x at %s.\n",
6623 fc, paddress (gdbarch, addr));
6624 return -1;
6625 }
6626 }
6627 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6628 return -1;
6629 break;
6630
6631 case 0xef: /* LMD - load multiple disjoint */
6632 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6633 if (s390_record_gpr_g (gdbarch, regcache, i))
6634 return -1;
6635 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6636 return -1;
6637 break;
6638
6639 case 0xf0: /* SRP - shift and round decimal */
6640 case 0xf8: /* ZAP - zero and add */
6641 case 0xfa: /* AP - add decimal */
6642 case 0xfb: /* SP - subtract decimal */
6643 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6644 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6645 return -1;
6646 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6647 return -1;
6648 /* DXC may be written */
6649 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6650 return -1;
6651 break;
6652
6653 case 0xf1: /* MVO - move with offset */
6654 case 0xf2: /* PACK - pack */
6655 case 0xf3: /* UNPK - unpack */
6656 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6657 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6658 return -1;
6659 break;
6660
6661 /* 0xf4-0xf7 undefined */
6662
6663 case 0xf9: /* CP - compare decimal */
6664 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6665 return -1;
6666 /* DXC may be written */
6667 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6668 return -1;
6669 break;
6670
6671 case 0xfc: /* MP - multiply decimal */
6672 case 0xfd: /* DP - divide decimal */
6673 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6674 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6675 return -1;
6676 /* DXC may be written */
6677 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6678 return -1;
6679 break;
6680
6681 /* 0xfe-0xff undefined */
6682
6683 default:
6684 UNKNOWN_OP:
6685 fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %04x "
6686 "at %s.\n", insn[0], paddress (gdbarch, addr));
6687 return -1;
6688 }
6689
6690 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
6691 return -1;
6692 if (record_full_arch_list_add_end ())
6693 return -1;
6694 return 0;
6695 }
6696
6697 /* Miscellaneous. */
6698
6699 /* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
6700 "-mcmodel=large". */
6701
6702 static char *
6703 s390_gcc_target_options (struct gdbarch *gdbarch)
6704 {
6705 return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31");
6706 }
6707
6708 /* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
6709 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
6710 always "s390". Note that an s390x compiler supports "-m31" as
6711 well. */
6712
6713 static const char *
6714 s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
6715 {
6716 return "s390x?";
6717 }
6718
6719 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
6720 gdbarch.h. */
6721
6722 static int
6723 s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
6724 {
6725 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
6726 or indirection. */
6727 || *s == '%' /* Register access. */
6728 || isdigit (*s)); /* Literal number. */
6729 }
6730
6731 /* gdbarch init. */
6732
6733 /* Validate the range of registers. NAMES must be known at compile time. */
6734
6735 #define s390_validate_reg_range(feature, tdesc_data, start, names) \
6736 do \
6737 { \
6738 for (int i = 0; i < ARRAY_SIZE (names); i++) \
6739 if (!tdesc_numbered_register (feature, tdesc_data, start + i, names[i])) \
6740 return false; \
6741 } \
6742 while (0)
6743
6744 /* Validate the target description. Also numbers registers contained in
6745 tdesc. */
6746
6747 static bool
6748 s390_tdesc_valid (struct gdbarch_tdep *tdep,
6749 struct tdesc_arch_data *tdesc_data)
6750 {
6751 static const char *const psw[] = {
6752 "pswm", "pswa"
6753 };
6754 static const char *const gprs[] = {
6755 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
6756 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
6757 };
6758 static const char *const fprs[] = {
6759 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
6760 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
6761 };
6762 static const char *const acrs[] = {
6763 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
6764 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
6765 };
6766 static const char *const gprs_lower[] = {
6767 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
6768 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
6769 };
6770 static const char *const gprs_upper[] = {
6771 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
6772 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
6773 };
6774 static const char *const tdb_regs[] = {
6775 "tdb0", "tac", "tct", "atia",
6776 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
6777 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
6778 };
6779 static const char *const vxrs_low[] = {
6780 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
6781 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
6782 };
6783 static const char *const vxrs_high[] = {
6784 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
6785 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
6786 };
6787 static const char *const gs_cb[] = {
6788 "gsd", "gssm", "gsepla",
6789 };
6790 static const char *const gs_bc[] = {
6791 "bc_gsd", "bc_gssm", "bc_gsepla",
6792 };
6793
6794 const struct target_desc *tdesc = tdep->tdesc;
6795 const struct tdesc_feature *feature;
6796
6797 if (!tdesc_has_registers (tdesc))
6798 return false;
6799
6800 /* Core registers, i.e. general purpose and PSW. */
6801 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
6802 if (feature == NULL)
6803 return false;
6804
6805 s390_validate_reg_range (feature, tdesc_data, S390_PSWM_REGNUM, psw);
6806
6807 if (tdesc_unnumbered_register (feature, "r0"))
6808 {
6809 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM, gprs);
6810 }
6811 else
6812 {
6813 tdep->have_upper = true;
6814 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM,
6815 gprs_lower);
6816 s390_validate_reg_range (feature, tdesc_data, S390_R0_UPPER_REGNUM,
6817 gprs_upper);
6818 }
6819
6820 /* Floating point registers. */
6821 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
6822 if (feature == NULL)
6823 return false;
6824
6825 if (!tdesc_numbered_register (feature, tdesc_data, S390_FPC_REGNUM, "fpc"))
6826 return false;
6827
6828 s390_validate_reg_range (feature, tdesc_data, S390_F0_REGNUM, fprs);
6829
6830 /* Access control registers. */
6831 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
6832 if (feature == NULL)
6833 return false;
6834
6835 s390_validate_reg_range (feature, tdesc_data, S390_A0_REGNUM, acrs);
6836
6837 /* Optional GNU/Linux-specific "registers". */
6838 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
6839 if (feature)
6840 {
6841 tdesc_numbered_register (feature, tdesc_data,
6842 S390_ORIG_R2_REGNUM, "orig_r2");
6843
6844 if (tdesc_numbered_register (feature, tdesc_data,
6845 S390_LAST_BREAK_REGNUM, "last_break"))
6846 tdep->have_linux_v1 = true;
6847
6848 if (tdesc_numbered_register (feature, tdesc_data,
6849 S390_SYSTEM_CALL_REGNUM, "system_call"))
6850 tdep->have_linux_v2 = true;
6851
6852 if (tdep->have_linux_v2 && !tdep->have_linux_v1)
6853 return false;
6854 }
6855
6856 /* Transaction diagnostic block. */
6857 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
6858 if (feature)
6859 {
6860 s390_validate_reg_range (feature, tdesc_data, S390_TDB_DWORD0_REGNUM,
6861 tdb_regs);
6862 tdep->have_tdb = true;
6863 }
6864
6865 /* Vector registers. */
6866 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
6867 if (feature)
6868 {
6869 s390_validate_reg_range (feature, tdesc_data, S390_V0_LOWER_REGNUM,
6870 vxrs_low);
6871 s390_validate_reg_range (feature, tdesc_data, S390_V16_REGNUM,
6872 vxrs_high);
6873 tdep->have_vx = true;
6874 }
6875
6876 /* Guarded-storage registers. */
6877 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gs");
6878 if (feature)
6879 {
6880 s390_validate_reg_range (feature, tdesc_data, S390_GSD_REGNUM, gs_cb);
6881 tdep->have_gs = true;
6882 }
6883
6884 /* Guarded-storage broadcast control. */
6885 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gsbc");
6886 if (feature)
6887 {
6888 if (!tdep->have_gs)
6889 return false;
6890 s390_validate_reg_range (feature, tdesc_data, S390_BC_GSD_REGNUM,
6891 gs_bc);
6892 }
6893
6894 return true;
6895 }
6896
6897 /* Allocate and initialize new gdbarch_tdep. Caller is responsible to free
6898 memory after use. */
6899
6900 static struct gdbarch_tdep *
6901 s390_gdbarch_tdep_alloc ()
6902 {
6903 struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep);
6904
6905 tdep->tdesc = NULL;
6906
6907 tdep->abi = ABI_NONE;
6908 tdep->vector_abi = S390_VECTOR_ABI_NONE;
6909
6910 tdep->gpr_full_regnum = -1;
6911 tdep->v0_full_regnum = -1;
6912 tdep->pc_regnum = -1;
6913 tdep->cc_regnum = -1;
6914
6915 tdep->have_upper = false;
6916 tdep->have_linux_v1 = false;
6917 tdep->have_linux_v2 = false;
6918 tdep->have_tdb = false;
6919 tdep->have_vx = false;
6920 tdep->have_gs = false;
6921
6922 tdep->s390_syscall_record = NULL;
6923
6924 return tdep;
6925 }
6926
6927 /* Set up gdbarch struct. */
6928
6929 static struct gdbarch *
6930 s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
6931 {
6932 const struct target_desc *tdesc = info.target_desc;
6933 int first_pseudo_reg, last_pseudo_reg;
6934 static const char *const stap_register_prefixes[] = { "%", NULL };
6935 static const char *const stap_register_indirection_prefixes[] = { "(",
6936 NULL };
6937 static const char *const stap_register_indirection_suffixes[] = { ")",
6938 NULL };
6939
6940 struct gdbarch_tdep *tdep = s390_gdbarch_tdep_alloc ();
6941 struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
6942 struct tdesc_arch_data *tdesc_data = tdesc_data_alloc ();
6943 info.tdesc_data = tdesc_data;
6944
6945 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
6946 set_gdbarch_char_signed (gdbarch, 0);
6947
6948 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
6949 We can safely let them default to 128-bit, since the debug info
6950 will give the size of type actually used in each case. */
6951 set_gdbarch_long_double_bit (gdbarch, 128);
6952 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
6953
6954 /* Breakpoints. */
6955 /* Amount PC must be decremented by after a breakpoint. This is
6956 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
6957 always. */
6958 set_gdbarch_decr_pc_after_break (gdbarch, 2);
6959 set_gdbarch_breakpoint_kind_from_pc (gdbarch, s390_breakpoint::kind_from_pc);
6960 set_gdbarch_sw_breakpoint_from_kind (gdbarch, s390_breakpoint::bp_from_kind);
6961
6962 /* Displaced stepping. */
6963 set_gdbarch_displaced_step_copy_insn (gdbarch,
6964 s390_displaced_step_copy_insn);
6965 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
6966 set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location);
6967 set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep);
6968 set_gdbarch_software_single_step (gdbarch, s390_software_single_step);
6969 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
6970
6971 /* Prologue analysis. */
6972 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
6973
6974 /* Register handling. */
6975 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
6976 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
6977 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
6978 set_gdbarch_guess_tracepoint_registers (gdbarch,
6979 s390_guess_tracepoint_registers);
6980 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
6981 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
6982 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
6983
6984 /* Pseudo registers. */
6985 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
6986 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
6987 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
6988 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
6989 set_tdesc_pseudo_register_reggroup_p (gdbarch,
6990 s390_pseudo_register_reggroup_p);
6991 set_gdbarch_ax_pseudo_register_collect (gdbarch,
6992 s390_ax_pseudo_register_collect);
6993 set_gdbarch_ax_pseudo_register_push_stack
6994 (gdbarch, s390_ax_pseudo_register_push_stack);
6995 set_gdbarch_gen_return_address (gdbarch, s390_gen_return_address);
6996
6997 /* Inferior function calls. */
6998 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
6999 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
7000 set_gdbarch_frame_align (gdbarch, s390_frame_align);
7001 set_gdbarch_return_value (gdbarch, s390_return_value);
7002
7003 /* Frame handling. */
7004 /* Stack grows downward. */
7005 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
7006 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
7007 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7008 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
7009 dwarf2_append_unwinders (gdbarch);
7010 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
7011 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
7012
7013 switch (info.bfd_arch_info->mach)
7014 {
7015 case bfd_mach_s390_31:
7016 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
7017 break;
7018
7019 case bfd_mach_s390_64:
7020 set_gdbarch_long_bit (gdbarch, 64);
7021 set_gdbarch_long_long_bit (gdbarch, 64);
7022 set_gdbarch_ptr_bit (gdbarch, 64);
7023 set_gdbarch_address_class_type_flags (gdbarch,
7024 s390_address_class_type_flags);
7025 set_gdbarch_address_class_type_flags_to_name (gdbarch,
7026 s390_address_class_type_flags_to_name);
7027 set_gdbarch_address_class_name_to_type_flags (gdbarch,
7028 s390_address_class_name_to_type_flags);
7029 break;
7030 }
7031
7032 /* SystemTap functions. */
7033 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
7034 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
7035 stap_register_indirection_prefixes);
7036 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
7037 stap_register_indirection_suffixes);
7038
7039 set_gdbarch_disassembler_options (gdbarch, &s390_disassembler_options);
7040 set_gdbarch_valid_disassembler_options (gdbarch,
7041 disassembler_options_s390 ());
7042
7043 /* Process record-replay */
7044 set_gdbarch_process_record (gdbarch, s390_process_record);
7045
7046 /* Miscellaneous. */
7047 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
7048 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
7049 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
7050
7051 /* Initialize the OSABI. */
7052 gdbarch_init_osabi (info, gdbarch);
7053
7054 /* Always create a default tdesc. Otherwise commands like 'set osabi'
7055 cause GDB to crash with an internal error when the user tries to set
7056 an unsupported OSABI. */
7057 if (!tdesc_has_registers (tdesc))
7058 {
7059 if (info.bfd_arch_info->mach == bfd_mach_s390_31)
7060 tdesc = tdesc_s390_linux32;
7061 else
7062 tdesc = tdesc_s390x_linux64;
7063 }
7064 tdep->tdesc = tdesc;
7065
7066 /* Check any target description for validity. */
7067 if (!s390_tdesc_valid (tdep, tdesc_data))
7068 {
7069 tdesc_data_cleanup (tdesc_data);
7070 xfree (tdep);
7071 gdbarch_free (gdbarch);
7072 return NULL;
7073 }
7074
7075 /* Determine vector ABI. */
7076 #ifdef HAVE_ELF
7077 if (tdep->have_vx
7078 && info.abfd != NULL
7079 && info.abfd->format == bfd_object
7080 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
7081 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
7082 Tag_GNU_S390_ABI_Vector) == 2)
7083 tdep->vector_abi = S390_VECTOR_ABI_128;
7084 #endif
7085
7086 /* Find a candidate among extant architectures. */
7087 for (arches = gdbarch_list_lookup_by_info (arches, &info);
7088 arches != NULL;
7089 arches = gdbarch_list_lookup_by_info (arches->next, &info))
7090 {
7091 struct gdbarch_tdep *tmp = gdbarch_tdep (arches->gdbarch);
7092 if (!tmp)
7093 continue;
7094 /* A program can 'choose' not to use the vector registers when they
7095 are present. Leading to the same tdesc but different tdep and
7096 thereby a different gdbarch. */
7097 if (tmp->vector_abi != tdep->vector_abi)
7098 continue;
7099
7100 tdesc_data_cleanup (tdesc_data);
7101 xfree (tdep);
7102 gdbarch_free (gdbarch);
7103 return arches->gdbarch;
7104 }
7105
7106 tdesc_use_registers (gdbarch, tdep->tdesc, tdesc_data);
7107 set_gdbarch_register_name (gdbarch, s390_register_name);
7108
7109 /* Assign pseudo register numbers. */
7110 first_pseudo_reg = gdbarch_num_regs (gdbarch);
7111 last_pseudo_reg = first_pseudo_reg;
7112 if (tdep->have_upper)
7113 {
7114 tdep->gpr_full_regnum = last_pseudo_reg;
7115 last_pseudo_reg += 16;
7116 }
7117 if (tdep->have_vx)
7118 {
7119 tdep->v0_full_regnum = last_pseudo_reg;
7120 last_pseudo_reg += 16;
7121 }
7122 tdep->pc_regnum = last_pseudo_reg++;
7123 tdep->cc_regnum = last_pseudo_reg++;
7124 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
7125 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
7126
7127 /* Frame handling. */
7128 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
7129 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
7130 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
7131 frame_base_set_default (gdbarch, &s390_frame_base);
7132
7133 return gdbarch;
7134 }
7135
7136 void
7137 _initialize_s390_tdep (void)
7138 {
7139 /* Hook us into the gdbarch mechanism. */
7140 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7141
7142 initialize_tdesc_s390_linux32 ();
7143 initialize_tdesc_s390x_linux64 ();
7144 }
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