Simple -Wshadow=local fixes
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
1 /* Target-dependent code for s390.
2
3 Copyright (C) 2001-2018 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21
22 #include "arch-utils.h"
23 #include "ax-gdb.h"
24 #include "dwarf2-frame.h"
25 #include "elf/s390.h"
26 #include "elf-bfd.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
29 #include "gdbarch.h"
30 #include "gdbcore.h"
31 #include "infrun.h"
32 #include "linux-tdep.h"
33 #include "objfiles.h"
34 #include "osabi.h"
35 #include "record-full.h"
36 #include "regcache.h"
37 #include "reggroups.h"
38 #include "s390-tdep.h"
39 #include "target-descriptions.h"
40 #include "trad-frame.h"
41 #include "value.h"
42
43 #include "features/s390-linux32.c"
44 #include "features/s390x-linux64.c"
45
46 /* Holds the current set of options to be passed to the disassembler. */
47 static char *s390_disassembler_options;
48
49 /* Breakpoints. */
50
51 constexpr gdb_byte s390_break_insn[] = { 0x0, 0x1 };
52
53 typedef BP_MANIPULATION (s390_break_insn) s390_breakpoint;
54
55 /* Decoding S/390 instructions. */
56
57 /* Read a single instruction from address AT. */
58
59 static int
60 s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
61 {
62 static int s390_instrlen[] = { 2, 4, 4, 6 };
63 int instrlen;
64
65 if (target_read_memory (at, &instr[0], 2))
66 return -1;
67 instrlen = s390_instrlen[instr[0] >> 6];
68 if (instrlen > 2)
69 {
70 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
71 return -1;
72 }
73 return instrlen;
74 }
75
76 /* The functions below are for recognizing and decoding S/390
77 instructions of various formats. Each of them checks whether INSN
78 is an instruction of the given format, with the specified opcodes.
79 If it is, it sets the remaining arguments to the values of the
80 instruction's fields, and returns a non-zero value; otherwise, it
81 returns zero.
82
83 These functions' arguments appear in the order they appear in the
84 instruction, not in the machine-language form. So, opcodes always
85 come first, even though they're sometimes scattered around the
86 instructions. And displacements appear before base and extension
87 registers, as they do in the assembly syntax, not at the end, as
88 they do in the machine language.
89
90 Test for RI instruction format. */
91
92 static int
93 is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
94 {
95 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
96 {
97 *r1 = (insn[1] >> 4) & 0xf;
98 /* i2 is a 16-bit signed quantity. */
99 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
100 return 1;
101 }
102 else
103 return 0;
104 }
105
106 /* Test for RIL instruction format. See comment on is_ri for details. */
107
108 static int
109 is_ril (bfd_byte *insn, int op1, int op2,
110 unsigned int *r1, int *i2)
111 {
112 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
113 {
114 *r1 = (insn[1] >> 4) & 0xf;
115 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
116 no sign extension is necessary, but we don't want to assume
117 that. */
118 *i2 = (((insn[2] << 24)
119 | (insn[3] << 16)
120 | (insn[4] << 8)
121 | (insn[5])) ^ 0x80000000) - 0x80000000;
122 return 1;
123 }
124 else
125 return 0;
126 }
127
128 /* Test for RR instruction format. See comment on is_ri for details. */
129
130 static int
131 is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
132 {
133 if (insn[0] == op)
134 {
135 *r1 = (insn[1] >> 4) & 0xf;
136 *r2 = insn[1] & 0xf;
137 return 1;
138 }
139 else
140 return 0;
141 }
142
143 /* Test for RRE instruction format. See comment on is_ri for details. */
144
145 static int
146 is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
147 {
148 if (((insn[0] << 8) | insn[1]) == op)
149 {
150 /* Yes, insn[3]. insn[2] is unused in RRE format. */
151 *r1 = (insn[3] >> 4) & 0xf;
152 *r2 = insn[3] & 0xf;
153 return 1;
154 }
155 else
156 return 0;
157 }
158
159 /* Test for RS instruction format. See comment on is_ri for details. */
160
161 static int
162 is_rs (bfd_byte *insn, int op,
163 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
164 {
165 if (insn[0] == op)
166 {
167 *r1 = (insn[1] >> 4) & 0xf;
168 *r3 = insn[1] & 0xf;
169 *b2 = (insn[2] >> 4) & 0xf;
170 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
171 return 1;
172 }
173 else
174 return 0;
175 }
176
177 /* Test for RSY instruction format. See comment on is_ri for details. */
178
179 static int
180 is_rsy (bfd_byte *insn, int op1, int op2,
181 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
182 {
183 if (insn[0] == op1
184 && insn[5] == op2)
185 {
186 *r1 = (insn[1] >> 4) & 0xf;
187 *r3 = insn[1] & 0xf;
188 *b2 = (insn[2] >> 4) & 0xf;
189 /* The 'long displacement' is a 20-bit signed integer. */
190 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
191 ^ 0x80000) - 0x80000;
192 return 1;
193 }
194 else
195 return 0;
196 }
197
198 /* Test for RX instruction format. See comment on is_ri for details. */
199
200 static int
201 is_rx (bfd_byte *insn, int op,
202 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
203 {
204 if (insn[0] == op)
205 {
206 *r1 = (insn[1] >> 4) & 0xf;
207 *x2 = insn[1] & 0xf;
208 *b2 = (insn[2] >> 4) & 0xf;
209 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
210 return 1;
211 }
212 else
213 return 0;
214 }
215
216 /* Test for RXY instruction format. See comment on is_ri for details. */
217
218 static int
219 is_rxy (bfd_byte *insn, int op1, int op2,
220 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
221 {
222 if (insn[0] == op1
223 && insn[5] == op2)
224 {
225 *r1 = (insn[1] >> 4) & 0xf;
226 *x2 = insn[1] & 0xf;
227 *b2 = (insn[2] >> 4) & 0xf;
228 /* The 'long displacement' is a 20-bit signed integer. */
229 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
230 ^ 0x80000) - 0x80000;
231 return 1;
232 }
233 else
234 return 0;
235 }
236
237 /* A helper for s390_software_single_step, decides if an instruction
238 is a partial-execution instruction that needs to be executed until
239 completion when in record mode. If it is, returns 1 and writes
240 instruction length to a pointer. */
241
242 static int
243 s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len)
244 {
245 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
246 uint16_t insn;
247
248 insn = read_memory_integer (loc, 2, byte_order);
249
250 switch (insn >> 8)
251 {
252 case 0xa8: /* MVCLE */
253 *len = 4;
254 return 1;
255
256 case 0xeb:
257 {
258 insn = read_memory_integer (loc + 4, 2, byte_order);
259 if ((insn & 0xff) == 0x8e)
260 {
261 /* MVCLU */
262 *len = 6;
263 return 1;
264 }
265 }
266 break;
267 }
268
269 switch (insn)
270 {
271 case 0xb255: /* MVST */
272 case 0xb263: /* CMPSC */
273 case 0xb2a5: /* TRE */
274 case 0xb2a6: /* CU21 */
275 case 0xb2a7: /* CU12 */
276 case 0xb9b0: /* CU14 */
277 case 0xb9b1: /* CU24 */
278 case 0xb9b2: /* CU41 */
279 case 0xb9b3: /* CU42 */
280 case 0xb92a: /* KMF */
281 case 0xb92b: /* KMO */
282 case 0xb92f: /* KMC */
283 case 0xb92d: /* KMCTR */
284 case 0xb92e: /* KM */
285 case 0xb93c: /* PPNO */
286 case 0xb990: /* TRTT */
287 case 0xb991: /* TRTO */
288 case 0xb992: /* TROT */
289 case 0xb993: /* TROO */
290 *len = 4;
291 return 1;
292 }
293
294 return 0;
295 }
296
297 /* Implement the "software_single_step" gdbarch method, needed to single step
298 through instructions like MVCLE in record mode, to make sure they are
299 executed to completion. Without that, record will save the full length
300 of destination buffer on every iteration, even though the CPU will only
301 process about 4kiB of it each time, leading to O(n**2) memory and time
302 complexity. */
303
304 static std::vector<CORE_ADDR>
305 s390_software_single_step (struct regcache *regcache)
306 {
307 struct gdbarch *gdbarch = regcache->arch ();
308 CORE_ADDR loc = regcache_read_pc (regcache);
309 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
310 int len;
311 uint16_t insn;
312
313 /* Special handling only if recording. */
314 if (!record_full_is_used ())
315 return {};
316
317 /* First, match a partial instruction. */
318 if (!s390_is_partial_instruction (gdbarch, loc, &len))
319 return {};
320
321 loc += len;
322
323 /* Second, look for a branch back to it. */
324 insn = read_memory_integer (loc, 2, byte_order);
325 if (insn != 0xa714) /* BRC with mask 1 */
326 return {};
327
328 insn = read_memory_integer (loc + 2, 2, byte_order);
329 if (insn != (uint16_t) -(len / 2))
330 return {};
331
332 loc += 4;
333
334 /* Found it, step past the whole thing. */
335 return {loc};
336 }
337
338 /* Displaced stepping. */
339
340 /* Return true if INSN is a non-branch RIL-b or RIL-c format
341 instruction. */
342
343 static int
344 is_non_branch_ril (gdb_byte *insn)
345 {
346 gdb_byte op1 = insn[0];
347
348 if (op1 == 0xc4)
349 {
350 gdb_byte op2 = insn[1] & 0x0f;
351
352 switch (op2)
353 {
354 case 0x02: /* llhrl */
355 case 0x04: /* lghrl */
356 case 0x05: /* lhrl */
357 case 0x06: /* llghrl */
358 case 0x07: /* sthrl */
359 case 0x08: /* lgrl */
360 case 0x0b: /* stgrl */
361 case 0x0c: /* lgfrl */
362 case 0x0d: /* lrl */
363 case 0x0e: /* llgfrl */
364 case 0x0f: /* strl */
365 return 1;
366 }
367 }
368 else if (op1 == 0xc6)
369 {
370 gdb_byte op2 = insn[1] & 0x0f;
371
372 switch (op2)
373 {
374 case 0x00: /* exrl */
375 case 0x02: /* pfdrl */
376 case 0x04: /* cghrl */
377 case 0x05: /* chrl */
378 case 0x06: /* clghrl */
379 case 0x07: /* clhrl */
380 case 0x08: /* cgrl */
381 case 0x0a: /* clgrl */
382 case 0x0c: /* cgfrl */
383 case 0x0d: /* crl */
384 case 0x0e: /* clgfrl */
385 case 0x0f: /* clrl */
386 return 1;
387 }
388 }
389
390 return 0;
391 }
392
393 typedef buf_displaced_step_closure s390_displaced_step_closure;
394
395 /* Implementation of gdbarch_displaced_step_copy_insn. */
396
397 static struct displaced_step_closure *
398 s390_displaced_step_copy_insn (struct gdbarch *gdbarch,
399 CORE_ADDR from, CORE_ADDR to,
400 struct regcache *regs)
401 {
402 size_t len = gdbarch_max_insn_length (gdbarch);
403 std::unique_ptr<s390_displaced_step_closure> closure
404 (new s390_displaced_step_closure (len));
405 gdb_byte *buf = closure->buf.data ();
406
407 read_memory (from, buf, len);
408
409 /* Adjust the displacement field of PC-relative RIL instructions,
410 except branches. The latter are handled in the fixup hook. */
411 if (is_non_branch_ril (buf))
412 {
413 LONGEST offset;
414
415 offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG);
416 offset = (from - to + offset * 2) / 2;
417
418 /* If the instruction is too far from the jump pad, punt. This
419 will usually happen with instructions in shared libraries.
420 We could probably support these by rewriting them to be
421 absolute or fully emulating them. */
422 if (offset < INT32_MIN || offset > INT32_MAX)
423 {
424 /* Let the core fall back to stepping over the breakpoint
425 in-line. */
426 if (debug_displaced)
427 {
428 fprintf_unfiltered (gdb_stdlog,
429 "displaced: can't displaced step "
430 "RIL instruction: offset %s out of range\n",
431 plongest (offset));
432 }
433
434 return NULL;
435 }
436
437 store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset);
438 }
439
440 write_memory (to, buf, len);
441
442 if (debug_displaced)
443 {
444 fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
445 paddress (gdbarch, from), paddress (gdbarch, to));
446 displaced_step_dump_bytes (gdb_stdlog, buf, len);
447 }
448
449 return closure.release ();
450 }
451
452 /* Fix up the state of registers and memory after having single-stepped
453 a displaced instruction. */
454
455 static void
456 s390_displaced_step_fixup (struct gdbarch *gdbarch,
457 struct displaced_step_closure *closure_,
458 CORE_ADDR from, CORE_ADDR to,
459 struct regcache *regs)
460 {
461 /* Our closure is a copy of the instruction. */
462 s390_displaced_step_closure *closure
463 = (s390_displaced_step_closure *) closure_;
464 gdb_byte *insn = closure->buf.data ();
465 static int s390_instrlen[] = { 2, 4, 4, 6 };
466 int insnlen = s390_instrlen[insn[0] >> 6];
467
468 /* Fields for various kinds of instructions. */
469 unsigned int b2, r1, r2, x2, r3;
470 int i2, d2;
471
472 /* Get current PC and addressing mode bit. */
473 CORE_ADDR pc = regcache_read_pc (regs);
474 ULONGEST amode = 0;
475
476 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
477 {
478 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
479 amode &= 0x80000000;
480 }
481
482 if (debug_displaced)
483 fprintf_unfiltered (gdb_stdlog,
484 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
485 paddress (gdbarch, from), paddress (gdbarch, to),
486 paddress (gdbarch, pc), insnlen, (int) amode);
487
488 /* Handle absolute branch and save instructions. */
489 if (is_rr (insn, op_basr, &r1, &r2)
490 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
491 {
492 /* Recompute saved return address in R1. */
493 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
494 amode | (from + insnlen));
495 /* Update PC iff the instruction doesn't actually branch. */
496 if (insn[0] == op_basr && r2 == 0)
497 regcache_write_pc (regs, from + insnlen);
498 }
499
500 /* Handle absolute branch instructions. */
501 else if (is_rr (insn, op_bcr, &r1, &r2)
502 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
503 || is_rr (insn, op_bctr, &r1, &r2)
504 || is_rre (insn, op_bctgr, &r1, &r2)
505 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
506 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
507 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
508 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
509 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
510 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
511 {
512 /* Update PC iff branch was *not* taken. */
513 if (pc == to + insnlen)
514 regcache_write_pc (regs, from + insnlen);
515 }
516
517 /* Handle PC-relative branch and save instructions. */
518 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
519 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
520 {
521 /* Update PC. */
522 regcache_write_pc (regs, pc - to + from);
523 /* Recompute saved return address in R1. */
524 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
525 amode | (from + insnlen));
526 }
527
528 /* Handle LOAD ADDRESS RELATIVE LONG. */
529 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
530 {
531 /* Update PC. */
532 regcache_write_pc (regs, from + insnlen);
533 /* Recompute output address in R1. */
534 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
535 amode | (from + i2 * 2));
536 }
537
538 /* If we executed a breakpoint instruction, point PC right back at it. */
539 else if (insn[0] == 0x0 && insn[1] == 0x1)
540 regcache_write_pc (regs, from);
541
542 /* For any other insn, adjust PC by negated displacement. PC then
543 points right after the original instruction, except for PC-relative
544 branches, where it points to the adjusted branch target. */
545 else
546 regcache_write_pc (regs, pc - to + from);
547
548 if (debug_displaced)
549 fprintf_unfiltered (gdb_stdlog,
550 "displaced: (s390) pc is now %s\n",
551 paddress (gdbarch, regcache_read_pc (regs)));
552 }
553
554 /* Implement displaced_step_hw_singlestep gdbarch method. */
555
556 static int
557 s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
558 struct displaced_step_closure *closure)
559 {
560 return 1;
561 }
562
563 /* Prologue analysis. */
564
565 struct s390_prologue_data {
566
567 /* The stack. */
568 struct pv_area *stack;
569
570 /* The size and byte-order of a GPR or FPR. */
571 int gpr_size;
572 int fpr_size;
573 enum bfd_endian byte_order;
574
575 /* The general-purpose registers. */
576 pv_t gpr[S390_NUM_GPRS];
577
578 /* The floating-point registers. */
579 pv_t fpr[S390_NUM_FPRS];
580
581 /* The offset relative to the CFA where the incoming GPR N was saved
582 by the function prologue. 0 if not saved or unknown. */
583 int gpr_slot[S390_NUM_GPRS];
584
585 /* Likewise for FPRs. */
586 int fpr_slot[S390_NUM_FPRS];
587
588 /* Nonzero if the backchain was saved. This is assumed to be the
589 case when the incoming SP is saved at the current SP location. */
590 int back_chain_saved_p;
591 };
592
593 /* Return the effective address for an X-style instruction, like:
594
595 L R1, D2(X2, B2)
596
597 Here, X2 and B2 are registers, and D2 is a signed 20-bit
598 constant; the effective address is the sum of all three. If either
599 X2 or B2 are zero, then it doesn't contribute to the sum --- this
600 means that r0 can't be used as either X2 or B2. */
601
602 static pv_t
603 s390_addr (struct s390_prologue_data *data,
604 int d2, unsigned int x2, unsigned int b2)
605 {
606 pv_t result;
607
608 result = pv_constant (d2);
609 if (x2)
610 result = pv_add (result, data->gpr[x2]);
611 if (b2)
612 result = pv_add (result, data->gpr[b2]);
613
614 return result;
615 }
616
617 /* Do a SIZE-byte store of VALUE to D2(X2,B2). */
618
619 static void
620 s390_store (struct s390_prologue_data *data,
621 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
622 pv_t value)
623 {
624 pv_t addr = s390_addr (data, d2, x2, b2);
625 pv_t offset;
626
627 /* Check whether we are storing the backchain. */
628 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
629
630 if (pv_is_constant (offset) && offset.k == 0)
631 if (size == data->gpr_size
632 && pv_is_register_k (value, S390_SP_REGNUM, 0))
633 {
634 data->back_chain_saved_p = 1;
635 return;
636 }
637
638 /* Check whether we are storing a register into the stack. */
639 if (!data->stack->store_would_trash (addr))
640 data->stack->store (addr, size, value);
641
642 /* Note: If this is some store we cannot identify, you might think we
643 should forget our cached values, as any of those might have been hit.
644
645 However, we make the assumption that the register save areas are only
646 ever stored to once in any given function, and we do recognize these
647 stores. Thus every store we cannot recognize does not hit our data. */
648 }
649
650 /* Do a SIZE-byte load from D2(X2,B2). */
651
652 static pv_t
653 s390_load (struct s390_prologue_data *data,
654 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
655
656 {
657 pv_t addr = s390_addr (data, d2, x2, b2);
658
659 /* If it's a load from an in-line constant pool, then we can
660 simulate that, under the assumption that the code isn't
661 going to change between the time the processor actually
662 executed it creating the current frame, and the time when
663 we're analyzing the code to unwind past that frame. */
664 if (pv_is_constant (addr))
665 {
666 struct target_section *secp;
667 secp = target_section_by_addr (current_top_target (), addr.k);
668 if (secp != NULL
669 && (bfd_get_section_flags (secp->the_bfd_section->owner,
670 secp->the_bfd_section)
671 & SEC_READONLY))
672 return pv_constant (read_memory_integer (addr.k, size,
673 data->byte_order));
674 }
675
676 /* Check whether we are accessing one of our save slots. */
677 return data->stack->fetch (addr, size);
678 }
679
680 /* Function for finding saved registers in a 'struct pv_area'; we pass
681 this to pv_area::scan.
682
683 If VALUE is a saved register, ADDR says it was saved at a constant
684 offset from the frame base, and SIZE indicates that the whole
685 register was saved, record its offset in the reg_offset table in
686 PROLOGUE_UNTYPED. */
687
688 static void
689 s390_check_for_saved (void *data_untyped, pv_t addr,
690 CORE_ADDR size, pv_t value)
691 {
692 struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped;
693 int i, offset;
694
695 if (!pv_is_register (addr, S390_SP_REGNUM))
696 return;
697
698 offset = 16 * data->gpr_size + 32 - addr.k;
699
700 /* If we are storing the original value of a register, we want to
701 record the CFA offset. If the same register is stored multiple
702 times, the stack slot with the highest address counts. */
703
704 for (i = 0; i < S390_NUM_GPRS; i++)
705 if (size == data->gpr_size
706 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
707 if (data->gpr_slot[i] == 0
708 || data->gpr_slot[i] > offset)
709 {
710 data->gpr_slot[i] = offset;
711 return;
712 }
713
714 for (i = 0; i < S390_NUM_FPRS; i++)
715 if (size == data->fpr_size
716 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
717 if (data->fpr_slot[i] == 0
718 || data->fpr_slot[i] > offset)
719 {
720 data->fpr_slot[i] = offset;
721 return;
722 }
723 }
724
725 /* Analyze the prologue of the function starting at START_PC, continuing at
726 most until CURRENT_PC. Initialize DATA to hold all information we find
727 out about the state of the registers and stack slots. Return the address
728 of the instruction after the last one that changed the SP, FP, or back
729 chain; or zero on error. */
730
731 static CORE_ADDR
732 s390_analyze_prologue (struct gdbarch *gdbarch,
733 CORE_ADDR start_pc,
734 CORE_ADDR current_pc,
735 struct s390_prologue_data *data)
736 {
737 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
738
739 /* Our return value:
740 The address of the instruction after the last one that changed
741 the SP, FP, or back chain; zero if we got an error trying to
742 read memory. */
743 CORE_ADDR result = start_pc;
744
745 /* The current PC for our abstract interpretation. */
746 CORE_ADDR pc;
747
748 /* The address of the next instruction after that. */
749 CORE_ADDR next_pc;
750
751 pv_area stack (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
752 scoped_restore restore_stack = make_scoped_restore (&data->stack, &stack);
753
754 /* Set up everything's initial value. */
755 {
756 int i;
757
758 /* For the purpose of prologue tracking, we consider the GPR size to
759 be equal to the ABI word size, even if it is actually larger
760 (i.e. when running a 32-bit binary under a 64-bit kernel). */
761 data->gpr_size = word_size;
762 data->fpr_size = 8;
763 data->byte_order = gdbarch_byte_order (gdbarch);
764
765 for (i = 0; i < S390_NUM_GPRS; i++)
766 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
767
768 for (i = 0; i < S390_NUM_FPRS; i++)
769 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
770
771 for (i = 0; i < S390_NUM_GPRS; i++)
772 data->gpr_slot[i] = 0;
773
774 for (i = 0; i < S390_NUM_FPRS; i++)
775 data->fpr_slot[i] = 0;
776
777 data->back_chain_saved_p = 0;
778 }
779
780 /* Start interpreting instructions, until we hit the frame's
781 current PC or the first branch instruction. */
782 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
783 {
784 bfd_byte insn[S390_MAX_INSTR_SIZE];
785 int insn_len = s390_readinstruction (insn, pc);
786
787 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
788 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
789 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
790
791 /* Fields for various kinds of instructions. */
792 unsigned int b2, r1, r2, x2, r3;
793 int i2, d2;
794
795 /* The values of SP and FP before this instruction,
796 for detecting instructions that change them. */
797 pv_t pre_insn_sp, pre_insn_fp;
798 /* Likewise for the flag whether the back chain was saved. */
799 int pre_insn_back_chain_saved_p;
800
801 /* If we got an error trying to read the instruction, report it. */
802 if (insn_len < 0)
803 {
804 result = 0;
805 break;
806 }
807
808 next_pc = pc + insn_len;
809
810 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
811 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
812 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
813
814 /* LHI r1, i2 --- load halfword immediate. */
815 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
816 /* LGFI r1, i2 --- load fullword immediate. */
817 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
818 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
819 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
820 data->gpr[r1] = pv_constant (i2);
821
822 /* LR r1, r2 --- load from register. */
823 /* LGR r1, r2 --- load from register (64-bit version). */
824 else if (is_rr (insn32, op_lr, &r1, &r2)
825 || is_rre (insn64, op_lgr, &r1, &r2))
826 data->gpr[r1] = data->gpr[r2];
827
828 /* L r1, d2(x2, b2) --- load. */
829 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
830 /* LG r1, d2(x2, b2) --- load (64-bit version). */
831 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
832 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
833 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
834 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
835
836 /* ST r1, d2(x2, b2) --- store. */
837 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
838 /* STG r1, d2(x2, b2) --- store (64-bit version). */
839 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
840 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
841 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
842 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
843
844 /* STD r1, d2(x2,b2) --- store floating-point register. */
845 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
846 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
847
848 /* STM r1, r3, d2(b2) --- store multiple. */
849 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
850 version). */
851 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
852 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
853 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
854 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
855 {
856 for (; r1 <= r3; r1++, d2 += data->gpr_size)
857 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
858 }
859
860 /* AHI r1, i2 --- add halfword immediate. */
861 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
862 /* AFI r1, i2 --- add fullword immediate. */
863 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
864 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
865 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
866 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
867 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
868 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
869
870 /* ALFI r1, i2 --- add logical immediate. */
871 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
872 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
873 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
874 data->gpr[r1] = pv_add_constant (data->gpr[r1],
875 (CORE_ADDR)i2 & 0xffffffff);
876
877 /* AR r1, r2 -- add register. */
878 /* AGR r1, r2 -- add register (64-bit version). */
879 else if (is_rr (insn32, op_ar, &r1, &r2)
880 || is_rre (insn64, op_agr, &r1, &r2))
881 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
882
883 /* A r1, d2(x2, b2) -- add. */
884 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
885 /* AG r1, d2(x2, b2) -- add (64-bit version). */
886 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
887 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
888 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
889 data->gpr[r1] = pv_add (data->gpr[r1],
890 s390_load (data, d2, x2, b2, data->gpr_size));
891
892 /* SLFI r1, i2 --- subtract logical immediate. */
893 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
894 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
895 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
896 data->gpr[r1] = pv_add_constant (data->gpr[r1],
897 -((CORE_ADDR)i2 & 0xffffffff));
898
899 /* SR r1, r2 -- subtract register. */
900 /* SGR r1, r2 -- subtract register (64-bit version). */
901 else if (is_rr (insn32, op_sr, &r1, &r2)
902 || is_rre (insn64, op_sgr, &r1, &r2))
903 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
904
905 /* S r1, d2(x2, b2) -- subtract. */
906 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
907 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
908 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
909 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
910 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
911 data->gpr[r1] = pv_subtract (data->gpr[r1],
912 s390_load (data, d2, x2, b2, data->gpr_size));
913
914 /* LA r1, d2(x2, b2) --- load address. */
915 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
916 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
917 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
918 data->gpr[r1] = s390_addr (data, d2, x2, b2);
919
920 /* LARL r1, i2 --- load address relative long. */
921 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
922 data->gpr[r1] = pv_constant (pc + i2 * 2);
923
924 /* BASR r1, 0 --- branch and save.
925 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
926 else if (is_rr (insn, op_basr, &r1, &r2)
927 && r2 == 0)
928 data->gpr[r1] = pv_constant (next_pc);
929
930 /* BRAS r1, i2 --- branch relative and save. */
931 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
932 {
933 data->gpr[r1] = pv_constant (next_pc);
934 next_pc = pc + i2 * 2;
935
936 /* We'd better not interpret any backward branches. We'll
937 never terminate. */
938 if (next_pc <= pc)
939 break;
940 }
941
942 /* BRC/BRCL -- branch relative on condition. Ignore "branch
943 never", branch to following instruction, and "conditional
944 trap" (BRC +2). Otherwise terminate search. */
945 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2))
946 {
947 if (r1 != 0 && i2 != 1 && i2 != 2)
948 break;
949 }
950 else if (is_ril (insn, op1_brcl, op2_brcl, &r1, &i2))
951 {
952 if (r1 != 0 && i2 != 3)
953 break;
954 }
955
956 /* Terminate search when hitting any other branch instruction. */
957 else if (is_rr (insn, op_basr, &r1, &r2)
958 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
959 || is_rr (insn, op_bcr, &r1, &r2)
960 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
961 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
962 break;
963
964 else
965 {
966 /* An instruction we don't know how to simulate. The only
967 safe thing to do would be to set every value we're tracking
968 to 'unknown'. Instead, we'll be optimistic: we assume that
969 we *can* interpret every instruction that the compiler uses
970 to manipulate any of the data we're interested in here --
971 then we can just ignore anything else. */
972 }
973
974 /* Record the address after the last instruction that changed
975 the FP, SP, or backlink. Ignore instructions that changed
976 them back to their original values --- those are probably
977 restore instructions. (The back chain is never restored,
978 just popped.) */
979 {
980 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
981 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
982
983 if ((! pv_is_identical (pre_insn_sp, sp)
984 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
985 && sp.kind != pvk_unknown)
986 || (! pv_is_identical (pre_insn_fp, fp)
987 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
988 && fp.kind != pvk_unknown)
989 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
990 result = next_pc;
991 }
992 }
993
994 /* Record where all the registers were saved. */
995 data->stack->scan (s390_check_for_saved, data);
996
997 return result;
998 }
999
1000 /* Advance PC across any function entry prologue instructions to reach
1001 some "real" code. */
1002
1003 static CORE_ADDR
1004 s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1005 {
1006 struct s390_prologue_data data;
1007 CORE_ADDR skip_pc, func_addr;
1008
1009 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1010 {
1011 CORE_ADDR post_prologue_pc
1012 = skip_prologue_using_sal (gdbarch, func_addr);
1013 if (post_prologue_pc != 0)
1014 return std::max (pc, post_prologue_pc);
1015 }
1016
1017 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
1018 return skip_pc ? skip_pc : pc;
1019 }
1020
1021 /* Register handling. */
1022
1023 /* ABI call-saved register information. */
1024
1025 static int
1026 s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
1027 {
1028 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1029
1030 switch (tdep->abi)
1031 {
1032 case ABI_LINUX_S390:
1033 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1034 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
1035 || regnum == S390_A0_REGNUM)
1036 return 1;
1037
1038 break;
1039
1040 case ABI_LINUX_ZSERIES:
1041 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1042 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
1043 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
1044 return 1;
1045
1046 break;
1047 }
1048
1049 return 0;
1050 }
1051
1052 /* The "guess_tracepoint_registers" gdbarch method. */
1053
1054 static void
1055 s390_guess_tracepoint_registers (struct gdbarch *gdbarch,
1056 struct regcache *regcache,
1057 CORE_ADDR addr)
1058 {
1059 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1060 int sz = register_size (gdbarch, S390_PSWA_REGNUM);
1061 gdb_byte *reg = (gdb_byte *) alloca (sz);
1062 ULONGEST pswm, pswa;
1063
1064 /* Set PSWA from the location and a default PSWM (the only part we're
1065 unlikely to get right is the CC). */
1066 if (tdep->abi == ABI_LINUX_S390)
1067 {
1068 /* 31-bit PSWA needs high bit set (it's very unlikely the target
1069 was in 24-bit mode). */
1070 pswa = addr | 0x80000000UL;
1071 pswm = 0x070d0000UL;
1072 }
1073 else
1074 {
1075 pswa = addr;
1076 pswm = 0x0705000180000000ULL;
1077 }
1078
1079 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa);
1080 regcache->raw_supply (S390_PSWA_REGNUM, reg);
1081
1082 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm);
1083 regcache->raw_supply (S390_PSWM_REGNUM, reg);
1084 }
1085
1086 /* Return the name of register REGNO. Return the empty string for
1087 registers that shouldn't be visible. */
1088
1089 static const char *
1090 s390_register_name (struct gdbarch *gdbarch, int regnum)
1091 {
1092 if (regnum >= S390_V0_LOWER_REGNUM
1093 && regnum <= S390_V15_LOWER_REGNUM)
1094 return "";
1095 return tdesc_register_name (gdbarch, regnum);
1096 }
1097
1098 /* DWARF Register Mapping. */
1099
1100 static const short s390_dwarf_regmap[] =
1101 {
1102 /* 0-15: General Purpose Registers. */
1103 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1104 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1105 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1106 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1107
1108 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
1109 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
1110 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
1111 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
1112 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
1113
1114 /* 32-47: Control Registers (not mapped). */
1115 -1, -1, -1, -1, -1, -1, -1, -1,
1116 -1, -1, -1, -1, -1, -1, -1, -1,
1117
1118 /* 48-63: Access Registers. */
1119 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
1120 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
1121 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
1122 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
1123
1124 /* 64-65: Program Status Word. */
1125 S390_PSWM_REGNUM,
1126 S390_PSWA_REGNUM,
1127
1128 /* 66-67: Reserved. */
1129 -1, -1,
1130
1131 /* 68-83: Vector Registers 16-31. */
1132 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
1133 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
1134 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
1135 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
1136
1137 /* End of "official" DWARF registers. The remainder of the map is
1138 for GDB internal use only. */
1139
1140 /* GPR Lower Half Access. */
1141 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1142 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1143 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1144 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1145 };
1146
1147 enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
1148
1149 /* Convert DWARF register number REG to the appropriate register
1150 number used by GDB. */
1151
1152 static int
1153 s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1154 {
1155 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1156 int gdb_reg = -1;
1157
1158 /* In a 32-on-64 debug scenario, debug info refers to the full
1159 64-bit GPRs. Note that call frame information still refers to
1160 the 32-bit lower halves, because s390_adjust_frame_regnum uses
1161 special register numbers to access GPRs. */
1162 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
1163 return tdep->gpr_full_regnum + reg;
1164
1165 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
1166 gdb_reg = s390_dwarf_regmap[reg];
1167
1168 if (tdep->v0_full_regnum == -1)
1169 {
1170 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
1171 gdb_reg = -1;
1172 }
1173 else
1174 {
1175 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
1176 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
1177 }
1178
1179 return gdb_reg;
1180 }
1181
1182 /* Pseudo registers. */
1183
1184 /* Check whether REGNUM indicates a coupled general purpose register.
1185 These pseudo-registers are composed of two adjacent gprs. */
1186
1187 static int
1188 regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
1189 {
1190 return (tdep->gpr_full_regnum != -1
1191 && regnum >= tdep->gpr_full_regnum
1192 && regnum <= tdep->gpr_full_regnum + 15);
1193 }
1194
1195 /* Check whether REGNUM indicates a full vector register (v0-v15).
1196 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
1197
1198 static int
1199 regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum)
1200 {
1201 return (tdep->v0_full_regnum != -1
1202 && regnum >= tdep->v0_full_regnum
1203 && regnum <= tdep->v0_full_regnum + 15);
1204 }
1205
1206 /* 'float' values are stored in the upper half of floating-point
1207 registers, even though we are otherwise a big-endian platform. The
1208 same applies to a 'float' value within a vector. */
1209
1210 static struct value *
1211 s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
1212 int regnum, struct frame_id frame_id)
1213 {
1214 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1215 struct value *value = default_value_from_register (gdbarch, type,
1216 regnum, frame_id);
1217 check_typedef (type);
1218
1219 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
1220 && TYPE_LENGTH (type) < 8)
1221 || regnum_is_vxr_full (tdep, regnum)
1222 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
1223 set_value_offset (value, 0);
1224
1225 return value;
1226 }
1227
1228 /* Implement pseudo_register_name tdesc method. */
1229
1230 static const char *
1231 s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
1232 {
1233 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1234
1235 if (regnum == tdep->pc_regnum)
1236 return "pc";
1237
1238 if (regnum == tdep->cc_regnum)
1239 return "cc";
1240
1241 if (regnum_is_gpr_full (tdep, regnum))
1242 {
1243 static const char *full_name[] = {
1244 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1245 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1246 };
1247 return full_name[regnum - tdep->gpr_full_regnum];
1248 }
1249
1250 if (regnum_is_vxr_full (tdep, regnum))
1251 {
1252 static const char *full_name[] = {
1253 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
1254 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
1255 };
1256 return full_name[regnum - tdep->v0_full_regnum];
1257 }
1258
1259 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1260 }
1261
1262 /* Implement pseudo_register_type tdesc method. */
1263
1264 static struct type *
1265 s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
1266 {
1267 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1268
1269 if (regnum == tdep->pc_regnum)
1270 return builtin_type (gdbarch)->builtin_func_ptr;
1271
1272 if (regnum == tdep->cc_regnum)
1273 return builtin_type (gdbarch)->builtin_int;
1274
1275 if (regnum_is_gpr_full (tdep, regnum))
1276 return builtin_type (gdbarch)->builtin_uint64;
1277
1278 if (regnum_is_vxr_full (tdep, regnum))
1279 return tdesc_find_type (gdbarch, "vec128");
1280
1281 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1282 }
1283
1284 /* Implement pseudo_register_read gdbarch method. */
1285
1286 static enum register_status
1287 s390_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
1288 int regnum, gdb_byte *buf)
1289 {
1290 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1291 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1292 int regsize = register_size (gdbarch, regnum);
1293 ULONGEST val;
1294
1295 if (regnum == tdep->pc_regnum)
1296 {
1297 enum register_status status;
1298
1299 status = regcache->raw_read (S390_PSWA_REGNUM, &val);
1300 if (status == REG_VALID)
1301 {
1302 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1303 val &= 0x7fffffff;
1304 store_unsigned_integer (buf, regsize, byte_order, val);
1305 }
1306 return status;
1307 }
1308
1309 if (regnum == tdep->cc_regnum)
1310 {
1311 enum register_status status;
1312
1313 status = regcache->raw_read (S390_PSWM_REGNUM, &val);
1314 if (status == REG_VALID)
1315 {
1316 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1317 val = (val >> 12) & 3;
1318 else
1319 val = (val >> 44) & 3;
1320 store_unsigned_integer (buf, regsize, byte_order, val);
1321 }
1322 return status;
1323 }
1324
1325 if (regnum_is_gpr_full (tdep, regnum))
1326 {
1327 enum register_status status;
1328 ULONGEST val_upper;
1329
1330 regnum -= tdep->gpr_full_regnum;
1331
1332 status = regcache->raw_read (S390_R0_REGNUM + regnum, &val);
1333 if (status == REG_VALID)
1334 status = regcache->raw_read (S390_R0_UPPER_REGNUM + regnum,
1335 &val_upper);
1336 if (status == REG_VALID)
1337 {
1338 val |= val_upper << 32;
1339 store_unsigned_integer (buf, regsize, byte_order, val);
1340 }
1341 return status;
1342 }
1343
1344 if (regnum_is_vxr_full (tdep, regnum))
1345 {
1346 enum register_status status;
1347
1348 regnum -= tdep->v0_full_regnum;
1349
1350 status = regcache->raw_read (S390_F0_REGNUM + regnum, buf);
1351 if (status == REG_VALID)
1352 status = regcache->raw_read (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1353 return status;
1354 }
1355
1356 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1357 }
1358
1359 /* Implement pseudo_register_write gdbarch method. */
1360
1361 static void
1362 s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1363 int regnum, const gdb_byte *buf)
1364 {
1365 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1366 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1367 int regsize = register_size (gdbarch, regnum);
1368 ULONGEST val, psw;
1369
1370 if (regnum == tdep->pc_regnum)
1371 {
1372 val = extract_unsigned_integer (buf, regsize, byte_order);
1373 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1374 {
1375 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
1376 val = (psw & 0x80000000) | (val & 0x7fffffff);
1377 }
1378 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
1379 return;
1380 }
1381
1382 if (regnum == tdep->cc_regnum)
1383 {
1384 val = extract_unsigned_integer (buf, regsize, byte_order);
1385 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
1386 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1387 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
1388 else
1389 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
1390 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
1391 return;
1392 }
1393
1394 if (regnum_is_gpr_full (tdep, regnum))
1395 {
1396 regnum -= tdep->gpr_full_regnum;
1397 val = extract_unsigned_integer (buf, regsize, byte_order);
1398 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
1399 val & 0xffffffff);
1400 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
1401 val >> 32);
1402 return;
1403 }
1404
1405 if (regnum_is_vxr_full (tdep, regnum))
1406 {
1407 regnum -= tdep->v0_full_regnum;
1408 regcache->raw_write (S390_F0_REGNUM + regnum, buf);
1409 regcache->raw_write (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1410 return;
1411 }
1412
1413 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1414 }
1415
1416 /* Register groups. */
1417
1418 /* Implement pseudo_register_reggroup_p tdesc method. */
1419
1420 static int
1421 s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1422 struct reggroup *group)
1423 {
1424 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1425
1426 /* We usually save/restore the whole PSW, which includes PC and CC.
1427 However, some older gdbservers may not support saving/restoring
1428 the whole PSW yet, and will return an XML register description
1429 excluding those from the save/restore register groups. In those
1430 cases, we still need to explicitly save/restore PC and CC in order
1431 to push or pop frames. Since this doesn't hurt anything if we
1432 already save/restore the whole PSW (it's just redundant), we add
1433 PC and CC at this point unconditionally. */
1434 if (group == save_reggroup || group == restore_reggroup)
1435 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
1436
1437 if (group == vector_reggroup)
1438 return regnum_is_vxr_full (tdep, regnum);
1439
1440 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
1441 return 0;
1442
1443 return default_register_reggroup_p (gdbarch, regnum, group);
1444 }
1445
1446 /* The "ax_pseudo_register_collect" gdbarch method. */
1447
1448 static int
1449 s390_ax_pseudo_register_collect (struct gdbarch *gdbarch,
1450 struct agent_expr *ax, int regnum)
1451 {
1452 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1453 if (regnum == tdep->pc_regnum)
1454 {
1455 ax_reg_mask (ax, S390_PSWA_REGNUM);
1456 }
1457 else if (regnum == tdep->cc_regnum)
1458 {
1459 ax_reg_mask (ax, S390_PSWM_REGNUM);
1460 }
1461 else if (regnum_is_gpr_full (tdep, regnum))
1462 {
1463 regnum -= tdep->gpr_full_regnum;
1464 ax_reg_mask (ax, S390_R0_REGNUM + regnum);
1465 ax_reg_mask (ax, S390_R0_UPPER_REGNUM + regnum);
1466 }
1467 else if (regnum_is_vxr_full (tdep, regnum))
1468 {
1469 regnum -= tdep->v0_full_regnum;
1470 ax_reg_mask (ax, S390_F0_REGNUM + regnum);
1471 ax_reg_mask (ax, S390_V0_LOWER_REGNUM + regnum);
1472 }
1473 else
1474 {
1475 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1476 }
1477 return 0;
1478 }
1479
1480 /* The "ax_pseudo_register_push_stack" gdbarch method. */
1481
1482 static int
1483 s390_ax_pseudo_register_push_stack (struct gdbarch *gdbarch,
1484 struct agent_expr *ax, int regnum)
1485 {
1486 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1487 if (regnum == tdep->pc_regnum)
1488 {
1489 ax_reg (ax, S390_PSWA_REGNUM);
1490 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1491 {
1492 ax_zero_ext (ax, 31);
1493 }
1494 }
1495 else if (regnum == tdep->cc_regnum)
1496 {
1497 ax_reg (ax, S390_PSWM_REGNUM);
1498 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1499 ax_const_l (ax, 12);
1500 else
1501 ax_const_l (ax, 44);
1502 ax_simple (ax, aop_rsh_unsigned);
1503 ax_zero_ext (ax, 2);
1504 }
1505 else if (regnum_is_gpr_full (tdep, regnum))
1506 {
1507 regnum -= tdep->gpr_full_regnum;
1508 ax_reg (ax, S390_R0_REGNUM + regnum);
1509 ax_reg (ax, S390_R0_UPPER_REGNUM + regnum);
1510 ax_const_l (ax, 32);
1511 ax_simple (ax, aop_lsh);
1512 ax_simple (ax, aop_bit_or);
1513 }
1514 else if (regnum_is_vxr_full (tdep, regnum))
1515 {
1516 /* Too large to stuff on the stack. */
1517 return 1;
1518 }
1519 else
1520 {
1521 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1522 }
1523 return 0;
1524 }
1525
1526 /* The "gen_return_address" gdbarch method. Since this is supposed to be
1527 just a best-effort method, and we don't really have the means to run
1528 the full unwinder here, just collect the link register. */
1529
1530 static void
1531 s390_gen_return_address (struct gdbarch *gdbarch,
1532 struct agent_expr *ax, struct axs_value *value,
1533 CORE_ADDR scope)
1534 {
1535 value->type = register_type (gdbarch, S390_R14_REGNUM);
1536 value->kind = axs_lvalue_register;
1537 value->u.reg = S390_R14_REGNUM;
1538 }
1539
1540 /* Address handling. */
1541
1542 /* Implement addr_bits_remove gdbarch method.
1543 Only used for ABI_LINUX_S390. */
1544
1545 static CORE_ADDR
1546 s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
1547 {
1548 return addr & 0x7fffffff;
1549 }
1550
1551 /* Implement addr_class_type_flags gdbarch method.
1552 Only used for ABI_LINUX_ZSERIES. */
1553
1554 static int
1555 s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
1556 {
1557 if (byte_size == 4)
1558 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1559 else
1560 return 0;
1561 }
1562
1563 /* Implement addr_class_type_flags_to_name gdbarch method.
1564 Only used for ABI_LINUX_ZSERIES. */
1565
1566 static const char *
1567 s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
1568 {
1569 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
1570 return "mode32";
1571 else
1572 return NULL;
1573 }
1574
1575 /* Implement addr_class_name_to_type_flags gdbarch method.
1576 Only used for ABI_LINUX_ZSERIES. */
1577
1578 static int
1579 s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
1580 const char *name,
1581 int *type_flags_ptr)
1582 {
1583 if (strcmp (name, "mode32") == 0)
1584 {
1585 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1586 return 1;
1587 }
1588 else
1589 return 0;
1590 }
1591
1592 /* Inferior function calls. */
1593
1594 /* Dummy function calls. */
1595
1596 /* Unwrap any single-field structs in TYPE and return the effective
1597 "inner" type. E.g., yield "float" for all these cases:
1598
1599 float x;
1600 struct { float x };
1601 struct { struct { float x; } x; };
1602 struct { struct { struct { float x; } x; } x; };
1603
1604 However, if an inner type is smaller than MIN_SIZE, abort the
1605 unwrapping. */
1606
1607 static struct type *
1608 s390_effective_inner_type (struct type *type, unsigned int min_size)
1609 {
1610 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1611 && TYPE_NFIELDS (type) == 1)
1612 {
1613 struct type *inner = check_typedef (TYPE_FIELD_TYPE (type, 0));
1614
1615 if (TYPE_LENGTH (inner) < min_size)
1616 break;
1617 type = inner;
1618 }
1619
1620 return type;
1621 }
1622
1623 /* Return non-zero if TYPE should be passed like "float" or
1624 "double". */
1625
1626 static int
1627 s390_function_arg_float (struct type *type)
1628 {
1629 /* Note that long double as well as complex types are intentionally
1630 excluded. */
1631 if (TYPE_LENGTH (type) > 8)
1632 return 0;
1633
1634 /* A struct containing just a float or double is passed like a float
1635 or double. */
1636 type = s390_effective_inner_type (type, 0);
1637
1638 return (TYPE_CODE (type) == TYPE_CODE_FLT
1639 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT);
1640 }
1641
1642 /* Return non-zero if TYPE should be passed like a vector. */
1643
1644 static int
1645 s390_function_arg_vector (struct type *type)
1646 {
1647 if (TYPE_LENGTH (type) > 16)
1648 return 0;
1649
1650 /* Structs containing just a vector are passed like a vector. */
1651 type = s390_effective_inner_type (type, TYPE_LENGTH (type));
1652
1653 return TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type);
1654 }
1655
1656 /* Determine whether N is a power of two. */
1657
1658 static int
1659 is_power_of_two (unsigned int n)
1660 {
1661 return n && ((n & (n - 1)) == 0);
1662 }
1663
1664 /* For an argument whose type is TYPE and which is not passed like a
1665 float or vector, return non-zero if it should be passed like "int"
1666 or "long long". */
1667
1668 static int
1669 s390_function_arg_integer (struct type *type)
1670 {
1671 enum type_code code = TYPE_CODE (type);
1672
1673 if (TYPE_LENGTH (type) > 8)
1674 return 0;
1675
1676 if (code == TYPE_CODE_INT
1677 || code == TYPE_CODE_ENUM
1678 || code == TYPE_CODE_RANGE
1679 || code == TYPE_CODE_CHAR
1680 || code == TYPE_CODE_BOOL
1681 || code == TYPE_CODE_PTR
1682 || TYPE_IS_REFERENCE (type))
1683 return 1;
1684
1685 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
1686 && is_power_of_two (TYPE_LENGTH (type)));
1687 }
1688
1689 /* Argument passing state: Internal data structure passed to helper
1690 routines of s390_push_dummy_call. */
1691
1692 struct s390_arg_state
1693 {
1694 /* Register cache, or NULL, if we are in "preparation mode". */
1695 struct regcache *regcache;
1696 /* Next available general/floating-point/vector register for
1697 argument passing. */
1698 int gr, fr, vr;
1699 /* Current pointer to copy area (grows downwards). */
1700 CORE_ADDR copy;
1701 /* Current pointer to parameter area (grows upwards). */
1702 CORE_ADDR argp;
1703 };
1704
1705 /* Prepare one argument ARG for a dummy call and update the argument
1706 passing state AS accordingly. If the regcache field in AS is set,
1707 operate in "write mode" and write ARG into the inferior. Otherwise
1708 run "preparation mode" and skip all updates to the inferior. */
1709
1710 static void
1711 s390_handle_arg (struct s390_arg_state *as, struct value *arg,
1712 struct gdbarch_tdep *tdep, int word_size,
1713 enum bfd_endian byte_order, int is_unnamed)
1714 {
1715 struct type *type = check_typedef (value_type (arg));
1716 unsigned int length = TYPE_LENGTH (type);
1717 int write_mode = as->regcache != NULL;
1718
1719 if (s390_function_arg_float (type))
1720 {
1721 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
1722 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
1723 6. */
1724 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
1725 {
1726 /* When we store a single-precision value in an FP register,
1727 it occupies the leftmost bits. */
1728 if (write_mode)
1729 as->regcache->cooked_write_part (S390_F0_REGNUM + as->fr, 0, length,
1730 value_contents (arg));
1731 as->fr += 2;
1732 }
1733 else
1734 {
1735 /* When we store a single-precision value in a stack slot,
1736 it occupies the rightmost bits. */
1737 as->argp = align_up (as->argp + length, word_size);
1738 if (write_mode)
1739 write_memory (as->argp - length, value_contents (arg),
1740 length);
1741 }
1742 }
1743 else if (tdep->vector_abi == S390_VECTOR_ABI_128
1744 && s390_function_arg_vector (type))
1745 {
1746 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
1747
1748 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
1749 {
1750 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
1751
1752 if (write_mode)
1753 as->regcache->cooked_write_part (regnum, 0, length,
1754 value_contents (arg));
1755 as->vr++;
1756 }
1757 else
1758 {
1759 if (write_mode)
1760 write_memory (as->argp, value_contents (arg), length);
1761 as->argp = align_up (as->argp + length, word_size);
1762 }
1763 }
1764 else if (s390_function_arg_integer (type) && length <= word_size)
1765 {
1766 /* Initialize it just to avoid a GCC false warning. */
1767 ULONGEST val = 0;
1768
1769 if (write_mode)
1770 {
1771 /* Place value in least significant bits of the register or
1772 memory word and sign- or zero-extend to full word size.
1773 This also applies to a struct or union. */
1774 val = TYPE_UNSIGNED (type)
1775 ? extract_unsigned_integer (value_contents (arg),
1776 length, byte_order)
1777 : extract_signed_integer (value_contents (arg),
1778 length, byte_order);
1779 }
1780
1781 if (as->gr <= 6)
1782 {
1783 if (write_mode)
1784 regcache_cooked_write_unsigned (as->regcache,
1785 S390_R0_REGNUM + as->gr,
1786 val);
1787 as->gr++;
1788 }
1789 else
1790 {
1791 if (write_mode)
1792 write_memory_unsigned_integer (as->argp, word_size,
1793 byte_order, val);
1794 as->argp += word_size;
1795 }
1796 }
1797 else if (s390_function_arg_integer (type) && length == 8)
1798 {
1799 if (as->gr <= 5)
1800 {
1801 if (write_mode)
1802 {
1803 as->regcache->cooked_write (S390_R0_REGNUM + as->gr,
1804 value_contents (arg));
1805 as->regcache->cooked_write (S390_R0_REGNUM + as->gr + 1,
1806 value_contents (arg) + word_size);
1807 }
1808 as->gr += 2;
1809 }
1810 else
1811 {
1812 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
1813 in it, then don't go back and use it again later. */
1814 as->gr = 7;
1815
1816 if (write_mode)
1817 write_memory (as->argp, value_contents (arg), length);
1818 as->argp += length;
1819 }
1820 }
1821 else
1822 {
1823 /* This argument type is never passed in registers. Place the
1824 value in the copy area and pass a pointer to it. Use 8-byte
1825 alignment as a conservative assumption. */
1826 as->copy = align_down (as->copy - length, 8);
1827 if (write_mode)
1828 write_memory (as->copy, value_contents (arg), length);
1829
1830 if (as->gr <= 6)
1831 {
1832 if (write_mode)
1833 regcache_cooked_write_unsigned (as->regcache,
1834 S390_R0_REGNUM + as->gr,
1835 as->copy);
1836 as->gr++;
1837 }
1838 else
1839 {
1840 if (write_mode)
1841 write_memory_unsigned_integer (as->argp, word_size,
1842 byte_order, as->copy);
1843 as->argp += word_size;
1844 }
1845 }
1846 }
1847
1848 /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
1849 place to be passed to a function, as specified by the "GNU/Linux
1850 for S/390 ELF Application Binary Interface Supplement".
1851
1852 SP is the current stack pointer. We must put arguments, links,
1853 padding, etc. whereever they belong, and return the new stack
1854 pointer value.
1855
1856 If STRUCT_RETURN is non-zero, then the function we're calling is
1857 going to return a structure by value; STRUCT_ADDR is the address of
1858 a block we've allocated for it on the stack.
1859
1860 Our caller has taken care of any type promotions needed to satisfy
1861 prototypes or the old K&R argument-passing rules. */
1862
1863 static CORE_ADDR
1864 s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1865 struct regcache *regcache, CORE_ADDR bp_addr,
1866 int nargs, struct value **args, CORE_ADDR sp,
1867 int struct_return, CORE_ADDR struct_addr)
1868 {
1869 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1870 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1871 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1872 int i;
1873 struct s390_arg_state arg_state, arg_prep;
1874 CORE_ADDR param_area_start, new_sp;
1875 struct type *ftype = check_typedef (value_type (function));
1876
1877 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
1878 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
1879
1880 arg_prep.copy = sp;
1881 arg_prep.gr = struct_return ? 3 : 2;
1882 arg_prep.fr = 0;
1883 arg_prep.vr = 0;
1884 arg_prep.argp = 0;
1885 arg_prep.regcache = NULL;
1886
1887 /* Initialize arg_state for "preparation mode". */
1888 arg_state = arg_prep;
1889
1890 /* Update arg_state.copy with the start of the reference-to-copy area
1891 and arg_state.argp with the size of the parameter area. */
1892 for (i = 0; i < nargs; i++)
1893 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1894 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1895
1896 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
1897
1898 /* Allocate the standard frame areas: the register save area, the
1899 word reserved for the compiler, and the back chain pointer. */
1900 new_sp = param_area_start - (16 * word_size + 32);
1901
1902 /* Now we have the final stack pointer. Make sure we didn't
1903 underflow; on 31-bit, this would result in addresses with the
1904 high bit set, which causes confusion elsewhere. Note that if we
1905 error out here, stack and registers remain untouched. */
1906 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
1907 error (_("Stack overflow"));
1908
1909 /* Pass the structure return address in general register 2. */
1910 if (struct_return)
1911 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
1912
1913 /* Initialize arg_state for "write mode". */
1914 arg_state = arg_prep;
1915 arg_state.argp = param_area_start;
1916 arg_state.regcache = regcache;
1917
1918 /* Write all parameters. */
1919 for (i = 0; i < nargs; i++)
1920 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1921 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1922
1923 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
1924 if (word_size == 4)
1925 {
1926 ULONGEST pswa;
1927 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
1928 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
1929 }
1930 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
1931
1932 /* Store updated stack pointer. */
1933 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
1934
1935 /* We need to return the 'stack part' of the frame ID,
1936 which is actually the top of the register save area. */
1937 return param_area_start;
1938 }
1939
1940 /* Assuming THIS_FRAME is a dummy, return the frame ID of that
1941 dummy frame. The frame ID's base needs to match the TOS value
1942 returned by push_dummy_call, and the PC match the dummy frame's
1943 breakpoint. */
1944
1945 static struct frame_id
1946 s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1947 {
1948 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1949 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1950 sp = gdbarch_addr_bits_remove (gdbarch, sp);
1951
1952 return frame_id_build (sp + 16*word_size + 32,
1953 get_frame_pc (this_frame));
1954 }
1955
1956 /* Implement frame_align gdbarch method. */
1957
1958 static CORE_ADDR
1959 s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1960 {
1961 /* Both the 32- and 64-bit ABI's say that the stack pointer should
1962 always be aligned on an eight-byte boundary. */
1963 return (addr & -8);
1964 }
1965
1966 /* Helper for s390_return_value: Set or retrieve a function return
1967 value if it resides in a register. */
1968
1969 static void
1970 s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
1971 struct regcache *regcache,
1972 gdb_byte *out, const gdb_byte *in)
1973 {
1974 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1975 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1976 int length = TYPE_LENGTH (type);
1977 int code = TYPE_CODE (type);
1978
1979 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
1980 {
1981 /* Float-like value: left-aligned in f0. */
1982 if (in != NULL)
1983 regcache->cooked_write_part (S390_F0_REGNUM, 0, length, in);
1984 else
1985 regcache->cooked_read_part (S390_F0_REGNUM, 0, length, out);
1986 }
1987 else if (code == TYPE_CODE_ARRAY)
1988 {
1989 /* Vector: left-aligned in v24. */
1990 if (in != NULL)
1991 regcache->cooked_write_part (S390_V24_REGNUM, 0, length, in);
1992 else
1993 regcache->cooked_read_part (S390_V24_REGNUM, 0, length, out);
1994 }
1995 else if (length <= word_size)
1996 {
1997 /* Integer: zero- or sign-extended in r2. */
1998 if (out != NULL)
1999 regcache->cooked_read_part (S390_R2_REGNUM, word_size - length, length,
2000 out);
2001 else if (TYPE_UNSIGNED (type))
2002 regcache_cooked_write_unsigned
2003 (regcache, S390_R2_REGNUM,
2004 extract_unsigned_integer (in, length, byte_order));
2005 else
2006 regcache_cooked_write_signed
2007 (regcache, S390_R2_REGNUM,
2008 extract_signed_integer (in, length, byte_order));
2009 }
2010 else if (length == 2 * word_size)
2011 {
2012 /* Double word: in r2 and r3. */
2013 if (in != NULL)
2014 {
2015 regcache->cooked_write (S390_R2_REGNUM, in);
2016 regcache->cooked_write (S390_R3_REGNUM, in + word_size);
2017 }
2018 else
2019 {
2020 regcache->cooked_read (S390_R2_REGNUM, out);
2021 regcache->cooked_read (S390_R3_REGNUM, out + word_size);
2022 }
2023 }
2024 else
2025 internal_error (__FILE__, __LINE__, _("invalid return type"));
2026 }
2027
2028 /* Implement the 'return_value' gdbarch method. */
2029
2030 static enum return_value_convention
2031 s390_return_value (struct gdbarch *gdbarch, struct value *function,
2032 struct type *type, struct regcache *regcache,
2033 gdb_byte *out, const gdb_byte *in)
2034 {
2035 enum return_value_convention rvc;
2036
2037 type = check_typedef (type);
2038
2039 switch (TYPE_CODE (type))
2040 {
2041 case TYPE_CODE_STRUCT:
2042 case TYPE_CODE_UNION:
2043 case TYPE_CODE_COMPLEX:
2044 rvc = RETURN_VALUE_STRUCT_CONVENTION;
2045 break;
2046 case TYPE_CODE_ARRAY:
2047 rvc = (gdbarch_tdep (gdbarch)->vector_abi == S390_VECTOR_ABI_128
2048 && TYPE_LENGTH (type) <= 16 && TYPE_VECTOR (type))
2049 ? RETURN_VALUE_REGISTER_CONVENTION
2050 : RETURN_VALUE_STRUCT_CONVENTION;
2051 break;
2052 default:
2053 rvc = TYPE_LENGTH (type) <= 8
2054 ? RETURN_VALUE_REGISTER_CONVENTION
2055 : RETURN_VALUE_STRUCT_CONVENTION;
2056 }
2057
2058 if (in != NULL || out != NULL)
2059 {
2060 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
2061 s390_register_return_value (gdbarch, type, regcache, out, in);
2062 else if (in != NULL)
2063 error (_("Cannot set function return value."));
2064 else
2065 error (_("Function return value unknown."));
2066 }
2067
2068 return rvc;
2069 }
2070
2071 /* Frame unwinding. */
2072
2073 /* Implmement the stack_frame_destroyed_p gdbarch method. */
2074
2075 static int
2076 s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
2077 {
2078 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2079
2080 /* In frameless functions, there's no frame to destroy and thus
2081 we don't care about the epilogue.
2082
2083 In functions with frame, the epilogue sequence is a pair of
2084 a LM-type instruction that restores (amongst others) the
2085 return register %r14 and the stack pointer %r15, followed
2086 by a branch 'br %r14' --or equivalent-- that effects the
2087 actual return.
2088
2089 In that situation, this function needs to return 'true' in
2090 exactly one case: when pc points to that branch instruction.
2091
2092 Thus we try to disassemble the one instructions immediately
2093 preceding pc and check whether it is an LM-type instruction
2094 modifying the stack pointer.
2095
2096 Note that disassembling backwards is not reliable, so there
2097 is a slight chance of false positives here ... */
2098
2099 bfd_byte insn[6];
2100 unsigned int r1, r3, b2;
2101 int d2;
2102
2103 if (word_size == 4
2104 && !target_read_memory (pc - 4, insn, 4)
2105 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
2106 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2107 return 1;
2108
2109 if (word_size == 4
2110 && !target_read_memory (pc - 6, insn, 6)
2111 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
2112 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2113 return 1;
2114
2115 if (word_size == 8
2116 && !target_read_memory (pc - 6, insn, 6)
2117 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
2118 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2119 return 1;
2120
2121 return 0;
2122 }
2123
2124 /* Implement unwind_pc gdbarch method. */
2125
2126 static CORE_ADDR
2127 s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2128 {
2129 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2130 ULONGEST pc;
2131 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
2132 return gdbarch_addr_bits_remove (gdbarch, pc);
2133 }
2134
2135 /* Implement unwind_sp gdbarch method. */
2136
2137 static CORE_ADDR
2138 s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2139 {
2140 ULONGEST sp;
2141 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2142 return gdbarch_addr_bits_remove (gdbarch, sp);
2143 }
2144
2145 /* Helper routine to unwind pseudo registers. */
2146
2147 static struct value *
2148 s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
2149 {
2150 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2151 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2152 struct type *type = register_type (gdbarch, regnum);
2153
2154 /* Unwind PC via PSW address. */
2155 if (regnum == tdep->pc_regnum)
2156 {
2157 struct value *val;
2158
2159 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
2160 if (!value_optimized_out (val))
2161 {
2162 LONGEST pswa = value_as_long (val);
2163
2164 if (TYPE_LENGTH (type) == 4)
2165 return value_from_pointer (type, pswa & 0x7fffffff);
2166 else
2167 return value_from_pointer (type, pswa);
2168 }
2169 }
2170
2171 /* Unwind CC via PSW mask. */
2172 if (regnum == tdep->cc_regnum)
2173 {
2174 struct value *val;
2175
2176 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
2177 if (!value_optimized_out (val))
2178 {
2179 LONGEST pswm = value_as_long (val);
2180
2181 if (TYPE_LENGTH (type) == 4)
2182 return value_from_longest (type, (pswm >> 12) & 3);
2183 else
2184 return value_from_longest (type, (pswm >> 44) & 3);
2185 }
2186 }
2187
2188 /* Unwind full GPRs to show at least the lower halves (as the
2189 upper halves are undefined). */
2190 if (regnum_is_gpr_full (tdep, regnum))
2191 {
2192 int reg = regnum - tdep->gpr_full_regnum;
2193 struct value *val;
2194
2195 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
2196 if (!value_optimized_out (val))
2197 return value_cast (type, val);
2198 }
2199
2200 return allocate_optimized_out_value (type);
2201 }
2202
2203 /* Translate a .eh_frame register to DWARF register, or adjust a
2204 .debug_frame register. */
2205
2206 static int
2207 s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
2208 {
2209 /* See s390_dwarf_reg_to_regnum for comments. */
2210 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
2211 }
2212
2213 /* DWARF-2 frame unwinding. */
2214
2215 /* Function to unwind a pseudo-register in dwarf2_frame unwinder. Used by
2216 s390_dwarf2_frame_init_reg. */
2217
2218 static struct value *
2219 s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2220 int regnum)
2221 {
2222 return s390_unwind_pseudo_register (this_frame, regnum);
2223 }
2224
2225 /* Implement init_reg dwarf2_frame method. */
2226
2227 static void
2228 s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2229 struct dwarf2_frame_state_reg *reg,
2230 struct frame_info *this_frame)
2231 {
2232 /* The condition code (and thus PSW mask) is call-clobbered. */
2233 if (regnum == S390_PSWM_REGNUM)
2234 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2235
2236 /* The PSW address unwinds to the return address. */
2237 else if (regnum == S390_PSWA_REGNUM)
2238 reg->how = DWARF2_FRAME_REG_RA;
2239
2240 /* Fixed registers are call-saved or call-clobbered
2241 depending on the ABI in use. */
2242 else if (regnum < S390_NUM_REGS)
2243 {
2244 if (s390_register_call_saved (gdbarch, regnum))
2245 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2246 else
2247 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2248 }
2249
2250 /* We install a special function to unwind pseudos. */
2251 else
2252 {
2253 reg->how = DWARF2_FRAME_REG_FN;
2254 reg->loc.fn = s390_dwarf2_prev_register;
2255 }
2256 }
2257
2258 /* Frame unwinding. */
2259
2260 /* Wrapper for trad_frame_get_prev_register to allow for s390 pseudo
2261 register translation. */
2262
2263 struct value *
2264 s390_trad_frame_prev_register (struct frame_info *this_frame,
2265 struct trad_frame_saved_reg saved_regs[],
2266 int regnum)
2267 {
2268 if (regnum < S390_NUM_REGS)
2269 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
2270 else
2271 return s390_unwind_pseudo_register (this_frame, regnum);
2272 }
2273
2274 /* Normal stack frames. */
2275
2276 struct s390_unwind_cache {
2277
2278 CORE_ADDR func;
2279 CORE_ADDR frame_base;
2280 CORE_ADDR local_base;
2281
2282 struct trad_frame_saved_reg *saved_regs;
2283 };
2284
2285 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2286 prologue analysis. Helper for s390_frame_unwind_cache. */
2287
2288 static int
2289 s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
2290 struct s390_unwind_cache *info)
2291 {
2292 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2293 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2294 struct s390_prologue_data data;
2295 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
2296 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2297 int i;
2298 CORE_ADDR cfa;
2299 CORE_ADDR func;
2300 CORE_ADDR result;
2301 ULONGEST reg;
2302 CORE_ADDR prev_sp;
2303 int frame_pointer;
2304 int size;
2305 struct frame_info *next_frame;
2306
2307 /* Try to find the function start address. If we can't find it, we don't
2308 bother searching for it -- with modern compilers this would be mostly
2309 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2310 or else a valid backchain ... */
2311 if (!get_frame_func_if_available (this_frame, &info->func))
2312 {
2313 info->func = -1;
2314 return 0;
2315 }
2316 func = info->func;
2317
2318 /* Try to analyze the prologue. */
2319 result = s390_analyze_prologue (gdbarch, func,
2320 get_frame_pc (this_frame), &data);
2321 if (!result)
2322 return 0;
2323
2324 /* If this was successful, we should have found the instruction that
2325 sets the stack pointer register to the previous value of the stack
2326 pointer minus the frame size. */
2327 if (!pv_is_register (*sp, S390_SP_REGNUM))
2328 return 0;
2329
2330 /* A frame size of zero at this point can mean either a real
2331 frameless function, or else a failure to find the prologue.
2332 Perform some sanity checks to verify we really have a
2333 frameless function. */
2334 if (sp->k == 0)
2335 {
2336 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2337 size zero. This is only possible if the next frame is a sentinel
2338 frame, a dummy frame, or a signal trampoline frame. */
2339 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2340 needed, instead the code should simpliy rely on its
2341 analysis. */
2342 next_frame = get_next_frame (this_frame);
2343 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2344 next_frame = get_next_frame (next_frame);
2345 if (next_frame
2346 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
2347 return 0;
2348
2349 /* If we really have a frameless function, %r14 must be valid
2350 -- in particular, it must point to a different function. */
2351 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
2352 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
2353 if (get_pc_function_start (reg) == func)
2354 {
2355 /* However, there is one case where it *is* valid for %r14
2356 to point to the same function -- if this is a recursive
2357 call, and we have stopped in the prologue *before* the
2358 stack frame was allocated.
2359
2360 Recognize this case by looking ahead a bit ... */
2361
2362 struct s390_prologue_data data2;
2363 pv_t *sp2 = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2364
2365 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
2366 && pv_is_register (*sp2, S390_SP_REGNUM)
2367 && sp2->k != 0))
2368 return 0;
2369 }
2370 }
2371
2372 /* OK, we've found valid prologue data. */
2373 size = -sp->k;
2374
2375 /* If the frame pointer originally also holds the same value
2376 as the stack pointer, we're probably using it. If it holds
2377 some other value -- even a constant offset -- it is most
2378 likely used as temp register. */
2379 if (pv_is_identical (*sp, *fp))
2380 frame_pointer = S390_FRAME_REGNUM;
2381 else
2382 frame_pointer = S390_SP_REGNUM;
2383
2384 /* If we've detected a function with stack frame, we'll still have to
2385 treat it as frameless if we're currently within the function epilog
2386 code at a point where the frame pointer has already been restored.
2387 This can only happen in an innermost frame. */
2388 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2389 instead the code should simpliy rely on its analysis. */
2390 next_frame = get_next_frame (this_frame);
2391 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2392 next_frame = get_next_frame (next_frame);
2393 if (size > 0
2394 && (next_frame == NULL
2395 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
2396 {
2397 /* See the comment in s390_stack_frame_destroyed_p on why this is
2398 not completely reliable ... */
2399 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
2400 {
2401 memset (&data, 0, sizeof (data));
2402 size = 0;
2403 frame_pointer = S390_SP_REGNUM;
2404 }
2405 }
2406
2407 /* Once we know the frame register and the frame size, we can unwind
2408 the current value of the frame register from the next frame, and
2409 add back the frame size to arrive that the previous frame's
2410 stack pointer value. */
2411 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
2412 cfa = prev_sp + 16*word_size + 32;
2413
2414 /* Set up ABI call-saved/call-clobbered registers. */
2415 for (i = 0; i < S390_NUM_REGS; i++)
2416 if (!s390_register_call_saved (gdbarch, i))
2417 trad_frame_set_unknown (info->saved_regs, i);
2418
2419 /* CC is always call-clobbered. */
2420 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2421
2422 /* Record the addresses of all register spill slots the prologue parser
2423 has recognized. Consider only registers defined as call-saved by the
2424 ABI; for call-clobbered registers the parser may have recognized
2425 spurious stores. */
2426
2427 for (i = 0; i < 16; i++)
2428 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
2429 && data.gpr_slot[i] != 0)
2430 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
2431
2432 for (i = 0; i < 16; i++)
2433 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
2434 && data.fpr_slot[i] != 0)
2435 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
2436
2437 /* Function return will set PC to %r14. */
2438 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
2439
2440 /* In frameless functions, we unwind simply by moving the return
2441 address to the PC. However, if we actually stored to the
2442 save area, use that -- we might only think the function frameless
2443 because we're in the middle of the prologue ... */
2444 if (size == 0
2445 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2446 {
2447 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2448 }
2449
2450 /* Another sanity check: unless this is a frameless function,
2451 we should have found spill slots for SP and PC.
2452 If not, we cannot unwind further -- this happens e.g. in
2453 libc's thread_start routine. */
2454 if (size > 0)
2455 {
2456 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
2457 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2458 prev_sp = -1;
2459 }
2460
2461 /* We use the current value of the frame register as local_base,
2462 and the top of the register save area as frame_base. */
2463 if (prev_sp != -1)
2464 {
2465 info->frame_base = prev_sp + 16*word_size + 32;
2466 info->local_base = prev_sp - size;
2467 }
2468
2469 return 1;
2470 }
2471
2472 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2473 back chain unwinding. Helper for s390_frame_unwind_cache. */
2474
2475 static void
2476 s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
2477 struct s390_unwind_cache *info)
2478 {
2479 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2480 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2481 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2482 CORE_ADDR backchain;
2483 ULONGEST reg;
2484 LONGEST sp, tmp;
2485 int i;
2486
2487 /* Set up ABI call-saved/call-clobbered registers. */
2488 for (i = 0; i < S390_NUM_REGS; i++)
2489 if (!s390_register_call_saved (gdbarch, i))
2490 trad_frame_set_unknown (info->saved_regs, i);
2491
2492 /* CC is always call-clobbered. */
2493 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2494
2495 /* Get the backchain. */
2496 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2497 if (!safe_read_memory_integer (reg, word_size, byte_order, &tmp))
2498 tmp = 0;
2499 backchain = (CORE_ADDR) tmp;
2500
2501 /* A zero backchain terminates the frame chain. As additional
2502 sanity check, let's verify that the spill slot for SP in the
2503 save area pointed to by the backchain in fact links back to
2504 the save area. */
2505 if (backchain != 0
2506 && safe_read_memory_integer (backchain + 15*word_size,
2507 word_size, byte_order, &sp)
2508 && (CORE_ADDR)sp == backchain)
2509 {
2510 /* We don't know which registers were saved, but it will have
2511 to be at least %r14 and %r15. This will allow us to continue
2512 unwinding, but other prev-frame registers may be incorrect ... */
2513 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2514 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2515
2516 /* Function return will set PC to %r14. */
2517 info->saved_regs[S390_PSWA_REGNUM]
2518 = info->saved_regs[S390_RETADDR_REGNUM];
2519
2520 /* We use the current value of the frame register as local_base,
2521 and the top of the register save area as frame_base. */
2522 info->frame_base = backchain + 16*word_size + 32;
2523 info->local_base = reg;
2524 }
2525
2526 info->func = get_frame_pc (this_frame);
2527 }
2528
2529 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2530 s390_frame_unwind and s390_frame_base. */
2531
2532 static struct s390_unwind_cache *
2533 s390_frame_unwind_cache (struct frame_info *this_frame,
2534 void **this_prologue_cache)
2535 {
2536 struct s390_unwind_cache *info;
2537
2538 if (*this_prologue_cache)
2539 return (struct s390_unwind_cache *) *this_prologue_cache;
2540
2541 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2542 *this_prologue_cache = info;
2543 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2544 info->func = -1;
2545 info->frame_base = -1;
2546 info->local_base = -1;
2547
2548 TRY
2549 {
2550 /* Try to use prologue analysis to fill the unwind cache.
2551 If this fails, fall back to reading the stack backchain. */
2552 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2553 s390_backchain_frame_unwind_cache (this_frame, info);
2554 }
2555 CATCH (ex, RETURN_MASK_ERROR)
2556 {
2557 if (ex.error != NOT_AVAILABLE_ERROR)
2558 throw_exception (ex);
2559 }
2560 END_CATCH
2561
2562 return info;
2563 }
2564
2565 /* Implement this_id frame_unwind method for s390_frame_unwind. */
2566
2567 static void
2568 s390_frame_this_id (struct frame_info *this_frame,
2569 void **this_prologue_cache,
2570 struct frame_id *this_id)
2571 {
2572 struct s390_unwind_cache *info
2573 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2574
2575 if (info->frame_base == -1)
2576 {
2577 if (info->func != -1)
2578 *this_id = frame_id_build_unavailable_stack (info->func);
2579 return;
2580 }
2581
2582 *this_id = frame_id_build (info->frame_base, info->func);
2583 }
2584
2585 /* Implement prev_register frame_unwind method for s390_frame_unwind. */
2586
2587 static struct value *
2588 s390_frame_prev_register (struct frame_info *this_frame,
2589 void **this_prologue_cache, int regnum)
2590 {
2591 struct s390_unwind_cache *info
2592 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2593
2594 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2595 }
2596
2597 /* Default S390 frame unwinder. */
2598
2599 static const struct frame_unwind s390_frame_unwind = {
2600 NORMAL_FRAME,
2601 default_frame_unwind_stop_reason,
2602 s390_frame_this_id,
2603 s390_frame_prev_register,
2604 NULL,
2605 default_frame_sniffer
2606 };
2607
2608 /* Code stubs and their stack frames. For things like PLTs and NULL
2609 function calls (where there is no true frame and the return address
2610 is in the RETADDR register). */
2611
2612 struct s390_stub_unwind_cache
2613 {
2614 CORE_ADDR frame_base;
2615 struct trad_frame_saved_reg *saved_regs;
2616 };
2617
2618 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2619 s390_stub_frame_unwind. */
2620
2621 static struct s390_stub_unwind_cache *
2622 s390_stub_frame_unwind_cache (struct frame_info *this_frame,
2623 void **this_prologue_cache)
2624 {
2625 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2626 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2627 struct s390_stub_unwind_cache *info;
2628 ULONGEST reg;
2629
2630 if (*this_prologue_cache)
2631 return (struct s390_stub_unwind_cache *) *this_prologue_cache;
2632
2633 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
2634 *this_prologue_cache = info;
2635 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2636
2637 /* The return address is in register %r14. */
2638 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2639
2640 /* Retrieve stack pointer and determine our frame base. */
2641 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2642 info->frame_base = reg + 16*word_size + 32;
2643
2644 return info;
2645 }
2646
2647 /* Implement this_id frame_unwind method for s390_stub_frame_unwind. */
2648
2649 static void
2650 s390_stub_frame_this_id (struct frame_info *this_frame,
2651 void **this_prologue_cache,
2652 struct frame_id *this_id)
2653 {
2654 struct s390_stub_unwind_cache *info
2655 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2656 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
2657 }
2658
2659 /* Implement prev_register frame_unwind method for s390_stub_frame_unwind. */
2660
2661 static struct value *
2662 s390_stub_frame_prev_register (struct frame_info *this_frame,
2663 void **this_prologue_cache, int regnum)
2664 {
2665 struct s390_stub_unwind_cache *info
2666 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2667 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2668 }
2669
2670 /* Implement sniffer frame_unwind method for s390_stub_frame_unwind. */
2671
2672 static int
2673 s390_stub_frame_sniffer (const struct frame_unwind *self,
2674 struct frame_info *this_frame,
2675 void **this_prologue_cache)
2676 {
2677 CORE_ADDR addr_in_block;
2678 bfd_byte insn[S390_MAX_INSTR_SIZE];
2679
2680 /* If the current PC points to non-readable memory, we assume we
2681 have trapped due to an invalid function pointer call. We handle
2682 the non-existing current function like a PLT stub. */
2683 addr_in_block = get_frame_address_in_block (this_frame);
2684 if (in_plt_section (addr_in_block)
2685 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2686 return 1;
2687 return 0;
2688 }
2689
2690 /* S390 stub frame unwinder. */
2691
2692 static const struct frame_unwind s390_stub_frame_unwind = {
2693 NORMAL_FRAME,
2694 default_frame_unwind_stop_reason,
2695 s390_stub_frame_this_id,
2696 s390_stub_frame_prev_register,
2697 NULL,
2698 s390_stub_frame_sniffer
2699 };
2700
2701 /* Frame base handling. */
2702
2703 static CORE_ADDR
2704 s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
2705 {
2706 struct s390_unwind_cache *info
2707 = s390_frame_unwind_cache (this_frame, this_cache);
2708 return info->frame_base;
2709 }
2710
2711 static CORE_ADDR
2712 s390_local_base_address (struct frame_info *this_frame, void **this_cache)
2713 {
2714 struct s390_unwind_cache *info
2715 = s390_frame_unwind_cache (this_frame, this_cache);
2716 return info->local_base;
2717 }
2718
2719 static const struct frame_base s390_frame_base = {
2720 &s390_frame_unwind,
2721 s390_frame_base_address,
2722 s390_local_base_address,
2723 s390_local_base_address
2724 };
2725
2726 /* Process record-replay */
2727
2728 /* Takes the intermediate sum of address calculations and masks off upper
2729 bits according to current addressing mode. */
2730
2731 static CORE_ADDR
2732 s390_record_address_mask (struct gdbarch *gdbarch, struct regcache *regcache,
2733 CORE_ADDR val)
2734 {
2735 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2736 ULONGEST pswm, pswa;
2737 int am;
2738 if (tdep->abi == ABI_LINUX_S390)
2739 {
2740 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2741 am = pswa >> 31 & 1;
2742 }
2743 else
2744 {
2745 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &pswm);
2746 am = pswm >> 31 & 3;
2747 }
2748 switch (am)
2749 {
2750 case 0:
2751 return val & 0xffffff;
2752 case 1:
2753 return val & 0x7fffffff;
2754 case 3:
2755 return val;
2756 default:
2757 fprintf_unfiltered (gdb_stdlog, "Warning: Addressing mode %d used.", am);
2758 return 0;
2759 }
2760 }
2761
2762 /* Calculates memory address using pre-calculated index, raw instruction word
2763 with b and d/dl fields, and raw instruction byte with dh field. Index and
2764 dh should be set to 0 if unused. */
2765
2766 static CORE_ADDR
2767 s390_record_calc_disp_common (struct gdbarch *gdbarch, struct regcache *regcache,
2768 ULONGEST x, uint16_t bd, int8_t dh)
2769 {
2770 uint8_t rb = bd >> 12 & 0xf;
2771 int32_t d = (bd & 0xfff) | ((int32_t)dh << 12);
2772 ULONGEST b;
2773 CORE_ADDR res = d + x;
2774 if (rb)
2775 {
2776 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rb, &b);
2777 res += b;
2778 }
2779 return s390_record_address_mask (gdbarch, regcache, res);
2780 }
2781
2782 /* Calculates memory address using raw x, b + d/dl, dh fields from
2783 instruction. rx and dh should be set to 0 if unused. */
2784
2785 static CORE_ADDR
2786 s390_record_calc_disp (struct gdbarch *gdbarch, struct regcache *regcache,
2787 uint8_t rx, uint16_t bd, int8_t dh)
2788 {
2789 ULONGEST x = 0;
2790 if (rx)
2791 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rx, &x);
2792 return s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2793 }
2794
2795 /* Calculates memory address for VSCE[GF] instructions. */
2796
2797 static int
2798 s390_record_calc_disp_vsce (struct gdbarch *gdbarch, struct regcache *regcache,
2799 uint8_t vx, uint8_t el, uint8_t es, uint16_t bd,
2800 int8_t dh, CORE_ADDR *res)
2801 {
2802 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2803 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2804 ULONGEST x;
2805 gdb_byte buf[16];
2806 if (tdep->v0_full_regnum == -1 || el * es >= 16)
2807 return -1;
2808 if (vx < 16)
2809 regcache->cooked_read (tdep->v0_full_regnum + vx, buf);
2810 else
2811 regcache->raw_read (S390_V16_REGNUM + vx - 16, buf);
2812 x = extract_unsigned_integer (buf + el * es, es, byte_order);
2813 *res = s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2814 return 0;
2815 }
2816
2817 /* Calculates memory address for instructions with relative long addressing. */
2818
2819 static CORE_ADDR
2820 s390_record_calc_rl (struct gdbarch *gdbarch, struct regcache *regcache,
2821 CORE_ADDR addr, uint16_t i1, uint16_t i2)
2822 {
2823 int32_t ri = i1 << 16 | i2;
2824 return s390_record_address_mask (gdbarch, regcache, addr + (LONGEST)ri * 2);
2825 }
2826
2827 /* Population count helper. */
2828
2829 static int s390_popcnt (unsigned int x) {
2830 int res = 0;
2831 while (x)
2832 {
2833 if (x & 1)
2834 res++;
2835 x >>= 1;
2836 }
2837 return res;
2838 }
2839
2840 /* Record 64-bit register. */
2841
2842 static int
2843 s390_record_gpr_g (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2844 {
2845 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2846 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2847 return -1;
2848 if (tdep->abi == ABI_LINUX_S390)
2849 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2850 return -1;
2851 return 0;
2852 }
2853
2854 /* Record high 32 bits of a register. */
2855
2856 static int
2857 s390_record_gpr_h (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2858 {
2859 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2860 if (tdep->abi == ABI_LINUX_S390)
2861 {
2862 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2863 return -1;
2864 }
2865 else
2866 {
2867 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2868 return -1;
2869 }
2870 return 0;
2871 }
2872
2873 /* Record vector register. */
2874
2875 static int
2876 s390_record_vr (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2877 {
2878 if (i < 16)
2879 {
2880 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
2881 return -1;
2882 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
2883 return -1;
2884 }
2885 else
2886 {
2887 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i - 16))
2888 return -1;
2889 }
2890 return 0;
2891 }
2892
2893 /* Implement process_record gdbarch method. */
2894
2895 static int
2896 s390_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
2897 CORE_ADDR addr)
2898 {
2899 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2900 uint16_t insn[3] = {0};
2901 /* Instruction as bytes. */
2902 uint8_t ibyte[6];
2903 /* Instruction as nibbles. */
2904 uint8_t inib[12];
2905 /* Instruction vector registers. */
2906 uint8_t ivec[4];
2907 CORE_ADDR oaddr, oaddr2, oaddr3;
2908 ULONGEST tmp;
2909 int i, n;
2910 /* if EX/EXRL instruction used, here's the reg parameter */
2911 int ex = -1;
2912 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2913
2914 /* Attempting to use EX or EXRL jumps back here */
2915 ex:
2916
2917 /* Read instruction. */
2918 insn[0] = read_memory_unsigned_integer (addr, 2, byte_order);
2919 /* If execute was involved, do the adjustment. */
2920 if (ex != -1)
2921 insn[0] |= ex & 0xff;
2922 /* Two highest bits determine instruction size. */
2923 if (insn[0] >= 0x4000)
2924 insn[1] = read_memory_unsigned_integer (addr+2, 2, byte_order);
2925 else
2926 /* Not necessary, but avoids uninitialized variable warnings. */
2927 insn[1] = 0;
2928 if (insn[0] >= 0xc000)
2929 insn[2] = read_memory_unsigned_integer (addr+4, 2, byte_order);
2930 else
2931 insn[2] = 0;
2932 /* Split instruction into bytes and nibbles. */
2933 for (i = 0; i < 3; i++)
2934 {
2935 ibyte[i*2] = insn[i] >> 8 & 0xff;
2936 ibyte[i*2+1] = insn[i] & 0xff;
2937 }
2938 for (i = 0; i < 6; i++)
2939 {
2940 inib[i*2] = ibyte[i] >> 4 & 0xf;
2941 inib[i*2+1] = ibyte[i] & 0xf;
2942 }
2943 /* Compute vector registers, if applicable. */
2944 ivec[0] = (inib[9] >> 3 & 1) << 4 | inib[2];
2945 ivec[1] = (inib[9] >> 2 & 1) << 4 | inib[3];
2946 ivec[2] = (inib[9] >> 1 & 1) << 4 | inib[4];
2947 ivec[3] = (inib[9] >> 0 & 1) << 4 | inib[8];
2948
2949 switch (ibyte[0])
2950 {
2951 /* 0x00 undefined */
2952
2953 case 0x01:
2954 /* E-format instruction */
2955 switch (ibyte[1])
2956 {
2957 /* 0x00 undefined */
2958 /* 0x01 unsupported: PR - program return */
2959 /* 0x02 unsupported: UPT */
2960 /* 0x03 undefined */
2961 /* 0x04 privileged: PTFF - perform timing facility function */
2962 /* 0x05-0x06 undefined */
2963 /* 0x07 privileged: SCKPF - set clock programmable field */
2964 /* 0x08-0x09 undefined */
2965
2966 case 0x0a: /* PFPO - perform floating point operation */
2967 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
2968 if (!(tmp & 0x80000000u))
2969 {
2970 uint8_t ofc = tmp >> 16 & 0xff;
2971 switch (ofc)
2972 {
2973 case 0x00: /* HFP32 */
2974 case 0x01: /* HFP64 */
2975 case 0x05: /* BFP32 */
2976 case 0x06: /* BFP64 */
2977 case 0x08: /* DFP32 */
2978 case 0x09: /* DFP64 */
2979 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
2980 return -1;
2981 break;
2982 case 0x02: /* HFP128 */
2983 case 0x07: /* BFP128 */
2984 case 0x0a: /* DFP128 */
2985 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
2986 return -1;
2987 if (record_full_arch_list_add_reg (regcache, S390_F2_REGNUM))
2988 return -1;
2989 break;
2990 default:
2991 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PFPO OFC %02x at %s.\n",
2992 ofc, paddress (gdbarch, addr));
2993 return -1;
2994 }
2995
2996 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
2997 return -1;
2998 }
2999 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3000 return -1;
3001 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3002 return -1;
3003 break;
3004
3005 case 0x0b: /* TAM - test address mode */
3006 case 0x0c: /* SAM24 - set address mode 24 */
3007 case 0x0d: /* SAM31 - set address mode 31 */
3008 case 0x0e: /* SAM64 - set address mode 64 */
3009 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3010 return -1;
3011 break;
3012
3013 /* 0x0f-0xfe undefined */
3014
3015 /* 0xff unsupported: TRAP */
3016
3017 default:
3018 goto UNKNOWN_OP;
3019 }
3020 break;
3021
3022 /* 0x02 undefined */
3023 /* 0x03 undefined */
3024
3025 case 0x04: /* SPM - set program mask */
3026 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3027 return -1;
3028 break;
3029
3030 case 0x05: /* BALR - branch and link */
3031 case 0x45: /* BAL - branch and link */
3032 case 0x06: /* BCTR - branch on count */
3033 case 0x46: /* BCT - branch on count */
3034 case 0x0d: /* BASR - branch and save */
3035 case 0x4d: /* BAS - branch and save */
3036 case 0x84: /* BRXH - branch relative on index high */
3037 case 0x85: /* BRXLE - branch relative on index low or equal */
3038 case 0x86: /* BXH - branch on index high */
3039 case 0x87: /* BXLE - branch on index low or equal */
3040 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3041 use 32-bit destination as counter. */
3042 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3043 return -1;
3044 break;
3045
3046 case 0x07: /* BCR - branch on condition */
3047 case 0x47: /* BC - branch on condition */
3048 /* No effect other than PC transfer. */
3049 break;
3050
3051 /* 0x08 undefined */
3052 /* 0x09 undefined */
3053
3054 case 0x0a:
3055 /* SVC - supervisor call */
3056 if (tdep->s390_syscall_record != NULL)
3057 {
3058 if (tdep->s390_syscall_record (regcache, ibyte[1]))
3059 return -1;
3060 }
3061 else
3062 {
3063 printf_unfiltered (_("no syscall record support\n"));
3064 return -1;
3065 }
3066 break;
3067
3068 case 0x0b: /* BSM - branch and set mode */
3069 if (inib[2])
3070 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3071 return -1;
3072 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3073 return -1;
3074 break;
3075
3076 case 0x0c: /* BASSM - branch and save and set mode */
3077 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3078 return -1;
3079 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3080 return -1;
3081 break;
3082
3083 case 0x0e: /* MVCL - move long [interruptible] */
3084 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3085 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3086 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3087 tmp &= 0xffffff;
3088 if (record_full_arch_list_add_mem (oaddr, tmp))
3089 return -1;
3090 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3091 return -1;
3092 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3093 return -1;
3094 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3095 return -1;
3096 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3097 return -1;
3098 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3099 return -1;
3100 break;
3101
3102 case 0x0f: /* CLCL - compare logical long [interruptible] */
3103 case 0xa9: /* CLCLE - compare logical long extended [partial] */
3104 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3105 return -1;
3106 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3107 return -1;
3108 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3109 return -1;
3110 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3111 return -1;
3112 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3113 return -1;
3114 break;
3115
3116 case 0x10: /* LPR - load positive */
3117 case 0x11: /* LNR - load negative */
3118 case 0x12: /* LTR - load and test */
3119 case 0x13: /* LCR - load complement */
3120 case 0x14: /* NR - and */
3121 case 0x16: /* OR - or */
3122 case 0x17: /* XR - xor */
3123 case 0x1a: /* AR - add */
3124 case 0x1b: /* SR - subtract */
3125 case 0x1e: /* ALR - add logical */
3126 case 0x1f: /* SLR - subtract logical */
3127 case 0x54: /* N - and */
3128 case 0x56: /* O - or */
3129 case 0x57: /* X - xor */
3130 case 0x5a: /* A - add */
3131 case 0x5b: /* S - subtract */
3132 case 0x5e: /* AL - add logical */
3133 case 0x5f: /* SL - subtract logical */
3134 case 0x4a: /* AH - add halfword */
3135 case 0x4b: /* SH - subtract halfword */
3136 case 0x8a: /* SRA - shift right single */
3137 case 0x8b: /* SLA - shift left single */
3138 case 0xbf: /* ICM - insert characters under mask */
3139 /* 32-bit destination + flags */
3140 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3141 return -1;
3142 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3143 return -1;
3144 break;
3145
3146 case 0x15: /* CLR - compare logical */
3147 case 0x55: /* CL - compare logical */
3148 case 0x19: /* CR - compare */
3149 case 0x29: /* CDR - compare */
3150 case 0x39: /* CER - compare */
3151 case 0x49: /* CH - compare halfword */
3152 case 0x59: /* C - compare */
3153 case 0x69: /* CD - compare */
3154 case 0x79: /* CE - compare */
3155 case 0x91: /* TM - test under mask */
3156 case 0x95: /* CLI - compare logical */
3157 case 0xbd: /* CLM - compare logical under mask */
3158 case 0xd5: /* CLC - compare logical */
3159 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3160 return -1;
3161 break;
3162
3163 case 0x18: /* LR - load */
3164 case 0x48: /* LH - load halfword */
3165 case 0x58: /* L - load */
3166 case 0x41: /* LA - load address */
3167 case 0x43: /* IC - insert character */
3168 case 0x4c: /* MH - multiply halfword */
3169 case 0x71: /* MS - multiply single */
3170 case 0x88: /* SRL - shift right single logical */
3171 case 0x89: /* SLL - shift left single logical */
3172 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
3173 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3174 return -1;
3175 break;
3176
3177 case 0x1c: /* MR - multiply */
3178 case 0x5c: /* M - multiply */
3179 case 0x1d: /* DR - divide */
3180 case 0x5d: /* D - divide */
3181 case 0x8c: /* SRDL - shift right double logical */
3182 case 0x8d: /* SLDL - shift left double logical */
3183 /* 32-bit pair destination, no flags */
3184 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3185 return -1;
3186 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3187 return -1;
3188 break;
3189
3190 case 0x20: /* LPDR - load positive */
3191 case 0x30: /* LPER - load positive */
3192 case 0x21: /* LNDR - load negative */
3193 case 0x31: /* LNER - load negative */
3194 case 0x22: /* LTDR - load and test */
3195 case 0x32: /* LTER - load and test */
3196 case 0x23: /* LCDR - load complement */
3197 case 0x33: /* LCER - load complement */
3198 case 0x2a: /* ADR - add */
3199 case 0x3a: /* AER - add */
3200 case 0x6a: /* AD - add */
3201 case 0x7a: /* AE - add */
3202 case 0x2b: /* SDR - subtract */
3203 case 0x3b: /* SER - subtract */
3204 case 0x6b: /* SD - subtract */
3205 case 0x7b: /* SE - subtract */
3206 case 0x2e: /* AWR - add unnormalized */
3207 case 0x3e: /* AUR - add unnormalized */
3208 case 0x6e: /* AW - add unnormalized */
3209 case 0x7e: /* AU - add unnormalized */
3210 case 0x2f: /* SWR - subtract unnormalized */
3211 case 0x3f: /* SUR - subtract unnormalized */
3212 case 0x6f: /* SW - subtract unnormalized */
3213 case 0x7f: /* SU - subtract unnormalized */
3214 /* float destination + flags */
3215 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3216 return -1;
3217 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3218 return -1;
3219 break;
3220
3221 case 0x24: /* HDR - halve */
3222 case 0x34: /* HER - halve */
3223 case 0x25: /* LDXR - load rounded */
3224 case 0x35: /* LEDR - load rounded */
3225 case 0x28: /* LDR - load */
3226 case 0x38: /* LER - load */
3227 case 0x68: /* LD - load */
3228 case 0x78: /* LE - load */
3229 case 0x2c: /* MDR - multiply */
3230 case 0x3c: /* MDER - multiply */
3231 case 0x6c: /* MD - multiply */
3232 case 0x7c: /* MDE - multiply */
3233 case 0x2d: /* DDR - divide */
3234 case 0x3d: /* DER - divide */
3235 case 0x6d: /* DD - divide */
3236 case 0x7d: /* DE - divide */
3237 /* float destination, no flags */
3238 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3239 return -1;
3240 break;
3241
3242 case 0x26: /* MXR - multiply */
3243 case 0x27: /* MXDR - multiply */
3244 case 0x67: /* MXD - multiply */
3245 /* float pair destination, no flags */
3246 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3247 return -1;
3248 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3249 return -1;
3250 break;
3251
3252 case 0x36: /* AXR - add */
3253 case 0x37: /* SXR - subtract */
3254 /* float pair destination + flags */
3255 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3256 return -1;
3257 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3258 return -1;
3259 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3260 return -1;
3261 break;
3262
3263 case 0x40: /* STH - store halfword */
3264 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3265 if (record_full_arch_list_add_mem (oaddr, 2))
3266 return -1;
3267 break;
3268
3269 case 0x42: /* STC - store character */
3270 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3271 if (record_full_arch_list_add_mem (oaddr, 1))
3272 return -1;
3273 break;
3274
3275 case 0x44: /* EX - execute */
3276 if (ex != -1)
3277 {
3278 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
3279 paddress (gdbarch, addr));
3280 return -1;
3281 }
3282 addr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3283 if (inib[2])
3284 {
3285 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3286 ex = tmp & 0xff;
3287 }
3288 else
3289 {
3290 ex = 0;
3291 }
3292 goto ex;
3293
3294 case 0x4e: /* CVD - convert to decimal */
3295 case 0x60: /* STD - store */
3296 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3297 if (record_full_arch_list_add_mem (oaddr, 8))
3298 return -1;
3299 break;
3300
3301 case 0x4f: /* CVB - convert to binary */
3302 /* 32-bit gpr destination + FPC (DXC write) */
3303 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3304 return -1;
3305 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3306 return -1;
3307 break;
3308
3309 case 0x50: /* ST - store */
3310 case 0x70: /* STE - store */
3311 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3312 if (record_full_arch_list_add_mem (oaddr, 4))
3313 return -1;
3314 break;
3315
3316 case 0x51: /* LAE - load address extended */
3317 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3318 return -1;
3319 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
3320 return -1;
3321 break;
3322
3323 /* 0x52 undefined */
3324 /* 0x53 undefined */
3325
3326 /* 0x61-0x66 undefined */
3327
3328 /* 0x72-0x77 undefined */
3329
3330 /* 0x80 privileged: SSM - set system mask */
3331 /* 0x81 undefined */
3332 /* 0x82 privileged: LPSW - load PSW */
3333 /* 0x83 privileged: diagnose */
3334
3335 case 0x8e: /* SRDA - shift right double */
3336 case 0x8f: /* SLDA - shift left double */
3337 /* 32-bit pair destination + flags */
3338 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3339 return -1;
3340 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3341 return -1;
3342 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3343 return -1;
3344 break;
3345
3346 case 0x90: /* STM - store multiple */
3347 case 0x9b: /* STAM - store access multiple */
3348 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3349 if (inib[2] <= inib[3])
3350 n = inib[3] - inib[2] + 1;
3351 else
3352 n = inib[3] + 0x10 - inib[2] + 1;
3353 if (record_full_arch_list_add_mem (oaddr, n * 4))
3354 return -1;
3355 break;
3356
3357 case 0x92: /* MVI - move */
3358 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3359 if (record_full_arch_list_add_mem (oaddr, 1))
3360 return -1;
3361 break;
3362
3363 case 0x93: /* TS - test and set */
3364 case 0x94: /* NI - and */
3365 case 0x96: /* OI - or */
3366 case 0x97: /* XI - xor */
3367 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3368 if (record_full_arch_list_add_mem (oaddr, 1))
3369 return -1;
3370 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3371 return -1;
3372 break;
3373
3374 case 0x98: /* LM - load multiple */
3375 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3376 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3377 return -1;
3378 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3379 return -1;
3380 break;
3381
3382 /* 0x99 privileged: TRACE */
3383
3384 case 0x9a: /* LAM - load access multiple */
3385 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3386 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
3387 return -1;
3388 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
3389 return -1;
3390 break;
3391
3392 /* 0x9c-0x9f privileged and obsolete (old I/O) */
3393 /* 0xa0-0xa4 undefined */
3394
3395 case 0xa5:
3396 case 0xa7:
3397 /* RI-format instruction */
3398 switch (ibyte[0] << 4 | inib[3])
3399 {
3400 case 0xa50: /* IIHH - insert immediate */
3401 case 0xa51: /* IIHL - insert immediate */
3402 /* high 32-bit destination */
3403 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3404 return -1;
3405 break;
3406
3407 case 0xa52: /* IILH - insert immediate */
3408 case 0xa53: /* IILL - insert immediate */
3409 case 0xa75: /* BRAS - branch relative and save */
3410 case 0xa76: /* BRCT - branch relative on count */
3411 case 0xa78: /* LHI - load halfword immediate */
3412 case 0xa7c: /* MHI - multiply halfword immediate */
3413 /* 32-bit or native destination */
3414 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3415 return -1;
3416 break;
3417
3418 case 0xa54: /* NIHH - and immediate */
3419 case 0xa55: /* NIHL - and immediate */
3420 case 0xa58: /* OIHH - or immediate */
3421 case 0xa59: /* OIHL - or immediate */
3422 /* high 32-bit destination + flags */
3423 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3424 return -1;
3425 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3426 return -1;
3427 break;
3428
3429 case 0xa56: /* NILH - and immediate */
3430 case 0xa57: /* NILL - and immediate */
3431 case 0xa5a: /* OILH - or immediate */
3432 case 0xa5b: /* OILL - or immediate */
3433 case 0xa7a: /* AHI - add halfword immediate */
3434 /* 32-bit destination + flags */
3435 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3436 return -1;
3437 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3438 return -1;
3439 break;
3440
3441 case 0xa5c: /* LLIHH - load logical immediate */
3442 case 0xa5d: /* LLIHL - load logical immediate */
3443 case 0xa5e: /* LLILH - load logical immediate */
3444 case 0xa5f: /* LLILL - load logical immediate */
3445 case 0xa77: /* BRCTG - branch relative on count */
3446 case 0xa79: /* LGHI - load halfword immediate */
3447 case 0xa7d: /* MGHI - multiply halfword immediate */
3448 /* 64-bit destination */
3449 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3450 return -1;
3451 break;
3452
3453 case 0xa70: /* TMLH - test under mask */
3454 case 0xa71: /* TMLL - test under mask */
3455 case 0xa72: /* TMHH - test under mask */
3456 case 0xa73: /* TMHL - test under mask */
3457 case 0xa7e: /* CHI - compare halfword immediate */
3458 case 0xa7f: /* CGHI - compare halfword immediate */
3459 /* flags only */
3460 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3461 return -1;
3462 break;
3463
3464 case 0xa74: /* BRC - branch relative on condition */
3465 /* no register change */
3466 break;
3467
3468 case 0xa7b: /* AGHI - add halfword immediate */
3469 /* 64-bit destination + flags */
3470 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3471 return -1;
3472 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3473 return -1;
3474 break;
3475
3476 default:
3477 goto UNKNOWN_OP;
3478 }
3479 break;
3480
3481 /* 0xa6 undefined */
3482
3483 case 0xa8: /* MVCLE - move long extended [partial] */
3484 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3485 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3486 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3487 if (record_full_arch_list_add_mem (oaddr, tmp))
3488 return -1;
3489 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3490 return -1;
3491 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3492 return -1;
3493 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3494 return -1;
3495 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3496 return -1;
3497 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3498 return -1;
3499 break;
3500
3501 /* 0xaa-0xab undefined */
3502 /* 0xac privileged: STNSM - store then and system mask */
3503 /* 0xad privileged: STOSM - store then or system mask */
3504 /* 0xae privileged: SIGP - signal processor */
3505 /* 0xaf unsupported: MC - monitor call */
3506 /* 0xb0 undefined */
3507 /* 0xb1 privileged: LRA - load real address */
3508
3509 case 0xb2:
3510 case 0xb3:
3511 case 0xb9:
3512 /* S/RRD/RRE/RRF/IE-format instruction */
3513 switch (insn[0])
3514 {
3515 /* 0xb200-0xb204 undefined or privileged */
3516
3517 case 0xb205: /* STCK - store clock */
3518 case 0xb27c: /* STCKF - store clock fast */
3519 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3520 if (record_full_arch_list_add_mem (oaddr, 8))
3521 return -1;
3522 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3523 return -1;
3524 break;
3525
3526 /* 0xb206-0xb219 undefined, privileged, or unsupported */
3527 /* 0xb21a unsupported: CFC */
3528 /* 0xb21b-0xb221 undefined or privileged */
3529
3530 case 0xb222: /* IPM - insert program mask */
3531 case 0xb24f: /* EAR - extract access */
3532 case 0xb252: /* MSR - multiply single */
3533 case 0xb2ec: /* ETND - extract transaction nesting depth */
3534 case 0xb38c: /* EFPC - extract fpc */
3535 case 0xb91f: /* LRVR - load reversed */
3536 case 0xb926: /* LBR - load byte */
3537 case 0xb927: /* LHR - load halfword */
3538 case 0xb994: /* LLCR - load logical character */
3539 case 0xb995: /* LLHR - load logical halfword */
3540 case 0xb9f2: /* LOCR - load on condition */
3541 /* 32-bit gpr destination */
3542 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3543 return -1;
3544 break;
3545
3546 /* 0xb223-0xb22c privileged or unsupported */
3547
3548 case 0xb22d: /* DXR - divide */
3549 case 0xb325: /* LXDR - load lengthened */
3550 case 0xb326: /* LXER - load lengthened */
3551 case 0xb336: /* SQXR - square root */
3552 case 0xb365: /* LXR - load */
3553 case 0xb367: /* FIXR - load fp integer */
3554 case 0xb376: /* LZXR - load zero */
3555 case 0xb3b6: /* CXFR - convert from fixed */
3556 case 0xb3c6: /* CXGR - convert from fixed */
3557 case 0xb3fe: /* IEXTR - insert biased exponent */
3558 /* float pair destination */
3559 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3560 return -1;
3561 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3562 return -1;
3563 break;
3564
3565 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
3566
3567 case 0xb241: /* CKSM - checksum [partial] */
3568 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3569 return -1;
3570 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3571 return -1;
3572 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3573 return -1;
3574 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3575 return -1;
3576 break;
3577
3578 /* 0xb242-0xb243 undefined */
3579
3580 case 0xb244: /* SQDR - square root */
3581 case 0xb245: /* SQER - square root */
3582 case 0xb324: /* LDER - load lengthened */
3583 case 0xb337: /* MEER - multiply */
3584 case 0xb366: /* LEXR - load rounded */
3585 case 0xb370: /* LPDFR - load positive */
3586 case 0xb371: /* LNDFR - load negative */
3587 case 0xb372: /* CSDFR - copy sign */
3588 case 0xb373: /* LCDFR - load complement */
3589 case 0xb374: /* LZER - load zero */
3590 case 0xb375: /* LZDR - load zero */
3591 case 0xb377: /* FIER - load fp integer */
3592 case 0xb37f: /* FIDR - load fp integer */
3593 case 0xb3b4: /* CEFR - convert from fixed */
3594 case 0xb3b5: /* CDFR - convert from fixed */
3595 case 0xb3c1: /* LDGR - load fpr from gr */
3596 case 0xb3c4: /* CEGR - convert from fixed */
3597 case 0xb3c5: /* CDGR - convert from fixed */
3598 case 0xb3f6: /* IEDTR - insert biased exponent */
3599 /* float destination */
3600 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3601 return -1;
3602 break;
3603
3604 /* 0xb246-0xb24c: privileged or unsupported */
3605
3606 case 0xb24d: /* CPYA - copy access */
3607 case 0xb24e: /* SAR - set access */
3608 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[6]))
3609 return -1;
3610 break;
3611
3612 /* 0xb250-0xb251 undefined or privileged */
3613 /* 0xb253-0xb254 undefined or privileged */
3614
3615 case 0xb255: /* MVST - move string [partial] */
3616 {
3617 uint8_t end;
3618 gdb_byte cur;
3619 ULONGEST num = 0;
3620 /* Read ending byte. */
3621 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3622 end = tmp & 0xff;
3623 /* Get address of second operand. */
3624 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[7], &tmp);
3625 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3626 /* Search for ending byte and compute length. */
3627 do {
3628 num++;
3629 if (target_read_memory (oaddr, &cur, 1))
3630 return -1;
3631 oaddr++;
3632 } while (cur != end);
3633 /* Get address of first operand and record it. */
3634 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3635 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3636 if (record_full_arch_list_add_mem (oaddr, num))
3637 return -1;
3638 /* Record the registers. */
3639 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3640 return -1;
3641 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3642 return -1;
3643 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3644 return -1;
3645 }
3646 break;
3647
3648 /* 0xb256 undefined */
3649
3650 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
3651 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3652 return -1;
3653 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3654 return -1;
3655 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3656 return -1;
3657 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3658 return -1;
3659 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3660 return -1;
3661 break;
3662
3663 /* 0xb258-0xb25c undefined, privileged, or unsupported */
3664
3665 case 0xb25d: /* CLST - compare logical string [partial] */
3666 case 0xb25e: /* SRST - search string [partial] */
3667 case 0xb9be: /* SRSTU - search string unicode [partial] */
3668 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3669 return -1;
3670 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3671 return -1;
3672 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3673 return -1;
3674 break;
3675
3676 /* 0xb25f-0xb262 undefined */
3677
3678 case 0xb263: /* CMPSC - compression call [interruptible] */
3679 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3680 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3681 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3682 if (record_full_arch_list_add_mem (oaddr, tmp))
3683 return -1;
3684 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3685 return -1;
3686 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3687 return -1;
3688 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3689 return -1;
3690 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3691 return -1;
3692 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3693 return -1;
3694 /* DXC may be written */
3695 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3696 return -1;
3697 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3698 return -1;
3699 break;
3700
3701 /* 0xb264-0xb277 undefined, privileged, or unsupported */
3702
3703 case 0xb278: /* STCKE - store clock extended */
3704 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3705 if (record_full_arch_list_add_mem (oaddr, 16))
3706 return -1;
3707 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3708 return -1;
3709 break;
3710
3711 /* 0xb279-0xb27b undefined or unsupported */
3712 /* 0xb27d-0xb298 undefined or privileged */
3713
3714 case 0xb299: /* SRNM - set rounding mode */
3715 case 0xb2b8: /* SRNMB - set bfp rounding mode */
3716 case 0xb2b9: /* SRNMT - set dfp rounding mode */
3717 case 0xb29d: /* LFPC - load fpc */
3718 case 0xb2bd: /* LFAS - load fpc and signal */
3719 case 0xb384: /* SFPC - set fpc */
3720 case 0xb385: /* SFASR - set fpc and signal */
3721 case 0xb960: /* CGRT - compare and trap */
3722 case 0xb961: /* CLGRT - compare logical and trap */
3723 case 0xb972: /* CRT - compare and trap */
3724 case 0xb973: /* CLRT - compare logical and trap */
3725 /* fpc only - including possible DXC write for trapping insns */
3726 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3727 return -1;
3728 break;
3729
3730 /* 0xb29a-0xb29b undefined */
3731
3732 case 0xb29c: /* STFPC - store fpc */
3733 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3734 if (record_full_arch_list_add_mem (oaddr, 4))
3735 return -1;
3736 break;
3737
3738 /* 0xb29e-0xb2a4 undefined */
3739
3740 case 0xb2a5: /* TRE - translate extended [partial] */
3741 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3742 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3743 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3744 if (record_full_arch_list_add_mem (oaddr, tmp))
3745 return -1;
3746 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3747 return -1;
3748 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3749 return -1;
3750 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3751 return -1;
3752 break;
3753
3754 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
3755 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
3756 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
3757 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
3758 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
3759 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
3760 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3761 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3762 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3763 if (record_full_arch_list_add_mem (oaddr, tmp))
3764 return -1;
3765 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3766 return -1;
3767 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3768 return -1;
3769 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3770 return -1;
3771 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3772 return -1;
3773 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3774 return -1;
3775 break;
3776
3777 /* 0xb2a8-0xb2af undefined */
3778
3779 case 0xb2b0: /* STFLE - store facility list extended */
3780 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3781 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3782 tmp &= 0xff;
3783 if (record_full_arch_list_add_mem (oaddr, 8 * (tmp + 1)))
3784 return -1;
3785 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM))
3786 return -1;
3787 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3788 return -1;
3789 break;
3790
3791 /* 0xb2b1-0xb2b7 undefined or privileged */
3792 /* 0xb2ba-0xb2bc undefined */
3793 /* 0xb2be-0xb2e7 undefined */
3794 /* 0xb2e9-0xb2eb undefined */
3795 /* 0xb2ed-0xb2f7 undefined */
3796 /* 0xb2f8 unsupported: TEND */
3797 /* 0xb2f9 undefined */
3798
3799 case 0xb2e8: /* PPA - perform processor assist */
3800 case 0xb2fa: /* NIAI - next instruction access intent */
3801 /* no visible effects */
3802 break;
3803
3804 /* 0xb2fb undefined */
3805 /* 0xb2fc unsupported: TABORT */
3806 /* 0xb2fd-0xb2fe undefined */
3807 /* 0xb2ff unsupported: TRAP */
3808
3809 case 0xb300: /* LPEBR - load positive */
3810 case 0xb301: /* LNEBR - load negative */
3811 case 0xb303: /* LCEBR - load complement */
3812 case 0xb310: /* LPDBR - load positive */
3813 case 0xb311: /* LNDBR - load negative */
3814 case 0xb313: /* LCDBR - load complement */
3815 case 0xb350: /* TBEDR - convert hfp to bfp */
3816 case 0xb351: /* TBDR - convert hfp to bfp */
3817 case 0xb358: /* THDER - convert bfp to hfp */
3818 case 0xb359: /* THDR - convert bfp to hfp */
3819 /* float destination + flags */
3820 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3821 return -1;
3822 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3823 return -1;
3824 break;
3825
3826 case 0xb304: /* LDEBR - load lengthened */
3827 case 0xb30c: /* MDEBR - multiply */
3828 case 0xb30d: /* DEBR - divide */
3829 case 0xb314: /* SQEBR - square root */
3830 case 0xb315: /* SQDBR - square root */
3831 case 0xb317: /* MEEBR - multiply */
3832 case 0xb31c: /* MDBR - multiply */
3833 case 0xb31d: /* DDBR - divide */
3834 case 0xb344: /* LEDBRA - load rounded */
3835 case 0xb345: /* LDXBRA - load rounded */
3836 case 0xb346: /* LEXBRA - load rounded */
3837 case 0xb357: /* FIEBRA - load fp integer */
3838 case 0xb35f: /* FIDBRA - load fp integer */
3839 case 0xb390: /* CELFBR - convert from logical */
3840 case 0xb391: /* CDLFBR - convert from logical */
3841 case 0xb394: /* CEFBR - convert from fixed */
3842 case 0xb395: /* CDFBR - convert from fixed */
3843 case 0xb3a0: /* CELGBR - convert from logical */
3844 case 0xb3a1: /* CDLGBR - convert from logical */
3845 case 0xb3a4: /* CEGBR - convert from fixed */
3846 case 0xb3a5: /* CDGBR - convert from fixed */
3847 case 0xb3d0: /* MDTR - multiply */
3848 case 0xb3d1: /* DDTR - divide */
3849 case 0xb3d4: /* LDETR - load lengthened */
3850 case 0xb3d5: /* LEDTR - load lengthened */
3851 case 0xb3d7: /* FIDTR - load fp integer */
3852 case 0xb3dd: /* LDXTR - load lengthened */
3853 case 0xb3f1: /* CDGTR - convert from fixed */
3854 case 0xb3f2: /* CDUTR - convert from unsigned packed */
3855 case 0xb3f3: /* CDSTR - convert from signed packed */
3856 case 0xb3f5: /* QADTR - quantize */
3857 case 0xb3f7: /* RRDTR - reround */
3858 case 0xb951: /* CDFTR - convert from fixed */
3859 case 0xb952: /* CDLGTR - convert from logical */
3860 case 0xb953: /* CDLFTR - convert from logical */
3861 /* float destination + fpc */
3862 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3863 return -1;
3864 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3865 return -1;
3866 break;
3867
3868 case 0xb305: /* LXDBR - load lengthened */
3869 case 0xb306: /* LXEBR - load lengthened */
3870 case 0xb307: /* MXDBR - multiply */
3871 case 0xb316: /* SQXBR - square root */
3872 case 0xb34c: /* MXBR - multiply */
3873 case 0xb34d: /* DXBR - divide */
3874 case 0xb347: /* FIXBRA - load fp integer */
3875 case 0xb392: /* CXLFBR - convert from logical */
3876 case 0xb396: /* CXFBR - convert from fixed */
3877 case 0xb3a2: /* CXLGBR - convert from logical */
3878 case 0xb3a6: /* CXGBR - convert from fixed */
3879 case 0xb3d8: /* MXTR - multiply */
3880 case 0xb3d9: /* DXTR - divide */
3881 case 0xb3dc: /* LXDTR - load lengthened */
3882 case 0xb3df: /* FIXTR - load fp integer */
3883 case 0xb3f9: /* CXGTR - convert from fixed */
3884 case 0xb3fa: /* CXUTR - convert from unsigned packed */
3885 case 0xb3fb: /* CXSTR - convert from signed packed */
3886 case 0xb3fd: /* QAXTR - quantize */
3887 case 0xb3ff: /* RRXTR - reround */
3888 case 0xb959: /* CXFTR - convert from fixed */
3889 case 0xb95a: /* CXLGTR - convert from logical */
3890 case 0xb95b: /* CXLFTR - convert from logical */
3891 /* float pair destination + fpc */
3892 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3893 return -1;
3894 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3895 return -1;
3896 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3897 return -1;
3898 break;
3899
3900 case 0xb308: /* KEBR - compare and signal */
3901 case 0xb309: /* CEBR - compare */
3902 case 0xb318: /* KDBR - compare and signal */
3903 case 0xb319: /* CDBR - compare */
3904 case 0xb348: /* KXBR - compare and signal */
3905 case 0xb349: /* CXBR - compare */
3906 case 0xb3e0: /* KDTR - compare and signal */
3907 case 0xb3e4: /* CDTR - compare */
3908 case 0xb3e8: /* KXTR - compare and signal */
3909 case 0xb3ec: /* CXTR - compare */
3910 /* flags + fpc only */
3911 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3912 return -1;
3913 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3914 return -1;
3915 break;
3916
3917 case 0xb302: /* LTEBR - load and test */
3918 case 0xb312: /* LTDBR - load and test */
3919 case 0xb30a: /* AEBR - add */
3920 case 0xb30b: /* SEBR - subtract */
3921 case 0xb31a: /* ADBR - add */
3922 case 0xb31b: /* SDBR - subtract */
3923 case 0xb3d2: /* ADTR - add */
3924 case 0xb3d3: /* SDTR - subtract */
3925 case 0xb3d6: /* LTDTR - load and test */
3926 /* float destination + flags + fpc */
3927 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3928 return -1;
3929 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3930 return -1;
3931 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3932 return -1;
3933 break;
3934
3935 case 0xb30e: /* MAEBR - multiply and add */
3936 case 0xb30f: /* MSEBR - multiply and subtract */
3937 case 0xb31e: /* MADBR - multiply and add */
3938 case 0xb31f: /* MSDBR - multiply and subtract */
3939 /* float destination [RRD] + fpc */
3940 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3941 return -1;
3942 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3943 return -1;
3944 break;
3945
3946 /* 0xb320-0xb323 undefined */
3947 /* 0xb327-0xb32d undefined */
3948
3949 case 0xb32e: /* MAER - multiply and add */
3950 case 0xb32f: /* MSER - multiply and subtract */
3951 case 0xb338: /* MAYLR - multiply and add unnormalized */
3952 case 0xb339: /* MYLR - multiply unnormalized */
3953 case 0xb33c: /* MAYHR - multiply and add unnormalized */
3954 case 0xb33d: /* MYHR - multiply unnormalized */
3955 case 0xb33e: /* MADR - multiply and add */
3956 case 0xb33f: /* MSDR - multiply and subtract */
3957 /* float destination [RRD] */
3958 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3959 return -1;
3960 break;
3961
3962 /* 0xb330-0xb335 undefined */
3963
3964 case 0xb33a: /* MAYR - multiply and add unnormalized */
3965 case 0xb33b: /* MYR - multiply unnormalized */
3966 /* float pair destination [RRD] */
3967 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3968 return -1;
3969 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
3970 return -1;
3971 break;
3972
3973 case 0xb340: /* LPXBR - load positive */
3974 case 0xb341: /* LNXBR - load negative */
3975 case 0xb343: /* LCXBR - load complement */
3976 case 0xb360: /* LPXR - load positive */
3977 case 0xb361: /* LNXR - load negative */
3978 case 0xb362: /* LTXR - load and test */
3979 case 0xb363: /* LCXR - load complement */
3980 /* float pair destination + flags */
3981 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3982 return -1;
3983 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3984 return -1;
3985 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3986 return -1;
3987 break;
3988
3989 case 0xb342: /* LTXBR - load and test */
3990 case 0xb34a: /* AXBR - add */
3991 case 0xb34b: /* SXBR - subtract */
3992 case 0xb3da: /* AXTR - add */
3993 case 0xb3db: /* SXTR - subtract */
3994 case 0xb3de: /* LTXTR - load and test */
3995 /* float pair destination + flags + fpc */
3996 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3997 return -1;
3998 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3999 return -1;
4000 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4001 return -1;
4002 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4003 return -1;
4004 break;
4005
4006 /* 0xb34e-0xb34f undefined */
4007 /* 0xb352 undefined */
4008
4009 case 0xb353: /* DIEBR - divide to integer */
4010 case 0xb35b: /* DIDBR - divide to integer */
4011 /* two float destinations + flags + fpc */
4012 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4013 return -1;
4014 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4015 return -1;
4016 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4017 return -1;
4018 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4019 return -1;
4020 break;
4021
4022 /* 0xb354-0xb356 undefined */
4023 /* 0xb35a undefined */
4024
4025 /* 0xb35c-0xb35e undefined */
4026 /* 0xb364 undefined */
4027 /* 0xb368 undefined */
4028
4029 case 0xb369: /* CXR - compare */
4030 case 0xb3f4: /* CEDTR - compare biased exponent */
4031 case 0xb3fc: /* CEXTR - compare biased exponent */
4032 case 0xb920: /* CGR - compare */
4033 case 0xb921: /* CLGR - compare logical */
4034 case 0xb930: /* CGFR - compare */
4035 case 0xb931: /* CLGFR - compare logical */
4036 case 0xb9cd: /* CHHR - compare high */
4037 case 0xb9cf: /* CLHHR - compare logical high */
4038 case 0xb9dd: /* CHLR - compare high */
4039 case 0xb9df: /* CLHLR - compare logical high */
4040 /* flags only */
4041 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4042 return -1;
4043 break;
4044
4045 /* 0xb36a-0xb36f undefined */
4046 /* 0xb377-0xb37e undefined */
4047 /* 0xb380-0xb383 undefined */
4048 /* 0xb386-0xb38b undefined */
4049 /* 0xb38d-0xb38f undefined */
4050 /* 0xb393 undefined */
4051 /* 0xb397 undefined */
4052
4053 case 0xb398: /* CFEBR - convert to fixed */
4054 case 0xb399: /* CFDBR - convert to fixed */
4055 case 0xb39a: /* CFXBR - convert to fixed */
4056 case 0xb39c: /* CLFEBR - convert to logical */
4057 case 0xb39d: /* CLFDBR - convert to logical */
4058 case 0xb39e: /* CLFXBR - convert to logical */
4059 case 0xb941: /* CFDTR - convert to fixed */
4060 case 0xb949: /* CFXTR - convert to fixed */
4061 case 0xb943: /* CLFDTR - convert to logical */
4062 case 0xb94b: /* CLFXTR - convert to logical */
4063 /* 32-bit gpr destination + flags + fpc */
4064 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4065 return -1;
4066 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4067 return -1;
4068 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4069 return -1;
4070 break;
4071
4072 /* 0xb39b undefined */
4073 /* 0xb39f undefined */
4074
4075 /* 0xb3a3 undefined */
4076 /* 0xb3a7 undefined */
4077
4078 case 0xb3a8: /* CGEBR - convert to fixed */
4079 case 0xb3a9: /* CGDBR - convert to fixed */
4080 case 0xb3aa: /* CGXBR - convert to fixed */
4081 case 0xb3ac: /* CLGEBR - convert to logical */
4082 case 0xb3ad: /* CLGDBR - convert to logical */
4083 case 0xb3ae: /* CLGXBR - convert to logical */
4084 case 0xb3e1: /* CGDTR - convert to fixed */
4085 case 0xb3e9: /* CGXTR - convert to fixed */
4086 case 0xb942: /* CLGDTR - convert to logical */
4087 case 0xb94a: /* CLGXTR - convert to logical */
4088 /* 64-bit gpr destination + flags + fpc */
4089 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4090 return -1;
4091 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4092 return -1;
4093 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4094 return -1;
4095 break;
4096
4097 /* 0xb3ab undefined */
4098 /* 0xb3af-0xb3b3 undefined */
4099 /* 0xb3b7 undefined */
4100
4101 case 0xb3b8: /* CFER - convert to fixed */
4102 case 0xb3b9: /* CFDR - convert to fixed */
4103 case 0xb3ba: /* CFXR - convert to fixed */
4104 case 0xb998: /* ALCR - add logical with carry */
4105 case 0xb999: /* SLBR - subtract logical with borrow */
4106 case 0xb9f4: /* NRK - and */
4107 case 0xb9f6: /* ORK - or */
4108 case 0xb9f7: /* XRK - xor */
4109 case 0xb9f8: /* ARK - add */
4110 case 0xb9f9: /* SRK - subtract */
4111 case 0xb9fa: /* ALRK - add logical */
4112 case 0xb9fb: /* SLRK - subtract logical */
4113 /* 32-bit gpr destination + flags */
4114 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4115 return -1;
4116 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4117 return -1;
4118 break;
4119
4120 case 0xb3c8: /* CGER - convert to fixed */
4121 case 0xb3c9: /* CGDR - convert to fixed */
4122 case 0xb3ca: /* CGXR - convert to fixed */
4123 case 0xb900: /* LPGR - load positive */
4124 case 0xb901: /* LNGR - load negative */
4125 case 0xb902: /* LTGR - load and test */
4126 case 0xb903: /* LCGR - load complement */
4127 case 0xb908: /* AGR - add */
4128 case 0xb909: /* SGR - subtract */
4129 case 0xb90a: /* ALGR - add logical */
4130 case 0xb90b: /* SLGR - subtract logical */
4131 case 0xb910: /* LPGFR - load positive */
4132 case 0xb911: /* LNGFR - load negative */
4133 case 0xb912: /* LTGFR - load and test */
4134 case 0xb913: /* LCGFR - load complement */
4135 case 0xb918: /* AGFR - add */
4136 case 0xb919: /* SGFR - subtract */
4137 case 0xb91a: /* ALGFR - add logical */
4138 case 0xb91b: /* SLGFR - subtract logical */
4139 case 0xb980: /* NGR - and */
4140 case 0xb981: /* OGR - or */
4141 case 0xb982: /* XGR - xor */
4142 case 0xb988: /* ALCGR - add logical with carry */
4143 case 0xb989: /* SLBGR - subtract logical with borrow */
4144 case 0xb9e1: /* POPCNT - population count */
4145 case 0xb9e4: /* NGRK - and */
4146 case 0xb9e6: /* OGRK - or */
4147 case 0xb9e7: /* XGRK - xor */
4148 case 0xb9e8: /* AGRK - add */
4149 case 0xb9e9: /* SGRK - subtract */
4150 case 0xb9ea: /* ALGRK - add logical */
4151 case 0xb9eb: /* SLGRK - subtract logical */
4152 case 0xb9ed: /* MSGRKC - multiply single 64x64 -> 64 */
4153 case 0xb9fd: /* MSRKC - multiply single 32x32 -> 32 */
4154 /* 64-bit gpr destination + flags */
4155 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4156 return -1;
4157 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4158 return -1;
4159 break;
4160
4161 /* 0xb3bb-0xb3c0 undefined */
4162 /* 0xb3c2-0xb3c3 undefined */
4163 /* 0xb3c7 undefined */
4164 /* 0xb3cb-0xb3cc undefined */
4165
4166 case 0xb3cd: /* LGDR - load gr from fpr */
4167 case 0xb3e2: /* CUDTR - convert to unsigned packed */
4168 case 0xb3e3: /* CSDTR - convert to signed packed */
4169 case 0xb3e5: /* EEDTR - extract biased exponent */
4170 case 0xb3e7: /* ESDTR - extract significance */
4171 case 0xb3ed: /* EEXTR - extract biased exponent */
4172 case 0xb3ef: /* ESXTR - extract significance */
4173 case 0xb904: /* LGR - load */
4174 case 0xb906: /* LGBR - load byte */
4175 case 0xb907: /* LGHR - load halfword */
4176 case 0xb90c: /* MSGR - multiply single */
4177 case 0xb90f: /* LRVGR - load reversed */
4178 case 0xb914: /* LGFR - load */
4179 case 0xb916: /* LLGFR - load logical */
4180 case 0xb917: /* LLGTR - load logical thirty one bits */
4181 case 0xb91c: /* MSGFR - multiply single 64<32 */
4182 case 0xb946: /* BCTGR - branch on count */
4183 case 0xb984: /* LLGCR - load logical character */
4184 case 0xb985: /* LLGHR - load logical halfword */
4185 case 0xb9e2: /* LOCGR - load on condition */
4186 /* 64-bit gpr destination */
4187 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4188 return -1;
4189 break;
4190
4191 /* 0xb3ce-0xb3cf undefined */
4192 /* 0xb3e6 undefined */
4193
4194 case 0xb3ea: /* CUXTR - convert to unsigned packed */
4195 case 0xb3eb: /* CSXTR - convert to signed packed */
4196 case 0xb90d: /* DSGR - divide single */
4197 case 0xb91d: /* DSGFR - divide single */
4198 case 0xb986: /* MLGR - multiply logical */
4199 case 0xb987: /* DLGR - divide logical */
4200 case 0xb9ec: /* MGRK - multiply 64x64 -> 128 */
4201 /* 64-bit gpr pair destination */
4202 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4203 return -1;
4204 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4205 return -1;
4206 break;
4207
4208 /* 0xb3ee undefined */
4209 /* 0xb3f0 undefined */
4210 /* 0xb3f8 undefined */
4211
4212 /* 0xb905 privileged */
4213
4214 /* 0xb90e unsupported: EREGG */
4215
4216 /* 0xb915 undefined */
4217
4218 case 0xb91e: /* KMAC - compute message authentication code [partial] */
4219 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4220 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4221 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4222 tmp &= 0xff;
4223 switch (tmp)
4224 {
4225 case 0x00: /* KMAC-Query */
4226 if (record_full_arch_list_add_mem (oaddr, 16))
4227 return -1;
4228 break;
4229
4230 case 0x01: /* KMAC-DEA */
4231 case 0x02: /* KMAC-TDEA-128 */
4232 case 0x03: /* KMAC-TDEA-192 */
4233 case 0x09: /* KMAC-Encrypted-DEA */
4234 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
4235 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
4236 if (record_full_arch_list_add_mem (oaddr, 8))
4237 return -1;
4238 break;
4239
4240 case 0x12: /* KMAC-AES-128 */
4241 case 0x13: /* KMAC-AES-192 */
4242 case 0x14: /* KMAC-AES-256 */
4243 case 0x1a: /* KMAC-Encrypted-AES-128 */
4244 case 0x1b: /* KMAC-Encrypted-AES-192 */
4245 case 0x1c: /* KMAC-Encrypted-AES-256 */
4246 if (record_full_arch_list_add_mem (oaddr, 16))
4247 return -1;
4248 break;
4249
4250 default:
4251 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4252 (int)tmp, paddress (gdbarch, addr));
4253 return -1;
4254 }
4255 if (tmp != 0)
4256 {
4257 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4258 return -1;
4259 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4260 return -1;
4261 }
4262 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4263 return -1;
4264 break;
4265
4266 /* 0xb922-0xb924 undefined */
4267 /* 0xb925 privileged */
4268 /* 0xb928 privileged */
4269
4270 case 0xb929: /* KMA - cipher message with authentication */
4271 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
4272 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
4273 case 0xb92f: /* KMC - cipher message with chaining [partial] */
4274 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4275 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4276 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4277 tmp &= 0x7f;
4278 switch (tmp)
4279 {
4280 case 0x00: /* KM*-Query */
4281 if (record_full_arch_list_add_mem (oaddr, 16))
4282 return -1;
4283 break;
4284
4285 case 0x01: /* KM*-DEA */
4286 case 0x02: /* KM*-TDEA-128 */
4287 case 0x03: /* KM*-TDEA-192 */
4288 case 0x09: /* KM*-Encrypted-DEA */
4289 case 0x0a: /* KM*-Encrypted-TDEA-128 */
4290 case 0x0b: /* KM*-Encrypted-TDEA-192 */
4291 if (record_full_arch_list_add_mem (oaddr, 8))
4292 return -1;
4293 break;
4294
4295 case 0x12: /* KM*-AES-128 */
4296 case 0x13: /* KM*-AES-192 */
4297 case 0x14: /* KM*-AES-256 */
4298 case 0x1a: /* KM*-Encrypted-AES-128 */
4299 case 0x1b: /* KM*-Encrypted-AES-192 */
4300 case 0x1c: /* KM*-Encrypted-AES-256 */
4301 if (record_full_arch_list_add_mem (oaddr, 16))
4302 return -1;
4303 break;
4304
4305 case 0x43: /* KMC-PRNG */
4306 /* Only valid for KMC. */
4307 if (insn[0] == 0xb92f)
4308 {
4309 if (record_full_arch_list_add_mem (oaddr, 8))
4310 return -1;
4311 break;
4312 }
4313 /* For other instructions... */
4314 /* Fall through. */
4315 default:
4316 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
4317 (int)tmp, paddress (gdbarch, addr));
4318 return -1;
4319 }
4320 if (tmp != 0)
4321 {
4322 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4323 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4324 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4325 if (record_full_arch_list_add_mem (oaddr2, tmp))
4326 return -1;
4327 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4328 return -1;
4329 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4330 return -1;
4331 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4332 return -1;
4333 }
4334 if (tmp != 0 && insn[0] == 0xb929)
4335 {
4336 if (record_full_arch_list_add_reg (regcache,
4337 S390_R0_REGNUM + inib[4]))
4338 return -1;
4339 if (record_full_arch_list_add_reg (regcache,
4340 S390_R0_REGNUM + (inib[4] | 1)))
4341 return -1;
4342 }
4343 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4344 return -1;
4345 break;
4346
4347 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
4348 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4349 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4350 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4351 tmp &= 0x7f;
4352 switch (tmp)
4353 {
4354 case 0x00: /* PCC-Query */
4355 if (record_full_arch_list_add_mem (oaddr, 16))
4356 return -1;
4357 break;
4358
4359 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
4360 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
4361 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
4362 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
4363 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
4364 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
4365 if (record_full_arch_list_add_mem (oaddr + 0x10, 8))
4366 return -1;
4367 break;
4368
4369 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
4370 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
4371 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
4372 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
4373 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
4374 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
4375 if (record_full_arch_list_add_mem (oaddr + 0x18, 16))
4376 return -1;
4377 break;
4378
4379 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
4380 if (record_full_arch_list_add_mem (oaddr + 0x30, 32))
4381 return -1;
4382 break;
4383
4384 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
4385 if (record_full_arch_list_add_mem (oaddr + 0x40, 32))
4386 return -1;
4387 break;
4388
4389 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
4390 if (record_full_arch_list_add_mem (oaddr + 0x50, 32))
4391 return -1;
4392 break;
4393
4394 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
4395 if (record_full_arch_list_add_mem (oaddr + 0x60, 32))
4396 return -1;
4397 break;
4398
4399 default:
4400 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PCC function %02x at %s.\n",
4401 (int)tmp, paddress (gdbarch, addr));
4402 return -1;
4403 }
4404 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4405 return -1;
4406 break;
4407
4408 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
4409 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4410 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4411 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4412 tmp &= 0x7f;
4413 switch (tmp)
4414 {
4415 case 0x00: /* KMCTR-Query */
4416 if (record_full_arch_list_add_mem (oaddr, 16))
4417 return -1;
4418 break;
4419
4420 case 0x01: /* KMCTR-DEA */
4421 case 0x02: /* KMCTR-TDEA-128 */
4422 case 0x03: /* KMCTR-TDEA-192 */
4423 case 0x09: /* KMCTR-Encrypted-DEA */
4424 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
4425 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
4426 case 0x12: /* KMCTR-AES-128 */
4427 case 0x13: /* KMCTR-AES-192 */
4428 case 0x14: /* KMCTR-AES-256 */
4429 case 0x1a: /* KMCTR-Encrypted-AES-128 */
4430 case 0x1b: /* KMCTR-Encrypted-AES-192 */
4431 case 0x1c: /* KMCTR-Encrypted-AES-256 */
4432 break;
4433
4434 default:
4435 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMCTR function %02x at %s.\n",
4436 (int)tmp, paddress (gdbarch, addr));
4437 return -1;
4438 }
4439 if (tmp != 0)
4440 {
4441 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4442 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4443 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4444 if (record_full_arch_list_add_mem (oaddr2, tmp))
4445 return -1;
4446 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4447 return -1;
4448 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4449 return -1;
4450 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4451 return -1;
4452 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[4]))
4453 return -1;
4454 }
4455 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4456 return -1;
4457 break;
4458
4459 case 0xb92e: /* KM - cipher message [partial] */
4460 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4461 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4462 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4463 tmp &= 0x7f;
4464 switch (tmp)
4465 {
4466 case 0x00: /* KM-Query */
4467 if (record_full_arch_list_add_mem (oaddr, 16))
4468 return -1;
4469 break;
4470
4471 case 0x01: /* KM-DEA */
4472 case 0x02: /* KM-TDEA-128 */
4473 case 0x03: /* KM-TDEA-192 */
4474 case 0x09: /* KM-Encrypted-DEA */
4475 case 0x0a: /* KM-Encrypted-TDEA-128 */
4476 case 0x0b: /* KM-Encrypted-TDEA-192 */
4477 case 0x12: /* KM-AES-128 */
4478 case 0x13: /* KM-AES-192 */
4479 case 0x14: /* KM-AES-256 */
4480 case 0x1a: /* KM-Encrypted-AES-128 */
4481 case 0x1b: /* KM-Encrypted-AES-192 */
4482 case 0x1c: /* KM-Encrypted-AES-256 */
4483 break;
4484
4485 case 0x32: /* KM-XTS-AES-128 */
4486 if (record_full_arch_list_add_mem (oaddr + 0x10, 16))
4487 return -1;
4488 break;
4489
4490 case 0x34: /* KM-XTS-AES-256 */
4491 if (record_full_arch_list_add_mem (oaddr + 0x20, 16))
4492 return -1;
4493 break;
4494
4495 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
4496 if (record_full_arch_list_add_mem (oaddr + 0x30, 16))
4497 return -1;
4498 break;
4499
4500 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
4501 if (record_full_arch_list_add_mem (oaddr + 0x40, 16))
4502 return -1;
4503 break;
4504
4505 default:
4506 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM function %02x at %s.\n",
4507 (int)tmp, paddress (gdbarch, addr));
4508 return -1;
4509 }
4510 if (tmp != 0)
4511 {
4512 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4513 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4514 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4515 if (record_full_arch_list_add_mem (oaddr2, tmp))
4516 return -1;
4517 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4518 return -1;
4519 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4520 return -1;
4521 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4522 return -1;
4523 }
4524 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4525 return -1;
4526 break;
4527
4528 /* 0xb932-0xb93b undefined */
4529
4530 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
4531 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4532 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4533 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4534 tmp &= 0xff;
4535 switch (tmp)
4536 {
4537 case 0x00: /* PPNO-Query */
4538 case 0x80: /* PPNO-Query */
4539 if (record_full_arch_list_add_mem (oaddr, 16))
4540 return -1;
4541 break;
4542
4543 case 0x03: /* PPNO-SHA-512-DRNG - generate */
4544 if (record_full_arch_list_add_mem (oaddr, 240))
4545 return -1;
4546 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4547 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4548 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4549 if (record_full_arch_list_add_mem (oaddr2, tmp))
4550 return -1;
4551 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4552 return -1;
4553 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4554 return -1;
4555 break;
4556
4557 case 0x83: /* PPNO-SHA-512-DRNG - seed */
4558 if (record_full_arch_list_add_mem (oaddr, 240))
4559 return -1;
4560 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4561 return -1;
4562 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4563 return -1;
4564 break;
4565
4566 default:
4567 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PPNO function %02x at %s.\n",
4568 (int)tmp, paddress (gdbarch, addr));
4569 return -1;
4570 }
4571 /* DXC may be written */
4572 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4573 return -1;
4574 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4575 return -1;
4576 break;
4577
4578 /* 0xb93d undefined */
4579
4580 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
4581 case 0xb93f: /* KLMD - compute last message digest [partial] */
4582 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4583 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4584 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4585 tmp &= 0xff;
4586 switch (tmp)
4587 {
4588 case 0x00: /* K*MD-Query */
4589 if (record_full_arch_list_add_mem (oaddr, 16))
4590 return -1;
4591 break;
4592
4593 case 0x01: /* K*MD-SHA-1 */
4594 if (record_full_arch_list_add_mem (oaddr, 20))
4595 return -1;
4596 break;
4597
4598 case 0x02: /* K*MD-SHA-256 */
4599 if (record_full_arch_list_add_mem (oaddr, 32))
4600 return -1;
4601 break;
4602
4603 case 0x03: /* K*MD-SHA-512 */
4604 if (record_full_arch_list_add_mem (oaddr, 64))
4605 return -1;
4606 break;
4607
4608 case 0x41: /* KIMD-GHASH */
4609 /* Only valid for KIMD. */
4610 if (insn[0] == 0xb93e)
4611 {
4612 if (record_full_arch_list_add_mem (oaddr, 16))
4613 return -1;
4614 break;
4615 }
4616 /* For KLMD... */
4617 /* Fall through. */
4618 default:
4619 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4620 (int)tmp, paddress (gdbarch, addr));
4621 return -1;
4622 }
4623 if (tmp != 0)
4624 {
4625 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4626 return -1;
4627 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4628 return -1;
4629 }
4630 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4631 return -1;
4632 break;
4633
4634 /* 0xb940 undefined */
4635 /* 0xb944-0xb945 undefined */
4636 /* 0xb947-0xb948 undefined */
4637 /* 0xb94c-0xb950 undefined */
4638 /* 0xb954-0xb958 undefined */
4639 /* 0xb95c-0xb95f undefined */
4640 /* 0xb962-0xb971 undefined */
4641 /* 0xb974-0xb97f undefined */
4642
4643 case 0xb983: /* FLOGR - find leftmost one */
4644 /* 64-bit gpr pair destination + flags */
4645 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4646 return -1;
4647 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4648 return -1;
4649 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4650 return -1;
4651 break;
4652
4653 /* 0xb98a privileged */
4654 /* 0xb98b-0xb98c undefined */
4655
4656 case 0xb98d: /* EPSW - extract psw */
4657 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4658 return -1;
4659 if (inib[7])
4660 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4661 return -1;
4662 break;
4663
4664 /* 0xb98e-0xb98f privileged */
4665
4666 case 0xb990: /* TRTT - translate two to two [partial] */
4667 case 0xb991: /* TRTO - translate two to one [partial] */
4668 case 0xb992: /* TROT - translate one to two [partial] */
4669 case 0xb993: /* TROO - translate one to one [partial] */
4670 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4671 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4672 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4673 /* tmp is source length, we want destination length. Adjust. */
4674 if (insn[0] == 0xb991)
4675 tmp >>= 1;
4676 if (insn[0] == 0xb992)
4677 tmp <<= 1;
4678 if (record_full_arch_list_add_mem (oaddr, tmp))
4679 return -1;
4680 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4681 return -1;
4682 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4683 return -1;
4684 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4685 return -1;
4686 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4687 return -1;
4688 break;
4689
4690 case 0xb996: /* MLR - multiply logical */
4691 case 0xb997: /* DLR - divide logical */
4692 /* 32-bit gpr pair destination */
4693 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4694 return -1;
4695 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4696 return -1;
4697 break;
4698
4699 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
4700 /* 0xb9b4-0xb9bc undefined */
4701
4702 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
4703 case 0xb9bf: /* TRTE - translate and test extended [partial] */
4704 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4705 return -1;
4706 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4707 return -1;
4708 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4709 return -1;
4710 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4711 return -1;
4712 break;
4713
4714 /* 0xb9c0-0xb9c7 undefined */
4715
4716 case 0xb9c8: /* AHHHR - add high */
4717 case 0xb9c9: /* SHHHR - subtract high */
4718 case 0xb9ca: /* ALHHHR - add logical high */
4719 case 0xb9cb: /* SLHHHR - subtract logical high */
4720 case 0xb9d8: /* AHHLR - add high */
4721 case 0xb9d9: /* SHHLR - subtract high */
4722 case 0xb9da: /* ALHHLR - add logical high */
4723 case 0xb9db: /* SLHHLR - subtract logical high */
4724 /* 32-bit high gpr destination + flags */
4725 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4726 return -1;
4727 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4728 return -1;
4729 break;
4730
4731 /* 0xb9cc undefined */
4732 /* 0xb9ce undefined */
4733 /* 0xb9d0-0xb9d7 undefined */
4734 /* 0xb9dc undefined */
4735 /* 0xb9de undefined */
4736
4737 case 0xb9e0: /* LOCFHR - load high on condition */
4738 /* 32-bit high gpr destination */
4739 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4740 return -1;
4741 break;
4742
4743 /* 0xb9e3 undefined */
4744 /* 0xb9e5 undefined */
4745 /* 0xb9ee-0xb9f1 undefined */
4746 /* 0xb9f3 undefined */
4747 /* 0xb9f5 undefined */
4748 /* 0xb9fc undefined */
4749 /* 0xb9fe -0xb9ff undefined */
4750
4751 default:
4752 goto UNKNOWN_OP;
4753 }
4754 break;
4755
4756 /* 0xb4-0xb5 undefined */
4757 /* 0xb6 privileged: STCTL - store control */
4758 /* 0xb7 privileged: LCTL - load control */
4759 /* 0xb8 undefined */
4760
4761 case 0xba: /* CS - compare and swap */
4762 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4763 if (record_full_arch_list_add_mem (oaddr, 4))
4764 return -1;
4765 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4766 return -1;
4767 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4768 return -1;
4769 break;
4770
4771 case 0xbb: /* CDS - compare double and swap */
4772 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4773 if (record_full_arch_list_add_mem (oaddr, 8))
4774 return -1;
4775 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4776 return -1;
4777 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4778 return -1;
4779 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4780 return -1;
4781 break;
4782
4783 /* 0xbc undefined */
4784
4785 case 0xbe: /* STCM - store characters under mask */
4786 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4787 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
4788 return -1;
4789 break;
4790
4791 case 0xc0:
4792 case 0xc2:
4793 case 0xc4:
4794 case 0xc6:
4795 case 0xcc:
4796 /* RIL-format instruction */
4797 switch (ibyte[0] << 4 | inib[3])
4798 {
4799 case 0xc00: /* LARL - load address relative long */
4800 case 0xc05: /* BRASL - branch relative and save long */
4801 case 0xc09: /* IILF - insert immediate */
4802 case 0xc21: /* MSFI - multiply single immediate */
4803 case 0xc42: /* LLHRL - load logical halfword relative long */
4804 case 0xc45: /* LHRL - load halfword relative long */
4805 case 0xc4d: /* LRL - load relative long */
4806 /* 32-bit or native gpr destination */
4807 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4808 return -1;
4809 break;
4810
4811 case 0xc01: /* LGFI - load immediate */
4812 case 0xc0e: /* LLIHF - load logical immediate */
4813 case 0xc0f: /* LLILF - load logical immediate */
4814 case 0xc20: /* MSGFI - multiply single immediate */
4815 case 0xc44: /* LGHRL - load halfword relative long */
4816 case 0xc46: /* LLGHRL - load logical halfword relative long */
4817 case 0xc48: /* LGRL - load relative long */
4818 case 0xc4c: /* LGFRL - load relative long */
4819 case 0xc4e: /* LLGFRL - load logical relative long */
4820 /* 64-bit gpr destination */
4821 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4822 return -1;
4823 break;
4824
4825 /* 0xc02-0xc03 undefined */
4826
4827 case 0xc04: /* BRCL - branch relative on condition long */
4828 case 0xc62: /* PFDRL - prefetch data relative long */
4829 break;
4830
4831 case 0xc06: /* XIHF - xor immediate */
4832 case 0xc0a: /* NIHF - and immediate */
4833 case 0xc0c: /* OIHF - or immediate */
4834 case 0xcc8: /* AIH - add immediate high */
4835 case 0xcca: /* ALSIH - add logical with signed immediate high */
4836 /* 32-bit high gpr destination + flags */
4837 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4838 return -1;
4839 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4840 return -1;
4841 break;
4842
4843 case 0xc07: /* XILF - xor immediate */
4844 case 0xc0b: /* NILF - and immediate */
4845 case 0xc0d: /* OILF - or immediate */
4846 case 0xc25: /* SLFI - subtract logical immediate */
4847 case 0xc29: /* AFI - add immediate */
4848 case 0xc2b: /* ALFI - add logical immediate */
4849 /* 32-bit gpr destination + flags */
4850 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4851 return -1;
4852 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4853 return -1;
4854 break;
4855
4856 case 0xc08: /* IIHF - insert immediate */
4857 case 0xcc6: /* BRCTH - branch relative on count high */
4858 case 0xccb: /* ALSIHN - add logical with signed immediate high */
4859 /* 32-bit high gpr destination */
4860 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4861 return -1;
4862 break;
4863
4864 /* 0xc22-0xc23 undefined */
4865
4866 case 0xc24: /* SLGFI - subtract logical immediate */
4867 case 0xc28: /* AGFI - add immediate */
4868 case 0xc2a: /* ALGFI - add logical immediate */
4869 /* 64-bit gpr destination + flags */
4870 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4871 return -1;
4872 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4873 return -1;
4874 break;
4875
4876 /* 0xc26-0xc27 undefined */
4877
4878 case 0xc2c: /* CGFI - compare immediate */
4879 case 0xc2d: /* CFI - compare immediate */
4880 case 0xc2e: /* CLGFI - compare logical immediate */
4881 case 0xc2f: /* CLFI - compare logical immediate */
4882 case 0xc64: /* CGHRL - compare halfword relative long */
4883 case 0xc65: /* CHRL - compare halfword relative long */
4884 case 0xc66: /* CLGHRL - compare logical halfword relative long */
4885 case 0xc67: /* CLHRL - compare logical halfword relative long */
4886 case 0xc68: /* CGRL - compare relative long */
4887 case 0xc6a: /* CLGRL - compare logical relative long */
4888 case 0xc6c: /* CGFRL - compare relative long */
4889 case 0xc6d: /* CRL - compare relative long */
4890 case 0xc6e: /* CLGFRL - compare logical relative long */
4891 case 0xc6f: /* CLRL - compare logical relative long */
4892 case 0xccd: /* CIH - compare immediate high */
4893 case 0xccf: /* CLIH - compare logical immediate high */
4894 /* flags only */
4895 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4896 return -1;
4897 break;
4898
4899 /* 0xc40-0xc41 undefined */
4900 /* 0xc43 undefined */
4901
4902 case 0xc47: /* STHRL - store halfword relative long */
4903 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4904 if (record_full_arch_list_add_mem (oaddr, 2))
4905 return -1;
4906 break;
4907
4908 /* 0xc49-0xc4a undefined */
4909
4910 case 0xc4b: /* STGRL - store relative long */
4911 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4912 if (record_full_arch_list_add_mem (oaddr, 8))
4913 return -1;
4914 break;
4915
4916 case 0xc4f: /* STRL - store relative long */
4917 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4918 if (record_full_arch_list_add_mem (oaddr, 4))
4919 return -1;
4920 break;
4921
4922 case 0xc60: /* EXRL - execute relative long */
4923 if (ex != -1)
4924 {
4925 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
4926 paddress (gdbarch, addr));
4927 return -1;
4928 }
4929 addr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4930 if (inib[2])
4931 {
4932 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4933 ex = tmp & 0xff;
4934 }
4935 else
4936 {
4937 ex = 0;
4938 }
4939 goto ex;
4940
4941 /* 0xc61 undefined */
4942 /* 0xc63 undefined */
4943 /* 0xc69 undefined */
4944 /* 0xc6b undefined */
4945 /* 0xcc0-0xcc5 undefined */
4946 /* 0xcc7 undefined */
4947 /* 0xcc9 undefined */
4948 /* 0xccc undefined */
4949 /* 0xcce undefined */
4950
4951 default:
4952 goto UNKNOWN_OP;
4953 }
4954 break;
4955
4956 /* 0xc1 undefined */
4957 /* 0xc3 undefined */
4958
4959 case 0xc5: /* BPRP - branch prediction relative preload */
4960 case 0xc7: /* BPP - branch prediction preload */
4961 /* no visible effect */
4962 break;
4963
4964 case 0xc8:
4965 /* SSF-format instruction */
4966 switch (ibyte[0] << 4 | inib[3])
4967 {
4968 /* 0xc80 unsupported */
4969
4970 case 0xc81: /* ECTG - extract cpu time */
4971 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4972 return -1;
4973 if (s390_record_gpr_g (gdbarch, regcache, 0))
4974 return -1;
4975 if (s390_record_gpr_g (gdbarch, regcache, 1))
4976 return -1;
4977 break;
4978
4979 case 0xc82: /* CSST - compare and swap and store */
4980 {
4981 uint8_t fc, sc;
4982 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4983 fc = tmp & 0xff;
4984 sc = tmp >> 8 & 0xff;
4985
4986 /* First and third operands. */
4987 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4988 switch (fc)
4989 {
4990 case 0x00: /* 32-bit */
4991 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4992 return -1;
4993 if (record_full_arch_list_add_mem (oaddr, 4))
4994 return -1;
4995 break;
4996
4997 case 0x01: /* 64-bit */
4998 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4999 return -1;
5000 if (record_full_arch_list_add_mem (oaddr, 8))
5001 return -1;
5002 break;
5003
5004 case 0x02: /* 128-bit */
5005 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5006 return -1;
5007 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5008 return -1;
5009 if (record_full_arch_list_add_mem (oaddr, 16))
5010 return -1;
5011 break;
5012
5013 default:
5014 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5015 fc, paddress (gdbarch, addr));
5016 return -1;
5017 }
5018
5019 /* Second operand. */
5020 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
5021 if (sc > 4)
5022 {
5023 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5024 sc, paddress (gdbarch, addr));
5025 return -1;
5026 }
5027
5028 if (record_full_arch_list_add_mem (oaddr2, 1 << sc))
5029 return -1;
5030
5031 /* Flags. */
5032 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5033 return -1;
5034 }
5035 break;
5036
5037 /* 0xc83 undefined */
5038
5039 case 0xc84: /* LPD - load pair disjoint */
5040 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5041 return -1;
5042 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5043 return -1;
5044 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5045 return -1;
5046 break;
5047
5048 case 0xc85: /* LPDG - load pair disjoint */
5049 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5050 return -1;
5051 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5052 return -1;
5053 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5054 return -1;
5055 break;
5056
5057 /* 0xc86-0xc8f undefined */
5058
5059 default:
5060 goto UNKNOWN_OP;
5061 }
5062 break;
5063
5064 /* 0xc9-0xcb undefined */
5065 /* 0xcd-0xcf undefined */
5066
5067 case 0xd0: /* TRTR - translate and test reversed */
5068 case 0xdd: /* TRT - translate and test */
5069 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5070 return -1;
5071 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
5072 return -1;
5073 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5074 return -1;
5075 break;
5076
5077 case 0xd1: /* MVN - move numbers */
5078 case 0xd2: /* MVC - move */
5079 case 0xd3: /* MVZ - move zones */
5080 case 0xdc: /* TR - translate */
5081 case 0xe8: /* MVCIN - move inverse */
5082 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5083 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5084 return -1;
5085 break;
5086
5087 case 0xd4: /* NC - and */
5088 case 0xd6: /* OC - or*/
5089 case 0xd7: /* XC - xor */
5090 case 0xe2: /* UNPKU - unpack unicode */
5091 case 0xea: /* UNPKA - unpack ASCII */
5092 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5093 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5094 return -1;
5095 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5096 return -1;
5097 break;
5098
5099 case 0xde: /* ED - edit */
5100 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5101 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5102 return -1;
5103 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5104 return -1;
5105 /* DXC may be written */
5106 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5107 return -1;
5108 break;
5109
5110 case 0xdf: /* EDMK - edit and mark */
5111 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5112 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5113 return -1;
5114 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5115 return -1;
5116 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5117 return -1;
5118 /* DXC may be written */
5119 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5120 return -1;
5121 break;
5122
5123 /* 0xd8 undefined */
5124 /* 0xd9 unsupported: MVCK - move with key */
5125 /* 0xda unsupported: MVCP - move to primary */
5126 /* 0xdb unsupported: MVCS - move to secondary */
5127 /* 0xe0 undefined */
5128
5129 case 0xe1: /* PKU - pack unicode */
5130 case 0xe9: /* PKA - pack ASCII */
5131 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5132 if (record_full_arch_list_add_mem (oaddr, 16))
5133 return -1;
5134 break;
5135
5136 case 0xe3:
5137 case 0xe6:
5138 case 0xe7:
5139 case 0xeb:
5140 case 0xed:
5141 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
5142 switch (ibyte[0] << 8 | ibyte[5])
5143 {
5144 /* 0xe300-0xe301 undefined */
5145
5146 case 0xe302: /* LTG - load and test */
5147 case 0xe308: /* AG - add */
5148 case 0xe309: /* SG - subtract */
5149 case 0xe30a: /* ALG - add logical */
5150 case 0xe30b: /* SLG - subtract logical */
5151 case 0xe318: /* AGF - add */
5152 case 0xe319: /* SGF - subtract */
5153 case 0xe31a: /* ALGF - add logical */
5154 case 0xe31b: /* SLGF - subtract logical */
5155 case 0xe332: /* LTGF - load and test */
5156 case 0xe380: /* NG - and */
5157 case 0xe381: /* OG - or */
5158 case 0xe382: /* XG - xor */
5159 case 0xe388: /* ALCG - add logical with carry */
5160 case 0xe389: /* SLBG - subtract logical with borrow */
5161 case 0xeb0a: /* SRAG - shift right single */
5162 case 0xeb0b: /* SLAG - shift left single */
5163 /* 64-bit gpr destination + flags */
5164 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5165 return -1;
5166 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5167 return -1;
5168 break;
5169
5170 /* 0xe303 privileged */
5171
5172 case 0xe304: /* LG - load */
5173 case 0xe30c: /* MSG - multiply single */
5174 case 0xe30f: /* LRVG - load reversed */
5175 case 0xe314: /* LGF - load */
5176 case 0xe315: /* LGH - load halfword */
5177 case 0xe316: /* LLGF - load logical */
5178 case 0xe317: /* LLGT - load logical thirty one bits */
5179 case 0xe31c: /* MSGF - multiply single */
5180 case 0xe32a: /* LZRG - load and zero rightmost byte */
5181 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
5182 case 0xe33c: /* MGH - multiply halfword 64x16mem -> 64 */
5183 case 0xe346: /* BCTG - branch on count */
5184 case 0xe377: /* LGB - load byte */
5185 case 0xe390: /* LLGC - load logical character */
5186 case 0xe391: /* LLGH - load logical halfword */
5187 case 0xeb0c: /* SRLG - shift right single logical */
5188 case 0xeb0d: /* SLLG - shift left single logical */
5189 case 0xeb1c: /* RLLG - rotate left single logical */
5190 case 0xeb44: /* BXHG - branch on index high */
5191 case 0xeb45: /* BXLEG - branch on index low or equal */
5192 case 0xeb4c: /* ECAG - extract cpu attribute */
5193 case 0xebe2: /* LOCG - load on condition */
5194 /* 64-bit gpr destination */
5195 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5196 return -1;
5197 break;
5198
5199 /* 0xe305 undefined */
5200
5201 case 0xe306: /* CVBY - convert to binary */
5202 /* 32-bit or native gpr destination + FPC (DXC write) */
5203 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5204 return -1;
5205 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5206 return -1;
5207 break;
5208
5209 /* 0xe307 undefined */
5210
5211 case 0xe30d: /* DSG - divide single */
5212 case 0xe31d: /* DSGF - divide single */
5213 case 0xe384: /* MG - multiply 64x64mem -> 128 */
5214 case 0xe386: /* MLG - multiply logical */
5215 case 0xe387: /* DLG - divide logical */
5216 case 0xe38f: /* LPQ - load pair from quadword */
5217 /* 64-bit gpr pair destination */
5218 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5219 return -1;
5220 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5221 return -1;
5222 break;
5223
5224 case 0xe30e: /* CVBG - convert to binary */
5225 /* 64-bit gpr destination + FPC (DXC write) */
5226 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5227 return -1;
5228 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5229 return -1;
5230 break;
5231
5232 /* 0xe310-0xe311 undefined */
5233
5234 case 0xe312: /* LT - load and test */
5235 case 0xe338: /* AGH - add halfword to 64 bit value */
5236 case 0xe339: /* SGH - subtract halfword from 64 bit value */
5237 case 0xe353: /* MSC - multiply single 32x32mem -> 32 */
5238 case 0xe354: /* NY - and */
5239 case 0xe356: /* OY - or */
5240 case 0xe357: /* XY - xor */
5241 case 0xe35a: /* AY - add */
5242 case 0xe35b: /* SY - subtract */
5243 case 0xe35e: /* ALY - add logical */
5244 case 0xe35f: /* SLY - subtract logical */
5245 case 0xe37a: /* AHY - add halfword */
5246 case 0xe37b: /* SHY - subtract halfword */
5247 case 0xe383: /* MSGC - multiply single 64x64mem -> 64 */
5248 case 0xe398: /* ALC - add logical with carry */
5249 case 0xe399: /* SLB - subtract logical with borrow */
5250 case 0xe727: /* LCBB - load count to block bounduary */
5251 case 0xeb81: /* ICMY - insert characters under mask */
5252 case 0xebdc: /* SRAK - shift left single */
5253 case 0xebdd: /* SLAK - shift left single */
5254 /* 32/64-bit gpr destination + flags */
5255 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5256 return -1;
5257 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5258 return -1;
5259 break;
5260
5261 /* 0xe313 privileged */
5262
5263 case 0xe31e: /* LRV - load reversed */
5264 case 0xe31f: /* LRVH - load reversed */
5265 case 0xe33b: /* LZRF - load and zero rightmost byte */
5266 case 0xe351: /* MSY - multiply single */
5267 case 0xe358: /* LY - load */
5268 case 0xe371: /* LAY - load address */
5269 case 0xe373: /* ICY - insert character */
5270 case 0xe376: /* LB - load byte */
5271 case 0xe378: /* LHY - load */
5272 case 0xe37c: /* MHY - multiply halfword */
5273 case 0xe394: /* LLC - load logical character */
5274 case 0xe395: /* LLH - load logical halfword */
5275 case 0xeb1d: /* RLL - rotate left single logical */
5276 case 0xebde: /* SRLK - shift left single logical */
5277 case 0xebdf: /* SLLK - shift left single logical */
5278 case 0xebf2: /* LOC - load on condition */
5279 /* 32-bit or native gpr destination */
5280 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5281 return -1;
5282 break;
5283
5284 case 0xe320: /* CG - compare */
5285 case 0xe321: /* CLG - compare logical */
5286 case 0xe330: /* CGF - compare */
5287 case 0xe331: /* CLGF - compare logical */
5288 case 0xe334: /* CGH - compare halfword */
5289 case 0xe355: /* CLY - compare logical */
5290 case 0xe359: /* CY - compare */
5291 case 0xe379: /* CHY - compare halfword */
5292 case 0xe3cd: /* CHF - compare high */
5293 case 0xe3cf: /* CLHF - compare logical high */
5294 case 0xeb20: /* CLMH - compare logical under mask high */
5295 case 0xeb21: /* CLMY - compare logical under mask */
5296 case 0xeb51: /* TMY - test under mask */
5297 case 0xeb55: /* CLIY - compare logical */
5298 case 0xebc0: /* TP - test decimal */
5299 case 0xed10: /* TCEB - test data class */
5300 case 0xed11: /* TCDB - test data class */
5301 case 0xed12: /* TCXB - test data class */
5302 case 0xed50: /* TDCET - test data class */
5303 case 0xed51: /* TDGET - test data group */
5304 case 0xed54: /* TDCDT - test data class */
5305 case 0xed55: /* TDGDT - test data group */
5306 case 0xed58: /* TDCXT - test data class */
5307 case 0xed59: /* TDGXT - test data group */
5308 /* flags only */
5309 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5310 return -1;
5311 break;
5312
5313 /* 0xe322-0xe323 undefined */
5314
5315 case 0xe324: /* STG - store */
5316 case 0xe325: /* NTSTG - nontransactional store */
5317 case 0xe326: /* CVDY - convert to decimal */
5318 case 0xe32f: /* STRVG - store reversed */
5319 case 0xebe3: /* STOCG - store on condition */
5320 case 0xed67: /* STDY - store */
5321 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5322 if (record_full_arch_list_add_mem (oaddr, 8))
5323 return -1;
5324 break;
5325
5326 /* 0xe327-0xe329 undefined */
5327 /* 0xe32b-0xe32d undefined */
5328
5329 case 0xe32e: /* CVDG - convert to decimal */
5330 case 0xe38e: /* STPQ - store pair to quadword */
5331 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5332 if (record_full_arch_list_add_mem (oaddr, 16))
5333 return -1;
5334 break;
5335
5336 /* 0xe333 undefined */
5337 /* 0xe335 undefined */
5338
5339 case 0xe336: /* PFD - prefetch data */
5340 break;
5341
5342 /* 0xe337 undefined */
5343 /* 0xe33c-0xe33d undefined */
5344
5345 case 0xe33e: /* STRV - store reversed */
5346 case 0xe350: /* STY - store */
5347 case 0xe3cb: /* STFH - store high */
5348 case 0xebe1: /* STOCFH - store high on condition */
5349 case 0xebf3: /* STOC - store on condition */
5350 case 0xed66: /* STEY - store */
5351 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5352 if (record_full_arch_list_add_mem (oaddr, 4))
5353 return -1;
5354 break;
5355
5356 case 0xe33f: /* STRVH - store reversed */
5357 case 0xe370: /* STHY - store halfword */
5358 case 0xe3c7: /* STHH - store halfword high */
5359 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5360 if (record_full_arch_list_add_mem (oaddr, 2))
5361 return -1;
5362 break;
5363
5364 /* 0xe340-0xe345 undefined */
5365
5366 case 0xe347: /* BIC - branch indirect on condition */
5367 break;
5368
5369 /* 0xe348-0xe34f undefined */
5370 /* 0xe352 undefined */
5371
5372 case 0xe35c: /* MFY - multiply */
5373 case 0xe396: /* ML - multiply logical */
5374 case 0xe397: /* DL - divide logical */
5375 /* 32-bit gpr pair destination */
5376 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5377 return -1;
5378 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5379 return -1;
5380 break;
5381
5382 /* 0xe35d undefined */
5383 /* 0xe360-0xe36f undefined */
5384
5385 case 0xe372: /* STCY - store character */
5386 case 0xe3c3: /* STCH - store character high */
5387 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5388 if (record_full_arch_list_add_mem (oaddr, 1))
5389 return -1;
5390 break;
5391
5392 /* 0xe374 undefined */
5393
5394 case 0xe375: /* LAEY - load address extended */
5395 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5396 return -1;
5397 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
5398 return -1;
5399 break;
5400
5401 /* 0xe37d-0xe37f undefined */
5402
5403 case 0xe385: /* LGAT - load and trap */
5404 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
5405 case 0xe39d: /* LLGFAT - load logical and trap */
5406 case 0xe650: /* VCVB - vector convert to binary 32 bit*/
5407 case 0xe652: /* VCVBG - vector convert to binary 64 bit*/
5408 case 0xe721: /* VLGV - vector load gr from vr element */
5409 /* 64-bit gpr destination + fpc for possible DXC write */
5410 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5411 return -1;
5412 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5413 return -1;
5414 break;
5415
5416 /* 0xe38a-0xe38d undefined */
5417 /* 0xe392-0xe393 undefined */
5418 /* 0xe39a-0xe39b undefined */
5419 /* 0xe39e undefined */
5420
5421 case 0xe39f: /* LAT - load and trap */
5422 /* 32-bit gpr destination + fpc for possible DXC write */
5423 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5424 return -1;
5425 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5426 return -1;
5427 break;
5428
5429 /* 0xe3a0-0xe3bf undefined */
5430
5431 case 0xe3c0: /* LBH - load byte high */
5432 case 0xe3c2: /* LLCH - load logical character high */
5433 case 0xe3c4: /* LHH - load halfword high */
5434 case 0xe3c6: /* LLHH - load logical halfword high */
5435 case 0xe3ca: /* LFH - load high */
5436 case 0xebe0: /* LOCFH - load high on condition */
5437 /* 32-bit high gpr destination */
5438 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5439 return -1;
5440 break;
5441
5442 /* 0xe3c1 undefined */
5443 /* 0xe3c5 undefined */
5444
5445 case 0xe3c8: /* LFHAT - load high and trap */
5446 /* 32-bit high gpr destination + fpc for possible DXC write */
5447 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5448 return -1;
5449 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5450 return -1;
5451 break;
5452
5453 /* 0xe3c9 undefined */
5454 /* 0xe3cc undefined */
5455 /* 0xe3ce undefined */
5456 /* 0xe3d0-0xe3ff undefined */
5457
5458 case 0xe634: /* VPKZ - vector pack zoned */
5459 case 0xe635: /* VLRL - vector load rightmost with immed. length */
5460 case 0xe637: /* VLRLR - vector load rightmost with length */
5461 case 0xe649: /* VLIP - vector load immediate decimal */
5462 case 0xe700: /* VLEB - vector load element */
5463 case 0xe701: /* VLEH - vector load element */
5464 case 0xe702: /* VLEG - vector load element */
5465 case 0xe703: /* VLEF - vector load element */
5466 case 0xe704: /* VLLEZ - vector load logical element and zero */
5467 case 0xe705: /* VLREP - vector load and replicate */
5468 case 0xe706: /* VL - vector load */
5469 case 0xe707: /* VLBB - vector load to block bounduary */
5470 case 0xe712: /* VGEG - vector gather element */
5471 case 0xe713: /* VGEF - vector gather element */
5472 case 0xe722: /* VLVG - vector load vr element from gr */
5473 case 0xe730: /* VESL - vector element shift left */
5474 case 0xe733: /* VERLL - vector element rotate left logical */
5475 case 0xe737: /* VLL - vector load with length */
5476 case 0xe738: /* VESRL - vector element shift right logical */
5477 case 0xe73a: /* VESRA - vector element shift right arithmetic */
5478 case 0xe740: /* VLEIB - vector load element immediate */
5479 case 0xe741: /* VLEIH - vector load element immediate */
5480 case 0xe742: /* VLEIG - vector load element immediate */
5481 case 0xe743: /* VLEIF - vector load element immediate */
5482 case 0xe744: /* VGBM - vector generate byte mask */
5483 case 0xe745: /* VREPI - vector replicate immediate */
5484 case 0xe746: /* VGM - vector generate mask */
5485 case 0xe74d: /* VREP - vector replicate */
5486 case 0xe750: /* VPOPCT - vector population count */
5487 case 0xe752: /* VCTZ - vector count trailing zeros */
5488 case 0xe753: /* VCLZ - vector count leading zeros */
5489 case 0xe756: /* VLR - vector load */
5490 case 0xe75f: /* VSEG -vector sign extend to doubleword */
5491 case 0xe760: /* VMRL - vector merge low */
5492 case 0xe761: /* VMRH - vector merge high */
5493 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
5494 case 0xe764: /* VSUM - vector sum across word */
5495 case 0xe765: /* VSUMG - vector sum across doubleword */
5496 case 0xe766: /* VCKSM - vector checksum */
5497 case 0xe767: /* VSUMQ - vector sum across quadword */
5498 case 0xe768: /* VN - vector and */
5499 case 0xe769: /* VNC - vector and with complement */
5500 case 0xe76a: /* VO - vector or */
5501 case 0xe76b: /* VNO - vector nor */
5502 case 0xe76c: /* VNX - vector not exclusive or */
5503 case 0xe76d: /* VX - vector xor */
5504 case 0xe76e: /* VNN - vector nand */
5505 case 0xe76f: /* VOC - vector or with complement */
5506 case 0xe770: /* VESLV - vector element shift left */
5507 case 0xe772: /* VERIM - vector element rotate and insert under mask */
5508 case 0xe773: /* VERLLV - vector element rotate left logical */
5509 case 0xe774: /* VSL - vector shift left */
5510 case 0xe775: /* VSLB - vector shift left by byte */
5511 case 0xe777: /* VSLDB - vector shift left double by byte */
5512 case 0xe778: /* VESRLV - vector element shift right logical */
5513 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
5514 case 0xe77c: /* VSRL - vector shift right logical */
5515 case 0xe77d: /* VSRLB - vector shift right logical by byte */
5516 case 0xe77e: /* VSRA - vector shift right arithmetic */
5517 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
5518 case 0xe784: /* VPDI - vector permute doubleword immediate */
5519 case 0xe785: /* VBPERM - vector bit permute */
5520 case 0xe78c: /* VPERM - vector permute */
5521 case 0xe78d: /* VSEL - vector select */
5522 case 0xe78e: /* VFMS - vector fp multiply and subtract */
5523 case 0xe78f: /* VFMA - vector fp multiply and add */
5524 case 0xe794: /* VPK - vector pack */
5525 case 0xe79e: /* VFNMS - vector fp negative multiply and subtract */
5526 case 0xe79f: /* VFNMA - vector fp negative multiply and add */
5527 case 0xe7a1: /* VMLH - vector multiply logical high */
5528 case 0xe7a2: /* VML - vector multiply low */
5529 case 0xe7a3: /* VMH - vector multiply high */
5530 case 0xe7a4: /* VMLE - vector multiply logical even */
5531 case 0xe7a5: /* VMLO - vector multiply logical odd */
5532 case 0xe7a6: /* VME - vector multiply even */
5533 case 0xe7a7: /* VMO - vector multiply odd */
5534 case 0xe7a9: /* VMALH - vector multiply and add logical high */
5535 case 0xe7aa: /* VMAL - vector multiply and add low */
5536 case 0xe7ab: /* VMAH - vector multiply and add high */
5537 case 0xe7ac: /* VMALE - vector multiply and add logical even */
5538 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
5539 case 0xe7ae: /* VMAE - vector multiply and add even */
5540 case 0xe7af: /* VMAO - vector multiply and add odd */
5541 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
5542 case 0xe7b8: /* VMSL - vector multiply sum logical */
5543 case 0xe7b9: /* VACCC - vector add with carry compute carry */
5544 case 0xe7bb: /* VAC - vector add with carry */
5545 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
5546 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
5547 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
5548 case 0xe7c0: /* VCLGD - vector convert to logical 64-bit */
5549 case 0xe7c1: /* VCDLG - vector convert from logical 64-bit */
5550 case 0xe7c2: /* VCGD - vector convert to fixed 64-bit */
5551 case 0xe7c3: /* VCDG - vector convert from fixed 64-bit */
5552 case 0xe7c4: /* VLDE/VFLL - vector fp load lengthened */
5553 case 0xe7c5: /* VLED/VFLR - vector fp load rounded */
5554 case 0xe7c7: /* VFI - vector load fp integer */
5555 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
5556 case 0xe7ce: /* VFSQ - vector fp square root */
5557 case 0xe7d4: /* VUPLL - vector unpack logical low */
5558 case 0xe7d6: /* VUPL - vector unpack low */
5559 case 0xe7d5: /* VUPLH - vector unpack logical high */
5560 case 0xe7d7: /* VUPH - vector unpack high */
5561 case 0xe7de: /* VLC - vector load complement */
5562 case 0xe7df: /* VLP - vector load positive */
5563 case 0xe7e2: /* VFA - vector fp subtract */
5564 case 0xe7e3: /* VFA - vector fp add */
5565 case 0xe7e5: /* VFD - vector fp divide */
5566 case 0xe7e7: /* VFM - vector fp multiply */
5567 case 0xe7ee: /* VFMIN - vector fp minimum */
5568 case 0xe7ef: /* VFMAX - vector fp maximum */
5569 case 0xe7f0: /* VAVGL - vector average logical */
5570 case 0xe7f1: /* VACC - vector add and compute carry */
5571 case 0xe7f2: /* VAVG - vector average */
5572 case 0xe7f3: /* VA - vector add */
5573 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
5574 case 0xe7f7: /* VS - vector subtract */
5575 case 0xe7fc: /* VMNL - vector minimum logical */
5576 case 0xe7fd: /* VMXL - vector maximum logical */
5577 case 0xe7fe: /* VMN - vector minimum */
5578 case 0xe7ff: /* VMX - vector maximum */
5579 /* vector destination + FPC */
5580 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5581 return -1;
5582 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5583 return -1;
5584 break;
5585
5586 case 0xe63d: /* VSTRL - vector store rightmost with immed. length */
5587 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5588 if (record_full_arch_list_add_mem (oaddr, inib[3] + 1))
5589 return -1;
5590 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5591 return -1;
5592 break;
5593
5594 case 0xe708: /* VSTEB - vector store element */
5595 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5596 if (record_full_arch_list_add_mem (oaddr, 1))
5597 return -1;
5598 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5599 return -1;
5600 break;
5601
5602 case 0xe709: /* VSTEH - vector store element */
5603 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5604 if (record_full_arch_list_add_mem (oaddr, 2))
5605 return -1;
5606 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5607 return -1;
5608 break;
5609
5610 case 0xe70a: /* VSTEG - vector store element */
5611 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5612 if (record_full_arch_list_add_mem (oaddr, 8))
5613 return -1;
5614 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5615 return -1;
5616 break;
5617
5618 case 0xe70b: /* VSTEF - vector store element */
5619 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5620 if (record_full_arch_list_add_mem (oaddr, 4))
5621 return -1;
5622 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5623 return -1;
5624 break;
5625
5626 /* 0xe70c-0xe70d undefined */
5627
5628 case 0xe70e: /* VST - vector store */
5629 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5630 if (record_full_arch_list_add_mem (oaddr, 16))
5631 return -1;
5632 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5633 return -1;
5634 break;
5635
5636 /* 0xe70f-0xe711 undefined */
5637 /* 0xe714-0xe719 undefined */
5638
5639 case 0xe71a: /* VSCEG - vector scatter element */
5640 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 8, insn[1], 0, &oaddr))
5641 return -1;
5642 if (record_full_arch_list_add_mem (oaddr, 8))
5643 return -1;
5644 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5645 return -1;
5646 break;
5647
5648 case 0xe71b: /* VSCEF - vector scatter element */
5649 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 4, insn[1], 0, &oaddr))
5650 return -1;
5651 if (record_full_arch_list_add_mem (oaddr, 4))
5652 return -1;
5653 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5654 return -1;
5655 break;
5656
5657 /* 0xe71c-0xe720 undefined */
5658 /* 0xe723-0xe726 undefined */
5659 /* 0xe728-0xe72f undefined */
5660 /* 0xe731-0xe732 undefined */
5661 /* 0xe734-0xe735 undefined */
5662
5663 case 0xe736: /* VLM - vector load multiple */
5664 for (i = ivec[0]; i != ivec[1]; i++, i &= 0x1f)
5665 if (s390_record_vr (gdbarch, regcache, i))
5666 return -1;
5667 if (s390_record_vr (gdbarch, regcache, ivec[1]))
5668 return -1;
5669 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5670 return -1;
5671 break;
5672
5673 /* 0xe739 undefined */
5674 /* 0xe73b-0xe73d undefined */
5675
5676 case 0xe73e: /* VSTM - vector store multiple */
5677 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5678 if (ivec[0] <= ivec[1])
5679 n = ivec[1] - ivec[0] + 1;
5680 else
5681 n = ivec[1] + 0x20 - ivec[0] + 1;
5682 if (record_full_arch_list_add_mem (oaddr, n * 16))
5683 return -1;
5684 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5685 return -1;
5686 break;
5687
5688 case 0xe63c: /* VUPKZ - vector unpack zoned */
5689 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5690 if (record_full_arch_list_add_mem (oaddr, (ibyte[1] + 1) & 31))
5691 return -1;
5692 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5693 return -1;
5694 break;
5695
5696 case 0xe63f: /* VSTRLR - vector store rightmost with length */
5697 case 0xe73f: /* VSTL - vector store with length */
5698 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5699 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[3], &tmp);
5700 tmp &= 0xffffffffu;
5701 if (tmp > 15)
5702 tmp = 15;
5703 if (record_full_arch_list_add_mem (oaddr, tmp + 1))
5704 return -1;
5705 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5706 return -1;
5707 break;
5708
5709 /* 0xe747-0xe749 undefined */
5710
5711 case 0xe658: /* VCVD - vector convert to decimal 32 bit */
5712 case 0xe659: /* VSRP - vector shift and round decimal */
5713 case 0xe65a: /* VCVDG - vector convert to decimal 64 bit*/
5714 case 0xe65b: /* VPSOP - vector perform sign operation decimal */
5715 case 0xe671: /* VAP - vector add decimal */
5716 case 0xe673: /* VSP - vector subtract decimal */
5717 case 0xe678: /* VMP - vector multiply decimal */
5718 case 0xe679: /* VMSP - vector multiply decimal */
5719 case 0xe67a: /* VDP - vector divide decimal */
5720 case 0xe67b: /* VRP - vector remainder decimal */
5721 case 0xe67e: /* VSDP - vector shift and divide decimal */
5722 case 0xe74a: /* VFTCI - vector fp test data class immediate */
5723 case 0xe75c: /* VISTR - vector isolate string */
5724 case 0xe780: /* VFEE - vector find element equal */
5725 case 0xe781: /* VFENE - vector find element not equal */
5726 case 0xe782: /* VFA - vector find any element equal */
5727 case 0xe78a: /* VSTRC - vector string range compare */
5728 case 0xe795: /* VPKLS - vector pack logical saturate */
5729 case 0xe797: /* VPKS - vector pack saturate */
5730 case 0xe7e8: /* VFCE - vector fp compare equal */
5731 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
5732 case 0xe7eb: /* VFCH - vector fp compare high */
5733 case 0xe7f8: /* VCEQ - vector compare equal */
5734 case 0xe7f9: /* VCHL - vector compare high logical */
5735 case 0xe7fb: /* VCH - vector compare high */
5736 /* vector destination + flags + FPC */
5737 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5738 return -1;
5739 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5740 return -1;
5741 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5742 return -1;
5743 break;
5744
5745 case 0xe65f: /* VTP - vector test decimal */
5746 /* flags + FPC */
5747 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5748 return -1;
5749 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5750 return -1;
5751 break;
5752
5753 /* 0xe74b-0xe74c undefined */
5754 /* 0xe74e-0xe74f undefined */
5755 /* 0xe751 undefined */
5756 /* 0xe754-0xe755 undefined */
5757 /* 0xe757-0xe75b undefined */
5758 /* 0xe75d-0xe75e undefined */
5759 /* 0xe763 undefined */
5760 /* 0xe771 undefined */
5761 /* 0xe776 undefined */
5762 /* 0xe779 undefined */
5763 /* 0xe77b undefined */
5764 /* 0xe783 undefined */
5765 /* 0xe786-0xe789 undefined */
5766 /* 0xe78b undefined */
5767 /* 0xe790-0xe793 undefined */
5768 /* 0xe796 undefined */
5769 /* 0xe798-0xe79d undefined */
5770 /* 0xe7a0 undefined */
5771 /* 0xe7a8 undefined */
5772 /* 0xe7b0-0xe7b3 undefined */
5773 /* 0xe7b5-0xe7b7 undefined */
5774 /* 0xe7ba undefined */
5775 /* 0xe7be undefined */
5776 /* 0xe7c6 undefined */
5777 /* 0xe7c8-0xe7c9 undefined */
5778
5779 case 0xe677: /* VCP - vector compare decimal */
5780 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
5781 case 0xe7cb: /* WFC - vector fp compare scalar */
5782 case 0xe7d8: /* VTM - vector test under mask */
5783 case 0xe7d9: /* VECL - vector element compare logical */
5784 case 0xe7db: /* VEC - vector element compare */
5785 case 0xed08: /* KEB - compare and signal */
5786 case 0xed09: /* CEB - compare */
5787 case 0xed18: /* KDB - compare and signal */
5788 case 0xed19: /* CDB - compare */
5789 /* flags + fpc only */
5790 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5791 return -1;
5792 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5793 return -1;
5794 break;
5795
5796 /* 0xe7cd undefined */
5797 /* 0xe7cf-0xe7d3 undefined */
5798 /* 0xe7da undefined */
5799 /* 0xe7dc-0xe7dd undefined */
5800 /* 0xe7e0-0xe7e1 undefined */
5801 /* 0xe7e4 undefined */
5802 /* 0xe7e6 undefined */
5803 /* 0xe7e9 undefined */
5804 /* 0xe7ec-0xe7ed undefined */
5805 /* 0xe7f4 undefined */
5806 /* 0xe7f6 undefined */
5807 /* 0xe7fa undefined */
5808
5809 /* 0xeb00-0xeb03 undefined */
5810
5811 case 0xeb04: /* LMG - load multiple */
5812 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
5813 if (s390_record_gpr_g (gdbarch, regcache, i))
5814 return -1;
5815 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
5816 return -1;
5817 break;
5818
5819 /* 0xeb05-0xeb09 undefined */
5820 /* 0xeb0e undefined */
5821 /* 0xeb0f privileged: TRACG */
5822 /* 0xeb10-0xeb13 undefined */
5823
5824 case 0xeb14: /* CSY - compare and swap */
5825 case 0xebf4: /* LAN - load and and */
5826 case 0xebf6: /* LAO - load and or */
5827 case 0xebf7: /* LAX - load and xor */
5828 case 0xebf8: /* LAA - load and add */
5829 case 0xebfa: /* LAAL - load and add logical */
5830 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5831 if (record_full_arch_list_add_mem (oaddr, 4))
5832 return -1;
5833 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5834 return -1;
5835 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5836 return -1;
5837 break;
5838
5839 /* 0xeb15-0xeb1b undefined */
5840 /* 0xeb1e-0xeb1f undefined */
5841 /* 0xeb22 undefined */
5842
5843 case 0xeb23: /* CLT - compare logical and trap */
5844 case 0xeb2b: /* CLGT - compare logical and trap */
5845 /* fpc only - including possible DXC write for trapping insns */
5846 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5847 return -1;
5848 break;
5849
5850 case 0xeb24: /* STMG - store multiple */
5851 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5852 if (inib[2] <= inib[3])
5853 n = inib[3] - inib[2] + 1;
5854 else
5855 n = inib[3] + 0x10 - inib[2] + 1;
5856 if (record_full_arch_list_add_mem (oaddr, n * 8))
5857 return -1;
5858 break;
5859
5860 /* 0xeb25 privileged */
5861
5862 case 0xeb26: /* STMH - store multiple high */
5863 case 0xeb90: /* STMY - store multiple */
5864 case 0xeb9b: /* STAMY - store access multiple */
5865 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5866 if (inib[2] <= inib[3])
5867 n = inib[3] - inib[2] + 1;
5868 else
5869 n = inib[3] + 0x10 - inib[2] + 1;
5870 if (record_full_arch_list_add_mem (oaddr, n * 4))
5871 return -1;
5872 break;
5873
5874 /* 0xeb27-0xeb2a undefined */
5875
5876 case 0xeb2c: /* STCMH - store characters under mask */
5877 case 0xeb2d: /* STCMY - store characters under mask */
5878 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5879 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
5880 return -1;
5881 break;
5882
5883 /* 0xeb2e undefined */
5884 /* 0xeb2f privileged */
5885
5886 case 0xeb30: /* CSG - compare and swap */
5887 case 0xebe4: /* LANG - load and and */
5888 case 0xebe6: /* LAOG - load and or */
5889 case 0xebe7: /* LAXG - load and xor */
5890 case 0xebe8: /* LAAG - load and add */
5891 case 0xebea: /* LAALG - load and add logical */
5892 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5893 if (record_full_arch_list_add_mem (oaddr, 8))
5894 return -1;
5895 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5896 return -1;
5897 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5898 return -1;
5899 break;
5900
5901 case 0xeb31: /* CDSY - compare double and swap */
5902 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5903 if (record_full_arch_list_add_mem (oaddr, 8))
5904 return -1;
5905 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5906 return -1;
5907 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5908 return -1;
5909 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5910 return -1;
5911 break;
5912
5913 /* 0xeb32-0xeb3d undefined */
5914
5915 case 0xeb3e: /* CDSG - compare double and swap */
5916 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5917 if (record_full_arch_list_add_mem (oaddr, 16))
5918 return -1;
5919 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5920 return -1;
5921 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5922 return -1;
5923 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5924 return -1;
5925 break;
5926
5927 /* 0xeb3f-0xeb43 undefined */
5928 /* 0xeb46-0xeb4b undefined */
5929 /* 0xeb4d-0xeb50 undefined */
5930
5931 case 0xeb52: /* MVIY - move */
5932 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5933 if (record_full_arch_list_add_mem (oaddr, 1))
5934 return -1;
5935 break;
5936
5937 case 0xeb54: /* NIY - and */
5938 case 0xeb56: /* OIY - or */
5939 case 0xeb57: /* XIY - xor */
5940 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5941 if (record_full_arch_list_add_mem (oaddr, 1))
5942 return -1;
5943 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5944 return -1;
5945 break;
5946
5947 /* 0xeb53 undefined */
5948 /* 0xeb58-0xeb69 undefined */
5949
5950 case 0xeb6a: /* ASI - add immediate */
5951 case 0xeb6e: /* ALSI - add immediate */
5952 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5953 if (record_full_arch_list_add_mem (oaddr, 4))
5954 return -1;
5955 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5956 return -1;
5957 break;
5958
5959 /* 0xeb6b-0xeb6d undefined */
5960 /* 0xeb6f-0xeb79 undefined */
5961
5962 case 0xeb7a: /* AGSI - add immediate */
5963 case 0xeb7e: /* ALGSI - add immediate */
5964 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5965 if (record_full_arch_list_add_mem (oaddr, 8))
5966 return -1;
5967 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5968 return -1;
5969 break;
5970
5971 /* 0xeb7b-0xeb7d undefined */
5972 /* 0xeb7f undefined */
5973
5974 case 0xeb80: /* ICMH - insert characters under mask */
5975 /* 32-bit high gpr destination + flags */
5976 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5977 return -1;
5978 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5979 return -1;
5980 break;
5981
5982 /* 0xeb82-0xeb8d undefined */
5983
5984 case 0xeb8e: /* MVCLU - move long unicode [partial] */
5985 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
5986 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5987 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
5988 if (record_full_arch_list_add_mem (oaddr, tmp))
5989 return -1;
5990 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5991 return -1;
5992 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5993 return -1;
5994 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
5995 return -1;
5996 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
5997 return -1;
5998 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5999 return -1;
6000 break;
6001
6002 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6003 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6004 return -1;
6005 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6006 return -1;
6007 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6008 return -1;
6009 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6010 return -1;
6011 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6012 return -1;
6013 break;
6014
6015 /* 0xeb91-0xeb95 undefined */
6016
6017 case 0xeb96: /* LMH - load multiple high */
6018 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6019 if (s390_record_gpr_h (gdbarch, regcache, i))
6020 return -1;
6021 if (s390_record_gpr_h (gdbarch, regcache, inib[3]))
6022 return -1;
6023 break;
6024
6025 /* 0xeb97 undefined */
6026
6027 case 0xeb98: /* LMY - load multiple */
6028 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6029 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
6030 return -1;
6031 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6032 return -1;
6033 break;
6034
6035 /* 0xeb99 undefined */
6036
6037 case 0xeb9a: /* LAMY - load access multiple */
6038 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6039 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
6040 return -1;
6041 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
6042 return -1;
6043 break;
6044
6045 /* 0xeb9c-0xebbf undefined */
6046 /* 0xebc1-0xebdb undefined */
6047 /* 0xebe5 undefined */
6048 /* 0xebe9 undefined */
6049 /* 0xebeb-0xebf1 undefined */
6050 /* 0xebf5 undefined */
6051 /* 0xebf9 undefined */
6052 /* 0xebfb-0xebff undefined */
6053
6054 /* 0xed00-0xed03 undefined */
6055
6056 case 0xed04: /* LDEB - load lengthened */
6057 case 0xed0c: /* MDEB - multiply */
6058 case 0xed0d: /* DEB - divide */
6059 case 0xed14: /* SQEB - square root */
6060 case 0xed15: /* SQDB - square root */
6061 case 0xed17: /* MEEB - multiply */
6062 case 0xed1c: /* MDB - multiply */
6063 case 0xed1d: /* DDB - divide */
6064 /* float destination + fpc */
6065 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6066 return -1;
6067 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6068 return -1;
6069 break;
6070
6071 case 0xed05: /* LXDB - load lengthened */
6072 case 0xed06: /* LXEB - load lengthened */
6073 case 0xed07: /* MXDB - multiply */
6074 /* float pair destination + fpc */
6075 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6076 return -1;
6077 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6078 return -1;
6079 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6080 return -1;
6081 break;
6082
6083 case 0xed0a: /* AEB - add */
6084 case 0xed0b: /* SEB - subtract */
6085 case 0xed1a: /* ADB - add */
6086 case 0xed1b: /* SDB - subtract */
6087 /* float destination + flags + fpc */
6088 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6089 return -1;
6090 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6091 return -1;
6092 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6093 return -1;
6094 break;
6095
6096 case 0xed0e: /* MAEB - multiply and add */
6097 case 0xed0f: /* MSEB - multiply and subtract */
6098 case 0xed1e: /* MADB - multiply and add */
6099 case 0xed1f: /* MSDB - multiply and subtract */
6100 case 0xed40: /* SLDT - shift significand left */
6101 case 0xed41: /* SRDT - shift significand right */
6102 case 0xedaa: /* CDZT - convert from zoned */
6103 case 0xedae: /* CDPT - convert from packed */
6104 /* float destination [RXF] + fpc */
6105 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6106 return -1;
6107 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6108 return -1;
6109 break;
6110
6111 /* 0xed13 undefined */
6112 /* 0xed16 undefined */
6113 /* 0xed20-0xed23 undefined */
6114
6115 case 0xed24: /* LDE - load lengthened */
6116 case 0xed34: /* SQE - square root */
6117 case 0xed35: /* SQD - square root */
6118 case 0xed37: /* MEE - multiply */
6119 case 0xed64: /* LEY - load */
6120 case 0xed65: /* LDY - load */
6121 /* float destination */
6122 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6123 return -1;
6124 break;
6125
6126 case 0xed25: /* LXD - load lengthened */
6127 case 0xed26: /* LXE - load lengthened */
6128 /* float pair destination */
6129 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6130 return -1;
6131 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6132 return -1;
6133 break;
6134
6135 /* 0xed27-0xed2d undefined */
6136
6137 case 0xed2e: /* MAE - multiply and add */
6138 case 0xed2f: /* MSE - multiply and subtract */
6139 case 0xed38: /* MAYL - multiply and add unnormalized */
6140 case 0xed39: /* MYL - multiply unnormalized */
6141 case 0xed3c: /* MAYH - multiply and add unnormalized */
6142 case 0xed3d: /* MYH - multiply unnormalized */
6143 case 0xed3e: /* MAD - multiply and add */
6144 case 0xed3f: /* MSD - multiply and subtract */
6145 /* float destination [RXF] */
6146 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6147 return -1;
6148 break;
6149
6150 /* 0xed30-0xed33 undefined */
6151 /* 0xed36 undefined */
6152
6153 case 0xed3a: /* MAY - multiply and add unnormalized */
6154 case 0xed3b: /* MY - multiply unnormalized */
6155 /* float pair destination [RXF] */
6156 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6157 return -1;
6158 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6159 return -1;
6160 break;
6161
6162 /* 0xed42-0xed47 undefind */
6163
6164 case 0xed48: /* SLXT - shift significand left */
6165 case 0xed49: /* SRXT - shift significand right */
6166 case 0xedab: /* CXZT - convert from zoned */
6167 case 0xedaf: /* CXPT - convert from packed */
6168 /* float pair destination [RXF] + fpc */
6169 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6170 return -1;
6171 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6172 return -1;
6173 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6174 return -1;
6175 break;
6176
6177 /* 0xed4a-0xed4f undefind */
6178 /* 0xed52-0xed53 undefind */
6179 /* 0xed56-0xed57 undefind */
6180 /* 0xed5a-0xed63 undefind */
6181 /* 0xed68-0xeda7 undefined */
6182
6183 case 0xeda8: /* CZDT - convert to zoned */
6184 case 0xeda9: /* CZXT - convert to zoned */
6185 case 0xedac: /* CPDT - convert to packed */
6186 case 0xedad: /* CPXT - convert to packed */
6187 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6188 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
6189 return -1;
6190 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6191 return -1;
6192 break;
6193
6194 /* 0xedb0-0xedff undefined */
6195
6196 default:
6197 goto UNKNOWN_OP;
6198 }
6199 break;
6200
6201 /* 0xe4 undefined */
6202
6203 case 0xe5:
6204 /* SSE/SIL-format instruction */
6205 switch (insn[0])
6206 {
6207 /* 0xe500-0xe543 undefined, privileged, or unsupported */
6208
6209 case 0xe544: /* MVHHI - move */
6210 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6211 if (record_full_arch_list_add_mem (oaddr, 2))
6212 return -1;
6213 break;
6214
6215 /* 0xe545-0xe547 undefined */
6216
6217 case 0xe548: /* MVGHI - move */
6218 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6219 if (record_full_arch_list_add_mem (oaddr, 8))
6220 return -1;
6221 break;
6222
6223 /* 0xe549-0xe54b undefined */
6224
6225 case 0xe54c: /* MVHI - move */
6226 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6227 if (record_full_arch_list_add_mem (oaddr, 4))
6228 return -1;
6229 break;
6230
6231 /* 0xe54d-0xe553 undefined */
6232
6233 case 0xe554: /* CHHSI - compare halfword immediate */
6234 case 0xe555: /* CLHHSI - compare logical immediate */
6235 case 0xe558: /* CGHSI - compare halfword immediate */
6236 case 0xe559: /* CLGHSI - compare logical immediate */
6237 case 0xe55c: /* CHSI - compare halfword immediate */
6238 case 0xe55d: /* CLFHSI - compare logical immediate */
6239 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6240 return -1;
6241 break;
6242
6243 /* 0xe556-0xe557 undefined */
6244 /* 0xe55a-0xe55b undefined */
6245 /* 0xe55e-0xe55f undefined */
6246
6247 case 0xe560: /* TBEGIN - transaction begin */
6248 /* The transaction will be immediately aborted after this
6249 instruction, due to single-stepping. This instruction is
6250 only supported so that the program can fail a few times
6251 and go to the non-transactional fallback. */
6252 if (inib[4])
6253 {
6254 /* Transaction diagnostic block - user. */
6255 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6256 if (record_full_arch_list_add_mem (oaddr, 256))
6257 return -1;
6258 }
6259 /* Transaction diagnostic block - supervisor. */
6260 if (record_full_arch_list_add_reg (regcache, S390_TDB_DWORD0_REGNUM))
6261 return -1;
6262 if (record_full_arch_list_add_reg (regcache, S390_TDB_ABORT_CODE_REGNUM))
6263 return -1;
6264 if (record_full_arch_list_add_reg (regcache, S390_TDB_CONFLICT_TOKEN_REGNUM))
6265 return -1;
6266 if (record_full_arch_list_add_reg (regcache, S390_TDB_ATIA_REGNUM))
6267 return -1;
6268 for (i = 0; i < 16; i++)
6269 if (record_full_arch_list_add_reg (regcache, S390_TDB_R0_REGNUM + i))
6270 return -1;
6271 /* And flags. */
6272 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6273 return -1;
6274 break;
6275
6276 /* 0xe561 unsupported: TBEGINC */
6277 /* 0xe562-0xe5ff undefined */
6278
6279 default:
6280 goto UNKNOWN_OP;
6281 }
6282 break;
6283
6284 case 0xec:
6285 /* RIE/RIS/RRS-format instruction */
6286 switch (ibyte[0] << 8 | ibyte[5])
6287 {
6288 /* 0xec00-0xec41 undefined */
6289
6290 case 0xec42: /* LOCHI - load halfword immediate on condition */
6291 case 0xec51: /* RISBLG - rotate then insert selected bits low */
6292 /* 32-bit or native gpr destination */
6293 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6294 return -1;
6295 break;
6296
6297 /* 0xec43 undefined */
6298
6299 case 0xec44: /* BRXHG - branch relative on index high */
6300 case 0xec45: /* BRXLG - branch relative on index low or equal */
6301 case 0xec46: /* LOCGHI - load halfword immediate on condition */
6302 case 0xec59: /* RISBGN - rotate then insert selected bits */
6303 /* 64-bit gpr destination */
6304 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6305 return -1;
6306 break;
6307
6308 /* 0xec47-0xec4d undefined */
6309
6310 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
6311 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
6312 /* 32-bit high gpr destination */
6313 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6314 return -1;
6315 break;
6316
6317 /* 0xec4f-0xec50 undefined */
6318 /* 0xec52-0xec53 undefined */
6319
6320 case 0xec54: /* RNSBG - rotate then and selected bits */
6321 case 0xec55: /* RISBG - rotate then insert selected bits */
6322 case 0xec56: /* ROSBG - rotate then or selected bits */
6323 case 0xec57: /* RXSBG - rotate then xor selected bits */
6324 case 0xecd9: /* AGHIK - add immediate */
6325 case 0xecdb: /* ALGHSIK - add logical immediate */
6326 /* 64-bit gpr destination + flags */
6327 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6328 return -1;
6329 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6330 return -1;
6331 break;
6332
6333 /* 0xec58 undefined */
6334 /* 0xec5a-0xec5c undefined */
6335 /* 0xec5e-0xec63 undefined */
6336
6337 case 0xec64: /* CGRJ - compare and branch relative */
6338 case 0xec65: /* CLGRJ - compare logical and branch relative */
6339 case 0xec76: /* CRJ - compare and branch relative */
6340 case 0xec77: /* CLRJ - compare logical and branch relative */
6341 case 0xec7c: /* CGIJ - compare immediate and branch relative */
6342 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
6343 case 0xec7e: /* CIJ - compare immediate and branch relative */
6344 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
6345 case 0xece4: /* CGRB - compare and branch */
6346 case 0xece5: /* CLGRB - compare logical and branch */
6347 case 0xecf6: /* CRB - compare and branch */
6348 case 0xecf7: /* CLRB - compare logical and branch */
6349 case 0xecfc: /* CGIB - compare immediate and branch */
6350 case 0xecfd: /* CLGIB - compare logical immediate and branch */
6351 case 0xecfe: /* CIB - compare immediate and branch */
6352 case 0xecff: /* CLIB - compare logical immediate and branch */
6353 break;
6354
6355 /* 0xec66-0xec6f undefined */
6356
6357 case 0xec70: /* CGIT - compare immediate and trap */
6358 case 0xec71: /* CLGIT - compare logical immediate and trap */
6359 case 0xec72: /* CIT - compare immediate and trap */
6360 case 0xec73: /* CLFIT - compare logical immediate and trap */
6361 /* fpc only - including possible DXC write for trapping insns */
6362 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6363 return -1;
6364 break;
6365
6366 /* 0xec74-0xec75 undefined */
6367 /* 0xec78-0xec7b undefined */
6368
6369 /* 0xec80-0xecd7 undefined */
6370
6371 case 0xecd8: /* AHIK - add immediate */
6372 case 0xecda: /* ALHSIK - add logical immediate */
6373 /* 32-bit gpr destination + flags */
6374 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6375 return -1;
6376 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6377 return -1;
6378 break;
6379
6380 /* 0xecdc-0xece3 undefined */
6381 /* 0xece6-0xecf5 undefined */
6382 /* 0xecf8-0xecfb undefined */
6383
6384 default:
6385 goto UNKNOWN_OP;
6386 }
6387 break;
6388
6389 case 0xee: /* PLO - perform locked operation */
6390 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
6391 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6392 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
6393 if (!(tmp & 0x100))
6394 {
6395 uint8_t fc = tmp & 0xff;
6396 gdb_byte buf[8];
6397 switch (fc)
6398 {
6399 case 0x00: /* CL */
6400 /* op1c */
6401 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6402 return -1;
6403 /* op3 */
6404 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6405 return -1;
6406 break;
6407
6408 case 0x01: /* CLG */
6409 /* op1c */
6410 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6411 return -1;
6412 /* op3 */
6413 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6414 return -1;
6415 break;
6416
6417 case 0x02: /* CLGR */
6418 /* op1c */
6419 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6420 return -1;
6421 /* op3 */
6422 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6423 return -1;
6424 break;
6425
6426 case 0x03: /* CLX */
6427 /* op1c */
6428 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6429 return -1;
6430 /* op3 */
6431 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6432 return -1;
6433 break;
6434
6435 case 0x08: /* DCS */
6436 /* op3c */
6437 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6438 return -1;
6439 /* fallthru */
6440 case 0x0c: /* CSST */
6441 /* op4 */
6442 if (record_full_arch_list_add_mem (oaddr2, 4))
6443 return -1;
6444 goto CS;
6445
6446 case 0x14: /* CSTST */
6447 /* op8 */
6448 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6449 return -1;
6450 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6451 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6452 if (record_full_arch_list_add_mem (oaddr3, 4))
6453 return -1;
6454 /* fallthru */
6455 case 0x10: /* CSDST */
6456 /* op6 */
6457 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6458 return -1;
6459 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6460 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6461 if (record_full_arch_list_add_mem (oaddr3, 4))
6462 return -1;
6463 /* op4 */
6464 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6465 return -1;
6466 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6467 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6468 if (record_full_arch_list_add_mem (oaddr3, 4))
6469 return -1;
6470 /* fallthru */
6471 case 0x04: /* CS */
6472 CS:
6473 /* op1c */
6474 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6475 return -1;
6476 /* op2 */
6477 if (record_full_arch_list_add_mem (oaddr, 4))
6478 return -1;
6479 break;
6480
6481 case 0x09: /* DCSG */
6482 /* op3c */
6483 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6484 return -1;
6485 goto CSSTG;
6486
6487 case 0x15: /* CSTSTG */
6488 /* op8 */
6489 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6490 return -1;
6491 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6492 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6493 if (record_full_arch_list_add_mem (oaddr3, 8))
6494 return -1;
6495 /* fallthru */
6496 case 0x11: /* CSDSTG */
6497 /* op6 */
6498 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6499 return -1;
6500 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6501 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6502 if (record_full_arch_list_add_mem (oaddr3, 8))
6503 return -1;
6504 /* fallthru */
6505 case 0x0d: /* CSSTG */
6506 CSSTG:
6507 /* op4 */
6508 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6509 return -1;
6510 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6511 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6512 if (record_full_arch_list_add_mem (oaddr3, 8))
6513 return -1;
6514 /* fallthru */
6515 case 0x05: /* CSG */
6516 /* op1c */
6517 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6518 return -1;
6519 /* op2 */
6520 if (record_full_arch_list_add_mem (oaddr, 8))
6521 return -1;
6522 break;
6523
6524 case 0x0a: /* DCSGR */
6525 /* op3c */
6526 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6527 return -1;
6528 /* fallthru */
6529 case 0x0e: /* CSSTGR */
6530 /* op4 */
6531 if (record_full_arch_list_add_mem (oaddr2, 8))
6532 return -1;
6533 goto CSGR;
6534
6535 case 0x16: /* CSTSTGR */
6536 /* op8 */
6537 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6538 return -1;
6539 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6540 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6541 if (record_full_arch_list_add_mem (oaddr3, 8))
6542 return -1;
6543 /* fallthru */
6544 case 0x12: /* CSDSTGR */
6545 /* op6 */
6546 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6547 return -1;
6548 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6549 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6550 if (record_full_arch_list_add_mem (oaddr3, 8))
6551 return -1;
6552 /* op4 */
6553 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6554 return -1;
6555 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6556 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6557 if (record_full_arch_list_add_mem (oaddr3, 8))
6558 return -1;
6559 /* fallthru */
6560 case 0x06: /* CSGR */
6561 CSGR:
6562 /* op1c */
6563 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6564 return -1;
6565 /* op2 */
6566 if (record_full_arch_list_add_mem (oaddr, 8))
6567 return -1;
6568 break;
6569
6570 case 0x0b: /* DCSX */
6571 /* op3c */
6572 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6573 return -1;
6574 goto CSSTX;
6575
6576 case 0x17: /* CSTSTX */
6577 /* op8 */
6578 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6579 return -1;
6580 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6581 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6582 if (record_full_arch_list_add_mem (oaddr3, 16))
6583 return -1;
6584 /* fallthru */
6585 case 0x13: /* CSDSTX */
6586 /* op6 */
6587 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6588 return -1;
6589 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6590 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6591 if (record_full_arch_list_add_mem (oaddr3, 16))
6592 return -1;
6593 /* fallthru */
6594 case 0x0f: /* CSSTX */
6595 CSSTX:
6596 /* op4 */
6597 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6598 return -1;
6599 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6600 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6601 if (record_full_arch_list_add_mem (oaddr3, 16))
6602 return -1;
6603 /* fallthru */
6604 case 0x07: /* CSX */
6605 /* op1c */
6606 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6607 return -1;
6608 /* op2 */
6609 if (record_full_arch_list_add_mem (oaddr, 16))
6610 return -1;
6611 break;
6612
6613 default:
6614 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PLO FC %02x at %s.\n",
6615 fc, paddress (gdbarch, addr));
6616 return -1;
6617 }
6618 }
6619 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6620 return -1;
6621 break;
6622
6623 case 0xef: /* LMD - load multiple disjoint */
6624 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6625 if (s390_record_gpr_g (gdbarch, regcache, i))
6626 return -1;
6627 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6628 return -1;
6629 break;
6630
6631 case 0xf0: /* SRP - shift and round decimal */
6632 case 0xf8: /* ZAP - zero and add */
6633 case 0xfa: /* AP - add decimal */
6634 case 0xfb: /* SP - subtract decimal */
6635 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6636 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6637 return -1;
6638 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6639 return -1;
6640 /* DXC may be written */
6641 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6642 return -1;
6643 break;
6644
6645 case 0xf1: /* MVO - move with offset */
6646 case 0xf2: /* PACK - pack */
6647 case 0xf3: /* UNPK - unpack */
6648 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6649 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6650 return -1;
6651 break;
6652
6653 /* 0xf4-0xf7 undefined */
6654
6655 case 0xf9: /* CP - compare decimal */
6656 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6657 return -1;
6658 /* DXC may be written */
6659 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6660 return -1;
6661 break;
6662
6663 case 0xfc: /* MP - multiply decimal */
6664 case 0xfd: /* DP - divide decimal */
6665 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6666 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6667 return -1;
6668 /* DXC may be written */
6669 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6670 return -1;
6671 break;
6672
6673 /* 0xfe-0xff undefined */
6674
6675 default:
6676 UNKNOWN_OP:
6677 fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %04x "
6678 "at %s.\n", insn[0], paddress (gdbarch, addr));
6679 return -1;
6680 }
6681
6682 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
6683 return -1;
6684 if (record_full_arch_list_add_end ())
6685 return -1;
6686 return 0;
6687 }
6688
6689 /* Miscellaneous. */
6690
6691 /* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
6692 "-mcmodel=large". */
6693
6694 static char *
6695 s390_gcc_target_options (struct gdbarch *gdbarch)
6696 {
6697 return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31");
6698 }
6699
6700 /* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
6701 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
6702 always "s390". Note that an s390x compiler supports "-m31" as
6703 well. */
6704
6705 static const char *
6706 s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
6707 {
6708 return "s390x?";
6709 }
6710
6711 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
6712 gdbarch.h. */
6713
6714 static int
6715 s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
6716 {
6717 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
6718 or indirection. */
6719 || *s == '%' /* Register access. */
6720 || isdigit (*s)); /* Literal number. */
6721 }
6722
6723 /* gdbarch init. */
6724
6725 /* Validate the range of registers. NAMES must be known at compile time. */
6726
6727 #define s390_validate_reg_range(feature, tdesc_data, start, names) \
6728 do \
6729 { \
6730 for (int i = 0; i < ARRAY_SIZE (names); i++) \
6731 if (!tdesc_numbered_register (feature, tdesc_data, start + i, names[i])) \
6732 return false; \
6733 } \
6734 while (0)
6735
6736 /* Validate the target description. Also numbers registers contained in
6737 tdesc. */
6738
6739 static bool
6740 s390_tdesc_valid (struct gdbarch_tdep *tdep,
6741 struct tdesc_arch_data *tdesc_data)
6742 {
6743 static const char *const psw[] = {
6744 "pswm", "pswa"
6745 };
6746 static const char *const gprs[] = {
6747 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
6748 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
6749 };
6750 static const char *const fprs[] = {
6751 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
6752 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
6753 };
6754 static const char *const acrs[] = {
6755 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
6756 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
6757 };
6758 static const char *const gprs_lower[] = {
6759 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
6760 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
6761 };
6762 static const char *const gprs_upper[] = {
6763 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
6764 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
6765 };
6766 static const char *const tdb_regs[] = {
6767 "tdb0", "tac", "tct", "atia",
6768 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
6769 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
6770 };
6771 static const char *const vxrs_low[] = {
6772 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
6773 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
6774 };
6775 static const char *const vxrs_high[] = {
6776 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
6777 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
6778 };
6779 static const char *const gs_cb[] = {
6780 "gsd", "gssm", "gsepla",
6781 };
6782 static const char *const gs_bc[] = {
6783 "bc_gsd", "bc_gssm", "bc_gsepla",
6784 };
6785
6786 const struct target_desc *tdesc = tdep->tdesc;
6787 const struct tdesc_feature *feature;
6788
6789 if (!tdesc_has_registers (tdesc))
6790 return false;
6791
6792 /* Core registers, i.e. general purpose and PSW. */
6793 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
6794 if (feature == NULL)
6795 return false;
6796
6797 s390_validate_reg_range (feature, tdesc_data, S390_PSWM_REGNUM, psw);
6798
6799 if (tdesc_unnumbered_register (feature, "r0"))
6800 {
6801 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM, gprs);
6802 }
6803 else
6804 {
6805 tdep->have_upper = true;
6806 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM,
6807 gprs_lower);
6808 s390_validate_reg_range (feature, tdesc_data, S390_R0_UPPER_REGNUM,
6809 gprs_upper);
6810 }
6811
6812 /* Floating point registers. */
6813 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
6814 if (feature == NULL)
6815 return false;
6816
6817 if (!tdesc_numbered_register (feature, tdesc_data, S390_FPC_REGNUM, "fpc"))
6818 return false;
6819
6820 s390_validate_reg_range (feature, tdesc_data, S390_F0_REGNUM, fprs);
6821
6822 /* Access control registers. */
6823 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
6824 if (feature == NULL)
6825 return false;
6826
6827 s390_validate_reg_range (feature, tdesc_data, S390_A0_REGNUM, acrs);
6828
6829 /* Optional GNU/Linux-specific "registers". */
6830 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
6831 if (feature)
6832 {
6833 tdesc_numbered_register (feature, tdesc_data,
6834 S390_ORIG_R2_REGNUM, "orig_r2");
6835
6836 if (tdesc_numbered_register (feature, tdesc_data,
6837 S390_LAST_BREAK_REGNUM, "last_break"))
6838 tdep->have_linux_v1 = true;
6839
6840 if (tdesc_numbered_register (feature, tdesc_data,
6841 S390_SYSTEM_CALL_REGNUM, "system_call"))
6842 tdep->have_linux_v2 = true;
6843
6844 if (tdep->have_linux_v2 && !tdep->have_linux_v1)
6845 return false;
6846 }
6847
6848 /* Transaction diagnostic block. */
6849 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
6850 if (feature)
6851 {
6852 s390_validate_reg_range (feature, tdesc_data, S390_TDB_DWORD0_REGNUM,
6853 tdb_regs);
6854 tdep->have_tdb = true;
6855 }
6856
6857 /* Vector registers. */
6858 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
6859 if (feature)
6860 {
6861 s390_validate_reg_range (feature, tdesc_data, S390_V0_LOWER_REGNUM,
6862 vxrs_low);
6863 s390_validate_reg_range (feature, tdesc_data, S390_V16_REGNUM,
6864 vxrs_high);
6865 tdep->have_vx = true;
6866 }
6867
6868 /* Guarded-storage registers. */
6869 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gs");
6870 if (feature)
6871 {
6872 s390_validate_reg_range (feature, tdesc_data, S390_GSD_REGNUM, gs_cb);
6873 tdep->have_gs = true;
6874 }
6875
6876 /* Guarded-storage broadcast control. */
6877 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gsbc");
6878 if (feature)
6879 {
6880 if (!tdep->have_gs)
6881 return false;
6882 s390_validate_reg_range (feature, tdesc_data, S390_BC_GSD_REGNUM,
6883 gs_bc);
6884 }
6885
6886 return true;
6887 }
6888
6889 /* Allocate and initialize new gdbarch_tdep. Caller is responsible to free
6890 memory after use. */
6891
6892 static struct gdbarch_tdep *
6893 s390_gdbarch_tdep_alloc ()
6894 {
6895 struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep);
6896
6897 tdep->tdesc = NULL;
6898
6899 tdep->abi = ABI_NONE;
6900 tdep->vector_abi = S390_VECTOR_ABI_NONE;
6901
6902 tdep->gpr_full_regnum = -1;
6903 tdep->v0_full_regnum = -1;
6904 tdep->pc_regnum = -1;
6905 tdep->cc_regnum = -1;
6906
6907 tdep->have_upper = false;
6908 tdep->have_linux_v1 = false;
6909 tdep->have_linux_v2 = false;
6910 tdep->have_tdb = false;
6911 tdep->have_vx = false;
6912 tdep->have_gs = false;
6913
6914 tdep->s390_syscall_record = NULL;
6915
6916 return tdep;
6917 }
6918
6919 /* Set up gdbarch struct. */
6920
6921 static struct gdbarch *
6922 s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
6923 {
6924 const struct target_desc *tdesc = info.target_desc;
6925 int first_pseudo_reg, last_pseudo_reg;
6926 static const char *const stap_register_prefixes[] = { "%", NULL };
6927 static const char *const stap_register_indirection_prefixes[] = { "(",
6928 NULL };
6929 static const char *const stap_register_indirection_suffixes[] = { ")",
6930 NULL };
6931
6932 struct gdbarch_tdep *tdep = s390_gdbarch_tdep_alloc ();
6933 struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
6934 struct tdesc_arch_data *tdesc_data = tdesc_data_alloc ();
6935 info.tdesc_data = tdesc_data;
6936
6937 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
6938 set_gdbarch_char_signed (gdbarch, 0);
6939
6940 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
6941 We can safely let them default to 128-bit, since the debug info
6942 will give the size of type actually used in each case. */
6943 set_gdbarch_long_double_bit (gdbarch, 128);
6944 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
6945
6946 /* Breakpoints. */
6947 /* Amount PC must be decremented by after a breakpoint. This is
6948 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
6949 always. */
6950 set_gdbarch_decr_pc_after_break (gdbarch, 2);
6951 set_gdbarch_breakpoint_kind_from_pc (gdbarch, s390_breakpoint::kind_from_pc);
6952 set_gdbarch_sw_breakpoint_from_kind (gdbarch, s390_breakpoint::bp_from_kind);
6953
6954 /* Displaced stepping. */
6955 set_gdbarch_displaced_step_copy_insn (gdbarch,
6956 s390_displaced_step_copy_insn);
6957 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
6958 set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location);
6959 set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep);
6960 set_gdbarch_software_single_step (gdbarch, s390_software_single_step);
6961 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
6962
6963 /* Prologue analysis. */
6964 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
6965
6966 /* Register handling. */
6967 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
6968 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
6969 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
6970 set_gdbarch_guess_tracepoint_registers (gdbarch,
6971 s390_guess_tracepoint_registers);
6972 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
6973 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
6974 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
6975
6976 /* Pseudo registers. */
6977 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
6978 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
6979 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
6980 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
6981 set_tdesc_pseudo_register_reggroup_p (gdbarch,
6982 s390_pseudo_register_reggroup_p);
6983 set_gdbarch_ax_pseudo_register_collect (gdbarch,
6984 s390_ax_pseudo_register_collect);
6985 set_gdbarch_ax_pseudo_register_push_stack
6986 (gdbarch, s390_ax_pseudo_register_push_stack);
6987 set_gdbarch_gen_return_address (gdbarch, s390_gen_return_address);
6988
6989 /* Inferior function calls. */
6990 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
6991 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
6992 set_gdbarch_frame_align (gdbarch, s390_frame_align);
6993 set_gdbarch_return_value (gdbarch, s390_return_value);
6994
6995 /* Frame handling. */
6996 /* Stack grows downward. */
6997 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
6998 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
6999 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7000 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
7001 dwarf2_append_unwinders (gdbarch);
7002 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
7003 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
7004
7005 switch (info.bfd_arch_info->mach)
7006 {
7007 case bfd_mach_s390_31:
7008 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
7009 break;
7010
7011 case bfd_mach_s390_64:
7012 set_gdbarch_long_bit (gdbarch, 64);
7013 set_gdbarch_long_long_bit (gdbarch, 64);
7014 set_gdbarch_ptr_bit (gdbarch, 64);
7015 set_gdbarch_address_class_type_flags (gdbarch,
7016 s390_address_class_type_flags);
7017 set_gdbarch_address_class_type_flags_to_name (gdbarch,
7018 s390_address_class_type_flags_to_name);
7019 set_gdbarch_address_class_name_to_type_flags (gdbarch,
7020 s390_address_class_name_to_type_flags);
7021 break;
7022 }
7023
7024 /* SystemTap functions. */
7025 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
7026 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
7027 stap_register_indirection_prefixes);
7028 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
7029 stap_register_indirection_suffixes);
7030
7031 set_gdbarch_disassembler_options (gdbarch, &s390_disassembler_options);
7032 set_gdbarch_valid_disassembler_options (gdbarch,
7033 disassembler_options_s390 ());
7034
7035 /* Process record-replay */
7036 set_gdbarch_process_record (gdbarch, s390_process_record);
7037
7038 /* Miscellaneous. */
7039 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
7040 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
7041 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
7042
7043 /* Initialize the OSABI. */
7044 gdbarch_init_osabi (info, gdbarch);
7045
7046 /* Always create a default tdesc. Otherwise commands like 'set osabi'
7047 cause GDB to crash with an internal error when the user tries to set
7048 an unsupported OSABI. */
7049 if (!tdesc_has_registers (tdesc))
7050 {
7051 if (info.bfd_arch_info->mach == bfd_mach_s390_31)
7052 tdesc = tdesc_s390_linux32;
7053 else
7054 tdesc = tdesc_s390x_linux64;
7055 }
7056 tdep->tdesc = tdesc;
7057
7058 /* Check any target description for validity. */
7059 if (!s390_tdesc_valid (tdep, tdesc_data))
7060 {
7061 tdesc_data_cleanup (tdesc_data);
7062 xfree (tdep);
7063 gdbarch_free (gdbarch);
7064 return NULL;
7065 }
7066
7067 /* Determine vector ABI. */
7068 #ifdef HAVE_ELF
7069 if (tdep->have_vx
7070 && info.abfd != NULL
7071 && info.abfd->format == bfd_object
7072 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
7073 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
7074 Tag_GNU_S390_ABI_Vector) == 2)
7075 tdep->vector_abi = S390_VECTOR_ABI_128;
7076 #endif
7077
7078 /* Find a candidate among extant architectures. */
7079 for (arches = gdbarch_list_lookup_by_info (arches, &info);
7080 arches != NULL;
7081 arches = gdbarch_list_lookup_by_info (arches->next, &info))
7082 {
7083 struct gdbarch_tdep *tmp = gdbarch_tdep (arches->gdbarch);
7084 if (!tmp)
7085 continue;
7086 /* A program can 'choose' not to use the vector registers when they
7087 are present. Leading to the same tdesc but different tdep and
7088 thereby a different gdbarch. */
7089 if (tmp->vector_abi != tdep->vector_abi)
7090 continue;
7091
7092 tdesc_data_cleanup (tdesc_data);
7093 xfree (tdep);
7094 gdbarch_free (gdbarch);
7095 return arches->gdbarch;
7096 }
7097
7098 tdesc_use_registers (gdbarch, tdep->tdesc, tdesc_data);
7099 set_gdbarch_register_name (gdbarch, s390_register_name);
7100
7101 /* Assign pseudo register numbers. */
7102 first_pseudo_reg = gdbarch_num_regs (gdbarch);
7103 last_pseudo_reg = first_pseudo_reg;
7104 if (tdep->have_upper)
7105 {
7106 tdep->gpr_full_regnum = last_pseudo_reg;
7107 last_pseudo_reg += 16;
7108 }
7109 if (tdep->have_vx)
7110 {
7111 tdep->v0_full_regnum = last_pseudo_reg;
7112 last_pseudo_reg += 16;
7113 }
7114 tdep->pc_regnum = last_pseudo_reg++;
7115 tdep->cc_regnum = last_pseudo_reg++;
7116 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
7117 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
7118
7119 /* Frame handling. */
7120 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
7121 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
7122 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
7123 frame_base_set_default (gdbarch, &s390_frame_base);
7124
7125 return gdbarch;
7126 }
7127
7128 void
7129 _initialize_s390_tdep (void)
7130 {
7131 /* Hook us into the gdbarch mechanism. */
7132 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7133
7134 initialize_tdesc_s390_linux32 ();
7135 initialize_tdesc_s390x_linux64 ();
7136 }
This page took 0.209549 seconds and 5 git commands to generate.