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Fix comments on `struct frame_info'.
[deliverable/binutils-gdb.git] / gdb / sh-tdep.c
1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 /*
23 Contributed by Steve Chamberlain
24 sac@cygnus.com
25 */
26
27 #include "defs.h"
28 #include "frame.h"
29 #include "obstack.h"
30 #include "symtab.h"
31 #include "symfile.h"
32 #include "gdbtypes.h"
33 #include "gdbcmd.h"
34 #include "gdbcore.h"
35 #include "value.h"
36 #include "dis-asm.h"
37 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
38 #include "gdb_string.h"
39 #include "arch-utils.h"
40 #include "floatformat.h"
41 #include "regcache.h"
42 #include "doublest.h"
43
44 #include "solib-svr4.h"
45
46 #undef XMALLOC
47 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
48
49 void (*sh_show_regs) (void);
50 int (*print_sh_insn) (bfd_vma, disassemble_info*);
51 CORE_ADDR (*skip_prologue_hard_way) (CORE_ADDR);
52 void (*do_pseudo_register) (int);
53
54 #define SH_DEFAULT_NUM_REGS 59
55
56 /* Define other aspects of the stack frame.
57 we keep a copy of the worked out return pc lying around, since it
58 is a useful bit of info */
59
60 struct frame_extra_info
61 {
62 CORE_ADDR return_pc;
63 int leaf_function;
64 int f_offset;
65 };
66
67 static char *
68 sh_generic_register_name (int reg_nr)
69 {
70 static char *register_names[] =
71 {
72 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
73 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
74 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
75 "fpul", "fpscr",
76 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
77 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
78 "ssr", "spc",
79 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
80 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
81 };
82 if (reg_nr < 0)
83 return NULL;
84 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
85 return NULL;
86 return register_names[reg_nr];
87 }
88
89 static char *
90 sh_sh_register_name (int reg_nr)
91 {
92 static char *register_names[] =
93 {
94 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
95 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
96 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
97 "", "",
98 "", "", "", "", "", "", "", "",
99 "", "", "", "", "", "", "", "",
100 "", "",
101 "", "", "", "", "", "", "", "",
102 "", "", "", "", "", "", "", "",
103 };
104 if (reg_nr < 0)
105 return NULL;
106 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
107 return NULL;
108 return register_names[reg_nr];
109 }
110
111 static char *
112 sh_sh3_register_name (int reg_nr)
113 {
114 static char *register_names[] =
115 {
116 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
117 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
118 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
119 "", "",
120 "", "", "", "", "", "", "", "",
121 "", "", "", "", "", "", "", "",
122 "ssr", "spc",
123 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
124 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
125 };
126 if (reg_nr < 0)
127 return NULL;
128 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
129 return NULL;
130 return register_names[reg_nr];
131 }
132
133 static char *
134 sh_sh3e_register_name (int reg_nr)
135 {
136 static char *register_names[] =
137 {
138 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
139 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
140 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
141 "fpul", "fpscr",
142 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
143 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
144 "ssr", "spc",
145 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
146 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
147 };
148 if (reg_nr < 0)
149 return NULL;
150 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
151 return NULL;
152 return register_names[reg_nr];
153 }
154
155 static char *
156 sh_sh_dsp_register_name (int reg_nr)
157 {
158 static char *register_names[] =
159 {
160 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
161 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
162 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
163 "", "dsr",
164 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
165 "y0", "y1", "", "", "", "", "", "mod",
166 "", "",
167 "rs", "re", "", "", "", "", "", "",
168 "", "", "", "", "", "", "", "",
169 };
170 if (reg_nr < 0)
171 return NULL;
172 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
173 return NULL;
174 return register_names[reg_nr];
175 }
176
177 static char *
178 sh_sh3_dsp_register_name (int reg_nr)
179 {
180 static char *register_names[] =
181 {
182 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
183 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
184 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
185 "", "dsr",
186 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
187 "y0", "y1", "", "", "", "", "", "mod",
188 "ssr", "spc",
189 "rs", "re", "", "", "", "", "", "",
190 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
191 "", "", "", "", "", "", "", "",
192 };
193 if (reg_nr < 0)
194 return NULL;
195 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
196 return NULL;
197 return register_names[reg_nr];
198 }
199
200 static char *
201 sh_sh4_register_name (int reg_nr)
202 {
203 static char *register_names[] =
204 {
205 /* general registers 0-15 */
206 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
207 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
208 /* 16 - 22 */
209 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
210 /* 23, 24 */
211 "fpul", "fpscr",
212 /* floating point registers 25 - 40 */
213 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
214 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
215 /* 41, 42 */
216 "ssr", "spc",
217 /* bank 0 43 - 50 */
218 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
219 /* bank 1 51 - 58 */
220 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
221 /* double precision (pseudo) 59 - 66 */
222 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
223 /* vectors (pseudo) 67 - 70 */
224 "fv0", "fv4", "fv8", "fv12",
225 /* FIXME: missing XF 71 - 86 */
226 /* FIXME: missing XD 87 - 94 */
227 };
228 if (reg_nr < 0)
229 return NULL;
230 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
231 return NULL;
232 return register_names[reg_nr];
233 }
234
235 static unsigned char *
236 sh_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
237 {
238 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
239 static unsigned char breakpoint[] = {0xc3, 0xc3};
240
241 *lenptr = sizeof (breakpoint);
242 return breakpoint;
243 }
244
245 /* Prologue looks like
246 [mov.l <regs>,@-r15]...
247 [sts.l pr,@-r15]
248 [mov.l r14,@-r15]
249 [mov r15,r14]
250
251 Actually it can be more complicated than this. For instance, with
252 newer gcc's:
253
254 mov.l r14,@-r15
255 add #-12,r15
256 mov r15,r14
257 mov r4,r1
258 mov r5,r2
259 mov.l r6,@(4,r14)
260 mov.l r7,@(8,r14)
261 mov.b r1,@r14
262 mov r14,r1
263 mov r14,r1
264 add #2,r1
265 mov.w r2,@r1
266
267 */
268
269 /* STS.L PR,@-r15 0100111100100010
270 r15-4-->r15, PR-->(r15) */
271 #define IS_STS(x) ((x) == 0x4f22)
272
273 /* MOV.L Rm,@-r15 00101111mmmm0110
274 r15-4-->r15, Rm-->(R15) */
275 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
276
277 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
278
279 /* MOV r15,r14 0110111011110011
280 r15-->r14 */
281 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
282
283 /* ADD #imm,r15 01111111iiiiiiii
284 r15+imm-->r15 */
285 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
286
287 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
288 #define IS_SHLL_R3(x) ((x) == 0x4300)
289
290 /* ADD r3,r15 0011111100111100
291 r15+r3-->r15 */
292 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
293
294 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
295 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
296 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
297 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
298
299 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
300 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
301 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
302 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
303 #define IS_ARG_MOV(x) \
304 (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
305 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
306 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
307
308 /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
309 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
310 #define IS_MOV_TO_R14(x) \
311 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
312
313 #define FPSCR_SZ (1 << 20)
314
315 /* Skip any prologue before the guts of a function */
316
317 /* Skip the prologue using the debug information. If this fails we'll
318 fall back on the 'guess' method below. */
319 static CORE_ADDR
320 after_prologue (CORE_ADDR pc)
321 {
322 struct symtab_and_line sal;
323 CORE_ADDR func_addr, func_end;
324
325 /* If we can not find the symbol in the partial symbol table, then
326 there is no hope we can determine the function's start address
327 with this code. */
328 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
329 return 0;
330
331 /* Get the line associated with FUNC_ADDR. */
332 sal = find_pc_line (func_addr, 0);
333
334 /* There are only two cases to consider. First, the end of the source line
335 is within the function bounds. In that case we return the end of the
336 source line. Second is the end of the source line extends beyond the
337 bounds of the current function. We need to use the slow code to
338 examine instructions in that case. */
339 if (sal.end < func_end)
340 return sal.end;
341 else
342 return 0;
343 }
344
345 /* Here we look at each instruction in the function, and try to guess
346 where the prologue ends. Unfortunately this is not always
347 accurate. */
348 static CORE_ADDR
349 sh_skip_prologue_hard_way (CORE_ADDR start_pc)
350 {
351 CORE_ADDR here, end;
352 int updated_fp = 0;
353
354 if (!start_pc)
355 return 0;
356
357 for (here = start_pc, end = start_pc + (2 * 28); here < end;)
358 {
359 int w = read_memory_integer (here, 2);
360 here += 2;
361 if (IS_FMOV (w) || IS_PUSH (w) || IS_STS (w) || IS_MOV_R3 (w)
362 || IS_ADD_R3SP (w) || IS_ADD_SP (w) || IS_SHLL_R3 (w)
363 || IS_ARG_MOV (w) || IS_MOV_TO_R14 (w))
364 {
365 start_pc = here;
366 }
367 else if (IS_MOV_SP_FP (w))
368 {
369 start_pc = here;
370 updated_fp = 1;
371 }
372 else
373 /* Don't bail out yet, if we are before the copy of sp. */
374 if (updated_fp)
375 break;
376 }
377
378 return start_pc;
379 }
380
381 static CORE_ADDR
382 sh_skip_prologue (CORE_ADDR pc)
383 {
384 CORE_ADDR post_prologue_pc;
385
386 /* See if we can determine the end of the prologue via the symbol table.
387 If so, then return either PC, or the PC after the prologue, whichever
388 is greater. */
389 post_prologue_pc = after_prologue (pc);
390
391 /* If after_prologue returned a useful address, then use it. Else
392 fall back on the instruction skipping code. */
393 if (post_prologue_pc != 0)
394 return max (pc, post_prologue_pc);
395 else
396 return (skip_prologue_hard_way (pc));
397 }
398
399 /* Immediately after a function call, return the saved pc.
400 Can't always go through the frames for this because on some machines
401 the new frame is not set up until the new function executes
402 some instructions.
403
404 The return address is the value saved in the PR register + 4 */
405 static CORE_ADDR
406 sh_saved_pc_after_call (struct frame_info *frame)
407 {
408 return (ADDR_BITS_REMOVE (read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM)));
409 }
410
411 /* Should call_function allocate stack space for a struct return? */
412 static int
413 sh_use_struct_convention (int gcc_p, struct type *type)
414 {
415 return (TYPE_LENGTH (type) > 1);
416 }
417
418 /* Store the address of the place in which to copy the structure the
419 subroutine will return. This is called from call_function.
420
421 We store structs through a pointer passed in R2 */
422 static void
423 sh_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
424 {
425 write_register (STRUCT_RETURN_REGNUM, (addr));
426 }
427
428 /* Disassemble an instruction. */
429 static int
430 gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
431 {
432 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
433 return print_insn_sh (memaddr, info);
434 else
435 return print_insn_shl (memaddr, info);
436 }
437
438 /* Given a GDB frame, determine the address of the calling function's frame.
439 This will be used to create a new GDB frame struct, and then
440 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
441
442 For us, the frame address is its stack pointer value, so we look up
443 the function prologue to determine the caller's sp value, and return it. */
444 static CORE_ADDR
445 sh_frame_chain (struct frame_info *frame)
446 {
447 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
448 return frame->frame; /* dummy frame same as caller's frame */
449 if (frame->pc && !inside_entry_file (frame->pc))
450 return read_memory_integer (FRAME_FP (frame) + frame->extra_info->f_offset, 4);
451 else
452 return 0;
453 }
454
455 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
456 we might want to do here is to check REGNUM against the clobber mask, and
457 somehow flag it as invalid if it isn't saved on the stack somewhere. This
458 would provide a graceful failure mode when trying to get the value of
459 caller-saves registers for an inner frame. */
460 static CORE_ADDR
461 sh_find_callers_reg (struct frame_info *fi, int regnum)
462 {
463 for (; fi; fi = fi->next)
464 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
465 /* When the caller requests PR from the dummy frame, we return PC because
466 that's where the previous routine appears to have done a call from. */
467 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
468 else
469 {
470 FRAME_INIT_SAVED_REGS (fi);
471 if (!fi->pc)
472 return 0;
473 if (fi->saved_regs[regnum] != 0)
474 return read_memory_integer (fi->saved_regs[regnum],
475 REGISTER_RAW_SIZE (regnum));
476 }
477 return read_register (regnum);
478 }
479
480 /* Put here the code to store, into a struct frame_saved_regs, the
481 addresses of the saved registers of frame described by FRAME_INFO.
482 This includes special registers such as pc and fp saved in special
483 ways in the stack frame. sp is even more special: the address we
484 return for it IS the sp for the next frame. */
485 static void
486 sh_nofp_frame_init_saved_regs (struct frame_info *fi)
487 {
488 int where[NUM_REGS];
489 int rn;
490 int have_fp = 0;
491 int depth;
492 int pc;
493 int opc;
494 int insn;
495 int r3_val = 0;
496 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
497
498 if (fi->saved_regs == NULL)
499 frame_saved_regs_zalloc (fi);
500 else
501 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
502
503 if (dummy_regs)
504 {
505 /* DANGER! This is ONLY going to work if the char buffer format of
506 the saved registers is byte-for-byte identical to the
507 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
508 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
509 return;
510 }
511
512 fi->extra_info->leaf_function = 1;
513 fi->extra_info->f_offset = 0;
514
515 for (rn = 0; rn < NUM_REGS; rn++)
516 where[rn] = -1;
517
518 depth = 0;
519
520 /* Loop around examining the prologue insns until we find something
521 that does not appear to be part of the prologue. But give up
522 after 20 of them, since we're getting silly then. */
523
524 pc = get_pc_function_start (fi->pc);
525 if (!pc)
526 {
527 fi->pc = 0;
528 return;
529 }
530
531 for (opc = pc + (2 * 28); pc < opc; pc += 2)
532 {
533 insn = read_memory_integer (pc, 2);
534 /* See where the registers will be saved to */
535 if (IS_PUSH (insn))
536 {
537 rn = GET_PUSHED_REG (insn);
538 where[rn] = depth;
539 depth += 4;
540 }
541 else if (IS_STS (insn))
542 {
543 where[gdbarch_tdep (current_gdbarch)->PR_REGNUM] = depth;
544 /* If we're storing the pr then this isn't a leaf */
545 fi->extra_info->leaf_function = 0;
546 depth += 4;
547 }
548 else if (IS_MOV_R3 (insn))
549 {
550 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
551 }
552 else if (IS_SHLL_R3 (insn))
553 {
554 r3_val <<= 1;
555 }
556 else if (IS_ADD_R3SP (insn))
557 {
558 depth += -r3_val;
559 }
560 else if (IS_ADD_SP (insn))
561 {
562 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
563 }
564 else if (IS_MOV_SP_FP (insn))
565 break;
566 #if 0 /* This used to just stop when it found an instruction that
567 was not considered part of the prologue. Now, we just
568 keep going looking for likely instructions. */
569 else
570 break;
571 #endif
572 }
573
574 /* Now we know how deep things are, we can work out their addresses */
575
576 for (rn = 0; rn < NUM_REGS; rn++)
577 {
578 if (where[rn] >= 0)
579 {
580 if (rn == FP_REGNUM)
581 have_fp = 1;
582
583 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
584 }
585 else
586 {
587 fi->saved_regs[rn] = 0;
588 }
589 }
590
591 if (have_fp)
592 {
593 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
594 }
595 else
596 {
597 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
598 }
599
600 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
601 /* Work out the return pc - either from the saved pr or the pr
602 value */
603 }
604
605 /* For vectors of 4 floating point registers. */
606 static int
607 fv_reg_base_num (int fv_regnum)
608 {
609 int fp_regnum;
610
611 fp_regnum = FP0_REGNUM +
612 (fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM) * 4;
613 return fp_regnum;
614 }
615
616 /* For double precision floating point registers, i.e 2 fp regs.*/
617 static int
618 dr_reg_base_num (int dr_regnum)
619 {
620 int fp_regnum;
621
622 fp_regnum = FP0_REGNUM +
623 (dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM) * 2;
624 return fp_regnum;
625 }
626
627 static void
628 sh_fp_frame_init_saved_regs (struct frame_info *fi)
629 {
630 int where[NUM_REGS];
631 int rn;
632 int have_fp = 0;
633 int depth;
634 int pc;
635 int opc;
636 int insn;
637 int r3_val = 0;
638 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
639
640 if (fi->saved_regs == NULL)
641 frame_saved_regs_zalloc (fi);
642 else
643 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
644
645 if (dummy_regs)
646 {
647 /* DANGER! This is ONLY going to work if the char buffer format of
648 the saved registers is byte-for-byte identical to the
649 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
650 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
651 return;
652 }
653
654 fi->extra_info->leaf_function = 1;
655 fi->extra_info->f_offset = 0;
656
657 for (rn = 0; rn < NUM_REGS; rn++)
658 where[rn] = -1;
659
660 depth = 0;
661
662 /* Loop around examining the prologue insns until we find something
663 that does not appear to be part of the prologue. But give up
664 after 20 of them, since we're getting silly then. */
665
666 pc = get_pc_function_start (fi->pc);
667 if (!pc)
668 {
669 fi->pc = 0;
670 return;
671 }
672
673 for (opc = pc + (2 * 28); pc < opc; pc += 2)
674 {
675 insn = read_memory_integer (pc, 2);
676 /* See where the registers will be saved to */
677 if (IS_PUSH (insn))
678 {
679 rn = GET_PUSHED_REG (insn);
680 where[rn] = depth;
681 depth += 4;
682 }
683 else if (IS_STS (insn))
684 {
685 where[gdbarch_tdep (current_gdbarch)->PR_REGNUM] = depth;
686 /* If we're storing the pr then this isn't a leaf */
687 fi->extra_info->leaf_function = 0;
688 depth += 4;
689 }
690 else if (IS_MOV_R3 (insn))
691 {
692 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
693 }
694 else if (IS_SHLL_R3 (insn))
695 {
696 r3_val <<= 1;
697 }
698 else if (IS_ADD_R3SP (insn))
699 {
700 depth += -r3_val;
701 }
702 else if (IS_ADD_SP (insn))
703 {
704 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
705 }
706 else if (IS_FMOV (insn))
707 {
708 if (read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & FPSCR_SZ)
709 {
710 depth += 8;
711 }
712 else
713 {
714 depth += 4;
715 }
716 }
717 else if (IS_MOV_SP_FP (insn))
718 break;
719 #if 0 /* This used to just stop when it found an instruction that
720 was not considered part of the prologue. Now, we just
721 keep going looking for likely instructions. */
722 else
723 break;
724 #endif
725 }
726
727 /* Now we know how deep things are, we can work out their addresses */
728
729 for (rn = 0; rn < NUM_REGS; rn++)
730 {
731 if (where[rn] >= 0)
732 {
733 if (rn == FP_REGNUM)
734 have_fp = 1;
735
736 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
737 }
738 else
739 {
740 fi->saved_regs[rn] = 0;
741 }
742 }
743
744 if (have_fp)
745 {
746 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
747 }
748 else
749 {
750 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
751 }
752
753 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
754 /* Work out the return pc - either from the saved pr or the pr
755 value */
756 }
757
758 /* Initialize the extra info saved in a FRAME */
759 static void
760 sh_init_extra_frame_info (int fromleaf, struct frame_info *fi)
761 {
762
763 fi->extra_info = (struct frame_extra_info *)
764 frame_obstack_alloc (sizeof (struct frame_extra_info));
765
766 if (fi->next)
767 fi->pc = FRAME_SAVED_PC (fi->next);
768
769 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
770 {
771 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
772 by assuming it's always FP. */
773 fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
774 SP_REGNUM);
775 fi->extra_info->return_pc = generic_read_register_dummy (fi->pc, fi->frame,
776 PC_REGNUM);
777 fi->extra_info->f_offset = -(CALL_DUMMY_LENGTH + 4);
778 fi->extra_info->leaf_function = 0;
779 return;
780 }
781 else
782 {
783 FRAME_INIT_SAVED_REGS (fi);
784 fi->extra_info->return_pc = sh_find_callers_reg (fi, gdbarch_tdep (current_gdbarch)->PR_REGNUM);
785 }
786 }
787
788 /* Extract from an array REGBUF containing the (raw) register state
789 the address in which a function should return its structure value,
790 as a CORE_ADDR (or an expression that can be used as one). */
791 static CORE_ADDR
792 sh_extract_struct_value_address (char *regbuf)
793 {
794 return (extract_address ((regbuf), REGISTER_RAW_SIZE (0)));
795 }
796
797 static CORE_ADDR
798 sh_frame_saved_pc (struct frame_info *frame)
799 {
800 return ((frame)->extra_info->return_pc);
801 }
802
803 /* Discard from the stack the innermost frame,
804 restoring all saved registers. */
805 static void
806 sh_pop_frame (void)
807 {
808 register struct frame_info *frame = get_current_frame ();
809 register CORE_ADDR fp;
810 register int regnum;
811
812 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
813 generic_pop_dummy_frame ();
814 else
815 {
816 fp = FRAME_FP (frame);
817 FRAME_INIT_SAVED_REGS (frame);
818
819 /* Copy regs from where they were saved in the frame */
820 for (regnum = 0; regnum < NUM_REGS; regnum++)
821 if (frame->saved_regs[regnum])
822 write_register (regnum, read_memory_integer (frame->saved_regs[regnum], 4));
823
824 write_register (PC_REGNUM, frame->extra_info->return_pc);
825 write_register (SP_REGNUM, fp + 4);
826 }
827 flush_cached_frames ();
828 }
829
830 /* Function: push_arguments
831 Setup the function arguments for calling a function in the inferior.
832
833 On the Hitachi SH architecture, there are four registers (R4 to R7)
834 which are dedicated for passing function arguments. Up to the first
835 four arguments (depending on size) may go into these registers.
836 The rest go on the stack.
837
838 Arguments that are smaller than 4 bytes will still take up a whole
839 register or a whole 32-bit word on the stack, and will be
840 right-justified in the register or the stack word. This includes
841 chars, shorts, and small aggregate types.
842
843 Arguments that are larger than 4 bytes may be split between two or
844 more registers. If there are not enough registers free, an argument
845 may be passed partly in a register (or registers), and partly on the
846 stack. This includes doubles, long longs, and larger aggregates.
847 As far as I know, there is no upper limit to the size of aggregates
848 that will be passed in this way; in other words, the convention of
849 passing a pointer to a large aggregate instead of a copy is not used.
850
851 An exceptional case exists for struct arguments (and possibly other
852 aggregates such as arrays) if the size is larger than 4 bytes but
853 not a multiple of 4 bytes. In this case the argument is never split
854 between the registers and the stack, but instead is copied in its
855 entirety onto the stack, AND also copied into as many registers as
856 there is room for. In other words, space in registers permitting,
857 two copies of the same argument are passed in. As far as I can tell,
858 only the one on the stack is used, although that may be a function
859 of the level of compiler optimization. I suspect this is a compiler
860 bug. Arguments of these odd sizes are left-justified within the
861 word (as opposed to arguments smaller than 4 bytes, which are
862 right-justified).
863
864 If the function is to return an aggregate type such as a struct, it
865 is either returned in the normal return value register R0 (if its
866 size is no greater than one byte), or else the caller must allocate
867 space into which the callee will copy the return value (if the size
868 is greater than one byte). In this case, a pointer to the return
869 value location is passed into the callee in register R2, which does
870 not displace any of the other arguments passed in via registers R4
871 to R7. */
872
873 static CORE_ADDR
874 sh_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
875 int struct_return, CORE_ADDR struct_addr)
876 {
877 int stack_offset, stack_alloc;
878 int argreg;
879 int argnum;
880 struct type *type;
881 CORE_ADDR regval;
882 char *val;
883 char valbuf[4];
884 int len;
885 int odd_sized_struct;
886
887 /* first force sp to a 4-byte alignment */
888 sp = sp & ~3;
889
890 /* The "struct return pointer" pseudo-argument has its own dedicated
891 register */
892 if (struct_return)
893 write_register (STRUCT_RETURN_REGNUM, struct_addr);
894
895 /* Now make sure there's space on the stack */
896 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
897 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
898 sp -= stack_alloc; /* make room on stack for args */
899
900 /* Now load as many as possible of the first arguments into
901 registers, and push the rest onto the stack. There are 16 bytes
902 in four registers available. Loop thru args from first to last. */
903
904 argreg = gdbarch_tdep (current_gdbarch)->ARG0_REGNUM;
905 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
906 {
907 type = VALUE_TYPE (args[argnum]);
908 len = TYPE_LENGTH (type);
909 memset (valbuf, 0, sizeof (valbuf));
910 if (len < 4)
911 {
912 /* value gets right-justified in the register or stack word */
913 memcpy (valbuf + (4 - len),
914 (char *) VALUE_CONTENTS (args[argnum]), len);
915 val = valbuf;
916 }
917 else
918 val = (char *) VALUE_CONTENTS (args[argnum]);
919
920 if (len > 4 && (len & 3) != 0)
921 odd_sized_struct = 1; /* such structs go entirely on stack */
922 else
923 odd_sized_struct = 0;
924 while (len > 0)
925 {
926 if (argreg > gdbarch_tdep (current_gdbarch)->ARGLAST_REGNUM
927 || odd_sized_struct)
928 {
929 /* must go on the stack */
930 write_memory (sp + stack_offset, val, 4);
931 stack_offset += 4;
932 }
933 /* NOTE WELL!!!!! This is not an "else if" clause!!!
934 That's because some *&^%$ things get passed on the stack
935 AND in the registers! */
936 if (argreg <= gdbarch_tdep (current_gdbarch)->ARGLAST_REGNUM)
937 {
938 /* there's room in a register */
939 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
940 write_register (argreg++, regval);
941 }
942 /* Store the value 4 bytes at a time. This means that things
943 larger than 4 bytes may go partly in registers and partly
944 on the stack. */
945 len -= REGISTER_RAW_SIZE (argreg);
946 val += REGISTER_RAW_SIZE (argreg);
947 }
948 }
949 return sp;
950 }
951
952 /* Function: push_return_address (pc)
953 Set up the return address for the inferior function call.
954 Needed for targets where we don't actually execute a JSR/BSR instruction */
955
956 static CORE_ADDR
957 sh_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
958 {
959 write_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM, CALL_DUMMY_ADDRESS ());
960 return sp;
961 }
962
963 /* Function: fix_call_dummy
964 Poke the callee function's address into the destination part of
965 the CALL_DUMMY. The address is actually stored in a data word
966 following the actualy CALL_DUMMY instructions, which will load
967 it into a register using PC-relative addressing. This function
968 expects the CALL_DUMMY to look like this:
969
970 mov.w @(2,PC), R8
971 jsr @R8
972 nop
973 trap
974 <destination>
975 */
976
977 #if 0
978 void
979 sh_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
980 struct value **args, struct type *type, int gcc_p)
981 {
982 *(unsigned long *) (dummy + 8) = fun;
983 }
984 #endif
985
986 static int
987 sh_coerce_float_to_double (struct type *formal, struct type *actual)
988 {
989 return 1;
990 }
991
992 /* Find a function's return value in the appropriate registers (in
993 regbuf), and copy it into valbuf. Extract from an array REGBUF
994 containing the (raw) register state a function return value of type
995 TYPE, and copy that, in virtual format, into VALBUF. */
996 static void
997 sh_extract_return_value (struct type *type, char *regbuf, char *valbuf)
998 {
999 int len = TYPE_LENGTH (type);
1000 int return_register = R0_REGNUM;
1001 int offset;
1002
1003 if (len <= 4)
1004 {
1005 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1006 offset = REGISTER_BYTE (return_register) + 4 - len;
1007 else
1008 offset = REGISTER_BYTE (return_register);
1009 memcpy (valbuf, regbuf + offset, len);
1010 }
1011 else if (len <= 8)
1012 {
1013 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1014 offset = REGISTER_BYTE (return_register) + 8 - len;
1015 else
1016 offset = REGISTER_BYTE (return_register);
1017 memcpy (valbuf, regbuf + offset, len);
1018 }
1019 else
1020 error ("bad size for return value");
1021 }
1022
1023 static void
1024 sh3e_sh4_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1025 {
1026 int return_register;
1027 int offset;
1028 int len = TYPE_LENGTH (type);
1029
1030 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1031 return_register = FP0_REGNUM;
1032 else
1033 return_register = R0_REGNUM;
1034
1035 if (len == 8 && TYPE_CODE (type) == TYPE_CODE_FLT)
1036 {
1037 DOUBLEST val;
1038 if (TARGET_BYTE_ORDER == LITTLE_ENDIAN)
1039 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword,
1040 (char *) regbuf + REGISTER_BYTE (return_register),
1041 &val);
1042 else
1043 floatformat_to_doublest (&floatformat_ieee_double_big,
1044 (char *) regbuf + REGISTER_BYTE (return_register),
1045 &val);
1046 store_floating (valbuf, len, val);
1047 }
1048 else if (len <= 4)
1049 {
1050 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1051 offset = REGISTER_BYTE (return_register) + 4 - len;
1052 else
1053 offset = REGISTER_BYTE (return_register);
1054 memcpy (valbuf, regbuf + offset, len);
1055 }
1056 else if (len <= 8)
1057 {
1058 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1059 offset = REGISTER_BYTE (return_register) + 8 - len;
1060 else
1061 offset = REGISTER_BYTE (return_register);
1062 memcpy (valbuf, regbuf + offset, len);
1063 }
1064 else
1065 error ("bad size for return value");
1066 }
1067
1068 /* Write into appropriate registers a function return value
1069 of type TYPE, given in virtual format.
1070 If the architecture is sh4 or sh3e, store a function's return value
1071 in the R0 general register or in the FP0 floating point register,
1072 depending on the type of the return value. In all the other cases
1073 the result is stored in r0, left-justified. */
1074 static void
1075 sh_default_store_return_value (struct type *type, char *valbuf)
1076 {
1077 char buf[32]; /* more than enough... */
1078
1079 if (TYPE_LENGTH (type) < REGISTER_RAW_SIZE (R0_REGNUM))
1080 {
1081 /* Add leading zeros to the value. */
1082 memset (buf, 0, REGISTER_RAW_SIZE (R0_REGNUM));
1083 memcpy (buf + REGISTER_RAW_SIZE (R0_REGNUM) - TYPE_LENGTH (type),
1084 valbuf, TYPE_LENGTH (type));
1085 write_register_bytes (REGISTER_BYTE (R0_REGNUM), buf,
1086 REGISTER_RAW_SIZE (R0_REGNUM));
1087 }
1088 else
1089 write_register_bytes (REGISTER_BYTE (R0_REGNUM), valbuf,
1090 TYPE_LENGTH (type));
1091 }
1092
1093 static void
1094 sh3e_sh4_store_return_value (struct type *type, char *valbuf)
1095 {
1096 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1097 write_register_bytes (REGISTER_BYTE (FP0_REGNUM),
1098 valbuf, TYPE_LENGTH (type));
1099 else
1100 sh_default_store_return_value (type, valbuf);
1101 }
1102
1103 /* Print the registers in a form similar to the E7000 */
1104
1105 static void
1106 sh_generic_show_regs (void)
1107 {
1108 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1109 paddr (read_register (PC_REGNUM)),
1110 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1111 (long) read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM),
1112 (long) read_register (MACH_REGNUM),
1113 (long) read_register (MACL_REGNUM));
1114
1115 printf_filtered ("GBR=%08lx VBR=%08lx",
1116 (long) read_register (GBR_REGNUM),
1117 (long) read_register (VBR_REGNUM));
1118
1119 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1120 (long) read_register (0),
1121 (long) read_register (1),
1122 (long) read_register (2),
1123 (long) read_register (3),
1124 (long) read_register (4),
1125 (long) read_register (5),
1126 (long) read_register (6),
1127 (long) read_register (7));
1128 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1129 (long) read_register (8),
1130 (long) read_register (9),
1131 (long) read_register (10),
1132 (long) read_register (11),
1133 (long) read_register (12),
1134 (long) read_register (13),
1135 (long) read_register (14),
1136 (long) read_register (15));
1137 }
1138
1139 static void
1140 sh3_show_regs (void)
1141 {
1142 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1143 paddr (read_register (PC_REGNUM)),
1144 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1145 (long) read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM),
1146 (long) read_register (MACH_REGNUM),
1147 (long) read_register (MACL_REGNUM));
1148
1149 printf_filtered ("GBR=%08lx VBR=%08lx",
1150 (long) read_register (GBR_REGNUM),
1151 (long) read_register (VBR_REGNUM));
1152 printf_filtered (" SSR=%08lx SPC=%08lx",
1153 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1154 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1155
1156 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1157 (long) read_register (0),
1158 (long) read_register (1),
1159 (long) read_register (2),
1160 (long) read_register (3),
1161 (long) read_register (4),
1162 (long) read_register (5),
1163 (long) read_register (6),
1164 (long) read_register (7));
1165 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1166 (long) read_register (8),
1167 (long) read_register (9),
1168 (long) read_register (10),
1169 (long) read_register (11),
1170 (long) read_register (12),
1171 (long) read_register (13),
1172 (long) read_register (14),
1173 (long) read_register (15));
1174 }
1175
1176
1177 static void
1178 sh3e_show_regs (void)
1179 {
1180 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1181 paddr (read_register (PC_REGNUM)),
1182 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1183 (long) read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM),
1184 (long) read_register (MACH_REGNUM),
1185 (long) read_register (MACL_REGNUM));
1186
1187 printf_filtered ("GBR=%08lx VBR=%08lx",
1188 (long) read_register (GBR_REGNUM),
1189 (long) read_register (VBR_REGNUM));
1190 printf_filtered (" SSR=%08lx SPC=%08lx",
1191 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1192 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1193 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1194 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1195 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1196
1197 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1198 (long) read_register (0),
1199 (long) read_register (1),
1200 (long) read_register (2),
1201 (long) read_register (3),
1202 (long) read_register (4),
1203 (long) read_register (5),
1204 (long) read_register (6),
1205 (long) read_register (7));
1206 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1207 (long) read_register (8),
1208 (long) read_register (9),
1209 (long) read_register (10),
1210 (long) read_register (11),
1211 (long) read_register (12),
1212 (long) read_register (13),
1213 (long) read_register (14),
1214 (long) read_register (15));
1215
1216 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1217 (long) read_register (FP0_REGNUM + 0),
1218 (long) read_register (FP0_REGNUM + 1),
1219 (long) read_register (FP0_REGNUM + 2),
1220 (long) read_register (FP0_REGNUM + 3),
1221 (long) read_register (FP0_REGNUM + 4),
1222 (long) read_register (FP0_REGNUM + 5),
1223 (long) read_register (FP0_REGNUM + 6),
1224 (long) read_register (FP0_REGNUM + 7));
1225 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1226 (long) read_register (FP0_REGNUM + 8),
1227 (long) read_register (FP0_REGNUM + 9),
1228 (long) read_register (FP0_REGNUM + 10),
1229 (long) read_register (FP0_REGNUM + 11),
1230 (long) read_register (FP0_REGNUM + 12),
1231 (long) read_register (FP0_REGNUM + 13),
1232 (long) read_register (FP0_REGNUM + 14),
1233 (long) read_register (FP0_REGNUM + 15));
1234 }
1235
1236 static void
1237 sh3_dsp_show_regs (void)
1238 {
1239 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1240 paddr (read_register (PC_REGNUM)),
1241 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1242 (long) read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM),
1243 (long) read_register (MACH_REGNUM),
1244 (long) read_register (MACL_REGNUM));
1245
1246 printf_filtered ("GBR=%08lx VBR=%08lx",
1247 (long) read_register (GBR_REGNUM),
1248 (long) read_register (VBR_REGNUM));
1249
1250 printf_filtered (" SSR=%08lx SPC=%08lx",
1251 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1252 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1253
1254 printf_filtered (" DSR=%08lx",
1255 (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1256
1257 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1258 (long) read_register (0),
1259 (long) read_register (1),
1260 (long) read_register (2),
1261 (long) read_register (3),
1262 (long) read_register (4),
1263 (long) read_register (5),
1264 (long) read_register (6),
1265 (long) read_register (7));
1266 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1267 (long) read_register (8),
1268 (long) read_register (9),
1269 (long) read_register (10),
1270 (long) read_register (11),
1271 (long) read_register (12),
1272 (long) read_register (13),
1273 (long) read_register (14),
1274 (long) read_register (15));
1275
1276 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1277 (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1278 (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1279 (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1280 (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1281 (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1282 (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1283 (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1284 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1285 (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1286 (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1287 (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1288 (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1289 (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1290 (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1291 }
1292
1293 static void
1294 sh4_show_regs (void)
1295 {
1296 int pr = read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & 0x80000;
1297 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1298 paddr (read_register (PC_REGNUM)),
1299 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1300 (long) read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM),
1301 (long) read_register (MACH_REGNUM),
1302 (long) read_register (MACL_REGNUM));
1303
1304 printf_filtered ("GBR=%08lx VBR=%08lx",
1305 (long) read_register (GBR_REGNUM),
1306 (long) read_register (VBR_REGNUM));
1307 printf_filtered (" SSR=%08lx SPC=%08lx",
1308 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1309 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1310 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1311 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1312 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1313
1314 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1315 (long) read_register (0),
1316 (long) read_register (1),
1317 (long) read_register (2),
1318 (long) read_register (3),
1319 (long) read_register (4),
1320 (long) read_register (5),
1321 (long) read_register (6),
1322 (long) read_register (7));
1323 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1324 (long) read_register (8),
1325 (long) read_register (9),
1326 (long) read_register (10),
1327 (long) read_register (11),
1328 (long) read_register (12),
1329 (long) read_register (13),
1330 (long) read_register (14),
1331 (long) read_register (15));
1332
1333 printf_filtered ((pr
1334 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1335 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1336 (long) read_register (FP0_REGNUM + 0),
1337 (long) read_register (FP0_REGNUM + 1),
1338 (long) read_register (FP0_REGNUM + 2),
1339 (long) read_register (FP0_REGNUM + 3),
1340 (long) read_register (FP0_REGNUM + 4),
1341 (long) read_register (FP0_REGNUM + 5),
1342 (long) read_register (FP0_REGNUM + 6),
1343 (long) read_register (FP0_REGNUM + 7));
1344 printf_filtered ((pr
1345 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1346 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1347 (long) read_register (FP0_REGNUM + 8),
1348 (long) read_register (FP0_REGNUM + 9),
1349 (long) read_register (FP0_REGNUM + 10),
1350 (long) read_register (FP0_REGNUM + 11),
1351 (long) read_register (FP0_REGNUM + 12),
1352 (long) read_register (FP0_REGNUM + 13),
1353 (long) read_register (FP0_REGNUM + 14),
1354 (long) read_register (FP0_REGNUM + 15));
1355 }
1356
1357 static void
1358 sh_dsp_show_regs (void)
1359 {
1360 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1361 paddr (read_register (PC_REGNUM)),
1362 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1363 (long) read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM),
1364 (long) read_register (MACH_REGNUM),
1365 (long) read_register (MACL_REGNUM));
1366
1367 printf_filtered ("GBR=%08lx VBR=%08lx",
1368 (long) read_register (GBR_REGNUM),
1369 (long) read_register (VBR_REGNUM));
1370
1371 printf_filtered (" DSR=%08lx",
1372 (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1373
1374 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1375 (long) read_register (0),
1376 (long) read_register (1),
1377 (long) read_register (2),
1378 (long) read_register (3),
1379 (long) read_register (4),
1380 (long) read_register (5),
1381 (long) read_register (6),
1382 (long) read_register (7));
1383 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1384 (long) read_register (8),
1385 (long) read_register (9),
1386 (long) read_register (10),
1387 (long) read_register (11),
1388 (long) read_register (12),
1389 (long) read_register (13),
1390 (long) read_register (14),
1391 (long) read_register (15));
1392
1393 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1394 (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1395 (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1396 (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1397 (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1398 (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1399 (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1400 (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1401 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1402 (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1403 (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1404 (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1405 (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1406 (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1407 (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1408 }
1409
1410 void sh_show_regs_command (char *args, int from_tty)
1411 {
1412 if (sh_show_regs)
1413 (*sh_show_regs)();
1414 }
1415
1416 /* Index within `registers' of the first byte of the space for
1417 register N. */
1418 static int
1419 sh_default_register_byte (int reg_nr)
1420 {
1421 return (reg_nr * 4);
1422 }
1423
1424 static int
1425 sh_sh4_register_byte (int reg_nr)
1426 {
1427 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1428 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1429 return (dr_reg_base_num (reg_nr) * 4);
1430 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1431 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1432 return (fv_reg_base_num (reg_nr) * 4);
1433 else
1434 return (reg_nr * 4);
1435 }
1436
1437 /* Number of bytes of storage in the actual machine representation for
1438 register REG_NR. */
1439 static int
1440 sh_default_register_raw_size (int reg_nr)
1441 {
1442 return 4;
1443 }
1444
1445 static int
1446 sh_sh4_register_raw_size (int reg_nr)
1447 {
1448 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1449 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1450 return 8;
1451 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1452 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1453 return 16;
1454 else
1455 return 4;
1456 }
1457
1458 /* Number of bytes of storage in the program's representation
1459 for register N. */
1460 static int
1461 sh_register_virtual_size (int reg_nr)
1462 {
1463 return 4;
1464 }
1465
1466 /* Return the GDB type object for the "standard" data type
1467 of data in register N. */
1468 static struct type *
1469 sh_sh3e_register_virtual_type (int reg_nr)
1470 {
1471 if ((reg_nr >= FP0_REGNUM
1472 && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM))
1473 || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1474 return builtin_type_float;
1475 else
1476 return builtin_type_int;
1477 }
1478
1479 static struct type *
1480 sh_sh4_build_float_register_type (int high)
1481 {
1482 struct type *temp;
1483
1484 temp = create_range_type (NULL, builtin_type_int, 0, high);
1485 return create_array_type (NULL, builtin_type_float, temp);
1486 }
1487
1488 static struct type *
1489 sh_sh4_register_virtual_type (int reg_nr)
1490 {
1491 if ((reg_nr >= FP0_REGNUM
1492 && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM))
1493 || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1494 return builtin_type_float;
1495 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1496 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1497 return builtin_type_double;
1498 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1499 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1500 return sh_sh4_build_float_register_type (3);
1501 else
1502 return builtin_type_int;
1503 }
1504
1505 static struct type *
1506 sh_default_register_virtual_type (int reg_nr)
1507 {
1508 return builtin_type_int;
1509 }
1510
1511 /* On the sh4, the DRi pseudo registers are problematic if the target
1512 is little endian. When the user writes one of those registers, for
1513 instance with 'ser var $dr0=1', we want the double to be stored
1514 like this:
1515 fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1516 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1517
1518 This corresponds to little endian byte order & big endian word
1519 order. However if we let gdb write the register w/o conversion, it
1520 will write fr0 and fr1 this way:
1521 fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1522 fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1523 because it will consider fr0 and fr1 as a single LE stretch of memory.
1524
1525 To achieve what we want we must force gdb to store things in
1526 floatformat_ieee_double_littlebyte_bigword (which is defined in
1527 include/floatformat.h and libiberty/floatformat.c.
1528
1529 In case the target is big endian, there is no problem, the
1530 raw bytes will look like:
1531 fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
1532 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1533
1534 The other pseudo registers (the FVs) also don't pose a problem
1535 because they are stored as 4 individual FP elements. */
1536
1537 int
1538 sh_sh4_register_convertible (int nr)
1539 {
1540 if (TARGET_BYTE_ORDER == LITTLE_ENDIAN)
1541 return (gdbarch_tdep (current_gdbarch)->DR0_REGNUM <= nr
1542 && nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM);
1543 else
1544 return 0;
1545 }
1546
1547 void
1548 sh_sh4_register_convert_to_virtual (int regnum, struct type *type,
1549 char *from, char *to)
1550 {
1551 if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1552 && regnum <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1553 {
1554 DOUBLEST val;
1555 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, from, &val);
1556 store_floating (to, TYPE_LENGTH (type), val);
1557 }
1558 else
1559 error ("sh_register_convert_to_virtual called with non DR register number");
1560 }
1561
1562 void
1563 sh_sh4_register_convert_to_raw (struct type *type, int regnum,
1564 char *from, char *to)
1565 {
1566 if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1567 && regnum <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1568 {
1569 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
1570 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword, &val, to);
1571 }
1572 else
1573 error("sh_register_convert_to_raw called with non DR register number");
1574 }
1575
1576 void
1577 sh_fetch_pseudo_register (int reg_nr)
1578 {
1579 int base_regnum, portion;
1580
1581 if (!register_cached (reg_nr))
1582 {
1583 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1584 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1585 {
1586 base_regnum = dr_reg_base_num (reg_nr);
1587
1588 /* Read the real regs for which this one is an alias. */
1589 for (portion = 0; portion < 2; portion++)
1590 if (!register_cached (base_regnum + portion))
1591 target_fetch_registers (base_regnum + portion);
1592 }
1593 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1594 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1595 {
1596 base_regnum = fv_reg_base_num (reg_nr);
1597
1598 /* Read the real regs for which this one is an alias. */
1599 for (portion = 0; portion < 4; portion++)
1600 if (!register_cached (base_regnum + portion))
1601 target_fetch_registers (base_regnum + portion);
1602 }
1603 register_valid [reg_nr] = 1;
1604 }
1605 }
1606
1607 void
1608 sh_store_pseudo_register (int reg_nr)
1609 {
1610 int base_regnum, portion;
1611
1612 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1613 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1614 {
1615 base_regnum = dr_reg_base_num (reg_nr);
1616
1617 /* Write the real regs for which this one is an alias. */
1618 for (portion = 0; portion < 2; portion++)
1619 {
1620 register_valid[base_regnum + portion] = 1;
1621 target_store_registers (base_regnum + portion);
1622 }
1623 }
1624 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1625 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1626 {
1627 base_regnum = fv_reg_base_num (reg_nr);
1628
1629 /* Write the real regs for which this one is an alias. */
1630 for (portion = 0; portion < 4; portion++)
1631 {
1632 register_valid[base_regnum + portion] = 1;
1633 target_store_registers (base_regnum + portion);
1634 }
1635 }
1636 }
1637
1638 /* Floating point vector of 4 float registers. */
1639 static void
1640 do_fv_register_info (int fv_regnum)
1641 {
1642 int first_fp_reg_num = fv_reg_base_num (fv_regnum);
1643 printf_filtered ("fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
1644 fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM,
1645 (int) read_register (first_fp_reg_num),
1646 (int) read_register (first_fp_reg_num + 1),
1647 (int) read_register (first_fp_reg_num + 2),
1648 (int) read_register (first_fp_reg_num + 3));
1649 }
1650
1651 /* Double precision registers. */
1652 static void
1653 do_dr_register_info (int dr_regnum)
1654 {
1655 int first_fp_reg_num = dr_reg_base_num (dr_regnum);
1656
1657 printf_filtered ("dr%d\t0x%08x%08x\n",
1658 dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM,
1659 (int) read_register (first_fp_reg_num),
1660 (int) read_register (first_fp_reg_num + 1));
1661 }
1662
1663 static void
1664 sh_do_pseudo_register (int regnum)
1665 {
1666 if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1667 internal_error (__FILE__, __LINE__,
1668 "Invalid pseudo register number %d\n", regnum);
1669 else if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1670 && regnum < gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1671 do_dr_register_info (regnum);
1672 else if (regnum >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1673 && regnum <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1674 do_fv_register_info (regnum);
1675 }
1676
1677 static void
1678 sh_do_fp_register (int regnum)
1679 { /* do values for FP (float) regs */
1680 char *raw_buffer;
1681 double flt; /* double extracted from raw hex data */
1682 int inv;
1683 int j;
1684
1685 /* Allocate space for the float. */
1686 raw_buffer = (char *) alloca (REGISTER_RAW_SIZE (FP0_REGNUM));
1687
1688 /* Get the data in raw format. */
1689 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1690 error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
1691
1692 /* Get the register as a number */
1693 flt = unpack_double (builtin_type_float, raw_buffer, &inv);
1694
1695 /* Print the name and some spaces. */
1696 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1697 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1698
1699 /* Print the value. */
1700 if (inv)
1701 printf_filtered ("<invalid float>");
1702 else
1703 printf_filtered ("%-10.9g", flt);
1704
1705 /* Print the fp register as hex. */
1706 printf_filtered ("\t(raw 0x");
1707 for (j = 0; j < REGISTER_RAW_SIZE (regnum); j++)
1708 {
1709 register int idx = TARGET_BYTE_ORDER == BIG_ENDIAN ? j
1710 : REGISTER_RAW_SIZE (regnum) - 1 - j;
1711 printf_filtered ("%02x", (unsigned char) raw_buffer[idx]);
1712 }
1713 printf_filtered (")");
1714 printf_filtered ("\n");
1715 }
1716
1717 static void
1718 sh_do_register (int regnum)
1719 {
1720 char raw_buffer[MAX_REGISTER_RAW_SIZE];
1721
1722 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1723 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1724
1725 /* Get the data in raw format. */
1726 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1727 printf_filtered ("*value not available*\n");
1728
1729 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1730 gdb_stdout, 'x', 1, 0, Val_pretty_default);
1731 printf_filtered ("\t");
1732 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1733 gdb_stdout, 0, 1, 0, Val_pretty_default);
1734 printf_filtered ("\n");
1735 }
1736
1737 static void
1738 sh_print_register (int regnum)
1739 {
1740 if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1741 internal_error (__FILE__, __LINE__,
1742 "Invalid register number %d\n", regnum);
1743
1744 else if (regnum >= 0 && regnum < NUM_REGS)
1745 {
1746 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1747 sh_do_fp_register (regnum); /* FP regs */
1748 else
1749 sh_do_register (regnum); /* All other regs */
1750 }
1751
1752 else if (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1753 do_pseudo_register (regnum);
1754 }
1755
1756 void
1757 sh_do_registers_info (int regnum, int fpregs)
1758 {
1759 if (regnum != -1) /* do one specified register */
1760 {
1761 if (*(REGISTER_NAME (regnum)) == '\0')
1762 error ("Not a valid register for the current processor type");
1763
1764 sh_print_register (regnum);
1765 }
1766 else
1767 /* do all (or most) registers */
1768 {
1769 regnum = 0;
1770 while (regnum < NUM_REGS)
1771 {
1772 /* If the register name is empty, it is undefined for this
1773 processor, so don't display anything. */
1774 if (REGISTER_NAME (regnum) == NULL
1775 || *(REGISTER_NAME (regnum)) == '\0')
1776 {
1777 regnum++;
1778 continue;
1779 }
1780
1781 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1782 {
1783 if (fpregs)
1784 {
1785 /* true for "INFO ALL-REGISTERS" command */
1786 sh_do_fp_register (regnum); /* FP regs */
1787 regnum ++;
1788 }
1789 else
1790 regnum += (gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM - FP0_REGNUM); /* skip FP regs */
1791 }
1792 else
1793 {
1794 sh_do_register (regnum); /* All other regs */
1795 regnum++;
1796 }
1797 }
1798
1799 if (fpregs)
1800 while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1801 {
1802 do_pseudo_register (regnum);
1803 regnum++;
1804 }
1805 }
1806 }
1807
1808 #ifdef SVR4_SHARED_LIBS
1809
1810 /* Fetch (and possibly build) an appropriate link_map_offsets structure
1811 for native i386 linux targets using the struct offsets defined in
1812 link.h (but without actual reference to that file).
1813
1814 This makes it possible to access i386-linux shared libraries from
1815 a gdb that was not built on an i386-linux host (for cross debugging).
1816 */
1817
1818 struct link_map_offsets *
1819 sh_linux_svr4_fetch_link_map_offsets (void)
1820 {
1821 static struct link_map_offsets lmo;
1822 static struct link_map_offsets *lmp = 0;
1823
1824 if (lmp == 0)
1825 {
1826 lmp = &lmo;
1827
1828 lmo.r_debug_size = 8; /* 20 not actual size but all we need */
1829
1830 lmo.r_map_offset = 4;
1831 lmo.r_map_size = 4;
1832
1833 lmo.link_map_size = 20; /* 552 not actual size but all we need */
1834
1835 lmo.l_addr_offset = 0;
1836 lmo.l_addr_size = 4;
1837
1838 lmo.l_name_offset = 4;
1839 lmo.l_name_size = 4;
1840
1841 lmo.l_next_offset = 12;
1842 lmo.l_next_size = 4;
1843
1844 lmo.l_prev_offset = 16;
1845 lmo.l_prev_size = 4;
1846 }
1847
1848 return lmp;
1849 }
1850 #endif /* SVR4_SHARED_LIBS */
1851
1852 static gdbarch_init_ftype sh_gdbarch_init;
1853
1854 static struct gdbarch *
1855 sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1856 {
1857 static LONGEST sh_call_dummy_words[] = {0};
1858 struct gdbarch *gdbarch;
1859 struct gdbarch_tdep *tdep;
1860 gdbarch_register_name_ftype *sh_register_name;
1861 gdbarch_store_return_value_ftype *sh_store_return_value;
1862 gdbarch_register_virtual_type_ftype *sh_register_virtual_type;
1863
1864 /* Find a candidate among the list of pre-declared architectures. */
1865 arches = gdbarch_list_lookup_by_info (arches, &info);
1866 if (arches != NULL)
1867 return arches->gdbarch;
1868
1869 /* None found, create a new architecture from the information
1870 provided. */
1871 tdep = XMALLOC (struct gdbarch_tdep);
1872 gdbarch = gdbarch_alloc (&info, tdep);
1873
1874 /* Initialize the register numbers that are not common to all the
1875 variants to -1, if necessary thse will be overwritten in the case
1876 statement below. */
1877 tdep->FPUL_REGNUM = -1;
1878 tdep->FPSCR_REGNUM = -1;
1879 tdep->PR_REGNUM = 17;
1880 tdep->SR_REGNUM = 22;
1881 tdep->DSR_REGNUM = -1;
1882 tdep->FP_LAST_REGNUM = -1;
1883 tdep->A0G_REGNUM = -1;
1884 tdep->A0_REGNUM = -1;
1885 tdep->A1G_REGNUM = -1;
1886 tdep->A1_REGNUM = -1;
1887 tdep->M0_REGNUM = -1;
1888 tdep->M1_REGNUM = -1;
1889 tdep->X0_REGNUM = -1;
1890 tdep->X1_REGNUM = -1;
1891 tdep->Y0_REGNUM = -1;
1892 tdep->Y1_REGNUM = -1;
1893 tdep->MOD_REGNUM = -1;
1894 tdep->RS_REGNUM = -1;
1895 tdep->RE_REGNUM = -1;
1896 tdep->SSR_REGNUM = -1;
1897 tdep->SPC_REGNUM = -1;
1898 tdep->DR0_REGNUM = -1;
1899 tdep->DR_LAST_REGNUM = -1;
1900 tdep->FV0_REGNUM = -1;
1901 tdep->FV_LAST_REGNUM = -1;
1902 tdep->ARG0_REGNUM = 4;
1903 tdep->ARGLAST_REGNUM = 7;
1904 tdep->RETURN_REGNUM = 0;
1905 tdep->FLOAT_ARGLAST_REGNUM = -1;
1906
1907 set_gdbarch_fp0_regnum (gdbarch, -1);
1908 set_gdbarch_num_pseudo_regs (gdbarch, 0);
1909 set_gdbarch_max_register_raw_size (gdbarch, 4);
1910 set_gdbarch_max_register_virtual_size (gdbarch, 4);
1911 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1912 set_gdbarch_num_regs (gdbarch, SH_DEFAULT_NUM_REGS);
1913 set_gdbarch_sp_regnum (gdbarch, 15);
1914 set_gdbarch_fp_regnum (gdbarch, 14);
1915 set_gdbarch_pc_regnum (gdbarch, 16);
1916 set_gdbarch_register_size (gdbarch, 4);
1917 set_gdbarch_register_bytes (gdbarch, SH_DEFAULT_NUM_REGS * 4);
1918 set_gdbarch_fetch_pseudo_register (gdbarch, sh_fetch_pseudo_register);
1919 set_gdbarch_store_pseudo_register (gdbarch, sh_store_pseudo_register);
1920 set_gdbarch_do_registers_info (gdbarch, sh_do_registers_info);
1921 set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
1922 set_gdbarch_frame_chain (gdbarch, sh_frame_chain);
1923 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
1924 set_gdbarch_init_extra_frame_info (gdbarch, sh_init_extra_frame_info);
1925 set_gdbarch_extract_return_value (gdbarch, sh_extract_return_value);
1926 set_gdbarch_push_arguments (gdbarch, sh_push_arguments);
1927 set_gdbarch_store_struct_return (gdbarch, sh_store_struct_return);
1928 set_gdbarch_use_struct_convention (gdbarch, sh_use_struct_convention);
1929 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
1930 set_gdbarch_pop_frame (gdbarch, sh_pop_frame);
1931 print_sh_insn = gdb_print_insn_sh;
1932 skip_prologue_hard_way = sh_skip_prologue_hard_way;
1933 do_pseudo_register = sh_do_pseudo_register;
1934
1935 switch (info.bfd_arch_info->mach)
1936 {
1937 case bfd_mach_sh:
1938 sh_register_name = sh_sh_register_name;
1939 sh_show_regs = sh_generic_show_regs;
1940 sh_store_return_value = sh_default_store_return_value;
1941 sh_register_virtual_type = sh_default_register_virtual_type;
1942 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1943 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1944 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1945 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1946 break;
1947 case bfd_mach_sh2:
1948 sh_register_name = sh_sh_register_name;
1949 sh_show_regs = sh_generic_show_regs;
1950 sh_store_return_value = sh_default_store_return_value;
1951 sh_register_virtual_type = sh_default_register_virtual_type;
1952 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1953 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1954 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1955 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1956 break;
1957 case bfd_mach_sh_dsp:
1958 sh_register_name = sh_sh_dsp_register_name;
1959 sh_show_regs = sh_dsp_show_regs;
1960 sh_store_return_value = sh_default_store_return_value;
1961 sh_register_virtual_type = sh_default_register_virtual_type;
1962 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1963 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1964 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1965 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1966 tdep->DSR_REGNUM = 24;
1967 tdep->A0G_REGNUM = 25;
1968 tdep->A0_REGNUM = 26;
1969 tdep->A1G_REGNUM = 27;
1970 tdep->A1_REGNUM = 28;
1971 tdep->M0_REGNUM = 29;
1972 tdep->M1_REGNUM = 30;
1973 tdep->X0_REGNUM = 31;
1974 tdep->X1_REGNUM = 32;
1975 tdep->Y0_REGNUM = 33;
1976 tdep->Y1_REGNUM = 34;
1977 tdep->MOD_REGNUM = 40;
1978 tdep->RS_REGNUM = 43;
1979 tdep->RE_REGNUM = 44;
1980 break;
1981 case bfd_mach_sh3:
1982 sh_register_name = sh_sh3_register_name;
1983 sh_show_regs = sh3_show_regs;
1984 sh_store_return_value = sh_default_store_return_value;
1985 sh_register_virtual_type = sh_default_register_virtual_type;
1986 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1987 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1988 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1989 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1990 tdep->SSR_REGNUM = 41;
1991 tdep->SPC_REGNUM = 42;
1992 break;
1993 case bfd_mach_sh3e:
1994 sh_register_name = sh_sh3e_register_name;
1995 sh_show_regs = sh3e_show_regs;
1996 sh_store_return_value = sh3e_sh4_store_return_value;
1997 sh_register_virtual_type = sh_sh3e_register_virtual_type;
1998 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
1999 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2000 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2001 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2002 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2003 set_gdbarch_fp0_regnum (gdbarch, 25);
2004 tdep->FPUL_REGNUM = 23;
2005 tdep->FPSCR_REGNUM = 24;
2006 tdep->FP_LAST_REGNUM = 40;
2007 tdep->SSR_REGNUM = 41;
2008 tdep->SPC_REGNUM = 42;
2009 break;
2010 case bfd_mach_sh3_dsp:
2011 sh_register_name = sh_sh3_dsp_register_name;
2012 sh_show_regs = sh3_dsp_show_regs;
2013 sh_store_return_value = sh_default_store_return_value;
2014 sh_register_virtual_type = sh_default_register_virtual_type;
2015 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2016 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2017 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2018 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2019 tdep->DSR_REGNUM = 24;
2020 tdep->A0G_REGNUM = 25;
2021 tdep->A0_REGNUM = 26;
2022 tdep->A1G_REGNUM = 27;
2023 tdep->A1_REGNUM = 28;
2024 tdep->M0_REGNUM = 29;
2025 tdep->M1_REGNUM = 30;
2026 tdep->X0_REGNUM = 31;
2027 tdep->X1_REGNUM = 32;
2028 tdep->Y0_REGNUM = 33;
2029 tdep->Y1_REGNUM = 34;
2030 tdep->MOD_REGNUM = 40;
2031 tdep->RS_REGNUM = 43;
2032 tdep->RE_REGNUM = 44;
2033 tdep->SSR_REGNUM = 41;
2034 tdep->SPC_REGNUM = 42;
2035 break;
2036 case bfd_mach_sh4:
2037 sh_register_name = sh_sh4_register_name;
2038 sh_show_regs = sh4_show_regs;
2039 sh_store_return_value = sh3e_sh4_store_return_value;
2040 sh_register_virtual_type = sh_sh4_register_virtual_type;
2041 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
2042 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2043 set_gdbarch_fp0_regnum (gdbarch, 25);
2044 set_gdbarch_register_raw_size (gdbarch, sh_sh4_register_raw_size);
2045 set_gdbarch_register_virtual_size (gdbarch, sh_sh4_register_raw_size);
2046 set_gdbarch_register_byte (gdbarch, sh_sh4_register_byte);
2047 set_gdbarch_num_pseudo_regs (gdbarch, 12);
2048 set_gdbarch_max_register_raw_size (gdbarch, 4 * 4);
2049 set_gdbarch_max_register_virtual_size (gdbarch, 4 * 4);
2050 set_gdbarch_register_convert_to_raw (gdbarch, sh_sh4_register_convert_to_raw);
2051 set_gdbarch_register_convert_to_virtual (gdbarch, sh_sh4_register_convert_to_virtual);
2052 set_gdbarch_register_convertible (gdbarch, sh_sh4_register_convertible);
2053 tdep->FPUL_REGNUM = 23;
2054 tdep->FPSCR_REGNUM = 24;
2055 tdep->FP_LAST_REGNUM = 40;
2056 tdep->SSR_REGNUM = 41;
2057 tdep->SPC_REGNUM = 42;
2058 tdep->DR0_REGNUM = 59;
2059 tdep->DR_LAST_REGNUM = 66;
2060 tdep->FV0_REGNUM = 67;
2061 tdep->FV_LAST_REGNUM = 70;
2062 break;
2063 default:
2064 sh_register_name = sh_generic_register_name;
2065 sh_show_regs = sh_generic_show_regs;
2066 sh_store_return_value = sh_default_store_return_value;
2067 sh_register_virtual_type = sh_default_register_virtual_type;
2068 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2069 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2070 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2071 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2072 break;
2073 }
2074
2075 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
2076 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2077 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
2078 set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
2079 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2080 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2081
2082 set_gdbarch_register_name (gdbarch, sh_register_name);
2083 set_gdbarch_register_virtual_type (gdbarch, sh_register_virtual_type);
2084
2085 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2086 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2087 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2088 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2089 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2090 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2091 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);/*??should be 8?*/
2092
2093 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2094 set_gdbarch_call_dummy_length (gdbarch, 0);
2095 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2096 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2097 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
2098 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2099 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2100 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2101 set_gdbarch_call_dummy_words (gdbarch, sh_call_dummy_words);
2102 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (sh_call_dummy_words));
2103 set_gdbarch_call_dummy_p (gdbarch, 1);
2104 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2105 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2106 set_gdbarch_coerce_float_to_double (gdbarch,
2107 sh_coerce_float_to_double);
2108
2109 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2110 set_gdbarch_push_return_address (gdbarch, sh_push_return_address);
2111
2112 set_gdbarch_store_return_value (gdbarch, sh_store_return_value);
2113 set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue);
2114 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2115 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2116 set_gdbarch_function_start_offset (gdbarch, 0);
2117
2118 set_gdbarch_frame_args_skip (gdbarch, 0);
2119 set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
2120 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
2121 set_gdbarch_frame_saved_pc (gdbarch, sh_frame_saved_pc);
2122 set_gdbarch_frame_args_address (gdbarch, default_frame_address);
2123 set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
2124 set_gdbarch_saved_pc_after_call (gdbarch, sh_saved_pc_after_call);
2125 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2126 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2127 set_gdbarch_ieee_float (gdbarch, 1);
2128 tm_print_insn = print_sh_insn;
2129
2130 return gdbarch;
2131 }
2132
2133 void
2134 _initialize_sh_tdep (void)
2135 {
2136 struct cmd_list_element *c;
2137
2138 register_gdbarch_init (bfd_arch_sh, sh_gdbarch_init);
2139
2140 add_com ("regs", class_vars, sh_show_regs_command, "Print all registers");
2141 }
GDB Binutils - Deliverables
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