1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright (C) 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21 Contributed by Steve Chamberlain
35 /* Default to the original SH. */
37 #define DEFAULT_SH_TYPE "sh"
39 /* This value is the model of SH in use. */
41 char *sh_processor_type
;
43 char *tmp_sh_processor_type
;
45 /* A set of original names, to be used when restoring back to generic
46 registers from a specific set. */
48 char *sh_generic_reg_names
[] = REGISTER_NAMES
;
50 char *sh_reg_names
[] = {
51 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
52 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
53 "pc", "pr", "gbr", "vbr", "mach","macl", "sr",
55 "", "", "", "", "", "", "", "",
56 "", "", "", "", "", "", "", "",
57 "", "", "", "", "", "", "", "",
58 "", "", "", "", "", "", "", ""
61 char *sh3_reg_names
[] = {
62 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
63 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
64 "pc", "pr", "gbr", "vbr", "mach","macl","sr",
66 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
67 "fr8", "fr9", "fr10","fr11","fr12","fr13","fr14","fr15",
68 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
69 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
75 } sh_processor_type_table
[] = {
76 { "sh", sh_reg_names
},
77 { "sh3", sh3_reg_names
},
81 /* Prologue looks like
82 [mov.l <regs>,@-r15]...
88 #define IS_STS(x) ((x) == 0x4f22)
89 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
90 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
91 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
92 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
93 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
94 #define IS_SHLL_R3(x) ((x) == 0x4300)
95 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
97 /* Skip any prologue before the guts of a function */
100 sh_skip_prologue (start_pc
)
105 w
= read_memory_integer (start_pc
, 2);
115 w
= read_memory_integer (start_pc
, 2);
121 /* Disassemble an instruction. */
124 gdb_print_insn_sh (memaddr
, info
)
126 disassemble_info
*info
;
128 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
129 return print_insn_sh (memaddr
, info
);
131 return print_insn_shl (memaddr
, info
);
134 /* Given a GDB frame, determine the address of the calling function's frame.
135 This will be used to create a new GDB frame struct, and then
136 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
138 For us, the frame address is its stack pointer value, so we look up
139 the function prologue to determine the caller's sp value, and return it. */
142 sh_frame_chain (frame
)
143 struct frame_info
*frame
;
145 if (!inside_entry_file (frame
->pc
))
146 return read_memory_integer (FRAME_FP (frame
) + frame
->f_offset
, 4);
151 /* Put here the code to store, into a struct frame_saved_regs, the
152 addresses of the saved registers of frame described by FRAME_INFO.
153 This includes special registers such as pc and fp saved in special
154 ways in the stack frame. sp is even more special: the address we
155 return for it IS the sp for the next frame. */
158 frame_find_saved_regs (fi
, fsr
)
159 struct frame_info
*fi
;
160 struct frame_saved_regs
*fsr
;
171 opc
= pc
= get_pc_function_start (fi
->pc
);
173 insn
= read_memory_integer (pc
, 2);
175 fi
->leaf_function
= 1;
178 for (rn
= 0; rn
< NUM_REGS
; rn
++)
183 /* Loop around examining the prologue insns, but give up
184 after 15 of them, since we're getting silly then */
185 while (pc
< opc
+ 15 * 2)
187 /* See where the registers will be saved to */
191 rn
= GET_PUSHED_REG (insn
);
193 insn
= read_memory_integer (pc
, 2);
196 else if (IS_STS (insn
))
199 where
[PR_REGNUM
] = depth
;
200 insn
= read_memory_integer (pc
, 2);
201 /* If we're storing the pr then this isn't a leaf */
202 fi
->leaf_function
= 0;
205 else if (IS_MOV_R3 (insn
))
207 r3_val
= (char) (insn
& 0xff);
209 insn
= read_memory_integer (pc
, 2);
211 else if (IS_SHLL_R3 (insn
))
215 insn
= read_memory_integer (pc
, 2);
217 else if (IS_ADD_R3SP (insn
))
221 insn
= read_memory_integer (pc
, 2);
223 else if (IS_ADD_SP (insn
))
226 depth
+= -((char) (insn
& 0xff));
227 insn
= read_memory_integer (pc
, 2);
233 /* Now we know how deep things are, we can work out their addresses */
235 for (rn
= 0; rn
< NUM_REGS
; rn
++)
242 fsr
->regs
[rn
] = fi
->frame
- where
[rn
] + depth
- 4;
252 fsr
->regs
[SP_REGNUM
] = read_memory_integer (fsr
->regs
[FP_REGNUM
], 4);
256 fsr
->regs
[SP_REGNUM
] = fi
->frame
- 4;
259 fi
->f_offset
= depth
- where
[FP_REGNUM
] - 4;
260 /* Work out the return pc - either from the saved pr or the pr
263 if (fsr
->regs
[PR_REGNUM
])
264 fi
->return_pc
= read_memory_integer (fsr
->regs
[PR_REGNUM
], 4);
266 fi
->return_pc
= read_register (PR_REGNUM
);
269 /* initialize the extra info saved in a FRAME */
272 init_extra_frame_info (fromleaf
, fi
)
274 struct frame_info
*fi
;
276 struct frame_saved_regs dummy
;
279 fi
->pc
= fi
->next
->return_pc
;
281 frame_find_saved_regs (fi
, &dummy
);
285 /* Discard from the stack the innermost frame,
286 restoring all saved registers. */
291 register struct frame_info
*frame
= get_current_frame ();
292 register CORE_ADDR fp
;
294 struct frame_saved_regs fsr
;
296 fp
= FRAME_FP (frame
);
297 get_frame_saved_regs (frame
, &fsr
);
299 /* Copy regs from where they were saved in the frame */
300 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
302 if (fsr
.regs
[regnum
])
304 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
], 4));
308 write_register (PC_REGNUM
, frame
->return_pc
);
309 write_register (SP_REGNUM
, fp
+ 4);
310 flush_cached_frames ();
313 /* Command to set the processor type. */
316 sh_set_processor_type_command (args
, from_tty
)
323 /* The `set' commands work by setting the value, then calling the hook,
324 so we let the general command modify a scratch location, then decide
325 here if we really want to modify the processor type. */
326 if (tmp_sh_processor_type
== NULL
|| *tmp_sh_processor_type
== '\0')
328 printf_unfiltered ("The known SH processor types are as follows:\n\n");
329 for (i
= 0; sh_processor_type_table
[i
].name
!= NULL
; ++i
)
330 printf_unfiltered ("%s\n", sh_processor_type_table
[i
].name
);
332 /* Restore the value. */
333 tmp_sh_processor_type
= strsave (sh_processor_type
);
338 if (!sh_set_processor_type (tmp_sh_processor_type
))
340 /* Restore to a valid value before erroring out. */
341 temp
= tmp_sh_processor_type
;
342 tmp_sh_processor_type
= strsave (sh_processor_type
);
343 error ("Unknown processor type `%s'.", temp
);
348 sh_show_processor_type_command (args
, from_tty
)
354 /* Modify the actual processor type. */
357 sh_set_processor_type (str
)
365 for (i
= 0; sh_processor_type_table
[i
].name
!= NULL
; ++i
)
367 if (strcasecmp (str
, sh_processor_type_table
[i
].name
) == 0)
369 sh_processor_type
= str
;
371 for (j
= 0; j
< NUM_REGS
; ++j
)
372 reg_names
[j
] = sh_processor_type_table
[i
].regnames
[j
];
381 /* Print the registers in a form similar to the E7000 */
384 show_regs (args
, from_tty
)
388 printf_filtered ("PC=%08x SR=%08x PR=%08x MACH=%08x MACHL=%08x\n",
389 read_register (PC_REGNUM
),
390 read_register (SR_REGNUM
),
391 read_register (PR_REGNUM
),
392 read_register (MACH_REGNUM
),
393 read_register (MACL_REGNUM
));
395 printf_filtered ("R0-R7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
404 printf_filtered ("R8-R15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
416 _initialize_sh_tdep ()
418 struct cmd_list_element
*c
;
420 tm_print_insn
= gdb_print_insn_sh
;
422 c
= add_set_cmd ("processor", class_support
, var_string_noescape
,
423 (char *) &tmp_sh_processor_type
,
424 "Set the type of SH processor in use.\n\
425 Set this to be able to access processor-type-specific registers.\n\
428 c
->function
.cfunc
= sh_set_processor_type_command
;
429 c
= add_show_from_set (c
, &showlist
);
430 c
->function
.cfunc
= sh_show_processor_type_command
;
432 tmp_sh_processor_type
= strsave (DEFAULT_SH_TYPE
);
433 sh_set_processor_type_command (strsave (DEFAULT_SH_TYPE
), 0);
435 add_com ("regs", class_vars
, show_regs
, "Print all registers");