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[deliverable/binutils-gdb.git] / gdb / sh-tdep.c
1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 2000 Free Software
3 Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 /*
23 Contributed by Steve Chamberlain
24 sac@cygnus.com
25 */
26
27 #include "defs.h"
28 #include "frame.h"
29 #include "obstack.h"
30 #include "symtab.h"
31 #include "symfile.h"
32 #include "gdbtypes.h"
33 #include "gdbcmd.h"
34 #include "gdbcore.h"
35 #include "value.h"
36 #include "dis-asm.h"
37 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
38 #include "gdb_string.h"
39 #include "arch-utils.h"
40
41 #undef XMALLOC
42 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
43
44
45 /* Frame interpretation related functions. */
46 static gdbarch_breakpoint_from_pc_ftype sh_breakpoint_from_pc;
47 static gdbarch_frame_chain_ftype sh_frame_chain;
48 static gdbarch_frame_saved_pc_ftype sh_frame_saved_pc;
49 static gdbarch_skip_prologue_ftype sh_skip_prologue;
50
51 static gdbarch_frame_init_saved_regs_ftype sh_nofp_frame_init_saved_regs;
52 static gdbarch_frame_init_saved_regs_ftype sh_fp_frame_init_saved_regs;
53 static gdbarch_init_extra_frame_info_ftype sh_init_extra_frame_info;
54 static gdbarch_pop_frame_ftype sh_pop_frame;
55 static gdbarch_saved_pc_after_call_ftype sh_saved_pc_after_call;
56 static gdbarch_frame_args_address_ftype sh_frame_args_address;
57 static gdbarch_frame_locals_address_ftype sh_frame_locals_address;
58
59 /* Function call related functions. */
60 static gdbarch_extract_return_value_ftype sh_extract_return_value;
61 static gdbarch_extract_struct_value_address_ftype sh_extract_struct_value_address;
62 static gdbarch_use_struct_convention_ftype sh_use_struct_convention;
63 static gdbarch_store_struct_return_ftype sh_store_struct_return;
64 static gdbarch_push_arguments_ftype sh_push_arguments;
65 static gdbarch_push_return_address_ftype sh_push_return_address;
66 static gdbarch_coerce_float_to_double_ftype sh_coerce_float_to_double;
67 static gdbarch_store_return_value_ftype sh_default_store_return_value;
68 static gdbarch_store_return_value_ftype sh3e_sh4_store_return_value;
69
70 static gdbarch_register_name_ftype sh_generic_register_name;
71 static gdbarch_register_name_ftype sh_sh_register_name;
72 static gdbarch_register_name_ftype sh_sh3_register_name;
73 static gdbarch_register_name_ftype sh_sh3e_register_name;
74 static gdbarch_register_name_ftype sh_sh_dsp_register_name;
75 static gdbarch_register_name_ftype sh_sh3_dsp_register_name;
76
77 /* Registers display related functions */
78 static gdbarch_register_raw_size_ftype sh_default_register_raw_size;
79 static gdbarch_register_raw_size_ftype sh_sh4_register_raw_size;
80
81 static gdbarch_register_virtual_size_ftype sh_register_virtual_size;
82
83 static gdbarch_register_byte_ftype sh_default_register_byte;
84 static gdbarch_register_byte_ftype sh_sh4_register_byte;
85
86 static gdbarch_register_virtual_type_ftype sh_sh3e_register_virtual_type;
87 static gdbarch_register_virtual_type_ftype sh_sh4_register_virtual_type;
88 static gdbarch_register_virtual_type_ftype sh_default_register_virtual_type;
89
90 static void sh_generic_show_regs (void);
91 static void sh3_show_regs (void);
92 static void sh3e_show_regs (void);
93 static void sh3_dsp_show_regs (void);
94 static void sh_dsp_show_regs (void);
95 static void sh4_show_regs (void);
96 static void sh_show_regs_command (char *, int);
97
98 static struct type *sh_sh4_build_float_register_type (int high);
99
100 static gdbarch_fetch_pseudo_register_ftype sh_fetch_pseudo_register;
101 static gdbarch_store_pseudo_register_ftype sh_store_pseudo_register;
102 static int fv_reg_base_num (int);
103 static int dr_reg_base_num (int);
104 static void do_fv_register_info (int fv_regnum);
105 static void do_dr_register_info (int dr_regnum);
106 static void sh_do_pseudo_register (int regnum);
107 static void sh_do_fp_register (int regnum);
108 static void sh_do_register (int regnum);
109 static void sh_print_register (int regnum);
110
111 void (*sh_show_regs) (void);
112
113
114 /* Define other aspects of the stack frame.
115 we keep a copy of the worked out return pc lying around, since it
116 is a useful bit of info */
117
118 struct frame_extra_info
119 {
120 CORE_ADDR return_pc;
121 int leaf_function;
122 int f_offset;
123 };
124
125 #if 0
126 #ifdef _WIN32_WCE
127 char **sh_register_names = sh3_reg_names;
128 #else
129 char **sh_register_names = sh_generic_reg_names;
130 #endif
131 #endif
132
133 static char *
134 sh_generic_register_name (int reg_nr)
135 {
136 static char *register_names[] =
137 {
138 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
139 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
140 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
141 "fpul", "fpscr",
142 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
143 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
144 "ssr", "spc",
145 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
146 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
147 };
148 if (reg_nr < 0)
149 return NULL;
150 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
151 return NULL;
152 return register_names[reg_nr];
153 }
154
155 static char *
156 sh_sh_register_name (int reg_nr)
157 {
158 static char *register_names[] =
159 {
160 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
161 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
162 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
163 "", "",
164 "", "", "", "", "", "", "", "",
165 "", "", "", "", "", "", "", "",
166 "", "",
167 "", "", "", "", "", "", "", "",
168 "", "", "", "", "", "", "", "",
169 };
170 if (reg_nr < 0)
171 return NULL;
172 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
173 return NULL;
174 return register_names[reg_nr];
175 }
176
177 static char *
178 sh_sh3_register_name (int reg_nr)
179 {
180 static char *register_names[] =
181 {
182 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
183 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
184 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
185 "", "",
186 "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "",
188 "ssr", "spc",
189 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
190 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
191 };
192 if (reg_nr < 0)
193 return NULL;
194 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
195 return NULL;
196 return register_names[reg_nr];
197 }
198
199 static char *
200 sh_sh3e_register_name (int reg_nr)
201 {
202 static char *register_names[] =
203 {
204 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
205 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
206 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
207 "fpul", "fpscr",
208 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
209 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
210 "ssr", "spc",
211 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
212 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
213 };
214 if (reg_nr < 0)
215 return NULL;
216 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
217 return NULL;
218 return register_names[reg_nr];
219 }
220
221 static char *
222 sh_sh_dsp_register_name (int reg_nr)
223 {
224 static char *register_names[] =
225 {
226 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
227 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
228 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
229 "", "dsr",
230 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
231 "y0", "y1", "", "", "", "", "", "mod",
232 "", "",
233 "rs", "re", "", "", "", "", "", "",
234 "", "", "", "", "", "", "", "",
235 };
236 if (reg_nr < 0)
237 return NULL;
238 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
239 return NULL;
240 return register_names[reg_nr];
241 }
242
243 static char *
244 sh_sh3_dsp_register_name (int reg_nr)
245 {
246 static char *register_names[] =
247 {
248 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
249 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
250 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
251 "", "dsr",
252 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
253 "y0", "y1", "", "", "", "", "", "mod",
254 "ssr", "spc",
255 "rs", "re", "", "", "", "", "", "",
256 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
257 "", "", "", "", "", "", "", "",
258 };
259 if (reg_nr < 0)
260 return NULL;
261 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
262 return NULL;
263 return register_names[reg_nr];
264 }
265
266 static char *
267 sh_sh4_register_name (int reg_nr)
268 {
269 static char *register_names[] =
270 {
271 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
272 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
273 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
274 "fpul", "fpscr",
275 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
276 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
277 "ssr", "spc",
278 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
279 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
280 "dr0", "dr1", "dr2", "dr3", "dr4", "dr5", "dr6", "dr7",
281 "fv0", "fv1", "fv2", "fv3",
282 };
283 if (reg_nr < 0)
284 return NULL;
285 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
286 return NULL;
287 return register_names[reg_nr];
288 }
289
290 static unsigned char *
291 sh_breakpoint_from_pc (pcptr, lenptr)
292 CORE_ADDR *pcptr;
293 int *lenptr;
294 {
295 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
296 static unsigned char breakpoint[] = {0xc3, 0xc3};
297
298 *lenptr = sizeof (breakpoint);
299 return breakpoint;
300 }
301
302 /* Prologue looks like
303 [mov.l <regs>,@-r15]...
304 [sts.l pr,@-r15]
305 [mov.l r14,@-r15]
306 [mov r15,r14]
307
308 Actually it can be more complicated than this. For instance, with
309 newer gcc's:
310
311 mov.l r14,@-r15
312 add #-12,r15
313 mov r15,r14
314 mov r4,r1
315 mov r5,r2
316 mov.l r6,@(4,r14)
317 mov.l r7,@(8,r14)
318 mov.b r1,@r14
319 mov r14,r1
320 mov r14,r1
321 add #2,r1
322 mov.w r2,@r1
323
324 */
325
326 /* STS.L PR,@-r15 0100111100100010
327 r15-4-->r15, PR-->(r15) */
328 #define IS_STS(x) ((x) == 0x4f22)
329
330 /* MOV.L Rm,@-r15 00101111mmmm0110
331 r15-4-->r15, Rm-->(R15) */
332 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
333
334 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
335
336 /* MOV r15,r14 0110111011110011
337 r15-->r14 */
338 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
339
340 /* ADD #imm,r15 01111111iiiiiiii
341 r15+imm-->r15 */
342 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
343
344 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
345 #define IS_SHLL_R3(x) ((x) == 0x4300)
346
347 /* ADD r3,r15 0011111100111100
348 r15+r3-->r15 */
349 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
350
351 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
352 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
353 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
354 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
355
356 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
357 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
358 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
359 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
360 #define IS_ARG_MOV(x) \
361 (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
362 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
363 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
364
365 /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
366 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
367 #define IS_MOV_R14(x) \
368 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
369
370 #define FPSCR_SZ (1 << 20)
371
372 /* Skip any prologue before the guts of a function */
373
374 /* Skip the prologue using the debug information. If this fails we'll
375 fall back on the 'guess' method below. */
376 static CORE_ADDR
377 after_prologue (pc)
378 CORE_ADDR pc;
379 {
380 struct symtab_and_line sal;
381 CORE_ADDR func_addr, func_end;
382
383 /* If we can not find the symbol in the partial symbol table, then
384 there is no hope we can determine the function's start address
385 with this code. */
386 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
387 return 0;
388
389 /* Get the line associated with FUNC_ADDR. */
390 sal = find_pc_line (func_addr, 0);
391
392 /* There are only two cases to consider. First, the end of the source line
393 is within the function bounds. In that case we return the end of the
394 source line. Second is the end of the source line extends beyond the
395 bounds of the current function. We need to use the slow code to
396 examine instructions in that case. */
397 if (sal.end < func_end)
398 return sal.end;
399 else
400 return 0;
401 }
402
403 /* Here we look at each instruction in the function, and try to guess
404 where the prologue ends. Unfortunately this is not always
405 accurate. */
406 static CORE_ADDR
407 skip_prologue_hard_way (start_pc)
408 CORE_ADDR start_pc;
409 {
410 CORE_ADDR here, end;
411 int updated_fp = 0;
412
413 if (!start_pc)
414 return 0;
415
416 for (here = start_pc, end = start_pc + (2 * 28); here < end;)
417 {
418 int w = read_memory_integer (here, 2);
419 here += 2;
420 if (IS_FMOV (w) || IS_PUSH (w) || IS_STS (w) || IS_MOV_R3 (w)
421 || IS_ADD_R3SP (w) || IS_ADD_SP (w) || IS_SHLL_R3 (w)
422 || IS_ARG_MOV (w) || IS_MOV_R14 (w))
423 {
424 start_pc = here;
425 }
426 else if (IS_MOV_SP_FP (w))
427 {
428 start_pc = here;
429 updated_fp = 1;
430 }
431 else
432 /* Don't bail out yet, if we are before the copy of sp. */
433 if (updated_fp)
434 break;
435 }
436
437 return start_pc;
438 }
439
440 static CORE_ADDR
441 sh_skip_prologue (pc)
442 CORE_ADDR pc;
443 {
444 CORE_ADDR post_prologue_pc;
445
446 /* See if we can determine the end of the prologue via the symbol table.
447 If so, then return either PC, or the PC after the prologue, whichever
448 is greater. */
449
450 post_prologue_pc = after_prologue (pc);
451
452 /* If after_prologue returned a useful address, then use it. Else
453 fall back on the instruction skipping code. */
454 if (post_prologue_pc != 0)
455 return max (pc, post_prologue_pc);
456 else
457 return (skip_prologue_hard_way (pc));
458 }
459
460 /* Immediately after a function call, return the saved pc.
461 Can't always go through the frames for this because on some machines
462 the new frame is not set up until the new function executes
463 some instructions.
464
465 The return address is the value saved in the PR register + 4 */
466 static CORE_ADDR
467 sh_saved_pc_after_call (frame)
468 struct frame_info *frame;
469 {
470 return (ADDR_BITS_REMOVE(read_register(PR_REGNUM)));
471 }
472
473 /* Should call_function allocate stack space for a struct return? */
474 static int
475 sh_use_struct_convention (gcc_p, type)
476 int gcc_p;
477 struct type *type;
478 {
479 return (TYPE_LENGTH (type) > 1);
480 }
481
482 /* Store the address of the place in which to copy the structure the
483 subroutine will return. This is called from call_function.
484
485 We store structs through a pointer passed in R0 */
486 static void
487 sh_store_struct_return (addr, sp)
488 CORE_ADDR addr;
489 CORE_ADDR sp;
490 {
491 write_register (STRUCT_RETURN_REGNUM, (addr));
492 }
493
494 /* Disassemble an instruction. */
495 static int
496 gdb_print_insn_sh (memaddr, info)
497 bfd_vma memaddr;
498 disassemble_info *info;
499 {
500 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
501 return print_insn_sh (memaddr, info);
502 else
503 return print_insn_shl (memaddr, info);
504 }
505
506 /* Given a GDB frame, determine the address of the calling function's frame.
507 This will be used to create a new GDB frame struct, and then
508 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
509
510 For us, the frame address is its stack pointer value, so we look up
511 the function prologue to determine the caller's sp value, and return it. */
512 static CORE_ADDR
513 sh_frame_chain (frame)
514 struct frame_info *frame;
515 {
516 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
517 return frame->frame; /* dummy frame same as caller's frame */
518 if (frame->pc && !inside_entry_file (frame->pc))
519 return read_memory_integer (FRAME_FP (frame) + frame->extra_info->f_offset, 4);
520 else
521 return 0;
522 }
523
524 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
525 we might want to do here is to check REGNUM against the clobber mask, and
526 somehow flag it as invalid if it isn't saved on the stack somewhere. This
527 would provide a graceful failure mode when trying to get the value of
528 caller-saves registers for an inner frame. */
529
530 static CORE_ADDR
531 sh_find_callers_reg (fi, regnum)
532 struct frame_info *fi;
533 int regnum;
534 {
535 for (; fi; fi = fi->next)
536 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
537 /* When the caller requests PR from the dummy frame, we return PC because
538 that's where the previous routine appears to have done a call from. */
539 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
540 else
541 {
542 FRAME_INIT_SAVED_REGS (fi);
543 if (!fi->pc)
544 return 0;
545 if (fi->saved_regs[regnum] != 0)
546 return read_memory_integer (fi->saved_regs[regnum],
547 REGISTER_RAW_SIZE (regnum));
548 }
549 return read_register (regnum);
550 }
551
552 /* Put here the code to store, into a struct frame_saved_regs, the
553 addresses of the saved registers of frame described by FRAME_INFO.
554 This includes special registers such as pc and fp saved in special
555 ways in the stack frame. sp is even more special: the address we
556 return for it IS the sp for the next frame. */
557 static void
558 sh_nofp_frame_init_saved_regs (fi)
559 struct frame_info *fi;
560 {
561 int where[NUM_REGS];
562 int rn;
563 int have_fp = 0;
564 int depth;
565 int pc;
566 int opc;
567 int insn;
568 int r3_val = 0;
569 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
570
571 if (fi->saved_regs == NULL)
572 frame_saved_regs_zalloc (fi);
573 else
574 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
575
576 if (dummy_regs)
577 {
578 /* DANGER! This is ONLY going to work if the char buffer format of
579 the saved registers is byte-for-byte identical to the
580 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
581 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
582 return;
583 }
584
585 fi->extra_info->leaf_function = 1;
586 fi->extra_info->f_offset = 0;
587
588 for (rn = 0; rn < NUM_REGS; rn++)
589 where[rn] = -1;
590
591 depth = 0;
592
593 /* Loop around examining the prologue insns until we find something
594 that does not appear to be part of the prologue. But give up
595 after 20 of them, since we're getting silly then. */
596
597 pc = get_pc_function_start (fi->pc);
598 if (!pc)
599 {
600 fi->pc = 0;
601 return;
602 }
603
604 for (opc = pc + (2 * 28); pc < opc; pc += 2)
605 {
606 insn = read_memory_integer (pc, 2);
607 /* See where the registers will be saved to */
608 if (IS_PUSH (insn))
609 {
610 rn = GET_PUSHED_REG (insn);
611 where[rn] = depth;
612 depth += 4;
613 }
614 else if (IS_STS (insn))
615 {
616 where[PR_REGNUM] = depth;
617 /* If we're storing the pr then this isn't a leaf */
618 fi->extra_info->leaf_function = 0;
619 depth += 4;
620 }
621 else if (IS_MOV_R3 (insn))
622 {
623 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
624 }
625 else if (IS_SHLL_R3 (insn))
626 {
627 r3_val <<= 1;
628 }
629 else if (IS_ADD_R3SP (insn))
630 {
631 depth += -r3_val;
632 }
633 else if (IS_ADD_SP (insn))
634 {
635 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
636 }
637 else if (IS_MOV_SP_FP (insn))
638 break;
639 #if 0 /* This used to just stop when it found an instruction that
640 was not considered part of the prologue. Now, we just
641 keep going looking for likely instructions. */
642 else
643 break;
644 #endif
645 }
646
647 /* Now we know how deep things are, we can work out their addresses */
648
649 for (rn = 0; rn < NUM_REGS; rn++)
650 {
651 if (where[rn] >= 0)
652 {
653 if (rn == FP_REGNUM)
654 have_fp = 1;
655
656 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
657 }
658 else
659 {
660 fi->saved_regs[rn] = 0;
661 }
662 }
663
664 if (have_fp)
665 {
666 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
667 }
668 else
669 {
670 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
671 }
672
673 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
674 /* Work out the return pc - either from the saved pr or the pr
675 value */
676 }
677
678 static void
679 sh_fp_frame_init_saved_regs (fi)
680 struct frame_info *fi;
681 {
682 int where[NUM_REGS];
683 int rn;
684 int have_fp = 0;
685 int depth;
686 int pc;
687 int opc;
688 int insn;
689 int r3_val = 0;
690 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
691
692 if (fi->saved_regs == NULL)
693 frame_saved_regs_zalloc (fi);
694 else
695 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
696
697 if (dummy_regs)
698 {
699 /* DANGER! This is ONLY going to work if the char buffer format of
700 the saved registers is byte-for-byte identical to the
701 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
702 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
703 return;
704 }
705
706 fi->extra_info->leaf_function = 1;
707 fi->extra_info->f_offset = 0;
708
709 for (rn = 0; rn < NUM_REGS; rn++)
710 where[rn] = -1;
711
712 depth = 0;
713
714 /* Loop around examining the prologue insns until we find something
715 that does not appear to be part of the prologue. But give up
716 after 20 of them, since we're getting silly then. */
717
718 pc = get_pc_function_start (fi->pc);
719 if (!pc)
720 {
721 fi->pc = 0;
722 return;
723 }
724
725 for (opc = pc + (2 * 28); pc < opc; pc += 2)
726 {
727 insn = read_memory_integer (pc, 2);
728 /* See where the registers will be saved to */
729 if (IS_PUSH (insn))
730 {
731 rn = GET_PUSHED_REG (insn);
732 where[rn] = depth;
733 depth += 4;
734 }
735 else if (IS_STS (insn))
736 {
737 where[PR_REGNUM] = depth;
738 /* If we're storing the pr then this isn't a leaf */
739 fi->extra_info->leaf_function = 0;
740 depth += 4;
741 }
742 else if (IS_MOV_R3 (insn))
743 {
744 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
745 }
746 else if (IS_SHLL_R3 (insn))
747 {
748 r3_val <<= 1;
749 }
750 else if (IS_ADD_R3SP (insn))
751 {
752 depth += -r3_val;
753 }
754 else if (IS_ADD_SP (insn))
755 {
756 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
757 }
758 else if (IS_FMOV (insn))
759 {
760 if (read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & FPSCR_SZ)
761 {
762 depth += 8;
763 }
764 else
765 {
766 depth += 4;
767 }
768 }
769 else if (IS_MOV_SP_FP (insn))
770 break;
771 #if 0 /* This used to just stop when it found an instruction that
772 was not considered part of the prologue. Now, we just
773 keep going looking for likely instructions. */
774 else
775 break;
776 #endif
777 }
778
779 /* Now we know how deep things are, we can work out their addresses */
780
781 for (rn = 0; rn < NUM_REGS; rn++)
782 {
783 if (where[rn] >= 0)
784 {
785 if (rn == FP_REGNUM)
786 have_fp = 1;
787
788 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
789 }
790 else
791 {
792 fi->saved_regs[rn] = 0;
793 }
794 }
795
796 if (have_fp)
797 {
798 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
799 }
800 else
801 {
802 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
803 }
804
805 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
806 /* Work out the return pc - either from the saved pr or the pr
807 value */
808 }
809
810 /* Initialize the extra info saved in a FRAME */
811 static void
812 sh_init_extra_frame_info (fromleaf, fi)
813 int fromleaf;
814 struct frame_info *fi;
815 {
816
817 fi->extra_info = (struct frame_extra_info *)
818 frame_obstack_alloc (sizeof (struct frame_extra_info));
819
820 if (fi->next)
821 fi->pc = FRAME_SAVED_PC (fi->next);
822
823 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
824 {
825 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
826 by assuming it's always FP. */
827 fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
828 SP_REGNUM);
829 fi->extra_info->return_pc = generic_read_register_dummy (fi->pc, fi->frame,
830 PC_REGNUM);
831 fi->extra_info->f_offset = -(CALL_DUMMY_LENGTH + 4);
832 fi->extra_info->leaf_function = 0;
833 return;
834 }
835 else
836 {
837 FRAME_INIT_SAVED_REGS (fi);
838 fi->extra_info->return_pc = sh_find_callers_reg (fi, PR_REGNUM);
839 }
840 }
841
842 /* Extract from an array REGBUF containing the (raw) register state
843 the address in which a function should return its structure value,
844 as a CORE_ADDR (or an expression that can be used as one). */
845 CORE_ADDR
846 static sh_extract_struct_value_address (regbuf)
847 char *regbuf;
848 {
849 return (extract_address ((regbuf), REGISTER_RAW_SIZE (0)));
850 }
851
852 static CORE_ADDR
853 sh_frame_saved_pc (frame)
854 struct frame_info *frame;
855 {
856 return ((frame)->extra_info->return_pc);
857 }
858
859 static CORE_ADDR
860 sh_frame_args_address (fi)
861 struct frame_info *fi;
862 {
863 return (fi)->frame;
864 }
865
866 static CORE_ADDR
867 sh_frame_locals_address (fi)
868 struct frame_info *fi;
869 {
870 return (fi)->frame;
871 }
872
873 /* Discard from the stack the innermost frame,
874 restoring all saved registers. */
875 static void
876 sh_pop_frame ()
877 {
878 register struct frame_info *frame = get_current_frame ();
879 register CORE_ADDR fp;
880 register int regnum;
881
882 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
883 generic_pop_dummy_frame ();
884 else
885 {
886 fp = FRAME_FP (frame);
887 FRAME_INIT_SAVED_REGS (frame);
888
889 /* Copy regs from where they were saved in the frame */
890 for (regnum = 0; regnum < NUM_REGS; regnum++)
891 if (frame->saved_regs[regnum])
892 write_register (regnum, read_memory_integer (frame->saved_regs[regnum], 4));
893
894 write_register (PC_REGNUM, frame->extra_info->return_pc);
895 write_register (SP_REGNUM, fp + 4);
896 }
897 flush_cached_frames ();
898 }
899
900 /* Function: push_arguments
901 Setup the function arguments for calling a function in the inferior.
902
903 On the Hitachi SH architecture, there are four registers (R4 to R7)
904 which are dedicated for passing function arguments. Up to the first
905 four arguments (depending on size) may go into these registers.
906 The rest go on the stack.
907
908 Arguments that are smaller than 4 bytes will still take up a whole
909 register or a whole 32-bit word on the stack, and will be
910 right-justified in the register or the stack word. This includes
911 chars, shorts, and small aggregate types.
912
913 Arguments that are larger than 4 bytes may be split between two or
914 more registers. If there are not enough registers free, an argument
915 may be passed partly in a register (or registers), and partly on the
916 stack. This includes doubles, long longs, and larger aggregates.
917 As far as I know, there is no upper limit to the size of aggregates
918 that will be passed in this way; in other words, the convention of
919 passing a pointer to a large aggregate instead of a copy is not used.
920
921 An exceptional case exists for struct arguments (and possibly other
922 aggregates such as arrays) if the size is larger than 4 bytes but
923 not a multiple of 4 bytes. In this case the argument is never split
924 between the registers and the stack, but instead is copied in its
925 entirety onto the stack, AND also copied into as many registers as
926 there is room for. In other words, space in registers permitting,
927 two copies of the same argument are passed in. As far as I can tell,
928 only the one on the stack is used, although that may be a function
929 of the level of compiler optimization. I suspect this is a compiler
930 bug. Arguments of these odd sizes are left-justified within the
931 word (as opposed to arguments smaller than 4 bytes, which are
932 right-justified).
933
934 If the function is to return an aggregate type such as a struct, it
935 is either returned in the normal return value register R0 (if its
936 size is no greater than one byte), or else the caller must allocate
937 space into which the callee will copy the return value (if the size
938 is greater than one byte). In this case, a pointer to the return
939 value location is passed into the callee in register R2, which does
940 not displace any of the other arguments passed in via registers R4
941 to R7. */
942
943 static CORE_ADDR
944 sh_push_arguments (nargs, args, sp, struct_return, struct_addr)
945 int nargs;
946 value_ptr *args;
947 CORE_ADDR sp;
948 unsigned char struct_return;
949 CORE_ADDR struct_addr;
950 {
951 int stack_offset, stack_alloc;
952 int argreg;
953 int argnum;
954 struct type *type;
955 CORE_ADDR regval;
956 char *val;
957 char valbuf[4];
958 int len;
959 int odd_sized_struct;
960
961 /* first force sp to a 4-byte alignment */
962 sp = sp & ~3;
963
964 /* The "struct return pointer" pseudo-argument has its own dedicated
965 register */
966 if (struct_return)
967 write_register (STRUCT_RETURN_REGNUM, struct_addr);
968
969 /* Now make sure there's space on the stack */
970 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
971 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
972 sp -= stack_alloc; /* make room on stack for args */
973
974 /* Now load as many as possible of the first arguments into
975 registers, and push the rest onto the stack. There are 16 bytes
976 in four registers available. Loop thru args from first to last. */
977
978 argreg = ARG0_REGNUM;
979 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
980 {
981 type = VALUE_TYPE (args[argnum]);
982 len = TYPE_LENGTH (type);
983 memset (valbuf, 0, sizeof (valbuf));
984 if (len < 4)
985 {
986 /* value gets right-justified in the register or stack word */
987 memcpy (valbuf + (4 - len),
988 (char *) VALUE_CONTENTS (args[argnum]), len);
989 val = valbuf;
990 }
991 else
992 val = (char *) VALUE_CONTENTS (args[argnum]);
993
994 if (len > 4 && (len & 3) != 0)
995 odd_sized_struct = 1; /* such structs go entirely on stack */
996 else
997 odd_sized_struct = 0;
998 while (len > 0)
999 {
1000 if (argreg > ARGLAST_REGNUM || odd_sized_struct)
1001 { /* must go on the stack */
1002 write_memory (sp + stack_offset, val, 4);
1003 stack_offset += 4;
1004 }
1005 /* NOTE WELL!!!!! This is not an "else if" clause!!!
1006 That's because some *&^%$ things get passed on the stack
1007 AND in the registers! */
1008 if (argreg <= ARGLAST_REGNUM)
1009 { /* there's room in a register */
1010 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
1011 write_register (argreg++, regval);
1012 }
1013 /* Store the value 4 bytes at a time. This means that things
1014 larger than 4 bytes may go partly in registers and partly
1015 on the stack. */
1016 len -= REGISTER_RAW_SIZE (argreg);
1017 val += REGISTER_RAW_SIZE (argreg);
1018 }
1019 }
1020 return sp;
1021 }
1022
1023 /* Function: push_return_address (pc)
1024 Set up the return address for the inferior function call.
1025 Needed for targets where we don't actually execute a JSR/BSR instruction */
1026
1027 static CORE_ADDR
1028 sh_push_return_address (pc, sp)
1029 CORE_ADDR pc;
1030 CORE_ADDR sp;
1031 {
1032 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
1033 return sp;
1034 }
1035
1036 /* Function: fix_call_dummy
1037 Poke the callee function's address into the destination part of
1038 the CALL_DUMMY. The address is actually stored in a data word
1039 following the actualy CALL_DUMMY instructions, which will load
1040 it into a register using PC-relative addressing. This function
1041 expects the CALL_DUMMY to look like this:
1042
1043 mov.w @(2,PC), R8
1044 jsr @R8
1045 nop
1046 trap
1047 <destination>
1048 */
1049
1050 #if 0
1051 void
1052 sh_fix_call_dummy (dummy, pc, fun, nargs, args, type, gcc_p)
1053 char *dummy;
1054 CORE_ADDR pc;
1055 CORE_ADDR fun;
1056 int nargs;
1057 value_ptr *args;
1058 struct type *type;
1059 int gcc_p;
1060 {
1061 *(unsigned long *) (dummy + 8) = fun;
1062 }
1063 #endif
1064
1065 static int
1066 sh_coerce_float_to_double (struct type *formal, struct type *actual)
1067 {
1068 return 1;
1069 }
1070
1071 /* Find a function's return value in the appropriate registers (in
1072 regbuf), and copy it into valbuf. Extract from an array REGBUF
1073 containing the (raw) register state a function return value of type
1074 TYPE, and copy that, in virtual format, into VALBUF. */
1075 static void
1076 sh_extract_return_value (type, regbuf, valbuf)
1077 struct type *type;
1078 char *regbuf;
1079 char *valbuf;
1080 {
1081 int len = TYPE_LENGTH (type);
1082
1083 if (len <= 4)
1084 memcpy (valbuf, ((char *) regbuf) + 4 - len, len);
1085 else if (len <= 8)
1086 memcpy (valbuf, ((char *) regbuf) + 8 - len, len);
1087 else
1088 error ("bad size for return value");
1089 }
1090
1091 /* Write into appropriate registers a function return value
1092 of type TYPE, given in virtual format.
1093 If the architecture is sh4 or sh3e, store a function's return value
1094 in the R0 general register or in the FP0 floating point register,
1095 depending on the type of the return value. In all the other cases
1096 the result is stored in r0. */
1097 static void
1098 sh_default_store_return_value (struct type *type, char *valbuf)
1099 {
1100 write_register_bytes (REGISTER_BYTE (0),
1101 valbuf, TYPE_LENGTH (type));
1102 }
1103
1104 static void
1105 sh3e_sh4_store_return_value (struct type *type, char *valbuf)
1106 {
1107 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1108 write_register_bytes (REGISTER_BYTE (FP0_REGNUM),
1109 valbuf, TYPE_LENGTH (type));
1110 else
1111 write_register_bytes (REGISTER_BYTE (0),
1112 valbuf, TYPE_LENGTH (type));
1113 }
1114
1115
1116 /* Print the registers in a form similar to the E7000 */
1117
1118 static void
1119 sh_generic_show_regs ()
1120 {
1121 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1122 paddr (read_register (PC_REGNUM)),
1123 (long) read_register (SR_REGNUM),
1124 (long) read_register (PR_REGNUM),
1125 (long) read_register (MACH_REGNUM),
1126 (long) read_register (MACL_REGNUM));
1127
1128 printf_filtered ("GBR=%08lx VBR=%08lx",
1129 (long) read_register (GBR_REGNUM),
1130 (long) read_register (VBR_REGNUM));
1131
1132 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1133 (long) read_register (0),
1134 (long) read_register (1),
1135 (long) read_register (2),
1136 (long) read_register (3),
1137 (long) read_register (4),
1138 (long) read_register (5),
1139 (long) read_register (6),
1140 (long) read_register (7));
1141 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1142 (long) read_register (8),
1143 (long) read_register (9),
1144 (long) read_register (10),
1145 (long) read_register (11),
1146 (long) read_register (12),
1147 (long) read_register (13),
1148 (long) read_register (14),
1149 (long) read_register (15));
1150 }
1151
1152 static void
1153 sh3_show_regs ()
1154 {
1155 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1156 paddr (read_register (PC_REGNUM)),
1157 (long) read_register (SR_REGNUM),
1158 (long) read_register (PR_REGNUM),
1159 (long) read_register (MACH_REGNUM),
1160 (long) read_register (MACL_REGNUM));
1161
1162 printf_filtered ("GBR=%08lx VBR=%08lx",
1163 (long) read_register (GBR_REGNUM),
1164 (long) read_register (VBR_REGNUM));
1165 printf_filtered (" SSR=%08lx SPC=%08lx",
1166 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1167 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1168
1169 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1170 (long) read_register (0),
1171 (long) read_register (1),
1172 (long) read_register (2),
1173 (long) read_register (3),
1174 (long) read_register (4),
1175 (long) read_register (5),
1176 (long) read_register (6),
1177 (long) read_register (7));
1178 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1179 (long) read_register (8),
1180 (long) read_register (9),
1181 (long) read_register (10),
1182 (long) read_register (11),
1183 (long) read_register (12),
1184 (long) read_register (13),
1185 (long) read_register (14),
1186 (long) read_register (15));
1187 }
1188
1189
1190 static void
1191 sh3e_show_regs ()
1192 {
1193 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1194 paddr (read_register (PC_REGNUM)),
1195 (long) read_register (SR_REGNUM),
1196 (long) read_register (PR_REGNUM),
1197 (long) read_register (MACH_REGNUM),
1198 (long) read_register (MACL_REGNUM));
1199
1200 printf_filtered ("GBR=%08lx VBR=%08lx",
1201 (long) read_register (GBR_REGNUM),
1202 (long) read_register (VBR_REGNUM));
1203 printf_filtered (" SSR=%08lx SPC=%08lx",
1204 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1205 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1206 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1207 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1208 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1209
1210 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1211 (long) read_register (0),
1212 (long) read_register (1),
1213 (long) read_register (2),
1214 (long) read_register (3),
1215 (long) read_register (4),
1216 (long) read_register (5),
1217 (long) read_register (6),
1218 (long) read_register (7));
1219 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1220 (long) read_register (8),
1221 (long) read_register (9),
1222 (long) read_register (10),
1223 (long) read_register (11),
1224 (long) read_register (12),
1225 (long) read_register (13),
1226 (long) read_register (14),
1227 (long) read_register (15));
1228
1229 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1230 (long) read_register (FP0_REGNUM + 0),
1231 (long) read_register (FP0_REGNUM + 1),
1232 (long) read_register (FP0_REGNUM + 2),
1233 (long) read_register (FP0_REGNUM + 3),
1234 (long) read_register (FP0_REGNUM + 4),
1235 (long) read_register (FP0_REGNUM + 5),
1236 (long) read_register (FP0_REGNUM + 6),
1237 (long) read_register (FP0_REGNUM + 7));
1238 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1239 (long) read_register (FP0_REGNUM + 8),
1240 (long) read_register (FP0_REGNUM + 9),
1241 (long) read_register (FP0_REGNUM + 10),
1242 (long) read_register (FP0_REGNUM + 11),
1243 (long) read_register (FP0_REGNUM + 12),
1244 (long) read_register (FP0_REGNUM + 13),
1245 (long) read_register (FP0_REGNUM + 14),
1246 (long) read_register (FP0_REGNUM + 15));
1247 }
1248
1249 static void
1250 sh3_dsp_show_regs ()
1251 {
1252 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1253 paddr (read_register (PC_REGNUM)),
1254 (long) read_register (SR_REGNUM),
1255 (long) read_register (PR_REGNUM),
1256 (long) read_register (MACH_REGNUM),
1257 (long) read_register (MACL_REGNUM));
1258
1259 printf_filtered ("GBR=%08lx VBR=%08lx",
1260 (long) read_register (GBR_REGNUM),
1261 (long) read_register (VBR_REGNUM));
1262
1263 printf_filtered (" SSR=%08lx SPC=%08lx",
1264 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1265 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1266
1267 printf_filtered (" DSR=%08lx",
1268 (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1269
1270 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1271 (long) read_register (0),
1272 (long) read_register (1),
1273 (long) read_register (2),
1274 (long) read_register (3),
1275 (long) read_register (4),
1276 (long) read_register (5),
1277 (long) read_register (6),
1278 (long) read_register (7));
1279 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1280 (long) read_register (8),
1281 (long) read_register (9),
1282 (long) read_register (10),
1283 (long) read_register (11),
1284 (long) read_register (12),
1285 (long) read_register (13),
1286 (long) read_register (14),
1287 (long) read_register (15));
1288
1289 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1290 (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1291 (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1292 (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1293 (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1294 (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1295 (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1296 (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1297 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1298 (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1299 (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1300 (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1301 (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1302 (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1303 (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1304 }
1305
1306 static void
1307 sh4_show_regs ()
1308 {
1309 int pr = read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & 0x80000;
1310 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1311 paddr (read_register (PC_REGNUM)),
1312 (long) read_register (SR_REGNUM),
1313 (long) read_register (PR_REGNUM),
1314 (long) read_register (MACH_REGNUM),
1315 (long) read_register (MACL_REGNUM));
1316
1317 printf_filtered ("GBR=%08lx VBR=%08lx",
1318 (long) read_register (GBR_REGNUM),
1319 (long) read_register (VBR_REGNUM));
1320 printf_filtered (" SSR=%08lx SPC=%08lx",
1321 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1322 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1323 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1324 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1325 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1326
1327 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1328 (long) read_register (0),
1329 (long) read_register (1),
1330 (long) read_register (2),
1331 (long) read_register (3),
1332 (long) read_register (4),
1333 (long) read_register (5),
1334 (long) read_register (6),
1335 (long) read_register (7));
1336 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1337 (long) read_register (8),
1338 (long) read_register (9),
1339 (long) read_register (10),
1340 (long) read_register (11),
1341 (long) read_register (12),
1342 (long) read_register (13),
1343 (long) read_register (14),
1344 (long) read_register (15));
1345
1346 printf_filtered ((pr
1347 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1348 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1349 (long) read_register (FP0_REGNUM + 0),
1350 (long) read_register (FP0_REGNUM + 1),
1351 (long) read_register (FP0_REGNUM + 2),
1352 (long) read_register (FP0_REGNUM + 3),
1353 (long) read_register (FP0_REGNUM + 4),
1354 (long) read_register (FP0_REGNUM + 5),
1355 (long) read_register (FP0_REGNUM + 6),
1356 (long) read_register (FP0_REGNUM + 7));
1357 printf_filtered ((pr
1358 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1359 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1360 (long) read_register (FP0_REGNUM + 8),
1361 (long) read_register (FP0_REGNUM + 9),
1362 (long) read_register (FP0_REGNUM + 10),
1363 (long) read_register (FP0_REGNUM + 11),
1364 (long) read_register (FP0_REGNUM + 12),
1365 (long) read_register (FP0_REGNUM + 13),
1366 (long) read_register (FP0_REGNUM + 14),
1367 (long) read_register (FP0_REGNUM + 15));
1368 }
1369
1370 static void
1371 sh_dsp_show_regs ()
1372 {
1373 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1374 paddr (read_register (PC_REGNUM)),
1375 (long) read_register (SR_REGNUM),
1376 (long) read_register (PR_REGNUM),
1377 (long) read_register (MACH_REGNUM),
1378 (long) read_register (MACL_REGNUM));
1379
1380 printf_filtered ("GBR=%08lx VBR=%08lx",
1381 (long) read_register (GBR_REGNUM),
1382 (long) read_register (VBR_REGNUM));
1383
1384 printf_filtered (" DSR=%08lx",
1385 (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1386
1387 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1388 (long) read_register (0),
1389 (long) read_register (1),
1390 (long) read_register (2),
1391 (long) read_register (3),
1392 (long) read_register (4),
1393 (long) read_register (5),
1394 (long) read_register (6),
1395 (long) read_register (7));
1396 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1397 (long) read_register (8),
1398 (long) read_register (9),
1399 (long) read_register (10),
1400 (long) read_register (11),
1401 (long) read_register (12),
1402 (long) read_register (13),
1403 (long) read_register (14),
1404 (long) read_register (15));
1405
1406 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1407 (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1408 (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1409 (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1410 (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1411 (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1412 (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1413 (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1414 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1415 (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1416 (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1417 (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1418 (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1419 (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1420 (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1421 }
1422
1423 void sh_show_regs_command (char *args, int from_tty)
1424 {
1425 if (sh_show_regs)
1426 (*sh_show_regs)();
1427 }
1428
1429 /* Index within `registers' of the first byte of the space for
1430 register N. */
1431 static int
1432 sh_default_register_byte (reg_nr)
1433 int reg_nr;
1434 {
1435 return (reg_nr * 4);
1436 }
1437
1438 static int
1439 sh_sh4_register_byte (reg_nr)
1440 int reg_nr;
1441 {
1442 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1443 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR7_REGNUM)
1444 return (dr_reg_base_num (reg_nr) * 4);
1445 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1446 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV3_REGNUM)
1447 return (fv_reg_base_num (reg_nr) * 4);
1448 else
1449 return (reg_nr * 4);
1450 }
1451
1452 /* Number of bytes of storage in the actual machine representation for
1453 register REG_NR. */
1454 static int
1455 sh_default_register_raw_size (reg_nr)
1456 int reg_nr;
1457 {
1458 return 4;
1459 }
1460
1461 static int
1462 sh_sh4_register_raw_size (reg_nr)
1463 int reg_nr;
1464 {
1465 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1466 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR7_REGNUM)
1467 return 8;
1468 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1469 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV3_REGNUM)
1470 return 16;
1471 else
1472 return 4;
1473 }
1474
1475 /* Number of bytes of storage in the program's representation
1476 for register N. */
1477 static int
1478 sh_register_virtual_size (reg_nr)
1479 int reg_nr;
1480 {
1481 return 4;
1482 }
1483
1484 /* Return the GDB type object for the "standard" data type
1485 of data in register N. */
1486
1487 static struct type *
1488 sh_sh3e_register_virtual_type (reg_nr)
1489 int reg_nr;
1490 {
1491 if ((reg_nr >= FP0_REGNUM
1492 && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP15_REGNUM))
1493 || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1494 return builtin_type_float;
1495 else
1496 return builtin_type_int;
1497 }
1498
1499 static struct type *
1500 sh_sh4_register_virtual_type (reg_nr)
1501 int reg_nr;
1502 {
1503 if ((reg_nr >= FP0_REGNUM
1504 && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP15_REGNUM))
1505 || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1506 return builtin_type_float;
1507 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1508 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR7_REGNUM)
1509 return builtin_type_double;
1510 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1511 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV3_REGNUM)
1512 return sh_sh4_build_float_register_type (3);
1513 else
1514 return builtin_type_int;
1515 }
1516
1517 static struct type *
1518 sh_sh4_build_float_register_type (int high)
1519 {
1520 struct type *temp;
1521
1522 temp = create_range_type (NULL, builtin_type_int, 0, high);
1523 return create_array_type (NULL, builtin_type_float, temp);
1524 }
1525
1526 static struct type *
1527 sh_default_register_virtual_type (reg_nr)
1528 int reg_nr;
1529 {
1530 return builtin_type_int;
1531 }
1532
1533 void
1534 sh_fetch_pseudo_register (int reg_nr)
1535 {
1536 int base_regnum, portion;
1537
1538 if (!register_cached (reg_nr))
1539 {
1540 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1541 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR7_REGNUM)
1542 {
1543 base_regnum = dr_reg_base_num (reg_nr);
1544
1545 /* Read the real regs for which this one is an alias. */
1546 for (portion = 0; portion < 2; portion++)
1547 if (!register_cached (base_regnum + portion))
1548 target_fetch_registers (base_regnum + portion);
1549 }
1550 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1551 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV3_REGNUM)
1552 {
1553 base_regnum = fv_reg_base_num (reg_nr);
1554
1555 /* Read the real regs for which this one is an alias. */
1556 for (portion = 0; portion < 4; portion++)
1557 if (!register_cached (base_regnum + portion))
1558 target_fetch_registers (base_regnum + portion);
1559
1560 }
1561 register_valid [reg_nr] = 1;
1562 }
1563 }
1564
1565 void
1566 sh_store_pseudo_register (int reg_nr)
1567 {
1568 int base_regnum, portion;
1569
1570 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1571 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR7_REGNUM)
1572 {
1573 base_regnum = dr_reg_base_num (reg_nr);
1574
1575 /* Write the real regs for which this one is an alias. */
1576 for (portion = 0; portion < 2; portion++)
1577 {
1578 register_valid[base_regnum + portion] = 1;
1579 target_store_registers (base_regnum + portion);
1580 }
1581 }
1582 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1583 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV3_REGNUM)
1584 {
1585 base_regnum = fv_reg_base_num (reg_nr);
1586
1587 /* Write the real regs for which this one is an alias. */
1588 for (portion = 0; portion < 4; portion++)
1589 {
1590 register_valid[base_regnum + portion] = 1;
1591 target_store_registers (base_regnum + portion);
1592 }
1593 }
1594 }
1595
1596 static int
1597 fv_reg_base_num (int fv_regnum)
1598 {
1599 int fp_regnum;
1600
1601 fp_regnum = FP0_REGNUM +
1602 (fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM) * 4;
1603 return fp_regnum;
1604 }
1605
1606 static int
1607 dr_reg_base_num (int dr_regnum)
1608 {
1609 int fp_regnum;
1610
1611 fp_regnum = FP0_REGNUM +
1612 (dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM) * 2;
1613 return fp_regnum;
1614 }
1615
1616 static void
1617 do_fv_register_info (int fv_regnum)
1618 {
1619 int first_fp_reg_num = fv_reg_base_num (fv_regnum);
1620 printf_filtered ("fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
1621 fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM,
1622 (int) read_register (first_fp_reg_num),
1623 (int) read_register (first_fp_reg_num + 1),
1624 (int) read_register (first_fp_reg_num + 2),
1625 (int) read_register (first_fp_reg_num + 3));
1626 }
1627
1628 static void
1629 do_dr_register_info (int dr_regnum)
1630 {
1631 int first_fp_reg_num = dr_reg_base_num (dr_regnum);
1632
1633 printf_filtered ("dr%d\t0x%08x%08x\n",
1634 dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM,
1635 (int) read_register (first_fp_reg_num),
1636 (int) read_register (first_fp_reg_num + 1));
1637 }
1638
1639 static void
1640 sh_do_pseudo_register (int regnum)
1641 {
1642 if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1643 internal_error ("Invalid pasudo register number %d\n", regnum);
1644 else if (regnum >= NUM_REGS &&
1645 regnum < gdbarch_tdep (current_gdbarch)->FV0_REGNUM)
1646 do_dr_register_info (regnum);
1647 else if (regnum >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM &&
1648 regnum <= gdbarch_tdep (current_gdbarch)->FV3_REGNUM)
1649 do_fv_register_info (regnum);
1650 }
1651
1652
1653 static void
1654 sh_do_fp_register (int regnum)
1655 { /* do values for FP (float) regs */
1656 char *raw_buffer;
1657 double flt; /* double extracted from raw hex data */
1658 int inv;
1659 int j;
1660
1661 /* Allocate space for the float. */
1662 raw_buffer = (char *) alloca (REGISTER_RAW_SIZE (FP0_REGNUM));
1663
1664 /* Get the data in raw format. */
1665 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1666 error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
1667
1668 /* Get the register as a number */
1669 flt = unpack_double (builtin_type_float, raw_buffer, &inv);
1670
1671 /* Print the name and some spaces. */
1672 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1673 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1674
1675 /* Print the value. */
1676 printf_filtered (inv ? "<invalid float>" : "%-10.9g", flt);
1677
1678 /* Print the fp register as hex. */
1679 printf_filtered ("\t(raw 0x");
1680 for (j = 0; j < REGISTER_RAW_SIZE (regnum); j++)
1681 {
1682 register int idx = TARGET_BYTE_ORDER == BIG_ENDIAN ? j
1683 : REGISTER_RAW_SIZE (regnum) - 1 - j;
1684 printf_filtered ("%02x", (unsigned char) raw_buffer[idx]);
1685 }
1686 printf_filtered (")");
1687 printf_filtered ("\n");
1688 }
1689
1690 static void
1691 sh_do_register (int regnum)
1692 {
1693 char raw_buffer[MAX_REGISTER_RAW_SIZE];
1694
1695 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1696 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1697
1698 /* Get the data in raw format. */
1699 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1700 printf_filtered ("*value not available*\n");
1701
1702 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1703 gdb_stdout, 'x', 1, 0, Val_pretty_default);
1704 printf_filtered ("\t");
1705 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1706 gdb_stdout, 0, 1, 0, Val_pretty_default);
1707 printf_filtered ("\n");
1708 }
1709
1710 static void
1711 sh_print_register (int regnum)
1712 {
1713 if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1714 internal_error ("Invalid register number %d\n", regnum);
1715
1716 else if (regnum > 0 && regnum < NUM_REGS)
1717 {
1718 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1719 sh_do_fp_register (regnum); /* FP regs */
1720 else
1721 sh_do_register (regnum); /* All other regs */
1722 }
1723
1724 else if (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1725 sh_do_pseudo_register (regnum);
1726 }
1727
1728 void
1729 sh_do_registers_info (int regnum, int fpregs)
1730 {
1731 if (regnum != -1) /* do one specified register */
1732 {
1733 if (*(REGISTER_NAME (regnum)) == '\0')
1734 error ("Not a valid register for the current processor type");
1735
1736 sh_print_register (regnum);
1737 }
1738 else
1739 /* do all (or most) registers */
1740 {
1741 regnum = 0;
1742 while (regnum < NUM_REGS)
1743 {
1744 /* If the register name is empty, it is undefined for this
1745 processor, so don't display anything. */
1746 if (REGISTER_NAME (regnum) == NULL
1747 || *(REGISTER_NAME (regnum)) == '\0')
1748 {
1749 regnum++;
1750 continue;
1751 }
1752
1753 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1754 {
1755 if (fpregs)
1756 {
1757 /* true for "INFO ALL-REGISTERS" command */
1758 sh_do_fp_register (regnum); /* FP regs */
1759 regnum ++;
1760 }
1761 else
1762 regnum += (gdbarch_tdep (current_gdbarch)->FP15_REGNUM - FP0_REGNUM); /* skip FP regs */
1763 }
1764 else
1765 {
1766 sh_do_register (regnum); /* All other regs */
1767 regnum++;
1768 }
1769 }
1770
1771 if (fpregs)
1772 while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1773 {
1774 sh_do_pseudo_register (regnum);
1775 regnum++;
1776 }
1777 }
1778 }
1779
1780 static gdbarch_init_ftype sh_gdbarch_init;
1781
1782 static struct gdbarch *
1783 sh_gdbarch_init (info, arches)
1784 struct gdbarch_info info;
1785 struct gdbarch_list *arches;
1786 {
1787 static LONGEST sh_call_dummy_words[] = {0};
1788 struct gdbarch *gdbarch;
1789 struct gdbarch_tdep *tdep;
1790 gdbarch_register_name_ftype *sh_register_name;
1791 gdbarch_store_return_value_ftype *sh_store_return_value;
1792 gdbarch_register_virtual_type_ftype *sh_register_virtual_type;
1793
1794 /* Find a candidate among the list of pre-declared architectures. */
1795 arches = gdbarch_list_lookup_by_info (arches, &info);
1796 if (arches != NULL)
1797 return arches->gdbarch;
1798
1799 /* None found, create a new architecture from the information
1800 provided. */
1801 tdep = XMALLOC (struct gdbarch_tdep);
1802 gdbarch = gdbarch_alloc (&info, tdep);
1803
1804 /* Initialize the register numbers that are not common to all the
1805 variants to -1, if necessary thse will be overwritten in the case
1806 statement below. */
1807 tdep->FPUL_REGNUM = -1;
1808 tdep->FPSCR_REGNUM = -1;
1809 tdep->DSR_REGNUM = -1;
1810 tdep->FP15_REGNUM = -1;
1811 tdep->A0G_REGNUM = -1;
1812 tdep->A0_REGNUM = -1;
1813 tdep->A1G_REGNUM = -1;
1814 tdep->A1_REGNUM = -1;
1815 tdep->M0_REGNUM = -1;
1816 tdep->M1_REGNUM = -1;
1817 tdep->X0_REGNUM = -1;
1818 tdep->X1_REGNUM = -1;
1819 tdep->Y0_REGNUM = -1;
1820 tdep->Y1_REGNUM = -1;
1821 tdep->MOD_REGNUM = -1;
1822 tdep->RS_REGNUM = -1;
1823 tdep->RE_REGNUM = -1;
1824 tdep->SSR_REGNUM = -1;
1825 tdep->SPC_REGNUM = -1;
1826 tdep->DR0_REGNUM = -1;
1827 tdep->DR1_REGNUM = -1;
1828 tdep->DR2_REGNUM = -1;
1829 tdep->DR3_REGNUM = -1;
1830 tdep->DR4_REGNUM = -1;
1831 tdep->DR5_REGNUM = -1;
1832 tdep->DR6_REGNUM = -1;
1833 tdep->DR7_REGNUM = -1;
1834 tdep->FV0_REGNUM = -1;
1835 tdep->FV1_REGNUM = -1;
1836 tdep->FV2_REGNUM = -1;
1837 tdep->FV3_REGNUM = -1;
1838 set_gdbarch_fp0_regnum (gdbarch, -1);
1839 set_gdbarch_num_pseudo_regs (gdbarch, 0);
1840 set_gdbarch_max_register_raw_size (gdbarch, 4);
1841 set_gdbarch_max_register_virtual_size (gdbarch, 4);
1842
1843 switch (info.bfd_arch_info->mach)
1844 {
1845 case bfd_mach_sh:
1846 sh_register_name = sh_sh_register_name;
1847 sh_show_regs = sh_generic_show_regs;
1848 sh_store_return_value = sh_default_store_return_value;
1849 sh_register_virtual_type = sh_default_register_virtual_type;
1850 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1851 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1852 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1853 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1854 break;
1855 case bfd_mach_sh2:
1856 sh_register_name = sh_sh_register_name;
1857 sh_show_regs = sh_generic_show_regs;
1858 sh_store_return_value = sh_default_store_return_value;
1859 sh_register_virtual_type = sh_default_register_virtual_type;
1860 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1861 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1862 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1863 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1864 break;
1865 case bfd_mach_sh_dsp:
1866 sh_register_name = sh_sh_dsp_register_name;
1867 sh_show_regs = sh_dsp_show_regs;
1868 sh_store_return_value = sh_default_store_return_value;
1869 sh_register_virtual_type = sh_default_register_virtual_type;
1870 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1871 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1872 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1873 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1874 tdep->DSR_REGNUM = 24;
1875 tdep->A0G_REGNUM = 25;
1876 tdep->A0_REGNUM = 26;
1877 tdep->A1G_REGNUM = 27;
1878 tdep->A1_REGNUM = 28;
1879 tdep->M0_REGNUM = 29;
1880 tdep->M1_REGNUM = 30;
1881 tdep->X0_REGNUM = 31;
1882 tdep->X1_REGNUM = 32;
1883 tdep->Y0_REGNUM = 33;
1884 tdep->Y1_REGNUM = 34;
1885 tdep->MOD_REGNUM = 40;
1886 tdep->RS_REGNUM = 43;
1887 tdep->RE_REGNUM = 44;
1888 break;
1889 case bfd_mach_sh3:
1890 sh_register_name = sh_sh3_register_name;
1891 sh_show_regs = sh3_show_regs;
1892 sh_store_return_value = sh_default_store_return_value;
1893 sh_register_virtual_type = sh_default_register_virtual_type;
1894 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1895 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1896 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1897 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1898 tdep->SSR_REGNUM = 41;
1899 tdep->SPC_REGNUM = 42;
1900 break;
1901 case bfd_mach_sh3e:
1902 sh_register_name = sh_sh3e_register_name;
1903 sh_show_regs = sh3e_show_regs;
1904 sh_store_return_value = sh3e_sh4_store_return_value;
1905 sh_register_virtual_type = sh_sh3e_register_virtual_type;
1906 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
1907 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1908 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1909 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1910 set_gdbarch_fp0_regnum (gdbarch, 25);
1911 tdep->FPUL_REGNUM = 23;
1912 tdep->FPSCR_REGNUM = 24;
1913 tdep->FP15_REGNUM = 40;
1914 tdep->SSR_REGNUM = 41;
1915 tdep->SPC_REGNUM = 42;
1916 break;
1917 case bfd_mach_sh3_dsp:
1918 sh_register_name = sh_sh3_dsp_register_name;
1919 sh_show_regs = sh3_dsp_show_regs;
1920 sh_store_return_value = sh_default_store_return_value;
1921 sh_register_virtual_type = sh_default_register_virtual_type;
1922 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1923 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1924 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1925 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1926 tdep->DSR_REGNUM = 24;
1927 tdep->A0G_REGNUM = 25;
1928 tdep->A0_REGNUM = 26;
1929 tdep->A1G_REGNUM = 27;
1930 tdep->A1_REGNUM = 28;
1931 tdep->M0_REGNUM = 29;
1932 tdep->M1_REGNUM = 30;
1933 tdep->X0_REGNUM = 31;
1934 tdep->X1_REGNUM = 32;
1935 tdep->Y0_REGNUM = 33;
1936 tdep->Y1_REGNUM = 34;
1937 tdep->MOD_REGNUM = 40;
1938 tdep->RS_REGNUM = 43;
1939 tdep->RE_REGNUM = 44;
1940 tdep->SSR_REGNUM = 41;
1941 tdep->SPC_REGNUM = 42;
1942 break;
1943 case bfd_mach_sh4:
1944 sh_register_name = sh_sh4_register_name;
1945 sh_show_regs = sh4_show_regs;
1946 sh_store_return_value = sh3e_sh4_store_return_value;
1947 sh_register_virtual_type = sh_sh4_register_virtual_type;
1948 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
1949 set_gdbarch_fp0_regnum (gdbarch, 25);
1950 set_gdbarch_register_raw_size (gdbarch, sh_sh4_register_raw_size);
1951 set_gdbarch_register_virtual_size (gdbarch, sh_sh4_register_raw_size);
1952 set_gdbarch_register_byte (gdbarch, sh_sh4_register_byte);
1953 set_gdbarch_num_pseudo_regs (gdbarch, 12);
1954 set_gdbarch_max_register_raw_size (gdbarch, 4 * 4);
1955 set_gdbarch_max_register_virtual_size (gdbarch, 4 * 4);
1956 tdep->FPUL_REGNUM = 23;
1957 tdep->FPSCR_REGNUM = 24;
1958 tdep->FP15_REGNUM = 40;
1959 tdep->SSR_REGNUM = 41;
1960 tdep->SPC_REGNUM = 42;
1961 tdep->DR0_REGNUM = 59;
1962 tdep->DR1_REGNUM = 60;
1963 tdep->DR2_REGNUM = 61;
1964 tdep->DR3_REGNUM = 62;
1965 tdep->DR4_REGNUM = 63;
1966 tdep->DR5_REGNUM = 64;
1967 tdep->DR6_REGNUM = 65;
1968 tdep->DR7_REGNUM = 66;
1969 tdep->FV0_REGNUM = 67;
1970 tdep->FV1_REGNUM = 68;
1971 tdep->FV2_REGNUM = 69;
1972 tdep->FV3_REGNUM = 70;
1973 break;
1974 default:
1975 sh_register_name = sh_generic_register_name;
1976 sh_show_regs = sh_generic_show_regs;
1977 sh_store_return_value = sh_default_store_return_value;
1978 sh_register_virtual_type = sh_default_register_virtual_type;
1979 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1980 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1981 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1982 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1983 break;
1984 }
1985
1986 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
1987 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
1988 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
1989 set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
1990 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
1991 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
1992
1993 set_gdbarch_num_regs (gdbarch, 59);
1994 set_gdbarch_sp_regnum (gdbarch, 15);
1995 set_gdbarch_fp_regnum (gdbarch, 14);
1996 set_gdbarch_pc_regnum (gdbarch, 16);
1997 set_gdbarch_register_name (gdbarch, sh_register_name);
1998 set_gdbarch_register_size (gdbarch, 4);
1999 set_gdbarch_register_bytes (gdbarch, NUM_REGS * 4);
2000 set_gdbarch_register_virtual_type (gdbarch, sh_register_virtual_type);
2001
2002 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2003 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2004 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2005 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2006 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2007 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2008 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2009 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);
2010
2011 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2012 set_gdbarch_call_dummy_length (gdbarch, 0);
2013 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2014 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2015 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
2016 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2017 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2018 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2019 set_gdbarch_call_dummy_words (gdbarch, sh_call_dummy_words);
2020 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (sh_call_dummy_words));
2021 set_gdbarch_call_dummy_p (gdbarch, 1);
2022 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2023 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
2024 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2025 set_gdbarch_coerce_float_to_double (gdbarch,
2026 sh_coerce_float_to_double);
2027
2028 set_gdbarch_extract_return_value (gdbarch, sh_extract_return_value);
2029 set_gdbarch_push_arguments (gdbarch, sh_push_arguments);
2030 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2031 set_gdbarch_push_return_address (gdbarch, sh_push_return_address);
2032
2033 set_gdbarch_store_struct_return (gdbarch, sh_store_struct_return);
2034 set_gdbarch_store_return_value (gdbarch, sh_store_return_value);
2035 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2036 set_gdbarch_use_struct_convention (gdbarch, sh_use_struct_convention);
2037 set_gdbarch_init_extra_frame_info (gdbarch, sh_init_extra_frame_info);
2038 set_gdbarch_pop_frame (gdbarch, sh_pop_frame);
2039 set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue);
2040 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2041 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2042 set_gdbarch_function_start_offset (gdbarch, 0);
2043 set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
2044
2045 set_gdbarch_fetch_pseudo_register (gdbarch, sh_fetch_pseudo_register);
2046 set_gdbarch_store_pseudo_register (gdbarch, sh_store_pseudo_register);
2047 set_gdbarch_frame_args_skip (gdbarch, 0);
2048 set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
2049 set_gdbarch_frame_chain (gdbarch, sh_frame_chain);
2050 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
2051 set_gdbarch_frame_saved_pc (gdbarch, sh_frame_saved_pc);
2052 set_gdbarch_frame_args_address (gdbarch, sh_frame_args_address);
2053 set_gdbarch_frame_locals_address (gdbarch, sh_frame_locals_address);
2054 set_gdbarch_saved_pc_after_call (gdbarch, sh_saved_pc_after_call);
2055 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2056 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2057 set_gdbarch_ieee_float (gdbarch, 1);
2058
2059 return gdbarch;
2060 }
2061
2062 void
2063 _initialize_sh_tdep ()
2064 {
2065 struct cmd_list_element *c;
2066
2067 register_gdbarch_init (bfd_arch_sh, sh_gdbarch_init);
2068 tm_print_insn = gdb_print_insn_sh;
2069
2070 add_com ("regs", class_vars, sh_show_regs_command, "Print all registers");
2071 }
GDB Binutils - Deliverables
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