1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 Contributed by Steve Chamberlain
36 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
37 #include "gdb_string.h"
39 /* A set of original names, to be used when restoring back to generic
40 registers from a specific set. */
42 static char *sh_generic_reg_names
[] = {
43 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
44 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
45 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
47 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
48 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
50 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
51 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
54 static char *sh_reg_names
[] = {
55 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
56 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
57 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
59 "", "", "", "", "", "", "", "",
60 "", "", "", "", "", "", "", "",
62 "", "", "", "", "", "", "", "",
63 "", "", "", "", "", "", "", "",
66 static char *sh3_reg_names
[] = {
67 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
68 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
69 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
71 "", "", "", "", "", "", "", "",
72 "", "", "", "", "", "", "", "",
74 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
75 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
78 static char *sh3e_reg_names
[] = {
79 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
80 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
81 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
83 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
84 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
86 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
87 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
90 static char *sh_dsp_reg_names
[] = {
91 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
92 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
93 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
95 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
96 "y0", "y1", "", "", "", "", "", "mod",
98 "rs", "re", "", "", "", "", "", "",
99 "", "", "", "", "", "", "", "",
102 static char *sh3_dsp_reg_names
[] = {
103 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
104 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
105 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
107 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
108 "y0", "y1", "", "", "", "", "", "mod",
110 "rs", "re", "", "", "", "", "", "",
111 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
116 char **sh_register_names
= sh3_reg_names
;
118 char **sh_register_names
= sh_generic_reg_names
;
126 sh_processor_type_table
[] =
129 sh_reg_names
, bfd_mach_sh
133 sh_reg_names
, bfd_mach_sh2
137 sh_dsp_reg_names
, bfd_mach_sh_dsp
141 sh3_reg_names
, bfd_mach_sh3
145 sh3_dsp_reg_names
, bfd_mach_sh3_dsp
149 sh3e_reg_names
, bfd_mach_sh3e
157 /* Prologue looks like
158 [mov.l <regs>,@-r15]...
164 #define IS_STS(x) ((x) == 0x4f22)
165 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
166 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
167 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
168 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
169 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
170 #define IS_SHLL_R3(x) ((x) == 0x4300)
171 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
172 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
173 #define FPSCR_SZ (1 << 20)
176 /* Should call_function allocate stack space for a struct return? */
178 sh_use_struct_convention (gcc_p
, type
)
182 return (TYPE_LENGTH (type
) > 1);
186 /* Skip any prologue before the guts of a function */
189 sh_skip_prologue (start_pc
)
194 w
= read_memory_integer (start_pc
, 2);
205 w
= read_memory_integer (start_pc
, 2);
211 /* Disassemble an instruction. */
214 gdb_print_insn_sh (memaddr
, info
)
216 disassemble_info
*info
;
218 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
219 return print_insn_sh (memaddr
, info
);
221 return print_insn_shl (memaddr
, info
);
224 /* Given a GDB frame, determine the address of the calling function's frame.
225 This will be used to create a new GDB frame struct, and then
226 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
228 For us, the frame address is its stack pointer value, so we look up
229 the function prologue to determine the caller's sp value, and return it. */
232 sh_frame_chain (frame
)
233 struct frame_info
*frame
;
235 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
236 return frame
->frame
; /* dummy frame same as caller's frame */
237 if (!inside_entry_file (frame
->pc
))
238 return read_memory_integer (FRAME_FP (frame
) + frame
->f_offset
, 4);
243 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
244 we might want to do here is to check REGNUM against the clobber mask, and
245 somehow flag it as invalid if it isn't saved on the stack somewhere. This
246 would provide a graceful failure mode when trying to get the value of
247 caller-saves registers for an inner frame. */
250 sh_find_callers_reg (fi
, regnum
)
251 struct frame_info
*fi
;
254 struct frame_saved_regs fsr
;
256 for (; fi
; fi
= fi
->next
)
257 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
258 /* When the caller requests PR from the dummy frame, we return PC because
259 that's where the previous routine appears to have done a call from. */
260 return generic_read_register_dummy (fi
->pc
, fi
->frame
, regnum
);
263 FRAME_FIND_SAVED_REGS (fi
, fsr
);
264 if (fsr
.regs
[regnum
] != 0)
265 return read_memory_integer (fsr
.regs
[regnum
],
266 REGISTER_RAW_SIZE (regnum
));
268 return read_register (regnum
);
271 /* Put here the code to store, into a struct frame_saved_regs, the
272 addresses of the saved registers of frame described by FRAME_INFO.
273 This includes special registers such as pc and fp saved in special
274 ways in the stack frame. sp is even more special: the address we
275 return for it IS the sp for the next frame. */
278 sh_frame_find_saved_regs (fi
, fsr
)
279 struct frame_info
*fi
;
280 struct frame_saved_regs
*fsr
;
290 char *dummy_regs
= generic_find_dummy_frame (fi
->pc
, fi
->frame
);
294 /* DANGER! This is ONLY going to work if the char buffer format of
295 the saved registers is byte-for-byte identical to the
296 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
297 memcpy (&fsr
->regs
, dummy_regs
, sizeof (fsr
));
301 opc
= pc
= get_pc_function_start (fi
->pc
);
303 insn
= read_memory_integer (pc
, 2);
305 fi
->leaf_function
= 1;
308 for (rn
= 0; rn
< NUM_REGS
; rn
++)
313 /* Loop around examining the prologue insns until we find something
314 that does not appear to be part of the prologue. But give up
315 after 20 of them, since we're getting silly then. */
317 while (pc
< opc
+ 20 * 2)
319 /* See where the registers will be saved to */
323 rn
= GET_PUSHED_REG (insn
);
325 insn
= read_memory_integer (pc
, 2);
328 else if (IS_STS (insn
))
331 where
[PR_REGNUM
] = depth
;
332 insn
= read_memory_integer (pc
, 2);
333 /* If we're storing the pr then this isn't a leaf */
334 fi
->leaf_function
= 0;
337 else if (IS_MOV_R3 (insn
))
339 r3_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
341 insn
= read_memory_integer (pc
, 2);
343 else if (IS_SHLL_R3 (insn
))
347 insn
= read_memory_integer (pc
, 2);
349 else if (IS_ADD_R3SP (insn
))
353 insn
= read_memory_integer (pc
, 2);
355 else if (IS_ADD_SP (insn
))
358 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
359 insn
= read_memory_integer (pc
, 2);
361 else if (IS_FMOV (insn
))
364 insn
= read_memory_integer (pc
, 2);
365 if (read_register (FPSCR_REGNUM
) & FPSCR_SZ
)
378 /* Now we know how deep things are, we can work out their addresses */
380 for (rn
= 0; rn
< NUM_REGS
; rn
++)
387 fsr
->regs
[rn
] = fi
->frame
- where
[rn
] + depth
- 4;
397 fsr
->regs
[SP_REGNUM
] = read_memory_integer (fsr
->regs
[FP_REGNUM
], 4);
401 fsr
->regs
[SP_REGNUM
] = fi
->frame
- 4;
404 fi
->f_offset
= depth
- where
[FP_REGNUM
] - 4;
405 /* Work out the return pc - either from the saved pr or the pr
409 /* initialize the extra info saved in a FRAME */
412 sh_init_extra_frame_info (fromleaf
, fi
)
414 struct frame_info
*fi
;
416 struct frame_saved_regs fsr
;
419 fi
->pc
= FRAME_SAVED_PC (fi
->next
);
421 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
423 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
424 by assuming it's always FP. */
425 fi
->frame
= generic_read_register_dummy (fi
->pc
, fi
->frame
,
427 fi
->return_pc
= generic_read_register_dummy (fi
->pc
, fi
->frame
,
429 fi
->f_offset
= -(CALL_DUMMY_LENGTH
+ 4);
430 fi
->leaf_function
= 0;
435 FRAME_FIND_SAVED_REGS (fi
, fsr
);
436 fi
->return_pc
= sh_find_callers_reg (fi
, PR_REGNUM
);
440 /* Discard from the stack the innermost frame,
441 restoring all saved registers. */
446 register struct frame_info
*frame
= get_current_frame ();
447 register CORE_ADDR fp
;
449 struct frame_saved_regs fsr
;
451 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
452 generic_pop_dummy_frame ();
455 fp
= FRAME_FP (frame
);
456 get_frame_saved_regs (frame
, &fsr
);
458 /* Copy regs from where they were saved in the frame */
459 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
460 if (fsr
.regs
[regnum
])
461 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
], 4));
463 write_register (PC_REGNUM
, frame
->return_pc
);
464 write_register (SP_REGNUM
, fp
+ 4);
466 flush_cached_frames ();
469 /* Function: push_arguments
470 Setup the function arguments for calling a function in the inferior.
472 On the Hitachi SH architecture, there are four registers (R4 to R7)
473 which are dedicated for passing function arguments. Up to the first
474 four arguments (depending on size) may go into these registers.
475 The rest go on the stack.
477 Arguments that are smaller than 4 bytes will still take up a whole
478 register or a whole 32-bit word on the stack, and will be
479 right-justified in the register or the stack word. This includes
480 chars, shorts, and small aggregate types.
482 Arguments that are larger than 4 bytes may be split between two or
483 more registers. If there are not enough registers free, an argument
484 may be passed partly in a register (or registers), and partly on the
485 stack. This includes doubles, long longs, and larger aggregates.
486 As far as I know, there is no upper limit to the size of aggregates
487 that will be passed in this way; in other words, the convention of
488 passing a pointer to a large aggregate instead of a copy is not used.
490 An exceptional case exists for struct arguments (and possibly other
491 aggregates such as arrays) if the size is larger than 4 bytes but
492 not a multiple of 4 bytes. In this case the argument is never split
493 between the registers and the stack, but instead is copied in its
494 entirety onto the stack, AND also copied into as many registers as
495 there is room for. In other words, space in registers permitting,
496 two copies of the same argument are passed in. As far as I can tell,
497 only the one on the stack is used, although that may be a function
498 of the level of compiler optimization. I suspect this is a compiler
499 bug. Arguments of these odd sizes are left-justified within the
500 word (as opposed to arguments smaller than 4 bytes, which are
504 If the function is to return an aggregate type such as a struct, it
505 is either returned in the normal return value register R0 (if its
506 size is no greater than one byte), or else the caller must allocate
507 space into which the callee will copy the return value (if the size
508 is greater than one byte). In this case, a pointer to the return
509 value location is passed into the callee in register R2, which does
510 not displace any of the other arguments passed in via registers R4
514 sh_push_arguments (nargs
, args
, sp
, struct_return
, struct_addr
)
518 unsigned char struct_return
;
519 CORE_ADDR struct_addr
;
521 int stack_offset
, stack_alloc
;
529 int odd_sized_struct
;
531 /* first force sp to a 4-byte alignment */
534 /* The "struct return pointer" pseudo-argument has its own dedicated
537 write_register (STRUCT_RETURN_REGNUM
, struct_addr
);
539 /* Now make sure there's space on the stack */
540 for (argnum
= 0, stack_alloc
= 0;
541 argnum
< nargs
; argnum
++)
542 stack_alloc
+= ((TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + 3) & ~3);
543 sp
-= stack_alloc
; /* make room on stack for args */
546 /* Now load as many as possible of the first arguments into
547 registers, and push the rest onto the stack. There are 16 bytes
548 in four registers available. Loop thru args from first to last. */
550 argreg
= ARG0_REGNUM
;
551 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
553 type
= VALUE_TYPE (args
[argnum
]);
554 len
= TYPE_LENGTH (type
);
555 memset (valbuf
, 0, sizeof (valbuf
));
557 { /* value gets right-justified in the register or stack word */
558 memcpy (valbuf
+ (4 - len
),
559 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
563 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
565 if (len
> 4 && (len
& 3) != 0)
566 odd_sized_struct
= 1; /* such structs go entirely on stack */
568 odd_sized_struct
= 0;
571 if (argreg
> ARGLAST_REGNUM
|| odd_sized_struct
)
572 { /* must go on the stack */
573 write_memory (sp
+ stack_offset
, val
, 4);
576 /* NOTE WELL!!!!! This is not an "else if" clause!!!
577 That's because some *&^%$ things get passed on the stack
578 AND in the registers! */
579 if (argreg
<= ARGLAST_REGNUM
)
580 { /* there's room in a register */
581 regval
= extract_address (val
, REGISTER_RAW_SIZE (argreg
));
582 write_register (argreg
++, regval
);
584 /* Store the value 4 bytes at a time. This means that things
585 larger than 4 bytes may go partly in registers and partly
587 len
-= REGISTER_RAW_SIZE (argreg
);
588 val
+= REGISTER_RAW_SIZE (argreg
);
594 /* Function: push_return_address (pc)
595 Set up the return address for the inferior function call.
596 Needed for targets where we don't actually execute a JSR/BSR instruction */
599 sh_push_return_address (pc
, sp
)
603 write_register (PR_REGNUM
, CALL_DUMMY_ADDRESS ());
607 /* Function: fix_call_dummy
608 Poke the callee function's address into the destination part of
609 the CALL_DUMMY. The address is actually stored in a data word
610 following the actualy CALL_DUMMY instructions, which will load
611 it into a register using PC-relative addressing. This function
612 expects the CALL_DUMMY to look like this:
623 sh_fix_call_dummy (dummy
, pc
, fun
, nargs
, args
, type
, gcc_p
)
632 *(unsigned long *) (dummy
+ 8) = fun
;
637 /* Modify the actual processor type. */
640 sh_target_architecture_hook (ap
)
641 const bfd_arch_info_type
*ap
;
645 if (ap
->arch
!= bfd_arch_sh
)
648 for (i
= 0; sh_processor_type_table
[i
].regnames
!= NULL
; i
++)
650 if (sh_processor_type_table
[i
].mach
== ap
->mach
)
652 sh_register_names
= sh_processor_type_table
[i
].regnames
;
657 internal_error ("Architecture `%s' unreconized", ap
->printable_name
);
660 /* Print the registers in a form similar to the E7000 */
663 sh_show_regs (args
, from_tty
)
668 if (TARGET_ARCHITECTURE
->arch
== bfd_arch_sh
)
669 cpu
= TARGET_ARCHITECTURE
->mach
;
673 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
674 paddr (read_register (PC_REGNUM
)),
675 (long) read_register (SR_REGNUM
),
676 (long) read_register (PR_REGNUM
),
677 (long) read_register (MACH_REGNUM
),
678 (long) read_register (MACL_REGNUM
));
680 printf_filtered ("GBR=%08lx VBR=%08lx",
681 (long) read_register (GBR_REGNUM
),
682 (long) read_register (VBR_REGNUM
));
683 if (cpu
== bfd_mach_sh3
|| cpu
== bfd_mach_sh3e
|| cpu
== bfd_mach_sh3_dsp
684 || cpu
== bfd_mach_sh4
)
686 printf_filtered (" SSR=%08lx SPC=%08lx",
687 (long) read_register (SSR_REGNUM
),
688 (long) read_register (SPC_REGNUM
));
689 if (cpu
== bfd_mach_sh3e
|| cpu
== bfd_mach_sh4
)
691 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
692 (long) read_register (FPUL_REGNUM
),
693 (long) read_register (FPSCR_REGNUM
));
696 if (cpu
== bfd_mach_sh_dsp
|| cpu
== bfd_mach_sh3_dsp
)
697 printf_filtered (" DSR=%08lx", (long) read_register (DSR_REGNUM
));
699 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
700 (long) read_register (0),
701 (long) read_register (1),
702 (long) read_register (2),
703 (long) read_register (3),
704 (long) read_register (4),
705 (long) read_register (5),
706 (long) read_register (6),
707 (long) read_register (7));
708 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
709 (long) read_register (8),
710 (long) read_register (9),
711 (long) read_register (10),
712 (long) read_register (11),
713 (long) read_register (12),
714 (long) read_register (13),
715 (long) read_register (14),
716 (long) read_register (15));
717 if (cpu
== bfd_mach_sh3e
|| cpu
== bfd_mach_sh4
)
719 int pr
= cpu
== bfd_mach_sh4
&& (read_register (FPSCR_REGNUM
) & 0x80000);
722 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
723 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
724 (long) read_register (FP0_REGNUM
+ 0),
725 (long) read_register (FP0_REGNUM
+ 1),
726 (long) read_register (FP0_REGNUM
+ 2),
727 (long) read_register (FP0_REGNUM
+ 3),
728 (long) read_register (FP0_REGNUM
+ 4),
729 (long) read_register (FP0_REGNUM
+ 5),
730 (long) read_register (FP0_REGNUM
+ 6),
731 (long) read_register (FP0_REGNUM
+ 7));
733 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
734 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
735 (long) read_register (FP0_REGNUM
+ 8),
736 (long) read_register (FP0_REGNUM
+ 9),
737 (long) read_register (FP0_REGNUM
+ 10),
738 (long) read_register (FP0_REGNUM
+ 11),
739 (long) read_register (FP0_REGNUM
+ 12),
740 (long) read_register (FP0_REGNUM
+ 13),
741 (long) read_register (FP0_REGNUM
+ 14),
742 (long) read_register (FP0_REGNUM
+ 15));
744 /* FIXME: sh4 has more registers */
745 if (cpu
== bfd_mach_sh_dsp
|| cpu
== bfd_mach_sh3_dsp
)
747 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
748 (long) read_register (A0G_REGNUM
) & 0xff,
749 (long) read_register (A0_REGNUM
),
750 (long) read_register (M0_REGNUM
),
751 (long) read_register (X0_REGNUM
),
752 (long) read_register (Y0_REGNUM
),
753 (long) read_register (RS_REGNUM
),
754 (long) read_register (MOD_REGNUM
));
755 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
756 (long) read_register (A1G_REGNUM
) & 0xff,
757 (long) read_register (A1_REGNUM
),
758 (long) read_register (M1_REGNUM
),
759 (long) read_register (X1_REGNUM
),
760 (long) read_register (Y1_REGNUM
),
761 (long) read_register (RE_REGNUM
));
765 /* Function: extract_return_value
766 Find a function's return value in the appropriate registers (in regbuf),
767 and copy it into valbuf. */
770 sh_extract_return_value (type
, regbuf
, valbuf
)
775 int len
= TYPE_LENGTH (type
);
778 memcpy (valbuf
, ((char *) regbuf
) + 4 - len
, len
);
780 memcpy (valbuf
, ((char *) regbuf
) + 8 - len
, len
);
782 error ("bad size for return value");
786 _initialize_sh_tdep ()
788 struct cmd_list_element
*c
;
790 tm_print_insn
= gdb_print_insn_sh
;
792 target_architecture_hook
= sh_target_architecture_hook
;
794 add_com ("regs", class_vars
, sh_show_regs
, "Print all registers");