1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21 Contributed by Steve Chamberlain
35 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
36 #include "gdb_string.h"
38 /* A set of original names, to be used when restoring back to generic
39 registers from a specific set. */
41 char *sh_generic_reg_names
[] = REGISTER_NAMES
;
43 char *sh_reg_names
[] = {
44 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
45 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
46 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
48 "", "", "", "", "", "", "", "",
49 "", "", "", "", "", "", "", "",
51 "", "", "", "", "", "", "", "",
52 "", "", "", "", "", "", "", "",
55 char *sh3_reg_names
[] = {
56 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
57 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
58 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
60 "", "", "", "", "", "", "", "",
61 "", "", "", "", "", "", "", "",
63 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
64 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
67 char *sh3e_reg_names
[] = {
68 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
69 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
70 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
72 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
73 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
75 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
76 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
82 } sh_processor_type_table
[] = {
83 { sh_reg_names
, bfd_mach_sh
},
84 { sh3_reg_names
, bfd_mach_sh3
},
85 { sh3e_reg_names
, bfd_mach_sh3e
},
86 { sh3e_reg_names
, bfd_mach_sh4
},
90 /* Prologue looks like
91 [mov.l <regs>,@-r15]...
97 #define IS_STS(x) ((x) == 0x4f22)
98 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
99 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
100 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
101 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
102 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
103 #define IS_SHLL_R3(x) ((x) == 0x4300)
104 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
105 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
106 #define FPSCR_SZ (1 << 20)
109 /* Should call_function allocate stack space for a struct return? */
111 sh_use_struct_convention (gcc_p
, type
)
115 return (TYPE_LENGTH (type
) > 1);
119 /* Skip any prologue before the guts of a function */
122 sh_skip_prologue (start_pc
)
127 w
= read_memory_integer (start_pc
, 2);
138 w
= read_memory_integer (start_pc
, 2);
144 /* Disassemble an instruction. */
147 gdb_print_insn_sh (memaddr
, info
)
149 disassemble_info
*info
;
151 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
152 return print_insn_sh (memaddr
, info
);
154 return print_insn_shl (memaddr
, info
);
157 /* Given a GDB frame, determine the address of the calling function's frame.
158 This will be used to create a new GDB frame struct, and then
159 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
161 For us, the frame address is its stack pointer value, so we look up
162 the function prologue to determine the caller's sp value, and return it. */
165 sh_frame_chain (frame
)
166 struct frame_info
*frame
;
168 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
169 return frame
->frame
; /* dummy frame same as caller's frame */
170 if (!inside_entry_file (frame
->pc
))
171 return read_memory_integer (FRAME_FP (frame
) + frame
->f_offset
, 4);
176 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
177 we might want to do here is to check REGNUM against the clobber mask, and
178 somehow flag it as invalid if it isn't saved on the stack somewhere. This
179 would provide a graceful failure mode when trying to get the value of
180 caller-saves registers for an inner frame. */
183 sh_find_callers_reg (fi
, regnum
)
184 struct frame_info
*fi
;
187 struct frame_saved_regs fsr
;
189 for (; fi
; fi
= fi
->next
)
190 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
191 /* When the caller requests PR from the dummy frame, we return PC because
192 that's where the previous routine appears to have done a call from. */
193 return generic_read_register_dummy (fi
->pc
, fi
->frame
, regnum
);
196 FRAME_FIND_SAVED_REGS(fi
, fsr
);
197 if (fsr
.regs
[regnum
] != 0)
198 return read_memory_integer (fsr
.regs
[regnum
],
199 REGISTER_RAW_SIZE(regnum
));
201 return read_register (regnum
);
204 /* Put here the code to store, into a struct frame_saved_regs, the
205 addresses of the saved registers of frame described by FRAME_INFO.
206 This includes special registers such as pc and fp saved in special
207 ways in the stack frame. sp is even more special: the address we
208 return for it IS the sp for the next frame. */
211 sh_frame_find_saved_regs (fi
, fsr
)
212 struct frame_info
*fi
;
213 struct frame_saved_regs
*fsr
;
223 char * dummy_regs
= generic_find_dummy_frame (fi
->pc
, fi
->frame
);
227 /* DANGER! This is ONLY going to work if the char buffer format of
228 the saved registers is byte-for-byte identical to the
229 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
230 memcpy (&fsr
->regs
, dummy_regs
, sizeof(fsr
));
234 opc
= pc
= get_pc_function_start (fi
->pc
);
236 insn
= read_memory_integer (pc
, 2);
238 fi
->leaf_function
= 1;
241 for (rn
= 0; rn
< NUM_REGS
; rn
++)
246 /* Loop around examining the prologue insns until we find something
247 that does not appear to be part of the prologue. But give up
248 after 20 of them, since we're getting silly then. */
250 while (pc
< opc
+ 20 * 2)
252 /* See where the registers will be saved to */
256 rn
= GET_PUSHED_REG (insn
);
258 insn
= read_memory_integer (pc
, 2);
261 else if (IS_STS (insn
))
264 where
[PR_REGNUM
] = depth
;
265 insn
= read_memory_integer (pc
, 2);
266 /* If we're storing the pr then this isn't a leaf */
267 fi
->leaf_function
= 0;
270 else if (IS_MOV_R3 (insn
))
272 r3_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
274 insn
= read_memory_integer (pc
, 2);
276 else if (IS_SHLL_R3 (insn
))
280 insn
= read_memory_integer (pc
, 2);
282 else if (IS_ADD_R3SP (insn
))
286 insn
= read_memory_integer (pc
, 2);
288 else if (IS_ADD_SP (insn
))
291 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
292 insn
= read_memory_integer (pc
, 2);
294 else if (IS_FMOV (insn
))
297 insn
= read_memory_integer (pc
, 2);
298 if (read_register (FPSCR_REGNUM
) & FPSCR_SZ
)
311 /* Now we know how deep things are, we can work out their addresses */
313 for (rn
= 0; rn
< NUM_REGS
; rn
++)
320 fsr
->regs
[rn
] = fi
->frame
- where
[rn
] + depth
- 4;
330 fsr
->regs
[SP_REGNUM
] = read_memory_integer (fsr
->regs
[FP_REGNUM
], 4);
334 fsr
->regs
[SP_REGNUM
] = fi
->frame
- 4;
337 fi
->f_offset
= depth
- where
[FP_REGNUM
] - 4;
338 /* Work out the return pc - either from the saved pr or the pr
342 /* initialize the extra info saved in a FRAME */
345 sh_init_extra_frame_info (fromleaf
, fi
)
347 struct frame_info
*fi
;
349 struct frame_saved_regs fsr
;
352 fi
->pc
= FRAME_SAVED_PC (fi
->next
);
354 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
356 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
357 by assuming it's always FP. */
358 fi
->frame
= generic_read_register_dummy (fi
->pc
, fi
->frame
,
360 fi
->return_pc
= generic_read_register_dummy (fi
->pc
, fi
->frame
,
362 fi
->f_offset
= -(CALL_DUMMY_LENGTH
+ 4);
363 fi
->leaf_function
= 0;
368 FRAME_FIND_SAVED_REGS (fi
, fsr
);
369 fi
->return_pc
= sh_find_callers_reg (fi
, PR_REGNUM
);
373 /* Discard from the stack the innermost frame,
374 restoring all saved registers. */
379 register struct frame_info
*frame
= get_current_frame ();
380 register CORE_ADDR fp
;
382 struct frame_saved_regs fsr
;
384 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
385 generic_pop_dummy_frame ();
388 fp
= FRAME_FP (frame
);
389 get_frame_saved_regs (frame
, &fsr
);
391 /* Copy regs from where they were saved in the frame */
392 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
393 if (fsr
.regs
[regnum
])
394 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
], 4));
396 write_register (PC_REGNUM
, frame
->return_pc
);
397 write_register (SP_REGNUM
, fp
+ 4);
399 flush_cached_frames ();
402 /* Function: push_arguments
403 Setup the function arguments for calling a function in the inferior.
405 On the Hitachi SH architecture, there are four registers (R4 to R7)
406 which are dedicated for passing function arguments. Up to the first
407 four arguments (depending on size) may go into these registers.
408 The rest go on the stack.
410 Arguments that are smaller than 4 bytes will still take up a whole
411 register or a whole 32-bit word on the stack, and will be
412 right-justified in the register or the stack word. This includes
413 chars, shorts, and small aggregate types.
415 Arguments that are larger than 4 bytes may be split between two or
416 more registers. If there are not enough registers free, an argument
417 may be passed partly in a register (or registers), and partly on the
418 stack. This includes doubles, long longs, and larger aggregates.
419 As far as I know, there is no upper limit to the size of aggregates
420 that will be passed in this way; in other words, the convention of
421 passing a pointer to a large aggregate instead of a copy is not used.
423 An exceptional case exists for struct arguments (and possibly other
424 aggregates such as arrays) if the size is larger than 4 bytes but
425 not a multiple of 4 bytes. In this case the argument is never split
426 between the registers and the stack, but instead is copied in its
427 entirety onto the stack, AND also copied into as many registers as
428 there is room for. In other words, space in registers permitting,
429 two copies of the same argument are passed in. As far as I can tell,
430 only the one on the stack is used, although that may be a function
431 of the level of compiler optimization. I suspect this is a compiler
432 bug. Arguments of these odd sizes are left-justified within the
433 word (as opposed to arguments smaller than 4 bytes, which are
437 If the function is to return an aggregate type such as a struct, it
438 is either returned in the normal return value register R0 (if its
439 size is no greater than one byte), or else the caller must allocate
440 space into which the callee will copy the return value (if the size
441 is greater than one byte). In this case, a pointer to the return
442 value location is passed into the callee in register R2, which does
443 not displace any of the other arguments passed in via registers R4
447 sh_push_arguments (nargs
, args
, sp
, struct_return
, struct_addr
)
451 unsigned char struct_return
;
452 CORE_ADDR struct_addr
;
454 int stack_offset
, stack_alloc
;
462 int odd_sized_struct
;
464 /* first force sp to a 4-byte alignment */
467 /* The "struct return pointer" pseudo-argument has its own dedicated
470 write_register (STRUCT_RETURN_REGNUM
, struct_addr
);
472 /* Now make sure there's space on the stack */
473 for (argnum
= 0, stack_alloc
= 0;
474 argnum
< nargs
; argnum
++)
475 stack_alloc
+= ((TYPE_LENGTH(VALUE_TYPE(args
[argnum
])) + 3) & ~3);
476 sp
-= stack_alloc
; /* make room on stack for args */
479 /* Now load as many as possible of the first arguments into
480 registers, and push the rest onto the stack. There are 16 bytes
481 in four registers available. Loop thru args from first to last. */
483 argreg
= ARG0_REGNUM
;
484 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
486 type
= VALUE_TYPE (args
[argnum
]);
487 len
= TYPE_LENGTH (type
);
488 memset(valbuf
, 0, sizeof(valbuf
));
490 { /* value gets right-justified in the register or stack word */
491 memcpy(valbuf
+ (4 - len
),
492 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
496 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
498 if (len
> 4 && (len
& 3) != 0)
499 odd_sized_struct
= 1; /* such structs go entirely on stack */
501 odd_sized_struct
= 0;
504 if (argreg
> ARGLAST_REGNUM
|| odd_sized_struct
)
505 { /* must go on the stack */
506 write_memory (sp
+ stack_offset
, val
, 4);
509 /* NOTE WELL!!!!! This is not an "else if" clause!!!
510 That's because some *&^%$ things get passed on the stack
511 AND in the registers! */
512 if (argreg
<= ARGLAST_REGNUM
)
513 { /* there's room in a register */
514 regval
= extract_address (val
, REGISTER_RAW_SIZE(argreg
));
515 write_register (argreg
++, regval
);
517 /* Store the value 4 bytes at a time. This means that things
518 larger than 4 bytes may go partly in registers and partly
520 len
-= REGISTER_RAW_SIZE(argreg
);
521 val
+= REGISTER_RAW_SIZE(argreg
);
527 /* Function: push_return_address (pc)
528 Set up the return address for the inferior function call.
529 Needed for targets where we don't actually execute a JSR/BSR instruction */
532 sh_push_return_address (pc
, sp
)
536 write_register (PR_REGNUM
, CALL_DUMMY_ADDRESS ());
540 /* Function: fix_call_dummy
541 Poke the callee function's address into the destination part of
542 the CALL_DUMMY. The address is actually stored in a data word
543 following the actualy CALL_DUMMY instructions, which will load
544 it into a register using PC-relative addressing. This function
545 expects the CALL_DUMMY to look like this:
556 sh_fix_call_dummy (dummy
, pc
, fun
, nargs
, args
, type
, gcc_p
)
565 *(unsigned long *) (dummy
+ 8) = fun
;
569 /* Function: get_saved_register
570 Just call the generic_get_saved_register function. */
573 get_saved_register (raw_buffer
, optimized
, addrp
, frame
, regnum
, lval
)
577 struct frame_info
*frame
;
579 enum lval_type
*lval
;
581 generic_get_saved_register (raw_buffer
, optimized
, addrp
,
582 frame
, regnum
, lval
);
586 /* Modify the actual processor type. */
589 sh_target_architecture_hook (ap
)
590 const bfd_arch_info_type
*ap
;
594 if (ap
->arch
!= bfd_arch_sh
)
597 for (i
= 0; sh_processor_type_table
[i
].regnames
!= NULL
; i
++)
599 if (sh_processor_type_table
[i
].mach
== ap
->mach
)
601 for (j
= 0; j
< NUM_REGS
; ++j
)
602 reg_names
[j
] = sh_processor_type_table
[i
].regnames
[j
];
607 fatal ("Architecture `%s' unreconized", ap
->printable_name
);
610 /* Print the registers in a form similar to the E7000 */
613 sh_show_regs (args
, from_tty
)
618 if (target_architecture
->arch
== bfd_arch_sh
)
619 cpu
= target_architecture
->mach
;
622 /* FIXME: sh4 has more registers */
623 if (cpu
== bfd_mach_sh4
)
626 printf_filtered ("PC=%08x SR=%08x PR=%08x MACH=%08x MACHL=%08x\n",
627 read_register (PC_REGNUM
),
628 read_register (SR_REGNUM
),
629 read_register (PR_REGNUM
),
630 read_register (MACH_REGNUM
),
631 read_register (MACL_REGNUM
));
633 printf_filtered ("GBR=%08x VBR=%08x",
634 read_register (GBR_REGNUM
),
635 read_register (VBR_REGNUM
));
636 if (cpu
== bfd_mach_sh3
|| cpu
== bfd_mach_sh3e
)
638 printf_filtered (" SSR=%08x SPC=%08x",
639 read_register (SSR_REGNUM
),
640 read_register (SPC_REGNUM
));
641 if (cpu
== bfd_mach_sh3e
)
643 printf_filtered (" FPUL=%08x FPSCR=%08x",
644 read_register (FPUL_REGNUM
),
645 read_register (FPSCR_REGNUM
));
649 printf_filtered ("\nR0-R7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
658 printf_filtered ("R8-R15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
667 if (cpu
== bfd_mach_sh3e
)
669 printf_filtered ("FP0-FP7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
670 read_register (FP0_REGNUM
+ 0),
671 read_register (FP0_REGNUM
+ 1),
672 read_register (FP0_REGNUM
+ 2),
673 read_register (FP0_REGNUM
+ 3),
674 read_register (FP0_REGNUM
+ 4),
675 read_register (FP0_REGNUM
+ 5),
676 read_register (FP0_REGNUM
+ 6),
677 read_register (FP0_REGNUM
+ 7));
678 printf_filtered ("FP8-FP15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
679 read_register (FP0_REGNUM
+ 8),
680 read_register (FP0_REGNUM
+ 9),
681 read_register (FP0_REGNUM
+ 10),
682 read_register (FP0_REGNUM
+ 11),
683 read_register (FP0_REGNUM
+ 12),
684 read_register (FP0_REGNUM
+ 13),
685 read_register (FP0_REGNUM
+ 14),
686 read_register (FP0_REGNUM
+ 15));
690 /* Function: extract_return_value
691 Find a function's return value in the appropriate registers (in regbuf),
692 and copy it into valbuf. */
695 sh_extract_return_value (type
, regbuf
, valbuf
)
700 int len
= TYPE_LENGTH(type
);
703 memcpy (valbuf
, ((char *) regbuf
) + 4 - len
, len
);
705 memcpy (valbuf
, ((char *) regbuf
) + 8 - len
, len
);
707 error ("bad size for return value");
711 _initialize_sh_tdep ()
713 struct cmd_list_element
*c
;
715 tm_print_insn
= gdb_print_insn_sh
;
717 target_architecture_hook
= sh_target_architecture_hook
;
719 add_com ("regs", class_vars
, sh_show_regs
, "Print all registers");