1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 Contributed by Steve Chamberlain
36 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
37 #include "gdb_string.h"
38 #include "arch-utils.h"
39 #include "floatformat.h"
47 #include "solib-svr4.h"
51 /* registers numbers shared with the simulator */
52 #include "gdb/sim-sh.h"
54 void (*sh_show_regs
) (void);
55 CORE_ADDR (*skip_prologue_hard_way
) (CORE_ADDR
);
56 void (*do_pseudo_register
) (int);
58 #define SH_DEFAULT_NUM_REGS 59
60 /* Define other aspects of the stack frame.
61 we keep a copy of the worked out return pc lying around, since it
62 is a useful bit of info */
64 struct frame_extra_info
72 sh_generic_register_name (int reg_nr
)
74 static char *register_names
[] =
76 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
77 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
78 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
80 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
81 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
83 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
84 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
88 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
90 return register_names
[reg_nr
];
94 sh_sh_register_name (int reg_nr
)
96 static char *register_names
[] =
98 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
99 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
100 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
102 "", "", "", "", "", "", "", "",
103 "", "", "", "", "", "", "", "",
105 "", "", "", "", "", "", "", "",
106 "", "", "", "", "", "", "", "",
110 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
112 return register_names
[reg_nr
];
116 sh_sh3_register_name (int reg_nr
)
118 static char *register_names
[] =
120 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
121 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
122 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
124 "", "", "", "", "", "", "", "",
125 "", "", "", "", "", "", "", "",
127 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
128 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
132 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
134 return register_names
[reg_nr
];
138 sh_sh3e_register_name (int reg_nr
)
140 static char *register_names
[] =
142 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
143 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
144 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
146 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
147 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
149 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
150 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
154 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
156 return register_names
[reg_nr
];
160 sh_sh_dsp_register_name (int reg_nr
)
162 static char *register_names
[] =
164 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
165 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
166 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
168 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
169 "y0", "y1", "", "", "", "", "", "mod",
171 "rs", "re", "", "", "", "", "", "",
172 "", "", "", "", "", "", "", "",
176 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
178 return register_names
[reg_nr
];
182 sh_sh3_dsp_register_name (int reg_nr
)
184 static char *register_names
[] =
186 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
187 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
188 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
190 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
191 "y0", "y1", "", "", "", "", "", "mod",
193 "rs", "re", "", "", "", "", "", "",
194 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
195 "", "", "", "", "", "", "", "",
199 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
201 return register_names
[reg_nr
];
205 sh_sh4_register_name (int reg_nr
)
207 static char *register_names
[] =
209 /* general registers 0-15 */
210 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
211 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
213 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
216 /* floating point registers 25 - 40 */
217 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
218 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
222 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
224 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
225 /* double precision (pseudo) 59 - 66 */
226 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
227 /* vectors (pseudo) 67 - 70 */
228 "fv0", "fv4", "fv8", "fv12",
229 /* FIXME: missing XF 71 - 86 */
230 /* FIXME: missing XD 87 - 94 */
234 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
236 return register_names
[reg_nr
];
240 sh_sh64_register_name (int reg_nr
)
242 static char *register_names
[] =
244 /* SH MEDIA MODE (ISA 32) */
245 /* general registers (64-bit) 0-63 */
246 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
247 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
248 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
249 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
250 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
251 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
252 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
253 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
258 /* status reg., saved status reg., saved pc reg. (64-bit) 65-67 */
261 /* target registers (64-bit) 68-75*/
262 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
264 /* floating point state control register (32-bit) 76 */
267 /* single precision floating point registers (32-bit) 77-140*/
268 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
269 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
270 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
271 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31",
272 "fr32", "fr33", "fr34", "fr35", "fr36", "fr37", "fr38", "fr39",
273 "fr40", "fr41", "fr42", "fr43", "fr44", "fr45", "fr46", "fr47",
274 "fr48", "fr49", "fr50", "fr51", "fr52", "fr53", "fr54", "fr55",
275 "fr56", "fr57", "fr58", "fr59", "fr60", "fr61", "fr62", "fr63",
277 /* double precision registers (pseudo) 141-172 */
278 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
279 "dr16", "dr18", "dr20", "dr22", "dr24", "dr26", "dr28", "dr30",
280 "dr32", "dr34", "dr36", "dr38", "dr40", "dr42", "dr44", "dr46",
281 "dr48", "dr50", "dr52", "dr54", "dr56", "dr58", "dr60", "dr62",
283 /* floating point pairs (pseudo) 173-204*/
284 "fp0", "fp2", "fp4", "fp6", "fp8", "fp10", "fp12", "fp14",
285 "fp16", "fp18", "fp20", "fp22", "fp24", "fp26", "fp28", "fp30",
286 "fp32", "fp34", "fp36", "fp38", "fp40", "fp42", "fp44", "fp46",
287 "fp48", "fp50", "fp52", "fp54", "fp56", "fp58", "fp60", "fp62",
289 /* floating point vectors (4 floating point regs) (pseudo) 205-220*/
290 "fv0", "fv4", "fv8", "fv12", "fv16", "fv20", "fv24", "fv28",
291 "fv32", "fv36", "fv40", "fv44", "fv48", "fv52", "fv56", "fv60",
293 /* SH COMPACT MODE (ISA 16) (all pseudo) 221-272*/
294 "r0_c", "r1_c", "r2_c", "r3_c", "r4_c", "r5_c", "r6_c", "r7_c",
295 "r8_c", "r9_c", "r10_c", "r11_c", "r12_c", "r13_c", "r14_c", "r15_c",
297 "gbr_c", "mach_c", "macl_c", "pr_c", "t_c",
299 "fr0_c", "fr1_c", "fr2_c", "fr3_c", "fr4_c", "fr5_c", "fr6_c", "fr7_c",
300 "fr8_c", "fr9_c", "fr10_c", "fr11_c", "fr12_c", "fr13_c", "fr14_c", "fr15_c",
301 "dr0_c", "dr2_c", "dr4_c", "dr6_c", "dr8_c", "dr10_c", "dr12_c", "dr14_c",
302 "fv0_c", "fv4_c", "fv8_c", "fv12_c",
303 /* FIXME!!!! XF0 XF15, XD0 XD14 ?????*/
308 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
310 return register_names
[reg_nr
];
313 #define NUM_PSEUDO_REGS_SH_MEDIA 80
314 #define NUM_PSEUDO_REGS_SH_COMPACT 51
316 static const unsigned char *
317 sh_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
319 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
320 static unsigned char breakpoint
[] = {0xc3, 0xc3};
322 *lenptr
= sizeof (breakpoint
);
326 /* Macros and functions for setting and testing a bit in a minimal
327 symbol that marks it as 32-bit function. The MSB of the minimal
328 symbol's "info" field is used for this purpose. This field is
329 already being used to store the symbol size, so the assumption is
330 that the symbol size cannot exceed 2^31.
332 ELF_MAKE_MSYMBOL_SPECIAL
333 tests whether an ELF symbol is "special", i.e. refers
334 to a 32-bit function, and sets a "special" bit in a
335 minimal symbol to mark it as a 32-bit function
336 MSYMBOL_IS_SPECIAL tests the "special" bit in a minimal symbol
337 MSYMBOL_SIZE returns the size of the minimal symbol, i.e.
338 the "info" field with the "special" bit masked out */
340 #define MSYMBOL_IS_SPECIAL(msym) \
341 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
344 sh64_elf_make_msymbol_special (asymbol
*sym
, struct minimal_symbol
*msym
)
349 if (((elf_symbol_type
*)(sym
))->internal_elf_sym
.st_other
== STO_SH5_ISA32
)
351 MSYMBOL_INFO (msym
) = (char *) (((long) MSYMBOL_INFO (msym
)) | 0x80000000);
352 SYMBOL_VALUE_ADDRESS (msym
) |= 1;
356 /* ISA32 (shmedia) function addresses are odd (bit 0 is set). Here
357 are some macros to test, set, or clear bit 0 of addresses. */
358 #define IS_ISA32_ADDR(addr) ((addr) & 1)
359 #define MAKE_ISA32_ADDR(addr) ((addr) | 1)
360 #define UNMAKE_ISA32_ADDR(addr) ((addr) & ~1)
363 pc_is_isa32 (bfd_vma memaddr
)
365 struct minimal_symbol
*sym
;
367 /* If bit 0 of the address is set, assume this is a
368 ISA32 (shmedia) address. */
369 if (IS_ISA32_ADDR (memaddr
))
372 /* A flag indicating that this is a ISA32 function is stored by elfread.c in
373 the high bit of the info field. Use this to decide if the function is
375 sym
= lookup_minimal_symbol_by_pc (memaddr
);
377 return MSYMBOL_IS_SPECIAL (sym
);
382 static const unsigned char *
383 sh_sh64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
385 /* The BRK instruction for shmedia is
386 01101111 11110101 11111111 11110000
387 which translates in big endian mode to 0x6f, 0xf5, 0xff, 0xf0
388 and in little endian mode to 0xf0, 0xff, 0xf5, 0x6f */
390 /* The BRK instruction for shcompact is
392 which translates in big endian mode to 0x0, 0x3b
393 and in little endian mode to 0x3b, 0x0*/
395 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
397 if (pc_is_isa32 (*pcptr
))
399 static unsigned char big_breakpoint_media
[] = {0x6f, 0xf5, 0xff, 0xf0};
400 *pcptr
= UNMAKE_ISA32_ADDR (*pcptr
);
401 *lenptr
= sizeof (big_breakpoint_media
);
402 return big_breakpoint_media
;
406 static unsigned char big_breakpoint_compact
[] = {0x0, 0x3b};
407 *lenptr
= sizeof (big_breakpoint_compact
);
408 return big_breakpoint_compact
;
413 if (pc_is_isa32 (*pcptr
))
415 static unsigned char little_breakpoint_media
[] = {0xf0, 0xff, 0xf5, 0x6f};
416 *pcptr
= UNMAKE_ISA32_ADDR (*pcptr
);
417 *lenptr
= sizeof (little_breakpoint_media
);
418 return little_breakpoint_media
;
422 static unsigned char little_breakpoint_compact
[] = {0x3b, 0x0};
423 *lenptr
= sizeof (little_breakpoint_compact
);
424 return little_breakpoint_compact
;
429 /* Prologue looks like
430 [mov.l <regs>,@-r15]...
435 Actually it can be more complicated than this. For instance, with
453 /* PTABS/L Rn, TRa 0110101111110001nnnnnnl00aaa0000
454 with l=1 and n = 18 0110101111110001010010100aaa0000 */
455 #define IS_PTABSL_R18(x) (((x) & 0xffffff8f) == 0x6bf14a00)
457 /* STS.L PR,@-r0 0100000000100010
458 r0-4-->r0, PR-->(r0) */
459 #define IS_STS_R0(x) ((x) == 0x4022)
461 /* STS PR, Rm 0000mmmm00101010
463 #define IS_STS_PR(x) (((x) & 0xf0ff) == 0x2a)
465 /* MOV.L Rm,@(disp,r15) 00011111mmmmdddd
467 #define IS_MOV_TO_R15(x) (((x) & 0xff00) == 0x1f00)
469 /* MOV.L R14,@(disp,r15) 000111111110dddd
470 R14-->(dispx4+r15) */
471 #define IS_MOV_R14(x) (((x) & 0xfff0) == 0x1fe0)
473 /* ST.Q R14, disp, R18 101011001110dddddddddd0100100000
474 R18-->(dispx8+R14) */
475 #define IS_STQ_R18_R14(x) (((x) & 0xfff003ff) == 0xace00120)
477 /* ST.Q R15, disp, R18 101011001111dddddddddd0100100000
478 R18-->(dispx8+R15) */
479 #define IS_STQ_R18_R15(x) (((x) & 0xfff003ff) == 0xacf00120)
481 /* ST.L R15, disp, R18 101010001111dddddddddd0100100000
482 R18-->(dispx4+R15) */
483 #define IS_STL_R18_R15(x) (((x) & 0xfff003ff) == 0xa8f00120)
485 /* ST.Q R15, disp, R14 1010 1100 1111 dddd dddd dd00 1110 0000
486 R14-->(dispx8+R15) */
487 #define IS_STQ_R14_R15(x) (((x) & 0xfff003ff) == 0xacf000e0)
489 /* ST.L R15, disp, R14 1010 1000 1111 dddd dddd dd00 1110 0000
490 R14-->(dispx4+R15) */
491 #define IS_STL_R14_R15(x) (((x) & 0xfff003ff) == 0xa8f000e0)
493 /* ADDI.L R15,imm,R15 1101 0100 1111 ssss ssss ss00 1111 0000
495 #define IS_ADDIL_SP_MEDIA(x) (((x) & 0xfff003ff) == 0xd4f000f0)
497 /* ADDI R15,imm,R15 1101 0000 1111 ssss ssss ss00 1111 0000
499 #define IS_ADDI_SP_MEDIA(x) (((x) & 0xfff003ff) == 0xd0f000f0)
501 /* ADD.L R15,R63,R14 0000 0000 1111 1000 1111 1100 1110 0000
503 #define IS_ADDL_SP_FP_MEDIA(x) ((x) == 0x00f8fce0)
505 /* ADD R15,R63,R14 0000 0000 1111 1001 1111 1100 1110 0000
507 #define IS_ADD_SP_FP_MEDIA(x) ((x) == 0x00f9fce0)
509 #define IS_MOV_SP_FP_MEDIA(x) (IS_ADDL_SP_FP_MEDIA(x) || IS_ADD_SP_FP_MEDIA(x))
511 /* MOV #imm, R0 1110 0000 ssss ssss
513 #define IS_MOV_R0(x) (((x) & 0xff00) == 0xe000)
515 /* MOV.L @(disp,PC), R0 1101 0000 iiii iiii */
516 #define IS_MOVL_R0(x) (((x) & 0xff00) == 0xd000)
518 /* ADD r15,r0 0011 0000 1111 1100
520 #define IS_ADD_SP_R0(x) ((x) == 0x30fc)
522 /* MOV.L R14 @-R0 0010 0000 1110 0110
523 R14-->(R0-4), R0-4-->R0 */
524 #define IS_MOV_R14_R0(x) ((x) == 0x20e6)
526 /* ADD Rm,R63,Rn Rm+R63-->Rn 0000 00mm mmmm 1001 1111 11nn nnnn 0000
527 where Rm is one of r2-r9 which are the argument registers. */
528 /* FIXME: Recognize the float and double register moves too! */
529 #define IS_MEDIA_IND_ARG_MOV(x) \
530 ((((x) & 0xfc0ffc0f) == 0x0009fc00) && (((x) & 0x03f00000) >= 0x00200000 && ((x) & 0x03f00000) <= 0x00900000))
532 /* ST.Q Rn,0,Rm Rm-->Rn+0 1010 11nn nnnn 0000 0000 00mm mmmm 0000
533 or ST.L Rn,0,Rm Rm-->Rn+0 1010 10nn nnnn 0000 0000 00mm mmmm 0000
534 where Rm is one of r2-r9 which are the argument registers. */
535 #define IS_MEDIA_ARG_MOV(x) \
536 (((((x) & 0xfc0ffc0f) == 0xac000000) || (((x) & 0xfc0ffc0f) == 0xa8000000)) \
537 && (((x) & 0x000003f0) >= 0x00000020 && ((x) & 0x000003f0) <= 0x00000090))
539 /* ST.B R14,0,Rn Rn-->(R14+0) 1010 0000 1110 0000 0000 00nn nnnn 0000*/
540 /* ST.W R14,0,Rn Rn-->(R14+0) 1010 0100 1110 0000 0000 00nn nnnn 0000*/
541 /* ST.L R14,0,Rn Rn-->(R14+0) 1010 1000 1110 0000 0000 00nn nnnn 0000*/
542 /* FST.S R14,0,FRn Rn-->(R14+0) 1011 0100 1110 0000 0000 00nn nnnn 0000*/
543 /* FST.D R14,0,DRn Rn-->(R14+0) 1011 1100 1110 0000 0000 00nn nnnn 0000*/
544 #define IS_MEDIA_MOV_TO_R14(x) \
545 ((((x) & 0xfffffc0f) == 0xa0e00000) \
546 || (((x) & 0xfffffc0f) == 0xa4e00000) \
547 || (((x) & 0xfffffc0f) == 0xa8e00000) \
548 || (((x) & 0xfffffc0f) == 0xb4e00000) \
549 || (((x) & 0xfffffc0f) == 0xbce00000))
551 /* MOV Rm, Rn Rm-->Rn 0110 nnnn mmmm 0011
553 #define IS_COMPACT_IND_ARG_MOV(x) \
554 ((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0020) && (((x) & 0x00f0) <= 0x0090))
556 /* compact direct arg move!
557 MOV.L Rn, @r14 0010 1110 mmmm 0010 */
558 #define IS_COMPACT_ARG_MOV(x) \
559 (((((x) & 0xff0f) == 0x2e02) && (((x) & 0x00f0) >= 0x0020) && ((x) & 0x00f0) <= 0x0090))
561 /* MOV.B Rm, @R14 0010 1110 mmmm 0000
562 MOV.W Rm, @R14 0010 1110 mmmm 0001 */
563 #define IS_COMPACT_MOV_TO_R14(x) \
564 ((((x) & 0xff0f) == 0x2e00) || (((x) & 0xff0f) == 0x2e01))
566 #define IS_JSR_R0(x) ((x) == 0x400b)
567 #define IS_NOP(x) ((x) == 0x0009)
570 /* STS.L PR,@-r15 0100111100100010
571 r15-4-->r15, PR-->(r15) */
572 #define IS_STS(x) ((x) == 0x4f22)
574 /* MOV.L Rm,@-r15 00101111mmmm0110
575 r15-4-->r15, Rm-->(R15) */
576 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
578 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
580 /* MOV r15,r14 0110111011110011
582 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
584 /* ADD #imm,r15 01111111iiiiiiii
586 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
588 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
589 #define IS_SHLL_R3(x) ((x) == 0x4300)
591 /* ADD r3,r15 0011111100111100
593 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
595 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
596 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
597 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
598 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
600 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
601 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
602 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
603 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
604 #define IS_ARG_MOV(x) \
605 (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
606 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
607 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
609 /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
610 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
611 #define IS_MOV_TO_R14(x) \
612 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
614 #define FPSCR_SZ (1 << 20)
616 /* Skip any prologue before the guts of a function */
618 /* Skip the prologue using the debug information. If this fails we'll
619 fall back on the 'guess' method below. */
621 after_prologue (CORE_ADDR pc
)
623 struct symtab_and_line sal
;
624 CORE_ADDR func_addr
, func_end
;
626 /* If we can not find the symbol in the partial symbol table, then
627 there is no hope we can determine the function's start address
629 if (!find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
632 /* Get the line associated with FUNC_ADDR. */
633 sal
= find_pc_line (func_addr
, 0);
635 /* There are only two cases to consider. First, the end of the source line
636 is within the function bounds. In that case we return the end of the
637 source line. Second is the end of the source line extends beyond the
638 bounds of the current function. We need to use the slow code to
639 examine instructions in that case. */
640 if (sal
.end
< func_end
)
646 /* Here we look at each instruction in the function, and try to guess
647 where the prologue ends. Unfortunately this is not always
650 sh_skip_prologue_hard_way (CORE_ADDR start_pc
)
658 for (here
= start_pc
, end
= start_pc
+ (2 * 28); here
< end
;)
660 int w
= read_memory_integer (here
, 2);
662 if (IS_FMOV (w
) || IS_PUSH (w
) || IS_STS (w
) || IS_MOV_R3 (w
)
663 || IS_ADD_R3SP (w
) || IS_ADD_SP (w
) || IS_SHLL_R3 (w
)
664 || IS_ARG_MOV (w
) || IS_MOV_TO_R14 (w
))
668 else if (IS_MOV_SP_FP (w
))
674 /* Don't bail out yet, if we are before the copy of sp. */
683 look_for_args_moves (CORE_ADDR start_pc
, int media_mode
)
687 int insn_size
= (media_mode
? 4 : 2);
689 for (here
= start_pc
, end
= start_pc
+ (insn_size
* 28); here
< end
;)
693 w
= read_memory_integer (UNMAKE_ISA32_ADDR (here
), insn_size
);
695 if (IS_MEDIA_IND_ARG_MOV (w
))
697 /* This must be followed by a store to r14, so the argument
698 is where the debug info says it is. This can happen after
699 the SP has been saved, unfortunately. */
701 int next_insn
= read_memory_integer (UNMAKE_ISA32_ADDR (here
),
704 if (IS_MEDIA_MOV_TO_R14 (next_insn
))
707 else if (IS_MEDIA_ARG_MOV (w
))
709 /* These instructions store directly the argument in r14. */
717 w
= read_memory_integer (here
, insn_size
);
720 if (IS_COMPACT_IND_ARG_MOV (w
))
722 /* This must be followed by a store to r14, so the argument
723 is where the debug info says it is. This can happen after
724 the SP has been saved, unfortunately. */
726 int next_insn
= 0xffff & read_memory_integer (here
, insn_size
);
728 if (IS_COMPACT_MOV_TO_R14 (next_insn
))
731 else if (IS_COMPACT_ARG_MOV (w
))
733 /* These instructions store directly the argument in r14. */
736 else if (IS_MOVL_R0 (w
))
738 /* There is a function that gcc calls to get the arguments
739 passed correctly to the function. Only after this
740 function call the arguments will be found at the place
741 where they are supposed to be. This happens in case the
742 argument has to be stored into a 64-bit register (for
743 instance doubles, long longs). SHcompact doesn't have
744 access to the full 64-bits, so we store the register in
745 stack slot and store the address of the stack slot in
746 the register, then do a call through a wrapper that
747 loads the memory value into the register. A SHcompact
748 callee calls an argument decoder
749 (GCC_shcompact_incoming_args) that stores the 64-bit
750 value in a stack slot and stores the address of the
751 stack slot in the register. GCC thinks the argument is
752 just passed by transparent reference, but this is only
753 true after the argument decoder is called. Such a call
754 needs to be considered part of the prologue. */
756 /* This must be followed by a JSR @r0 instruction and by
757 a NOP instruction. After these, the prologue is over! */
759 int next_insn
= 0xffff & read_memory_integer (here
, insn_size
);
761 if (IS_JSR_R0 (next_insn
))
763 next_insn
= 0xffff & read_memory_integer (here
, insn_size
);
766 if (IS_NOP (next_insn
))
779 sh64_skip_prologue_hard_way (CORE_ADDR start_pc
)
789 if (pc_is_isa32 (start_pc
) == 0)
795 for (here
= start_pc
, end
= start_pc
+ (insn_size
* 28); here
< end
;)
800 int w
= read_memory_integer (UNMAKE_ISA32_ADDR (here
), insn_size
);
802 if (IS_STQ_R18_R14 (w
) || IS_STQ_R18_R15 (w
) || IS_STQ_R14_R15 (w
)
803 || IS_STL_R14_R15 (w
) || IS_STL_R18_R15 (w
)
804 || IS_ADDIL_SP_MEDIA (w
) || IS_ADDI_SP_MEDIA (w
) || IS_PTABSL_R18 (w
))
808 else if (IS_MOV_SP_FP (w
) || IS_MOV_SP_FP_MEDIA(w
))
816 /* Don't bail out yet, we may have arguments stored in
817 registers here, according to the debug info, so that
818 gdb can print the frames correctly. */
819 start_pc
= look_for_args_moves (here
- insn_size
, media_mode
);
825 int w
= 0xffff & read_memory_integer (here
, insn_size
);
828 if (IS_STS_R0 (w
) || IS_STS_PR (w
)
829 || IS_MOV_TO_R15 (w
) || IS_MOV_R14 (w
)
830 || IS_MOV_R0 (w
) || IS_ADD_SP_R0 (w
) || IS_MOV_R14_R0 (w
))
834 else if (IS_MOV_SP_FP (w
))
842 /* Don't bail out yet, we may have arguments stored in
843 registers here, according to the debug info, so that
844 gdb can print the frames correctly. */
845 start_pc
= look_for_args_moves (here
- insn_size
, media_mode
);
855 sh_skip_prologue (CORE_ADDR pc
)
857 CORE_ADDR post_prologue_pc
;
859 /* See if we can determine the end of the prologue via the symbol table.
860 If so, then return either PC, or the PC after the prologue, whichever
862 post_prologue_pc
= after_prologue (pc
);
864 /* If after_prologue returned a useful address, then use it. Else
865 fall back on the instruction skipping code. */
866 if (post_prologue_pc
!= 0)
867 return max (pc
, post_prologue_pc
);
869 return (skip_prologue_hard_way (pc
));
872 /* Immediately after a function call, return the saved pc.
873 Can't always go through the frames for this because on some machines
874 the new frame is not set up until the new function executes
877 The return address is the value saved in the PR register + 4 */
879 sh_saved_pc_after_call (struct frame_info
*frame
)
881 return (ADDR_BITS_REMOVE (read_register (gdbarch_tdep (current_gdbarch
)->PR_REGNUM
)));
884 /* Should call_function allocate stack space for a struct return? */
886 sh_use_struct_convention (int gcc_p
, struct type
*type
)
889 return (TYPE_LENGTH (type
) > 1);
891 int len
= TYPE_LENGTH (type
);
892 int nelem
= TYPE_NFIELDS (type
);
893 return ((len
!= 1 && len
!= 2 && len
!= 4 && len
!= 8) || nelem
!= 1) &&
894 (len
!= 8 || TYPE_LENGTH (TYPE_FIELD_TYPE (type
, 0)) != 4);
899 sh64_use_struct_convention (int gcc_p
, struct type
*type
)
901 return (TYPE_LENGTH (type
) > 8);
904 /* Store the address of the place in which to copy the structure the
905 subroutine will return. This is called from call_function.
907 We store structs through a pointer passed in R2 */
909 sh_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
911 write_register (STRUCT_RETURN_REGNUM
, (addr
));
914 /* Disassemble an instruction. */
916 gdb_print_insn_sh (bfd_vma memaddr
, disassemble_info
*info
)
918 info
->endian
= TARGET_BYTE_ORDER
;
919 return print_insn_sh (memaddr
, info
);
922 /* Given a GDB frame, determine the address of the calling function's
923 frame. This will be used to create a new GDB frame struct, and
924 then INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC will be
925 called for the new frame.
927 For us, the frame address is its stack pointer value, so we look up
928 the function prologue to determine the caller's sp value, and return it. */
930 sh_frame_chain (struct frame_info
*frame
)
932 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
), frame
->frame
, frame
->frame
))
933 return frame
->frame
; /* dummy frame same as caller's frame */
934 if (get_frame_pc (frame
) && !inside_entry_file (get_frame_pc (frame
)))
935 return read_memory_integer (get_frame_base (frame
) + frame
->extra_info
->f_offset
, 4);
940 /* Given a register number RN as it appears in an assembly
941 instruction, find the corresponding register number in the GDB
944 translate_insn_rn (int rn
, int media_mode
)
946 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
948 /* FIXME: this assumes that the number rn is for a not pseudo
954 /* These registers don't have a corresponding compact one. */
955 /* FIXME: This is probably not enough. */
957 if ((rn
>= 16 && rn
<= 63) || (rn
>= 93 && rn
<= 140))
960 if (rn
>= 0 && rn
<= tdep
->R0_C_REGNUM
)
961 return tdep
->R0_C_REGNUM
+ rn
;
968 sh64_frame_chain (struct frame_info
*frame
)
970 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
), frame
->frame
, frame
->frame
))
971 return frame
->frame
; /* dummy frame same as caller's frame */
972 if (get_frame_pc (frame
) && !inside_entry_file (get_frame_pc (frame
)))
974 int media_mode
= pc_is_isa32 (get_frame_pc (frame
));
976 if (gdbarch_tdep (current_gdbarch
)->sh_abi
== SH_ABI_32
)
979 size
= REGISTER_RAW_SIZE (translate_insn_rn (FP_REGNUM
, media_mode
));
980 return read_memory_integer (get_frame_base (frame
) + frame
->extra_info
->f_offset
, size
);
986 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
987 we might want to do here is to check REGNUM against the clobber mask, and
988 somehow flag it as invalid if it isn't saved on the stack somewhere. This
989 would provide a graceful failure mode when trying to get the value of
990 caller-saves registers for an inner frame. */
992 sh_find_callers_reg (struct frame_info
*fi
, int regnum
)
994 for (; fi
; fi
= fi
->next
)
995 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), fi
->frame
, fi
->frame
))
996 /* When the caller requests PR from the dummy frame, we return PC because
997 that's where the previous routine appears to have done a call from. */
998 return deprecated_read_register_dummy (get_frame_pc (fi
), fi
->frame
, regnum
);
1001 FRAME_INIT_SAVED_REGS (fi
);
1002 if (!get_frame_pc (fi
))
1004 if (get_frame_saved_regs (fi
)[regnum
] != 0)
1005 return read_memory_integer (get_frame_saved_regs (fi
)[regnum
],
1006 REGISTER_RAW_SIZE (regnum
));
1008 return read_register (regnum
);
1012 sh64_get_saved_pr (struct frame_info
*fi
, int pr_regnum
)
1016 for (; fi
; fi
= fi
->next
)
1017 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), fi
->frame
, fi
->frame
))
1018 /* When the caller requests PR from the dummy frame, we return PC because
1019 that's where the previous routine appears to have done a call from. */
1020 return deprecated_read_register_dummy (get_frame_pc (fi
), fi
->frame
, pr_regnum
);
1023 FRAME_INIT_SAVED_REGS (fi
);
1024 if (!get_frame_pc (fi
))
1027 media_mode
= pc_is_isa32 (get_frame_pc (fi
));
1029 if (get_frame_saved_regs (fi
)[pr_regnum
] != 0)
1031 int gdb_reg_num
= translate_insn_rn (pr_regnum
, media_mode
);
1032 int size
= ((gdbarch_tdep (current_gdbarch
)->sh_abi
== SH_ABI_32
)
1034 : REGISTER_RAW_SIZE (gdb_reg_num
));
1035 return read_memory_integer (get_frame_saved_regs (fi
)[pr_regnum
], size
);
1038 return read_register (pr_regnum
);
1041 /* Put here the code to store, into a struct frame_saved_regs, the
1042 addresses of the saved registers of frame described by FRAME_INFO.
1043 This includes special registers such as pc and fp saved in special
1044 ways in the stack frame. sp is even more special: the address we
1045 return for it IS the sp for the next frame. */
1047 sh_nofp_frame_init_saved_regs (struct frame_info
*fi
)
1049 int *where
= (int *) alloca ((NUM_REGS
+ NUM_PSEUDO_REGS
) * sizeof(int));
1057 char *dummy_regs
= deprecated_generic_find_dummy_frame (get_frame_pc (fi
), fi
->frame
);
1059 if (get_frame_saved_regs (fi
) == NULL
)
1060 frame_saved_regs_zalloc (fi
);
1062 memset (get_frame_saved_regs (fi
), 0, SIZEOF_FRAME_SAVED_REGS
);
1066 /* DANGER! This is ONLY going to work if the char buffer format of
1067 the saved registers is byte-for-byte identical to the
1068 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
1069 memcpy (fi
->saved_regs
, dummy_regs
, sizeof (fi
->saved_regs
));
1073 fi
->extra_info
->leaf_function
= 1;
1074 fi
->extra_info
->f_offset
= 0;
1076 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
1081 /* Loop around examining the prologue insns until we find something
1082 that does not appear to be part of the prologue. But give up
1083 after 20 of them, since we're getting silly then. */
1085 pc
= get_pc_function_start (get_frame_pc (fi
));
1088 deprecated_update_frame_pc_hack (fi
, 0);
1092 for (opc
= pc
+ (2 * 28); pc
< opc
; pc
+= 2)
1094 insn
= read_memory_integer (pc
, 2);
1095 /* See where the registers will be saved to */
1098 rn
= GET_PUSHED_REG (insn
);
1102 else if (IS_STS (insn
))
1104 where
[gdbarch_tdep (current_gdbarch
)->PR_REGNUM
] = depth
;
1105 /* If we're storing the pr then this isn't a leaf */
1106 fi
->extra_info
->leaf_function
= 0;
1109 else if (IS_MOV_R3 (insn
))
1111 r3_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
1113 else if (IS_SHLL_R3 (insn
))
1117 else if (IS_ADD_R3SP (insn
))
1121 else if (IS_ADD_SP (insn
))
1123 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
1125 else if (IS_MOV_SP_FP (insn
))
1127 #if 0 /* This used to just stop when it found an instruction that
1128 was not considered part of the prologue. Now, we just
1129 keep going looking for likely instructions. */
1135 /* Now we know how deep things are, we can work out their addresses */
1137 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
1141 if (rn
== FP_REGNUM
)
1144 get_frame_saved_regs (fi
)[rn
] = fi
->frame
- where
[rn
] + depth
- 4;
1148 get_frame_saved_regs (fi
)[rn
] = 0;
1154 get_frame_saved_regs (fi
)[SP_REGNUM
] = read_memory_integer (get_frame_saved_regs (fi
)[FP_REGNUM
], 4);
1158 get_frame_saved_regs (fi
)[SP_REGNUM
] = fi
->frame
- 4;
1161 fi
->extra_info
->f_offset
= depth
- where
[FP_REGNUM
] - 4;
1162 /* Work out the return pc - either from the saved pr or the pr
1166 /* For vectors of 4 floating point registers. */
1168 fv_reg_base_num (int fv_regnum
)
1172 fp_regnum
= FP0_REGNUM
+
1173 (fv_regnum
- gdbarch_tdep (current_gdbarch
)->FV0_REGNUM
) * 4;
1177 /* For double precision floating point registers, i.e 2 fp regs.*/
1179 dr_reg_base_num (int dr_regnum
)
1183 fp_regnum
= FP0_REGNUM
+
1184 (dr_regnum
- gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
) * 2;
1188 /* For pairs of floating point registers */
1190 fpp_reg_base_num (int fpp_regnum
)
1194 fp_regnum
= FP0_REGNUM
+
1195 (fpp_regnum
- gdbarch_tdep (current_gdbarch
)->FPP0_REGNUM
) * 2;
1200 is_media_pseudo (int rn
)
1202 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1204 return (rn
>= tdep
->DR0_REGNUM
1205 && rn
<= tdep
->FV_LAST_REGNUM
);
1209 sh64_get_gdb_regnum (int gcc_regnum
, CORE_ADDR pc
)
1211 return translate_insn_rn (gcc_regnum
, pc_is_isa32 (pc
));
1215 sh64_media_reg_base_num (int reg_nr
)
1217 int base_regnum
= -1;
1218 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1220 if (reg_nr
>= tdep
->DR0_REGNUM
1221 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
1222 base_regnum
= dr_reg_base_num (reg_nr
);
1224 else if (reg_nr
>= tdep
->FPP0_REGNUM
1225 && reg_nr
<= tdep
->FPP_LAST_REGNUM
)
1226 base_regnum
= fpp_reg_base_num (reg_nr
);
1228 else if (reg_nr
>= tdep
->FV0_REGNUM
1229 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
1230 base_regnum
= fv_reg_base_num (reg_nr
);
1237 SH COMPACT MODE (ISA 16) (all pseudo) 221-272
1238 GDB_REGNUM BASE_REGNUM
1298 sh64_compact_reg_base_num (int reg_nr
)
1300 int base_regnum
= -1;
1301 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1303 /* general register N maps to general register N */
1304 if (reg_nr
>= tdep
->R0_C_REGNUM
1305 && reg_nr
<= tdep
->R_LAST_C_REGNUM
)
1306 base_regnum
= reg_nr
- tdep
->R0_C_REGNUM
;
1308 /* floating point register N maps to floating point register N */
1309 else if (reg_nr
>= tdep
->FP0_C_REGNUM
1310 && reg_nr
<= tdep
->FP_LAST_C_REGNUM
)
1311 base_regnum
= reg_nr
- tdep
->FP0_C_REGNUM
+ FP0_REGNUM
;
1313 /* double prec register N maps to base regnum for double prec register N */
1314 else if (reg_nr
>= tdep
->DR0_C_REGNUM
1315 && reg_nr
<= tdep
->DR_LAST_C_REGNUM
)
1316 base_regnum
= dr_reg_base_num (tdep
->DR0_REGNUM
1317 + reg_nr
- tdep
->DR0_C_REGNUM
);
1319 /* vector N maps to base regnum for vector register N */
1320 else if (reg_nr
>= tdep
->FV0_C_REGNUM
1321 && reg_nr
<= tdep
->FV_LAST_C_REGNUM
)
1322 base_regnum
= fv_reg_base_num (tdep
->FV0_REGNUM
1323 + reg_nr
- tdep
->FV0_C_REGNUM
);
1325 else if (reg_nr
== tdep
->PC_C_REGNUM
)
1326 base_regnum
= PC_REGNUM
;
1328 else if (reg_nr
== tdep
->GBR_C_REGNUM
)
1331 else if (reg_nr
== tdep
->MACH_C_REGNUM
1332 || reg_nr
== tdep
->MACL_C_REGNUM
)
1335 else if (reg_nr
== tdep
->PR_C_REGNUM
)
1338 else if (reg_nr
== tdep
->T_C_REGNUM
)
1341 else if (reg_nr
== tdep
->FPSCR_C_REGNUM
)
1342 base_regnum
= tdep
->FPSCR_REGNUM
; /*???? this register is a mess. */
1344 else if (reg_nr
== tdep
->FPUL_C_REGNUM
)
1345 base_regnum
= FP0_REGNUM
+ 32;
1350 /* Given a register number RN (according to the gdb scheme) , return
1351 its corresponding architectural register. In media mode, only a
1352 subset of the registers is pseudo registers. For compact mode, all
1353 the registers are pseudo. */
1355 translate_rn_to_arch_reg_num (int rn
, int media_mode
)
1360 if (!is_media_pseudo (rn
))
1363 return sh64_media_reg_base_num (rn
);
1366 /* All compact registers are pseudo. */
1367 return sh64_compact_reg_base_num (rn
);
1371 sign_extend (int value
, int bits
)
1373 value
= value
& ((1 << bits
) - 1);
1374 return (value
& (1 << (bits
- 1))
1375 ? value
| (~((1 << bits
) - 1))
1380 sh64_nofp_frame_init_saved_regs (struct frame_info
*fi
)
1382 int *where
= (int *) alloca ((NUM_REGS
+ NUM_PSEUDO_REGS
) * sizeof (int));
1394 int gdb_register_number
;
1395 int register_number
;
1396 char *dummy_regs
= deprecated_generic_find_dummy_frame (get_frame_pc (fi
), fi
->frame
);
1397 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1399 if (get_frame_saved_regs (fi
) == NULL
)
1400 frame_saved_regs_zalloc (fi
);
1402 memset (get_frame_saved_regs (fi
), 0, SIZEOF_FRAME_SAVED_REGS
);
1406 /* DANGER! This is ONLY going to work if the char buffer format of
1407 the saved registers is byte-for-byte identical to the
1408 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
1409 memcpy (fi
->saved_regs
, dummy_regs
, sizeof (fi
->saved_regs
));
1413 fi
->extra_info
->leaf_function
= 1;
1414 fi
->extra_info
->f_offset
= 0;
1416 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
1421 /* Loop around examining the prologue insns until we find something
1422 that does not appear to be part of the prologue. But give up
1423 after 20 of them, since we're getting silly then. */
1425 pc
= get_pc_function_start (get_frame_pc (fi
));
1428 deprecated_update_frame_pc_hack (fi
, 0);
1432 if (pc_is_isa32 (pc
))
1443 /* The frame pointer register is general register 14 in shmedia and
1444 shcompact modes. In sh compact it is a pseudo register. Same goes
1445 for the stack pointer register, which is register 15. */
1446 fp_regnum
= translate_insn_rn (FP_REGNUM
, media_mode
);
1447 sp_regnum
= translate_insn_rn (SP_REGNUM
, media_mode
);
1449 for (opc
= pc
+ (insn_size
* 28); pc
< opc
; pc
+= insn_size
)
1451 insn
= read_memory_integer (media_mode
? UNMAKE_ISA32_ADDR (pc
) : pc
,
1454 if (media_mode
== 0)
1456 if (IS_STS_PR (insn
))
1458 int next_insn
= read_memory_integer (pc
+ insn_size
, insn_size
);
1459 if (IS_MOV_TO_R15 (next_insn
))
1461 int reg_nr
= tdep
->PR_C_REGNUM
;
1463 where
[reg_nr
] = depth
- ((((next_insn
& 0xf) ^ 0x8) - 0x8) << 2);
1464 fi
->extra_info
->leaf_function
= 0;
1468 else if (IS_MOV_R14 (insn
))
1470 where
[fp_regnum
] = depth
- ((((insn
& 0xf) ^ 0x8) - 0x8) << 2);
1473 else if (IS_MOV_R0 (insn
))
1475 /* Put in R0 the offset from SP at which to store some
1476 registers. We are interested in this value, because it
1477 will tell us where the given registers are stored within
1479 r0_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
1481 else if (IS_ADD_SP_R0 (insn
))
1483 /* This instruction still prepares r0, but we don't care.
1484 We already have the offset in r0_val. */
1486 else if (IS_STS_R0 (insn
))
1488 /* Store PR at r0_val-4 from SP. Decrement r0 by 4*/
1489 int reg_nr
= tdep
->PR_C_REGNUM
;
1490 where
[reg_nr
] = depth
- (r0_val
- 4);
1492 fi
->extra_info
->leaf_function
= 0;
1494 else if (IS_MOV_R14_R0 (insn
))
1496 /* Store R14 at r0_val-4 from SP. Decrement r0 by 4 */
1497 where
[fp_regnum
] = depth
- (r0_val
- 4);
1501 else if (IS_ADD_SP (insn
))
1503 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
1505 else if (IS_MOV_SP_FP (insn
))
1510 if (IS_ADDIL_SP_MEDIA (insn
)
1511 || IS_ADDI_SP_MEDIA (insn
))
1513 depth
-= sign_extend ((((insn
& 0xffc00) ^ 0x80000) - 0x80000) >> 10, 9);
1516 else if (IS_STQ_R18_R15 (insn
))
1518 where
[tdep
->PR_REGNUM
] =
1519 depth
- (sign_extend ((insn
& 0xffc00) >> 10, 9) << 3);
1520 fi
->extra_info
->leaf_function
= 0;
1523 else if (IS_STL_R18_R15 (insn
))
1525 where
[tdep
->PR_REGNUM
] =
1526 depth
- (sign_extend ((insn
& 0xffc00) >> 10, 9) << 2);
1527 fi
->extra_info
->leaf_function
= 0;
1530 else if (IS_STQ_R14_R15 (insn
))
1532 where
[fp_regnum
] = depth
- (sign_extend ((insn
& 0xffc00) >> 10, 9) << 3);
1535 else if (IS_STL_R14_R15 (insn
))
1537 where
[fp_regnum
] = depth
- (sign_extend ((insn
& 0xffc00) >> 10, 9) << 2);
1540 else if (IS_MOV_SP_FP_MEDIA (insn
))
1545 /* Now we know how deep things are, we can work out their addresses. */
1546 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
1548 register_number
= translate_rn_to_arch_reg_num (rn
, media_mode
);
1552 if (rn
== fp_regnum
)
1555 /* Watch out! saved_regs is only for the real registers, and
1556 doesn't include space for the pseudo registers. */
1557 get_frame_saved_regs (fi
)[register_number
]= fi
->frame
- where
[rn
] + depth
;
1561 get_frame_saved_regs (fi
)[register_number
] = 0;
1566 /* SP_REGNUM is 15. For shmedia 15 is the real register. For
1567 shcompact 15 is the arch register corresponding to the pseudo
1568 register r15 which still is the SP register. */
1569 /* The place on the stack where fp is stored contains the sp of
1571 /* Again, saved_registers contains only space for the real registers,
1572 so we store in FP_REGNUM position. */
1574 if (tdep
->sh_abi
== SH_ABI_32
)
1577 size
= REGISTER_RAW_SIZE (fp_regnum
);
1578 get_frame_saved_regs (fi
)[sp_regnum
] = read_memory_integer (get_frame_saved_regs (fi
)[fp_regnum
], size
);
1581 get_frame_saved_regs (fi
)[sp_regnum
] = fi
->frame
;
1583 fi
->extra_info
->f_offset
= depth
- where
[fp_regnum
];
1587 sh_fp_frame_init_saved_regs (struct frame_info
*fi
)
1589 int *where
= (int *) alloca ((NUM_REGS
+ NUM_PSEUDO_REGS
) * sizeof (int));
1597 char *dummy_regs
= deprecated_generic_find_dummy_frame (get_frame_pc (fi
), fi
->frame
);
1598 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1600 if (get_frame_saved_regs (fi
) == NULL
)
1601 frame_saved_regs_zalloc (fi
);
1603 memset (get_frame_saved_regs (fi
), 0, SIZEOF_FRAME_SAVED_REGS
);
1607 /* DANGER! This is ONLY going to work if the char buffer format of
1608 the saved registers is byte-for-byte identical to the
1609 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
1610 memcpy (fi
->saved_regs
, dummy_regs
, sizeof (fi
->saved_regs
));
1614 fi
->extra_info
->leaf_function
= 1;
1615 fi
->extra_info
->f_offset
= 0;
1617 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
1622 /* Loop around examining the prologue insns until we find something
1623 that does not appear to be part of the prologue. But give up
1624 after 20 of them, since we're getting silly then. */
1626 pc
= get_pc_function_start (get_frame_pc (fi
));
1629 deprecated_update_frame_pc_hack (fi
, 0);
1633 for (opc
= pc
+ (2 * 28); pc
< opc
; pc
+= 2)
1635 insn
= read_memory_integer (pc
, 2);
1636 /* See where the registers will be saved to */
1639 rn
= GET_PUSHED_REG (insn
);
1643 else if (IS_STS (insn
))
1645 where
[tdep
->PR_REGNUM
] = depth
;
1646 /* If we're storing the pr then this isn't a leaf */
1647 fi
->extra_info
->leaf_function
= 0;
1650 else if (IS_MOV_R3 (insn
))
1652 r3_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
1654 else if (IS_SHLL_R3 (insn
))
1658 else if (IS_ADD_R3SP (insn
))
1662 else if (IS_ADD_SP (insn
))
1664 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
1666 else if (IS_FMOV (insn
))
1668 if (read_register (tdep
->FPSCR_REGNUM
) & FPSCR_SZ
)
1677 else if (IS_MOV_SP_FP (insn
))
1679 #if 0 /* This used to just stop when it found an instruction that
1680 was not considered part of the prologue. Now, we just
1681 keep going looking for likely instructions. */
1687 /* Now we know how deep things are, we can work out their addresses */
1689 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
1693 if (rn
== FP_REGNUM
)
1696 get_frame_saved_regs (fi
)[rn
] = fi
->frame
- where
[rn
] + depth
- 4;
1700 get_frame_saved_regs (fi
)[rn
] = 0;
1706 get_frame_saved_regs (fi
)[SP_REGNUM
] =
1707 read_memory_integer (get_frame_saved_regs (fi
)[FP_REGNUM
], 4);
1711 get_frame_saved_regs (fi
)[SP_REGNUM
] = fi
->frame
- 4;
1714 fi
->extra_info
->f_offset
= depth
- where
[FP_REGNUM
] - 4;
1715 /* Work out the return pc - either from the saved pr or the pr
1719 /* Initialize the extra info saved in a FRAME */
1721 sh_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1724 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
1727 deprecated_update_frame_pc_hack (fi
, FRAME_SAVED_PC (fi
->next
));
1729 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), fi
->frame
, fi
->frame
))
1731 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
1732 by assuming it's always FP. */
1733 deprecated_update_frame_base_hack (fi
, deprecated_read_register_dummy (get_frame_pc (fi
), fi
->frame
,
1735 fi
->extra_info
->return_pc
= deprecated_read_register_dummy (get_frame_pc (fi
),
1738 fi
->extra_info
->f_offset
= -(CALL_DUMMY_LENGTH
+ 4);
1739 fi
->extra_info
->leaf_function
= 0;
1744 FRAME_INIT_SAVED_REGS (fi
);
1745 fi
->extra_info
->return_pc
=
1746 sh_find_callers_reg (fi
, gdbarch_tdep (current_gdbarch
)->PR_REGNUM
);
1751 sh64_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1753 int media_mode
= pc_is_isa32 (get_frame_pc (fi
));
1755 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
1758 deprecated_update_frame_pc_hack (fi
, FRAME_SAVED_PC (fi
->next
));
1760 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), fi
->frame
, fi
->frame
))
1762 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
1763 by assuming it's always FP. */
1764 deprecated_update_frame_base_hack (fi
, deprecated_read_register_dummy (get_frame_pc (fi
), fi
->frame
,
1766 fi
->extra_info
->return_pc
=
1767 deprecated_read_register_dummy (get_frame_pc (fi
), fi
->frame
, PC_REGNUM
);
1768 fi
->extra_info
->f_offset
= -(CALL_DUMMY_LENGTH
+ 4);
1769 fi
->extra_info
->leaf_function
= 0;
1774 FRAME_INIT_SAVED_REGS (fi
);
1775 fi
->extra_info
->return_pc
=
1776 sh64_get_saved_pr (fi
, gdbarch_tdep (current_gdbarch
)->PR_REGNUM
);
1781 sh64_get_saved_register (char *raw_buffer
, int *optimized
, CORE_ADDR
*addrp
,
1782 struct frame_info
*frame
, int regnum
,
1783 enum lval_type
*lval
)
1786 int live_regnum
= regnum
;
1787 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1789 if (!target_has_registers
)
1790 error ("No registers.");
1792 /* Normal systems don't optimize out things with register numbers. */
1793 if (optimized
!= NULL
)
1796 if (addrp
) /* default assumption: not found in memory */
1800 memset (raw_buffer
, 0, sizeof (raw_buffer
));
1802 /* We must do this here, before the following while loop changes
1803 frame, and makes it NULL. If this is a media register number,
1804 but we are in compact mode, it will become the corresponding
1805 compact pseudo register. If there is no corresponding compact
1806 pseudo-register what do we do?*/
1807 media_mode
= pc_is_isa32 (get_frame_pc (frame
));
1808 live_regnum
= translate_insn_rn (regnum
, media_mode
);
1810 /* Note: since the current frame's registers could only have been
1811 saved by frames INTERIOR TO the current frame, we skip examining
1812 the current frame itself: otherwise, we would be getting the
1813 previous frame's registers which were saved by the current frame. */
1815 while (frame
&& ((frame
= frame
->next
) != NULL
))
1817 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
), frame
->frame
, frame
->frame
))
1819 if (lval
) /* found it in a CALL_DUMMY frame */
1823 (deprecated_generic_find_dummy_frame (get_frame_pc (frame
), frame
->frame
)
1824 + REGISTER_BYTE (regnum
)),
1825 REGISTER_RAW_SIZE (regnum
));
1829 FRAME_INIT_SAVED_REGS (frame
);
1830 if (get_frame_saved_regs (frame
) != NULL
1831 && get_frame_saved_regs (frame
)[regnum
] != 0)
1833 if (lval
) /* found it saved on the stack */
1834 *lval
= lval_memory
;
1835 if (regnum
== SP_REGNUM
)
1837 if (raw_buffer
) /* SP register treated specially */
1838 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
),
1839 get_frame_saved_regs (frame
)[regnum
]);
1842 { /* any other register */
1845 *addrp
= get_frame_saved_regs (frame
)[regnum
];
1849 if (tdep
->sh_abi
== SH_ABI_32
1850 && (live_regnum
== FP_REGNUM
1851 || live_regnum
== tdep
->PR_REGNUM
))
1854 size
= REGISTER_RAW_SIZE (live_regnum
);
1855 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
1856 read_memory (get_frame_saved_regs (frame
)[regnum
], raw_buffer
, size
);
1858 read_memory (get_frame_saved_regs (frame
)[regnum
],
1860 + REGISTER_RAW_SIZE (live_regnum
)
1869 /* If we get thru the loop to this point, it means the register was
1870 not saved in any frame. Return the actual live-register value. */
1872 if (lval
) /* found it in a live register */
1873 *lval
= lval_register
;
1875 *addrp
= REGISTER_BYTE (live_regnum
);
1877 deprecated_read_register_gen (live_regnum
, raw_buffer
);
1880 /* Extract from an array REGBUF containing the (raw) register state
1881 the address in which a function should return its structure value,
1882 as a CORE_ADDR (or an expression that can be used as one). */
1884 sh_extract_struct_value_address (char *regbuf
)
1886 return (extract_address ((regbuf
), REGISTER_RAW_SIZE (0)));
1890 sh64_extract_struct_value_address (char *regbuf
)
1892 return (extract_address ((regbuf
+ REGISTER_BYTE (STRUCT_RETURN_REGNUM
)),
1893 REGISTER_RAW_SIZE (STRUCT_RETURN_REGNUM
)));
1897 sh_frame_saved_pc (struct frame_info
*frame
)
1899 return ((frame
)->extra_info
->return_pc
);
1902 /* Discard from the stack the innermost frame,
1903 restoring all saved registers. */
1907 register struct frame_info
*frame
= get_current_frame ();
1908 register CORE_ADDR fp
;
1909 register int regnum
;
1911 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
), frame
->frame
, frame
->frame
))
1912 generic_pop_dummy_frame ();
1915 fp
= get_frame_base (frame
);
1916 FRAME_INIT_SAVED_REGS (frame
);
1918 /* Copy regs from where they were saved in the frame */
1919 for (regnum
= 0; regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
; regnum
++)
1920 if (get_frame_saved_regs (frame
)[regnum
])
1921 write_register (regnum
,
1922 read_memory_integer (get_frame_saved_regs (frame
)[regnum
], 4));
1924 write_register (PC_REGNUM
, frame
->extra_info
->return_pc
);
1925 write_register (SP_REGNUM
, fp
+ 4);
1927 flush_cached_frames ();
1930 /* Used in the 'return' command. */
1932 sh64_pop_frame (void)
1934 register struct frame_info
*frame
= get_current_frame ();
1935 register CORE_ADDR fp
;
1936 register int regnum
;
1937 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1939 int media_mode
= pc_is_isa32 (get_frame_pc (frame
));
1941 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
), frame
->frame
, frame
->frame
))
1942 generic_pop_dummy_frame ();
1945 fp
= get_frame_base (frame
);
1946 FRAME_INIT_SAVED_REGS (frame
);
1948 /* Copy regs from where they were saved in the frame */
1949 for (regnum
= 0; regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
; regnum
++)
1950 if (get_frame_saved_regs (frame
)[regnum
])
1953 if (tdep
->sh_abi
== SH_ABI_32
1954 && (regnum
== FP_REGNUM
1955 || regnum
== tdep
->PR_REGNUM
))
1958 size
= REGISTER_RAW_SIZE (translate_insn_rn (regnum
,
1960 write_register (regnum
,
1961 read_memory_integer (get_frame_saved_regs (frame
)[regnum
],
1965 write_register (PC_REGNUM
, frame
->extra_info
->return_pc
);
1966 write_register (SP_REGNUM
, fp
+ 8);
1968 flush_cached_frames ();
1971 /* Function: push_arguments
1972 Setup the function arguments for calling a function in the inferior.
1974 On the Hitachi SH architecture, there are four registers (R4 to R7)
1975 which are dedicated for passing function arguments. Up to the first
1976 four arguments (depending on size) may go into these registers.
1977 The rest go on the stack.
1979 Arguments that are smaller than 4 bytes will still take up a whole
1980 register or a whole 32-bit word on the stack, and will be
1981 right-justified in the register or the stack word. This includes
1982 chars, shorts, and small aggregate types.
1984 Arguments that are larger than 4 bytes may be split between two or
1985 more registers. If there are not enough registers free, an argument
1986 may be passed partly in a register (or registers), and partly on the
1987 stack. This includes doubles, long longs, and larger aggregates.
1988 As far as I know, there is no upper limit to the size of aggregates
1989 that will be passed in this way; in other words, the convention of
1990 passing a pointer to a large aggregate instead of a copy is not used.
1992 An exceptional case exists for struct arguments (and possibly other
1993 aggregates such as arrays) if the size is larger than 4 bytes but
1994 not a multiple of 4 bytes. In this case the argument is never split
1995 between the registers and the stack, but instead is copied in its
1996 entirety onto the stack, AND also copied into as many registers as
1997 there is room for. In other words, space in registers permitting,
1998 two copies of the same argument are passed in. As far as I can tell,
1999 only the one on the stack is used, although that may be a function
2000 of the level of compiler optimization. I suspect this is a compiler
2001 bug. Arguments of these odd sizes are left-justified within the
2002 word (as opposed to arguments smaller than 4 bytes, which are
2005 If the function is to return an aggregate type such as a struct, it
2006 is either returned in the normal return value register R0 (if its
2007 size is no greater than one byte), or else the caller must allocate
2008 space into which the callee will copy the return value (if the size
2009 is greater than one byte). In this case, a pointer to the return
2010 value location is passed into the callee in register R2, which does
2011 not displace any of the other arguments passed in via registers R4
2015 sh_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2016 int struct_return
, CORE_ADDR struct_addr
)
2018 int stack_offset
, stack_alloc
;
2026 int odd_sized_struct
;
2027 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2029 /* first force sp to a 4-byte alignment */
2032 /* The "struct return pointer" pseudo-argument has its own dedicated
2035 write_register (STRUCT_RETURN_REGNUM
, struct_addr
);
2037 /* Now make sure there's space on the stack */
2038 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
2039 stack_alloc
+= ((TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + 3) & ~3);
2040 sp
-= stack_alloc
; /* make room on stack for args */
2042 /* Now load as many as possible of the first arguments into
2043 registers, and push the rest onto the stack. There are 16 bytes
2044 in four registers available. Loop thru args from first to last. */
2046 argreg
= tdep
->ARG0_REGNUM
;
2047 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
2049 type
= VALUE_TYPE (args
[argnum
]);
2050 len
= TYPE_LENGTH (type
);
2051 memset (valbuf
, 0, sizeof (valbuf
));
2054 /* value gets right-justified in the register or stack word */
2055 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2056 memcpy (valbuf
+ (4 - len
),
2057 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
2059 memcpy (valbuf
, (char *) VALUE_CONTENTS (args
[argnum
]), len
);
2063 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
2065 if (len
> 4 && (len
& 3) != 0)
2066 odd_sized_struct
= 1; /* such structs go entirely on stack */
2068 odd_sized_struct
= 0;
2071 if (argreg
> tdep
->ARGLAST_REGNUM
2072 || odd_sized_struct
)
2074 /* must go on the stack */
2075 write_memory (sp
+ stack_offset
, val
, 4);
2078 /* NOTE WELL!!!!! This is not an "else if" clause!!!
2079 That's because some *&^%$ things get passed on the stack
2080 AND in the registers! */
2081 if (argreg
<= tdep
->ARGLAST_REGNUM
)
2083 /* there's room in a register */
2084 regval
= extract_address (val
, REGISTER_RAW_SIZE (argreg
));
2085 write_register (argreg
++, regval
);
2087 /* Store the value 4 bytes at a time. This means that things
2088 larger than 4 bytes may go partly in registers and partly
2090 len
-= REGISTER_RAW_SIZE (argreg
);
2091 val
+= REGISTER_RAW_SIZE (argreg
);
2097 /* R2-R9 for integer types and integer equivalent (char, pointers) and
2098 non-scalar (struct, union) elements (even if the elements are
2100 FR0-FR11 for single precision floating point (float)
2101 DR0-DR10 for double precision floating point (double)
2103 If a float is argument number 3 (for instance) and arguments number
2104 1,2, and 4 are integer, the mapping will be:
2105 arg1 -->R2, arg2 --> R3, arg3 -->FR0, arg4 --> R5. I.e. R4 is not used.
2107 If a float is argument number 10 (for instance) and arguments number
2108 1 through 10 are integer, the mapping will be:
2109 arg1->R2, arg2->R3, arg3->R4, arg4->R5, arg5->R6, arg6->R7, arg7->R8,
2110 arg8->R9, arg9->(0,SP)stack(8-byte aligned), arg10->FR0, arg11->stack(16,SP).
2111 I.e. there is hole in the stack.
2113 Different rules apply for variable arguments functions, and for functions
2114 for which the prototype is not known. */
2117 sh64_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2118 int struct_return
, CORE_ADDR struct_addr
)
2120 int stack_offset
, stack_alloc
;
2124 int float_arg_index
= 0;
2125 int double_arg_index
= 0;
2135 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2137 memset (fp_args
, 0, sizeof (fp_args
));
2139 /* first force sp to a 8-byte alignment */
2142 /* The "struct return pointer" pseudo-argument has its own dedicated
2146 write_register (STRUCT_RETURN_REGNUM
, struct_addr
);
2148 /* Now make sure there's space on the stack */
2149 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
2150 stack_alloc
+= ((TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + 7) & ~7);
2151 sp
-= stack_alloc
; /* make room on stack for args */
2153 /* Now load as many as possible of the first arguments into
2154 registers, and push the rest onto the stack. There are 64 bytes
2155 in eight registers available. Loop thru args from first to last. */
2157 int_argreg
= tdep
->ARG0_REGNUM
;
2158 float_argreg
= FP0_REGNUM
;
2159 double_argreg
= tdep
->DR0_REGNUM
;
2161 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
2163 type
= VALUE_TYPE (args
[argnum
]);
2164 len
= TYPE_LENGTH (type
);
2165 memset (valbuf
, 0, sizeof (valbuf
));
2167 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
2169 argreg_size
= REGISTER_RAW_SIZE (int_argreg
);
2171 if (len
< argreg_size
)
2173 /* value gets right-justified in the register or stack word */
2174 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2175 memcpy (valbuf
+ argreg_size
- len
,
2176 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
2178 memcpy (valbuf
, (char *) VALUE_CONTENTS (args
[argnum
]), len
);
2183 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
2187 if (int_argreg
> tdep
->ARGLAST_REGNUM
)
2189 /* must go on the stack */
2190 write_memory (sp
+ stack_offset
, val
, argreg_size
);
2191 stack_offset
+= 8;/*argreg_size;*/
2193 /* NOTE WELL!!!!! This is not an "else if" clause!!!
2194 That's because some *&^%$ things get passed on the stack
2195 AND in the registers! */
2196 if (int_argreg
<= tdep
->ARGLAST_REGNUM
)
2198 /* there's room in a register */
2199 regval
= extract_address (val
, argreg_size
);
2200 write_register (int_argreg
, regval
);
2202 /* Store the value 8 bytes at a time. This means that
2203 things larger than 8 bytes may go partly in registers
2204 and partly on the stack. FIXME: argreg is incremented
2205 before we use its size. */
2213 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
2216 /* Where is it going to be stored? */
2217 while (fp_args
[float_arg_index
])
2220 /* Now float_argreg points to the register where it
2221 should be stored. Are we still within the allowed
2223 if (float_arg_index
<= tdep
->FLOAT_ARGLAST_REGNUM
)
2225 /* Goes in FR0...FR11 */
2226 deprecated_write_register_gen (FP0_REGNUM
+ float_arg_index
,
2228 fp_args
[float_arg_index
] = 1;
2229 /* Skip the corresponding general argument register. */
2234 /* Store it as the integers, 8 bytes at the time, if
2235 necessary spilling on the stack. */
2240 /* Where is it going to be stored? */
2241 while (fp_args
[double_arg_index
])
2242 double_arg_index
+= 2;
2243 /* Now double_argreg points to the register
2244 where it should be stored.
2245 Are we still within the allowed register set? */
2246 if (double_arg_index
< tdep
->FLOAT_ARGLAST_REGNUM
)
2248 /* Goes in DR0...DR10 */
2249 /* The numbering of the DRi registers is consecutive,
2250 i.e. includes odd numbers. */
2251 int double_register_offset
= double_arg_index
/ 2;
2252 int regnum
= tdep
->DR0_REGNUM
+
2253 double_register_offset
;
2255 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
2257 memset (valbuf_tmp
, 0, sizeof (valbuf_tmp
));
2258 REGISTER_CONVERT_TO_VIRTUAL (regnum
,
2259 type
, val
, valbuf_tmp
);
2263 /* Note: must use write_register_gen here instead
2264 of regcache_raw_write, because
2265 regcache_raw_write works only for real
2266 registers, not pseudo. write_register_gen will
2267 call the gdbarch function to do register
2268 writes, and that will properly know how to deal
2270 deprecated_write_register_gen (regnum
, val
);
2271 fp_args
[double_arg_index
] = 1;
2272 fp_args
[double_arg_index
+ 1] = 1;
2273 /* Skip the corresponding general argument register. */
2278 /* Store it as the integers, 8 bytes at the time, if
2279 necessary spilling on the stack. */
2286 /* Function: push_return_address (pc)
2287 Set up the return address for the inferior function call.
2288 Needed for targets where we don't actually execute a JSR/BSR instruction */
2291 sh_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
2293 write_register (gdbarch_tdep (current_gdbarch
)->PR_REGNUM
,
2294 CALL_DUMMY_ADDRESS ());
2298 /* Function: fix_call_dummy
2299 Poke the callee function's address into the destination part of
2300 the CALL_DUMMY. The address is actually stored in a data word
2301 following the actualy CALL_DUMMY instructions, which will load
2302 it into a register using PC-relative addressing. This function
2303 expects the CALL_DUMMY to look like this:
2314 sh_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
, int nargs
,
2315 struct value
**args
, struct type
*type
, int gcc_p
)
2317 *(unsigned long *) (dummy
+ 8) = fun
;
2321 /* Find a function's return value in the appropriate registers (in
2322 regbuf), and copy it into valbuf. Extract from an array REGBUF
2323 containing the (raw) register state a function return value of type
2324 TYPE, and copy that, in virtual format, into VALBUF. */
2326 sh_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2328 int len
= TYPE_LENGTH (type
);
2329 int return_register
= R0_REGNUM
;
2334 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2335 offset
= REGISTER_BYTE (return_register
) + 4 - len
;
2337 offset
= REGISTER_BYTE (return_register
);
2338 memcpy (valbuf
, regbuf
+ offset
, len
);
2342 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2343 offset
= REGISTER_BYTE (return_register
) + 8 - len
;
2345 offset
= REGISTER_BYTE (return_register
);
2346 memcpy (valbuf
, regbuf
+ offset
, len
);
2349 error ("bad size for return value");
2353 sh3e_sh4_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2355 int return_register
;
2357 int len
= TYPE_LENGTH (type
);
2359 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2360 return_register
= FP0_REGNUM
;
2362 return_register
= R0_REGNUM
;
2364 if (len
== 8 && TYPE_CODE (type
) == TYPE_CODE_FLT
)
2367 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
2368 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword
,
2369 (char *) regbuf
+ REGISTER_BYTE (return_register
),
2372 floatformat_to_doublest (&floatformat_ieee_double_big
,
2373 (char *) regbuf
+ REGISTER_BYTE (return_register
),
2375 store_floating (valbuf
, len
, val
);
2379 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2380 offset
= REGISTER_BYTE (return_register
) + 4 - len
;
2382 offset
= REGISTER_BYTE (return_register
);
2383 memcpy (valbuf
, regbuf
+ offset
, len
);
2387 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2388 offset
= REGISTER_BYTE (return_register
) + 8 - len
;
2390 offset
= REGISTER_BYTE (return_register
);
2391 memcpy (valbuf
, regbuf
+ offset
, len
);
2394 error ("bad size for return value");
2398 sh64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2401 int return_register
;
2402 int len
= TYPE_LENGTH (type
);
2403 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2405 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2409 /* Return value stored in FP0_REGNUM */
2410 return_register
= FP0_REGNUM
;
2411 offset
= REGISTER_BYTE (return_register
);
2412 memcpy (valbuf
, (char *) regbuf
+ offset
, len
);
2416 /* return value stored in DR0_REGNUM */
2419 return_register
= tdep
->DR0_REGNUM
;
2420 offset
= REGISTER_BYTE (return_register
);
2422 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
2423 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword
,
2424 (char *) regbuf
+ offset
, &val
);
2426 floatformat_to_doublest (&floatformat_ieee_double_big
,
2427 (char *) regbuf
+ offset
, &val
);
2428 store_floating (valbuf
, len
, val
);
2435 /* Result is in register 2. If smaller than 8 bytes, it is padded
2436 at the most significant end. */
2437 return_register
= tdep
->RETURN_REGNUM
;
2438 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2439 offset
= REGISTER_BYTE (return_register
) +
2440 REGISTER_RAW_SIZE (return_register
) - len
;
2442 offset
= REGISTER_BYTE (return_register
);
2443 memcpy (valbuf
, (char *) regbuf
+ offset
, len
);
2446 error ("bad size for return value");
2450 /* Write into appropriate registers a function return value
2451 of type TYPE, given in virtual format.
2452 If the architecture is sh4 or sh3e, store a function's return value
2453 in the R0 general register or in the FP0 floating point register,
2454 depending on the type of the return value. In all the other cases
2455 the result is stored in r0, left-justified. */
2457 sh_default_store_return_value (struct type
*type
, char *valbuf
)
2459 char buf
[32]; /* more than enough... */
2461 if (TYPE_LENGTH (type
) < REGISTER_RAW_SIZE (R0_REGNUM
))
2463 /* Add leading zeros to the value. */
2464 memset (buf
, 0, REGISTER_RAW_SIZE (R0_REGNUM
));
2465 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2466 memcpy (buf
+ REGISTER_RAW_SIZE (R0_REGNUM
) - TYPE_LENGTH (type
),
2467 valbuf
, TYPE_LENGTH (type
));
2469 memcpy (buf
, valbuf
, TYPE_LENGTH (type
));
2470 deprecated_write_register_bytes (REGISTER_BYTE (R0_REGNUM
), buf
,
2471 REGISTER_RAW_SIZE (R0_REGNUM
));
2474 deprecated_write_register_bytes (REGISTER_BYTE (R0_REGNUM
), valbuf
,
2475 TYPE_LENGTH (type
));
2479 sh3e_sh4_store_return_value (struct type
*type
, char *valbuf
)
2481 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2482 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
2483 valbuf
, TYPE_LENGTH (type
));
2485 sh_default_store_return_value (type
, valbuf
);
2489 sh64_store_return_value (struct type
*type
, char *valbuf
)
2491 char buf
[64]; /* more than enough... */
2492 int len
= TYPE_LENGTH (type
);
2494 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2498 /* Return value stored in FP0_REGNUM */
2499 deprecated_write_register_gen (FP0_REGNUM
, valbuf
);
2503 /* return value stored in DR0_REGNUM */
2504 /* FIXME: Implement */
2509 int return_register
= gdbarch_tdep (current_gdbarch
)->RETURN_REGNUM
;
2512 if (len
<= REGISTER_RAW_SIZE (return_register
))
2514 /* Pad with zeros. */
2515 memset (buf
, 0, REGISTER_RAW_SIZE (return_register
));
2516 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
2517 offset
= 0; /*REGISTER_RAW_SIZE (return_register) - len;*/
2519 offset
= REGISTER_RAW_SIZE (return_register
) - len
;
2521 memcpy (buf
+ offset
, valbuf
, len
);
2522 deprecated_write_register_gen (return_register
, buf
);
2525 deprecated_write_register_gen (return_register
, valbuf
);
2529 /* Print the registers in a form similar to the E7000 */
2532 sh_generic_show_regs (void)
2534 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2536 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
2537 paddr (read_register (PC_REGNUM
)),
2538 (long) read_register (tdep
->SR_REGNUM
),
2539 (long) read_register (tdep
->PR_REGNUM
),
2540 (long) read_register (MACH_REGNUM
),
2541 (long) read_register (MACL_REGNUM
));
2543 printf_filtered ("GBR=%08lx VBR=%08lx",
2544 (long) read_register (GBR_REGNUM
),
2545 (long) read_register (VBR_REGNUM
));
2547 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2548 (long) read_register (0),
2549 (long) read_register (1),
2550 (long) read_register (2),
2551 (long) read_register (3),
2552 (long) read_register (4),
2553 (long) read_register (5),
2554 (long) read_register (6),
2555 (long) read_register (7));
2556 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2557 (long) read_register (8),
2558 (long) read_register (9),
2559 (long) read_register (10),
2560 (long) read_register (11),
2561 (long) read_register (12),
2562 (long) read_register (13),
2563 (long) read_register (14),
2564 (long) read_register (15));
2568 sh3_show_regs (void)
2570 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2572 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
2573 paddr (read_register (PC_REGNUM
)),
2574 (long) read_register (tdep
->SR_REGNUM
),
2575 (long) read_register (tdep
->PR_REGNUM
),
2576 (long) read_register (MACH_REGNUM
),
2577 (long) read_register (MACL_REGNUM
));
2579 printf_filtered ("GBR=%08lx VBR=%08lx",
2580 (long) read_register (GBR_REGNUM
),
2581 (long) read_register (VBR_REGNUM
));
2582 printf_filtered (" SSR=%08lx SPC=%08lx",
2583 (long) read_register (tdep
->SSR_REGNUM
),
2584 (long) read_register (tdep
->SPC_REGNUM
));
2586 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2587 (long) read_register (0),
2588 (long) read_register (1),
2589 (long) read_register (2),
2590 (long) read_register (3),
2591 (long) read_register (4),
2592 (long) read_register (5),
2593 (long) read_register (6),
2594 (long) read_register (7));
2595 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2596 (long) read_register (8),
2597 (long) read_register (9),
2598 (long) read_register (10),
2599 (long) read_register (11),
2600 (long) read_register (12),
2601 (long) read_register (13),
2602 (long) read_register (14),
2603 (long) read_register (15));
2608 sh3e_show_regs (void)
2610 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2612 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
2613 paddr (read_register (PC_REGNUM
)),
2614 (long) read_register (tdep
->SR_REGNUM
),
2615 (long) read_register (tdep
->PR_REGNUM
),
2616 (long) read_register (MACH_REGNUM
),
2617 (long) read_register (MACL_REGNUM
));
2619 printf_filtered ("GBR=%08lx VBR=%08lx",
2620 (long) read_register (GBR_REGNUM
),
2621 (long) read_register (VBR_REGNUM
));
2622 printf_filtered (" SSR=%08lx SPC=%08lx",
2623 (long) read_register (tdep
->SSR_REGNUM
),
2624 (long) read_register (tdep
->SPC_REGNUM
));
2625 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
2626 (long) read_register (tdep
->FPUL_REGNUM
),
2627 (long) read_register (tdep
->FPSCR_REGNUM
));
2629 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2630 (long) read_register (0),
2631 (long) read_register (1),
2632 (long) read_register (2),
2633 (long) read_register (3),
2634 (long) read_register (4),
2635 (long) read_register (5),
2636 (long) read_register (6),
2637 (long) read_register (7));
2638 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2639 (long) read_register (8),
2640 (long) read_register (9),
2641 (long) read_register (10),
2642 (long) read_register (11),
2643 (long) read_register (12),
2644 (long) read_register (13),
2645 (long) read_register (14),
2646 (long) read_register (15));
2648 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
2649 (long) read_register (FP0_REGNUM
+ 0),
2650 (long) read_register (FP0_REGNUM
+ 1),
2651 (long) read_register (FP0_REGNUM
+ 2),
2652 (long) read_register (FP0_REGNUM
+ 3),
2653 (long) read_register (FP0_REGNUM
+ 4),
2654 (long) read_register (FP0_REGNUM
+ 5),
2655 (long) read_register (FP0_REGNUM
+ 6),
2656 (long) read_register (FP0_REGNUM
+ 7));
2657 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
2658 (long) read_register (FP0_REGNUM
+ 8),
2659 (long) read_register (FP0_REGNUM
+ 9),
2660 (long) read_register (FP0_REGNUM
+ 10),
2661 (long) read_register (FP0_REGNUM
+ 11),
2662 (long) read_register (FP0_REGNUM
+ 12),
2663 (long) read_register (FP0_REGNUM
+ 13),
2664 (long) read_register (FP0_REGNUM
+ 14),
2665 (long) read_register (FP0_REGNUM
+ 15));
2669 sh3_dsp_show_regs (void)
2671 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2673 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
2674 paddr (read_register (PC_REGNUM
)),
2675 (long) read_register (tdep
->SR_REGNUM
),
2676 (long) read_register (tdep
->PR_REGNUM
),
2677 (long) read_register (MACH_REGNUM
),
2678 (long) read_register (MACL_REGNUM
));
2680 printf_filtered ("GBR=%08lx VBR=%08lx",
2681 (long) read_register (GBR_REGNUM
),
2682 (long) read_register (VBR_REGNUM
));
2684 printf_filtered (" SSR=%08lx SPC=%08lx",
2685 (long) read_register (tdep
->SSR_REGNUM
),
2686 (long) read_register (tdep
->SPC_REGNUM
));
2688 printf_filtered (" DSR=%08lx",
2689 (long) read_register (tdep
->DSR_REGNUM
));
2691 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2692 (long) read_register (0),
2693 (long) read_register (1),
2694 (long) read_register (2),
2695 (long) read_register (3),
2696 (long) read_register (4),
2697 (long) read_register (5),
2698 (long) read_register (6),
2699 (long) read_register (7));
2700 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2701 (long) read_register (8),
2702 (long) read_register (9),
2703 (long) read_register (10),
2704 (long) read_register (11),
2705 (long) read_register (12),
2706 (long) read_register (13),
2707 (long) read_register (14),
2708 (long) read_register (15));
2710 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
2711 (long) read_register (tdep
->A0G_REGNUM
) & 0xff,
2712 (long) read_register (tdep
->A0_REGNUM
),
2713 (long) read_register (tdep
->M0_REGNUM
),
2714 (long) read_register (tdep
->X0_REGNUM
),
2715 (long) read_register (tdep
->Y0_REGNUM
),
2716 (long) read_register (tdep
->RS_REGNUM
),
2717 (long) read_register (tdep
->MOD_REGNUM
));
2718 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
2719 (long) read_register (tdep
->A1G_REGNUM
) & 0xff,
2720 (long) read_register (tdep
->A1_REGNUM
),
2721 (long) read_register (tdep
->M1_REGNUM
),
2722 (long) read_register (tdep
->X1_REGNUM
),
2723 (long) read_register (tdep
->Y1_REGNUM
),
2724 (long) read_register (tdep
->RE_REGNUM
));
2728 sh4_show_regs (void)
2730 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2732 int pr
= read_register (tdep
->FPSCR_REGNUM
) & 0x80000;
2733 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
2734 paddr (read_register (PC_REGNUM
)),
2735 (long) read_register (tdep
->SR_REGNUM
),
2736 (long) read_register (tdep
->PR_REGNUM
),
2737 (long) read_register (MACH_REGNUM
),
2738 (long) read_register (MACL_REGNUM
));
2740 printf_filtered ("GBR=%08lx VBR=%08lx",
2741 (long) read_register (GBR_REGNUM
),
2742 (long) read_register (VBR_REGNUM
));
2743 printf_filtered (" SSR=%08lx SPC=%08lx",
2744 (long) read_register (tdep
->SSR_REGNUM
),
2745 (long) read_register (tdep
->SPC_REGNUM
));
2746 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
2747 (long) read_register (tdep
->FPUL_REGNUM
),
2748 (long) read_register (tdep
->FPSCR_REGNUM
));
2750 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2751 (long) read_register (0),
2752 (long) read_register (1),
2753 (long) read_register (2),
2754 (long) read_register (3),
2755 (long) read_register (4),
2756 (long) read_register (5),
2757 (long) read_register (6),
2758 (long) read_register (7));
2759 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2760 (long) read_register (8),
2761 (long) read_register (9),
2762 (long) read_register (10),
2763 (long) read_register (11),
2764 (long) read_register (12),
2765 (long) read_register (13),
2766 (long) read_register (14),
2767 (long) read_register (15));
2769 printf_filtered ((pr
2770 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
2771 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
2772 (long) read_register (FP0_REGNUM
+ 0),
2773 (long) read_register (FP0_REGNUM
+ 1),
2774 (long) read_register (FP0_REGNUM
+ 2),
2775 (long) read_register (FP0_REGNUM
+ 3),
2776 (long) read_register (FP0_REGNUM
+ 4),
2777 (long) read_register (FP0_REGNUM
+ 5),
2778 (long) read_register (FP0_REGNUM
+ 6),
2779 (long) read_register (FP0_REGNUM
+ 7));
2780 printf_filtered ((pr
2781 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
2782 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
2783 (long) read_register (FP0_REGNUM
+ 8),
2784 (long) read_register (FP0_REGNUM
+ 9),
2785 (long) read_register (FP0_REGNUM
+ 10),
2786 (long) read_register (FP0_REGNUM
+ 11),
2787 (long) read_register (FP0_REGNUM
+ 12),
2788 (long) read_register (FP0_REGNUM
+ 13),
2789 (long) read_register (FP0_REGNUM
+ 14),
2790 (long) read_register (FP0_REGNUM
+ 15));
2794 sh_dsp_show_regs (void)
2796 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2798 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
2799 paddr (read_register (PC_REGNUM
)),
2800 (long) read_register (tdep
->SR_REGNUM
),
2801 (long) read_register (tdep
->PR_REGNUM
),
2802 (long) read_register (MACH_REGNUM
),
2803 (long) read_register (MACL_REGNUM
));
2805 printf_filtered ("GBR=%08lx VBR=%08lx",
2806 (long) read_register (GBR_REGNUM
),
2807 (long) read_register (VBR_REGNUM
));
2809 printf_filtered (" DSR=%08lx",
2810 (long) read_register (tdep
->DSR_REGNUM
));
2812 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2813 (long) read_register (0),
2814 (long) read_register (1),
2815 (long) read_register (2),
2816 (long) read_register (3),
2817 (long) read_register (4),
2818 (long) read_register (5),
2819 (long) read_register (6),
2820 (long) read_register (7));
2821 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2822 (long) read_register (8),
2823 (long) read_register (9),
2824 (long) read_register (10),
2825 (long) read_register (11),
2826 (long) read_register (12),
2827 (long) read_register (13),
2828 (long) read_register (14),
2829 (long) read_register (15));
2831 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
2832 (long) read_register (tdep
->A0G_REGNUM
) & 0xff,
2833 (long) read_register (tdep
->A0_REGNUM
),
2834 (long) read_register (tdep
->M0_REGNUM
),
2835 (long) read_register (tdep
->X0_REGNUM
),
2836 (long) read_register (tdep
->Y0_REGNUM
),
2837 (long) read_register (tdep
->RS_REGNUM
),
2838 (long) read_register (tdep
->MOD_REGNUM
));
2839 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
2840 (long) read_register (tdep
->A1G_REGNUM
) & 0xff,
2841 (long) read_register (tdep
->A1_REGNUM
),
2842 (long) read_register (tdep
->M1_REGNUM
),
2843 (long) read_register (tdep
->X1_REGNUM
),
2844 (long) read_register (tdep
->Y1_REGNUM
),
2845 (long) read_register (tdep
->RE_REGNUM
));
2849 sh64_show_media_regs (void)
2852 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2854 printf_filtered ("PC=%s SR=%016llx \n",
2855 paddr (read_register (PC_REGNUM
)),
2856 (long long) read_register (tdep
->SR_REGNUM
));
2858 printf_filtered ("SSR=%016llx SPC=%016llx \n",
2859 (long long) read_register (tdep
->SSR_REGNUM
),
2860 (long long) read_register (tdep
->SPC_REGNUM
));
2861 printf_filtered ("FPSCR=%016lx\n ",
2862 (long) read_register (tdep
->FPSCR_REGNUM
));
2864 for (i
= 0; i
< 64; i
= i
+ 4)
2865 printf_filtered ("\nR%d-R%d %016llx %016llx %016llx %016llx\n",
2867 (long long) read_register (i
+ 0),
2868 (long long) read_register (i
+ 1),
2869 (long long) read_register (i
+ 2),
2870 (long long) read_register (i
+ 3));
2872 printf_filtered ("\n");
2874 for (i
= 0; i
< 64; i
= i
+ 8)
2875 printf_filtered ("FR%d-FR%d %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2877 (long) read_register (FP0_REGNUM
+ i
+ 0),
2878 (long) read_register (FP0_REGNUM
+ i
+ 1),
2879 (long) read_register (FP0_REGNUM
+ i
+ 2),
2880 (long) read_register (FP0_REGNUM
+ i
+ 3),
2881 (long) read_register (FP0_REGNUM
+ i
+ 4),
2882 (long) read_register (FP0_REGNUM
+ i
+ 5),
2883 (long) read_register (FP0_REGNUM
+ i
+ 6),
2884 (long) read_register (FP0_REGNUM
+ i
+ 7));
2888 sh64_show_compact_regs (void)
2891 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2893 printf_filtered ("PC=%s \n",
2894 paddr (read_register (tdep
->PC_C_REGNUM
)));
2896 printf_filtered ("GBR=%08lx MACH=%08lx MACL=%08lx PR=%08lx T=%08lx\n",
2897 (long) read_register (tdep
->GBR_C_REGNUM
),
2898 (long) read_register (tdep
->MACH_C_REGNUM
),
2899 (long) read_register (tdep
->MACL_C_REGNUM
),
2900 (long) read_register (tdep
->PR_C_REGNUM
),
2901 (long) read_register (tdep
->T_C_REGNUM
));
2902 printf_filtered ("FPSCR=%08lx FPUL=%08lx\n",
2903 (long) read_register (tdep
->FPSCR_REGNUM
),
2904 (long) read_register (tdep
->FPUL_REGNUM
));
2906 for (i
= 0; i
< 16; i
= i
+ 4)
2907 printf_filtered ("\nR%d-R%d %08lx %08lx %08lx %08lx\n",
2909 (long) read_register (i
+ 0),
2910 (long) read_register (i
+ 1),
2911 (long) read_register (i
+ 2),
2912 (long) read_register (i
+ 3));
2914 printf_filtered ("\n");
2916 for (i
= 0; i
< 16; i
= i
+ 8)
2917 printf_filtered ("FR%d-FR%d %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2919 (long) read_register (FP0_REGNUM
+ i
+ 0),
2920 (long) read_register (FP0_REGNUM
+ i
+ 1),
2921 (long) read_register (FP0_REGNUM
+ i
+ 2),
2922 (long) read_register (FP0_REGNUM
+ i
+ 3),
2923 (long) read_register (FP0_REGNUM
+ i
+ 4),
2924 (long) read_register (FP0_REGNUM
+ i
+ 5),
2925 (long) read_register (FP0_REGNUM
+ i
+ 6),
2926 (long) read_register (FP0_REGNUM
+ i
+ 7));
2929 /*FIXME!!! This only shows the registers for shmedia, excluding the
2930 pseudo registers. */
2932 sh64_show_regs (void)
2934 if (pc_is_isa32 (get_frame_pc (deprecated_selected_frame
)))
2935 sh64_show_media_regs ();
2937 sh64_show_compact_regs ();
2940 void sh_show_regs_command (char *args
, int from_tty
)
2946 /* Index within `registers' of the first byte of the space for
2949 sh_default_register_byte (int reg_nr
)
2951 return (reg_nr
* 4);
2955 sh_sh4_register_byte (int reg_nr
)
2957 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2959 if (reg_nr
>= tdep
->DR0_REGNUM
2960 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
2961 return (dr_reg_base_num (reg_nr
) * 4);
2962 else if (reg_nr
>= tdep
->FV0_REGNUM
2963 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
2964 return (fv_reg_base_num (reg_nr
) * 4);
2966 return (reg_nr
* 4);
2971 SH MEDIA MODE (ISA 32)
2972 general registers (64-bit) 0-63
2973 0 r0, r1, r2, r3, r4, r5, r6, r7,
2974 64 r8, r9, r10, r11, r12, r13, r14, r15,
2975 128 r16, r17, r18, r19, r20, r21, r22, r23,
2976 192 r24, r25, r26, r27, r28, r29, r30, r31,
2977 256 r32, r33, r34, r35, r36, r37, r38, r39,
2978 320 r40, r41, r42, r43, r44, r45, r46, r47,
2979 384 r48, r49, r50, r51, r52, r53, r54, r55,
2980 448 r56, r57, r58, r59, r60, r61, r62, r63,
2985 status reg., saved status reg., saved pc reg. (64-bit) 65-67
2988 target registers (64-bit) 68-75
2989 544 tr0, tr1, tr2, tr3, tr4, tr5, tr6, tr7,
2991 floating point state control register (32-bit) 76
2994 single precision floating point registers (32-bit) 77-140
2995 612 fr0, fr1, fr2, fr3, fr4, fr5, fr6, fr7,
2996 644 fr8, fr9, fr10, fr11, fr12, fr13, fr14, fr15,
2997 676 fr16, fr17, fr18, fr19, fr20, fr21, fr22, fr23,
2998 708 fr24, fr25, fr26, fr27, fr28, fr29, fr30, fr31,
2999 740 fr32, fr33, fr34, fr35, fr36, fr37, fr38, fr39,
3000 772 fr40, fr41, fr42, fr43, fr44, fr45, fr46, fr47,
3001 804 fr48, fr49, fr50, fr51, fr52, fr53, fr54, fr55,
3002 836 fr56, fr57, fr58, fr59, fr60, fr61, fr62, fr63,
3004 TOTAL SPACE FOR REGISTERS: 868 bytes
3006 From here on they are all pseudo registers: no memory allocated.
3007 REGISTER_BYTE returns the register byte for the base register.
3009 double precision registers (pseudo) 141-172
3010 dr0, dr2, dr4, dr6, dr8, dr10, dr12, dr14,
3011 dr16, dr18, dr20, dr22, dr24, dr26, dr28, dr30,
3012 dr32, dr34, dr36, dr38, dr40, dr42, dr44, dr46,
3013 dr48, dr50, dr52, dr54, dr56, dr58, dr60, dr62,
3015 floating point pairs (pseudo) 173-204
3016 fp0, fp2, fp4, fp6, fp8, fp10, fp12, fp14,
3017 fp16, fp18, fp20, fp22, fp24, fp26, fp28, fp30,
3018 fp32, fp34, fp36, fp38, fp40, fp42, fp44, fp46,
3019 fp48, fp50, fp52, fp54, fp56, fp58, fp60, fp62,
3021 floating point vectors (4 floating point regs) (pseudo) 205-220
3022 fv0, fv4, fv8, fv12, fv16, fv20, fv24, fv28,
3023 fv32, fv36, fv40, fv44, fv48, fv52, fv56, fv60,
3025 SH COMPACT MODE (ISA 16) (all pseudo) 221-272
3026 r0_c, r1_c, r2_c, r3_c, r4_c, r5_c, r6_c, r7_c,
3027 r8_c, r9_c, r10_c, r11_c, r12_c, r13_c, r14_c, r15_c,
3029 gbr_c, mach_c, macl_c, pr_c, t_c,
3031 fr0_c, fr1_c, fr2_c, fr3_c, fr4_c, fr5_c, fr6_c, fr7_c,
3032 fr8_c, fr9_c, fr10_c, fr11_c, fr12_c, fr13_c, fr14_c, fr15_c
3033 dr0_c, dr2_c, dr4_c, dr6_c, dr8_c, dr10_c, dr12_c, dr14_c
3034 fv0_c, fv4_c, fv8_c, fv12_c
3038 sh_sh64_register_byte (int reg_nr
)
3040 int base_regnum
= -1;
3041 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3043 /* If it is a pseudo register, get the number of the first floating
3044 point register that is part of it. */
3045 if (reg_nr
>= tdep
->DR0_REGNUM
3046 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3047 base_regnum
= dr_reg_base_num (reg_nr
);
3049 else if (reg_nr
>= tdep
->FPP0_REGNUM
3050 && reg_nr
<= tdep
->FPP_LAST_REGNUM
)
3051 base_regnum
= fpp_reg_base_num (reg_nr
);
3053 else if (reg_nr
>= tdep
->FV0_REGNUM
3054 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3055 base_regnum
= fv_reg_base_num (reg_nr
);
3057 /* sh compact pseudo register. FPSCR is a pathological case, need to
3058 treat it as special. */
3059 else if ((reg_nr
>= tdep
->R0_C_REGNUM
3060 && reg_nr
<= tdep
->FV_LAST_C_REGNUM
)
3061 && reg_nr
!= tdep
->FPSCR_C_REGNUM
)
3062 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3064 /* Now return the offset in bytes within the register cache. */
3065 /* sh media pseudo register, i.e. any of DR, FFP, FV registers. */
3066 if (reg_nr
>= tdep
->DR0_REGNUM
3067 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3068 return (base_regnum
- FP0_REGNUM
+ 1) * 4
3069 + (tdep
->TR7_REGNUM
+ 1) * 8;
3071 /* sh compact pseudo register: general register */
3072 if ((reg_nr
>= tdep
->R0_C_REGNUM
3073 && reg_nr
<= tdep
->R_LAST_C_REGNUM
))
3074 return (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
3075 ? base_regnum
* 8 + 4
3078 /* sh compact pseudo register: */
3079 if (reg_nr
== tdep
->PC_C_REGNUM
3080 || reg_nr
== tdep
->GBR_C_REGNUM
3081 || reg_nr
== tdep
->MACL_C_REGNUM
3082 || reg_nr
== tdep
->PR_C_REGNUM
)
3083 return (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
3084 ? base_regnum
* 8 + 4
3087 if (reg_nr
== tdep
->MACH_C_REGNUM
)
3088 return base_regnum
* 8;
3090 if (reg_nr
== tdep
->T_C_REGNUM
)
3091 return base_regnum
* 8; /* FIXME??? how do we get bit 0? Do we have to? */
3093 /* sh compact pseudo register: floating point register */
3094 else if (reg_nr
>=tdep
->FP0_C_REGNUM
3095 && reg_nr
<= tdep
->FV_LAST_C_REGNUM
)
3096 return (base_regnum
- FP0_REGNUM
) * 4
3097 + (tdep
->TR7_REGNUM
+ 1) * 8 + 4;
3099 else if (reg_nr
== tdep
->FPSCR_C_REGNUM
)
3100 /* This is complicated, for now return the beginning of the
3101 architectural FPSCR register. */
3102 return (tdep
->TR7_REGNUM
+ 1) * 8;
3104 else if (reg_nr
== tdep
->FPUL_C_REGNUM
)
3105 return ((base_regnum
- FP0_REGNUM
) * 4 +
3106 (tdep
->TR7_REGNUM
+ 1) * 8 + 4);
3108 /* It is not a pseudo register. */
3109 /* It is a 64 bit register. */
3110 else if (reg_nr
<= tdep
->TR7_REGNUM
)
3113 /* It is a 32 bit register. */
3115 if (reg_nr
== tdep
->FPSCR_REGNUM
)
3116 return (tdep
->FPSCR_REGNUM
* 8);
3118 /* It is floating point 32-bit register */
3120 return ((tdep
->TR7_REGNUM
+ 1) * 8
3121 + (reg_nr
- FP0_REGNUM
+ 1) * 4);
3124 /* Number of bytes of storage in the actual machine representation for
3127 sh_default_register_raw_size (int reg_nr
)
3133 sh_sh4_register_raw_size (int reg_nr
)
3135 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3137 if (reg_nr
>= tdep
->DR0_REGNUM
3138 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3140 else if (reg_nr
>= tdep
->FV0_REGNUM
3141 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3148 sh_sh64_register_raw_size (int reg_nr
)
3150 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3152 if ((reg_nr
>= tdep
->DR0_REGNUM
3153 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3154 || (reg_nr
>= tdep
->FPP0_REGNUM
3155 && reg_nr
<= tdep
->FPP_LAST_REGNUM
)
3156 || (reg_nr
>= tdep
->DR0_C_REGNUM
3157 && reg_nr
<= tdep
->DR_LAST_C_REGNUM
)
3158 || (reg_nr
<= tdep
->TR7_REGNUM
))
3161 else if ((reg_nr
>= tdep
->FV0_REGNUM
3162 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3163 || (reg_nr
>= tdep
->FV0_C_REGNUM
3164 && reg_nr
<= tdep
->FV_LAST_C_REGNUM
))
3167 else /* this covers also the 32-bit SH compact registers. */
3171 /* Number of bytes of storage in the program's representation
3174 sh_register_virtual_size (int reg_nr
)
3181 sh_sh64_register_virtual_size (int reg_nr
)
3183 if (reg_nr
>= FP0_REGNUM
3184 && reg_nr
<= gdbarch_tdep (current_gdbarch
)->FP_LAST_REGNUM
)
3190 /* Return the GDB type object for the "standard" data type
3191 of data in register N. */
3192 static struct type
*
3193 sh_sh3e_register_virtual_type (int reg_nr
)
3195 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3197 if ((reg_nr
>= FP0_REGNUM
3198 && (reg_nr
<= tdep
->FP_LAST_REGNUM
))
3199 || (reg_nr
== tdep
->FPUL_REGNUM
))
3200 return builtin_type_float
;
3202 return builtin_type_int
;
3205 static struct type
*
3206 sh_sh4_build_float_register_type (int high
)
3210 temp
= create_range_type (NULL
, builtin_type_int
, 0, high
);
3211 return create_array_type (NULL
, builtin_type_float
, temp
);
3214 static struct type
*
3215 sh_sh4_register_virtual_type (int reg_nr
)
3217 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3219 if ((reg_nr
>= FP0_REGNUM
3220 && (reg_nr
<= tdep
->FP_LAST_REGNUM
))
3221 || (reg_nr
== tdep
->FPUL_REGNUM
))
3222 return builtin_type_float
;
3223 else if (reg_nr
>= tdep
->DR0_REGNUM
3224 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3225 return builtin_type_double
;
3226 else if (reg_nr
>= tdep
->FV0_REGNUM
3227 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3228 return sh_sh4_build_float_register_type (3);
3230 return builtin_type_int
;
3233 static struct type
*
3234 sh_sh64_register_virtual_type (int reg_nr
)
3236 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3238 if ((reg_nr
>= FP0_REGNUM
3239 && reg_nr
<= tdep
->FP_LAST_REGNUM
)
3240 || (reg_nr
>= tdep
->FP0_C_REGNUM
3241 && reg_nr
<= tdep
->FP_LAST_C_REGNUM
))
3242 return builtin_type_float
;
3243 else if ((reg_nr
>= tdep
->DR0_REGNUM
3244 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3245 || (reg_nr
>= tdep
->DR0_C_REGNUM
3246 && reg_nr
<= tdep
->DR_LAST_C_REGNUM
))
3247 return builtin_type_double
;
3248 else if (reg_nr
>= tdep
->FPP0_REGNUM
3249 && reg_nr
<= tdep
->FPP_LAST_REGNUM
)
3250 return sh_sh4_build_float_register_type (1);
3251 else if ((reg_nr
>= tdep
->FV0_REGNUM
3252 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3253 ||(reg_nr
>= tdep
->FV0_C_REGNUM
3254 && reg_nr
<= tdep
->FV_LAST_C_REGNUM
))
3255 return sh_sh4_build_float_register_type (3);
3256 else if (reg_nr
== tdep
->FPSCR_REGNUM
)
3257 return builtin_type_int
;
3258 else if (reg_nr
>= tdep
->R0_C_REGNUM
3259 && reg_nr
< tdep
->FP0_C_REGNUM
)
3260 return builtin_type_int
;
3262 return builtin_type_long_long
;
3265 static struct type
*
3266 sh_default_register_virtual_type (int reg_nr
)
3268 return builtin_type_int
;
3271 /* On the sh4, the DRi pseudo registers are problematic if the target
3272 is little endian. When the user writes one of those registers, for
3273 instance with 'ser var $dr0=1', we want the double to be stored
3275 fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
3276 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
3278 This corresponds to little endian byte order & big endian word
3279 order. However if we let gdb write the register w/o conversion, it
3280 will write fr0 and fr1 this way:
3281 fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
3282 fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
3283 because it will consider fr0 and fr1 as a single LE stretch of memory.
3285 To achieve what we want we must force gdb to store things in
3286 floatformat_ieee_double_littlebyte_bigword (which is defined in
3287 include/floatformat.h and libiberty/floatformat.c.
3289 In case the target is big endian, there is no problem, the
3290 raw bytes will look like:
3291 fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
3292 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
3294 The other pseudo registers (the FVs) also don't pose a problem
3295 because they are stored as 4 individual FP elements. */
3298 sh_sh4_register_convert_to_virtual (int regnum
, struct type
*type
,
3299 char *from
, char *to
)
3301 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3303 if (regnum
>= tdep
->DR0_REGNUM
3304 && regnum
<= tdep
->DR_LAST_REGNUM
)
3307 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword
, from
, &val
);
3308 store_floating (to
, TYPE_LENGTH (type
), val
);
3311 error ("sh_register_convert_to_virtual called with non DR register number");
3315 sh_sh64_register_convert_to_virtual (int regnum
, struct type
*type
,
3316 char *from
, char *to
)
3318 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3320 if (TARGET_BYTE_ORDER
!= BFD_ENDIAN_LITTLE
)
3322 /* It is a no-op. */
3323 memcpy (to
, from
, REGISTER_RAW_SIZE (regnum
));
3327 if ((regnum
>= tdep
->DR0_REGNUM
3328 && regnum
<= tdep
->DR_LAST_REGNUM
)
3329 || (regnum
>= tdep
->DR0_C_REGNUM
3330 && regnum
<= tdep
->DR_LAST_C_REGNUM
))
3333 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword
, from
, &val
);
3334 store_floating(to
, TYPE_LENGTH(type
), val
);
3337 error("sh_register_convert_to_virtual called with non DR register number");
3341 sh_sh4_register_convert_to_raw (struct type
*type
, int regnum
,
3342 const void *from
, void *to
)
3344 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3346 if (regnum
>= tdep
->DR0_REGNUM
3347 && regnum
<= tdep
->DR_LAST_REGNUM
)
3349 DOUBLEST val
= extract_floating (from
, TYPE_LENGTH(type
));
3350 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword
, &val
, to
);
3353 error("sh_register_convert_to_raw called with non DR register number");
3357 sh_sh64_register_convert_to_raw (struct type
*type
, int regnum
,
3358 const void *from
, void *to
)
3360 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3362 if (TARGET_BYTE_ORDER
!= BFD_ENDIAN_LITTLE
)
3364 /* It is a no-op. */
3365 memcpy (to
, from
, REGISTER_RAW_SIZE (regnum
));
3369 if ((regnum
>= tdep
->DR0_REGNUM
3370 && regnum
<= tdep
->DR_LAST_REGNUM
)
3371 || (regnum
>= tdep
->DR0_C_REGNUM
3372 && regnum
<= tdep
->DR_LAST_C_REGNUM
))
3374 DOUBLEST val
= extract_floating (from
, TYPE_LENGTH(type
));
3375 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword
, &val
, to
);
3378 error("sh_register_convert_to_raw called with non DR register number");
3382 sh_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3383 int reg_nr
, void *buffer
)
3385 int base_regnum
, portion
;
3386 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
3387 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3389 if (reg_nr
>= tdep
->DR0_REGNUM
3390 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3392 base_regnum
= dr_reg_base_num (reg_nr
);
3394 /* Build the value in the provided buffer. */
3395 /* Read the real regs for which this one is an alias. */
3396 for (portion
= 0; portion
< 2; portion
++)
3397 regcache_raw_read (regcache
, base_regnum
+ portion
,
3399 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3400 /* We must pay attention to the endiannes. */
3401 sh_sh4_register_convert_to_virtual (reg_nr
,
3402 REGISTER_VIRTUAL_TYPE (reg_nr
),
3403 temp_buffer
, buffer
);
3405 else if (reg_nr
>= tdep
->FV0_REGNUM
3406 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3408 base_regnum
= fv_reg_base_num (reg_nr
);
3410 /* Read the real regs for which this one is an alias. */
3411 for (portion
= 0; portion
< 4; portion
++)
3412 regcache_raw_read (regcache
, base_regnum
+ portion
,
3414 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3419 sh64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3420 int reg_nr
, void *buffer
)
3425 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
3426 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3428 if (reg_nr
>= tdep
->DR0_REGNUM
3429 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3431 base_regnum
= dr_reg_base_num (reg_nr
);
3433 /* Build the value in the provided buffer. */
3434 /* DR regs are double precision registers obtained by
3435 concatenating 2 single precision floating point registers. */
3436 for (portion
= 0; portion
< 2; portion
++)
3437 regcache_raw_read (regcache
, base_regnum
+ portion
,
3439 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3441 /* We must pay attention to the endiannes. */
3442 sh_sh64_register_convert_to_virtual (reg_nr
, REGISTER_VIRTUAL_TYPE (reg_nr
),
3443 temp_buffer
, buffer
);
3447 else if (reg_nr
>= tdep
->FPP0_REGNUM
3448 && reg_nr
<= tdep
->FPP_LAST_REGNUM
)
3450 base_regnum
= fpp_reg_base_num (reg_nr
);
3452 /* Build the value in the provided buffer. */
3453 /* FPP regs are pairs of single precision registers obtained by
3454 concatenating 2 single precision floating point registers. */
3455 for (portion
= 0; portion
< 2; portion
++)
3456 regcache_raw_read (regcache
, base_regnum
+ portion
,
3458 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3461 else if (reg_nr
>= tdep
->FV0_REGNUM
3462 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3464 base_regnum
= fv_reg_base_num (reg_nr
);
3466 /* Build the value in the provided buffer. */
3467 /* FV regs are vectors of single precision registers obtained by
3468 concatenating 4 single precision floating point registers. */
3469 for (portion
= 0; portion
< 4; portion
++)
3470 regcache_raw_read (regcache
, base_regnum
+ portion
,
3472 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3475 /* sh compact pseudo registers. 1-to-1 with a shmedia register */
3476 else if (reg_nr
>= tdep
->R0_C_REGNUM
3477 && reg_nr
<= tdep
->T_C_REGNUM
)
3479 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3481 /* Build the value in the provided buffer. */
3482 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
3483 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
3485 memcpy (buffer
, temp_buffer
+ offset
, 4); /* get LOWER 32 bits only????*/
3488 else if (reg_nr
>= tdep
->FP0_C_REGNUM
3489 && reg_nr
<= tdep
->FP_LAST_C_REGNUM
)
3491 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3493 /* Build the value in the provided buffer. */
3494 /* Floating point registers map 1-1 to the media fp regs,
3495 they have the same size and endienness. */
3496 regcache_raw_read (regcache
, base_regnum
, buffer
);
3499 else if (reg_nr
>= tdep
->DR0_C_REGNUM
3500 && reg_nr
<= tdep
->DR_LAST_C_REGNUM
)
3502 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3504 /* DR_C regs are double precision registers obtained by
3505 concatenating 2 single precision floating point registers. */
3506 for (portion
= 0; portion
< 2; portion
++)
3507 regcache_raw_read (regcache
, base_regnum
+ portion
,
3509 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3511 /* We must pay attention to the endiannes. */
3512 sh_sh64_register_convert_to_virtual (reg_nr
, REGISTER_VIRTUAL_TYPE (reg_nr
),
3513 temp_buffer
, buffer
);
3516 else if (reg_nr
>= tdep
->FV0_C_REGNUM
3517 && reg_nr
<= tdep
->FV_LAST_C_REGNUM
)
3519 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3521 /* Build the value in the provided buffer. */
3522 /* FV_C regs are vectors of single precision registers obtained by
3523 concatenating 4 single precision floating point registers. */
3524 for (portion
= 0; portion
< 4; portion
++)
3525 regcache_raw_read (regcache
, base_regnum
+ portion
,
3527 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3530 else if (reg_nr
== tdep
->FPSCR_C_REGNUM
)
3532 int fpscr_base_regnum
;
3534 unsigned int fpscr_value
;
3535 unsigned int sr_value
;
3536 unsigned int fpscr_c_value
;
3537 unsigned int fpscr_c_part1_value
;
3538 unsigned int fpscr_c_part2_value
;
3540 fpscr_base_regnum
= tdep
->FPSCR_REGNUM
;
3541 sr_base_regnum
= tdep
->SR_REGNUM
;
3543 /* Build the value in the provided buffer. */
3544 /* FPSCR_C is a very weird register that contains sparse bits
3545 from the FPSCR and the SR architectural registers.
3552 2-17 Bit 2-18 of FPSCR
3553 18-20 Bits 12,13,14 of SR
3557 /* Get FPSCR into a local buffer */
3558 regcache_raw_read (regcache
, fpscr_base_regnum
, temp_buffer
);
3559 /* Get value as an int. */
3560 fpscr_value
= extract_unsigned_integer (temp_buffer
, 4);
3561 /* Get SR into a local buffer */
3562 regcache_raw_read (regcache
, sr_base_regnum
, temp_buffer
);
3563 /* Get value as an int. */
3564 sr_value
= extract_unsigned_integer (temp_buffer
, 4);
3565 /* Build the new value. */
3566 fpscr_c_part1_value
= fpscr_value
& 0x3fffd;
3567 fpscr_c_part2_value
= (sr_value
& 0x7000) << 6;
3568 fpscr_c_value
= fpscr_c_part1_value
| fpscr_c_part2_value
;
3569 /* Store that in out buffer!!! */
3570 store_unsigned_integer (buffer
, 4, fpscr_c_value
);
3571 /* FIXME There is surely an endianness gotcha here. */
3574 else if (reg_nr
== tdep
->FPUL_C_REGNUM
)
3576 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3578 /* FPUL_C register is floating point register 32,
3579 same size, same endianness. */
3580 regcache_raw_read (regcache
, base_regnum
, buffer
);
3585 sh_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3586 int reg_nr
, const void *buffer
)
3588 int base_regnum
, portion
;
3589 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
3590 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3592 if (reg_nr
>= tdep
->DR0_REGNUM
3593 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3595 base_regnum
= dr_reg_base_num (reg_nr
);
3597 /* We must pay attention to the endiannes. */
3598 sh_sh4_register_convert_to_raw (REGISTER_VIRTUAL_TYPE (reg_nr
), reg_nr
,
3599 buffer
, temp_buffer
);
3601 /* Write the real regs for which this one is an alias. */
3602 for (portion
= 0; portion
< 2; portion
++)
3603 regcache_raw_write (regcache
, base_regnum
+ portion
,
3605 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3607 else if (reg_nr
>= tdep
->FV0_REGNUM
3608 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3610 base_regnum
= fv_reg_base_num (reg_nr
);
3612 /* Write the real regs for which this one is an alias. */
3613 for (portion
= 0; portion
< 4; portion
++)
3614 regcache_raw_write (regcache
, base_regnum
+ portion
,
3616 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3621 sh64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3622 int reg_nr
, const void *buffer
)
3624 int base_regnum
, portion
;
3626 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
3627 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3629 if (reg_nr
>= tdep
->DR0_REGNUM
3630 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3632 base_regnum
= dr_reg_base_num (reg_nr
);
3633 /* We must pay attention to the endiannes. */
3634 sh_sh64_register_convert_to_raw (REGISTER_VIRTUAL_TYPE (reg_nr
), reg_nr
,
3635 buffer
, temp_buffer
);
3638 /* Write the real regs for which this one is an alias. */
3639 for (portion
= 0; portion
< 2; portion
++)
3640 regcache_raw_write (regcache
, base_regnum
+ portion
,
3642 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3645 else if (reg_nr
>= tdep
->FPP0_REGNUM
3646 && reg_nr
<= tdep
->FPP_LAST_REGNUM
)
3648 base_regnum
= fpp_reg_base_num (reg_nr
);
3650 /* Write the real regs for which this one is an alias. */
3651 for (portion
= 0; portion
< 2; portion
++)
3652 regcache_raw_write (regcache
, base_regnum
+ portion
,
3654 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3657 else if (reg_nr
>= tdep
->FV0_REGNUM
3658 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3660 base_regnum
= fv_reg_base_num (reg_nr
);
3662 /* Write the real regs for which this one is an alias. */
3663 for (portion
= 0; portion
< 4; portion
++)
3664 regcache_raw_write (regcache
, base_regnum
+ portion
,
3666 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3669 /* sh compact general pseudo registers. 1-to-1 with a shmedia
3670 register but only 4 bytes of it. */
3671 else if (reg_nr
>= tdep
->R0_C_REGNUM
3672 && reg_nr
<= tdep
->T_C_REGNUM
)
3674 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3675 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
3676 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
3680 /* Let's read the value of the base register into a temporary
3681 buffer, so that overwriting the last four bytes with the new
3682 value of the pseudo will leave the upper 4 bytes unchanged. */
3683 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
3684 /* Write as an 8 byte quantity */
3685 memcpy (temp_buffer
+ offset
, buffer
, 4);
3686 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
3689 /* sh floating point compact pseudo registers. 1-to-1 with a shmedia
3690 registers. Both are 4 bytes. */
3691 else if (reg_nr
>= tdep
->FP0_C_REGNUM
3692 && reg_nr
<= tdep
->FP_LAST_C_REGNUM
)
3694 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3695 regcache_raw_write (regcache
, base_regnum
, buffer
);
3698 else if (reg_nr
>= tdep
->DR0_C_REGNUM
3699 && reg_nr
<= tdep
->DR_LAST_C_REGNUM
)
3701 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3702 for (portion
= 0; portion
< 2; portion
++)
3704 /* We must pay attention to the endiannes. */
3705 sh_sh64_register_convert_to_raw (REGISTER_VIRTUAL_TYPE (reg_nr
), reg_nr
,
3706 buffer
, temp_buffer
);
3708 regcache_raw_write (regcache
, base_regnum
+ portion
,
3710 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3714 else if (reg_nr
>= tdep
->FV0_C_REGNUM
3715 && reg_nr
<= tdep
->FV_LAST_C_REGNUM
)
3717 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3719 for (portion
= 0; portion
< 4; portion
++)
3721 regcache_raw_write (regcache
, base_regnum
+ portion
,
3723 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3727 else if (reg_nr
== tdep
->FPSCR_C_REGNUM
)
3729 int fpscr_base_regnum
;
3731 unsigned int fpscr_value
;
3732 unsigned int sr_value
;
3733 unsigned int old_fpscr_value
;
3734 unsigned int old_sr_value
;
3735 unsigned int fpscr_c_value
;
3736 unsigned int fpscr_mask
;
3737 unsigned int sr_mask
;
3739 fpscr_base_regnum
= tdep
->FPSCR_REGNUM
;
3740 sr_base_regnum
= tdep
->SR_REGNUM
;
3742 /* FPSCR_C is a very weird register that contains sparse bits
3743 from the FPSCR and the SR architectural registers.
3750 2-17 Bit 2-18 of FPSCR
3751 18-20 Bits 12,13,14 of SR
3755 /* Get value as an int. */
3756 fpscr_c_value
= extract_unsigned_integer (buffer
, 4);
3758 /* Build the new values. */
3759 fpscr_mask
= 0x0003fffd;
3760 sr_mask
= 0x001c0000;
3762 fpscr_value
= fpscr_c_value
& fpscr_mask
;
3763 sr_value
= (fpscr_value
& sr_mask
) >> 6;
3765 regcache_raw_read (regcache
, fpscr_base_regnum
, temp_buffer
);
3766 old_fpscr_value
= extract_unsigned_integer (temp_buffer
, 4);
3767 old_fpscr_value
&= 0xfffc0002;
3768 fpscr_value
|= old_fpscr_value
;
3769 store_unsigned_integer (temp_buffer
, 4, fpscr_value
);
3770 regcache_raw_write (regcache
, fpscr_base_regnum
, temp_buffer
);
3772 regcache_raw_read (regcache
, sr_base_regnum
, temp_buffer
);
3773 old_sr_value
= extract_unsigned_integer (temp_buffer
, 4);
3774 old_sr_value
&= 0xffff8fff;
3775 sr_value
|= old_sr_value
;
3776 store_unsigned_integer (temp_buffer
, 4, sr_value
);
3777 regcache_raw_write (regcache
, sr_base_regnum
, temp_buffer
);
3780 else if (reg_nr
== tdep
->FPUL_C_REGNUM
)
3782 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3783 regcache_raw_write (regcache
, base_regnum
, buffer
);
3787 /* Floating point vector of 4 float registers. */
3789 do_fv_register_info (int fv_regnum
)
3791 int first_fp_reg_num
= fv_reg_base_num (fv_regnum
);
3792 printf_filtered ("fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
3793 fv_regnum
- gdbarch_tdep (current_gdbarch
)->FV0_REGNUM
,
3794 (int) read_register (first_fp_reg_num
),
3795 (int) read_register (first_fp_reg_num
+ 1),
3796 (int) read_register (first_fp_reg_num
+ 2),
3797 (int) read_register (first_fp_reg_num
+ 3));
3800 /* Floating point vector of 4 float registers, compact mode. */
3802 do_fv_c_register_info (int fv_regnum
)
3804 int first_fp_reg_num
= sh64_compact_reg_base_num (fv_regnum
);
3805 printf_filtered ("fv%d_c\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
3806 fv_regnum
- gdbarch_tdep (current_gdbarch
)->FV0_C_REGNUM
,
3807 (int) read_register (first_fp_reg_num
),
3808 (int) read_register (first_fp_reg_num
+ 1),
3809 (int) read_register (first_fp_reg_num
+ 2),
3810 (int) read_register (first_fp_reg_num
+ 3));
3813 /* Pairs of single regs. The DR are instead double precision
3816 do_fpp_register_info (int fpp_regnum
)
3818 int first_fp_reg_num
= fpp_reg_base_num (fpp_regnum
);
3820 printf_filtered ("fpp%d\t0x%08x\t0x%08x\n",
3821 fpp_regnum
- gdbarch_tdep (current_gdbarch
)->FPP0_REGNUM
,
3822 (int) read_register (first_fp_reg_num
),
3823 (int) read_register (first_fp_reg_num
+ 1));
3826 /* Double precision registers. */
3828 do_dr_register_info (int dr_regnum
)
3830 int first_fp_reg_num
= dr_reg_base_num (dr_regnum
);
3832 printf_filtered ("dr%d\t0x%08x%08x\n",
3833 dr_regnum
- gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
,
3834 (int) read_register (first_fp_reg_num
),
3835 (int) read_register (first_fp_reg_num
+ 1));
3838 /* Double precision registers, compact mode. */
3840 do_dr_c_register_info (int dr_regnum
)
3842 int first_fp_reg_num
= sh64_compact_reg_base_num (dr_regnum
);
3844 printf_filtered ("dr%d_c\t0x%08x%08x\n",
3845 dr_regnum
- gdbarch_tdep (current_gdbarch
)->DR0_C_REGNUM
,
3846 (int) read_register (first_fp_reg_num
),
3847 (int) read_register (first_fp_reg_num
+1));
3850 /* General register in compact mode. */
3852 do_r_c_register_info (int r_c_regnum
)
3854 int regnum
= sh64_compact_reg_base_num (r_c_regnum
);
3856 printf_filtered ("r%d_c\t0x%08x\n",
3857 r_c_regnum
- gdbarch_tdep (current_gdbarch
)->R0_C_REGNUM
,
3858 /*FIXME!!!*/ (int) read_register (regnum
));
3861 /* FIXME:!! THIS SHOULD TAKE CARE OF GETTING THE RIGHT PORTION OF THE
3862 shmedia REGISTERS. */
3863 /* Control registers, compact mode. */
3865 do_cr_c_register_info (int cr_c_regnum
)
3867 switch (cr_c_regnum
)
3869 case 237: printf_filtered ("pc_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
3871 case 238: printf_filtered ("gbr_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
3873 case 239: printf_filtered ("mach_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
3875 case 240: printf_filtered ("macl_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
3877 case 241: printf_filtered ("pr_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
3879 case 242: printf_filtered ("t_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
3881 case 243: printf_filtered ("fpscr_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
3883 case 244: printf_filtered ("fpul_c\t0x%08x\n", (int)read_register (cr_c_regnum
));
3889 sh_do_pseudo_register (int regnum
)
3891 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3893 if (regnum
< NUM_REGS
|| regnum
>= NUM_REGS
+ NUM_PSEUDO_REGS
)
3894 internal_error (__FILE__
, __LINE__
,
3895 "Invalid pseudo register number %d\n", regnum
);
3896 else if (regnum
>= tdep
->DR0_REGNUM
3897 && regnum
< tdep
->DR_LAST_REGNUM
)
3898 do_dr_register_info (regnum
);
3899 else if (regnum
>= tdep
->FV0_REGNUM
3900 && regnum
<= tdep
->FV_LAST_REGNUM
)
3901 do_fv_register_info (regnum
);
3905 sh_do_fp_register (int regnum
)
3906 { /* do values for FP (float) regs */
3908 double flt
; /* double extracted from raw hex data */
3912 /* Allocate space for the float. */
3913 raw_buffer
= (char *) alloca (REGISTER_RAW_SIZE (FP0_REGNUM
));
3915 /* Get the data in raw format. */
3916 if (!frame_register_read (deprecated_selected_frame
, regnum
, raw_buffer
))
3917 error ("can't read register %d (%s)", regnum
, REGISTER_NAME (regnum
));
3919 /* Get the register as a number */
3920 flt
= unpack_double (builtin_type_float
, raw_buffer
, &inv
);
3922 /* Print the name and some spaces. */
3923 fputs_filtered (REGISTER_NAME (regnum
), gdb_stdout
);
3924 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum
)), gdb_stdout
);
3926 /* Print the value. */
3928 printf_filtered ("<invalid float>");
3930 printf_filtered ("%-10.9g", flt
);
3932 /* Print the fp register as hex. */
3933 printf_filtered ("\t(raw 0x");
3934 for (j
= 0; j
< REGISTER_RAW_SIZE (regnum
); j
++)
3936 register int idx
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? j
3937 : REGISTER_RAW_SIZE (regnum
) - 1 - j
;
3938 printf_filtered ("%02x", (unsigned char) raw_buffer
[idx
]);
3940 printf_filtered (")");
3941 printf_filtered ("\n");
3945 sh64_do_pseudo_register (int regnum
)
3947 /* All the sh64-compact mode registers are pseudo registers. */
3948 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3950 if (regnum
< NUM_REGS
3951 || regnum
>= NUM_REGS
+ NUM_PSEUDO_REGS_SH_MEDIA
+ NUM_PSEUDO_REGS_SH_COMPACT
)
3952 internal_error (__FILE__
, __LINE__
,
3953 "Invalid pseudo register number %d\n", regnum
);
3955 else if ((regnum
>= tdep
->DR0_REGNUM
3956 && regnum
<= tdep
->DR_LAST_REGNUM
))
3957 do_dr_register_info (regnum
);
3959 else if ((regnum
>= tdep
->DR0_C_REGNUM
3960 && regnum
<= tdep
->DR_LAST_C_REGNUM
))
3961 do_dr_c_register_info (regnum
);
3963 else if ((regnum
>= tdep
->FV0_REGNUM
3964 && regnum
<= tdep
->FV_LAST_REGNUM
))
3965 do_fv_register_info (regnum
);
3967 else if ((regnum
>= tdep
->FV0_C_REGNUM
3968 && regnum
<= tdep
->FV_LAST_C_REGNUM
))
3969 do_fv_c_register_info (regnum
);
3971 else if (regnum
>= tdep
->FPP0_REGNUM
3972 && regnum
<= tdep
->FPP_LAST_REGNUM
)
3973 do_fpp_register_info (regnum
);
3975 else if (regnum
>= tdep
->R0_C_REGNUM
3976 && regnum
<= tdep
->R_LAST_C_REGNUM
)
3977 do_r_c_register_info (regnum
); /* FIXME, this function will not print the right format */
3979 else if (regnum
>= tdep
->FP0_C_REGNUM
3980 && regnum
<= tdep
->FP_LAST_C_REGNUM
)
3981 sh_do_fp_register (regnum
); /* this should work also for pseudoregs */
3983 else if (regnum
>= tdep
->PC_C_REGNUM
3984 && regnum
<= tdep
->FPUL_C_REGNUM
)
3985 do_cr_c_register_info (regnum
);
3990 sh_do_register (int regnum
)
3992 char raw_buffer
[MAX_REGISTER_RAW_SIZE
];
3994 fputs_filtered (REGISTER_NAME (regnum
), gdb_stdout
);
3995 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum
)), gdb_stdout
);
3997 /* Get the data in raw format. */
3998 if (!frame_register_read (deprecated_selected_frame
, regnum
, raw_buffer
))
3999 printf_filtered ("*value not available*\n");
4001 val_print (REGISTER_VIRTUAL_TYPE (regnum
), raw_buffer
, 0, 0,
4002 gdb_stdout
, 'x', 1, 0, Val_pretty_default
);
4003 printf_filtered ("\t");
4004 val_print (REGISTER_VIRTUAL_TYPE (regnum
), raw_buffer
, 0, 0,
4005 gdb_stdout
, 0, 1, 0, Val_pretty_default
);
4006 printf_filtered ("\n");
4010 sh_print_register (int regnum
)
4012 if (regnum
< 0 || regnum
>= NUM_REGS
+ NUM_PSEUDO_REGS
)
4013 internal_error (__FILE__
, __LINE__
,
4014 "Invalid register number %d\n", regnum
);
4016 else if (regnum
>= 0 && regnum
< NUM_REGS
)
4018 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum
)) == TYPE_CODE_FLT
)
4019 sh_do_fp_register (regnum
); /* FP regs */
4021 sh_do_register (regnum
); /* All other regs */
4024 else if (regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
)
4025 do_pseudo_register (regnum
);
4029 sh_do_registers_info (int regnum
, int fpregs
)
4031 if (regnum
!= -1) /* do one specified register */
4033 if (*(REGISTER_NAME (regnum
)) == '\0')
4034 error ("Not a valid register for the current processor type");
4036 sh_print_register (regnum
);
4039 /* do all (or most) registers */
4042 while (regnum
< NUM_REGS
)
4044 /* If the register name is empty, it is undefined for this
4045 processor, so don't display anything. */
4046 if (REGISTER_NAME (regnum
) == NULL
4047 || *(REGISTER_NAME (regnum
)) == '\0')
4053 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum
)) == TYPE_CODE_FLT
)
4057 /* true for "INFO ALL-REGISTERS" command */
4058 sh_do_fp_register (regnum
); /* FP regs */
4062 regnum
+= (gdbarch_tdep (current_gdbarch
)->FP_LAST_REGNUM
- FP0_REGNUM
); /* skip FP regs */
4066 sh_do_register (regnum
); /* All other regs */
4072 while (regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
)
4074 do_pseudo_register (regnum
);
4081 sh_compact_do_registers_info (int regnum
, int fpregs
)
4083 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
4084 if (regnum
!= -1) /* do one specified register */
4086 if (*(REGISTER_NAME (regnum
)) == '\0')
4087 error ("Not a valid register for the current processor type");
4089 if (regnum
>= 0 && regnum
< tdep
->R0_C_REGNUM
)
4090 error ("Not a valid register for the current processor mode.");
4092 sh_print_register (regnum
);
4095 /* do all compact registers */
4097 regnum
= tdep
->R0_C_REGNUM
;
4098 while (regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
)
4100 do_pseudo_register (regnum
);
4107 sh64_do_registers_info (int regnum
, int fpregs
)
4109 if (pc_is_isa32 (get_frame_pc (deprecated_selected_frame
)))
4110 sh_do_registers_info (regnum
, fpregs
);
4112 sh_compact_do_registers_info (regnum
, fpregs
);
4115 #ifdef SVR4_SHARED_LIBS
4117 /* Fetch (and possibly build) an appropriate link_map_offsets structure
4118 for native i386 linux targets using the struct offsets defined in
4119 link.h (but without actual reference to that file).
4121 This makes it possible to access i386-linux shared libraries from
4122 a gdb that was not built on an i386-linux host (for cross debugging).
4125 struct link_map_offsets
*
4126 sh_linux_svr4_fetch_link_map_offsets (void)
4128 static struct link_map_offsets lmo
;
4129 static struct link_map_offsets
*lmp
= 0;
4135 lmo
.r_debug_size
= 8; /* 20 not actual size but all we need */
4137 lmo
.r_map_offset
= 4;
4140 lmo
.link_map_size
= 20; /* 552 not actual size but all we need */
4142 lmo
.l_addr_offset
= 0;
4143 lmo
.l_addr_size
= 4;
4145 lmo
.l_name_offset
= 4;
4146 lmo
.l_name_size
= 4;
4148 lmo
.l_next_offset
= 12;
4149 lmo
.l_next_size
= 4;
4151 lmo
.l_prev_offset
= 16;
4152 lmo
.l_prev_size
= 4;
4157 #endif /* SVR4_SHARED_LIBS */
4162 DSP_DSR_REGNUM
= 24,
4174 DSP_MOD_REGNUM
= 40,
4179 DSP_R0_BANK_REGNUM
= 51,
4180 DSP_R7_BANK_REGNUM
= DSP_R0_BANK_REGNUM
+ 7
4184 sh_dsp_register_sim_regno (int nr
)
4186 if (legacy_register_sim_regno (nr
) < 0)
4187 return legacy_register_sim_regno (nr
);
4188 if (nr
>= DSP_DSR_REGNUM
&& nr
< DSP_Y1_REGNUM
)
4189 return nr
- DSP_DSR_REGNUM
+ SIM_SH_DSR_REGNUM
;
4190 if (nr
== DSP_MOD_REGNUM
)
4191 return SIM_SH_MOD_REGNUM
;
4192 if (nr
== DSP_RS_REGNUM
)
4193 return SIM_SH_RS_REGNUM
;
4194 if (nr
== DSP_RE_REGNUM
)
4195 return SIM_SH_RE_REGNUM
;
4196 if (nr
>= DSP_R0_BANK_REGNUM
&& nr
<= DSP_R7_BANK_REGNUM
)
4197 return nr
- DSP_R0_BANK_REGNUM
+ SIM_SH_R0_BANK_REGNUM
;
4201 static gdbarch_init_ftype sh_gdbarch_init
;
4203 static struct gdbarch
*
4204 sh_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
4206 static LONGEST sh_call_dummy_words
[] = {0};
4207 struct gdbarch
*gdbarch
;
4208 struct gdbarch_tdep
*tdep
;
4209 gdbarch_register_name_ftype
*sh_register_name
;
4210 gdbarch_deprecated_store_return_value_ftype
*sh_store_return_value
;
4211 gdbarch_register_virtual_type_ftype
*sh_register_virtual_type
;
4213 /* If there is already a candidate, use it. */
4214 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
4216 return arches
->gdbarch
;
4218 /* None found, create a new architecture from the information
4220 tdep
= XMALLOC (struct gdbarch_tdep
);
4221 gdbarch
= gdbarch_alloc (&info
, tdep
);
4223 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
4224 ready to unwind the PC first (see frame.c:get_prev_frame()). */
4225 set_gdbarch_deprecated_init_frame_pc (gdbarch
, init_frame_pc_default
);
4227 /* Initialize the register numbers that are not common to all the
4228 variants to -1, if necessary thse will be overwritten in the case
4230 tdep
->FPUL_REGNUM
= -1;
4231 tdep
->FPSCR_REGNUM
= -1;
4232 tdep
->PR_REGNUM
= 17;
4233 tdep
->SR_REGNUM
= 22;
4234 tdep
->DSR_REGNUM
= -1;
4235 tdep
->FP_LAST_REGNUM
= -1;
4236 tdep
->A0G_REGNUM
= -1;
4237 tdep
->A0_REGNUM
= -1;
4238 tdep
->A1G_REGNUM
= -1;
4239 tdep
->A1_REGNUM
= -1;
4240 tdep
->M0_REGNUM
= -1;
4241 tdep
->M1_REGNUM
= -1;
4242 tdep
->X0_REGNUM
= -1;
4243 tdep
->X1_REGNUM
= -1;
4244 tdep
->Y0_REGNUM
= -1;
4245 tdep
->Y1_REGNUM
= -1;
4246 tdep
->MOD_REGNUM
= -1;
4247 tdep
->RS_REGNUM
= -1;
4248 tdep
->RE_REGNUM
= -1;
4249 tdep
->SSR_REGNUM
= -1;
4250 tdep
->SPC_REGNUM
= -1;
4251 tdep
->DR0_REGNUM
= -1;
4252 tdep
->DR_LAST_REGNUM
= -1;
4253 tdep
->FV0_REGNUM
= -1;
4254 tdep
->FV_LAST_REGNUM
= -1;
4255 tdep
->ARG0_REGNUM
= 4;
4256 tdep
->ARGLAST_REGNUM
= 7;
4257 tdep
->RETURN_REGNUM
= 0;
4258 tdep
->FLOAT_ARGLAST_REGNUM
= -1;
4260 tdep
->sh_abi
= SH_ABI_UNKNOWN
;
4262 set_gdbarch_fp0_regnum (gdbarch
, -1);
4263 set_gdbarch_num_pseudo_regs (gdbarch
, 0);
4264 set_gdbarch_max_register_raw_size (gdbarch
, 4);
4265 set_gdbarch_max_register_virtual_size (gdbarch
, 4);
4266 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
4267 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
4268 set_gdbarch_num_regs (gdbarch
, SH_DEFAULT_NUM_REGS
);
4269 set_gdbarch_sp_regnum (gdbarch
, 15);
4270 set_gdbarch_fp_regnum (gdbarch
, 14);
4271 set_gdbarch_pc_regnum (gdbarch
, 16);
4272 set_gdbarch_register_size (gdbarch
, 4);
4273 set_gdbarch_register_bytes (gdbarch
, SH_DEFAULT_NUM_REGS
* 4);
4274 set_gdbarch_deprecated_do_registers_info (gdbarch
, sh_do_registers_info
);
4275 set_gdbarch_breakpoint_from_pc (gdbarch
, sh_breakpoint_from_pc
);
4276 set_gdbarch_frame_chain (gdbarch
, sh_frame_chain
);
4277 set_gdbarch_get_saved_register (gdbarch
, deprecated_generic_get_saved_register
);
4278 set_gdbarch_init_extra_frame_info (gdbarch
, sh_init_extra_frame_info
);
4279 set_gdbarch_deprecated_extract_return_value (gdbarch
, sh_extract_return_value
);
4280 set_gdbarch_push_arguments (gdbarch
, sh_push_arguments
);
4281 set_gdbarch_store_struct_return (gdbarch
, sh_store_struct_return
);
4282 set_gdbarch_use_struct_convention (gdbarch
, sh_use_struct_convention
);
4283 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, sh_extract_struct_value_address
);
4284 set_gdbarch_pop_frame (gdbarch
, sh_pop_frame
);
4285 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_sh
);
4286 set_gdbarch_register_sim_regno (gdbarch
, legacy_register_sim_regno
);
4287 skip_prologue_hard_way
= sh_skip_prologue_hard_way
;
4288 do_pseudo_register
= sh_do_pseudo_register
;
4290 switch (info
.bfd_arch_info
->mach
)
4293 sh_register_name
= sh_sh_register_name
;
4294 sh_show_regs
= sh_generic_show_regs
;
4295 sh_store_return_value
= sh_default_store_return_value
;
4296 sh_register_virtual_type
= sh_default_register_virtual_type
;
4297 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
4298 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4299 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4300 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4303 sh_register_name
= sh_sh_register_name
;
4304 sh_show_regs
= sh_generic_show_regs
;
4305 sh_store_return_value
= sh_default_store_return_value
;
4306 sh_register_virtual_type
= sh_default_register_virtual_type
;
4307 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
4308 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4309 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4310 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4312 case bfd_mach_sh_dsp
:
4313 sh_register_name
= sh_sh_dsp_register_name
;
4314 sh_show_regs
= sh_dsp_show_regs
;
4315 sh_store_return_value
= sh_default_store_return_value
;
4316 sh_register_virtual_type
= sh_default_register_virtual_type
;
4317 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
4318 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4319 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4320 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4321 set_gdbarch_register_sim_regno (gdbarch
, sh_dsp_register_sim_regno
);
4322 tdep
->DSR_REGNUM
= 24;
4323 tdep
->A0G_REGNUM
= 25;
4324 tdep
->A0_REGNUM
= 26;
4325 tdep
->A1G_REGNUM
= 27;
4326 tdep
->A1_REGNUM
= 28;
4327 tdep
->M0_REGNUM
= 29;
4328 tdep
->M1_REGNUM
= 30;
4329 tdep
->X0_REGNUM
= 31;
4330 tdep
->X1_REGNUM
= 32;
4331 tdep
->Y0_REGNUM
= 33;
4332 tdep
->Y1_REGNUM
= 34;
4333 tdep
->MOD_REGNUM
= 40;
4334 tdep
->RS_REGNUM
= 43;
4335 tdep
->RE_REGNUM
= 44;
4338 sh_register_name
= sh_sh3_register_name
;
4339 sh_show_regs
= sh3_show_regs
;
4340 sh_store_return_value
= sh_default_store_return_value
;
4341 sh_register_virtual_type
= sh_default_register_virtual_type
;
4342 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
4343 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4344 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4345 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4346 tdep
->SSR_REGNUM
= 41;
4347 tdep
->SPC_REGNUM
= 42;
4350 sh_register_name
= sh_sh3e_register_name
;
4351 sh_show_regs
= sh3e_show_regs
;
4352 sh_store_return_value
= sh3e_sh4_store_return_value
;
4353 sh_register_virtual_type
= sh_sh3e_register_virtual_type
;
4354 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_fp_frame_init_saved_regs
);
4355 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4356 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4357 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4358 set_gdbarch_deprecated_extract_return_value (gdbarch
, sh3e_sh4_extract_return_value
);
4359 set_gdbarch_fp0_regnum (gdbarch
, 25);
4360 tdep
->FPUL_REGNUM
= 23;
4361 tdep
->FPSCR_REGNUM
= 24;
4362 tdep
->FP_LAST_REGNUM
= 40;
4363 tdep
->SSR_REGNUM
= 41;
4364 tdep
->SPC_REGNUM
= 42;
4366 case bfd_mach_sh3_dsp
:
4367 sh_register_name
= sh_sh3_dsp_register_name
;
4368 sh_show_regs
= sh3_dsp_show_regs
;
4369 sh_store_return_value
= sh_default_store_return_value
;
4370 sh_register_virtual_type
= sh_default_register_virtual_type
;
4371 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
4372 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4373 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4374 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4375 tdep
->DSR_REGNUM
= 24;
4376 tdep
->A0G_REGNUM
= 25;
4377 tdep
->A0_REGNUM
= 26;
4378 tdep
->A1G_REGNUM
= 27;
4379 tdep
->A1_REGNUM
= 28;
4380 tdep
->M0_REGNUM
= 29;
4381 tdep
->M1_REGNUM
= 30;
4382 tdep
->X0_REGNUM
= 31;
4383 tdep
->X1_REGNUM
= 32;
4384 tdep
->Y0_REGNUM
= 33;
4385 tdep
->Y1_REGNUM
= 34;
4386 tdep
->MOD_REGNUM
= 40;
4387 tdep
->RS_REGNUM
= 43;
4388 tdep
->RE_REGNUM
= 44;
4389 tdep
->SSR_REGNUM
= 41;
4390 tdep
->SPC_REGNUM
= 42;
4393 sh_register_name
= sh_sh4_register_name
;
4394 sh_show_regs
= sh4_show_regs
;
4395 sh_store_return_value
= sh3e_sh4_store_return_value
;
4396 sh_register_virtual_type
= sh_sh4_register_virtual_type
;
4397 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_fp_frame_init_saved_regs
);
4398 set_gdbarch_deprecated_extract_return_value (gdbarch
, sh3e_sh4_extract_return_value
);
4399 set_gdbarch_fp0_regnum (gdbarch
, 25);
4400 set_gdbarch_register_raw_size (gdbarch
, sh_sh4_register_raw_size
);
4401 set_gdbarch_register_virtual_size (gdbarch
, sh_sh4_register_raw_size
);
4402 set_gdbarch_register_byte (gdbarch
, sh_sh4_register_byte
);
4403 set_gdbarch_num_pseudo_regs (gdbarch
, 12);
4404 set_gdbarch_max_register_raw_size (gdbarch
, 4 * 4);
4405 set_gdbarch_max_register_virtual_size (gdbarch
, 4 * 4);
4406 set_gdbarch_pseudo_register_read (gdbarch
, sh_pseudo_register_read
);
4407 set_gdbarch_pseudo_register_write (gdbarch
, sh_pseudo_register_write
);
4408 tdep
->FPUL_REGNUM
= 23;
4409 tdep
->FPSCR_REGNUM
= 24;
4410 tdep
->FP_LAST_REGNUM
= 40;
4411 tdep
->SSR_REGNUM
= 41;
4412 tdep
->SPC_REGNUM
= 42;
4413 tdep
->DR0_REGNUM
= 59;
4414 tdep
->DR_LAST_REGNUM
= 66;
4415 tdep
->FV0_REGNUM
= 67;
4416 tdep
->FV_LAST_REGNUM
= 70;
4419 tdep
->PR_REGNUM
= 18;
4420 tdep
->SR_REGNUM
= 65;
4421 tdep
->FPSCR_REGNUM
= SIM_SH64_FPCSR_REGNUM
;
4422 tdep
->FP_LAST_REGNUM
= SIM_SH64_FR0_REGNUM
+ SIM_SH64_NR_FP_REGS
- 1;
4423 tdep
->SSR_REGNUM
= SIM_SH64_SSR_REGNUM
;
4424 tdep
->SPC_REGNUM
= SIM_SH64_SPC_REGNUM
;
4425 tdep
->TR7_REGNUM
= SIM_SH64_TR0_REGNUM
+ 7;
4426 tdep
->FPP0_REGNUM
= 173;
4427 tdep
->FPP_LAST_REGNUM
= 204;
4428 tdep
->DR0_REGNUM
= 141;
4429 tdep
->DR_LAST_REGNUM
= 172;
4430 tdep
->FV0_REGNUM
= 205;
4431 tdep
->FV_LAST_REGNUM
= 220;
4432 tdep
->R0_C_REGNUM
= 221;
4433 tdep
->R_LAST_C_REGNUM
= 236;
4434 tdep
->PC_C_REGNUM
= 237;
4435 tdep
->GBR_C_REGNUM
= 238;
4436 tdep
->MACH_C_REGNUM
= 239;
4437 tdep
->MACL_C_REGNUM
= 240;
4438 tdep
->PR_C_REGNUM
= 241;
4439 tdep
->T_C_REGNUM
= 242;
4440 tdep
->FPSCR_C_REGNUM
= 243;
4441 tdep
->FPUL_C_REGNUM
= 244;
4442 tdep
->FP0_C_REGNUM
= 245;
4443 tdep
->FP_LAST_C_REGNUM
= 260;
4444 tdep
->DR0_C_REGNUM
= 261;
4445 tdep
->DR_LAST_C_REGNUM
= 268;
4446 tdep
->FV0_C_REGNUM
= 269;
4447 tdep
->FV_LAST_C_REGNUM
= 272;
4448 tdep
->ARG0_REGNUM
= 2;
4449 tdep
->ARGLAST_REGNUM
= 9;
4450 tdep
->RETURN_REGNUM
= 2;
4451 tdep
->FLOAT_ARGLAST_REGNUM
= 11;
4453 set_gdbarch_num_pseudo_regs (gdbarch
, NUM_PSEUDO_REGS_SH_MEDIA
+ NUM_PSEUDO_REGS_SH_COMPACT
);
4454 set_gdbarch_fp0_regnum (gdbarch
, SIM_SH64_FR0_REGNUM
);
4455 set_gdbarch_pc_regnum (gdbarch
, 64);
4457 /* Determine the ABI */
4458 if (bfd_get_arch_size (info
.abfd
) == 64)
4460 /* If the ABI is the 64-bit one, it can only be sh-media. */
4461 tdep
->sh_abi
= SH_ABI_64
;
4462 set_gdbarch_ptr_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
4463 set_gdbarch_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
4467 /* If the ABI is the 32-bit one it could be either media or
4469 tdep
->sh_abi
= SH_ABI_32
;
4470 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
4471 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
4474 /* the number of real registers is the same whether we are in
4475 ISA16(compact) or ISA32(media). */
4476 set_gdbarch_num_regs (gdbarch
, SIM_SH64_NR_REGS
);
4477 set_gdbarch_register_size (gdbarch
, 8); /*????*/
4478 set_gdbarch_register_bytes (gdbarch
,
4479 ((SIM_SH64_NR_FP_REGS
+ 1) * 4)
4480 + (SIM_SH64_NR_REGS
- SIM_SH64_NR_FP_REGS
-1) * 8);
4482 sh_register_name
= sh_sh64_register_name
;
4483 sh_show_regs
= sh64_show_regs
;
4484 sh_register_virtual_type
= sh_sh64_register_virtual_type
;
4485 sh_store_return_value
= sh64_store_return_value
;
4486 skip_prologue_hard_way
= sh64_skip_prologue_hard_way
;
4487 do_pseudo_register
= sh64_do_pseudo_register
;
4488 set_gdbarch_register_raw_size (gdbarch
, sh_sh64_register_raw_size
);
4489 set_gdbarch_register_virtual_size (gdbarch
, sh_sh64_register_raw_size
);
4490 set_gdbarch_register_byte (gdbarch
, sh_sh64_register_byte
);
4491 /* This seems awfully wrong!*/
4492 /*set_gdbarch_max_register_raw_size (gdbarch, 8);*/
4493 /* should include the size of the pseudo regs. */
4494 set_gdbarch_max_register_raw_size (gdbarch
, 4 * 4);
4495 /* Or should that go in the virtual_size? */
4496 /*set_gdbarch_max_register_virtual_size (gdbarch, 8);*/
4497 set_gdbarch_max_register_virtual_size (gdbarch
, 4 * 4);
4498 set_gdbarch_pseudo_register_read (gdbarch
, sh64_pseudo_register_read
);
4499 set_gdbarch_pseudo_register_write (gdbarch
, sh64_pseudo_register_write
);
4501 set_gdbarch_deprecated_do_registers_info (gdbarch
, sh64_do_registers_info
);
4502 set_gdbarch_frame_init_saved_regs (gdbarch
, sh64_nofp_frame_init_saved_regs
);
4503 set_gdbarch_breakpoint_from_pc (gdbarch
, sh_sh64_breakpoint_from_pc
);
4504 set_gdbarch_init_extra_frame_info (gdbarch
, sh64_init_extra_frame_info
);
4505 set_gdbarch_frame_chain (gdbarch
, sh64_frame_chain
);
4506 set_gdbarch_get_saved_register (gdbarch
, sh64_get_saved_register
);
4507 set_gdbarch_deprecated_extract_return_value (gdbarch
, sh64_extract_return_value
);
4508 set_gdbarch_push_arguments (gdbarch
, sh64_push_arguments
);
4509 /*set_gdbarch_store_struct_return (gdbarch, sh64_store_struct_return);*/
4510 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, sh64_extract_struct_value_address
);
4511 set_gdbarch_use_struct_convention (gdbarch
, sh64_use_struct_convention
);
4512 set_gdbarch_pop_frame (gdbarch
, sh64_pop_frame
);
4513 set_gdbarch_elf_make_msymbol_special (gdbarch
,
4514 sh64_elf_make_msymbol_special
);
4517 sh_register_name
= sh_generic_register_name
;
4518 sh_show_regs
= sh_generic_show_regs
;
4519 sh_store_return_value
= sh_default_store_return_value
;
4520 sh_register_virtual_type
= sh_default_register_virtual_type
;
4521 set_gdbarch_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
4522 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4523 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4524 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4528 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
4529 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
4530 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
4531 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
4532 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
4534 set_gdbarch_register_name (gdbarch
, sh_register_name
);
4535 set_gdbarch_register_virtual_type (gdbarch
, sh_register_virtual_type
);
4537 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
4538 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
4539 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
4540 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
4541 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
4542 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
4544 set_gdbarch_call_dummy_length (gdbarch
, 0);
4545 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
4546 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1); /*???*/
4547 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
4548 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
4549 set_gdbarch_call_dummy_words (gdbarch
, sh_call_dummy_words
);
4550 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (sh_call_dummy_words
));
4551 set_gdbarch_call_dummy_p (gdbarch
, 1);
4552 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
4553 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
4555 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
4556 set_gdbarch_push_return_address (gdbarch
, sh_push_return_address
);
4558 set_gdbarch_deprecated_store_return_value (gdbarch
, sh_store_return_value
);
4559 set_gdbarch_skip_prologue (gdbarch
, sh_skip_prologue
);
4560 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
4561 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
4562 set_gdbarch_function_start_offset (gdbarch
, 0);
4564 set_gdbarch_frame_args_skip (gdbarch
, 0);
4565 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
4566 set_gdbarch_frame_saved_pc (gdbarch
, sh_frame_saved_pc
);
4567 set_gdbarch_saved_pc_after_call (gdbarch
, sh_saved_pc_after_call
);
4568 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
4569 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
4571 /* Hook in ABI-specific overrides, if they have been registered. */
4572 gdbarch_init_osabi (info
, gdbarch
);
4578 sh_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
4580 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
4585 /* FIXME: dump the rest of gdbarch_tdep. */
4589 _initialize_sh_tdep (void)
4591 struct cmd_list_element
*c
;
4593 gdbarch_register (bfd_arch_sh
, sh_gdbarch_init
, sh_dump_tdep
);
4595 add_com ("regs", class_vars
, sh_show_regs_command
, "Print all registers");