1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21 Contributed by Steve Chamberlain
35 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
36 #include "gdb_string.h"
38 /* A set of original names, to be used when restoring back to generic
39 registers from a specific set. */
41 static char *sh_generic_reg_names
[] = {
42 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
43 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
44 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
46 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
47 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
49 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
50 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
53 static char *sh_reg_names
[] = {
54 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
55 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
56 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
58 "", "", "", "", "", "", "", "",
59 "", "", "", "", "", "", "", "",
61 "", "", "", "", "", "", "", "",
62 "", "", "", "", "", "", "", "",
65 static char *sh3_reg_names
[] = {
66 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
67 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
68 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
70 "", "", "", "", "", "", "", "",
71 "", "", "", "", "", "", "", "",
73 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
74 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
77 static char *sh3e_reg_names
[] = {
78 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
79 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
80 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
82 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
83 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
85 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
86 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
89 char **sh_register_names
= sh_generic_reg_names
;
94 } sh_processor_type_table
[] = {
95 { sh_reg_names
, bfd_mach_sh
},
96 { sh3_reg_names
, bfd_mach_sh3
},
97 { sh3e_reg_names
, bfd_mach_sh3e
},
98 { sh3e_reg_names
, bfd_mach_sh4
},
102 /* Prologue looks like
103 [mov.l <regs>,@-r15]...
109 #define IS_STS(x) ((x) == 0x4f22)
110 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
111 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
112 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
113 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
114 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
115 #define IS_SHLL_R3(x) ((x) == 0x4300)
116 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
117 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
118 #define FPSCR_SZ (1 << 20)
121 /* Should call_function allocate stack space for a struct return? */
123 sh_use_struct_convention (gcc_p
, type
)
127 return (TYPE_LENGTH (type
) > 1);
131 /* Skip any prologue before the guts of a function */
134 sh_skip_prologue (start_pc
)
139 w
= read_memory_integer (start_pc
, 2);
150 w
= read_memory_integer (start_pc
, 2);
156 /* Disassemble an instruction. */
159 gdb_print_insn_sh (memaddr
, info
)
161 disassemble_info
*info
;
163 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
164 return print_insn_sh (memaddr
, info
);
166 return print_insn_shl (memaddr
, info
);
169 /* Given a GDB frame, determine the address of the calling function's frame.
170 This will be used to create a new GDB frame struct, and then
171 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
173 For us, the frame address is its stack pointer value, so we look up
174 the function prologue to determine the caller's sp value, and return it. */
177 sh_frame_chain (frame
)
178 struct frame_info
*frame
;
180 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
181 return frame
->frame
; /* dummy frame same as caller's frame */
182 if (!inside_entry_file (frame
->pc
))
183 return read_memory_integer (FRAME_FP (frame
) + frame
->f_offset
, 4);
188 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
189 we might want to do here is to check REGNUM against the clobber mask, and
190 somehow flag it as invalid if it isn't saved on the stack somewhere. This
191 would provide a graceful failure mode when trying to get the value of
192 caller-saves registers for an inner frame. */
195 sh_find_callers_reg (fi
, regnum
)
196 struct frame_info
*fi
;
199 struct frame_saved_regs fsr
;
201 for (; fi
; fi
= fi
->next
)
202 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
203 /* When the caller requests PR from the dummy frame, we return PC because
204 that's where the previous routine appears to have done a call from. */
205 return generic_read_register_dummy (fi
->pc
, fi
->frame
, regnum
);
208 FRAME_FIND_SAVED_REGS(fi
, fsr
);
209 if (fsr
.regs
[regnum
] != 0)
210 return read_memory_integer (fsr
.regs
[regnum
],
211 REGISTER_RAW_SIZE(regnum
));
213 return read_register (regnum
);
216 /* Put here the code to store, into a struct frame_saved_regs, the
217 addresses of the saved registers of frame described by FRAME_INFO.
218 This includes special registers such as pc and fp saved in special
219 ways in the stack frame. sp is even more special: the address we
220 return for it IS the sp for the next frame. */
223 sh_frame_find_saved_regs (fi
, fsr
)
224 struct frame_info
*fi
;
225 struct frame_saved_regs
*fsr
;
235 char * dummy_regs
= generic_find_dummy_frame (fi
->pc
, fi
->frame
);
239 /* DANGER! This is ONLY going to work if the char buffer format of
240 the saved registers is byte-for-byte identical to the
241 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
242 memcpy (&fsr
->regs
, dummy_regs
, sizeof(fsr
));
246 opc
= pc
= get_pc_function_start (fi
->pc
);
248 insn
= read_memory_integer (pc
, 2);
250 fi
->leaf_function
= 1;
253 for (rn
= 0; rn
< NUM_REGS
; rn
++)
258 /* Loop around examining the prologue insns until we find something
259 that does not appear to be part of the prologue. But give up
260 after 20 of them, since we're getting silly then. */
262 while (pc
< opc
+ 20 * 2)
264 /* See where the registers will be saved to */
268 rn
= GET_PUSHED_REG (insn
);
270 insn
= read_memory_integer (pc
, 2);
273 else if (IS_STS (insn
))
276 where
[PR_REGNUM
] = depth
;
277 insn
= read_memory_integer (pc
, 2);
278 /* If we're storing the pr then this isn't a leaf */
279 fi
->leaf_function
= 0;
282 else if (IS_MOV_R3 (insn
))
284 r3_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
286 insn
= read_memory_integer (pc
, 2);
288 else if (IS_SHLL_R3 (insn
))
292 insn
= read_memory_integer (pc
, 2);
294 else if (IS_ADD_R3SP (insn
))
298 insn
= read_memory_integer (pc
, 2);
300 else if (IS_ADD_SP (insn
))
303 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
304 insn
= read_memory_integer (pc
, 2);
306 else if (IS_FMOV (insn
))
309 insn
= read_memory_integer (pc
, 2);
310 if (read_register (FPSCR_REGNUM
) & FPSCR_SZ
)
323 /* Now we know how deep things are, we can work out their addresses */
325 for (rn
= 0; rn
< NUM_REGS
; rn
++)
332 fsr
->regs
[rn
] = fi
->frame
- where
[rn
] + depth
- 4;
342 fsr
->regs
[SP_REGNUM
] = read_memory_integer (fsr
->regs
[FP_REGNUM
], 4);
346 fsr
->regs
[SP_REGNUM
] = fi
->frame
- 4;
349 fi
->f_offset
= depth
- where
[FP_REGNUM
] - 4;
350 /* Work out the return pc - either from the saved pr or the pr
354 /* initialize the extra info saved in a FRAME */
357 sh_init_extra_frame_info (fromleaf
, fi
)
359 struct frame_info
*fi
;
361 struct frame_saved_regs fsr
;
364 fi
->pc
= FRAME_SAVED_PC (fi
->next
);
366 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
368 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
369 by assuming it's always FP. */
370 fi
->frame
= generic_read_register_dummy (fi
->pc
, fi
->frame
,
372 fi
->return_pc
= generic_read_register_dummy (fi
->pc
, fi
->frame
,
374 fi
->f_offset
= -(CALL_DUMMY_LENGTH
+ 4);
375 fi
->leaf_function
= 0;
380 FRAME_FIND_SAVED_REGS (fi
, fsr
);
381 fi
->return_pc
= sh_find_callers_reg (fi
, PR_REGNUM
);
385 /* Discard from the stack the innermost frame,
386 restoring all saved registers. */
391 register struct frame_info
*frame
= get_current_frame ();
392 register CORE_ADDR fp
;
394 struct frame_saved_regs fsr
;
396 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
397 generic_pop_dummy_frame ();
400 fp
= FRAME_FP (frame
);
401 get_frame_saved_regs (frame
, &fsr
);
403 /* Copy regs from where they were saved in the frame */
404 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
405 if (fsr
.regs
[regnum
])
406 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
], 4));
408 write_register (PC_REGNUM
, frame
->return_pc
);
409 write_register (SP_REGNUM
, fp
+ 4);
411 flush_cached_frames ();
414 /* Function: push_arguments
415 Setup the function arguments for calling a function in the inferior.
417 On the Hitachi SH architecture, there are four registers (R4 to R7)
418 which are dedicated for passing function arguments. Up to the first
419 four arguments (depending on size) may go into these registers.
420 The rest go on the stack.
422 Arguments that are smaller than 4 bytes will still take up a whole
423 register or a whole 32-bit word on the stack, and will be
424 right-justified in the register or the stack word. This includes
425 chars, shorts, and small aggregate types.
427 Arguments that are larger than 4 bytes may be split between two or
428 more registers. If there are not enough registers free, an argument
429 may be passed partly in a register (or registers), and partly on the
430 stack. This includes doubles, long longs, and larger aggregates.
431 As far as I know, there is no upper limit to the size of aggregates
432 that will be passed in this way; in other words, the convention of
433 passing a pointer to a large aggregate instead of a copy is not used.
435 An exceptional case exists for struct arguments (and possibly other
436 aggregates such as arrays) if the size is larger than 4 bytes but
437 not a multiple of 4 bytes. In this case the argument is never split
438 between the registers and the stack, but instead is copied in its
439 entirety onto the stack, AND also copied into as many registers as
440 there is room for. In other words, space in registers permitting,
441 two copies of the same argument are passed in. As far as I can tell,
442 only the one on the stack is used, although that may be a function
443 of the level of compiler optimization. I suspect this is a compiler
444 bug. Arguments of these odd sizes are left-justified within the
445 word (as opposed to arguments smaller than 4 bytes, which are
449 If the function is to return an aggregate type such as a struct, it
450 is either returned in the normal return value register R0 (if its
451 size is no greater than one byte), or else the caller must allocate
452 space into which the callee will copy the return value (if the size
453 is greater than one byte). In this case, a pointer to the return
454 value location is passed into the callee in register R2, which does
455 not displace any of the other arguments passed in via registers R4
459 sh_push_arguments (nargs
, args
, sp
, struct_return
, struct_addr
)
463 unsigned char struct_return
;
464 CORE_ADDR struct_addr
;
466 int stack_offset
, stack_alloc
;
474 int odd_sized_struct
;
476 /* first force sp to a 4-byte alignment */
479 /* The "struct return pointer" pseudo-argument has its own dedicated
482 write_register (STRUCT_RETURN_REGNUM
, struct_addr
);
484 /* Now make sure there's space on the stack */
485 for (argnum
= 0, stack_alloc
= 0;
486 argnum
< nargs
; argnum
++)
487 stack_alloc
+= ((TYPE_LENGTH(VALUE_TYPE(args
[argnum
])) + 3) & ~3);
488 sp
-= stack_alloc
; /* make room on stack for args */
491 /* Now load as many as possible of the first arguments into
492 registers, and push the rest onto the stack. There are 16 bytes
493 in four registers available. Loop thru args from first to last. */
495 argreg
= ARG0_REGNUM
;
496 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
498 type
= VALUE_TYPE (args
[argnum
]);
499 len
= TYPE_LENGTH (type
);
500 memset(valbuf
, 0, sizeof(valbuf
));
502 { /* value gets right-justified in the register or stack word */
503 memcpy(valbuf
+ (4 - len
),
504 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
508 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
510 if (len
> 4 && (len
& 3) != 0)
511 odd_sized_struct
= 1; /* such structs go entirely on stack */
513 odd_sized_struct
= 0;
516 if (argreg
> ARGLAST_REGNUM
|| odd_sized_struct
)
517 { /* must go on the stack */
518 write_memory (sp
+ stack_offset
, val
, 4);
521 /* NOTE WELL!!!!! This is not an "else if" clause!!!
522 That's because some *&^%$ things get passed on the stack
523 AND in the registers! */
524 if (argreg
<= ARGLAST_REGNUM
)
525 { /* there's room in a register */
526 regval
= extract_address (val
, REGISTER_RAW_SIZE(argreg
));
527 write_register (argreg
++, regval
);
529 /* Store the value 4 bytes at a time. This means that things
530 larger than 4 bytes may go partly in registers and partly
532 len
-= REGISTER_RAW_SIZE(argreg
);
533 val
+= REGISTER_RAW_SIZE(argreg
);
539 /* Function: push_return_address (pc)
540 Set up the return address for the inferior function call.
541 Needed for targets where we don't actually execute a JSR/BSR instruction */
544 sh_push_return_address (pc
, sp
)
548 write_register (PR_REGNUM
, CALL_DUMMY_ADDRESS ());
552 /* Function: fix_call_dummy
553 Poke the callee function's address into the destination part of
554 the CALL_DUMMY. The address is actually stored in a data word
555 following the actualy CALL_DUMMY instructions, which will load
556 it into a register using PC-relative addressing. This function
557 expects the CALL_DUMMY to look like this:
568 sh_fix_call_dummy (dummy
, pc
, fun
, nargs
, args
, type
, gcc_p
)
577 *(unsigned long *) (dummy
+ 8) = fun
;
582 /* Modify the actual processor type. */
585 sh_target_architecture_hook (ap
)
586 const bfd_arch_info_type
*ap
;
590 if (ap
->arch
!= bfd_arch_sh
)
593 for (i
= 0; sh_processor_type_table
[i
].regnames
!= NULL
; i
++)
595 if (sh_processor_type_table
[i
].mach
== ap
->mach
)
597 sh_register_names
= sh_processor_type_table
[i
].regnames
;
602 fatal ("Architecture `%s' unreconized", ap
->printable_name
);
605 /* Print the registers in a form similar to the E7000 */
608 sh_show_regs (args
, from_tty
)
613 if (TARGET_ARCHITECTURE
->arch
== bfd_arch_sh
)
614 cpu
= TARGET_ARCHITECTURE
->mach
;
618 /* FIXME: sh4 has more registers */
619 if (cpu
== bfd_mach_sh4
)
622 printf_filtered ("PC=%08x SR=%08x PR=%08x MACH=%08x MACHL=%08x\n",
623 read_register (PC_REGNUM
),
624 read_register (SR_REGNUM
),
625 read_register (PR_REGNUM
),
626 read_register (MACH_REGNUM
),
627 read_register (MACL_REGNUM
));
629 printf_filtered ("GBR=%08x VBR=%08x",
630 read_register (GBR_REGNUM
),
631 read_register (VBR_REGNUM
));
632 if (cpu
== bfd_mach_sh3
|| cpu
== bfd_mach_sh3e
)
634 printf_filtered (" SSR=%08x SPC=%08x",
635 read_register (SSR_REGNUM
),
636 read_register (SPC_REGNUM
));
637 if (cpu
== bfd_mach_sh3e
)
639 printf_filtered (" FPUL=%08x FPSCR=%08x",
640 read_register (FPUL_REGNUM
),
641 read_register (FPSCR_REGNUM
));
645 printf_filtered ("\nR0-R7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
654 printf_filtered ("R8-R15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
663 if (cpu
== bfd_mach_sh3e
)
665 printf_filtered ("FP0-FP7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
666 read_register (FP0_REGNUM
+ 0),
667 read_register (FP0_REGNUM
+ 1),
668 read_register (FP0_REGNUM
+ 2),
669 read_register (FP0_REGNUM
+ 3),
670 read_register (FP0_REGNUM
+ 4),
671 read_register (FP0_REGNUM
+ 5),
672 read_register (FP0_REGNUM
+ 6),
673 read_register (FP0_REGNUM
+ 7));
674 printf_filtered ("FP8-FP15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
675 read_register (FP0_REGNUM
+ 8),
676 read_register (FP0_REGNUM
+ 9),
677 read_register (FP0_REGNUM
+ 10),
678 read_register (FP0_REGNUM
+ 11),
679 read_register (FP0_REGNUM
+ 12),
680 read_register (FP0_REGNUM
+ 13),
681 read_register (FP0_REGNUM
+ 14),
682 read_register (FP0_REGNUM
+ 15));
686 /* Function: extract_return_value
687 Find a function's return value in the appropriate registers (in regbuf),
688 and copy it into valbuf. */
691 sh_extract_return_value (type
, regbuf
, valbuf
)
696 int len
= TYPE_LENGTH(type
);
699 memcpy (valbuf
, ((char *) regbuf
) + 4 - len
, len
);
701 memcpy (valbuf
, ((char *) regbuf
) + 8 - len
, len
);
703 error ("bad size for return value");
707 _initialize_sh_tdep ()
709 struct cmd_list_element
*c
;
711 tm_print_insn
= gdb_print_insn_sh
;
713 target_architecture_hook
= sh_target_architecture_hook
;
715 add_com ("regs", class_vars
, sh_show_regs
, "Print all registers");