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2001-02-05 Elena Zannoni <ezannoni@kwikemart.cygnus.com>
[deliverable/binutils-gdb.git] / gdb / sh-tdep.c
1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2001
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 /*
23 Contributed by Steve Chamberlain
24 sac@cygnus.com
25 */
26
27 #include "defs.h"
28 #include "frame.h"
29 #include "obstack.h"
30 #include "symtab.h"
31 #include "symfile.h"
32 #include "gdbtypes.h"
33 #include "gdbcmd.h"
34 #include "gdbcore.h"
35 #include "value.h"
36 #include "dis-asm.h"
37 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
38 #include "gdb_string.h"
39 #include "arch-utils.h"
40 #include "floatformat.h"
41
42 #include "solib-svr4.h"
43
44 #undef XMALLOC
45 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
46
47
48 /* Frame interpretation related functions. */
49 static gdbarch_breakpoint_from_pc_ftype sh_breakpoint_from_pc;
50 static gdbarch_frame_chain_ftype sh_frame_chain;
51 static gdbarch_frame_saved_pc_ftype sh_frame_saved_pc;
52 static gdbarch_skip_prologue_ftype sh_skip_prologue;
53
54 static gdbarch_frame_init_saved_regs_ftype sh_nofp_frame_init_saved_regs;
55 static gdbarch_frame_init_saved_regs_ftype sh_fp_frame_init_saved_regs;
56 static gdbarch_init_extra_frame_info_ftype sh_init_extra_frame_info;
57 static gdbarch_pop_frame_ftype sh_pop_frame;
58 static gdbarch_saved_pc_after_call_ftype sh_saved_pc_after_call;
59
60 /* Function call related functions. */
61 static gdbarch_extract_return_value_ftype sh_extract_return_value;
62 static gdbarch_extract_return_value_ftype sh3e_sh4_extract_return_value;
63 static gdbarch_extract_struct_value_address_ftype sh_extract_struct_value_address;
64 static gdbarch_use_struct_convention_ftype sh_use_struct_convention;
65 static gdbarch_store_struct_return_ftype sh_store_struct_return;
66 static gdbarch_push_arguments_ftype sh_push_arguments;
67 static gdbarch_push_return_address_ftype sh_push_return_address;
68 static gdbarch_coerce_float_to_double_ftype sh_coerce_float_to_double;
69 static gdbarch_store_return_value_ftype sh_default_store_return_value;
70 static gdbarch_store_return_value_ftype sh3e_sh4_store_return_value;
71
72 static gdbarch_register_name_ftype sh_generic_register_name;
73 static gdbarch_register_name_ftype sh_sh_register_name;
74 static gdbarch_register_name_ftype sh_sh3_register_name;
75 static gdbarch_register_name_ftype sh_sh3e_register_name;
76 static gdbarch_register_name_ftype sh_sh_dsp_register_name;
77 static gdbarch_register_name_ftype sh_sh3_dsp_register_name;
78
79 /* Registers display related functions */
80 static gdbarch_register_raw_size_ftype sh_default_register_raw_size;
81 static gdbarch_register_raw_size_ftype sh_sh4_register_raw_size;
82
83 static gdbarch_register_virtual_size_ftype sh_register_virtual_size;
84
85 static gdbarch_register_byte_ftype sh_default_register_byte;
86 static gdbarch_register_byte_ftype sh_sh4_register_byte;
87
88 static gdbarch_register_virtual_type_ftype sh_sh3e_register_virtual_type;
89 static gdbarch_register_virtual_type_ftype sh_sh4_register_virtual_type;
90 static gdbarch_register_virtual_type_ftype sh_default_register_virtual_type;
91
92 static void sh_generic_show_regs (void);
93 static void sh3_show_regs (void);
94 static void sh3e_show_regs (void);
95 static void sh3_dsp_show_regs (void);
96 static void sh_dsp_show_regs (void);
97 static void sh4_show_regs (void);
98 static void sh_show_regs_command (char *, int);
99
100 static struct type *sh_sh4_build_float_register_type (int high);
101
102 static gdbarch_fetch_pseudo_register_ftype sh_fetch_pseudo_register;
103 static gdbarch_store_pseudo_register_ftype sh_store_pseudo_register;
104 static int fv_reg_base_num (int);
105 static int dr_reg_base_num (int);
106 static gdbarch_do_registers_info_ftype sh_do_registers_info;
107 static void do_fv_register_info (int fv_regnum);
108 static void do_dr_register_info (int dr_regnum);
109 static void sh_do_pseudo_register (int regnum);
110 static void sh_do_fp_register (int regnum);
111 static void sh_do_register (int regnum);
112 static void sh_print_register (int regnum);
113
114 void (*sh_show_regs) (void);
115 int (*print_sh_insn) (bfd_vma, disassemble_info*);
116
117 /* Define other aspects of the stack frame.
118 we keep a copy of the worked out return pc lying around, since it
119 is a useful bit of info */
120
121 struct frame_extra_info
122 {
123 CORE_ADDR return_pc;
124 int leaf_function;
125 int f_offset;
126 };
127
128 #if 0
129 #ifdef _WIN32_WCE
130 char **sh_register_names = sh3_reg_names;
131 #else
132 char **sh_register_names = sh_generic_reg_names;
133 #endif
134 #endif
135
136 static char *
137 sh_generic_register_name (int reg_nr)
138 {
139 static char *register_names[] =
140 {
141 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
142 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
143 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
144 "fpul", "fpscr",
145 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
146 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
147 "ssr", "spc",
148 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
149 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
150 };
151 if (reg_nr < 0)
152 return NULL;
153 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
154 return NULL;
155 return register_names[reg_nr];
156 }
157
158 static char *
159 sh_sh_register_name (int reg_nr)
160 {
161 static char *register_names[] =
162 {
163 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
164 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
165 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
166 "", "",
167 "", "", "", "", "", "", "", "",
168 "", "", "", "", "", "", "", "",
169 "", "",
170 "", "", "", "", "", "", "", "",
171 "", "", "", "", "", "", "", "",
172 };
173 if (reg_nr < 0)
174 return NULL;
175 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
176 return NULL;
177 return register_names[reg_nr];
178 }
179
180 static char *
181 sh_sh3_register_name (int reg_nr)
182 {
183 static char *register_names[] =
184 {
185 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
186 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
187 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
188 "", "",
189 "", "", "", "", "", "", "", "",
190 "", "", "", "", "", "", "", "",
191 "ssr", "spc",
192 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
193 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
194 };
195 if (reg_nr < 0)
196 return NULL;
197 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
198 return NULL;
199 return register_names[reg_nr];
200 }
201
202 static char *
203 sh_sh3e_register_name (int reg_nr)
204 {
205 static char *register_names[] =
206 {
207 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
208 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
209 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
210 "fpul", "fpscr",
211 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
212 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
213 "ssr", "spc",
214 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
215 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
216 };
217 if (reg_nr < 0)
218 return NULL;
219 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
220 return NULL;
221 return register_names[reg_nr];
222 }
223
224 static char *
225 sh_sh_dsp_register_name (int reg_nr)
226 {
227 static char *register_names[] =
228 {
229 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
230 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
231 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
232 "", "dsr",
233 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
234 "y0", "y1", "", "", "", "", "", "mod",
235 "", "",
236 "rs", "re", "", "", "", "", "", "",
237 "", "", "", "", "", "", "", "",
238 };
239 if (reg_nr < 0)
240 return NULL;
241 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
242 return NULL;
243 return register_names[reg_nr];
244 }
245
246 static char *
247 sh_sh3_dsp_register_name (int reg_nr)
248 {
249 static char *register_names[] =
250 {
251 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
252 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
253 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
254 "", "dsr",
255 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
256 "y0", "y1", "", "", "", "", "", "mod",
257 "ssr", "spc",
258 "rs", "re", "", "", "", "", "", "",
259 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
260 "", "", "", "", "", "", "", "",
261 };
262 if (reg_nr < 0)
263 return NULL;
264 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
265 return NULL;
266 return register_names[reg_nr];
267 }
268
269 static char *
270 sh_sh4_register_name (int reg_nr)
271 {
272 static char *register_names[] =
273 {
274 /* general registers 0-15 */
275 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
276 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
277 /* 16 - 22 */
278 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
279 /* 23, 24 */
280 "fpul", "fpscr",
281 /* floating point registers 25 - 40 */
282 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
283 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
284 /* 41, 42 */
285 "ssr", "spc",
286 /* bank 0 43 - 50 */
287 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
288 /* bank 1 51 - 58 */
289 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
290 /* double precision (pseudo) 59 - 66 */
291 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
292 /* vectors (pseudo) 67 - 70 */
293 "fv0", "fv4", "fv8", "fv12",
294 /* FIXME: missing XF 71 - 86 */
295 /* FIXME: missing XD 87 - 94 */
296 };
297 if (reg_nr < 0)
298 return NULL;
299 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
300 return NULL;
301 return register_names[reg_nr];
302 }
303
304 static unsigned char *
305 sh_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
306 {
307 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
308 static unsigned char breakpoint[] = {0xc3, 0xc3};
309
310 *lenptr = sizeof (breakpoint);
311 return breakpoint;
312 }
313
314 /* Prologue looks like
315 [mov.l <regs>,@-r15]...
316 [sts.l pr,@-r15]
317 [mov.l r14,@-r15]
318 [mov r15,r14]
319
320 Actually it can be more complicated than this. For instance, with
321 newer gcc's:
322
323 mov.l r14,@-r15
324 add #-12,r15
325 mov r15,r14
326 mov r4,r1
327 mov r5,r2
328 mov.l r6,@(4,r14)
329 mov.l r7,@(8,r14)
330 mov.b r1,@r14
331 mov r14,r1
332 mov r14,r1
333 add #2,r1
334 mov.w r2,@r1
335
336 */
337
338 /* STS.L PR,@-r15 0100111100100010
339 r15-4-->r15, PR-->(r15) */
340 #define IS_STS(x) ((x) == 0x4f22)
341
342 /* MOV.L Rm,@-r15 00101111mmmm0110
343 r15-4-->r15, Rm-->(R15) */
344 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
345
346 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
347
348 /* MOV r15,r14 0110111011110011
349 r15-->r14 */
350 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
351
352 /* ADD #imm,r15 01111111iiiiiiii
353 r15+imm-->r15 */
354 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
355
356 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
357 #define IS_SHLL_R3(x) ((x) == 0x4300)
358
359 /* ADD r3,r15 0011111100111100
360 r15+r3-->r15 */
361 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
362
363 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
364 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
365 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
366 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
367
368 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
369 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
370 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
371 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
372 #define IS_ARG_MOV(x) \
373 (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
374 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
375 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
376
377 /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
378 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
379 #define IS_MOV_R14(x) \
380 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
381
382 #define FPSCR_SZ (1 << 20)
383
384 /* Skip any prologue before the guts of a function */
385
386 /* Skip the prologue using the debug information. If this fails we'll
387 fall back on the 'guess' method below. */
388 static CORE_ADDR
389 after_prologue (CORE_ADDR pc)
390 {
391 struct symtab_and_line sal;
392 CORE_ADDR func_addr, func_end;
393
394 /* If we can not find the symbol in the partial symbol table, then
395 there is no hope we can determine the function's start address
396 with this code. */
397 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
398 return 0;
399
400 /* Get the line associated with FUNC_ADDR. */
401 sal = find_pc_line (func_addr, 0);
402
403 /* There are only two cases to consider. First, the end of the source line
404 is within the function bounds. In that case we return the end of the
405 source line. Second is the end of the source line extends beyond the
406 bounds of the current function. We need to use the slow code to
407 examine instructions in that case. */
408 if (sal.end < func_end)
409 return sal.end;
410 else
411 return 0;
412 }
413
414 /* Here we look at each instruction in the function, and try to guess
415 where the prologue ends. Unfortunately this is not always
416 accurate. */
417 static CORE_ADDR
418 skip_prologue_hard_way (CORE_ADDR start_pc)
419 {
420 CORE_ADDR here, end;
421 int updated_fp = 0;
422
423 if (!start_pc)
424 return 0;
425
426 for (here = start_pc, end = start_pc + (2 * 28); here < end;)
427 {
428 int w = read_memory_integer (here, 2);
429 here += 2;
430 if (IS_FMOV (w) || IS_PUSH (w) || IS_STS (w) || IS_MOV_R3 (w)
431 || IS_ADD_R3SP (w) || IS_ADD_SP (w) || IS_SHLL_R3 (w)
432 || IS_ARG_MOV (w) || IS_MOV_R14 (w))
433 {
434 start_pc = here;
435 }
436 else if (IS_MOV_SP_FP (w))
437 {
438 start_pc = here;
439 updated_fp = 1;
440 }
441 else
442 /* Don't bail out yet, if we are before the copy of sp. */
443 if (updated_fp)
444 break;
445 }
446
447 return start_pc;
448 }
449
450 static CORE_ADDR
451 sh_skip_prologue (CORE_ADDR pc)
452 {
453 CORE_ADDR post_prologue_pc;
454
455 /* See if we can determine the end of the prologue via the symbol table.
456 If so, then return either PC, or the PC after the prologue, whichever
457 is greater. */
458
459 post_prologue_pc = after_prologue (pc);
460
461 /* If after_prologue returned a useful address, then use it. Else
462 fall back on the instruction skipping code. */
463 if (post_prologue_pc != 0)
464 return max (pc, post_prologue_pc);
465 else
466 return (skip_prologue_hard_way (pc));
467 }
468
469 /* Immediately after a function call, return the saved pc.
470 Can't always go through the frames for this because on some machines
471 the new frame is not set up until the new function executes
472 some instructions.
473
474 The return address is the value saved in the PR register + 4 */
475 static CORE_ADDR
476 sh_saved_pc_after_call (struct frame_info *frame)
477 {
478 return (ADDR_BITS_REMOVE(read_register(PR_REGNUM)));
479 }
480
481 /* Should call_function allocate stack space for a struct return? */
482 static int
483 sh_use_struct_convention (int gcc_p, struct type *type)
484 {
485 return (TYPE_LENGTH (type) > 1);
486 }
487
488 /* Store the address of the place in which to copy the structure the
489 subroutine will return. This is called from call_function.
490
491 We store structs through a pointer passed in R0 */
492 static void
493 sh_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
494 {
495 write_register (STRUCT_RETURN_REGNUM, (addr));
496 }
497
498 /* Disassemble an instruction. */
499 static int
500 gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
501 {
502 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
503 return print_insn_sh (memaddr, info);
504 else
505 return print_insn_shl (memaddr, info);
506 }
507
508 /* Given a GDB frame, determine the address of the calling function's frame.
509 This will be used to create a new GDB frame struct, and then
510 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
511
512 For us, the frame address is its stack pointer value, so we look up
513 the function prologue to determine the caller's sp value, and return it. */
514 static CORE_ADDR
515 sh_frame_chain (struct frame_info *frame)
516 {
517 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
518 return frame->frame; /* dummy frame same as caller's frame */
519 if (frame->pc && !inside_entry_file (frame->pc))
520 return read_memory_integer (FRAME_FP (frame) + frame->extra_info->f_offset, 4);
521 else
522 return 0;
523 }
524
525 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
526 we might want to do here is to check REGNUM against the clobber mask, and
527 somehow flag it as invalid if it isn't saved on the stack somewhere. This
528 would provide a graceful failure mode when trying to get the value of
529 caller-saves registers for an inner frame. */
530
531 static CORE_ADDR
532 sh_find_callers_reg (struct frame_info *fi, int regnum)
533 {
534 for (; fi; fi = fi->next)
535 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
536 /* When the caller requests PR from the dummy frame, we return PC because
537 that's where the previous routine appears to have done a call from. */
538 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
539 else
540 {
541 FRAME_INIT_SAVED_REGS (fi);
542 if (!fi->pc)
543 return 0;
544 if (fi->saved_regs[regnum] != 0)
545 return read_memory_integer (fi->saved_regs[regnum],
546 REGISTER_RAW_SIZE (regnum));
547 }
548 return read_register (regnum);
549 }
550
551 /* Put here the code to store, into a struct frame_saved_regs, the
552 addresses of the saved registers of frame described by FRAME_INFO.
553 This includes special registers such as pc and fp saved in special
554 ways in the stack frame. sp is even more special: the address we
555 return for it IS the sp for the next frame. */
556 static void
557 sh_nofp_frame_init_saved_regs (struct frame_info *fi)
558 {
559 int where[NUM_REGS];
560 int rn;
561 int have_fp = 0;
562 int depth;
563 int pc;
564 int opc;
565 int insn;
566 int r3_val = 0;
567 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
568
569 if (fi->saved_regs == NULL)
570 frame_saved_regs_zalloc (fi);
571 else
572 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
573
574 if (dummy_regs)
575 {
576 /* DANGER! This is ONLY going to work if the char buffer format of
577 the saved registers is byte-for-byte identical to the
578 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
579 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
580 return;
581 }
582
583 fi->extra_info->leaf_function = 1;
584 fi->extra_info->f_offset = 0;
585
586 for (rn = 0; rn < NUM_REGS; rn++)
587 where[rn] = -1;
588
589 depth = 0;
590
591 /* Loop around examining the prologue insns until we find something
592 that does not appear to be part of the prologue. But give up
593 after 20 of them, since we're getting silly then. */
594
595 pc = get_pc_function_start (fi->pc);
596 if (!pc)
597 {
598 fi->pc = 0;
599 return;
600 }
601
602 for (opc = pc + (2 * 28); pc < opc; pc += 2)
603 {
604 insn = read_memory_integer (pc, 2);
605 /* See where the registers will be saved to */
606 if (IS_PUSH (insn))
607 {
608 rn = GET_PUSHED_REG (insn);
609 where[rn] = depth;
610 depth += 4;
611 }
612 else if (IS_STS (insn))
613 {
614 where[PR_REGNUM] = depth;
615 /* If we're storing the pr then this isn't a leaf */
616 fi->extra_info->leaf_function = 0;
617 depth += 4;
618 }
619 else if (IS_MOV_R3 (insn))
620 {
621 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
622 }
623 else if (IS_SHLL_R3 (insn))
624 {
625 r3_val <<= 1;
626 }
627 else if (IS_ADD_R3SP (insn))
628 {
629 depth += -r3_val;
630 }
631 else if (IS_ADD_SP (insn))
632 {
633 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
634 }
635 else if (IS_MOV_SP_FP (insn))
636 break;
637 #if 0 /* This used to just stop when it found an instruction that
638 was not considered part of the prologue. Now, we just
639 keep going looking for likely instructions. */
640 else
641 break;
642 #endif
643 }
644
645 /* Now we know how deep things are, we can work out their addresses */
646
647 for (rn = 0; rn < NUM_REGS; rn++)
648 {
649 if (where[rn] >= 0)
650 {
651 if (rn == FP_REGNUM)
652 have_fp = 1;
653
654 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
655 }
656 else
657 {
658 fi->saved_regs[rn] = 0;
659 }
660 }
661
662 if (have_fp)
663 {
664 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
665 }
666 else
667 {
668 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
669 }
670
671 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
672 /* Work out the return pc - either from the saved pr or the pr
673 value */
674 }
675
676 static void
677 sh_fp_frame_init_saved_regs (struct frame_info *fi)
678 {
679 int where[NUM_REGS];
680 int rn;
681 int have_fp = 0;
682 int depth;
683 int pc;
684 int opc;
685 int insn;
686 int r3_val = 0;
687 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
688
689 if (fi->saved_regs == NULL)
690 frame_saved_regs_zalloc (fi);
691 else
692 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
693
694 if (dummy_regs)
695 {
696 /* DANGER! This is ONLY going to work if the char buffer format of
697 the saved registers is byte-for-byte identical to the
698 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
699 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
700 return;
701 }
702
703 fi->extra_info->leaf_function = 1;
704 fi->extra_info->f_offset = 0;
705
706 for (rn = 0; rn < NUM_REGS; rn++)
707 where[rn] = -1;
708
709 depth = 0;
710
711 /* Loop around examining the prologue insns until we find something
712 that does not appear to be part of the prologue. But give up
713 after 20 of them, since we're getting silly then. */
714
715 pc = get_pc_function_start (fi->pc);
716 if (!pc)
717 {
718 fi->pc = 0;
719 return;
720 }
721
722 for (opc = pc + (2 * 28); pc < opc; pc += 2)
723 {
724 insn = read_memory_integer (pc, 2);
725 /* See where the registers will be saved to */
726 if (IS_PUSH (insn))
727 {
728 rn = GET_PUSHED_REG (insn);
729 where[rn] = depth;
730 depth += 4;
731 }
732 else if (IS_STS (insn))
733 {
734 where[PR_REGNUM] = depth;
735 /* If we're storing the pr then this isn't a leaf */
736 fi->extra_info->leaf_function = 0;
737 depth += 4;
738 }
739 else if (IS_MOV_R3 (insn))
740 {
741 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
742 }
743 else if (IS_SHLL_R3 (insn))
744 {
745 r3_val <<= 1;
746 }
747 else if (IS_ADD_R3SP (insn))
748 {
749 depth += -r3_val;
750 }
751 else if (IS_ADD_SP (insn))
752 {
753 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
754 }
755 else if (IS_FMOV (insn))
756 {
757 if (read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & FPSCR_SZ)
758 {
759 depth += 8;
760 }
761 else
762 {
763 depth += 4;
764 }
765 }
766 else if (IS_MOV_SP_FP (insn))
767 break;
768 #if 0 /* This used to just stop when it found an instruction that
769 was not considered part of the prologue. Now, we just
770 keep going looking for likely instructions. */
771 else
772 break;
773 #endif
774 }
775
776 /* Now we know how deep things are, we can work out their addresses */
777
778 for (rn = 0; rn < NUM_REGS; rn++)
779 {
780 if (where[rn] >= 0)
781 {
782 if (rn == FP_REGNUM)
783 have_fp = 1;
784
785 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
786 }
787 else
788 {
789 fi->saved_regs[rn] = 0;
790 }
791 }
792
793 if (have_fp)
794 {
795 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
796 }
797 else
798 {
799 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
800 }
801
802 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
803 /* Work out the return pc - either from the saved pr or the pr
804 value */
805 }
806
807 /* Initialize the extra info saved in a FRAME */
808 static void
809 sh_init_extra_frame_info (int fromleaf, struct frame_info *fi)
810 {
811
812 fi->extra_info = (struct frame_extra_info *)
813 frame_obstack_alloc (sizeof (struct frame_extra_info));
814
815 if (fi->next)
816 fi->pc = FRAME_SAVED_PC (fi->next);
817
818 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
819 {
820 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
821 by assuming it's always FP. */
822 fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
823 SP_REGNUM);
824 fi->extra_info->return_pc = generic_read_register_dummy (fi->pc, fi->frame,
825 PC_REGNUM);
826 fi->extra_info->f_offset = -(CALL_DUMMY_LENGTH + 4);
827 fi->extra_info->leaf_function = 0;
828 return;
829 }
830 else
831 {
832 FRAME_INIT_SAVED_REGS (fi);
833 fi->extra_info->return_pc = sh_find_callers_reg (fi, PR_REGNUM);
834 }
835 }
836
837 /* Extract from an array REGBUF containing the (raw) register state
838 the address in which a function should return its structure value,
839 as a CORE_ADDR (or an expression that can be used as one). */
840 static CORE_ADDR
841 sh_extract_struct_value_address (char *regbuf)
842 {
843 return (extract_address ((regbuf), REGISTER_RAW_SIZE (0)));
844 }
845
846 static CORE_ADDR
847 sh_frame_saved_pc (struct frame_info *frame)
848 {
849 return ((frame)->extra_info->return_pc);
850 }
851
852 /* Discard from the stack the innermost frame,
853 restoring all saved registers. */
854 static void
855 sh_pop_frame (void)
856 {
857 register struct frame_info *frame = get_current_frame ();
858 register CORE_ADDR fp;
859 register int regnum;
860
861 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
862 generic_pop_dummy_frame ();
863 else
864 {
865 fp = FRAME_FP (frame);
866 FRAME_INIT_SAVED_REGS (frame);
867
868 /* Copy regs from where they were saved in the frame */
869 for (regnum = 0; regnum < NUM_REGS; regnum++)
870 if (frame->saved_regs[regnum])
871 write_register (regnum, read_memory_integer (frame->saved_regs[regnum], 4));
872
873 write_register (PC_REGNUM, frame->extra_info->return_pc);
874 write_register (SP_REGNUM, fp + 4);
875 }
876 flush_cached_frames ();
877 }
878
879 /* Function: push_arguments
880 Setup the function arguments for calling a function in the inferior.
881
882 On the Hitachi SH architecture, there are four registers (R4 to R7)
883 which are dedicated for passing function arguments. Up to the first
884 four arguments (depending on size) may go into these registers.
885 The rest go on the stack.
886
887 Arguments that are smaller than 4 bytes will still take up a whole
888 register or a whole 32-bit word on the stack, and will be
889 right-justified in the register or the stack word. This includes
890 chars, shorts, and small aggregate types.
891
892 Arguments that are larger than 4 bytes may be split between two or
893 more registers. If there are not enough registers free, an argument
894 may be passed partly in a register (or registers), and partly on the
895 stack. This includes doubles, long longs, and larger aggregates.
896 As far as I know, there is no upper limit to the size of aggregates
897 that will be passed in this way; in other words, the convention of
898 passing a pointer to a large aggregate instead of a copy is not used.
899
900 An exceptional case exists for struct arguments (and possibly other
901 aggregates such as arrays) if the size is larger than 4 bytes but
902 not a multiple of 4 bytes. In this case the argument is never split
903 between the registers and the stack, but instead is copied in its
904 entirety onto the stack, AND also copied into as many registers as
905 there is room for. In other words, space in registers permitting,
906 two copies of the same argument are passed in. As far as I can tell,
907 only the one on the stack is used, although that may be a function
908 of the level of compiler optimization. I suspect this is a compiler
909 bug. Arguments of these odd sizes are left-justified within the
910 word (as opposed to arguments smaller than 4 bytes, which are
911 right-justified).
912
913 If the function is to return an aggregate type such as a struct, it
914 is either returned in the normal return value register R0 (if its
915 size is no greater than one byte), or else the caller must allocate
916 space into which the callee will copy the return value (if the size
917 is greater than one byte). In this case, a pointer to the return
918 value location is passed into the callee in register R2, which does
919 not displace any of the other arguments passed in via registers R4
920 to R7. */
921
922 static CORE_ADDR
923 sh_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
924 int struct_return, CORE_ADDR struct_addr)
925 {
926 int stack_offset, stack_alloc;
927 int argreg;
928 int argnum;
929 struct type *type;
930 CORE_ADDR regval;
931 char *val;
932 char valbuf[4];
933 int len;
934 int odd_sized_struct;
935
936 /* first force sp to a 4-byte alignment */
937 sp = sp & ~3;
938
939 /* The "struct return pointer" pseudo-argument has its own dedicated
940 register */
941 if (struct_return)
942 write_register (STRUCT_RETURN_REGNUM, struct_addr);
943
944 /* Now make sure there's space on the stack */
945 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
946 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
947 sp -= stack_alloc; /* make room on stack for args */
948
949 /* Now load as many as possible of the first arguments into
950 registers, and push the rest onto the stack. There are 16 bytes
951 in four registers available. Loop thru args from first to last. */
952
953 argreg = ARG0_REGNUM;
954 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
955 {
956 type = VALUE_TYPE (args[argnum]);
957 len = TYPE_LENGTH (type);
958 memset (valbuf, 0, sizeof (valbuf));
959 if (len < 4)
960 {
961 /* value gets right-justified in the register or stack word */
962 memcpy (valbuf + (4 - len),
963 (char *) VALUE_CONTENTS (args[argnum]), len);
964 val = valbuf;
965 }
966 else
967 val = (char *) VALUE_CONTENTS (args[argnum]);
968
969 if (len > 4 && (len & 3) != 0)
970 odd_sized_struct = 1; /* such structs go entirely on stack */
971 else
972 odd_sized_struct = 0;
973 while (len > 0)
974 {
975 if (argreg > ARGLAST_REGNUM || odd_sized_struct)
976 { /* must go on the stack */
977 write_memory (sp + stack_offset, val, 4);
978 stack_offset += 4;
979 }
980 /* NOTE WELL!!!!! This is not an "else if" clause!!!
981 That's because some *&^%$ things get passed on the stack
982 AND in the registers! */
983 if (argreg <= ARGLAST_REGNUM)
984 { /* there's room in a register */
985 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
986 write_register (argreg++, regval);
987 }
988 /* Store the value 4 bytes at a time. This means that things
989 larger than 4 bytes may go partly in registers and partly
990 on the stack. */
991 len -= REGISTER_RAW_SIZE (argreg);
992 val += REGISTER_RAW_SIZE (argreg);
993 }
994 }
995 return sp;
996 }
997
998 /* Function: push_return_address (pc)
999 Set up the return address for the inferior function call.
1000 Needed for targets where we don't actually execute a JSR/BSR instruction */
1001
1002 static CORE_ADDR
1003 sh_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1004 {
1005 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
1006 return sp;
1007 }
1008
1009 /* Function: fix_call_dummy
1010 Poke the callee function's address into the destination part of
1011 the CALL_DUMMY. The address is actually stored in a data word
1012 following the actualy CALL_DUMMY instructions, which will load
1013 it into a register using PC-relative addressing. This function
1014 expects the CALL_DUMMY to look like this:
1015
1016 mov.w @(2,PC), R8
1017 jsr @R8
1018 nop
1019 trap
1020 <destination>
1021 */
1022
1023 #if 0
1024 void
1025 sh_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
1026 value_ptr *args, struct type *type, int gcc_p)
1027 {
1028 *(unsigned long *) (dummy + 8) = fun;
1029 }
1030 #endif
1031
1032 static int
1033 sh_coerce_float_to_double (struct type *formal, struct type *actual)
1034 {
1035 return 1;
1036 }
1037
1038 /* Find a function's return value in the appropriate registers (in
1039 regbuf), and copy it into valbuf. Extract from an array REGBUF
1040 containing the (raw) register state a function return value of type
1041 TYPE, and copy that, in virtual format, into VALBUF. */
1042 static void
1043 sh_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1044 {
1045 int len = TYPE_LENGTH (type);
1046 int return_register = R0_REGNUM;
1047 int offset;
1048
1049 if (len <= 4)
1050 {
1051 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1052 offset = REGISTER_BYTE (return_register) + 4 - len;
1053 else
1054 offset = REGISTER_BYTE (return_register);
1055 memcpy (valbuf, regbuf + offset, len);
1056 }
1057 else if (len <= 8)
1058 {
1059 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1060 offset = REGISTER_BYTE (return_register) + 8 - len;
1061 else
1062 offset = REGISTER_BYTE (return_register);
1063 memcpy (valbuf, regbuf + offset, len);
1064 }
1065 else
1066 error ("bad size for return value");
1067 }
1068
1069 static void
1070 sh3e_sh4_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1071 {
1072 int return_register;
1073 int offset;
1074 int len = TYPE_LENGTH (type);
1075
1076 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1077 return_register = FP0_REGNUM;
1078 else
1079 return_register = R0_REGNUM;
1080
1081 if (len == 8 && TYPE_CODE (type) == TYPE_CODE_FLT)
1082 {
1083 DOUBLEST val;
1084 if (TARGET_BYTE_ORDER == LITTLE_ENDIAN)
1085 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword,
1086 (char *) regbuf + REGISTER_BYTE (return_register),
1087 &val);
1088 else
1089 floatformat_to_doublest (&floatformat_ieee_double_big,
1090 (char *) regbuf + REGISTER_BYTE (return_register),
1091 &val);
1092 store_floating (valbuf, len, val);
1093 }
1094 else if (len <= 4)
1095 {
1096 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1097 offset = REGISTER_BYTE (return_register) + 4 - len;
1098 else
1099 offset = REGISTER_BYTE (return_register);
1100 memcpy (valbuf, regbuf + offset, len);
1101 }
1102 else if (len <= 8)
1103 {
1104 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1105 offset = REGISTER_BYTE (return_register) + 8 - len;
1106 else
1107 offset = REGISTER_BYTE (return_register);
1108 memcpy (valbuf, regbuf + offset, len);
1109 }
1110 else
1111 error ("bad size for return value");
1112 }
1113
1114 /* Write into appropriate registers a function return value
1115 of type TYPE, given in virtual format.
1116 If the architecture is sh4 or sh3e, store a function's return value
1117 in the R0 general register or in the FP0 floating point register,
1118 depending on the type of the return value. In all the other cases
1119 the result is stored in r0. */
1120 static void
1121 sh_default_store_return_value (struct type *type, char *valbuf)
1122 {
1123 char buf[32]; /* more than enough... */
1124
1125 if (TYPE_LENGTH (type) < REGISTER_RAW_SIZE (R0_REGNUM))
1126 {
1127 /* Add leading zeros to the value. */
1128 memset (buf, 0, REGISTER_RAW_SIZE (R0_REGNUM));
1129 memcpy (buf + REGISTER_RAW_SIZE (R0_REGNUM) - TYPE_LENGTH (type),
1130 valbuf, TYPE_LENGTH (type));
1131 write_register_bytes (REGISTER_BYTE (R0_REGNUM), buf,
1132 REGISTER_RAW_SIZE (R0_REGNUM));
1133 }
1134 else
1135 write_register_bytes (REGISTER_BYTE (R0_REGNUM), valbuf,
1136 TYPE_LENGTH (type));
1137 }
1138
1139 static void
1140 sh3e_sh4_store_return_value (struct type *type, char *valbuf)
1141 {
1142 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1143 write_register_bytes (REGISTER_BYTE (FP0_REGNUM),
1144 valbuf, TYPE_LENGTH (type));
1145 else
1146 sh_default_store_return_value (type, valbuf);
1147 }
1148
1149
1150 /* Print the registers in a form similar to the E7000 */
1151
1152 static void
1153 sh_generic_show_regs (void)
1154 {
1155 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1156 paddr (read_register (PC_REGNUM)),
1157 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1158 (long) read_register (PR_REGNUM),
1159 (long) read_register (MACH_REGNUM),
1160 (long) read_register (MACL_REGNUM));
1161
1162 printf_filtered ("GBR=%08lx VBR=%08lx",
1163 (long) read_register (GBR_REGNUM),
1164 (long) read_register (VBR_REGNUM));
1165
1166 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1167 (long) read_register (0),
1168 (long) read_register (1),
1169 (long) read_register (2),
1170 (long) read_register (3),
1171 (long) read_register (4),
1172 (long) read_register (5),
1173 (long) read_register (6),
1174 (long) read_register (7));
1175 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1176 (long) read_register (8),
1177 (long) read_register (9),
1178 (long) read_register (10),
1179 (long) read_register (11),
1180 (long) read_register (12),
1181 (long) read_register (13),
1182 (long) read_register (14),
1183 (long) read_register (15));
1184 }
1185
1186 static void
1187 sh3_show_regs (void)
1188 {
1189 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1190 paddr (read_register (PC_REGNUM)),
1191 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1192 (long) read_register (PR_REGNUM),
1193 (long) read_register (MACH_REGNUM),
1194 (long) read_register (MACL_REGNUM));
1195
1196 printf_filtered ("GBR=%08lx VBR=%08lx",
1197 (long) read_register (GBR_REGNUM),
1198 (long) read_register (VBR_REGNUM));
1199 printf_filtered (" SSR=%08lx SPC=%08lx",
1200 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1201 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1202
1203 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1204 (long) read_register (0),
1205 (long) read_register (1),
1206 (long) read_register (2),
1207 (long) read_register (3),
1208 (long) read_register (4),
1209 (long) read_register (5),
1210 (long) read_register (6),
1211 (long) read_register (7));
1212 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1213 (long) read_register (8),
1214 (long) read_register (9),
1215 (long) read_register (10),
1216 (long) read_register (11),
1217 (long) read_register (12),
1218 (long) read_register (13),
1219 (long) read_register (14),
1220 (long) read_register (15));
1221 }
1222
1223
1224 static void
1225 sh3e_show_regs (void)
1226 {
1227 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1228 paddr (read_register (PC_REGNUM)),
1229 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1230 (long) read_register (PR_REGNUM),
1231 (long) read_register (MACH_REGNUM),
1232 (long) read_register (MACL_REGNUM));
1233
1234 printf_filtered ("GBR=%08lx VBR=%08lx",
1235 (long) read_register (GBR_REGNUM),
1236 (long) read_register (VBR_REGNUM));
1237 printf_filtered (" SSR=%08lx SPC=%08lx",
1238 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1239 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1240 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1241 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1242 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1243
1244 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1245 (long) read_register (0),
1246 (long) read_register (1),
1247 (long) read_register (2),
1248 (long) read_register (3),
1249 (long) read_register (4),
1250 (long) read_register (5),
1251 (long) read_register (6),
1252 (long) read_register (7));
1253 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1254 (long) read_register (8),
1255 (long) read_register (9),
1256 (long) read_register (10),
1257 (long) read_register (11),
1258 (long) read_register (12),
1259 (long) read_register (13),
1260 (long) read_register (14),
1261 (long) read_register (15));
1262
1263 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1264 (long) read_register (FP0_REGNUM + 0),
1265 (long) read_register (FP0_REGNUM + 1),
1266 (long) read_register (FP0_REGNUM + 2),
1267 (long) read_register (FP0_REGNUM + 3),
1268 (long) read_register (FP0_REGNUM + 4),
1269 (long) read_register (FP0_REGNUM + 5),
1270 (long) read_register (FP0_REGNUM + 6),
1271 (long) read_register (FP0_REGNUM + 7));
1272 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1273 (long) read_register (FP0_REGNUM + 8),
1274 (long) read_register (FP0_REGNUM + 9),
1275 (long) read_register (FP0_REGNUM + 10),
1276 (long) read_register (FP0_REGNUM + 11),
1277 (long) read_register (FP0_REGNUM + 12),
1278 (long) read_register (FP0_REGNUM + 13),
1279 (long) read_register (FP0_REGNUM + 14),
1280 (long) read_register (FP0_REGNUM + 15));
1281 }
1282
1283 static void
1284 sh3_dsp_show_regs (void)
1285 {
1286 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1287 paddr (read_register (PC_REGNUM)),
1288 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1289 (long) read_register (PR_REGNUM),
1290 (long) read_register (MACH_REGNUM),
1291 (long) read_register (MACL_REGNUM));
1292
1293 printf_filtered ("GBR=%08lx VBR=%08lx",
1294 (long) read_register (GBR_REGNUM),
1295 (long) read_register (VBR_REGNUM));
1296
1297 printf_filtered (" SSR=%08lx SPC=%08lx",
1298 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1299 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1300
1301 printf_filtered (" DSR=%08lx",
1302 (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1303
1304 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1305 (long) read_register (0),
1306 (long) read_register (1),
1307 (long) read_register (2),
1308 (long) read_register (3),
1309 (long) read_register (4),
1310 (long) read_register (5),
1311 (long) read_register (6),
1312 (long) read_register (7));
1313 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1314 (long) read_register (8),
1315 (long) read_register (9),
1316 (long) read_register (10),
1317 (long) read_register (11),
1318 (long) read_register (12),
1319 (long) read_register (13),
1320 (long) read_register (14),
1321 (long) read_register (15));
1322
1323 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1324 (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1325 (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1326 (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1327 (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1328 (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1329 (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1330 (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1331 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1332 (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1333 (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1334 (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1335 (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1336 (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1337 (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1338 }
1339
1340 static void
1341 sh4_show_regs (void)
1342 {
1343 int pr = read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & 0x80000;
1344 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1345 paddr (read_register (PC_REGNUM)),
1346 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1347 (long) read_register (PR_REGNUM),
1348 (long) read_register (MACH_REGNUM),
1349 (long) read_register (MACL_REGNUM));
1350
1351 printf_filtered ("GBR=%08lx VBR=%08lx",
1352 (long) read_register (GBR_REGNUM),
1353 (long) read_register (VBR_REGNUM));
1354 printf_filtered (" SSR=%08lx SPC=%08lx",
1355 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1356 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1357 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1358 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1359 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1360
1361 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1362 (long) read_register (0),
1363 (long) read_register (1),
1364 (long) read_register (2),
1365 (long) read_register (3),
1366 (long) read_register (4),
1367 (long) read_register (5),
1368 (long) read_register (6),
1369 (long) read_register (7));
1370 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1371 (long) read_register (8),
1372 (long) read_register (9),
1373 (long) read_register (10),
1374 (long) read_register (11),
1375 (long) read_register (12),
1376 (long) read_register (13),
1377 (long) read_register (14),
1378 (long) read_register (15));
1379
1380 printf_filtered ((pr
1381 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1382 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1383 (long) read_register (FP0_REGNUM + 0),
1384 (long) read_register (FP0_REGNUM + 1),
1385 (long) read_register (FP0_REGNUM + 2),
1386 (long) read_register (FP0_REGNUM + 3),
1387 (long) read_register (FP0_REGNUM + 4),
1388 (long) read_register (FP0_REGNUM + 5),
1389 (long) read_register (FP0_REGNUM + 6),
1390 (long) read_register (FP0_REGNUM + 7));
1391 printf_filtered ((pr
1392 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1393 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1394 (long) read_register (FP0_REGNUM + 8),
1395 (long) read_register (FP0_REGNUM + 9),
1396 (long) read_register (FP0_REGNUM + 10),
1397 (long) read_register (FP0_REGNUM + 11),
1398 (long) read_register (FP0_REGNUM + 12),
1399 (long) read_register (FP0_REGNUM + 13),
1400 (long) read_register (FP0_REGNUM + 14),
1401 (long) read_register (FP0_REGNUM + 15));
1402 }
1403
1404 static void
1405 sh_dsp_show_regs (void)
1406 {
1407 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1408 paddr (read_register (PC_REGNUM)),
1409 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1410 (long) read_register (PR_REGNUM),
1411 (long) read_register (MACH_REGNUM),
1412 (long) read_register (MACL_REGNUM));
1413
1414 printf_filtered ("GBR=%08lx VBR=%08lx",
1415 (long) read_register (GBR_REGNUM),
1416 (long) read_register (VBR_REGNUM));
1417
1418 printf_filtered (" DSR=%08lx",
1419 (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1420
1421 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1422 (long) read_register (0),
1423 (long) read_register (1),
1424 (long) read_register (2),
1425 (long) read_register (3),
1426 (long) read_register (4),
1427 (long) read_register (5),
1428 (long) read_register (6),
1429 (long) read_register (7));
1430 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1431 (long) read_register (8),
1432 (long) read_register (9),
1433 (long) read_register (10),
1434 (long) read_register (11),
1435 (long) read_register (12),
1436 (long) read_register (13),
1437 (long) read_register (14),
1438 (long) read_register (15));
1439
1440 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1441 (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1442 (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1443 (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1444 (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1445 (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1446 (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1447 (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1448 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1449 (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1450 (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1451 (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1452 (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1453 (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1454 (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1455 }
1456
1457 void sh_show_regs_command (char *args, int from_tty)
1458 {
1459 if (sh_show_regs)
1460 (*sh_show_regs)();
1461 }
1462
1463 /* Index within `registers' of the first byte of the space for
1464 register N. */
1465 static int
1466 sh_default_register_byte (int reg_nr)
1467 {
1468 return (reg_nr * 4);
1469 }
1470
1471 static int
1472 sh_sh4_register_byte (int reg_nr)
1473 {
1474 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1475 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1476 return (dr_reg_base_num (reg_nr) * 4);
1477 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1478 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1479 return (fv_reg_base_num (reg_nr) * 4);
1480 else
1481 return (reg_nr * 4);
1482 }
1483
1484 /* Number of bytes of storage in the actual machine representation for
1485 register REG_NR. */
1486 static int
1487 sh_default_register_raw_size (int reg_nr)
1488 {
1489 return 4;
1490 }
1491
1492 static int
1493 sh_sh4_register_raw_size (int reg_nr)
1494 {
1495 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1496 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1497 return 8;
1498 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1499 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1500 return 16;
1501 else
1502 return 4;
1503 }
1504
1505 /* Number of bytes of storage in the program's representation
1506 for register N. */
1507 static int
1508 sh_register_virtual_size (int reg_nr)
1509 {
1510 return 4;
1511 }
1512
1513 /* Return the GDB type object for the "standard" data type
1514 of data in register N. */
1515
1516 static struct type *
1517 sh_sh3e_register_virtual_type (int reg_nr)
1518 {
1519 if ((reg_nr >= FP0_REGNUM
1520 && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM))
1521 || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1522 return builtin_type_float;
1523 else
1524 return builtin_type_int;
1525 }
1526
1527 static struct type *
1528 sh_sh4_register_virtual_type (int reg_nr)
1529 {
1530 if ((reg_nr >= FP0_REGNUM
1531 && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM))
1532 || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1533 return builtin_type_float;
1534 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1535 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1536 return builtin_type_double;
1537 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1538 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1539 return sh_sh4_build_float_register_type (3);
1540 else
1541 return builtin_type_int;
1542 }
1543
1544 static struct type *
1545 sh_sh4_build_float_register_type (int high)
1546 {
1547 struct type *temp;
1548
1549 temp = create_range_type (NULL, builtin_type_int, 0, high);
1550 return create_array_type (NULL, builtin_type_float, temp);
1551 }
1552
1553 static struct type *
1554 sh_default_register_virtual_type (int reg_nr)
1555 {
1556 return builtin_type_int;
1557 }
1558
1559 /* On the sh4, the DRi pseudo registers are problematic if the target
1560 is little endian. When the user writes one of those registers, for
1561 instance with 'ser var $dr0=1', we want the double to be stored
1562 like this:
1563 fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1564 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1565
1566 This corresponds to little endian byte order & big endian word
1567 order. However if we let gdb write the register w/o conversion, it
1568 will write fr0 and fr1 this way:
1569 fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1570 fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1571 because it will consider fr0 and fr1 as a single LE stretch of memory.
1572
1573 To achieve what we want we must force gdb to store things in
1574 floatformat_ieee_double_littlebyte_bigword (which is defined in
1575 include/floatformat.h and libiberty/floatformat.c.
1576
1577 In case the target is big endian, there is no problem, the
1578 raw bytes will look like:
1579 fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
1580 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1581
1582 The other pseudo registers (the FVs) also don't pose a problem
1583 because they are stored as 4 individual FP elements. */
1584
1585 int
1586 sh_sh4_register_convertible (int nr)
1587 {
1588 if (TARGET_BYTE_ORDER == LITTLE_ENDIAN)
1589 return (gdbarch_tdep (current_gdbarch)->DR0_REGNUM <= nr
1590 && nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM);
1591 else
1592 return 0;
1593 }
1594
1595 void
1596 sh_sh4_register_convert_to_virtual (int regnum, struct type *type,
1597 char *from, char *to)
1598 {
1599 if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1600 && regnum <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1601 {
1602 DOUBLEST val;
1603 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, from, &val);
1604 store_floating(to, TYPE_LENGTH(type), val);
1605 }
1606 else
1607 error("sh_register_convert_to_virtual called with non DR register number");
1608 }
1609
1610 void
1611 sh_sh4_register_convert_to_raw (struct type *type, int regnum,
1612 char *from, char *to)
1613 {
1614 if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1615 && regnum <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1616 {
1617 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
1618 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword, &val, to);
1619 }
1620 else
1621 error("sh_register_convert_to_raw called with non DR register number");
1622 }
1623
1624 void
1625 sh_fetch_pseudo_register (int reg_nr)
1626 {
1627 int base_regnum, portion;
1628
1629 if (!register_cached (reg_nr))
1630 {
1631 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1632 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1633 {
1634 base_regnum = dr_reg_base_num (reg_nr);
1635
1636 /* Read the real regs for which this one is an alias. */
1637 for (portion = 0; portion < 2; portion++)
1638 if (!register_cached (base_regnum + portion))
1639 target_fetch_registers (base_regnum + portion);
1640 }
1641 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1642 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1643 {
1644 base_regnum = fv_reg_base_num (reg_nr);
1645
1646 /* Read the real regs for which this one is an alias. */
1647 for (portion = 0; portion < 4; portion++)
1648 if (!register_cached (base_regnum + portion))
1649 target_fetch_registers (base_regnum + portion);
1650
1651 }
1652 register_valid [reg_nr] = 1;
1653 }
1654 }
1655
1656 void
1657 sh_store_pseudo_register (int reg_nr)
1658 {
1659 int base_regnum, portion;
1660
1661 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1662 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1663 {
1664 base_regnum = dr_reg_base_num (reg_nr);
1665
1666 /* Write the real regs for which this one is an alias. */
1667 for (portion = 0; portion < 2; portion++)
1668 {
1669 register_valid[base_regnum + portion] = 1;
1670 target_store_registers (base_regnum + portion);
1671 }
1672 }
1673 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1674 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1675 {
1676 base_regnum = fv_reg_base_num (reg_nr);
1677
1678 /* Write the real regs for which this one is an alias. */
1679 for (portion = 0; portion < 4; portion++)
1680 {
1681 register_valid[base_regnum + portion] = 1;
1682 target_store_registers (base_regnum + portion);
1683 }
1684 }
1685 }
1686
1687 static int
1688 fv_reg_base_num (int fv_regnum)
1689 {
1690 int fp_regnum;
1691
1692 fp_regnum = FP0_REGNUM +
1693 (fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM) * 4;
1694 return fp_regnum;
1695 }
1696
1697 static int
1698 dr_reg_base_num (int dr_regnum)
1699 {
1700 int fp_regnum;
1701
1702 fp_regnum = FP0_REGNUM +
1703 (dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM) * 2;
1704 return fp_regnum;
1705 }
1706
1707 static void
1708 do_fv_register_info (int fv_regnum)
1709 {
1710 int first_fp_reg_num = fv_reg_base_num (fv_regnum);
1711 printf_filtered ("fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
1712 fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM,
1713 (int) read_register (first_fp_reg_num),
1714 (int) read_register (first_fp_reg_num + 1),
1715 (int) read_register (first_fp_reg_num + 2),
1716 (int) read_register (first_fp_reg_num + 3));
1717 }
1718
1719 static void
1720 do_dr_register_info (int dr_regnum)
1721 {
1722 int first_fp_reg_num = dr_reg_base_num (dr_regnum);
1723
1724 printf_filtered ("dr%d\t0x%08x%08x\n",
1725 dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM,
1726 (int) read_register (first_fp_reg_num),
1727 (int) read_register (first_fp_reg_num + 1));
1728 }
1729
1730 static void
1731 sh_do_pseudo_register (int regnum)
1732 {
1733 if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1734 internal_error ("Invalid pseudo register number %d\n", regnum);
1735 else if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1736 && regnum < gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1737 do_dr_register_info (regnum);
1738 else if (regnum >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1739 && regnum <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1740 do_fv_register_info (regnum);
1741 }
1742
1743
1744 static void
1745 sh_do_fp_register (int regnum)
1746 { /* do values for FP (float) regs */
1747 char *raw_buffer;
1748 double flt; /* double extracted from raw hex data */
1749 int inv;
1750 int j;
1751
1752 /* Allocate space for the float. */
1753 raw_buffer = (char *) alloca (REGISTER_RAW_SIZE (FP0_REGNUM));
1754
1755 /* Get the data in raw format. */
1756 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1757 error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
1758
1759 /* Get the register as a number */
1760 flt = unpack_double (builtin_type_float, raw_buffer, &inv);
1761
1762 /* Print the name and some spaces. */
1763 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1764 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1765
1766 /* Print the value. */
1767 printf_filtered (inv ? "<invalid float>" : "%-10.9g", flt);
1768
1769 /* Print the fp register as hex. */
1770 printf_filtered ("\t(raw 0x");
1771 for (j = 0; j < REGISTER_RAW_SIZE (regnum); j++)
1772 {
1773 register int idx = TARGET_BYTE_ORDER == BIG_ENDIAN ? j
1774 : REGISTER_RAW_SIZE (regnum) - 1 - j;
1775 printf_filtered ("%02x", (unsigned char) raw_buffer[idx]);
1776 }
1777 printf_filtered (")");
1778 printf_filtered ("\n");
1779 }
1780
1781 static void
1782 sh_do_register (int regnum)
1783 {
1784 char raw_buffer[MAX_REGISTER_RAW_SIZE];
1785
1786 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1787 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1788
1789 /* Get the data in raw format. */
1790 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1791 printf_filtered ("*value not available*\n");
1792
1793 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1794 gdb_stdout, 'x', 1, 0, Val_pretty_default);
1795 printf_filtered ("\t");
1796 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1797 gdb_stdout, 0, 1, 0, Val_pretty_default);
1798 printf_filtered ("\n");
1799 }
1800
1801 static void
1802 sh_print_register (int regnum)
1803 {
1804 if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1805 internal_error ("Invalid register number %d\n", regnum);
1806
1807 else if (regnum >= 0 && regnum < NUM_REGS)
1808 {
1809 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1810 sh_do_fp_register (regnum); /* FP regs */
1811 else
1812 sh_do_register (regnum); /* All other regs */
1813 }
1814
1815 else if (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1816 sh_do_pseudo_register (regnum);
1817 }
1818
1819 void
1820 sh_do_registers_info (int regnum, int fpregs)
1821 {
1822 if (regnum != -1) /* do one specified register */
1823 {
1824 if (*(REGISTER_NAME (regnum)) == '\0')
1825 error ("Not a valid register for the current processor type");
1826
1827 sh_print_register (regnum);
1828 }
1829 else
1830 /* do all (or most) registers */
1831 {
1832 regnum = 0;
1833 while (regnum < NUM_REGS)
1834 {
1835 /* If the register name is empty, it is undefined for this
1836 processor, so don't display anything. */
1837 if (REGISTER_NAME (regnum) == NULL
1838 || *(REGISTER_NAME (regnum)) == '\0')
1839 {
1840 regnum++;
1841 continue;
1842 }
1843
1844 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1845 {
1846 if (fpregs)
1847 {
1848 /* true for "INFO ALL-REGISTERS" command */
1849 sh_do_fp_register (regnum); /* FP regs */
1850 regnum ++;
1851 }
1852 else
1853 regnum += (gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM - FP0_REGNUM); /* skip FP regs */
1854 }
1855 else
1856 {
1857 sh_do_register (regnum); /* All other regs */
1858 regnum++;
1859 }
1860 }
1861
1862 if (fpregs)
1863 while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1864 {
1865 sh_do_pseudo_register (regnum);
1866 regnum++;
1867 }
1868 }
1869 }
1870
1871 #ifdef SVR4_SHARED_LIBS
1872
1873 /* Fetch (and possibly build) an appropriate link_map_offsets structure
1874 for native i386 linux targets using the struct offsets defined in
1875 link.h (but without actual reference to that file).
1876
1877 This makes it possible to access i386-linux shared libraries from
1878 a gdb that was not built on an i386-linux host (for cross debugging).
1879 */
1880
1881 struct link_map_offsets *
1882 sh_linux_svr4_fetch_link_map_offsets (void)
1883 {
1884 static struct link_map_offsets lmo;
1885 static struct link_map_offsets *lmp = 0;
1886
1887 if (lmp == 0)
1888 {
1889 lmp = &lmo;
1890
1891 lmo.r_debug_size = 8; /* 20 not actual size but all we need */
1892
1893 lmo.r_map_offset = 4;
1894 lmo.r_map_size = 4;
1895
1896 lmo.link_map_size = 20; /* 552 not actual size but all we need */
1897
1898 lmo.l_addr_offset = 0;
1899 lmo.l_addr_size = 4;
1900
1901 lmo.l_name_offset = 4;
1902 lmo.l_name_size = 4;
1903
1904 lmo.l_next_offset = 12;
1905 lmo.l_next_size = 4;
1906
1907 lmo.l_prev_offset = 16;
1908 lmo.l_prev_size = 4;
1909 }
1910
1911 return lmp;
1912 }
1913 #endif /* SVR4_SHARED_LIBS */
1914
1915 static gdbarch_init_ftype sh_gdbarch_init;
1916
1917 static struct gdbarch *
1918 sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1919 {
1920 static LONGEST sh_call_dummy_words[] = {0};
1921 struct gdbarch *gdbarch;
1922 struct gdbarch_tdep *tdep;
1923 gdbarch_register_name_ftype *sh_register_name;
1924 gdbarch_store_return_value_ftype *sh_store_return_value;
1925 gdbarch_register_virtual_type_ftype *sh_register_virtual_type;
1926
1927 /* Find a candidate among the list of pre-declared architectures. */
1928 arches = gdbarch_list_lookup_by_info (arches, &info);
1929 if (arches != NULL)
1930 return arches->gdbarch;
1931
1932 /* None found, create a new architecture from the information
1933 provided. */
1934 tdep = XMALLOC (struct gdbarch_tdep);
1935 gdbarch = gdbarch_alloc (&info, tdep);
1936
1937 /* Initialize the register numbers that are not common to all the
1938 variants to -1, if necessary thse will be overwritten in the case
1939 statement below. */
1940 tdep->FPUL_REGNUM = -1;
1941 tdep->FPSCR_REGNUM = -1;
1942 tdep->SR_REGNUM = 22;
1943 tdep->DSR_REGNUM = -1;
1944 tdep->FP_LAST_REGNUM = -1;
1945 tdep->A0G_REGNUM = -1;
1946 tdep->A0_REGNUM = -1;
1947 tdep->A1G_REGNUM = -1;
1948 tdep->A1_REGNUM = -1;
1949 tdep->M0_REGNUM = -1;
1950 tdep->M1_REGNUM = -1;
1951 tdep->X0_REGNUM = -1;
1952 tdep->X1_REGNUM = -1;
1953 tdep->Y0_REGNUM = -1;
1954 tdep->Y1_REGNUM = -1;
1955 tdep->MOD_REGNUM = -1;
1956 tdep->RS_REGNUM = -1;
1957 tdep->RE_REGNUM = -1;
1958 tdep->SSR_REGNUM = -1;
1959 tdep->SPC_REGNUM = -1;
1960 tdep->DR0_REGNUM = -1;
1961 tdep->DR_LAST_REGNUM = -1;
1962 tdep->FV0_REGNUM = -1;
1963 tdep->FV_LAST_REGNUM = -1;
1964
1965 set_gdbarch_fp0_regnum (gdbarch, -1);
1966 set_gdbarch_num_pseudo_regs (gdbarch, 0);
1967 set_gdbarch_max_register_raw_size (gdbarch, 4);
1968 set_gdbarch_max_register_virtual_size (gdbarch, 4);
1969 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1970 set_gdbarch_num_regs (gdbarch, 59);
1971 set_gdbarch_sp_regnum (gdbarch, 15);
1972 set_gdbarch_fp_regnum (gdbarch, 14);
1973 set_gdbarch_pc_regnum (gdbarch, 16);
1974 set_gdbarch_register_size (gdbarch, 4);
1975 set_gdbarch_register_bytes (gdbarch, NUM_REGS * 4);
1976 set_gdbarch_fetch_pseudo_register (gdbarch, sh_fetch_pseudo_register);
1977 set_gdbarch_store_pseudo_register (gdbarch, sh_store_pseudo_register);
1978 set_gdbarch_do_registers_info (gdbarch, sh_do_registers_info);
1979 set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
1980 set_gdbarch_extract_return_value (gdbarch, sh_extract_return_value);
1981 print_sh_insn = gdb_print_insn_sh;
1982
1983 switch (info.bfd_arch_info->mach)
1984 {
1985 case bfd_mach_sh:
1986 sh_register_name = sh_sh_register_name;
1987 sh_show_regs = sh_generic_show_regs;
1988 sh_store_return_value = sh_default_store_return_value;
1989 sh_register_virtual_type = sh_default_register_virtual_type;
1990 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1991 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1992 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1993 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1994 break;
1995 case bfd_mach_sh2:
1996 sh_register_name = sh_sh_register_name;
1997 sh_show_regs = sh_generic_show_regs;
1998 sh_store_return_value = sh_default_store_return_value;
1999 sh_register_virtual_type = sh_default_register_virtual_type;
2000 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2001 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2002 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2003 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2004 break;
2005 case bfd_mach_sh_dsp:
2006 sh_register_name = sh_sh_dsp_register_name;
2007 sh_show_regs = sh_dsp_show_regs;
2008 sh_store_return_value = sh_default_store_return_value;
2009 sh_register_virtual_type = sh_default_register_virtual_type;
2010 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2011 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2012 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2013 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2014 tdep->DSR_REGNUM = 24;
2015 tdep->A0G_REGNUM = 25;
2016 tdep->A0_REGNUM = 26;
2017 tdep->A1G_REGNUM = 27;
2018 tdep->A1_REGNUM = 28;
2019 tdep->M0_REGNUM = 29;
2020 tdep->M1_REGNUM = 30;
2021 tdep->X0_REGNUM = 31;
2022 tdep->X1_REGNUM = 32;
2023 tdep->Y0_REGNUM = 33;
2024 tdep->Y1_REGNUM = 34;
2025 tdep->MOD_REGNUM = 40;
2026 tdep->RS_REGNUM = 43;
2027 tdep->RE_REGNUM = 44;
2028 break;
2029 case bfd_mach_sh3:
2030 sh_register_name = sh_sh3_register_name;
2031 sh_show_regs = sh3_show_regs;
2032 sh_store_return_value = sh_default_store_return_value;
2033 sh_register_virtual_type = sh_default_register_virtual_type;
2034 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2035 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2036 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2037 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2038 tdep->SSR_REGNUM = 41;
2039 tdep->SPC_REGNUM = 42;
2040 break;
2041 case bfd_mach_sh3e:
2042 sh_register_name = sh_sh3e_register_name;
2043 sh_show_regs = sh3e_show_regs;
2044 sh_store_return_value = sh3e_sh4_store_return_value;
2045 sh_register_virtual_type = sh_sh3e_register_virtual_type;
2046 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2047 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
2048 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2049 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2050 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2051 set_gdbarch_fp0_regnum (gdbarch, 25);
2052 tdep->FPUL_REGNUM = 23;
2053 tdep->FPSCR_REGNUM = 24;
2054 tdep->FP_LAST_REGNUM = 40;
2055 tdep->SSR_REGNUM = 41;
2056 tdep->SPC_REGNUM = 42;
2057 break;
2058 case bfd_mach_sh3_dsp:
2059 sh_register_name = sh_sh3_dsp_register_name;
2060 sh_show_regs = sh3_dsp_show_regs;
2061 sh_store_return_value = sh_default_store_return_value;
2062 sh_register_virtual_type = sh_default_register_virtual_type;
2063 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2064 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2065 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2066 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2067 tdep->DSR_REGNUM = 24;
2068 tdep->A0G_REGNUM = 25;
2069 tdep->A0_REGNUM = 26;
2070 tdep->A1G_REGNUM = 27;
2071 tdep->A1_REGNUM = 28;
2072 tdep->M0_REGNUM = 29;
2073 tdep->M1_REGNUM = 30;
2074 tdep->X0_REGNUM = 31;
2075 tdep->X1_REGNUM = 32;
2076 tdep->Y0_REGNUM = 33;
2077 tdep->Y1_REGNUM = 34;
2078 tdep->MOD_REGNUM = 40;
2079 tdep->RS_REGNUM = 43;
2080 tdep->RE_REGNUM = 44;
2081 tdep->SSR_REGNUM = 41;
2082 tdep->SPC_REGNUM = 42;
2083 break;
2084 case bfd_mach_sh4:
2085 sh_register_name = sh_sh4_register_name;
2086 sh_show_regs = sh4_show_regs;
2087 sh_store_return_value = sh3e_sh4_store_return_value;
2088 sh_register_virtual_type = sh_sh4_register_virtual_type;
2089 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2090 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
2091 set_gdbarch_fp0_regnum (gdbarch, 25);
2092 set_gdbarch_register_raw_size (gdbarch, sh_sh4_register_raw_size);
2093 set_gdbarch_register_virtual_size (gdbarch, sh_sh4_register_raw_size);
2094 set_gdbarch_register_byte (gdbarch, sh_sh4_register_byte);
2095 set_gdbarch_num_pseudo_regs (gdbarch, 12);
2096 set_gdbarch_max_register_raw_size (gdbarch, 4 * 4);
2097 set_gdbarch_max_register_virtual_size (gdbarch, 4 * 4);
2098 set_gdbarch_register_convert_to_raw (gdbarch, sh_sh4_register_convert_to_raw);
2099 set_gdbarch_register_convert_to_virtual (gdbarch, sh_sh4_register_convert_to_virtual);
2100 set_gdbarch_register_convertible (gdbarch, sh_sh4_register_convertible);
2101 tdep->FPUL_REGNUM = 23;
2102 tdep->FPSCR_REGNUM = 24;
2103 tdep->FP_LAST_REGNUM = 40;
2104 tdep->SSR_REGNUM = 41;
2105 tdep->SPC_REGNUM = 42;
2106 tdep->DR0_REGNUM = 59;
2107 tdep->DR_LAST_REGNUM = 66;
2108 tdep->FV0_REGNUM = 67;
2109 tdep->FV_LAST_REGNUM = 70;
2110 break;
2111 default:
2112 sh_register_name = sh_generic_register_name;
2113 sh_show_regs = sh_generic_show_regs;
2114 sh_store_return_value = sh_default_store_return_value;
2115 sh_register_virtual_type = sh_default_register_virtual_type;
2116 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2117 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2118 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2119 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2120 break;
2121 }
2122
2123 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
2124 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2125 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
2126 set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
2127 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2128 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2129
2130 set_gdbarch_register_name (gdbarch, sh_register_name);
2131 set_gdbarch_register_virtual_type (gdbarch, sh_register_virtual_type);
2132
2133 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2134 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2135 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2136 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2137 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2138 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2139 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);/*??should be 8?*/
2140
2141 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2142 set_gdbarch_call_dummy_length (gdbarch, 0);
2143 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2144 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2145 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
2146 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2147 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2148 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2149 set_gdbarch_call_dummy_words (gdbarch, sh_call_dummy_words);
2150 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (sh_call_dummy_words));
2151 set_gdbarch_call_dummy_p (gdbarch, 1);
2152 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2153 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
2154 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2155 set_gdbarch_coerce_float_to_double (gdbarch,
2156 sh_coerce_float_to_double);
2157
2158 set_gdbarch_push_arguments (gdbarch, sh_push_arguments);
2159 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2160 set_gdbarch_push_return_address (gdbarch, sh_push_return_address);
2161
2162 set_gdbarch_store_struct_return (gdbarch, sh_store_struct_return);
2163 set_gdbarch_store_return_value (gdbarch, sh_store_return_value);
2164 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2165 set_gdbarch_use_struct_convention (gdbarch, sh_use_struct_convention);
2166 set_gdbarch_init_extra_frame_info (gdbarch, sh_init_extra_frame_info);
2167 set_gdbarch_pop_frame (gdbarch, sh_pop_frame);
2168 set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue);
2169 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2170 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2171 set_gdbarch_function_start_offset (gdbarch, 0);
2172
2173 set_gdbarch_frame_args_skip (gdbarch, 0);
2174 set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
2175 set_gdbarch_frame_chain (gdbarch, sh_frame_chain);
2176 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
2177 set_gdbarch_frame_saved_pc (gdbarch, sh_frame_saved_pc);
2178 set_gdbarch_frame_args_address (gdbarch, default_frame_address);
2179 set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
2180 set_gdbarch_saved_pc_after_call (gdbarch, sh_saved_pc_after_call);
2181 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2182 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2183 set_gdbarch_ieee_float (gdbarch, 1);
2184 tm_print_insn = print_sh_insn;
2185
2186 return gdbarch;
2187 }
2188
2189 void
2190 _initialize_sh_tdep (void)
2191 {
2192 struct cmd_list_element *c;
2193
2194 register_gdbarch_init (bfd_arch_sh, sh_gdbarch_init);
2195
2196 add_com ("regs", class_vars, sh_show_regs_command, "Print all registers");
2197 }
GDB Binutils - Deliverables
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