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* sh-tdep.h (struct gdbarch_tdep): Remove. Change all register
[deliverable/binutils-gdb.git] / gdb / sh-tdep.c
1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 /*
23 Contributed by Steve Chamberlain
24 sac@cygnus.com
25 */
26
27 #include "defs.h"
28 #include "frame.h"
29 #include "symtab.h"
30 #include "symfile.h"
31 #include "gdbtypes.h"
32 #include "gdbcmd.h"
33 #include "gdbcore.h"
34 #include "value.h"
35 #include "dis-asm.h"
36 #include "inferior.h"
37 #include "gdb_string.h"
38 #include "arch-utils.h"
39 #include "floatformat.h"
40 #include "regcache.h"
41 #include "doublest.h"
42 #include "osabi.h"
43
44 #include "sh-tdep.h"
45
46 #include "elf-bfd.h"
47 #include "solib-svr4.h"
48
49 /* sh flags */
50 #include "elf/sh.h"
51 /* registers numbers shared with the simulator */
52 #include "gdb/sim-sh.h"
53
54 static void (*sh_show_regs) (void);
55
56 #define SH_NUM_REGS 59
57
58 /* Define other aspects of the stack frame.
59 we keep a copy of the worked out return pc lying around, since it
60 is a useful bit of info */
61
62 struct frame_extra_info
63 {
64 CORE_ADDR return_pc;
65 int leaf_function;
66 int f_offset;
67 };
68
69 static const char *
70 sh_generic_register_name (int reg_nr)
71 {
72 static char *register_names[] =
73 {
74 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
75 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
76 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
77 "fpul", "fpscr",
78 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
79 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
80 "ssr", "spc",
81 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
82 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
83 };
84 if (reg_nr < 0)
85 return NULL;
86 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
87 return NULL;
88 return register_names[reg_nr];
89 }
90
91 static const char *
92 sh_sh_register_name (int reg_nr)
93 {
94 static char *register_names[] =
95 {
96 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
97 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
98 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
99 "", "",
100 "", "", "", "", "", "", "", "",
101 "", "", "", "", "", "", "", "",
102 "", "",
103 "", "", "", "", "", "", "", "",
104 "", "", "", "", "", "", "", "",
105 };
106 if (reg_nr < 0)
107 return NULL;
108 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
109 return NULL;
110 return register_names[reg_nr];
111 }
112
113 static const char *
114 sh_sh3_register_name (int reg_nr)
115 {
116 static char *register_names[] =
117 {
118 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
119 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
120 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
121 "", "",
122 "", "", "", "", "", "", "", "",
123 "", "", "", "", "", "", "", "",
124 "ssr", "spc",
125 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
126 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
127 };
128 if (reg_nr < 0)
129 return NULL;
130 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
131 return NULL;
132 return register_names[reg_nr];
133 }
134
135 static const char *
136 sh_sh3e_register_name (int reg_nr)
137 {
138 static char *register_names[] =
139 {
140 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
141 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
142 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
143 "fpul", "fpscr",
144 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
145 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
146 "ssr", "spc",
147 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
148 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
149 };
150 if (reg_nr < 0)
151 return NULL;
152 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
153 return NULL;
154 return register_names[reg_nr];
155 }
156
157 static const char *
158 sh_sh2e_register_name (int reg_nr)
159 {
160 static char *register_names[] =
161 {
162 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
163 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
164 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
165 "fpul", "fpscr",
166 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
167 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
168 "", "",
169 "", "", "", "", "", "", "", "",
170 "", "", "", "", "", "", "", "",
171 };
172 if (reg_nr < 0)
173 return NULL;
174 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
175 return NULL;
176 return register_names[reg_nr];
177 }
178
179 static const char *
180 sh_sh_dsp_register_name (int reg_nr)
181 {
182 static char *register_names[] =
183 {
184 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
185 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
186 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
187 "", "dsr",
188 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
189 "y0", "y1", "", "", "", "", "", "mod",
190 "", "",
191 "rs", "re", "", "", "", "", "", "",
192 "", "", "", "", "", "", "", "",
193 };
194 if (reg_nr < 0)
195 return NULL;
196 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
197 return NULL;
198 return register_names[reg_nr];
199 }
200
201 static const char *
202 sh_sh3_dsp_register_name (int reg_nr)
203 {
204 static char *register_names[] =
205 {
206 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
207 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
208 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
209 "", "dsr",
210 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
211 "y0", "y1", "", "", "", "", "", "mod",
212 "ssr", "spc",
213 "rs", "re", "", "", "", "", "", "",
214 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
215 "", "", "", "", "", "", "", "",
216 };
217 if (reg_nr < 0)
218 return NULL;
219 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
220 return NULL;
221 return register_names[reg_nr];
222 }
223
224 static const char *
225 sh_sh4_register_name (int reg_nr)
226 {
227 static char *register_names[] =
228 {
229 /* general registers 0-15 */
230 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
231 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
232 /* 16 - 22 */
233 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
234 /* 23, 24 */
235 "fpul", "fpscr",
236 /* floating point registers 25 - 40 */
237 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
238 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
239 /* 41, 42 */
240 "ssr", "spc",
241 /* bank 0 43 - 50 */
242 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
243 /* bank 1 51 - 58 */
244 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
245 /* double precision (pseudo) 59 - 66 */
246 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
247 /* vectors (pseudo) 67 - 70 */
248 "fv0", "fv4", "fv8", "fv12",
249 /* FIXME: missing XF 71 - 86 */
250 /* FIXME: missing XD 87 - 94 */
251 };
252 if (reg_nr < 0)
253 return NULL;
254 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
255 return NULL;
256 return register_names[reg_nr];
257 }
258
259 static const unsigned char *
260 sh_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
261 {
262 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
263 static unsigned char breakpoint[] = {0xc3, 0xc3};
264
265 *lenptr = sizeof (breakpoint);
266 return breakpoint;
267 }
268
269 static CORE_ADDR
270 sh_push_dummy_code (struct gdbarch *gdbarch,
271 CORE_ADDR sp, CORE_ADDR funaddr, int using_gcc,
272 struct value **args, int nargs,
273 struct type *value_type,
274 CORE_ADDR *real_pc, CORE_ADDR *bp_addr)
275 {
276 /* Allocate space sufficient for a breakpoint. */
277 sp = (sp - 2) & ~1;
278 /* Store the address of that breakpoint */
279 *bp_addr = sp;
280 /* sh always starts the call at the callee's entry point. */
281 *real_pc = funaddr;
282 return sp;
283 }
284
285 /* Prologue looks like
286 [mov.l <regs>,@-r15]...
287 [sts.l pr,@-r15]
288 [mov.l r14,@-r15]
289 [mov r15,r14]
290
291 Actually it can be more complicated than this. For instance, with
292 newer gcc's:
293
294 mov.l r14,@-r15
295 add #-12,r15
296 mov r15,r14
297 mov r4,r1
298 mov r5,r2
299 mov.l r6,@(4,r14)
300 mov.l r7,@(8,r14)
301 mov.b r1,@r14
302 mov r14,r1
303 mov r14,r1
304 add #2,r1
305 mov.w r2,@r1
306
307 */
308
309 /* STS.L PR,@-r15 0100111100100010
310 r15-4-->r15, PR-->(r15) */
311 #define IS_STS(x) ((x) == 0x4f22)
312
313 /* MOV.L Rm,@-r15 00101111mmmm0110
314 r15-4-->r15, Rm-->(R15) */
315 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
316
317 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
318
319 /* MOV r15,r14 0110111011110011
320 r15-->r14 */
321 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
322
323 /* ADD #imm,r15 01111111iiiiiiii
324 r15+imm-->r15 */
325 #define IS_ADD_IMM_SP(x) (((x) & 0xff00) == 0x7f00)
326
327 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
328 #define IS_SHLL_R3(x) ((x) == 0x4300)
329
330 /* ADD r3,r15 0011111100111100
331 r15+r3-->r15 */
332 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
333
334 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
335 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
336 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
337 /* CV, 2003-08-28: Only suitable with Rn == SP, therefore name changed to
338 make this entirely clear. */
339 #define IS_FPUSH(x) (((x) & 0xf00f) == 0xf00b)
340
341 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
342 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
343 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
344 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
345 #define IS_ARG_MOV(x) \
346 (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
347 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
348 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
349
350 /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
351 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
352 #define IS_MOV_TO_R14(x) \
353 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
354
355 #define FPSCR_SZ (1 << 20)
356
357 /* Skip any prologue before the guts of a function */
358
359 /* Skip the prologue using the debug information. If this fails we'll
360 fall back on the 'guess' method below. */
361 static CORE_ADDR
362 after_prologue (CORE_ADDR pc)
363 {
364 struct symtab_and_line sal;
365 CORE_ADDR func_addr, func_end;
366
367 /* If we can not find the symbol in the partial symbol table, then
368 there is no hope we can determine the function's start address
369 with this code. */
370 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
371 return 0;
372
373 /* Get the line associated with FUNC_ADDR. */
374 sal = find_pc_line (func_addr, 0);
375
376 /* There are only two cases to consider. First, the end of the source line
377 is within the function bounds. In that case we return the end of the
378 source line. Second is the end of the source line extends beyond the
379 bounds of the current function. We need to use the slow code to
380 examine instructions in that case. */
381 if (sal.end < func_end)
382 return sal.end;
383 else
384 return 0;
385 }
386
387 /* Here we look at each instruction in the function, and try to guess
388 where the prologue ends. Unfortunately this is not always
389 accurate. */
390 static CORE_ADDR
391 sh_skip_prologue_hard_way (CORE_ADDR start_pc)
392 {
393 CORE_ADDR here, end;
394 int updated_fp = 0;
395
396 if (!start_pc)
397 return 0;
398
399 for (here = start_pc, end = start_pc + (2 * 28); here < end;)
400 {
401 int w = read_memory_integer (here, 2);
402 here += 2;
403 if (IS_FPUSH (w) || IS_PUSH (w) || IS_STS (w) || IS_MOV_R3 (w)
404 || IS_ADD_R3SP (w) || IS_ADD_IMM_SP (w) || IS_SHLL_R3 (w)
405 || IS_ARG_MOV (w) || IS_MOV_TO_R14 (w))
406 {
407 start_pc = here;
408 }
409 else if (IS_MOV_SP_FP (w))
410 {
411 start_pc = here;
412 updated_fp = 1;
413 }
414 else
415 /* Don't bail out yet, if we are before the copy of sp. */
416 if (updated_fp)
417 break;
418 }
419
420 return start_pc;
421 }
422
423 static CORE_ADDR
424 sh_skip_prologue (CORE_ADDR pc)
425 {
426 CORE_ADDR post_prologue_pc;
427
428 /* See if we can determine the end of the prologue via the symbol table.
429 If so, then return either PC, or the PC after the prologue, whichever
430 is greater. */
431 post_prologue_pc = after_prologue (pc);
432
433 /* If after_prologue returned a useful address, then use it. Else
434 fall back on the instruction skipping code. */
435 if (post_prologue_pc != 0)
436 return max (pc, post_prologue_pc);
437 else
438 return sh_skip_prologue_hard_way (pc);
439 }
440
441 /* Immediately after a function call, return the saved pc.
442 Can't always go through the frames for this because on some machines
443 the new frame is not set up until the new function executes
444 some instructions.
445
446 The return address is the value saved in the PR register + 4 */
447 static CORE_ADDR
448 sh_saved_pc_after_call (struct frame_info *frame)
449 {
450 return (ADDR_BITS_REMOVE (read_register (PR_REGNUM)));
451 }
452
453 /* Should call_function allocate stack space for a struct return? */
454 static int
455 sh_use_struct_convention (int gcc_p, struct type *type)
456 {
457 #if 0
458 return (TYPE_LENGTH (type) > 1);
459 #else
460 int len = TYPE_LENGTH (type);
461 int nelem = TYPE_NFIELDS (type);
462 return ((len != 1 && len != 2 && len != 4 && len != 8) || nelem != 1) &&
463 (len != 8 || TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0)) != 4);
464 #endif
465 }
466
467 /* Disassemble an instruction. */
468 static int
469 gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
470 {
471 info->endian = TARGET_BYTE_ORDER;
472 return print_insn_sh (memaddr, info);
473 }
474
475 /* Given a GDB frame, determine the address of the calling function's
476 frame. This will be used to create a new GDB frame struct, and
477 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
478 will be called for the new frame.
479
480 For us, the frame address is its stack pointer value, so we look up
481 the function prologue to determine the caller's sp value, and return it. */
482 static CORE_ADDR
483 sh_frame_chain (struct frame_info *frame)
484 {
485 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
486 get_frame_base (frame),
487 get_frame_base (frame)))
488 return get_frame_base (frame); /* dummy frame same as caller's frame */
489 if (get_frame_pc (frame)
490 && !deprecated_inside_entry_file (get_frame_pc (frame)))
491 return read_memory_integer (get_frame_base (frame)
492 + get_frame_extra_info (frame)->f_offset, 4);
493 else
494 return 0;
495 }
496
497 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
498 we might want to do here is to check REGNUM against the clobber mask, and
499 somehow flag it as invalid if it isn't saved on the stack somewhere. This
500 would provide a graceful failure mode when trying to get the value of
501 caller-saves registers for an inner frame. */
502 static CORE_ADDR
503 sh_find_callers_reg (struct frame_info *fi, int regnum)
504 {
505 for (; fi; fi = get_next_frame (fi))
506 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi),
507 get_frame_base (fi)))
508 /* When the caller requests PR from the dummy frame, we return PC because
509 that's where the previous routine appears to have done a call from. */
510 return deprecated_read_register_dummy (get_frame_pc (fi),
511 get_frame_base (fi), regnum);
512 else
513 {
514 DEPRECATED_FRAME_INIT_SAVED_REGS (fi);
515 if (!get_frame_pc (fi))
516 return 0;
517 if (get_frame_saved_regs (fi)[regnum] != 0)
518 return read_memory_integer (get_frame_saved_regs (fi)[regnum],
519 register_size (current_gdbarch, regnum));
520 }
521 return read_register (regnum);
522 }
523
524 /* Put here the code to store, into a struct frame_saved_regs, the
525 addresses of the saved registers of frame described by FRAME_INFO.
526 This includes special registers such as pc and fp saved in special
527 ways in the stack frame. sp is even more special: the address we
528 return for it IS the sp for the next frame. */
529 static void
530 sh_nofp_frame_init_saved_regs (struct frame_info *fi)
531 {
532 int *where = (int *) alloca ((NUM_REGS + NUM_PSEUDO_REGS) * sizeof(int));
533 int rn;
534 int have_fp = 0;
535 int depth;
536 int pc;
537 int opc;
538 int inst;
539 int r3_val = 0;
540 char *dummy_regs = deprecated_generic_find_dummy_frame (get_frame_pc (fi),
541 get_frame_base (fi));
542
543 if (get_frame_saved_regs (fi) == NULL)
544 frame_saved_regs_zalloc (fi);
545 else
546 memset (get_frame_saved_regs (fi), 0, SIZEOF_FRAME_SAVED_REGS);
547
548 if (dummy_regs)
549 {
550 /* DANGER! This is ONLY going to work if the char buffer format of
551 the saved registers is byte-for-byte identical to the
552 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
553 memcpy (get_frame_saved_regs (fi), dummy_regs, SIZEOF_FRAME_SAVED_REGS);
554 return;
555 }
556
557 get_frame_extra_info (fi)->leaf_function = 1;
558 get_frame_extra_info (fi)->f_offset = 0;
559
560 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
561 where[rn] = -1;
562
563 depth = 0;
564
565 /* Loop around examining the prologue inst until we find something
566 that does not appear to be part of the prologue. But give up
567 after 20 of them, since we're getting silly then. */
568
569 pc = get_frame_func (fi);
570 if (!pc)
571 {
572 deprecated_update_frame_pc_hack (fi, 0);
573 return;
574 }
575
576 for (opc = pc + (2 * 28); pc < opc; pc += 2)
577 {
578 inst = read_memory_integer (pc, 2);
579 /* See where the registers will be saved to */
580 if (IS_PUSH (inst))
581 {
582 rn = GET_PUSHED_REG (inst);
583 where[rn] = depth;
584 depth += 4;
585 }
586 else if (IS_STS (inst))
587 {
588 where[PR_REGNUM] = depth;
589 /* If we're storing the pr then this isn't a leaf */
590 get_frame_extra_info (fi)->leaf_function = 0;
591 depth += 4;
592 }
593 else if (IS_MOV_R3 (inst))
594 {
595 r3_val = ((inst & 0xff) ^ 0x80) - 0x80;
596 }
597 else if (IS_SHLL_R3 (inst))
598 {
599 r3_val <<= 1;
600 }
601 else if (IS_ADD_R3SP (inst))
602 {
603 depth += -r3_val;
604 }
605 else if (IS_ADD_IMM_SP (inst))
606 {
607 depth -= ((inst & 0xff) ^ 0x80) - 0x80;
608 }
609 else if (IS_MOV_SP_FP (inst))
610 break;
611 #if 0 /* This used to just stop when it found an instruction that
612 was not considered part of the prologue. Now, we just
613 keep going looking for likely instructions. */
614 else
615 break;
616 #endif
617 }
618
619 /* Now we know how deep things are, we can work out their addresses */
620
621 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
622 {
623 if (where[rn] >= 0)
624 {
625 if (rn == DEPRECATED_FP_REGNUM)
626 have_fp = 1;
627
628 get_frame_saved_regs (fi)[rn] = get_frame_base (fi) - where[rn] + depth - 4;
629 }
630 else
631 {
632 get_frame_saved_regs (fi)[rn] = 0;
633 }
634 }
635
636 if (have_fp)
637 {
638 get_frame_saved_regs (fi)[SP_REGNUM] = read_memory_integer (get_frame_saved_regs (fi)[DEPRECATED_FP_REGNUM], 4);
639 }
640 else
641 {
642 get_frame_saved_regs (fi)[SP_REGNUM] = get_frame_base (fi) - 4;
643 }
644
645 get_frame_extra_info (fi)->f_offset = depth - where[DEPRECATED_FP_REGNUM] - 4;
646 /* Work out the return pc - either from the saved pr or the pr
647 value */
648 }
649
650 /* For vectors of 4 floating point registers. */
651 static int
652 fv_reg_base_num (int fv_regnum)
653 {
654 int fp_regnum;
655
656 fp_regnum = FP0_REGNUM +
657 (fv_regnum - FV0_REGNUM) * 4;
658 return fp_regnum;
659 }
660
661 /* For double precision floating point registers, i.e 2 fp regs.*/
662 static int
663 dr_reg_base_num (int dr_regnum)
664 {
665 int fp_regnum;
666
667 fp_regnum = FP0_REGNUM +
668 (dr_regnum - DR0_REGNUM) * 2;
669 return fp_regnum;
670 }
671
672 static void
673 sh_fp_frame_init_saved_regs (struct frame_info *fi)
674 {
675 int *where = (int *) alloca ((NUM_REGS + NUM_PSEUDO_REGS) * sizeof (int));
676 int rn;
677 int have_fp = 0;
678 int depth;
679 int pc;
680 int opc;
681 int inst;
682 int r3_val = 0;
683 char *dummy_regs = deprecated_generic_find_dummy_frame (get_frame_pc (fi), get_frame_base (fi));
684
685 if (get_frame_saved_regs (fi) == NULL)
686 frame_saved_regs_zalloc (fi);
687 else
688 memset (get_frame_saved_regs (fi), 0, SIZEOF_FRAME_SAVED_REGS);
689
690 if (dummy_regs)
691 {
692 /* DANGER! This is ONLY going to work if the char buffer format of
693 the saved registers is byte-for-byte identical to the
694 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
695 memcpy (get_frame_saved_regs (fi), dummy_regs, SIZEOF_FRAME_SAVED_REGS);
696 return;
697 }
698
699 get_frame_extra_info (fi)->leaf_function = 1;
700 get_frame_extra_info (fi)->f_offset = 0;
701
702 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
703 where[rn] = -1;
704
705 depth = 0;
706
707 /* Loop around examining the prologue inst until we find something
708 that does not appear to be part of the prologue. But give up
709 after 20 of them, since we're getting silly then. */
710
711 pc = get_frame_func (fi);
712 if (!pc)
713 {
714 deprecated_update_frame_pc_hack (fi, 0);
715 return;
716 }
717
718 for (opc = pc + (2 * 28); pc < opc; pc += 2)
719 {
720 inst = read_memory_integer (pc, 2);
721 /* See where the registers will be saved to */
722 if (IS_PUSH (inst))
723 {
724 rn = GET_PUSHED_REG (inst);
725 where[rn] = depth;
726 depth += 4;
727 }
728 else if (IS_STS (inst))
729 {
730 where[PR_REGNUM] = depth;
731 /* If we're storing the pr then this isn't a leaf */
732 get_frame_extra_info (fi)->leaf_function = 0;
733 depth += 4;
734 }
735 else if (IS_MOV_R3 (inst))
736 {
737 r3_val = ((inst & 0xff) ^ 0x80) - 0x80;
738 }
739 else if (IS_SHLL_R3 (inst))
740 {
741 r3_val <<= 1;
742 }
743 else if (IS_ADD_R3SP (inst))
744 {
745 depth += -r3_val;
746 }
747 else if (IS_ADD_IMM_SP (inst))
748 {
749 depth -= ((inst & 0xff) ^ 0x80) - 0x80;
750 }
751 else if (IS_FPUSH (inst))
752 {
753 if (read_register (FPSCR_REGNUM) & FPSCR_SZ)
754 {
755 depth += 8;
756 }
757 else
758 {
759 depth += 4;
760 }
761 }
762 else if (IS_MOV_SP_FP (inst))
763 break;
764 #if 0 /* This used to just stop when it found an instruction that
765 was not considered part of the prologue. Now, we just
766 keep going looking for likely instructions. */
767 else
768 break;
769 #endif
770 }
771
772 /* Now we know how deep things are, we can work out their addresses */
773
774 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
775 {
776 if (where[rn] >= 0)
777 {
778 if (rn == DEPRECATED_FP_REGNUM)
779 have_fp = 1;
780
781 get_frame_saved_regs (fi)[rn] = get_frame_base (fi) - where[rn] + depth - 4;
782 }
783 else
784 {
785 get_frame_saved_regs (fi)[rn] = 0;
786 }
787 }
788
789 if (have_fp)
790 {
791 get_frame_saved_regs (fi)[SP_REGNUM] =
792 read_memory_integer (get_frame_saved_regs (fi)[DEPRECATED_FP_REGNUM], 4);
793 }
794 else
795 {
796 get_frame_saved_regs (fi)[SP_REGNUM] = get_frame_base (fi) - 4;
797 }
798
799 get_frame_extra_info (fi)->f_offset = depth - where[DEPRECATED_FP_REGNUM] - 4;
800 /* Work out the return pc - either from the saved pr or the pr
801 value */
802 }
803
804 /* Initialize the extra info saved in a FRAME */
805 static void
806 sh_init_extra_frame_info (int fromleaf, struct frame_info *fi)
807 {
808
809 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
810
811 if (get_next_frame (fi))
812 deprecated_update_frame_pc_hack (fi, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi)));
813
814 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi),
815 get_frame_base (fi)))
816 {
817 /* We need to setup fi->frame here because call_function_by_hand
818 gets it wrong by assuming it's always FP. */
819 deprecated_update_frame_base_hack (fi, deprecated_read_register_dummy (get_frame_pc (fi), get_frame_base (fi),
820 SP_REGNUM));
821 get_frame_extra_info (fi)->return_pc = deprecated_read_register_dummy (get_frame_pc (fi),
822 get_frame_base (fi),
823 PC_REGNUM);
824 get_frame_extra_info (fi)->f_offset = -(DEPRECATED_CALL_DUMMY_LENGTH + 4);
825 get_frame_extra_info (fi)->leaf_function = 0;
826 return;
827 }
828 else
829 {
830 DEPRECATED_FRAME_INIT_SAVED_REGS (fi);
831 get_frame_extra_info (fi)->return_pc =
832 sh_find_callers_reg (fi, PR_REGNUM);
833 }
834 }
835
836 /* Extract from an array REGBUF containing the (raw) register state
837 the address in which a function should return its structure value,
838 as a CORE_ADDR (or an expression that can be used as one). */
839 static CORE_ADDR
840 sh_extract_struct_value_address (struct regcache *regcache)
841 {
842 ULONGEST addr;
843 regcache_cooked_read_unsigned (regcache, STRUCT_RETURN_REGNUM, &addr);
844 return addr;
845 }
846
847 static CORE_ADDR
848 sh_frame_saved_pc (struct frame_info *frame)
849 {
850 return (get_frame_extra_info (frame)->return_pc);
851 }
852
853 /* Discard from the stack the innermost frame,
854 restoring all saved registers. */
855 static void
856 sh_pop_frame (void)
857 {
858 struct frame_info *frame = get_current_frame ();
859 CORE_ADDR fp;
860 int regnum;
861
862 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
863 get_frame_base (frame),
864 get_frame_base (frame)))
865 generic_pop_dummy_frame ();
866 else
867 {
868 fp = get_frame_base (frame);
869 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
870
871 /* Copy regs from where they were saved in the frame */
872 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
873 if (get_frame_saved_regs (frame)[regnum])
874 write_register (regnum,
875 read_memory_integer (get_frame_saved_regs (frame)[regnum], 4));
876
877 write_register (PC_REGNUM, get_frame_extra_info (frame)->return_pc);
878 write_register (SP_REGNUM, fp + 4);
879 }
880 flush_cached_frames ();
881 }
882
883 static CORE_ADDR
884 sh_frame_align (struct gdbarch *ignore, CORE_ADDR sp)
885 {
886 return sp & ~3;
887 }
888
889 /* Function: push_dummy_call (formerly push_arguments)
890 Setup the function arguments for calling a function in the inferior.
891
892 On the Hitachi SH architecture, there are four registers (R4 to R7)
893 which are dedicated for passing function arguments. Up to the first
894 four arguments (depending on size) may go into these registers.
895 The rest go on the stack.
896
897 MVS: Except on SH variants that have floating point registers.
898 In that case, float and double arguments are passed in the same
899 manner, but using FP registers instead of GP registers.
900
901 Arguments that are smaller than 4 bytes will still take up a whole
902 register or a whole 32-bit word on the stack, and will be
903 right-justified in the register or the stack word. This includes
904 chars, shorts, and small aggregate types.
905
906 Arguments that are larger than 4 bytes may be split between two or
907 more registers. If there are not enough registers free, an argument
908 may be passed partly in a register (or registers), and partly on the
909 stack. This includes doubles, long longs, and larger aggregates.
910 As far as I know, there is no upper limit to the size of aggregates
911 that will be passed in this way; in other words, the convention of
912 passing a pointer to a large aggregate instead of a copy is not used.
913
914 MVS: The above appears to be true for the SH variants that do not
915 have an FPU, however those that have an FPU appear to copy the
916 aggregate argument onto the stack (and not place it in registers)
917 if it is larger than 16 bytes (four GP registers).
918
919 An exceptional case exists for struct arguments (and possibly other
920 aggregates such as arrays) if the size is larger than 4 bytes but
921 not a multiple of 4 bytes. In this case the argument is never split
922 between the registers and the stack, but instead is copied in its
923 entirety onto the stack, AND also copied into as many registers as
924 there is room for. In other words, space in registers permitting,
925 two copies of the same argument are passed in. As far as I can tell,
926 only the one on the stack is used, although that may be a function
927 of the level of compiler optimization. I suspect this is a compiler
928 bug. Arguments of these odd sizes are left-justified within the
929 word (as opposed to arguments smaller than 4 bytes, which are
930 right-justified).
931
932 If the function is to return an aggregate type such as a struct, it
933 is either returned in the normal return value register R0 (if its
934 size is no greater than one byte), or else the caller must allocate
935 space into which the callee will copy the return value (if the size
936 is greater than one byte). In this case, a pointer to the return
937 value location is passed into the callee in register R2, which does
938 not displace any of the other arguments passed in via registers R4
939 to R7. */
940
941 static CORE_ADDR
942 sh_push_dummy_call_fpu (struct gdbarch *gdbarch,
943 CORE_ADDR func_addr,
944 struct regcache *regcache,
945 CORE_ADDR bp_addr, int nargs,
946 struct value **args,
947 CORE_ADDR sp, int struct_return,
948 CORE_ADDR struct_addr)
949 {
950 int stack_offset, stack_alloc;
951 int argreg, flt_argreg;
952 int argnum;
953 struct type *type;
954 CORE_ADDR regval;
955 char *val;
956 char valbuf[4];
957 int len;
958 int odd_sized_struct;
959
960 /* first force sp to a 4-byte alignment */
961 sp = sh_frame_align (gdbarch, sp);
962
963 /* The "struct return pointer" pseudo-argument has its own dedicated
964 register */
965 if (struct_return)
966 regcache_cooked_write_unsigned (regcache,
967 STRUCT_RETURN_REGNUM,
968 struct_addr);
969
970 /* Now make sure there's space on the stack */
971 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
972 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
973 sp -= stack_alloc; /* make room on stack for args */
974
975 /* Now load as many as possible of the first arguments into
976 registers, and push the rest onto the stack. There are 16 bytes
977 in four registers available. Loop thru args from first to last. */
978
979 argreg = ARG0_REGNUM;
980 flt_argreg = FLOAT_ARG0_REGNUM;
981 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
982 {
983 type = VALUE_TYPE (args[argnum]);
984 len = TYPE_LENGTH (type);
985 memset (valbuf, 0, sizeof (valbuf));
986 if (len < 4)
987 {
988 /* value gets right-justified in the register or stack word */
989 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
990 memcpy (valbuf + (4 - len),
991 (char *) VALUE_CONTENTS (args[argnum]), len);
992 else
993 memcpy (valbuf, (char *) VALUE_CONTENTS (args[argnum]), len);
994 val = valbuf;
995 }
996 else
997 val = (char *) VALUE_CONTENTS (args[argnum]);
998
999 if (len > 4 && (len & 3) != 0)
1000 odd_sized_struct = 1; /* Such structs go entirely on stack. */
1001 else if (len > 16)
1002 odd_sized_struct = 1; /* So do aggregates bigger than 4 words. */
1003 else
1004 odd_sized_struct = 0;
1005 while (len > 0)
1006 {
1007 if ((TYPE_CODE (type) == TYPE_CODE_FLT
1008 && flt_argreg > FLOAT_ARGLAST_REGNUM)
1009 || argreg > ARGLAST_REGNUM
1010 || odd_sized_struct)
1011 {
1012 /* must go on the stack */
1013 write_memory (sp + stack_offset, val, 4);
1014 stack_offset += 4;
1015 }
1016 /* NOTE WELL!!!!! This is not an "else if" clause!!!
1017 That's because some *&^%$ things get passed on the stack
1018 AND in the registers! */
1019 if (TYPE_CODE (type) == TYPE_CODE_FLT &&
1020 flt_argreg > 0 && flt_argreg <= FLOAT_ARGLAST_REGNUM)
1021 {
1022 /* Argument goes in a single-precision fp reg. */
1023 regval = extract_unsigned_integer (val, register_size (gdbarch,
1024 argreg));
1025 regcache_cooked_write_unsigned (regcache, flt_argreg++, regval);
1026 }
1027 else if (argreg <= ARGLAST_REGNUM)
1028 {
1029 /* there's room in a register */
1030 regval = extract_unsigned_integer (val, register_size (gdbarch,
1031 argreg));
1032 regcache_cooked_write_unsigned (regcache, argreg++, regval);
1033 }
1034 /* Store the value 4 bytes at a time. This means that things
1035 larger than 4 bytes may go partly in registers and partly
1036 on the stack. */
1037 len -= register_size (gdbarch, argreg);
1038 val += register_size (gdbarch, argreg);
1039 }
1040 }
1041
1042 /* Store return address. */
1043 regcache_cooked_write_unsigned (regcache, PR_REGNUM, bp_addr);
1044
1045 /* Update stack pointer. */
1046 regcache_cooked_write_unsigned (regcache, SP_REGNUM, sp);
1047
1048 return sp;
1049 }
1050
1051 static CORE_ADDR
1052 sh_push_dummy_call_nofpu (struct gdbarch *gdbarch,
1053 CORE_ADDR func_addr,
1054 struct regcache *regcache,
1055 CORE_ADDR bp_addr,
1056 int nargs, struct value **args,
1057 CORE_ADDR sp, int struct_return,
1058 CORE_ADDR struct_addr)
1059 {
1060 int stack_offset, stack_alloc;
1061 int argreg;
1062 int argnum;
1063 struct type *type;
1064 CORE_ADDR regval;
1065 char *val;
1066 char valbuf[4];
1067 int len;
1068 int odd_sized_struct;
1069
1070 /* first force sp to a 4-byte alignment */
1071 sp = sh_frame_align (gdbarch, sp);
1072
1073 /* The "struct return pointer" pseudo-argument has its own dedicated
1074 register */
1075 if (struct_return)
1076 regcache_cooked_write_unsigned (regcache,
1077 STRUCT_RETURN_REGNUM,
1078 struct_addr);
1079
1080 /* Now make sure there's space on the stack */
1081 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
1082 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
1083 sp -= stack_alloc; /* make room on stack for args */
1084
1085 /* Now load as many as possible of the first arguments into
1086 registers, and push the rest onto the stack. There are 16 bytes
1087 in four registers available. Loop thru args from first to last. */
1088
1089 argreg = ARG0_REGNUM;
1090 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
1091 {
1092 type = VALUE_TYPE (args[argnum]);
1093 len = TYPE_LENGTH (type);
1094 memset (valbuf, 0, sizeof (valbuf));
1095 if (len < 4)
1096 {
1097 /* value gets right-justified in the register or stack word */
1098 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
1099 memcpy (valbuf + (4 - len),
1100 (char *) VALUE_CONTENTS (args[argnum]), len);
1101 else
1102 memcpy (valbuf, (char *) VALUE_CONTENTS (args[argnum]), len);
1103 val = valbuf;
1104 }
1105 else
1106 val = (char *) VALUE_CONTENTS (args[argnum]);
1107
1108 if (len > 4 && (len & 3) != 0)
1109 odd_sized_struct = 1; /* such structs go entirely on stack */
1110 else
1111 odd_sized_struct = 0;
1112 while (len > 0)
1113 {
1114 if (argreg > ARGLAST_REGNUM
1115 || odd_sized_struct)
1116 {
1117 /* must go on the stack */
1118 write_memory (sp + stack_offset, val, 4);
1119 stack_offset += 4;
1120 }
1121 /* NOTE WELL!!!!! This is not an "else if" clause!!!
1122 That's because some *&^%$ things get passed on the stack
1123 AND in the registers! */
1124 if (argreg <= ARGLAST_REGNUM)
1125 {
1126 /* there's room in a register */
1127 regval = extract_unsigned_integer (val, register_size (gdbarch,
1128 argreg));
1129 regcache_cooked_write_unsigned (regcache, argreg++, regval);
1130 }
1131 /* Store the value 4 bytes at a time. This means that things
1132 larger than 4 bytes may go partly in registers and partly
1133 on the stack. */
1134 len -= register_size (gdbarch, argreg);
1135 val += register_size (gdbarch, argreg);
1136 }
1137 }
1138
1139 /* Store return address. */
1140 regcache_cooked_write_unsigned (regcache, PR_REGNUM, bp_addr);
1141
1142 /* Update stack pointer. */
1143 regcache_cooked_write_unsigned (regcache, SP_REGNUM, sp);
1144
1145 return sp;
1146 }
1147
1148 /* Find a function's return value in the appropriate registers (in
1149 regbuf), and copy it into valbuf. Extract from an array REGBUF
1150 containing the (raw) register state a function return value of type
1151 TYPE, and copy that, in virtual format, into VALBUF. */
1152 static void
1153 sh_default_extract_return_value (struct type *type, struct regcache *regcache,
1154 void *valbuf)
1155 {
1156 int len = TYPE_LENGTH (type);
1157 int return_register = R0_REGNUM;
1158 int offset;
1159
1160 if (len <= 4)
1161 {
1162 ULONGEST c;
1163
1164 regcache_cooked_read_unsigned (regcache, R0_REGNUM, &c);
1165 store_unsigned_integer (valbuf, len, c);
1166 }
1167 else if (len == 8)
1168 {
1169 int i, regnum = R0_REGNUM;
1170 for (i = 0; i < len; i += 4)
1171 regcache_raw_read (regcache, regnum++, (char *)valbuf + i);
1172 }
1173 else
1174 error ("bad size for return value");
1175 }
1176
1177 static void
1178 sh3e_sh4_extract_return_value (struct type *type, struct regcache *regcache,
1179 void *valbuf)
1180 {
1181 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1182 {
1183 int len = TYPE_LENGTH (type);
1184 int i, regnum = FP0_REGNUM;
1185 for (i = 0; i < len; i += 4)
1186 regcache_raw_read (regcache, regnum++, (char *)valbuf + i);
1187 }
1188 else
1189 sh_default_extract_return_value (type, regcache, valbuf);
1190 }
1191
1192 /* Write into appropriate registers a function return value
1193 of type TYPE, given in virtual format.
1194 If the architecture is sh4 or sh3e, store a function's return value
1195 in the R0 general register or in the FP0 floating point register,
1196 depending on the type of the return value. In all the other cases
1197 the result is stored in r0, left-justified. */
1198 static void
1199 sh_default_store_return_value (struct type *type, struct regcache *regcache,
1200 const void *valbuf)
1201 {
1202 ULONGEST val;
1203 int len = TYPE_LENGTH (type);
1204
1205 if (len <= 4)
1206 {
1207 val = extract_unsigned_integer (valbuf, len);
1208 regcache_cooked_write_unsigned (regcache, R0_REGNUM, val);
1209 }
1210 else
1211 {
1212 int i, regnum = R0_REGNUM;
1213 for (i = 0; i < len; i += 4)
1214 regcache_raw_write (regcache, regnum++, (char *)valbuf + i);
1215 }
1216 }
1217
1218 static void
1219 sh3e_sh4_store_return_value (struct type *type, struct regcache *regcache,
1220 const void *valbuf)
1221 {
1222 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1223 {
1224 int len = TYPE_LENGTH (type);
1225 int i, regnum = FP0_REGNUM;
1226 for (i = 0; i < len; i += 4)
1227 regcache_raw_write (regcache, regnum++, (char *)valbuf + i);
1228 }
1229 else
1230 sh_default_store_return_value (type, regcache, valbuf);
1231 }
1232
1233 /* Print the registers in a form similar to the E7000 */
1234
1235 static void
1236 sh_generic_show_regs (void)
1237 {
1238 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1239 paddr (read_register (PC_REGNUM)),
1240 (long) read_register (SR_REGNUM),
1241 (long) read_register (PR_REGNUM),
1242 (long) read_register (MACH_REGNUM),
1243 (long) read_register (MACL_REGNUM));
1244
1245 printf_filtered ("GBR=%08lx VBR=%08lx",
1246 (long) read_register (GBR_REGNUM),
1247 (long) read_register (VBR_REGNUM));
1248
1249 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1250 (long) read_register (0),
1251 (long) read_register (1),
1252 (long) read_register (2),
1253 (long) read_register (3),
1254 (long) read_register (4),
1255 (long) read_register (5),
1256 (long) read_register (6),
1257 (long) read_register (7));
1258 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1259 (long) read_register (8),
1260 (long) read_register (9),
1261 (long) read_register (10),
1262 (long) read_register (11),
1263 (long) read_register (12),
1264 (long) read_register (13),
1265 (long) read_register (14),
1266 (long) read_register (15));
1267 }
1268
1269 static void
1270 sh3_show_regs (void)
1271 {
1272 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1273 paddr (read_register (PC_REGNUM)),
1274 (long) read_register (SR_REGNUM),
1275 (long) read_register (PR_REGNUM),
1276 (long) read_register (MACH_REGNUM),
1277 (long) read_register (MACL_REGNUM));
1278
1279 printf_filtered ("GBR=%08lx VBR=%08lx",
1280 (long) read_register (GBR_REGNUM),
1281 (long) read_register (VBR_REGNUM));
1282 printf_filtered (" SSR=%08lx SPC=%08lx",
1283 (long) read_register (SSR_REGNUM),
1284 (long) read_register (SPC_REGNUM));
1285
1286 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1287 (long) read_register (0),
1288 (long) read_register (1),
1289 (long) read_register (2),
1290 (long) read_register (3),
1291 (long) read_register (4),
1292 (long) read_register (5),
1293 (long) read_register (6),
1294 (long) read_register (7));
1295 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1296 (long) read_register (8),
1297 (long) read_register (9),
1298 (long) read_register (10),
1299 (long) read_register (11),
1300 (long) read_register (12),
1301 (long) read_register (13),
1302 (long) read_register (14),
1303 (long) read_register (15));
1304 }
1305
1306
1307 static void
1308 sh2e_show_regs (void)
1309 {
1310 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1311 paddr (read_register (PC_REGNUM)),
1312 (long) read_register (SR_REGNUM),
1313 (long) read_register (PR_REGNUM),
1314 (long) read_register (MACH_REGNUM),
1315 (long) read_register (MACL_REGNUM));
1316
1317 printf_filtered ("GBR=%08lx VBR=%08lx",
1318 (long) read_register (GBR_REGNUM),
1319 (long) read_register (VBR_REGNUM));
1320 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1321 (long) read_register (FPUL_REGNUM),
1322 (long) read_register (FPSCR_REGNUM));
1323
1324 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1325 (long) read_register (0),
1326 (long) read_register (1),
1327 (long) read_register (2),
1328 (long) read_register (3),
1329 (long) read_register (4),
1330 (long) read_register (5),
1331 (long) read_register (6),
1332 (long) read_register (7));
1333 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1334 (long) read_register (8),
1335 (long) read_register (9),
1336 (long) read_register (10),
1337 (long) read_register (11),
1338 (long) read_register (12),
1339 (long) read_register (13),
1340 (long) read_register (14),
1341 (long) read_register (15));
1342
1343 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1344 (long) read_register (FP0_REGNUM + 0),
1345 (long) read_register (FP0_REGNUM + 1),
1346 (long) read_register (FP0_REGNUM + 2),
1347 (long) read_register (FP0_REGNUM + 3),
1348 (long) read_register (FP0_REGNUM + 4),
1349 (long) read_register (FP0_REGNUM + 5),
1350 (long) read_register (FP0_REGNUM + 6),
1351 (long) read_register (FP0_REGNUM + 7));
1352 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1353 (long) read_register (FP0_REGNUM + 8),
1354 (long) read_register (FP0_REGNUM + 9),
1355 (long) read_register (FP0_REGNUM + 10),
1356 (long) read_register (FP0_REGNUM + 11),
1357 (long) read_register (FP0_REGNUM + 12),
1358 (long) read_register (FP0_REGNUM + 13),
1359 (long) read_register (FP0_REGNUM + 14),
1360 (long) read_register (FP0_REGNUM + 15));
1361 }
1362
1363 static void
1364 sh3e_show_regs (void)
1365 {
1366 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1367 paddr (read_register (PC_REGNUM)),
1368 (long) read_register (SR_REGNUM),
1369 (long) read_register (PR_REGNUM),
1370 (long) read_register (MACH_REGNUM),
1371 (long) read_register (MACL_REGNUM));
1372
1373 printf_filtered ("GBR=%08lx VBR=%08lx",
1374 (long) read_register (GBR_REGNUM),
1375 (long) read_register (VBR_REGNUM));
1376 printf_filtered (" SSR=%08lx SPC=%08lx",
1377 (long) read_register (SSR_REGNUM),
1378 (long) read_register (SPC_REGNUM));
1379 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1380 (long) read_register (FPUL_REGNUM),
1381 (long) read_register (FPSCR_REGNUM));
1382
1383 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1384 (long) read_register (0),
1385 (long) read_register (1),
1386 (long) read_register (2),
1387 (long) read_register (3),
1388 (long) read_register (4),
1389 (long) read_register (5),
1390 (long) read_register (6),
1391 (long) read_register (7));
1392 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1393 (long) read_register (8),
1394 (long) read_register (9),
1395 (long) read_register (10),
1396 (long) read_register (11),
1397 (long) read_register (12),
1398 (long) read_register (13),
1399 (long) read_register (14),
1400 (long) read_register (15));
1401
1402 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1403 (long) read_register (FP0_REGNUM + 0),
1404 (long) read_register (FP0_REGNUM + 1),
1405 (long) read_register (FP0_REGNUM + 2),
1406 (long) read_register (FP0_REGNUM + 3),
1407 (long) read_register (FP0_REGNUM + 4),
1408 (long) read_register (FP0_REGNUM + 5),
1409 (long) read_register (FP0_REGNUM + 6),
1410 (long) read_register (FP0_REGNUM + 7));
1411 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1412 (long) read_register (FP0_REGNUM + 8),
1413 (long) read_register (FP0_REGNUM + 9),
1414 (long) read_register (FP0_REGNUM + 10),
1415 (long) read_register (FP0_REGNUM + 11),
1416 (long) read_register (FP0_REGNUM + 12),
1417 (long) read_register (FP0_REGNUM + 13),
1418 (long) read_register (FP0_REGNUM + 14),
1419 (long) read_register (FP0_REGNUM + 15));
1420 }
1421
1422 static void
1423 sh3_dsp_show_regs (void)
1424 {
1425 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1426 paddr (read_register (PC_REGNUM)),
1427 (long) read_register (SR_REGNUM),
1428 (long) read_register (PR_REGNUM),
1429 (long) read_register (MACH_REGNUM),
1430 (long) read_register (MACL_REGNUM));
1431
1432 printf_filtered ("GBR=%08lx VBR=%08lx",
1433 (long) read_register (GBR_REGNUM),
1434 (long) read_register (VBR_REGNUM));
1435
1436 printf_filtered (" SSR=%08lx SPC=%08lx",
1437 (long) read_register (SSR_REGNUM),
1438 (long) read_register (SPC_REGNUM));
1439
1440 printf_filtered (" DSR=%08lx",
1441 (long) read_register (DSR_REGNUM));
1442
1443 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1444 (long) read_register (0),
1445 (long) read_register (1),
1446 (long) read_register (2),
1447 (long) read_register (3),
1448 (long) read_register (4),
1449 (long) read_register (5),
1450 (long) read_register (6),
1451 (long) read_register (7));
1452 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1453 (long) read_register (8),
1454 (long) read_register (9),
1455 (long) read_register (10),
1456 (long) read_register (11),
1457 (long) read_register (12),
1458 (long) read_register (13),
1459 (long) read_register (14),
1460 (long) read_register (15));
1461
1462 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1463 (long) read_register (A0G_REGNUM) & 0xff,
1464 (long) read_register (A0_REGNUM),
1465 (long) read_register (M0_REGNUM),
1466 (long) read_register (X0_REGNUM),
1467 (long) read_register (Y0_REGNUM),
1468 (long) read_register (RS_REGNUM),
1469 (long) read_register (MOD_REGNUM));
1470 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1471 (long) read_register (A1G_REGNUM) & 0xff,
1472 (long) read_register (A1_REGNUM),
1473 (long) read_register (M1_REGNUM),
1474 (long) read_register (X1_REGNUM),
1475 (long) read_register (Y1_REGNUM),
1476 (long) read_register (RE_REGNUM));
1477 }
1478
1479 static void
1480 sh4_show_regs (void)
1481 {
1482 int pr = read_register (FPSCR_REGNUM) & 0x80000;
1483 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1484 paddr (read_register (PC_REGNUM)),
1485 (long) read_register (SR_REGNUM),
1486 (long) read_register (PR_REGNUM),
1487 (long) read_register (MACH_REGNUM),
1488 (long) read_register (MACL_REGNUM));
1489
1490 printf_filtered ("GBR=%08lx VBR=%08lx",
1491 (long) read_register (GBR_REGNUM),
1492 (long) read_register (VBR_REGNUM));
1493 printf_filtered (" SSR=%08lx SPC=%08lx",
1494 (long) read_register (SSR_REGNUM),
1495 (long) read_register (SPC_REGNUM));
1496 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1497 (long) read_register (FPUL_REGNUM),
1498 (long) read_register (FPSCR_REGNUM));
1499
1500 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1501 (long) read_register (0),
1502 (long) read_register (1),
1503 (long) read_register (2),
1504 (long) read_register (3),
1505 (long) read_register (4),
1506 (long) read_register (5),
1507 (long) read_register (6),
1508 (long) read_register (7));
1509 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1510 (long) read_register (8),
1511 (long) read_register (9),
1512 (long) read_register (10),
1513 (long) read_register (11),
1514 (long) read_register (12),
1515 (long) read_register (13),
1516 (long) read_register (14),
1517 (long) read_register (15));
1518
1519 printf_filtered ((pr
1520 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1521 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1522 (long) read_register (FP0_REGNUM + 0),
1523 (long) read_register (FP0_REGNUM + 1),
1524 (long) read_register (FP0_REGNUM + 2),
1525 (long) read_register (FP0_REGNUM + 3),
1526 (long) read_register (FP0_REGNUM + 4),
1527 (long) read_register (FP0_REGNUM + 5),
1528 (long) read_register (FP0_REGNUM + 6),
1529 (long) read_register (FP0_REGNUM + 7));
1530 printf_filtered ((pr
1531 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1532 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1533 (long) read_register (FP0_REGNUM + 8),
1534 (long) read_register (FP0_REGNUM + 9),
1535 (long) read_register (FP0_REGNUM + 10),
1536 (long) read_register (FP0_REGNUM + 11),
1537 (long) read_register (FP0_REGNUM + 12),
1538 (long) read_register (FP0_REGNUM + 13),
1539 (long) read_register (FP0_REGNUM + 14),
1540 (long) read_register (FP0_REGNUM + 15));
1541 }
1542
1543 static void
1544 sh_dsp_show_regs (void)
1545 {
1546 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1547 paddr (read_register (PC_REGNUM)),
1548 (long) read_register (SR_REGNUM),
1549 (long) read_register (PR_REGNUM),
1550 (long) read_register (MACH_REGNUM),
1551 (long) read_register (MACL_REGNUM));
1552
1553 printf_filtered ("GBR=%08lx VBR=%08lx",
1554 (long) read_register (GBR_REGNUM),
1555 (long) read_register (VBR_REGNUM));
1556
1557 printf_filtered (" DSR=%08lx",
1558 (long) read_register (DSR_REGNUM));
1559
1560 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1561 (long) read_register (0),
1562 (long) read_register (1),
1563 (long) read_register (2),
1564 (long) read_register (3),
1565 (long) read_register (4),
1566 (long) read_register (5),
1567 (long) read_register (6),
1568 (long) read_register (7));
1569 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1570 (long) read_register (8),
1571 (long) read_register (9),
1572 (long) read_register (10),
1573 (long) read_register (11),
1574 (long) read_register (12),
1575 (long) read_register (13),
1576 (long) read_register (14),
1577 (long) read_register (15));
1578
1579 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1580 (long) read_register (A0G_REGNUM) & 0xff,
1581 (long) read_register (A0_REGNUM),
1582 (long) read_register (M0_REGNUM),
1583 (long) read_register (X0_REGNUM),
1584 (long) read_register (Y0_REGNUM),
1585 (long) read_register (RS_REGNUM),
1586 (long) read_register (MOD_REGNUM));
1587 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1588 (long) read_register (A1G_REGNUM) & 0xff,
1589 (long) read_register (A1_REGNUM),
1590 (long) read_register (M1_REGNUM),
1591 (long) read_register (X1_REGNUM),
1592 (long) read_register (Y1_REGNUM),
1593 (long) read_register (RE_REGNUM));
1594 }
1595
1596 static void
1597 sh_show_regs_command (char *args, int from_tty)
1598 {
1599 if (sh_show_regs)
1600 (*sh_show_regs)();
1601 }
1602
1603 /* Return the GDB type object for the "standard" data type
1604 of data in register N. */
1605 static struct type *
1606 sh_sh3e_register_type (struct gdbarch *gdbarch, int reg_nr)
1607 {
1608 if ((reg_nr >= FP0_REGNUM
1609 && (reg_nr <= FP_LAST_REGNUM))
1610 || (reg_nr == FPUL_REGNUM))
1611 return builtin_type_float;
1612 else
1613 return builtin_type_int;
1614 }
1615
1616 static struct type *
1617 sh_sh4_build_float_register_type (int high)
1618 {
1619 struct type *temp;
1620
1621 temp = create_range_type (NULL, builtin_type_int, 0, high);
1622 return create_array_type (NULL, builtin_type_float, temp);
1623 }
1624
1625 static struct type *
1626 sh_sh4_register_type (struct gdbarch *gdbarch, int reg_nr)
1627 {
1628 if ((reg_nr >= FP0_REGNUM
1629 && (reg_nr <= FP_LAST_REGNUM))
1630 || (reg_nr == FPUL_REGNUM))
1631 return builtin_type_float;
1632 else if (reg_nr >= DR0_REGNUM
1633 && reg_nr <= DR_LAST_REGNUM)
1634 return builtin_type_double;
1635 else if (reg_nr >= FV0_REGNUM
1636 && reg_nr <= FV_LAST_REGNUM)
1637 return sh_sh4_build_float_register_type (3);
1638 else
1639 return builtin_type_int;
1640 }
1641
1642 static struct type *
1643 sh_default_register_type (struct gdbarch *gdbarch, int reg_nr)
1644 {
1645 return builtin_type_int;
1646 }
1647
1648 /* On the sh4, the DRi pseudo registers are problematic if the target
1649 is little endian. When the user writes one of those registers, for
1650 instance with 'ser var $dr0=1', we want the double to be stored
1651 like this:
1652 fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1653 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1654
1655 This corresponds to little endian byte order & big endian word
1656 order. However if we let gdb write the register w/o conversion, it
1657 will write fr0 and fr1 this way:
1658 fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1659 fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1660 because it will consider fr0 and fr1 as a single LE stretch of memory.
1661
1662 To achieve what we want we must force gdb to store things in
1663 floatformat_ieee_double_littlebyte_bigword (which is defined in
1664 include/floatformat.h and libiberty/floatformat.c.
1665
1666 In case the target is big endian, there is no problem, the
1667 raw bytes will look like:
1668 fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
1669 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1670
1671 The other pseudo registers (the FVs) also don't pose a problem
1672 because they are stored as 4 individual FP elements. */
1673
1674 static void
1675 sh_sh4_register_convert_to_virtual (int regnum, struct type *type,
1676 char *from, char *to)
1677 {
1678 if (regnum >= DR0_REGNUM
1679 && regnum <= DR_LAST_REGNUM)
1680 {
1681 DOUBLEST val;
1682 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, from, &val);
1683 store_typed_floating (to, type, val);
1684 }
1685 else
1686 error ("sh_register_convert_to_virtual called with non DR register number");
1687 }
1688
1689 static void
1690 sh_sh4_register_convert_to_raw (struct type *type, int regnum,
1691 const void *from, void *to)
1692 {
1693 if (regnum >= DR0_REGNUM
1694 && regnum <= DR_LAST_REGNUM)
1695 {
1696 DOUBLEST val = extract_typed_floating (from, type);
1697 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword, &val, to);
1698 }
1699 else
1700 error("sh_register_convert_to_raw called with non DR register number");
1701 }
1702
1703 static void
1704 sh_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
1705 int reg_nr, void *buffer)
1706 {
1707 int base_regnum, portion;
1708 char temp_buffer[MAX_REGISTER_SIZE];
1709
1710 if (reg_nr >= DR0_REGNUM
1711 && reg_nr <= DR_LAST_REGNUM)
1712 {
1713 base_regnum = dr_reg_base_num (reg_nr);
1714
1715 /* Build the value in the provided buffer. */
1716 /* Read the real regs for which this one is an alias. */
1717 for (portion = 0; portion < 2; portion++)
1718 regcache_raw_read (regcache, base_regnum + portion,
1719 (temp_buffer
1720 + register_size (gdbarch, base_regnum) * portion));
1721 /* We must pay attention to the endiannes. */
1722 sh_sh4_register_convert_to_virtual (reg_nr,
1723 gdbarch_register_type (gdbarch, reg_nr),
1724 temp_buffer, buffer);
1725 }
1726 else if (reg_nr >= FV0_REGNUM
1727 && reg_nr <= FV_LAST_REGNUM)
1728 {
1729 base_regnum = fv_reg_base_num (reg_nr);
1730
1731 /* Read the real regs for which this one is an alias. */
1732 for (portion = 0; portion < 4; portion++)
1733 regcache_raw_read (regcache, base_regnum + portion,
1734 ((char *) buffer
1735 + register_size (gdbarch, base_regnum) * portion));
1736 }
1737 }
1738
1739 static void
1740 sh_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1741 int reg_nr, const void *buffer)
1742 {
1743 int base_regnum, portion;
1744 char temp_buffer[MAX_REGISTER_SIZE];
1745
1746 if (reg_nr >= DR0_REGNUM
1747 && reg_nr <= DR_LAST_REGNUM)
1748 {
1749 base_regnum = dr_reg_base_num (reg_nr);
1750
1751 /* We must pay attention to the endiannes. */
1752 sh_sh4_register_convert_to_raw (gdbarch_register_type (gdbarch, reg_nr), reg_nr,
1753 buffer, temp_buffer);
1754
1755 /* Write the real regs for which this one is an alias. */
1756 for (portion = 0; portion < 2; portion++)
1757 regcache_raw_write (regcache, base_regnum + portion,
1758 (temp_buffer
1759 + register_size (gdbarch, base_regnum) * portion));
1760 }
1761 else if (reg_nr >= FV0_REGNUM
1762 && reg_nr <= FV_LAST_REGNUM)
1763 {
1764 base_regnum = fv_reg_base_num (reg_nr);
1765
1766 /* Write the real regs for which this one is an alias. */
1767 for (portion = 0; portion < 4; portion++)
1768 regcache_raw_write (regcache, base_regnum + portion,
1769 ((char *) buffer
1770 + register_size (gdbarch, base_regnum) * portion));
1771 }
1772 }
1773
1774 /* Floating point vector of 4 float registers. */
1775 static void
1776 do_fv_register_info (struct gdbarch *gdbarch, struct ui_file *file,
1777 int fv_regnum)
1778 {
1779 int first_fp_reg_num = fv_reg_base_num (fv_regnum);
1780 fprintf_filtered (file, "fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
1781 fv_regnum - FV0_REGNUM,
1782 (int) read_register (first_fp_reg_num),
1783 (int) read_register (first_fp_reg_num + 1),
1784 (int) read_register (first_fp_reg_num + 2),
1785 (int) read_register (first_fp_reg_num + 3));
1786 }
1787
1788 /* Double precision registers. */
1789 static void
1790 do_dr_register_info (struct gdbarch *gdbarch, struct ui_file *file,
1791 int dr_regnum)
1792 {
1793 int first_fp_reg_num = dr_reg_base_num (dr_regnum);
1794
1795 fprintf_filtered (file, "dr%d\t0x%08x%08x\n",
1796 dr_regnum - DR0_REGNUM,
1797 (int) read_register (first_fp_reg_num),
1798 (int) read_register (first_fp_reg_num + 1));
1799 }
1800
1801 static void
1802 sh_print_pseudo_register (struct gdbarch *gdbarch, struct ui_file *file,
1803 int regnum)
1804 {
1805 if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1806 internal_error (__FILE__, __LINE__,
1807 "Invalid pseudo register number %d\n", regnum);
1808 else if (regnum >= DR0_REGNUM
1809 && regnum <= DR_LAST_REGNUM)
1810 do_dr_register_info (gdbarch, file, regnum);
1811 else if (regnum >= FV0_REGNUM
1812 && regnum <= FV_LAST_REGNUM)
1813 do_fv_register_info (gdbarch, file, regnum);
1814 }
1815
1816 static void
1817 sh_do_fp_register (struct gdbarch *gdbarch, struct ui_file *file, int regnum)
1818 { /* do values for FP (float) regs */
1819 char *raw_buffer;
1820 double flt; /* double extracted from raw hex data */
1821 int inv;
1822 int j;
1823
1824 /* Allocate space for the float. */
1825 raw_buffer = (char *) alloca (register_size (gdbarch, FP0_REGNUM));
1826
1827 /* Get the data in raw format. */
1828 if (!frame_register_read (get_selected_frame (), regnum, raw_buffer))
1829 error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
1830
1831 /* Get the register as a number */
1832 flt = unpack_double (builtin_type_float, raw_buffer, &inv);
1833
1834 /* Print the name and some spaces. */
1835 fputs_filtered (REGISTER_NAME (regnum), file);
1836 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), file);
1837
1838 /* Print the value. */
1839 if (inv)
1840 fprintf_filtered (file, "<invalid float>");
1841 else
1842 fprintf_filtered (file, "%-10.9g", flt);
1843
1844 /* Print the fp register as hex. */
1845 fprintf_filtered (file, "\t(raw 0x");
1846 for (j = 0; j < register_size (gdbarch, regnum); j++)
1847 {
1848 register int idx = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? j
1849 : register_size (gdbarch, regnum) - 1 - j;
1850 fprintf_filtered (file, "%02x", (unsigned char) raw_buffer[idx]);
1851 }
1852 fprintf_filtered (file, ")");
1853 fprintf_filtered (file, "\n");
1854 }
1855
1856 static void
1857 sh_do_register (struct gdbarch *gdbarch, struct ui_file *file, int regnum)
1858 {
1859 char raw_buffer[MAX_REGISTER_SIZE];
1860
1861 fputs_filtered (REGISTER_NAME (regnum), file);
1862 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), file);
1863
1864 /* Get the data in raw format. */
1865 if (!frame_register_read (get_selected_frame (), regnum, raw_buffer))
1866 fprintf_filtered (file, "*value not available*\n");
1867
1868 val_print (gdbarch_register_type (gdbarch, regnum), raw_buffer, 0, 0,
1869 file, 'x', 1, 0, Val_pretty_default);
1870 fprintf_filtered (file, "\t");
1871 val_print (gdbarch_register_type (gdbarch, regnum), raw_buffer, 0, 0,
1872 file, 0, 1, 0, Val_pretty_default);
1873 fprintf_filtered (file, "\n");
1874 }
1875
1876 static void
1877 sh_print_register (struct gdbarch *gdbarch, struct ui_file *file, int regnum)
1878 {
1879 if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1880 internal_error (__FILE__, __LINE__,
1881 "Invalid register number %d\n", regnum);
1882
1883 else if (regnum >= 0 && regnum < NUM_REGS)
1884 {
1885 if (TYPE_CODE (gdbarch_register_type (gdbarch, regnum)) == TYPE_CODE_FLT)
1886 sh_do_fp_register (gdbarch, file, regnum); /* FP regs */
1887 else
1888 sh_do_register (gdbarch, file, regnum); /* All other regs */
1889 }
1890
1891 else if (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1892 {
1893 sh_print_pseudo_register (gdbarch, file, regnum);
1894 }
1895 }
1896
1897 static void
1898 sh_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1899 struct frame_info *frame, int regnum, int fpregs)
1900 {
1901 if (regnum != -1) /* do one specified register */
1902 {
1903 if (*(REGISTER_NAME (regnum)) == '\0')
1904 error ("Not a valid register for the current processor type");
1905
1906 sh_print_register (gdbarch, file, regnum);
1907 }
1908 else
1909 /* do all (or most) registers */
1910 {
1911 regnum = 0;
1912 while (regnum < NUM_REGS)
1913 {
1914 /* If the register name is empty, it is undefined for this
1915 processor, so don't display anything. */
1916 if (REGISTER_NAME (regnum) == NULL
1917 || *(REGISTER_NAME (regnum)) == '\0')
1918 {
1919 regnum++;
1920 continue;
1921 }
1922
1923 if (TYPE_CODE (gdbarch_register_type (gdbarch, regnum)) == TYPE_CODE_FLT)
1924 {
1925 if (fpregs)
1926 {
1927 /* true for "INFO ALL-REGISTERS" command */
1928 sh_do_fp_register (gdbarch, file, regnum); /* FP regs */
1929 regnum ++;
1930 }
1931 else
1932 regnum += (FP_LAST_REGNUM - FP0_REGNUM); /* skip FP regs */
1933 }
1934 else
1935 {
1936 sh_do_register (gdbarch, file, regnum); /* All other regs */
1937 regnum++;
1938 }
1939 }
1940
1941 if (fpregs)
1942 while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1943 {
1944 sh_print_pseudo_register (gdbarch, file, regnum);
1945 regnum++;
1946 }
1947 }
1948 }
1949
1950 #ifdef SVR4_SHARED_LIBS
1951
1952 /* Fetch (and possibly build) an appropriate link_map_offsets structure
1953 for native i386 linux targets using the struct offsets defined in
1954 link.h (but without actual reference to that file).
1955
1956 This makes it possible to access i386-linux shared libraries from
1957 a gdb that was not built on an i386-linux host (for cross debugging).
1958 */
1959
1960 struct link_map_offsets *
1961 sh_linux_svr4_fetch_link_map_offsets (void)
1962 {
1963 static struct link_map_offsets lmo;
1964 static struct link_map_offsets *lmp = 0;
1965
1966 if (lmp == 0)
1967 {
1968 lmp = &lmo;
1969
1970 lmo.r_debug_size = 8; /* 20 not actual size but all we need */
1971
1972 lmo.r_map_offset = 4;
1973 lmo.r_map_size = 4;
1974
1975 lmo.link_map_size = 20; /* 552 not actual size but all we need */
1976
1977 lmo.l_addr_offset = 0;
1978 lmo.l_addr_size = 4;
1979
1980 lmo.l_name_offset = 4;
1981 lmo.l_name_size = 4;
1982
1983 lmo.l_next_offset = 12;
1984 lmo.l_next_size = 4;
1985
1986 lmo.l_prev_offset = 16;
1987 lmo.l_prev_size = 4;
1988 }
1989
1990 return lmp;
1991 }
1992 #endif /* SVR4_SHARED_LIBS */
1993
1994 static int
1995 sh_dsp_register_sim_regno (int nr)
1996 {
1997 if (legacy_register_sim_regno (nr) < 0)
1998 return legacy_register_sim_regno (nr);
1999 if (nr >= DSR_REGNUM && nr <= Y1_REGNUM)
2000 return nr - DSR_REGNUM + SIM_SH_DSR_REGNUM;
2001 if (nr == MOD_REGNUM)
2002 return SIM_SH_MOD_REGNUM;
2003 if (nr == RS_REGNUM)
2004 return SIM_SH_RS_REGNUM;
2005 if (nr == RE_REGNUM)
2006 return SIM_SH_RE_REGNUM;
2007 if (nr >= R0_BANK_REGNUM && nr <= R7_BANK_REGNUM)
2008 return nr - R0_BANK_REGNUM + SIM_SH_R0_BANK_REGNUM;
2009 return nr;
2010 }
2011 \f
2012 static gdbarch_init_ftype sh_gdbarch_init;
2013
2014 static struct gdbarch *
2015 sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2016 {
2017 struct gdbarch *gdbarch;
2018
2019 sh_show_regs = sh_generic_show_regs;
2020 switch (info.bfd_arch_info->mach)
2021 {
2022 case bfd_mach_sh2e:
2023 sh_show_regs = sh2e_show_regs;
2024 break;
2025 case bfd_mach_sh_dsp:
2026 sh_show_regs = sh_dsp_show_regs;
2027 break;
2028
2029 case bfd_mach_sh3:
2030 sh_show_regs = sh3_show_regs;
2031 break;
2032
2033 case bfd_mach_sh3e:
2034 sh_show_regs = sh3e_show_regs;
2035 break;
2036
2037 case bfd_mach_sh3_dsp:
2038 sh_show_regs = sh3_dsp_show_regs;
2039 break;
2040
2041 case bfd_mach_sh4:
2042 sh_show_regs = sh4_show_regs;
2043 break;
2044
2045 case bfd_mach_sh5:
2046 sh_show_regs = sh64_show_regs;
2047 /* SH5 is handled entirely in sh64-tdep.c */
2048 return sh64_gdbarch_init (info, arches);
2049 }
2050
2051 /* If there is already a candidate, use it. */
2052 arches = gdbarch_list_lookup_by_info (arches, &info);
2053 if (arches != NULL)
2054 return arches->gdbarch;
2055
2056 /* None found, create a new architecture from the information
2057 provided. */
2058 gdbarch = gdbarch_alloc (&info, NULL);
2059
2060 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2061 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2062 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
2063
2064 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2065 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2066 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2067 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2068 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2069 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2070 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2071 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2072
2073 set_gdbarch_num_regs (gdbarch, SH_NUM_REGS);
2074 set_gdbarch_sp_regnum (gdbarch, 15);
2075 set_gdbarch_deprecated_fp_regnum (gdbarch, 14);
2076 set_gdbarch_pc_regnum (gdbarch, 16);
2077 set_gdbarch_fp0_regnum (gdbarch, -1);
2078 set_gdbarch_num_pseudo_regs (gdbarch, 0);
2079
2080 set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
2081 set_gdbarch_use_struct_convention (gdbarch, sh_use_struct_convention);
2082
2083 set_gdbarch_print_insn (gdbarch, gdb_print_insn_sh);
2084 set_gdbarch_register_sim_regno (gdbarch, legacy_register_sim_regno);
2085
2086 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2087
2088 set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue);
2089 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2090 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2091 set_gdbarch_function_start_offset (gdbarch, 0);
2092
2093 set_gdbarch_frame_args_skip (gdbarch, 0);
2094 set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
2095 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2096
2097 set_gdbarch_deprecated_frame_chain (gdbarch, sh_frame_chain);
2098 set_gdbarch_deprecated_get_saved_register (gdbarch, deprecated_generic_get_saved_register);
2099 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, sh_init_extra_frame_info);
2100 set_gdbarch_deprecated_pop_frame (gdbarch, sh_pop_frame);
2101 set_gdbarch_deprecated_frame_saved_pc (gdbarch, sh_frame_saved_pc);
2102 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, sh_saved_pc_after_call);
2103 set_gdbarch_frame_align (gdbarch, sh_frame_align);
2104
2105 switch (info.bfd_arch_info->mach)
2106 {
2107 case bfd_mach_sh:
2108 set_gdbarch_register_name (gdbarch, sh_sh_register_name);
2109 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2110 set_gdbarch_register_type (gdbarch, sh_default_register_type);
2111 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2112 set_gdbarch_store_return_value (gdbarch, sh_default_store_return_value);
2113 set_gdbarch_extract_return_value (gdbarch, sh_default_extract_return_value);
2114 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_nofpu);
2115 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2116
2117 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2118 break;
2119 case bfd_mach_sh2:
2120 set_gdbarch_register_name (gdbarch, sh_sh_register_name);
2121 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2122 set_gdbarch_register_type (gdbarch, sh_default_register_type);
2123 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2124 set_gdbarch_store_return_value (gdbarch, sh_default_store_return_value);
2125 set_gdbarch_extract_return_value (gdbarch, sh_default_extract_return_value);
2126 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_nofpu);
2127 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2128
2129 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2130 break;
2131 case bfd_mach_sh2e:
2132 /* doubles on sh2e and sh3e are actually 4 byte. */
2133 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2134
2135 set_gdbarch_register_name (gdbarch, sh_sh2e_register_name);
2136 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2137 set_gdbarch_register_type (gdbarch, sh_sh3e_register_type);
2138 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2139 set_gdbarch_fp0_regnum (gdbarch, 25);
2140 set_gdbarch_store_return_value (gdbarch, sh3e_sh4_store_return_value);
2141 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2142 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_fpu);
2143 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2144
2145 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2146 break;
2147 case bfd_mach_sh_dsp:
2148 set_gdbarch_register_name (gdbarch, sh_sh_dsp_register_name);
2149 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2150 set_gdbarch_register_type (gdbarch, sh_default_register_type);
2151 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2152 set_gdbarch_register_sim_regno (gdbarch, sh_dsp_register_sim_regno);
2153 set_gdbarch_store_return_value (gdbarch, sh_default_store_return_value);
2154 set_gdbarch_extract_return_value (gdbarch, sh_default_extract_return_value);
2155 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_nofpu);
2156 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2157
2158 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2159 break;
2160 case bfd_mach_sh3:
2161 set_gdbarch_register_name (gdbarch, sh_sh3_register_name);
2162 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2163 set_gdbarch_register_type (gdbarch, sh_default_register_type);
2164 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2165 set_gdbarch_store_return_value (gdbarch, sh_default_store_return_value);
2166 set_gdbarch_extract_return_value (gdbarch, sh_default_extract_return_value);
2167 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_nofpu);
2168 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2169
2170 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2171 break;
2172 case bfd_mach_sh3e:
2173 /* doubles on sh2e and sh3e are actually 4 byte. */
2174 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2175
2176 set_gdbarch_register_name (gdbarch, sh_sh3e_register_name);
2177 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2178 set_gdbarch_register_type (gdbarch, sh_sh3e_register_type);
2179 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2180 set_gdbarch_fp0_regnum (gdbarch, 25);
2181 set_gdbarch_store_return_value (gdbarch, sh3e_sh4_store_return_value);
2182 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2183 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_fpu);
2184 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2185
2186 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
2187 break;
2188 case bfd_mach_sh3_dsp:
2189 set_gdbarch_register_name (gdbarch, sh_sh3_dsp_register_name);
2190 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2191 set_gdbarch_register_type (gdbarch, sh_default_register_type);
2192 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2193 set_gdbarch_register_sim_regno (gdbarch, sh_dsp_register_sim_regno);
2194 set_gdbarch_store_return_value (gdbarch, sh_default_store_return_value);
2195 set_gdbarch_extract_return_value (gdbarch, sh_default_extract_return_value);
2196 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_nofpu);
2197 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2198
2199 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2200 break;
2201 case bfd_mach_sh4:
2202 set_gdbarch_register_name (gdbarch, sh_sh4_register_name);
2203 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2204 set_gdbarch_register_type (gdbarch, sh_sh4_register_type);
2205 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2206 set_gdbarch_fp0_regnum (gdbarch, 25);
2207 set_gdbarch_num_pseudo_regs (gdbarch, 12);
2208 set_gdbarch_pseudo_register_read (gdbarch, sh_pseudo_register_read);
2209 set_gdbarch_pseudo_register_write (gdbarch, sh_pseudo_register_write);
2210 set_gdbarch_store_return_value (gdbarch, sh3e_sh4_store_return_value);
2211 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2212 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_fpu);
2213 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2214
2215 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
2216 break;
2217 default:
2218 set_gdbarch_register_name (gdbarch, sh_generic_register_name);
2219 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2220 set_gdbarch_register_type (gdbarch, sh_default_register_type);
2221 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2222 set_gdbarch_store_return_value (gdbarch, sh_default_store_return_value);
2223 set_gdbarch_extract_return_value (gdbarch, sh_default_extract_return_value);
2224
2225 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2226 break;
2227 }
2228
2229 /* Hook in ABI-specific overrides, if they have been registered. */
2230 gdbarch_init_osabi (info, gdbarch);
2231
2232 return gdbarch;
2233 }
2234
2235 extern initialize_file_ftype _initialize_sh_tdep; /* -Wmissing-prototypes */
2236
2237 void
2238 _initialize_sh_tdep (void)
2239 {
2240 struct cmd_list_element *c;
2241
2242 gdbarch_register (bfd_arch_sh, sh_gdbarch_init, NULL);
2243
2244 add_com ("regs", class_vars, sh_show_regs_command, "Print all registers");
2245 }
GDB Binutils - Deliverables
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