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Protoization.
[deliverable/binutils-gdb.git] / gdb / sh-tdep.c
1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 2000 Free Software
3 Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 /*
23 Contributed by Steve Chamberlain
24 sac@cygnus.com
25 */
26
27 #include "defs.h"
28 #include "frame.h"
29 #include "obstack.h"
30 #include "symtab.h"
31 #include "symfile.h"
32 #include "gdbtypes.h"
33 #include "gdbcmd.h"
34 #include "gdbcore.h"
35 #include "value.h"
36 #include "dis-asm.h"
37 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
38 #include "gdb_string.h"
39 #include "arch-utils.h"
40 #include "floatformat.h"
41
42 #undef XMALLOC
43 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
44
45
46 /* Frame interpretation related functions. */
47 static gdbarch_breakpoint_from_pc_ftype sh_breakpoint_from_pc;
48 static gdbarch_frame_chain_ftype sh_frame_chain;
49 static gdbarch_frame_saved_pc_ftype sh_frame_saved_pc;
50 static gdbarch_skip_prologue_ftype sh_skip_prologue;
51
52 static gdbarch_frame_init_saved_regs_ftype sh_nofp_frame_init_saved_regs;
53 static gdbarch_frame_init_saved_regs_ftype sh_fp_frame_init_saved_regs;
54 static gdbarch_init_extra_frame_info_ftype sh_init_extra_frame_info;
55 static gdbarch_pop_frame_ftype sh_pop_frame;
56 static gdbarch_saved_pc_after_call_ftype sh_saved_pc_after_call;
57 static gdbarch_frame_args_address_ftype sh_frame_args_address;
58 static gdbarch_frame_locals_address_ftype sh_frame_locals_address;
59
60 /* Function call related functions. */
61 static gdbarch_extract_return_value_ftype sh_extract_return_value;
62 static gdbarch_extract_struct_value_address_ftype sh_extract_struct_value_address;
63 static gdbarch_use_struct_convention_ftype sh_use_struct_convention;
64 static gdbarch_store_struct_return_ftype sh_store_struct_return;
65 static gdbarch_push_arguments_ftype sh_push_arguments;
66 static gdbarch_push_return_address_ftype sh_push_return_address;
67 static gdbarch_coerce_float_to_double_ftype sh_coerce_float_to_double;
68 static gdbarch_store_return_value_ftype sh_default_store_return_value;
69 static gdbarch_store_return_value_ftype sh3e_sh4_store_return_value;
70
71 static gdbarch_register_name_ftype sh_generic_register_name;
72 static gdbarch_register_name_ftype sh_sh_register_name;
73 static gdbarch_register_name_ftype sh_sh3_register_name;
74 static gdbarch_register_name_ftype sh_sh3e_register_name;
75 static gdbarch_register_name_ftype sh_sh_dsp_register_name;
76 static gdbarch_register_name_ftype sh_sh3_dsp_register_name;
77
78 /* Registers display related functions */
79 static gdbarch_register_raw_size_ftype sh_default_register_raw_size;
80 static gdbarch_register_raw_size_ftype sh_sh4_register_raw_size;
81
82 static gdbarch_register_virtual_size_ftype sh_register_virtual_size;
83
84 static gdbarch_register_byte_ftype sh_default_register_byte;
85 static gdbarch_register_byte_ftype sh_sh4_register_byte;
86
87 static gdbarch_register_virtual_type_ftype sh_sh3e_register_virtual_type;
88 static gdbarch_register_virtual_type_ftype sh_sh4_register_virtual_type;
89 static gdbarch_register_virtual_type_ftype sh_default_register_virtual_type;
90
91 static void sh_generic_show_regs (void);
92 static void sh3_show_regs (void);
93 static void sh3e_show_regs (void);
94 static void sh3_dsp_show_regs (void);
95 static void sh_dsp_show_regs (void);
96 static void sh4_show_regs (void);
97 static void sh_show_regs_command (char *, int);
98
99 static struct type *sh_sh4_build_float_register_type (int high);
100
101 static gdbarch_fetch_pseudo_register_ftype sh_fetch_pseudo_register;
102 static gdbarch_store_pseudo_register_ftype sh_store_pseudo_register;
103 static int fv_reg_base_num (int);
104 static int dr_reg_base_num (int);
105 static void do_fv_register_info (int fv_regnum);
106 static void do_dr_register_info (int dr_regnum);
107 static void sh_do_pseudo_register (int regnum);
108 static void sh_do_fp_register (int regnum);
109 static void sh_do_register (int regnum);
110 static void sh_print_register (int regnum);
111
112 void (*sh_show_regs) (void);
113
114
115 /* Define other aspects of the stack frame.
116 we keep a copy of the worked out return pc lying around, since it
117 is a useful bit of info */
118
119 struct frame_extra_info
120 {
121 CORE_ADDR return_pc;
122 int leaf_function;
123 int f_offset;
124 };
125
126 #if 0
127 #ifdef _WIN32_WCE
128 char **sh_register_names = sh3_reg_names;
129 #else
130 char **sh_register_names = sh_generic_reg_names;
131 #endif
132 #endif
133
134 static char *
135 sh_generic_register_name (int reg_nr)
136 {
137 static char *register_names[] =
138 {
139 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
140 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
141 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
142 "fpul", "fpscr",
143 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
144 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
145 "ssr", "spc",
146 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
147 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
148 };
149 if (reg_nr < 0)
150 return NULL;
151 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
152 return NULL;
153 return register_names[reg_nr];
154 }
155
156 static char *
157 sh_sh_register_name (int reg_nr)
158 {
159 static char *register_names[] =
160 {
161 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
162 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
163 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
164 "", "",
165 "", "", "", "", "", "", "", "",
166 "", "", "", "", "", "", "", "",
167 "", "",
168 "", "", "", "", "", "", "", "",
169 "", "", "", "", "", "", "", "",
170 };
171 if (reg_nr < 0)
172 return NULL;
173 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
174 return NULL;
175 return register_names[reg_nr];
176 }
177
178 static char *
179 sh_sh3_register_name (int reg_nr)
180 {
181 static char *register_names[] =
182 {
183 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
184 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
185 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
186 "", "",
187 "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "",
189 "ssr", "spc",
190 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
191 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
192 };
193 if (reg_nr < 0)
194 return NULL;
195 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
196 return NULL;
197 return register_names[reg_nr];
198 }
199
200 static char *
201 sh_sh3e_register_name (int reg_nr)
202 {
203 static char *register_names[] =
204 {
205 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
206 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
207 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
208 "fpul", "fpscr",
209 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
210 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
211 "ssr", "spc",
212 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
213 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
214 };
215 if (reg_nr < 0)
216 return NULL;
217 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
218 return NULL;
219 return register_names[reg_nr];
220 }
221
222 static char *
223 sh_sh_dsp_register_name (int reg_nr)
224 {
225 static char *register_names[] =
226 {
227 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
228 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
229 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
230 "", "dsr",
231 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
232 "y0", "y1", "", "", "", "", "", "mod",
233 "", "",
234 "rs", "re", "", "", "", "", "", "",
235 "", "", "", "", "", "", "", "",
236 };
237 if (reg_nr < 0)
238 return NULL;
239 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
240 return NULL;
241 return register_names[reg_nr];
242 }
243
244 static char *
245 sh_sh3_dsp_register_name (int reg_nr)
246 {
247 static char *register_names[] =
248 {
249 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
250 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
251 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
252 "", "dsr",
253 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
254 "y0", "y1", "", "", "", "", "", "mod",
255 "ssr", "spc",
256 "rs", "re", "", "", "", "", "", "",
257 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
258 "", "", "", "", "", "", "", "",
259 };
260 if (reg_nr < 0)
261 return NULL;
262 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
263 return NULL;
264 return register_names[reg_nr];
265 }
266
267 static char *
268 sh_sh4_register_name (int reg_nr)
269 {
270 static char *register_names[] =
271 {
272 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
273 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
274 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
275 "fpul", "fpscr",
276 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
277 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
278 "ssr", "spc",
279 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
280 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
281 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
282 "fv0", "fv4", "fv8", "fv12",
283 };
284 if (reg_nr < 0)
285 return NULL;
286 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
287 return NULL;
288 return register_names[reg_nr];
289 }
290
291 static unsigned char *
292 sh_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
293 {
294 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
295 static unsigned char breakpoint[] = {0xc3, 0xc3};
296
297 *lenptr = sizeof (breakpoint);
298 return breakpoint;
299 }
300
301 /* Prologue looks like
302 [mov.l <regs>,@-r15]...
303 [sts.l pr,@-r15]
304 [mov.l r14,@-r15]
305 [mov r15,r14]
306
307 Actually it can be more complicated than this. For instance, with
308 newer gcc's:
309
310 mov.l r14,@-r15
311 add #-12,r15
312 mov r15,r14
313 mov r4,r1
314 mov r5,r2
315 mov.l r6,@(4,r14)
316 mov.l r7,@(8,r14)
317 mov.b r1,@r14
318 mov r14,r1
319 mov r14,r1
320 add #2,r1
321 mov.w r2,@r1
322
323 */
324
325 /* STS.L PR,@-r15 0100111100100010
326 r15-4-->r15, PR-->(r15) */
327 #define IS_STS(x) ((x) == 0x4f22)
328
329 /* MOV.L Rm,@-r15 00101111mmmm0110
330 r15-4-->r15, Rm-->(R15) */
331 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
332
333 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
334
335 /* MOV r15,r14 0110111011110011
336 r15-->r14 */
337 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
338
339 /* ADD #imm,r15 01111111iiiiiiii
340 r15+imm-->r15 */
341 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
342
343 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
344 #define IS_SHLL_R3(x) ((x) == 0x4300)
345
346 /* ADD r3,r15 0011111100111100
347 r15+r3-->r15 */
348 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
349
350 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
351 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
352 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
353 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
354
355 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
356 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
357 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
358 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
359 #define IS_ARG_MOV(x) \
360 (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
361 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
362 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
363
364 /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
365 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
366 #define IS_MOV_R14(x) \
367 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
368
369 #define FPSCR_SZ (1 << 20)
370
371 /* Skip any prologue before the guts of a function */
372
373 /* Skip the prologue using the debug information. If this fails we'll
374 fall back on the 'guess' method below. */
375 static CORE_ADDR
376 after_prologue (CORE_ADDR pc)
377 {
378 struct symtab_and_line sal;
379 CORE_ADDR func_addr, func_end;
380
381 /* If we can not find the symbol in the partial symbol table, then
382 there is no hope we can determine the function's start address
383 with this code. */
384 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
385 return 0;
386
387 /* Get the line associated with FUNC_ADDR. */
388 sal = find_pc_line (func_addr, 0);
389
390 /* There are only two cases to consider. First, the end of the source line
391 is within the function bounds. In that case we return the end of the
392 source line. Second is the end of the source line extends beyond the
393 bounds of the current function. We need to use the slow code to
394 examine instructions in that case. */
395 if (sal.end < func_end)
396 return sal.end;
397 else
398 return 0;
399 }
400
401 /* Here we look at each instruction in the function, and try to guess
402 where the prologue ends. Unfortunately this is not always
403 accurate. */
404 static CORE_ADDR
405 skip_prologue_hard_way (CORE_ADDR start_pc)
406 {
407 CORE_ADDR here, end;
408 int updated_fp = 0;
409
410 if (!start_pc)
411 return 0;
412
413 for (here = start_pc, end = start_pc + (2 * 28); here < end;)
414 {
415 int w = read_memory_integer (here, 2);
416 here += 2;
417 if (IS_FMOV (w) || IS_PUSH (w) || IS_STS (w) || IS_MOV_R3 (w)
418 || IS_ADD_R3SP (w) || IS_ADD_SP (w) || IS_SHLL_R3 (w)
419 || IS_ARG_MOV (w) || IS_MOV_R14 (w))
420 {
421 start_pc = here;
422 }
423 else if (IS_MOV_SP_FP (w))
424 {
425 start_pc = here;
426 updated_fp = 1;
427 }
428 else
429 /* Don't bail out yet, if we are before the copy of sp. */
430 if (updated_fp)
431 break;
432 }
433
434 return start_pc;
435 }
436
437 static CORE_ADDR
438 sh_skip_prologue (CORE_ADDR pc)
439 {
440 CORE_ADDR post_prologue_pc;
441
442 /* See if we can determine the end of the prologue via the symbol table.
443 If so, then return either PC, or the PC after the prologue, whichever
444 is greater. */
445
446 post_prologue_pc = after_prologue (pc);
447
448 /* If after_prologue returned a useful address, then use it. Else
449 fall back on the instruction skipping code. */
450 if (post_prologue_pc != 0)
451 return max (pc, post_prologue_pc);
452 else
453 return (skip_prologue_hard_way (pc));
454 }
455
456 /* Immediately after a function call, return the saved pc.
457 Can't always go through the frames for this because on some machines
458 the new frame is not set up until the new function executes
459 some instructions.
460
461 The return address is the value saved in the PR register + 4 */
462 static CORE_ADDR
463 sh_saved_pc_after_call (struct frame_info *frame)
464 {
465 return (ADDR_BITS_REMOVE(read_register(PR_REGNUM)));
466 }
467
468 /* Should call_function allocate stack space for a struct return? */
469 static int
470 sh_use_struct_convention (int gcc_p, struct type *type)
471 {
472 return (TYPE_LENGTH (type) > 1);
473 }
474
475 /* Store the address of the place in which to copy the structure the
476 subroutine will return. This is called from call_function.
477
478 We store structs through a pointer passed in R0 */
479 static void
480 sh_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
481 {
482 write_register (STRUCT_RETURN_REGNUM, (addr));
483 }
484
485 /* Disassemble an instruction. */
486 static int
487 gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
488 {
489 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
490 return print_insn_sh (memaddr, info);
491 else
492 return print_insn_shl (memaddr, info);
493 }
494
495 /* Given a GDB frame, determine the address of the calling function's frame.
496 This will be used to create a new GDB frame struct, and then
497 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
498
499 For us, the frame address is its stack pointer value, so we look up
500 the function prologue to determine the caller's sp value, and return it. */
501 static CORE_ADDR
502 sh_frame_chain (struct frame_info *frame)
503 {
504 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
505 return frame->frame; /* dummy frame same as caller's frame */
506 if (frame->pc && !inside_entry_file (frame->pc))
507 return read_memory_integer (FRAME_FP (frame) + frame->extra_info->f_offset, 4);
508 else
509 return 0;
510 }
511
512 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
513 we might want to do here is to check REGNUM against the clobber mask, and
514 somehow flag it as invalid if it isn't saved on the stack somewhere. This
515 would provide a graceful failure mode when trying to get the value of
516 caller-saves registers for an inner frame. */
517
518 static CORE_ADDR
519 sh_find_callers_reg (struct frame_info *fi, int regnum)
520 {
521 for (; fi; fi = fi->next)
522 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
523 /* When the caller requests PR from the dummy frame, we return PC because
524 that's where the previous routine appears to have done a call from. */
525 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
526 else
527 {
528 FRAME_INIT_SAVED_REGS (fi);
529 if (!fi->pc)
530 return 0;
531 if (fi->saved_regs[regnum] != 0)
532 return read_memory_integer (fi->saved_regs[regnum],
533 REGISTER_RAW_SIZE (regnum));
534 }
535 return read_register (regnum);
536 }
537
538 /* Put here the code to store, into a struct frame_saved_regs, the
539 addresses of the saved registers of frame described by FRAME_INFO.
540 This includes special registers such as pc and fp saved in special
541 ways in the stack frame. sp is even more special: the address we
542 return for it IS the sp for the next frame. */
543 static void
544 sh_nofp_frame_init_saved_regs (struct frame_info *fi)
545 {
546 int where[NUM_REGS];
547 int rn;
548 int have_fp = 0;
549 int depth;
550 int pc;
551 int opc;
552 int insn;
553 int r3_val = 0;
554 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
555
556 if (fi->saved_regs == NULL)
557 frame_saved_regs_zalloc (fi);
558 else
559 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
560
561 if (dummy_regs)
562 {
563 /* DANGER! This is ONLY going to work if the char buffer format of
564 the saved registers is byte-for-byte identical to the
565 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
566 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
567 return;
568 }
569
570 fi->extra_info->leaf_function = 1;
571 fi->extra_info->f_offset = 0;
572
573 for (rn = 0; rn < NUM_REGS; rn++)
574 where[rn] = -1;
575
576 depth = 0;
577
578 /* Loop around examining the prologue insns until we find something
579 that does not appear to be part of the prologue. But give up
580 after 20 of them, since we're getting silly then. */
581
582 pc = get_pc_function_start (fi->pc);
583 if (!pc)
584 {
585 fi->pc = 0;
586 return;
587 }
588
589 for (opc = pc + (2 * 28); pc < opc; pc += 2)
590 {
591 insn = read_memory_integer (pc, 2);
592 /* See where the registers will be saved to */
593 if (IS_PUSH (insn))
594 {
595 rn = GET_PUSHED_REG (insn);
596 where[rn] = depth;
597 depth += 4;
598 }
599 else if (IS_STS (insn))
600 {
601 where[PR_REGNUM] = depth;
602 /* If we're storing the pr then this isn't a leaf */
603 fi->extra_info->leaf_function = 0;
604 depth += 4;
605 }
606 else if (IS_MOV_R3 (insn))
607 {
608 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
609 }
610 else if (IS_SHLL_R3 (insn))
611 {
612 r3_val <<= 1;
613 }
614 else if (IS_ADD_R3SP (insn))
615 {
616 depth += -r3_val;
617 }
618 else if (IS_ADD_SP (insn))
619 {
620 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
621 }
622 else if (IS_MOV_SP_FP (insn))
623 break;
624 #if 0 /* This used to just stop when it found an instruction that
625 was not considered part of the prologue. Now, we just
626 keep going looking for likely instructions. */
627 else
628 break;
629 #endif
630 }
631
632 /* Now we know how deep things are, we can work out their addresses */
633
634 for (rn = 0; rn < NUM_REGS; rn++)
635 {
636 if (where[rn] >= 0)
637 {
638 if (rn == FP_REGNUM)
639 have_fp = 1;
640
641 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
642 }
643 else
644 {
645 fi->saved_regs[rn] = 0;
646 }
647 }
648
649 if (have_fp)
650 {
651 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
652 }
653 else
654 {
655 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
656 }
657
658 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
659 /* Work out the return pc - either from the saved pr or the pr
660 value */
661 }
662
663 static void
664 sh_fp_frame_init_saved_regs (struct frame_info *fi)
665 {
666 int where[NUM_REGS];
667 int rn;
668 int have_fp = 0;
669 int depth;
670 int pc;
671 int opc;
672 int insn;
673 int r3_val = 0;
674 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
675
676 if (fi->saved_regs == NULL)
677 frame_saved_regs_zalloc (fi);
678 else
679 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
680
681 if (dummy_regs)
682 {
683 /* DANGER! This is ONLY going to work if the char buffer format of
684 the saved registers is byte-for-byte identical to the
685 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
686 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
687 return;
688 }
689
690 fi->extra_info->leaf_function = 1;
691 fi->extra_info->f_offset = 0;
692
693 for (rn = 0; rn < NUM_REGS; rn++)
694 where[rn] = -1;
695
696 depth = 0;
697
698 /* Loop around examining the prologue insns until we find something
699 that does not appear to be part of the prologue. But give up
700 after 20 of them, since we're getting silly then. */
701
702 pc = get_pc_function_start (fi->pc);
703 if (!pc)
704 {
705 fi->pc = 0;
706 return;
707 }
708
709 for (opc = pc + (2 * 28); pc < opc; pc += 2)
710 {
711 insn = read_memory_integer (pc, 2);
712 /* See where the registers will be saved to */
713 if (IS_PUSH (insn))
714 {
715 rn = GET_PUSHED_REG (insn);
716 where[rn] = depth;
717 depth += 4;
718 }
719 else if (IS_STS (insn))
720 {
721 where[PR_REGNUM] = depth;
722 /* If we're storing the pr then this isn't a leaf */
723 fi->extra_info->leaf_function = 0;
724 depth += 4;
725 }
726 else if (IS_MOV_R3 (insn))
727 {
728 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
729 }
730 else if (IS_SHLL_R3 (insn))
731 {
732 r3_val <<= 1;
733 }
734 else if (IS_ADD_R3SP (insn))
735 {
736 depth += -r3_val;
737 }
738 else if (IS_ADD_SP (insn))
739 {
740 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
741 }
742 else if (IS_FMOV (insn))
743 {
744 if (read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & FPSCR_SZ)
745 {
746 depth += 8;
747 }
748 else
749 {
750 depth += 4;
751 }
752 }
753 else if (IS_MOV_SP_FP (insn))
754 break;
755 #if 0 /* This used to just stop when it found an instruction that
756 was not considered part of the prologue. Now, we just
757 keep going looking for likely instructions. */
758 else
759 break;
760 #endif
761 }
762
763 /* Now we know how deep things are, we can work out their addresses */
764
765 for (rn = 0; rn < NUM_REGS; rn++)
766 {
767 if (where[rn] >= 0)
768 {
769 if (rn == FP_REGNUM)
770 have_fp = 1;
771
772 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
773 }
774 else
775 {
776 fi->saved_regs[rn] = 0;
777 }
778 }
779
780 if (have_fp)
781 {
782 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
783 }
784 else
785 {
786 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
787 }
788
789 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
790 /* Work out the return pc - either from the saved pr or the pr
791 value */
792 }
793
794 /* Initialize the extra info saved in a FRAME */
795 static void
796 sh_init_extra_frame_info (int fromleaf, struct frame_info *fi)
797 {
798
799 fi->extra_info = (struct frame_extra_info *)
800 frame_obstack_alloc (sizeof (struct frame_extra_info));
801
802 if (fi->next)
803 fi->pc = FRAME_SAVED_PC (fi->next);
804
805 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
806 {
807 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
808 by assuming it's always FP. */
809 fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
810 SP_REGNUM);
811 fi->extra_info->return_pc = generic_read_register_dummy (fi->pc, fi->frame,
812 PC_REGNUM);
813 fi->extra_info->f_offset = -(CALL_DUMMY_LENGTH + 4);
814 fi->extra_info->leaf_function = 0;
815 return;
816 }
817 else
818 {
819 FRAME_INIT_SAVED_REGS (fi);
820 fi->extra_info->return_pc = sh_find_callers_reg (fi, PR_REGNUM);
821 }
822 }
823
824 /* Extract from an array REGBUF containing the (raw) register state
825 the address in which a function should return its structure value,
826 as a CORE_ADDR (or an expression that can be used as one). */
827 CORE_ADDR
828 static sh_extract_struct_value_address (regbuf)
829 char *regbuf;
830 {
831 return (extract_address ((regbuf), REGISTER_RAW_SIZE (0)));
832 }
833
834 static CORE_ADDR
835 sh_frame_saved_pc (struct frame_info *frame)
836 {
837 return ((frame)->extra_info->return_pc);
838 }
839
840 static CORE_ADDR
841 sh_frame_args_address (struct frame_info *fi)
842 {
843 return (fi)->frame;
844 }
845
846 static CORE_ADDR
847 sh_frame_locals_address (struct frame_info *fi)
848 {
849 return (fi)->frame;
850 }
851
852 /* Discard from the stack the innermost frame,
853 restoring all saved registers. */
854 static void
855 sh_pop_frame (void)
856 {
857 register struct frame_info *frame = get_current_frame ();
858 register CORE_ADDR fp;
859 register int regnum;
860
861 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
862 generic_pop_dummy_frame ();
863 else
864 {
865 fp = FRAME_FP (frame);
866 FRAME_INIT_SAVED_REGS (frame);
867
868 /* Copy regs from where they were saved in the frame */
869 for (regnum = 0; regnum < NUM_REGS; regnum++)
870 if (frame->saved_regs[regnum])
871 write_register (regnum, read_memory_integer (frame->saved_regs[regnum], 4));
872
873 write_register (PC_REGNUM, frame->extra_info->return_pc);
874 write_register (SP_REGNUM, fp + 4);
875 }
876 flush_cached_frames ();
877 }
878
879 /* Function: push_arguments
880 Setup the function arguments for calling a function in the inferior.
881
882 On the Hitachi SH architecture, there are four registers (R4 to R7)
883 which are dedicated for passing function arguments. Up to the first
884 four arguments (depending on size) may go into these registers.
885 The rest go on the stack.
886
887 Arguments that are smaller than 4 bytes will still take up a whole
888 register or a whole 32-bit word on the stack, and will be
889 right-justified in the register or the stack word. This includes
890 chars, shorts, and small aggregate types.
891
892 Arguments that are larger than 4 bytes may be split between two or
893 more registers. If there are not enough registers free, an argument
894 may be passed partly in a register (or registers), and partly on the
895 stack. This includes doubles, long longs, and larger aggregates.
896 As far as I know, there is no upper limit to the size of aggregates
897 that will be passed in this way; in other words, the convention of
898 passing a pointer to a large aggregate instead of a copy is not used.
899
900 An exceptional case exists for struct arguments (and possibly other
901 aggregates such as arrays) if the size is larger than 4 bytes but
902 not a multiple of 4 bytes. In this case the argument is never split
903 between the registers and the stack, but instead is copied in its
904 entirety onto the stack, AND also copied into as many registers as
905 there is room for. In other words, space in registers permitting,
906 two copies of the same argument are passed in. As far as I can tell,
907 only the one on the stack is used, although that may be a function
908 of the level of compiler optimization. I suspect this is a compiler
909 bug. Arguments of these odd sizes are left-justified within the
910 word (as opposed to arguments smaller than 4 bytes, which are
911 right-justified).
912
913 If the function is to return an aggregate type such as a struct, it
914 is either returned in the normal return value register R0 (if its
915 size is no greater than one byte), or else the caller must allocate
916 space into which the callee will copy the return value (if the size
917 is greater than one byte). In this case, a pointer to the return
918 value location is passed into the callee in register R2, which does
919 not displace any of the other arguments passed in via registers R4
920 to R7. */
921
922 static CORE_ADDR
923 sh_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
924 unsigned char struct_return, CORE_ADDR struct_addr)
925 {
926 int stack_offset, stack_alloc;
927 int argreg;
928 int argnum;
929 struct type *type;
930 CORE_ADDR regval;
931 char *val;
932 char valbuf[4];
933 int len;
934 int odd_sized_struct;
935
936 /* first force sp to a 4-byte alignment */
937 sp = sp & ~3;
938
939 /* The "struct return pointer" pseudo-argument has its own dedicated
940 register */
941 if (struct_return)
942 write_register (STRUCT_RETURN_REGNUM, struct_addr);
943
944 /* Now make sure there's space on the stack */
945 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
946 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
947 sp -= stack_alloc; /* make room on stack for args */
948
949 /* Now load as many as possible of the first arguments into
950 registers, and push the rest onto the stack. There are 16 bytes
951 in four registers available. Loop thru args from first to last. */
952
953 argreg = ARG0_REGNUM;
954 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
955 {
956 type = VALUE_TYPE (args[argnum]);
957 len = TYPE_LENGTH (type);
958 memset (valbuf, 0, sizeof (valbuf));
959 if (len < 4)
960 {
961 /* value gets right-justified in the register or stack word */
962 memcpy (valbuf + (4 - len),
963 (char *) VALUE_CONTENTS (args[argnum]), len);
964 val = valbuf;
965 }
966 else
967 val = (char *) VALUE_CONTENTS (args[argnum]);
968
969 if (len > 4 && (len & 3) != 0)
970 odd_sized_struct = 1; /* such structs go entirely on stack */
971 else
972 odd_sized_struct = 0;
973 while (len > 0)
974 {
975 if (argreg > ARGLAST_REGNUM || odd_sized_struct)
976 { /* must go on the stack */
977 write_memory (sp + stack_offset, val, 4);
978 stack_offset += 4;
979 }
980 /* NOTE WELL!!!!! This is not an "else if" clause!!!
981 That's because some *&^%$ things get passed on the stack
982 AND in the registers! */
983 if (argreg <= ARGLAST_REGNUM)
984 { /* there's room in a register */
985 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
986 write_register (argreg++, regval);
987 }
988 /* Store the value 4 bytes at a time. This means that things
989 larger than 4 bytes may go partly in registers and partly
990 on the stack. */
991 len -= REGISTER_RAW_SIZE (argreg);
992 val += REGISTER_RAW_SIZE (argreg);
993 }
994 }
995 return sp;
996 }
997
998 /* Function: push_return_address (pc)
999 Set up the return address for the inferior function call.
1000 Needed for targets where we don't actually execute a JSR/BSR instruction */
1001
1002 static CORE_ADDR
1003 sh_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1004 {
1005 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
1006 return sp;
1007 }
1008
1009 /* Function: fix_call_dummy
1010 Poke the callee function's address into the destination part of
1011 the CALL_DUMMY. The address is actually stored in a data word
1012 following the actualy CALL_DUMMY instructions, which will load
1013 it into a register using PC-relative addressing. This function
1014 expects the CALL_DUMMY to look like this:
1015
1016 mov.w @(2,PC), R8
1017 jsr @R8
1018 nop
1019 trap
1020 <destination>
1021 */
1022
1023 #if 0
1024 void
1025 sh_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
1026 value_ptr *args, struct type *type, int gcc_p)
1027 {
1028 *(unsigned long *) (dummy + 8) = fun;
1029 }
1030 #endif
1031
1032 static int
1033 sh_coerce_float_to_double (struct type *formal, struct type *actual)
1034 {
1035 return 1;
1036 }
1037
1038 /* Find a function's return value in the appropriate registers (in
1039 regbuf), and copy it into valbuf. Extract from an array REGBUF
1040 containing the (raw) register state a function return value of type
1041 TYPE, and copy that, in virtual format, into VALBUF. */
1042 static void
1043 sh_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1044 {
1045 int len = TYPE_LENGTH (type);
1046
1047 if (len <= 4)
1048 memcpy (valbuf, ((char *) regbuf) + 4 - len, len);
1049 else if (len <= 8)
1050 memcpy (valbuf, ((char *) regbuf) + 8 - len, len);
1051 else
1052 error ("bad size for return value");
1053 }
1054
1055 /* Write into appropriate registers a function return value
1056 of type TYPE, given in virtual format.
1057 If the architecture is sh4 or sh3e, store a function's return value
1058 in the R0 general register or in the FP0 floating point register,
1059 depending on the type of the return value. In all the other cases
1060 the result is stored in r0. */
1061 static void
1062 sh_default_store_return_value (struct type *type, char *valbuf)
1063 {
1064 write_register_bytes (REGISTER_BYTE (0),
1065 valbuf, TYPE_LENGTH (type));
1066 }
1067
1068 static void
1069 sh3e_sh4_store_return_value (struct type *type, char *valbuf)
1070 {
1071 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1072 write_register_bytes (REGISTER_BYTE (FP0_REGNUM),
1073 valbuf, TYPE_LENGTH (type));
1074 else
1075 write_register_bytes (REGISTER_BYTE (0),
1076 valbuf, TYPE_LENGTH (type));
1077 }
1078
1079
1080 /* Print the registers in a form similar to the E7000 */
1081
1082 static void
1083 sh_generic_show_regs (void)
1084 {
1085 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1086 paddr (read_register (PC_REGNUM)),
1087 (long) read_register (SR_REGNUM),
1088 (long) read_register (PR_REGNUM),
1089 (long) read_register (MACH_REGNUM),
1090 (long) read_register (MACL_REGNUM));
1091
1092 printf_filtered ("GBR=%08lx VBR=%08lx",
1093 (long) read_register (GBR_REGNUM),
1094 (long) read_register (VBR_REGNUM));
1095
1096 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1097 (long) read_register (0),
1098 (long) read_register (1),
1099 (long) read_register (2),
1100 (long) read_register (3),
1101 (long) read_register (4),
1102 (long) read_register (5),
1103 (long) read_register (6),
1104 (long) read_register (7));
1105 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1106 (long) read_register (8),
1107 (long) read_register (9),
1108 (long) read_register (10),
1109 (long) read_register (11),
1110 (long) read_register (12),
1111 (long) read_register (13),
1112 (long) read_register (14),
1113 (long) read_register (15));
1114 }
1115
1116 static void
1117 sh3_show_regs (void)
1118 {
1119 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1120 paddr (read_register (PC_REGNUM)),
1121 (long) read_register (SR_REGNUM),
1122 (long) read_register (PR_REGNUM),
1123 (long) read_register (MACH_REGNUM),
1124 (long) read_register (MACL_REGNUM));
1125
1126 printf_filtered ("GBR=%08lx VBR=%08lx",
1127 (long) read_register (GBR_REGNUM),
1128 (long) read_register (VBR_REGNUM));
1129 printf_filtered (" SSR=%08lx SPC=%08lx",
1130 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1131 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1132
1133 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1134 (long) read_register (0),
1135 (long) read_register (1),
1136 (long) read_register (2),
1137 (long) read_register (3),
1138 (long) read_register (4),
1139 (long) read_register (5),
1140 (long) read_register (6),
1141 (long) read_register (7));
1142 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1143 (long) read_register (8),
1144 (long) read_register (9),
1145 (long) read_register (10),
1146 (long) read_register (11),
1147 (long) read_register (12),
1148 (long) read_register (13),
1149 (long) read_register (14),
1150 (long) read_register (15));
1151 }
1152
1153
1154 static void
1155 sh3e_show_regs (void)
1156 {
1157 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1158 paddr (read_register (PC_REGNUM)),
1159 (long) read_register (SR_REGNUM),
1160 (long) read_register (PR_REGNUM),
1161 (long) read_register (MACH_REGNUM),
1162 (long) read_register (MACL_REGNUM));
1163
1164 printf_filtered ("GBR=%08lx VBR=%08lx",
1165 (long) read_register (GBR_REGNUM),
1166 (long) read_register (VBR_REGNUM));
1167 printf_filtered (" SSR=%08lx SPC=%08lx",
1168 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1169 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1170 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1171 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1172 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1173
1174 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1175 (long) read_register (0),
1176 (long) read_register (1),
1177 (long) read_register (2),
1178 (long) read_register (3),
1179 (long) read_register (4),
1180 (long) read_register (5),
1181 (long) read_register (6),
1182 (long) read_register (7));
1183 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1184 (long) read_register (8),
1185 (long) read_register (9),
1186 (long) read_register (10),
1187 (long) read_register (11),
1188 (long) read_register (12),
1189 (long) read_register (13),
1190 (long) read_register (14),
1191 (long) read_register (15));
1192
1193 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1194 (long) read_register (FP0_REGNUM + 0),
1195 (long) read_register (FP0_REGNUM + 1),
1196 (long) read_register (FP0_REGNUM + 2),
1197 (long) read_register (FP0_REGNUM + 3),
1198 (long) read_register (FP0_REGNUM + 4),
1199 (long) read_register (FP0_REGNUM + 5),
1200 (long) read_register (FP0_REGNUM + 6),
1201 (long) read_register (FP0_REGNUM + 7));
1202 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1203 (long) read_register (FP0_REGNUM + 8),
1204 (long) read_register (FP0_REGNUM + 9),
1205 (long) read_register (FP0_REGNUM + 10),
1206 (long) read_register (FP0_REGNUM + 11),
1207 (long) read_register (FP0_REGNUM + 12),
1208 (long) read_register (FP0_REGNUM + 13),
1209 (long) read_register (FP0_REGNUM + 14),
1210 (long) read_register (FP0_REGNUM + 15));
1211 }
1212
1213 static void
1214 sh3_dsp_show_regs (void)
1215 {
1216 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1217 paddr (read_register (PC_REGNUM)),
1218 (long) read_register (SR_REGNUM),
1219 (long) read_register (PR_REGNUM),
1220 (long) read_register (MACH_REGNUM),
1221 (long) read_register (MACL_REGNUM));
1222
1223 printf_filtered ("GBR=%08lx VBR=%08lx",
1224 (long) read_register (GBR_REGNUM),
1225 (long) read_register (VBR_REGNUM));
1226
1227 printf_filtered (" SSR=%08lx SPC=%08lx",
1228 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1229 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1230
1231 printf_filtered (" DSR=%08lx",
1232 (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1233
1234 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1235 (long) read_register (0),
1236 (long) read_register (1),
1237 (long) read_register (2),
1238 (long) read_register (3),
1239 (long) read_register (4),
1240 (long) read_register (5),
1241 (long) read_register (6),
1242 (long) read_register (7));
1243 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1244 (long) read_register (8),
1245 (long) read_register (9),
1246 (long) read_register (10),
1247 (long) read_register (11),
1248 (long) read_register (12),
1249 (long) read_register (13),
1250 (long) read_register (14),
1251 (long) read_register (15));
1252
1253 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1254 (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1255 (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1256 (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1257 (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1258 (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1259 (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1260 (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1261 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1262 (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1263 (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1264 (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1265 (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1266 (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1267 (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1268 }
1269
1270 static void
1271 sh4_show_regs (void)
1272 {
1273 int pr = read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & 0x80000;
1274 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1275 paddr (read_register (PC_REGNUM)),
1276 (long) read_register (SR_REGNUM),
1277 (long) read_register (PR_REGNUM),
1278 (long) read_register (MACH_REGNUM),
1279 (long) read_register (MACL_REGNUM));
1280
1281 printf_filtered ("GBR=%08lx VBR=%08lx",
1282 (long) read_register (GBR_REGNUM),
1283 (long) read_register (VBR_REGNUM));
1284 printf_filtered (" SSR=%08lx SPC=%08lx",
1285 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1286 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1287 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1288 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1289 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1290
1291 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1292 (long) read_register (0),
1293 (long) read_register (1),
1294 (long) read_register (2),
1295 (long) read_register (3),
1296 (long) read_register (4),
1297 (long) read_register (5),
1298 (long) read_register (6),
1299 (long) read_register (7));
1300 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1301 (long) read_register (8),
1302 (long) read_register (9),
1303 (long) read_register (10),
1304 (long) read_register (11),
1305 (long) read_register (12),
1306 (long) read_register (13),
1307 (long) read_register (14),
1308 (long) read_register (15));
1309
1310 printf_filtered ((pr
1311 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1312 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1313 (long) read_register (FP0_REGNUM + 0),
1314 (long) read_register (FP0_REGNUM + 1),
1315 (long) read_register (FP0_REGNUM + 2),
1316 (long) read_register (FP0_REGNUM + 3),
1317 (long) read_register (FP0_REGNUM + 4),
1318 (long) read_register (FP0_REGNUM + 5),
1319 (long) read_register (FP0_REGNUM + 6),
1320 (long) read_register (FP0_REGNUM + 7));
1321 printf_filtered ((pr
1322 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1323 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1324 (long) read_register (FP0_REGNUM + 8),
1325 (long) read_register (FP0_REGNUM + 9),
1326 (long) read_register (FP0_REGNUM + 10),
1327 (long) read_register (FP0_REGNUM + 11),
1328 (long) read_register (FP0_REGNUM + 12),
1329 (long) read_register (FP0_REGNUM + 13),
1330 (long) read_register (FP0_REGNUM + 14),
1331 (long) read_register (FP0_REGNUM + 15));
1332 }
1333
1334 static void
1335 sh_dsp_show_regs (void)
1336 {
1337 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1338 paddr (read_register (PC_REGNUM)),
1339 (long) read_register (SR_REGNUM),
1340 (long) read_register (PR_REGNUM),
1341 (long) read_register (MACH_REGNUM),
1342 (long) read_register (MACL_REGNUM));
1343
1344 printf_filtered ("GBR=%08lx VBR=%08lx",
1345 (long) read_register (GBR_REGNUM),
1346 (long) read_register (VBR_REGNUM));
1347
1348 printf_filtered (" DSR=%08lx",
1349 (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1350
1351 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1352 (long) read_register (0),
1353 (long) read_register (1),
1354 (long) read_register (2),
1355 (long) read_register (3),
1356 (long) read_register (4),
1357 (long) read_register (5),
1358 (long) read_register (6),
1359 (long) read_register (7));
1360 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1361 (long) read_register (8),
1362 (long) read_register (9),
1363 (long) read_register (10),
1364 (long) read_register (11),
1365 (long) read_register (12),
1366 (long) read_register (13),
1367 (long) read_register (14),
1368 (long) read_register (15));
1369
1370 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1371 (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1372 (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1373 (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1374 (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1375 (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1376 (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1377 (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1378 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1379 (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1380 (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1381 (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1382 (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1383 (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1384 (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1385 }
1386
1387 void sh_show_regs_command (char *args, int from_tty)
1388 {
1389 if (sh_show_regs)
1390 (*sh_show_regs)();
1391 }
1392
1393 /* Index within `registers' of the first byte of the space for
1394 register N. */
1395 static int
1396 sh_default_register_byte (int reg_nr)
1397 {
1398 return (reg_nr * 4);
1399 }
1400
1401 static int
1402 sh_sh4_register_byte (int reg_nr)
1403 {
1404 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1405 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
1406 return (dr_reg_base_num (reg_nr) * 4);
1407 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1408 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
1409 return (fv_reg_base_num (reg_nr) * 4);
1410 else
1411 return (reg_nr * 4);
1412 }
1413
1414 /* Number of bytes of storage in the actual machine representation for
1415 register REG_NR. */
1416 static int
1417 sh_default_register_raw_size (int reg_nr)
1418 {
1419 return 4;
1420 }
1421
1422 static int
1423 sh_sh4_register_raw_size (int reg_nr)
1424 {
1425 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1426 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
1427 return 8;
1428 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1429 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
1430 return 16;
1431 else
1432 return 4;
1433 }
1434
1435 /* Number of bytes of storage in the program's representation
1436 for register N. */
1437 static int
1438 sh_register_virtual_size (int reg_nr)
1439 {
1440 return 4;
1441 }
1442
1443 /* Return the GDB type object for the "standard" data type
1444 of data in register N. */
1445
1446 static struct type *
1447 sh_sh3e_register_virtual_type (int reg_nr)
1448 {
1449 if ((reg_nr >= FP0_REGNUM
1450 && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP15_REGNUM))
1451 || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1452 return builtin_type_float;
1453 else
1454 return builtin_type_int;
1455 }
1456
1457 static struct type *
1458 sh_sh4_register_virtual_type (int reg_nr)
1459 {
1460 if ((reg_nr >= FP0_REGNUM
1461 && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP15_REGNUM))
1462 || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1463 return builtin_type_float;
1464 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1465 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
1466 return builtin_type_double;
1467 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1468 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
1469 return sh_sh4_build_float_register_type (3);
1470 else
1471 return builtin_type_int;
1472 }
1473
1474 static struct type *
1475 sh_sh4_build_float_register_type (int high)
1476 {
1477 struct type *temp;
1478
1479 temp = create_range_type (NULL, builtin_type_int, 0, high);
1480 return create_array_type (NULL, builtin_type_float, temp);
1481 }
1482
1483 static struct type *
1484 sh_default_register_virtual_type (int reg_nr)
1485 {
1486 return builtin_type_int;
1487 }
1488
1489 /* On the sh4, the DRi pseudo registers are problematic if the target
1490 is little endian. When the user writes one of those registers, for
1491 instance with 'ser var $dr0=1', we want the double to be stored
1492 like this:
1493 fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1494 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1495
1496 This corresponds to little endian byte order & big endian word
1497 order. However if we let gdb write the register w/o conversion, it
1498 will write fr0 and fr1 this way:
1499 fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1500 fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1501 because it will consider fr0 and fr1 as a single LE stretch of memory.
1502
1503 To achieve what we want we must force gdb to store things in
1504 floatformat_ieee_double_littlebyte_bigword (which is defined in
1505 include/floatformat.h and libiberty/floatformat.c.
1506
1507 In case the target is big endian, there is no problem, the
1508 raw bytes will look like:
1509 fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
1510 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1511
1512 The other pseudo registers (the FVs) also don't pose a problem
1513 because they are stored as 4 individual FP elements. */
1514
1515 int
1516 sh_sh4_register_convertible (int nr)
1517 {
1518 if (TARGET_BYTE_ORDER == LITTLE_ENDIAN)
1519 return (gdbarch_tdep (current_gdbarch)->DR0_REGNUM <= nr
1520 && nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM);
1521 else
1522 return 0;
1523 }
1524
1525 void
1526 sh_sh4_register_convert_to_virtual (int regnum, struct type *type,
1527 char *from, char *to)
1528 {
1529 if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1530 && regnum <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
1531 {
1532 DOUBLEST val;
1533 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, from, &val);
1534 store_floating(to, TYPE_LENGTH(type), val);
1535 }
1536 else
1537 error("sh_register_convert_to_virtual called with non DR register number");
1538 }
1539
1540 void
1541 sh_sh4_register_convert_to_raw (struct type *type, int regnum,
1542 char *from, char *to)
1543 {
1544 if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1545 && regnum <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
1546 {
1547 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
1548 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword, &val, to);
1549 }
1550 else
1551 error("sh_register_convert_to_raw called with non DR register number");
1552 }
1553
1554 void
1555 sh_fetch_pseudo_register (int reg_nr)
1556 {
1557 int base_regnum, portion;
1558
1559 if (!register_cached (reg_nr))
1560 {
1561 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1562 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
1563 {
1564 base_regnum = dr_reg_base_num (reg_nr);
1565
1566 /* Read the real regs for which this one is an alias. */
1567 for (portion = 0; portion < 2; portion++)
1568 if (!register_cached (base_regnum + portion))
1569 target_fetch_registers (base_regnum + portion);
1570 }
1571 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1572 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
1573 {
1574 base_regnum = fv_reg_base_num (reg_nr);
1575
1576 /* Read the real regs for which this one is an alias. */
1577 for (portion = 0; portion < 4; portion++)
1578 if (!register_cached (base_regnum + portion))
1579 target_fetch_registers (base_regnum + portion);
1580
1581 }
1582 register_valid [reg_nr] = 1;
1583 }
1584 }
1585
1586 void
1587 sh_store_pseudo_register (int reg_nr)
1588 {
1589 int base_regnum, portion;
1590
1591 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1592 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
1593 {
1594 base_regnum = dr_reg_base_num (reg_nr);
1595
1596 /* Write the real regs for which this one is an alias. */
1597 for (portion = 0; portion < 2; portion++)
1598 {
1599 register_valid[base_regnum + portion] = 1;
1600 target_store_registers (base_regnum + portion);
1601 }
1602 }
1603 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1604 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
1605 {
1606 base_regnum = fv_reg_base_num (reg_nr);
1607
1608 /* Write the real regs for which this one is an alias. */
1609 for (portion = 0; portion < 4; portion++)
1610 {
1611 register_valid[base_regnum + portion] = 1;
1612 target_store_registers (base_regnum + portion);
1613 }
1614 }
1615 }
1616
1617 static int
1618 fv_reg_base_num (int fv_regnum)
1619 {
1620 int fp_regnum;
1621
1622 fp_regnum = FP0_REGNUM +
1623 (fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM) * 4;
1624 return fp_regnum;
1625 }
1626
1627 static int
1628 dr_reg_base_num (int dr_regnum)
1629 {
1630 int fp_regnum;
1631
1632 fp_regnum = FP0_REGNUM +
1633 (dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM) * 2;
1634 return fp_regnum;
1635 }
1636
1637 static void
1638 do_fv_register_info (int fv_regnum)
1639 {
1640 int first_fp_reg_num = fv_reg_base_num (fv_regnum);
1641 printf_filtered ("fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
1642 fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM,
1643 (int) read_register (first_fp_reg_num),
1644 (int) read_register (first_fp_reg_num + 1),
1645 (int) read_register (first_fp_reg_num + 2),
1646 (int) read_register (first_fp_reg_num + 3));
1647 }
1648
1649 static void
1650 do_dr_register_info (int dr_regnum)
1651 {
1652 int first_fp_reg_num = dr_reg_base_num (dr_regnum);
1653
1654 printf_filtered ("dr%d\t0x%08x%08x\n",
1655 dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM,
1656 (int) read_register (first_fp_reg_num),
1657 (int) read_register (first_fp_reg_num + 1));
1658 }
1659
1660 static void
1661 sh_do_pseudo_register (int regnum)
1662 {
1663 if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1664 internal_error ("Invalid pasudo register number %d\n", regnum);
1665 else if (regnum >= NUM_REGS &&
1666 regnum < gdbarch_tdep (current_gdbarch)->FV0_REGNUM)
1667 do_dr_register_info (regnum);
1668 else if (regnum >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM &&
1669 regnum <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
1670 do_fv_register_info (regnum);
1671 }
1672
1673
1674 static void
1675 sh_do_fp_register (int regnum)
1676 { /* do values for FP (float) regs */
1677 char *raw_buffer;
1678 double flt; /* double extracted from raw hex data */
1679 int inv;
1680 int j;
1681
1682 /* Allocate space for the float. */
1683 raw_buffer = (char *) alloca (REGISTER_RAW_SIZE (FP0_REGNUM));
1684
1685 /* Get the data in raw format. */
1686 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1687 error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
1688
1689 /* Get the register as a number */
1690 flt = unpack_double (builtin_type_float, raw_buffer, &inv);
1691
1692 /* Print the name and some spaces. */
1693 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1694 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1695
1696 /* Print the value. */
1697 printf_filtered (inv ? "<invalid float>" : "%-10.9g", flt);
1698
1699 /* Print the fp register as hex. */
1700 printf_filtered ("\t(raw 0x");
1701 for (j = 0; j < REGISTER_RAW_SIZE (regnum); j++)
1702 {
1703 register int idx = TARGET_BYTE_ORDER == BIG_ENDIAN ? j
1704 : REGISTER_RAW_SIZE (regnum) - 1 - j;
1705 printf_filtered ("%02x", (unsigned char) raw_buffer[idx]);
1706 }
1707 printf_filtered (")");
1708 printf_filtered ("\n");
1709 }
1710
1711 static void
1712 sh_do_register (int regnum)
1713 {
1714 char raw_buffer[MAX_REGISTER_RAW_SIZE];
1715
1716 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1717 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1718
1719 /* Get the data in raw format. */
1720 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1721 printf_filtered ("*value not available*\n");
1722
1723 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1724 gdb_stdout, 'x', 1, 0, Val_pretty_default);
1725 printf_filtered ("\t");
1726 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1727 gdb_stdout, 0, 1, 0, Val_pretty_default);
1728 printf_filtered ("\n");
1729 }
1730
1731 static void
1732 sh_print_register (int regnum)
1733 {
1734 if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1735 internal_error ("Invalid register number %d\n", regnum);
1736
1737 else if (regnum > 0 && regnum < NUM_REGS)
1738 {
1739 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1740 sh_do_fp_register (regnum); /* FP regs */
1741 else
1742 sh_do_register (regnum); /* All other regs */
1743 }
1744
1745 else if (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1746 sh_do_pseudo_register (regnum);
1747 }
1748
1749 void
1750 sh_do_registers_info (int regnum, int fpregs)
1751 {
1752 if (regnum != -1) /* do one specified register */
1753 {
1754 if (*(REGISTER_NAME (regnum)) == '\0')
1755 error ("Not a valid register for the current processor type");
1756
1757 sh_print_register (regnum);
1758 }
1759 else
1760 /* do all (or most) registers */
1761 {
1762 regnum = 0;
1763 while (regnum < NUM_REGS)
1764 {
1765 /* If the register name is empty, it is undefined for this
1766 processor, so don't display anything. */
1767 if (REGISTER_NAME (regnum) == NULL
1768 || *(REGISTER_NAME (regnum)) == '\0')
1769 {
1770 regnum++;
1771 continue;
1772 }
1773
1774 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1775 {
1776 if (fpregs)
1777 {
1778 /* true for "INFO ALL-REGISTERS" command */
1779 sh_do_fp_register (regnum); /* FP regs */
1780 regnum ++;
1781 }
1782 else
1783 regnum += (gdbarch_tdep (current_gdbarch)->FP15_REGNUM - FP0_REGNUM); /* skip FP regs */
1784 }
1785 else
1786 {
1787 sh_do_register (regnum); /* All other regs */
1788 regnum++;
1789 }
1790 }
1791
1792 if (fpregs)
1793 while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1794 {
1795 sh_do_pseudo_register (regnum);
1796 regnum++;
1797 }
1798 }
1799 }
1800
1801 static gdbarch_init_ftype sh_gdbarch_init;
1802
1803 static struct gdbarch *
1804 sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1805 {
1806 static LONGEST sh_call_dummy_words[] = {0};
1807 struct gdbarch *gdbarch;
1808 struct gdbarch_tdep *tdep;
1809 gdbarch_register_name_ftype *sh_register_name;
1810 gdbarch_store_return_value_ftype *sh_store_return_value;
1811 gdbarch_register_virtual_type_ftype *sh_register_virtual_type;
1812
1813 /* Find a candidate among the list of pre-declared architectures. */
1814 arches = gdbarch_list_lookup_by_info (arches, &info);
1815 if (arches != NULL)
1816 return arches->gdbarch;
1817
1818 /* None found, create a new architecture from the information
1819 provided. */
1820 tdep = XMALLOC (struct gdbarch_tdep);
1821 gdbarch = gdbarch_alloc (&info, tdep);
1822
1823 /* Initialize the register numbers that are not common to all the
1824 variants to -1, if necessary thse will be overwritten in the case
1825 statement below. */
1826 tdep->FPUL_REGNUM = -1;
1827 tdep->FPSCR_REGNUM = -1;
1828 tdep->DSR_REGNUM = -1;
1829 tdep->FP15_REGNUM = -1;
1830 tdep->A0G_REGNUM = -1;
1831 tdep->A0_REGNUM = -1;
1832 tdep->A1G_REGNUM = -1;
1833 tdep->A1_REGNUM = -1;
1834 tdep->M0_REGNUM = -1;
1835 tdep->M1_REGNUM = -1;
1836 tdep->X0_REGNUM = -1;
1837 tdep->X1_REGNUM = -1;
1838 tdep->Y0_REGNUM = -1;
1839 tdep->Y1_REGNUM = -1;
1840 tdep->MOD_REGNUM = -1;
1841 tdep->RS_REGNUM = -1;
1842 tdep->RE_REGNUM = -1;
1843 tdep->SSR_REGNUM = -1;
1844 tdep->SPC_REGNUM = -1;
1845 tdep->DR0_REGNUM = -1;
1846 tdep->DR2_REGNUM = -1;
1847 tdep->DR4_REGNUM = -1;
1848 tdep->DR6_REGNUM = -1;
1849 tdep->DR8_REGNUM = -1;
1850 tdep->DR10_REGNUM = -1;
1851 tdep->DR12_REGNUM = -1;
1852 tdep->DR14_REGNUM = -1;
1853 tdep->FV0_REGNUM = -1;
1854 tdep->FV4_REGNUM = -1;
1855 tdep->FV8_REGNUM = -1;
1856 tdep->FV12_REGNUM = -1;
1857 set_gdbarch_fp0_regnum (gdbarch, -1);
1858 set_gdbarch_num_pseudo_regs (gdbarch, 0);
1859 set_gdbarch_max_register_raw_size (gdbarch, 4);
1860 set_gdbarch_max_register_virtual_size (gdbarch, 4);
1861
1862 switch (info.bfd_arch_info->mach)
1863 {
1864 case bfd_mach_sh:
1865 sh_register_name = sh_sh_register_name;
1866 sh_show_regs = sh_generic_show_regs;
1867 sh_store_return_value = sh_default_store_return_value;
1868 sh_register_virtual_type = sh_default_register_virtual_type;
1869 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1870 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1871 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1872 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1873 break;
1874 case bfd_mach_sh2:
1875 sh_register_name = sh_sh_register_name;
1876 sh_show_regs = sh_generic_show_regs;
1877 sh_store_return_value = sh_default_store_return_value;
1878 sh_register_virtual_type = sh_default_register_virtual_type;
1879 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1880 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1881 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1882 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1883 break;
1884 case bfd_mach_sh_dsp:
1885 sh_register_name = sh_sh_dsp_register_name;
1886 sh_show_regs = sh_dsp_show_regs;
1887 sh_store_return_value = sh_default_store_return_value;
1888 sh_register_virtual_type = sh_default_register_virtual_type;
1889 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1890 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1891 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1892 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1893 tdep->DSR_REGNUM = 24;
1894 tdep->A0G_REGNUM = 25;
1895 tdep->A0_REGNUM = 26;
1896 tdep->A1G_REGNUM = 27;
1897 tdep->A1_REGNUM = 28;
1898 tdep->M0_REGNUM = 29;
1899 tdep->M1_REGNUM = 30;
1900 tdep->X0_REGNUM = 31;
1901 tdep->X1_REGNUM = 32;
1902 tdep->Y0_REGNUM = 33;
1903 tdep->Y1_REGNUM = 34;
1904 tdep->MOD_REGNUM = 40;
1905 tdep->RS_REGNUM = 43;
1906 tdep->RE_REGNUM = 44;
1907 break;
1908 case bfd_mach_sh3:
1909 sh_register_name = sh_sh3_register_name;
1910 sh_show_regs = sh3_show_regs;
1911 sh_store_return_value = sh_default_store_return_value;
1912 sh_register_virtual_type = sh_default_register_virtual_type;
1913 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1914 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1915 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1916 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1917 tdep->SSR_REGNUM = 41;
1918 tdep->SPC_REGNUM = 42;
1919 break;
1920 case bfd_mach_sh3e:
1921 sh_register_name = sh_sh3e_register_name;
1922 sh_show_regs = sh3e_show_regs;
1923 sh_store_return_value = sh3e_sh4_store_return_value;
1924 sh_register_virtual_type = sh_sh3e_register_virtual_type;
1925 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
1926 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1927 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1928 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1929 set_gdbarch_fp0_regnum (gdbarch, 25);
1930 tdep->FPUL_REGNUM = 23;
1931 tdep->FPSCR_REGNUM = 24;
1932 tdep->FP15_REGNUM = 40;
1933 tdep->SSR_REGNUM = 41;
1934 tdep->SPC_REGNUM = 42;
1935 break;
1936 case bfd_mach_sh3_dsp:
1937 sh_register_name = sh_sh3_dsp_register_name;
1938 sh_show_regs = sh3_dsp_show_regs;
1939 sh_store_return_value = sh_default_store_return_value;
1940 sh_register_virtual_type = sh_default_register_virtual_type;
1941 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1942 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1943 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1944 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1945 tdep->DSR_REGNUM = 24;
1946 tdep->A0G_REGNUM = 25;
1947 tdep->A0_REGNUM = 26;
1948 tdep->A1G_REGNUM = 27;
1949 tdep->A1_REGNUM = 28;
1950 tdep->M0_REGNUM = 29;
1951 tdep->M1_REGNUM = 30;
1952 tdep->X0_REGNUM = 31;
1953 tdep->X1_REGNUM = 32;
1954 tdep->Y0_REGNUM = 33;
1955 tdep->Y1_REGNUM = 34;
1956 tdep->MOD_REGNUM = 40;
1957 tdep->RS_REGNUM = 43;
1958 tdep->RE_REGNUM = 44;
1959 tdep->SSR_REGNUM = 41;
1960 tdep->SPC_REGNUM = 42;
1961 break;
1962 case bfd_mach_sh4:
1963 sh_register_name = sh_sh4_register_name;
1964 sh_show_regs = sh4_show_regs;
1965 sh_store_return_value = sh3e_sh4_store_return_value;
1966 sh_register_virtual_type = sh_sh4_register_virtual_type;
1967 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
1968 set_gdbarch_fp0_regnum (gdbarch, 25);
1969 set_gdbarch_register_raw_size (gdbarch, sh_sh4_register_raw_size);
1970 set_gdbarch_register_virtual_size (gdbarch, sh_sh4_register_raw_size);
1971 set_gdbarch_register_byte (gdbarch, sh_sh4_register_byte);
1972 set_gdbarch_num_pseudo_regs (gdbarch, 12);
1973 set_gdbarch_max_register_raw_size (gdbarch, 4 * 4);
1974 set_gdbarch_max_register_virtual_size (gdbarch, 4 * 4);
1975 set_gdbarch_register_convert_to_raw (gdbarch, sh_sh4_register_convert_to_raw);
1976 set_gdbarch_register_convert_to_virtual (gdbarch, sh_sh4_register_convert_to_virtual);
1977 set_gdbarch_register_convertible (gdbarch, sh_sh4_register_convertible);
1978 tdep->FPUL_REGNUM = 23;
1979 tdep->FPSCR_REGNUM = 24;
1980 tdep->FP15_REGNUM = 40;
1981 tdep->SSR_REGNUM = 41;
1982 tdep->SPC_REGNUM = 42;
1983 tdep->DR0_REGNUM = 59;
1984 tdep->DR2_REGNUM = 60;
1985 tdep->DR4_REGNUM = 61;
1986 tdep->DR6_REGNUM = 62;
1987 tdep->DR8_REGNUM = 63;
1988 tdep->DR10_REGNUM = 64;
1989 tdep->DR12_REGNUM = 65;
1990 tdep->DR14_REGNUM = 66;
1991 tdep->FV0_REGNUM = 67;
1992 tdep->FV4_REGNUM = 68;
1993 tdep->FV8_REGNUM = 69;
1994 tdep->FV12_REGNUM = 70;
1995 break;
1996 default:
1997 sh_register_name = sh_generic_register_name;
1998 sh_show_regs = sh_generic_show_regs;
1999 sh_store_return_value = sh_default_store_return_value;
2000 sh_register_virtual_type = sh_default_register_virtual_type;
2001 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2002 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2003 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2004 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2005 break;
2006 }
2007
2008 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
2009 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2010 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
2011 set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
2012 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2013 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2014
2015 set_gdbarch_num_regs (gdbarch, 59);
2016 set_gdbarch_sp_regnum (gdbarch, 15);
2017 set_gdbarch_fp_regnum (gdbarch, 14);
2018 set_gdbarch_pc_regnum (gdbarch, 16);
2019 set_gdbarch_register_name (gdbarch, sh_register_name);
2020 set_gdbarch_register_size (gdbarch, 4);
2021 set_gdbarch_register_bytes (gdbarch, NUM_REGS * 4);
2022 set_gdbarch_register_virtual_type (gdbarch, sh_register_virtual_type);
2023
2024 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2025 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2026 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2027 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2028 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2029 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2030 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2031 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);
2032
2033 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2034 set_gdbarch_call_dummy_length (gdbarch, 0);
2035 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2036 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2037 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
2038 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2039 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2040 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2041 set_gdbarch_call_dummy_words (gdbarch, sh_call_dummy_words);
2042 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (sh_call_dummy_words));
2043 set_gdbarch_call_dummy_p (gdbarch, 1);
2044 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2045 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
2046 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2047 set_gdbarch_coerce_float_to_double (gdbarch,
2048 sh_coerce_float_to_double);
2049
2050 set_gdbarch_extract_return_value (gdbarch, sh_extract_return_value);
2051 set_gdbarch_push_arguments (gdbarch, sh_push_arguments);
2052 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2053 set_gdbarch_push_return_address (gdbarch, sh_push_return_address);
2054
2055 set_gdbarch_store_struct_return (gdbarch, sh_store_struct_return);
2056 set_gdbarch_store_return_value (gdbarch, sh_store_return_value);
2057 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2058 set_gdbarch_use_struct_convention (gdbarch, sh_use_struct_convention);
2059 set_gdbarch_init_extra_frame_info (gdbarch, sh_init_extra_frame_info);
2060 set_gdbarch_pop_frame (gdbarch, sh_pop_frame);
2061 set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue);
2062 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2063 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2064 set_gdbarch_function_start_offset (gdbarch, 0);
2065 set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
2066
2067 set_gdbarch_fetch_pseudo_register (gdbarch, sh_fetch_pseudo_register);
2068 set_gdbarch_store_pseudo_register (gdbarch, sh_store_pseudo_register);
2069 set_gdbarch_frame_args_skip (gdbarch, 0);
2070 set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
2071 set_gdbarch_frame_chain (gdbarch, sh_frame_chain);
2072 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
2073 set_gdbarch_frame_saved_pc (gdbarch, sh_frame_saved_pc);
2074 set_gdbarch_frame_args_address (gdbarch, sh_frame_args_address);
2075 set_gdbarch_frame_locals_address (gdbarch, sh_frame_locals_address);
2076 set_gdbarch_saved_pc_after_call (gdbarch, sh_saved_pc_after_call);
2077 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2078 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2079 set_gdbarch_ieee_float (gdbarch, 1);
2080
2081 return gdbarch;
2082 }
2083
2084 void
2085 _initialize_sh_tdep (void)
2086 {
2087 struct cmd_list_element *c;
2088
2089 register_gdbarch_init (bfd_arch_sh, sh_gdbarch_init);
2090 tm_print_insn = gdb_print_insn_sh;
2091
2092 add_com ("regs", class_vars, sh_show_regs_command, "Print all registers");
2093 }
GDB Binutils - Deliverables
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