1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21 /* ??? Support for calling functions from gdb in sparc64 is unfinished. */
31 #include <sys/procfs.h>
36 #ifdef GDB_TARGET_IS_SPARC64
37 #define FP_REGISTER_BYTES (64 * 4)
39 #define FP_REGISTER_BYTES (32 * 4)
42 /* If not defined, assume 32 bit sparc. */
44 #define FP_MAX_REGNUM (FP0_REGNUM + 32)
47 #define SPARC_INTREG_SIZE (REGISTER_RAW_SIZE (G0_REGNUM))
50 extern int stop_after_trap
;
52 /* We don't store all registers immediately when requested, since they
53 get sent over in large chunks anyway. Instead, we accumulate most
54 of the changes and send them over once. "deferred_stores" keeps
55 track of which sets of registers we have locally-changed copies of,
56 so we only need send the groups that have changed. */
58 int deferred_stores
= 0; /* Cumulates stores we want to do eventually. */
60 /* Branches with prediction are treated like their non-predicting cousins. */
61 /* FIXME: What about floating point branches? */
63 /* Macros to extract fields from sparc instructions. */
64 #define X_OP(i) (((i) >> 30) & 0x3)
65 #define X_RD(i) (((i) >> 25) & 0x1f)
66 #define X_A(i) (((i) >> 29) & 1)
67 #define X_COND(i) (((i) >> 25) & 0xf)
68 #define X_OP2(i) (((i) >> 22) & 0x7)
69 #define X_IMM22(i) ((i) & 0x3fffff)
70 #define X_OP3(i) (((i) >> 19) & 0x3f)
71 #define X_RS1(i) (((i) >> 14) & 0x1f)
72 #define X_I(i) (((i) >> 13) & 1)
73 #define X_IMM13(i) ((i) & 0x1fff)
74 /* Sign extension macros. */
75 #define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000)
76 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
77 #ifdef GDB_TARGET_IS_SPARC64
78 #define X_CC(i) (((i) >> 20) & 3)
79 #define X_P(i) (((i) >> 19) & 1)
80 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
81 #define X_RCOND(i) (((i) >> 25) & 7)
82 #define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000)
83 #define X_FCN(i) (((i) >> 25) & 31)
88 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
,
89 #ifdef GDB_TARGET_IS_SPARC64
94 /* Simulate single-step ptrace call for sun4. Code written by Gary
95 Beihl (beihl@mcc.com). */
97 /* npc4 and next_pc describe the situation at the time that the
98 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
99 static CORE_ADDR next_pc
, npc4
, target
;
100 static int brknpc4
, brktrg
;
101 typedef char binsn_quantum
[BREAKPOINT_MAX
];
102 static binsn_quantum break_mem
[3];
104 /* Non-zero if we just simulated a single-step ptrace call. This is
105 needed because we cannot remove the breakpoints in the inferior
106 process until after the `wait' in `wait_for_inferior'. Used for
111 /* single_step() is called just before we want to resume the inferior,
112 if we want to single-step it but there is no hardware or kernel single-step
113 support (as on all SPARCs). We find all the possible targets of the
114 coming instruction and breakpoint them.
116 single_step is also called just after the inferior stops. If we had
117 set up a simulated single-step, we undo our damage. */
121 int ignore
; /* pid, but we don't need it */
123 branch_type br
, isbranch();
129 /* Always set breakpoint for NPC. */
130 next_pc
= read_register (NPC_REGNUM
);
131 npc4
= next_pc
+ 4; /* branch not taken */
133 target_insert_breakpoint (next_pc
, break_mem
[0]);
134 /* printf_unfiltered ("set break at %x\n",next_pc); */
136 pc
= read_register (PC_REGNUM
);
137 pc_instruction
= read_memory_integer (pc
, 4);
138 br
= isbranch (pc_instruction
, pc
, &target
);
139 brknpc4
= brktrg
= 0;
143 /* Conditional annulled branch will either end up at
144 npc (if taken) or at npc+4 (if not taken).
147 target_insert_breakpoint (npc4
, break_mem
[1]);
149 else if (br
== baa
&& target
!= next_pc
)
151 /* Unconditional annulled branch will always end up at
154 target_insert_breakpoint (target
, break_mem
[2]);
156 #ifdef GDB_TARGET_IS_SPARC64
157 else if (br
== done_retry
)
160 target_insert_breakpoint (target
, break_mem
[2]);
164 /* We are ready to let it go */
170 /* Remove breakpoints */
171 target_remove_breakpoint (next_pc
, break_mem
[0]);
174 target_remove_breakpoint (npc4
, break_mem
[1]);
177 target_remove_breakpoint (target
, break_mem
[2]);
183 /* Call this for each newly created frame. For SPARC, we need to calculate
184 the bottom of the frame, and do some extra work if the prologue
185 has been generated via the -mflat option to GCC. In particular,
186 we need to know where the previous fp and the pc have been stashed,
187 since their exact position within the frame may vary. */
190 sparc_init_extra_frame_info (fromleaf
, fi
)
192 struct frame_info
*fi
;
200 (fi
->frame
== fi
->next
->frame
? fi
->next
->bottom
: fi
->next
->frame
) :
201 read_register (SP_REGNUM
));
203 /* If fi->next is NULL, then we already set ->frame by passing read_fp()
204 to create_new_frame. */
207 char buf
[MAX_REGISTER_RAW_SIZE
];
210 /* Compute ->frame as if not flat. If it is flat, we'll change
212 /* FIXME: If error reading memory, should just stop backtracing, rather
214 get_saved_register (buf
, 0, 0, fi
, FP_REGNUM
, 0);
215 fi
->frame
= extract_address (buf
, REGISTER_RAW_SIZE (FP_REGNUM
));
218 /* Decide whether this is a function with a ``flat register window''
219 frame. For such functions, the frame pointer is actually in %i7. */
221 if (find_pc_partial_function (fi
->pc
, &name
, &addr
, NULL
))
223 /* See if the function starts with an add (which will be of a
224 negative number if a flat frame) to the sp. FIXME: Does not
225 handle large frames which will need more than one instruction
227 insn
= read_memory_integer (addr
, 4);
228 if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0
229 && X_I (insn
) && X_SIMM13 (insn
) < 0)
231 int offset
= X_SIMM13 (insn
);
233 /* Then look for a save of %i7 into the frame. */
234 insn
= read_memory_integer (addr
+ 4, 4);
238 && X_RS1 (insn
) == 14)
240 char buf
[MAX_REGISTER_RAW_SIZE
];
242 /* We definitely have a flat frame now. */
245 fi
->sp_offset
= offset
;
247 /* Overwrite the frame's address with the value in %i7. */
248 get_saved_register (buf
, 0, 0, fi
, I7_REGNUM
, 0);
249 fi
->frame
= extract_address (buf
, REGISTER_RAW_SIZE (I7_REGNUM
));
251 /* Record where the fp got saved. */
252 fi
->fp_addr
= fi
->frame
+ fi
->sp_offset
+ X_SIMM13 (insn
);
254 /* Also try to collect where the pc got saved to. */
256 insn
= read_memory_integer (addr
+ 12, 4);
260 && X_RS1 (insn
) == 14)
261 fi
->pc_addr
= fi
->frame
+ fi
->sp_offset
+ X_SIMM13 (insn
);
265 if (fi
->next
&& fi
->frame
== 0)
267 /* Kludge to cause init_prev_frame_info to destroy the new frame. */
268 fi
->frame
= fi
->next
->frame
;
269 fi
->pc
= fi
->next
->pc
;
274 sparc_frame_chain (frame
)
275 struct frame_info
*frame
;
277 /* Value that will cause FRAME_CHAIN_VALID to not worry about the chain
278 value. If it realy is zero, we detect it later in
279 sparc_init_prev_frame. */
284 sparc_extract_struct_value_address (regbuf
)
285 char regbuf
[REGISTER_BYTES
];
287 #ifdef GDB_TARGET_IS_SPARC64
288 return extract_address (regbuf
+ REGISTER_BYTE (O0_REGNUM
),
289 REGISTER_RAW_SIZE (O0_REGNUM
));
291 return read_memory_integer (((int *)(regbuf
)) [SP_REGNUM
] + (16 * SPARC_INTREG_SIZE
),
292 TARGET_PTR_BIT
/ TARGET_CHAR_BIT
);
296 /* Find the pc saved in frame FRAME. */
299 sparc_frame_saved_pc (frame
)
300 struct frame_info
*frame
;
302 char buf
[MAX_REGISTER_RAW_SIZE
];
305 if (frame
->signal_handler_caller
)
307 /* This is the signal trampoline frame.
308 Get the saved PC from the sigcontext structure. */
310 #ifndef SIGCONTEXT_PC_OFFSET
311 #define SIGCONTEXT_PC_OFFSET 12
314 CORE_ADDR sigcontext_addr
;
315 char scbuf
[TARGET_PTR_BIT
/ HOST_CHAR_BIT
];
316 int saved_pc_offset
= SIGCONTEXT_PC_OFFSET
;
319 /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext
320 as the third parameter. The offset to the saved pc is 12. */
321 find_pc_partial_function (frame
->pc
, &name
,
322 (CORE_ADDR
*)NULL
,(CORE_ADDR
*)NULL
);
323 if (name
&& STREQ (name
, "ucbsigvechandler"))
324 saved_pc_offset
= 12;
326 /* The sigcontext address is contained in register O2. */
327 get_saved_register (buf
, (int *)NULL
, (CORE_ADDR
*)NULL
,
328 frame
, O0_REGNUM
+ 2, (enum lval_type
*)NULL
);
329 sigcontext_addr
= extract_address (buf
, REGISTER_RAW_SIZE (O0_REGNUM
+ 2));
331 /* Don't cause a memory_error when accessing sigcontext in case the
332 stack layout has changed or the stack is corrupt. */
333 target_read_memory (sigcontext_addr
+ saved_pc_offset
,
334 scbuf
, sizeof (scbuf
));
335 return extract_address (scbuf
, sizeof (scbuf
));
338 addr
= frame
->pc_addr
;
340 addr
= frame
->bottom
+ FRAME_SAVED_I0
+
341 SPARC_INTREG_SIZE
* (I7_REGNUM
- I0_REGNUM
);
344 /* A flat frame leaf function might not save the PC anywhere,
345 just leave it in %o7. */
346 return PC_ADJUST (read_register (O7_REGNUM
));
348 read_memory (addr
, buf
, SPARC_INTREG_SIZE
);
349 return PC_ADJUST (extract_address (buf
, SPARC_INTREG_SIZE
));
352 /* Since an individual frame in the frame cache is defined by two
353 arguments (a frame pointer and a stack pointer), we need two
354 arguments to get info for an arbitrary stack frame. This routine
355 takes two arguments and makes the cached frames look as if these
356 two arguments defined a frame on the cache. This allows the rest
357 of info frame to extract the important arguments without
361 setup_arbitrary_frame (argc
, argv
)
365 struct frame_info
*frame
;
368 error ("Sparc frame specifications require two arguments: fp and sp");
370 frame
= create_new_frame (argv
[0], 0);
373 fatal ("internal: create_new_frame returned invalid frame");
375 frame
->bottom
= argv
[1];
376 frame
->pc
= FRAME_SAVED_PC (frame
);
380 /* Given a pc value, skip it forward past the function prologue by
381 disassembling instructions that appear to be a prologue.
383 If FRAMELESS_P is set, we are only testing to see if the function
384 is frameless. This allows a quicker answer.
386 This routine should be more specific in its actions; making sure
387 that it uses the same register in the initial prologue section. */
389 static CORE_ADDR examine_prologue
PARAMS ((CORE_ADDR
, int, struct frame_info
*,
390 struct frame_saved_regs
*));
393 examine_prologue (start_pc
, frameless_p
, fi
, saved_regs
)
396 struct frame_info
*fi
;
397 struct frame_saved_regs
*saved_regs
;
401 CORE_ADDR pc
= start_pc
;
404 insn
= read_memory_integer (pc
, 4);
406 /* Recognize the `sethi' insn and record its destination. */
407 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 4)
411 insn
= read_memory_integer (pc
, 4);
414 /* Recognize an add immediate value to register to either %g1 or
415 the destination register recorded above. Actually, this might
416 well recognize several different arithmetic operations.
417 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
418 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
419 I imagine any compiler really does that, however). */
422 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
425 insn
= read_memory_integer (pc
, 4);
428 /* Recognize any SAVE insn. */
429 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 60)
432 if (frameless_p
) /* If the save is all we care about, */
433 return pc
; /* return before doing more work */
434 insn
= read_memory_integer (pc
, 4);
436 /* Recognize add to %sp. */
437 else if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0)
440 if (frameless_p
) /* If the add is all we care about, */
441 return pc
; /* return before doing more work */
443 insn
= read_memory_integer (pc
, 4);
444 /* Recognize store of frame pointer (i7). */
448 && X_RS1 (insn
) == 14)
451 insn
= read_memory_integer (pc
, 4);
453 /* Recognize sub %sp, <anything>, %i7. */
456 && X_RS1 (insn
) == 14
457 && X_RD (insn
) == 31)
460 insn
= read_memory_integer (pc
, 4);
469 /* Without a save or add instruction, it's not a prologue. */
474 /* Recognize stores into the frame from the input registers.
475 This recognizes all non alternate stores of input register,
476 into a location offset from the frame pointer. */
477 if ((X_OP (insn
) == 3
478 && (X_OP3 (insn
) & 0x3c) == 4 /* Store, non-alternate. */
479 && (X_RD (insn
) & 0x18) == 0x18 /* Input register. */
480 && X_I (insn
) /* Immediate mode. */
481 && X_RS1 (insn
) == 30 /* Off of frame pointer. */
482 /* Into reserved stack space. */
483 && X_SIMM13 (insn
) >= 0x44
484 && X_SIMM13 (insn
) < 0x5b))
489 && X_RS1 (insn
) == 14
492 if (saved_regs
&& X_I (insn
))
493 saved_regs
->regs
[X_RD (insn
)] =
494 fi
->frame
+ fi
->sp_offset
+ X_SIMM13 (insn
);
499 insn
= read_memory_integer (pc
, 4);
506 skip_prologue (start_pc
, frameless_p
)
510 return examine_prologue (start_pc
, frameless_p
, NULL
, NULL
);
513 /* Check instruction at ADDR to see if it is a branch.
514 All non-annulled instructions will go to NPC or will trap.
515 Set *TARGET if we find a candidate branch; set to zero if not.
517 This isn't static as it's used by remote-sa.sparc.c. */
520 isbranch (instruction
, addr
, target
)
522 CORE_ADDR addr
, *target
;
524 branch_type val
= not_branch
;
525 long int offset
; /* Must be signed for sign-extend. */
529 if (X_OP (instruction
) == 0
530 && (X_OP2 (instruction
) == 2
531 || X_OP2 (instruction
) == 6
532 #ifdef GDB_TARGET_IS_SPARC64
533 || X_OP2 (instruction
) == 1
534 || X_OP2 (instruction
) == 3
535 || X_OP2 (instruction
) == 5
537 || X_OP2 (instruction
) == 7
541 if (X_COND (instruction
) == 8)
542 val
= X_A (instruction
) ? baa
: ba
;
544 val
= X_A (instruction
) ? bicca
: bicc
;
545 switch (X_OP2 (instruction
))
549 #ifndef GDB_TARGET_IS_SPARC64
552 offset
= 4 * X_DISP22 (instruction
);
554 #ifdef GDB_TARGET_IS_SPARC64
557 offset
= 4 * X_DISP19 (instruction
);
560 offset
= 4 * X_DISP16 (instruction
);
564 *target
= addr
+ offset
;
566 #ifdef GDB_TARGET_IS_SPARC64
567 else if (X_OP (instruction
) == 2
568 && X_OP3 (instruction
) == 62)
570 if (X_FCN (instruction
) == 0)
573 *target
= read_register (TNPC_REGNUM
);
576 else if (X_FCN (instruction
) == 1)
579 *target
= read_register (TPC_REGNUM
);
588 /* Find register number REGNUM relative to FRAME and put its
589 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
590 was optimized out (and thus can't be fetched). If the variable
591 was fetched from memory, set *ADDRP to where it was fetched from,
592 otherwise it was fetched from a register.
594 The argument RAW_BUFFER must point to aligned memory. */
597 get_saved_register (raw_buffer
, optimized
, addrp
, frame
, regnum
, lval
)
601 struct frame_info
*frame
;
603 enum lval_type
*lval
;
605 struct frame_info
*frame1
;
608 if (!target_has_registers
)
609 error ("No registers.");
616 /* FIXME This code extracted from infcmd.c; should put elsewhere! */
619 /* error ("No selected frame."); */
620 if (!target_has_registers
)
621 error ("The program has no registers now.");
622 if (selected_frame
== NULL
)
623 error ("No selected frame.");
624 /* Try to use selected frame */
625 frame
= get_prev_frame (selected_frame
);
627 error ("Cmd not meaningful in the outermost frame.");
631 frame1
= frame
->next
;
632 while (frame1
!= NULL
)
634 if (frame1
->pc
>= (frame1
->bottom
? frame1
->bottom
:
635 read_register (SP_REGNUM
))
636 && frame1
->pc
<= FRAME_FP (frame1
))
638 /* Dummy frame. All but the window regs are in there somewhere.
639 The window registers are saved on the stack, just like in a
641 if (regnum
>= G1_REGNUM
&& regnum
< G1_REGNUM
+ 7)
642 addr
= frame1
->frame
+ (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
643 - (FP_REGISTER_BYTES
+ 8 * SPARC_INTREG_SIZE
);
644 else if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
645 addr
= (frame1
->prev
->bottom
646 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
648 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
649 addr
= (frame1
->prev
->bottom
650 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
652 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
653 addr
= frame1
->frame
+ (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
654 - (FP_REGISTER_BYTES
+ 16 * SPARC_INTREG_SIZE
);
656 else if (regnum
>= FP0_REGNUM
&& regnum
< FP0_REGNUM
+ 32)
657 addr
= frame1
->frame
+ (regnum
- FP0_REGNUM
) * 4
658 - (FP_REGISTER_BYTES
);
659 #ifdef GDB_TARGET_IS_SPARC64
660 else if (regnum
>= FP0_REGNUM
+ 32 && regnum
< FP_MAX_REGNUM
)
661 addr
= frame1
->frame
+ 32 * 4 + (regnum
- FP0_REGNUM
- 32) * 8
662 - (FP_REGISTER_BYTES
);
664 #endif /* FP0_REGNUM */
665 else if (regnum
>= Y_REGNUM
&& regnum
< NUM_REGS
)
666 addr
= frame1
->frame
+ (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
667 - (FP_REGISTER_BYTES
+ 24 * SPARC_INTREG_SIZE
);
669 else if (frame1
->flat
)
672 if (regnum
== RP_REGNUM
)
673 addr
= frame1
->pc_addr
;
674 else if (regnum
== I7_REGNUM
)
675 addr
= frame1
->fp_addr
;
678 CORE_ADDR func_start
;
679 struct frame_saved_regs regs
;
680 memset (®s
, 0, sizeof (regs
));
682 find_pc_partial_function (frame1
->pc
, NULL
, &func_start
, NULL
);
683 examine_prologue (func_start
, 0, frame1
, ®s
);
684 addr
= regs
.regs
[regnum
];
689 /* Normal frame. Local and In registers are saved on stack. */
690 if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
691 addr
= (frame1
->prev
->bottom
692 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
694 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
695 addr
= (frame1
->prev
->bottom
696 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
698 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
700 /* Outs become ins. */
701 get_saved_register (raw_buffer
, optimized
, addrp
, frame1
,
702 (regnum
- O0_REGNUM
+ I0_REGNUM
), lval
);
708 frame1
= frame1
->next
;
714 if (regnum
== SP_REGNUM
)
716 if (raw_buffer
!= NULL
)
718 /* Put it back in target format. */
719 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), addr
);
725 if (raw_buffer
!= NULL
)
726 read_memory (addr
, raw_buffer
, REGISTER_RAW_SIZE (regnum
));
731 *lval
= lval_register
;
732 addr
= REGISTER_BYTE (regnum
);
733 if (raw_buffer
!= NULL
)
734 read_register_gen (regnum
, raw_buffer
);
740 /* Push an empty stack frame, and record in it the current PC, regs, etc.
742 We save the non-windowed registers and the ins. The locals and outs
743 are new; they don't need to be saved. The i's and l's of
744 the last frame were already saved on the stack. */
746 /* Definitely see tm-sparc.h for more doc of the frame format here. */
748 #ifdef GDB_TARGET_IS_SPARC64
749 #define DUMMY_REG_SAVE_OFFSET (128 + 16)
751 #define DUMMY_REG_SAVE_OFFSET 0x60
754 /* See tm-sparc.h for how this is calculated. */
756 #define DUMMY_STACK_REG_BUF_SIZE \
757 (((8+8+8) * SPARC_INTREG_SIZE) + (32 * REGISTER_RAW_SIZE (FP0_REGNUM)))
759 #define DUMMY_STACK_REG_BUF_SIZE \
760 (((8+8+8) * SPARC_INTREG_SIZE) )
761 #endif /* FP0_REGNUM */
762 #define DUMMY_STACK_SIZE (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET)
765 sparc_push_dummy_frame ()
767 CORE_ADDR sp
, old_sp
;
768 char register_temp
[DUMMY_STACK_SIZE
];
770 old_sp
= sp
= read_register (SP_REGNUM
);
772 #ifdef GDB_TARGET_IS_SPARC64
773 /* FIXME: not sure what needs to be saved here. */
775 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
776 read_register_bytes (REGISTER_BYTE (Y_REGNUM
), ®ister_temp
[0],
777 REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
780 read_register_bytes (REGISTER_BYTE (O0_REGNUM
),
781 ®ister_temp
[8 * SPARC_INTREG_SIZE
],
782 SPARC_INTREG_SIZE
* 8);
784 read_register_bytes (REGISTER_BYTE (G0_REGNUM
),
785 ®ister_temp
[16 * SPARC_INTREG_SIZE
],
786 SPARC_INTREG_SIZE
* 8);
789 read_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
790 ®ister_temp
[24 * SPARC_INTREG_SIZE
],
792 #endif /* FP0_REGNUM */
794 sp
-= DUMMY_STACK_SIZE
;
796 write_register (SP_REGNUM
, sp
);
798 write_memory (sp
+ DUMMY_REG_SAVE_OFFSET
, ®ister_temp
[0],
799 DUMMY_STACK_REG_BUF_SIZE
);
801 write_register (FP_REGNUM
, old_sp
);
803 /* Set return address register for the call dummy to the current PC. */
804 write_register (I7_REGNUM
, read_pc() - 8);
807 /* sparc_frame_find_saved_regs (). This function is here only because
808 pop_frame uses it. Note there is an interesting corner case which
809 I think few ports of GDB get right--if you are popping a frame
810 which does not save some register that *is* saved by a more inner
811 frame (such a frame will never be a dummy frame because dummy
812 frames save all registers). Rewriting pop_frame to use
813 get_saved_register would solve this problem and also get rid of the
814 ugly duplication between sparc_frame_find_saved_regs and
817 Stores, into a struct frame_saved_regs,
818 the addresses of the saved registers of frame described by FRAME_INFO.
819 This includes special registers such as pc and fp saved in special
820 ways in the stack frame. sp is even more special:
821 the address we return for it IS the sp for the next frame.
823 Note that on register window machines, we are currently making the
824 assumption that window registers are being saved somewhere in the
825 frame in which they are being used. If they are stored in an
826 inferior frame, find_saved_register will break.
828 On the Sun 4, the only time all registers are saved is when
829 a dummy frame is involved. Otherwise, the only saved registers
830 are the LOCAL and IN registers which are saved as a result
831 of the "save/restore" opcodes. This condition is determined
832 by address rather than by value.
834 The "pc" is not stored in a frame on the SPARC. (What is stored
835 is a return address minus 8.) sparc_pop_frame knows how to
836 deal with that. Other routines might or might not.
838 See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information
839 about how this works. */
841 static void sparc_frame_find_saved_regs
PARAMS ((struct frame_info
*,
842 struct frame_saved_regs
*));
845 sparc_frame_find_saved_regs (fi
, saved_regs_addr
)
846 struct frame_info
*fi
;
847 struct frame_saved_regs
*saved_regs_addr
;
850 CORE_ADDR frame_addr
= FRAME_FP (fi
);
853 fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS");
855 memset (saved_regs_addr
, 0, sizeof (*saved_regs_addr
));
857 if (fi
->pc
>= (fi
->bottom
? fi
->bottom
:
858 read_register (SP_REGNUM
))
859 && fi
->pc
<= FRAME_FP(fi
))
861 /* Dummy frame. All but the window regs are in there somewhere. */
862 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+7; regnum
++)
863 saved_regs_addr
->regs
[regnum
] =
864 frame_addr
+ (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
865 - (FP_REGISTER_BYTES
+ 8 * SPARC_INTREG_SIZE
);
866 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+8; regnum
++)
867 saved_regs_addr
->regs
[regnum
] =
868 frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
869 - (FP_REGISTER_BYTES
+ 16 * SPARC_INTREG_SIZE
);
871 for (regnum
= FP0_REGNUM
; regnum
< FP0_REGNUM
+ 32; regnum
++)
872 saved_regs_addr
->regs
[regnum
] =
873 frame_addr
+ (regnum
- FP0_REGNUM
) * 4
874 - (FP_REGISTER_BYTES
);
875 #ifdef GDB_TARGET_IS_SPARC64
876 for (regnum
= FP0_REGNUM
+ 32; regnum
< FP_MAX_REGNUM
; regnum
++)
877 saved_regs_addr
->regs
[regnum
] =
878 frame_addr
+ 32 * 4 + (regnum
- FP0_REGNUM
- 32) * 8
879 - (FP_REGISTER_BYTES
);
881 #endif /* FP0_REGNUM */
882 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
883 saved_regs_addr
->regs
[regnum
] =
884 frame_addr
+ (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
- 0xe0;
885 - (FP_REGISTER_BYTES
+ 24 * SPARC_INTREG_SIZE
);
886 frame_addr
= fi
->bottom
?
887 fi
->bottom
: read_register (SP_REGNUM
);
891 CORE_ADDR func_start
;
892 find_pc_partial_function (fi
->pc
, NULL
, &func_start
, NULL
);
893 examine_prologue (func_start
, 0, fi
, saved_regs_addr
);
895 /* Flat register window frame. */
896 saved_regs_addr
->regs
[RP_REGNUM
] = fi
->pc_addr
;
897 saved_regs_addr
->regs
[I7_REGNUM
] = fi
->fp_addr
;
901 /* Normal frame. Just Local and In registers */
902 frame_addr
= fi
->bottom
?
903 fi
->bottom
: read_register (SP_REGNUM
);
904 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+8; regnum
++)
905 saved_regs_addr
->regs
[regnum
] =
906 (frame_addr
+ (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
908 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+8; regnum
++)
909 saved_regs_addr
->regs
[regnum
] =
910 (frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
917 saved_regs_addr
->regs
[O7_REGNUM
] = fi
->pc_addr
;
921 /* Pull off either the next frame pointer or the stack pointer */
922 CORE_ADDR next_next_frame_addr
=
925 read_register (SP_REGNUM
));
926 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+8; regnum
++)
927 saved_regs_addr
->regs
[regnum
] =
928 (next_next_frame_addr
929 + (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
933 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
934 saved_regs_addr
->regs
[SP_REGNUM
] = FRAME_FP (fi
);
937 /* Discard from the stack the innermost frame, restoring all saved registers.
939 Note that the values stored in fsr by get_frame_saved_regs are *in
940 the context of the called frame*. What this means is that the i
941 regs of fsr must be restored into the o regs of the (calling) frame that
942 we pop into. We don't care about the output regs of the calling frame,
943 since unless it's a dummy frame, it won't have any output regs in it.
945 We never have to bother with %l (local) regs, since the called routine's
946 locals get tossed, and the calling routine's locals are already saved
949 /* Definitely see tm-sparc.h for more doc of the frame format here. */
954 register struct frame_info
*frame
= get_current_frame ();
955 register CORE_ADDR pc
;
956 struct frame_saved_regs fsr
;
957 char raw_buffer
[REGISTER_BYTES
];
960 sparc_frame_find_saved_regs (frame
, &fsr
);
962 if (fsr
.regs
[FP0_REGNUM
])
964 read_memory (fsr
.regs
[FP0_REGNUM
], raw_buffer
, FP_REGISTER_BYTES
);
965 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
966 raw_buffer
, FP_REGISTER_BYTES
);
968 #ifndef GDB_TARGET_IS_SPARC64
969 if (fsr
.regs
[FPS_REGNUM
])
971 read_memory (fsr
.regs
[FPS_REGNUM
], raw_buffer
, 4);
972 write_register_bytes (REGISTER_BYTE (FPS_REGNUM
), raw_buffer
, 4);
974 if (fsr
.regs
[CPS_REGNUM
])
976 read_memory (fsr
.regs
[CPS_REGNUM
], raw_buffer
, 4);
977 write_register_bytes (REGISTER_BYTE (CPS_REGNUM
), raw_buffer
, 4);
980 #endif /* FP0_REGNUM */
981 if (fsr
.regs
[G1_REGNUM
])
983 read_memory (fsr
.regs
[G1_REGNUM
], raw_buffer
, 7 * SPARC_INTREG_SIZE
);
984 write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
,
985 7 * SPARC_INTREG_SIZE
);
990 /* Each register might or might not have been saved, need to test
992 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; ++regnum
)
993 if (fsr
.regs
[regnum
])
994 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
],
996 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; ++regnum
)
997 if (fsr
.regs
[regnum
])
998 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
],
1001 /* Handle all outs except stack pointer (o0-o5; o7). */
1002 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 6; ++regnum
)
1003 if (fsr
.regs
[regnum
])
1004 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
],
1005 SPARC_INTREG_SIZE
));
1006 if (fsr
.regs
[O0_REGNUM
+ 7])
1007 write_register (O0_REGNUM
+ 7,
1008 read_memory_integer (fsr
.regs
[O0_REGNUM
+ 7],
1009 SPARC_INTREG_SIZE
));
1011 write_register (SP_REGNUM
, frame
->frame
);
1013 else if (fsr
.regs
[I0_REGNUM
])
1017 char reg_temp
[REGISTER_BYTES
];
1019 read_memory (fsr
.regs
[I0_REGNUM
], raw_buffer
, 8 * SPARC_INTREG_SIZE
);
1021 /* Get the ins and locals which we are about to restore. Just
1022 moving the stack pointer is all that is really needed, except
1023 store_inferior_registers is then going to write the ins and
1024 locals from the registers array, so we need to muck with the
1026 sp
= fsr
.regs
[SP_REGNUM
];
1027 read_memory (sp
, reg_temp
, SPARC_INTREG_SIZE
* 16);
1029 /* Restore the out registers.
1030 Among other things this writes the new stack pointer. */
1031 write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
,
1032 SPARC_INTREG_SIZE
* 8);
1034 write_register_bytes (REGISTER_BYTE (L0_REGNUM
), reg_temp
,
1035 SPARC_INTREG_SIZE
* 16);
1037 #ifndef GDB_TARGET_IS_SPARC64
1038 if (fsr
.regs
[PS_REGNUM
])
1039 write_register (PS_REGNUM
, read_memory_integer (fsr
.regs
[PS_REGNUM
], 4));
1041 if (fsr
.regs
[Y_REGNUM
])
1042 write_register (Y_REGNUM
, read_memory_integer (fsr
.regs
[Y_REGNUM
], REGISTER_RAW_SIZE (Y_REGNUM
)));
1043 if (fsr
.regs
[PC_REGNUM
])
1045 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
1046 write_register (PC_REGNUM
, read_memory_integer (fsr
.regs
[PC_REGNUM
],
1047 REGISTER_RAW_SIZE (PC_REGNUM
)));
1048 if (fsr
.regs
[NPC_REGNUM
])
1049 write_register (NPC_REGNUM
,
1050 read_memory_integer (fsr
.regs
[NPC_REGNUM
],
1051 REGISTER_RAW_SIZE (NPC_REGNUM
)));
1053 else if (frame
->flat
)
1056 pc
= PC_ADJUST ((CORE_ADDR
)
1057 read_memory_integer (frame
->pc_addr
,
1058 REGISTER_RAW_SIZE (PC_REGNUM
)));
1061 /* I think this happens only in the innermost frame, if so then
1062 it is a complicated way of saying
1063 "pc = read_register (O7_REGNUM);". */
1064 char buf
[MAX_REGISTER_RAW_SIZE
];
1065 get_saved_register (buf
, 0, 0, frame
, O7_REGNUM
, 0);
1066 pc
= PC_ADJUST (extract_address
1067 (buf
, REGISTER_RAW_SIZE (O7_REGNUM
)));
1070 write_register (PC_REGNUM
, pc
);
1071 write_register (NPC_REGNUM
, pc
+ 4);
1073 else if (fsr
.regs
[I7_REGNUM
])
1075 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
1076 pc
= PC_ADJUST ((CORE_ADDR
) read_memory_integer (fsr
.regs
[I7_REGNUM
],
1077 SPARC_INTREG_SIZE
));
1078 write_register (PC_REGNUM
, pc
);
1079 write_register (NPC_REGNUM
, pc
+ 4);
1081 flush_cached_frames ();
1084 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
1085 encodes the structure size being returned. If we detect such
1086 a fake insn, step past it. */
1096 err
= target_read_memory (pc
+ 8, buf
, sizeof(long));
1097 insn
= extract_unsigned_integer (buf
, 4);
1098 if ((err
== 0) && (insn
& 0xffc00000) == 0)
1104 /* If pc is in a shared library trampoline, return its target.
1105 The SunOs 4.x linker rewrites the jump table entries for PIC
1106 compiled modules in the main executable to bypass the dynamic linker
1107 with jumps of the form
1110 and removes the corresponding jump table relocation entry in the
1111 dynamic relocations.
1112 find_solib_trampoline_target relies on the presence of the jump
1113 table relocation entry, so we have to detect these jump instructions
1117 sunos4_skip_trampoline_code (pc
)
1120 unsigned long insn1
;
1124 err
= target_read_memory (pc
, buf
, 4);
1125 insn1
= extract_unsigned_integer (buf
, 4);
1126 if (err
== 0 && (insn1
& 0xffc00000) == 0x03000000)
1128 unsigned long insn2
;
1130 err
= target_read_memory (pc
+ 4, buf
, 4);
1131 insn2
= extract_unsigned_integer (buf
, 4);
1132 if (err
== 0 && (insn2
& 0xffffe000) == 0x81c06000)
1134 CORE_ADDR target_pc
= (insn1
& 0x3fffff) << 10;
1135 int delta
= insn2
& 0x1fff;
1137 /* Sign extend the displacement. */
1140 return target_pc
+ delta
;
1143 return find_solib_trampoline_target (pc
);
1146 #ifdef USE_PROC_FS /* Target dependent support for /proc */
1148 /* The /proc interface divides the target machine's register set up into
1149 two different sets, the general register set (gregset) and the floating
1150 point register set (fpregset). For each set, there is an ioctl to get
1151 the current register set and another ioctl to set the current values.
1153 The actual structure passed through the ioctl interface is, of course,
1154 naturally machine dependent, and is different for each set of registers.
1155 For the sparc for example, the general register set is typically defined
1158 typedef int gregset_t[38];
1164 and the floating point set by:
1166 typedef struct prfpregset {
1169 double pr_dregs[16];
1174 u_char pr_q_entrysize;
1179 These routines provide the packing and unpacking of gregset_t and
1180 fpregset_t formatted data.
1184 /* Given a pointer to a general register set in /proc format (gregset_t *),
1185 unpack the register contents and supply them as gdb's idea of the current
1189 supply_gregset (gregsetp
)
1190 prgregset_t
*gregsetp
;
1193 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1194 static char zerobuf
[MAX_REGISTER_RAW_SIZE
] = {0};
1196 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
1197 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
1199 supply_register (regi
, (char *) (regp
+ regi
));
1202 /* These require a bit more care. */
1203 supply_register (PS_REGNUM
, (char *) (regp
+ R_PS
));
1204 supply_register (PC_REGNUM
, (char *) (regp
+ R_PC
));
1205 supply_register (NPC_REGNUM
,(char *) (regp
+ R_nPC
));
1206 supply_register (Y_REGNUM
, (char *) (regp
+ R_Y
));
1208 /* Fill inaccessible registers with zero. */
1209 supply_register (WIM_REGNUM
, zerobuf
);
1210 supply_register (TBR_REGNUM
, zerobuf
);
1211 supply_register (CPS_REGNUM
, zerobuf
);
1215 fill_gregset (gregsetp
, regno
)
1216 prgregset_t
*gregsetp
;
1220 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1222 for (regi
= 0 ; regi
<= R_I7
; regi
++)
1224 if ((regno
== -1) || (regno
== regi
))
1226 *(regp
+ regi
) = *(int *) ®isters
[REGISTER_BYTE (regi
)];
1229 if ((regno
== -1) || (regno
== PS_REGNUM
))
1231 *(regp
+ R_PS
) = *(int *) ®isters
[REGISTER_BYTE (PS_REGNUM
)];
1233 if ((regno
== -1) || (regno
== PC_REGNUM
))
1235 *(regp
+ R_PC
) = *(int *) ®isters
[REGISTER_BYTE (PC_REGNUM
)];
1237 if ((regno
== -1) || (regno
== NPC_REGNUM
))
1239 *(regp
+ R_nPC
) = *(int *) ®isters
[REGISTER_BYTE (NPC_REGNUM
)];
1241 if ((regno
== -1) || (regno
== Y_REGNUM
))
1243 *(regp
+ R_Y
) = *(int *) ®isters
[REGISTER_BYTE (Y_REGNUM
)];
1247 #if defined (FP0_REGNUM)
1249 /* Given a pointer to a floating point register set in /proc format
1250 (fpregset_t *), unpack the register contents and supply them as gdb's
1251 idea of the current floating point register values. */
1254 supply_fpregset (fpregsetp
)
1255 prfpregset_t
*fpregsetp
;
1260 for (regi
= FP0_REGNUM
; regi
< FP_MAX_REGNUM
; regi
++)
1262 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
1263 supply_register (regi
, from
);
1265 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
1268 /* Given a pointer to a floating point register set in /proc format
1269 (fpregset_t *), update the register specified by REGNO from gdb's idea
1270 of the current floating point register set. If REGNO is -1, update
1272 /* ??? This will probably need some changes for sparc64. */
1275 fill_fpregset (fpregsetp
, regno
)
1276 prfpregset_t
*fpregsetp
;
1283 for (regi
= FP0_REGNUM
; regi
< FP_MAX_REGNUM
; regi
++)
1285 if ((regno
== -1) || (regno
== regi
))
1287 from
= (char *) ®isters
[REGISTER_BYTE (regi
)];
1288 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
1289 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
1292 if ((regno
== -1) || (regno
== FPS_REGNUM
))
1294 fpregsetp
->pr_fsr
= *(int *) ®isters
[REGISTER_BYTE (FPS_REGNUM
)];
1298 #endif /* defined (FP0_REGNUM) */
1300 #endif /* USE_PROC_FS */
1303 #ifdef GET_LONGJMP_TARGET
1305 /* Figure out where the longjmp will land. We expect that we have just entered
1306 longjmp and haven't yet setup the stack frame, so the args are still in the
1307 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
1308 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
1309 This routine returns true on success */
1312 get_longjmp_target (pc
)
1316 #define LONGJMP_TARGET_SIZE 4
1317 char buf
[LONGJMP_TARGET_SIZE
];
1319 jb_addr
= read_register (O0_REGNUM
);
1321 if (target_read_memory (jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, buf
,
1322 LONGJMP_TARGET_SIZE
))
1325 *pc
= extract_address (buf
, LONGJMP_TARGET_SIZE
);
1329 #endif /* GET_LONGJMP_TARGET */
1331 #ifdef STATIC_TRANSFORM_NAME
1332 /* SunPRO (3.0 at least), encodes the static variables. This is not
1333 related to C++ mangling, it is done for C too. */
1336 sunpro_static_transform_name (name
)
1342 /* For file-local statics there will be a dollar sign, a bunch
1343 of junk (the contents of which match a string given in the
1344 N_OPT), a period and the name. For function-local statics
1345 there will be a bunch of junk (which seems to change the
1346 second character from 'A' to 'B'), a period, the name of the
1347 function, and the name. So just skip everything before the
1349 p
= strrchr (name
, '.');
1355 #endif /* STATIC_TRANSFORM_NAME */
1357 #ifdef GDB_TARGET_IS_SPARC64
1359 /* Utilities for printing registers.
1360 Page numbers refer to the SPARC Architecture Manual. */
1362 static void dump_ccreg
PARAMS ((char *, int));
1365 dump_ccreg (reg
, val
)
1370 printf_unfiltered ("%s:%s,%s,%s,%s", reg
,
1371 val
& 8 ? "N" : "NN",
1372 val
& 4 ? "Z" : "NZ",
1373 val
& 2 ? "O" : "NO",
1374 val
& 1 ? "C" : "NC"
1385 case 4 : return "ASI_NUCLEUS";
1386 case 0x0c : return "ASI_NUCLEUS_LITTLE";
1387 case 0x10 : return "ASI_AS_IF_USER_PRIMARY";
1388 case 0x11 : return "ASI_AS_IF_USER_SECONDARY";
1389 case 0x18 : return "ASI_AS_IF_USER_PRIMARY_LITTLE";
1390 case 0x19 : return "ASI_AS_IF_USER_SECONDARY_LITTLE";
1391 case 0x80 : return "ASI_PRIMARY";
1392 case 0x81 : return "ASI_SECONDARY";
1393 case 0x82 : return "ASI_PRIMARY_NOFAULT";
1394 case 0x83 : return "ASI_SECONDARY_NOFAULT";
1395 case 0x88 : return "ASI_PRIMARY_LITTLE";
1396 case 0x89 : return "ASI_SECONDARY_LITTLE";
1397 case 0x8a : return "ASI_PRIMARY_NOFAULT_LITTLE";
1398 case 0x8b : return "ASI_SECONDARY_NOFAULT_LITTLE";
1399 default : return NULL
;
1403 /* PRINT_REGISTER_HOOK routine.
1404 Pretty print various registers. */
1405 /* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */
1408 sparc_print_register_hook (regno
)
1411 unsigned LONGEST val
;
1413 /* Handle double/quad versions of lower 32 fp regs. */
1414 if (regno
>= FP0_REGNUM
&& regno
< FP0_REGNUM
+ 32
1415 && (regno
& 1) == 0)
1419 if (!read_relative_register_raw_bytes (regno
, value
)
1420 && !read_relative_register_raw_bytes (regno
+ 1, value
+ 4))
1422 printf_unfiltered ("\t");
1423 print_floating (value
, builtin_type_double
, gdb_stdout
);
1425 #if 0 /* FIXME: gdb doesn't handle long doubles */
1426 if ((regno
& 3) == 0)
1428 if (!read_relative_register_raw_bytes (regno
+ 2, value
+ 8)
1429 && !read_relative_register_raw_bytes (regno
+ 3, value
+ 12))
1431 printf_unfiltered ("\t");
1432 print_floating (value
, builtin_type_long_double
, gdb_stdout
);
1439 #if 0 /* FIXME: gdb doesn't handle long doubles */
1440 /* Print upper fp regs as long double if appropriate. */
1441 if (regno
>= FP0_REGNUM
+ 32 && regno
< FP_MAX_REGNUM
1442 /* We test for even numbered regs and not a multiple of 4 because
1443 the upper fp regs are recorded as doubles. */
1444 && (regno
& 1) == 0)
1448 if (!read_relative_register_raw_bytes (regno
, value
)
1449 && !read_relative_register_raw_bytes (regno
+ 1, value
+ 8))
1451 printf_unfiltered ("\t");
1452 print_floating (value
, builtin_type_long_double
, gdb_stdout
);
1458 /* FIXME: Some of these are priviledged registers.
1459 Not sure how they should be handled. */
1461 #define BITS(n, mask) ((int) (((val) >> (n)) & (mask)))
1463 val
= read_register (regno
);
1469 printf_unfiltered("\t");
1470 dump_ccreg ("xcc", val
>> 4);
1471 printf_unfiltered(", ");
1472 dump_ccreg ("icc", val
& 15);
1475 printf ("\tfef:%d, du:%d, dl:%d",
1476 BITS (2, 1), BITS (1, 1), BITS (0, 1));
1480 static char *fcc
[4] = { "=", "<", ">", "?" };
1481 static char *rd
[4] = { "N", "0", "+", "-" };
1482 /* Long, yes, but I'd rather leave it as is and use a wide screen. */
1483 printf ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d",
1484 fcc
[BITS (10, 3)], fcc
[BITS (32, 3)],
1485 fcc
[BITS (34, 3)], fcc
[BITS (36, 3)],
1486 rd
[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7),
1487 BITS (14, 7), BITS (13, 1), BITS (5, 31), BITS (0, 31));
1492 char *asi
= decode_asi (val
);
1494 printf ("\t%s", asi
);
1498 printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d",
1499 BITS (48, 0xffff), BITS (32, 0xffff),
1500 BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31));
1502 case PSTATE_REGNUM
:
1504 static char *mm
[4] = { "tso", "pso", "rso", "?" };
1505 printf ("\tcle:%d, tle:%d, mm:%s, red:%d, pef:%d, am:%d, priv:%d, ie:%d, ag:%d",
1506 BITS (9, 1), BITS (8, 1), mm
[BITS (6, 3)], BITS (5, 1),
1507 BITS (4, 1), BITS (3, 1), BITS (2, 1), BITS (1, 1),
1511 case TSTATE_REGNUM
:
1512 /* FIXME: print all 4? */
1515 /* FIXME: print all 4? */
1518 /* FIXME: print all 4? */
1521 /* FIXME: print all 4? */
1523 case WSTATE_REGNUM
:
1524 printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7));
1527 printf ("\t%d", BITS (0, 31));
1529 case CANSAVE_REGNUM
:
1530 printf ("\t%-2d before spill", BITS (0, 31));
1532 case CANRESTORE_REGNUM
:
1533 printf ("\t%-2d before fill", BITS (0, 31));
1535 case CLEANWIN_REGNUM
:
1536 printf ("\t%-2d before clean", BITS (0, 31));
1538 case OTHERWIN_REGNUM
:
1539 printf ("\t%d", BITS (0, 31));
1549 _initialize_sparc_tdep ()
1551 tm_print_insn
= TM_PRINT_INSN
; /* Selects sparc/sparclite */