1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
25 #include "ieee-float.h"
27 #include "symfile.h" /* for objfiles.h */
28 #include "objfiles.h" /* for find_pc_section */
31 #include <sys/procfs.h>
37 extern int stop_after_trap
;
39 /* We don't store all registers immediately when requested, since they
40 get sent over in large chunks anyway. Instead, we accumulate most
41 of the changes and send them over once. "deferred_stores" keeps
42 track of which sets of registers we have locally-changed copies of,
43 so we only need send the groups that have changed. */
45 int deferred_stores
= 0; /* Cumulates stores we want to do eventually. */
49 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
52 /* Simulate single-step ptrace call for sun4. Code written by Gary
53 Beihl (beihl@mcc.com). */
55 /* npc4 and next_pc describe the situation at the time that the
56 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
57 static CORE_ADDR next_pc
, npc4
, target
;
58 static int brknpc4
, brktrg
;
59 typedef char binsn_quantum
[BREAKPOINT_MAX
];
60 static binsn_quantum break_mem
[3];
62 /* Non-zero if we just simulated a single-step ptrace call. This is
63 needed because we cannot remove the breakpoints in the inferior
64 process until after the `wait' in `wait_for_inferior'. Used for
69 /* single_step() is called just before we want to resume the inferior,
70 if we want to single-step it but there is no hardware or kernel single-step
71 support (as on all SPARCs). We find all the possible targets of the
72 coming instruction and breakpoint them.
74 single_step is also called just after the inferior stops. If we had
75 set up a simulated single-step, we undo our damage. */
79 int ignore
; /* pid, but we don't need it */
81 branch_type br
, isannulled();
87 /* Always set breakpoint for NPC. */
88 next_pc
= read_register (NPC_REGNUM
);
89 npc4
= next_pc
+ 4; /* branch not taken */
91 target_insert_breakpoint (next_pc
, break_mem
[0]);
92 /* printf ("set break at %x\n",next_pc); */
94 pc
= read_register (PC_REGNUM
);
95 pc_instruction
= read_memory_integer (pc
, sizeof(pc_instruction
));
96 br
= isannulled (pc_instruction
, pc
, &target
);
101 /* Conditional annulled branch will either end up at
102 npc (if taken) or at npc+4 (if not taken).
105 target_insert_breakpoint (npc4
, break_mem
[1]);
107 else if (br
== baa
&& target
!= next_pc
)
109 /* Unconditional annulled branch will always end up at
112 target_insert_breakpoint (target
, break_mem
[2]);
115 /* We are ready to let it go */
121 /* Remove breakpoints */
122 target_remove_breakpoint (next_pc
, break_mem
[0]);
125 target_remove_breakpoint (npc4
, break_mem
[1]);
128 target_remove_breakpoint (target
, break_mem
[2]);
134 #define FRAME_SAVED_L0 0 /* Byte offset from SP */
135 #define FRAME_SAVED_I0 32 /* Byte offset from SP */
138 sparc_frame_chain (thisframe
)
145 addr
= thisframe
->frame
+ FRAME_SAVED_I0
+
146 REGISTER_RAW_SIZE(FP_REGNUM
) * (FP_REGNUM
- I0_REGNUM
);
147 err
= target_read_memory (addr
, (char *) &retval
, sizeof (CORE_ADDR
));
150 SWAP_TARGET_AND_HOST (&retval
, sizeof (retval
));
155 sparc_extract_struct_value_address (regbuf
)
156 char regbuf
[REGISTER_BYTES
];
158 /* FIXME, handle byte swapping */
159 return read_memory_integer (((int *)(regbuf
))[SP_REGNUM
]+(16*4),
163 /* Find the pc saved in frame FRAME. */
166 frame_saved_pc (frame
)
171 if (get_current_frame () == frame
) /* FIXME, debug check. Remove >=gdb-4.6 */
173 if (read_register (SP_REGNUM
) != frame
->bottom
) abort();
176 read_memory ((CORE_ADDR
) (frame
->bottom
+ FRAME_SAVED_I0
+
177 REGISTER_RAW_SIZE(I7_REGNUM
) * (I7_REGNUM
- I0_REGNUM
)),
181 SWAP_TARGET_AND_HOST (&prev_pc
, sizeof (prev_pc
));
182 return PC_ADJUST (prev_pc
);
186 * Since an individual frame in the frame cache is defined by two
187 * arguments (a frame pointer and a stack pointer), we need two
188 * arguments to get info for an arbitrary stack frame. This routine
189 * takes two arguments and makes the cached frames look as if these
190 * two arguments defined a frame on the cache. This allows the rest
191 * of info frame to extract the important arguments without
195 setup_arbitrary_frame (argc
, argv
)
202 error ("Sparc frame specifications require two arguments: fp and sp");
204 fid
= create_new_frame (argv
[0], 0);
207 fatal ("internal: create_new_frame returned invalid frame id");
209 fid
->bottom
= argv
[1];
210 fid
->pc
= FRAME_SAVED_PC (fid
);
214 /* This code was written by Gary Beihl (beihl@mcc.com).
215 It was modified by Michael Tiemann (tiemann@corto.inria.fr). */
218 * This routine appears to be passed a size by which to increase the
219 * stack. It then executes a save instruction in the inferior to
220 * increase the stack by this amount. Only the register window system
221 * should be affected by this; the program counter & etc. will not be.
223 * This instructions used for this purpose are:
225 * sethi %hi(0x0),g1 *
228 * sethi %hi(0x0),g1 *
231 * sethi %hi(0x0),g0 (nop)
233 * I presume that these set g1 to be the negative of the size, do a
234 * save (putting the stack pointer at sp - size) and restore the
235 * original contents of g1. A * indicates that the actual value of
236 * the instruction is modified below.
238 static unsigned int save_insn_opcodes
[] = {
239 0x03000000, 0x82007ee0, 0x9de38001, 0x03000000,
240 0x82007ee0, 0x91d02001, 0x01000000 };
242 /* Neither do_save_insn or do_restore_insn save stack configuration
243 (current_frame, etc),
244 since the stack is in an indeterminate state through the call to
245 each of them. That is the responsibility of the routine which calls them. */
251 int g1
= read_register (G1_REGNUM
);
252 CORE_ADDR sp
= read_register (SP_REGNUM
);
253 CORE_ADDR pc
= read_register (PC_REGNUM
);
254 CORE_ADDR npc
= read_register (NPC_REGNUM
);
255 CORE_ADDR fake_pc
= sp
- sizeof (save_insn_opcodes
);
256 struct inferior_status inf_status
;
258 save_inferior_status (&inf_status
, 0); /* Don't restore stack info */
262 save_insn_opcodes
[0] = 0x03000000 | ((-size
>> 10) & 0x3fffff);
263 save_insn_opcodes
[1] = 0x82006000 | (-size
& 0x3ff);
264 save_insn_opcodes
[3] = 0x03000000 | ((g1
>> 10) & 0x3fffff);
265 save_insn_opcodes
[4] = 0x82006000 | (g1
& 0x3ff);
266 write_memory (fake_pc
, (char *)save_insn_opcodes
, sizeof (save_insn_opcodes
));
268 clear_proceed_status ();
270 proceed (fake_pc
, 0, 0);
272 write_register (PC_REGNUM
, pc
);
273 write_register (NPC_REGNUM
, npc
);
274 restore_inferior_status (&inf_status
);
278 * This routine takes a program counter value. It restores the
279 * register window system to the frame above the current one.
280 * THIS ROUTINE CLOBBERS PC AND NPC IN THE TARGET!
283 /* The following insns translate to:
289 static unsigned int restore_insn_opcodes
[] = {
290 0x81e80000, 0x91d02001, 0x01000000 };
295 CORE_ADDR sp
= read_register (SP_REGNUM
);
296 CORE_ADDR fake_pc
= sp
- sizeof (restore_insn_opcodes
);
297 struct inferior_status inf_status
;
299 save_inferior_status (&inf_status
, 0); /* Don't restore stack info */
301 write_memory (fake_pc
, (char *)restore_insn_opcodes
,
302 sizeof (restore_insn_opcodes
));
304 clear_proceed_status ();
306 proceed (fake_pc
, 0, 0);
308 restore_inferior_status (&inf_status
);
311 /* Given a pc value, skip it forward past the function prologue by
312 disassembling instructions that appear to be a prologue.
314 If FRAMELESS_P is set, we are only testing to see if the function
315 is frameless. This allows a quicker answer.
317 This routine should be more specific in its actions; making sure
318 that it uses the same register in the initial prologue section. */
320 skip_prologue (start_pc
, frameless_p
)
326 unsigned long int code
;
332 unsigned int imm22
:22;
341 unsigned int simm13
:13;
346 CORE_ADDR pc
= start_pc
;
348 x
.i
= read_memory_integer (pc
, 4);
350 /* Recognize the `sethi' insn and record its destination. */
351 if (x
.sethi
.op
== 0 && x
.sethi
.op2
== 4)
355 x
.i
= read_memory_integer (pc
, 4);
358 /* Recognize an add immediate value to register to either %g1 or
359 the destination register recorded above. Actually, this might
360 well recognize several different arithmetic operations.
361 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
362 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
363 I imagine any compiler really does that, however). */
364 if (x
.add
.op
== 2 && x
.add
.i
&& (x
.add
.rd
== 1 || x
.add
.rd
== dest
))
367 x
.i
= read_memory_integer (pc
, 4);
370 /* This recognizes any SAVE insn. But why do the XOR and then
371 the compare? That's identical to comparing against 60 (as long
372 as there isn't any sign extension). */
373 if (x
.add
.op
== 2 && (x
.add
.op3
^ 32) == 28)
376 if (frameless_p
) /* If the save is all we care about, */
377 return pc
; /* return before doing more work */
378 x
.i
= read_memory_integer (pc
, 4);
382 /* Without a save instruction, it's not a prologue. */
386 /* Now we need to recognize stores into the frame from the input
387 registers. This recognizes all non alternate stores of input
388 register, into a location offset from the frame pointer. */
390 && (x
.add
.op3
& 0x3c) == 4 /* Store, non-alternate. */
391 && (x
.add
.rd
& 0x18) == 0x18 /* Input register. */
392 && x
.add
.i
/* Immediate mode. */
393 && x
.add
.rs1
== 30 /* Off of frame pointer. */
394 /* Into reserved stack space. */
395 && x
.add
.simm13
>= 0x44
396 && x
.add
.simm13
< 0x5b)
399 x
.i
= read_memory_integer (pc
, 4);
404 /* Check instruction at ADDR to see if it is an annulled branch.
405 All other instructions will go to NPC or will trap.
406 Set *TARGET if we find a canidate branch; set to zero if not. */
409 isannulled (instruction
, addr
, target
)
411 CORE_ADDR addr
, *target
;
413 branch_type val
= not_branch
;
414 long int offset
; /* Must be signed for sign-extend. */
417 unsigned long int code
;
424 unsigned int disp22
:22;
429 insn
.code
= instruction
;
432 && (insn
.b
.op2
== 2 || insn
.b
.op2
== 6 || insn
.b
.op2
== 7))
434 if (insn
.b
.cond
== 8)
435 val
= insn
.b
.a
? baa
: ba
;
437 val
= insn
.b
.a
? bicca
: bicc
;
438 offset
= 4 * ((int) (insn
.b
.disp22
<< 10) >> 10);
439 *target
= addr
+ offset
;
445 /* sparc_frame_find_saved_regs ()
447 Stores, into a struct frame_saved_regs,
448 the addresses of the saved registers of frame described by FRAME_INFO.
449 This includes special registers such as pc and fp saved in special
450 ways in the stack frame. sp is even more special:
451 the address we return for it IS the sp for the next frame.
453 Note that on register window machines, we are currently making the
454 assumption that window registers are being saved somewhere in the
455 frame in which they are being used. If they are stored in an
456 inferior frame, find_saved_register will break.
458 On the Sun 4, the only time all registers are saved is when
459 a dummy frame is involved. Otherwise, the only saved registers
460 are the LOCAL and IN registers which are saved as a result
461 of the "save/restore" opcodes. This condition is determined
462 by address rather than by value.
464 The "pc" is not stored in a frame on the SPARC. (What is stored
465 is a return address minus 8.) sparc_pop_frame knows how to
466 deal with that. Other routines might or might not.
468 See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information
469 about how this works. */
472 sparc_frame_find_saved_regs (fi
, saved_regs_addr
)
473 struct frame_info
*fi
;
474 struct frame_saved_regs
*saved_regs_addr
;
477 FRAME_ADDR frame
= read_register (FP_REGNUM
);
478 FRAME fid
= FRAME_INFO_ID (fi
);
481 fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS");
483 memset (saved_regs_addr
, 0, sizeof (*saved_regs_addr
));
486 if (fi->pc >= frame - CALL_DUMMY_LENGTH - 0x140
487 && fi->pc <= frame) */
489 if (fi
->pc
>= (fi
->bottom
? fi
->bottom
:
490 read_register (SP_REGNUM
))
491 && fi
->pc
<= FRAME_FP(fi
))
493 /* Dummy frame. All but the window regs are in there somewhere. */
494 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+7; regnum
++)
495 saved_regs_addr
->regs
[regnum
] =
496 frame
+ (regnum
- G0_REGNUM
) * 4 - 0xa0;
497 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+8; regnum
++)
498 saved_regs_addr
->regs
[regnum
] =
499 frame
+ (regnum
- I0_REGNUM
) * 4 - 0xc0;
500 for (regnum
= FP0_REGNUM
; regnum
< FP0_REGNUM
+ 32; regnum
++)
501 saved_regs_addr
->regs
[regnum
] =
502 frame
+ (regnum
- FP0_REGNUM
) * 4 - 0x80;
503 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
504 saved_regs_addr
->regs
[regnum
] =
505 frame
+ (regnum
- Y_REGNUM
) * 4 - 0xe0;
507 fi
->bottom
: read_register (SP_REGNUM
);
511 /* Normal frame. Just Local and In registers */
513 fi
->bottom
: read_register (SP_REGNUM
);
514 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+16; regnum
++)
515 saved_regs_addr
->regs
[regnum
] = frame
+ (regnum
-L0_REGNUM
) * 4;
519 /* Pull off either the next frame pointer or the stack pointer */
520 FRAME_ADDR next_next_frame
=
523 read_register (SP_REGNUM
));
524 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+8; regnum
++)
525 saved_regs_addr
->regs
[regnum
] = next_next_frame
+ regnum
* 4;
527 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
528 saved_regs_addr
->regs
[SP_REGNUM
] = FRAME_FP (fi
);
531 /* Push an empty stack frame, and record in it the current PC, regs, etc.
533 Note that the write's are of registers in the context of the newly
534 pushed frame. Thus the the fp*'s, the g*'s, the i*'s, and
535 the randoms, of the new frame, are being saved. The locals and outs
536 are new; they don't need to be saved. The i's and l's of
537 the last frame were saved by the do_save_insn in the register
538 file (now on the stack, since a context switch happended imm after).
540 The return pointer register %i7 does not have
541 the pc saved into it (return from this frame will be accomplished
542 by a POP_FRAME). In fact, we must leave it unclobbered, since we
543 must preserve it in the calling routine except across call instructions. */
545 /* Definitely see tm-sparc.h for more doc of the frame format here. */
548 sparc_push_dummy_frame ()
551 char register_temp
[REGISTER_BYTES
];
553 do_save_insn (0x140); /* FIXME where does this value come from? */
554 fp
= read_register (FP_REGNUM
);
556 read_register_bytes (REGISTER_BYTE (FP0_REGNUM
), register_temp
, 32 * 4);
557 write_memory (fp
- 0x80, register_temp
, 32 * 4);
559 read_register_bytes (REGISTER_BYTE (G0_REGNUM
), register_temp
, 8 * 4);
560 write_memory (fp
- 0xa0, register_temp
, 8 * 4);
562 read_register_bytes (REGISTER_BYTE (I0_REGNUM
), register_temp
, 8 * 4);
563 write_memory (fp
- 0xc0, register_temp
, 8 * 4);
565 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
566 read_register_bytes (REGISTER_BYTE (Y_REGNUM
), register_temp
, 8 * 4);
567 write_memory (fp
- 0xe0, register_temp
, 8 * 4);
570 /* Discard from the stack the innermost frame, restoring all saved registers.
572 Note that the values stored in fsr by get_frame_saved_regs are *in
573 the context of the called frame*. What this means is that the i
574 regs of fsr must be restored into the o regs of the (calling) frame that
575 we pop into. We don't care about the output regs of the calling frame,
576 since unless it's a dummy frame, it won't have any output regs in it.
578 We never have to bother with %l (local) regs, since the called routine's
579 locals get tossed, and the calling routine's locals are already saved
582 /* Definitely see tm-sparc.h for more doc of the frame format here. */
587 register FRAME frame
= get_current_frame ();
588 register CORE_ADDR pc
;
589 struct frame_saved_regs fsr
;
590 struct frame_info
*fi
;
591 char raw_buffer
[REGISTER_BYTES
];
593 fi
= get_frame_info (frame
);
594 get_frame_saved_regs (fi
, &fsr
);
596 if (fsr
.regs
[FP0_REGNUM
])
598 read_memory (fsr
.regs
[FP0_REGNUM
], raw_buffer
, 32 * 4);
599 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
), raw_buffer
, 32 * 4);
601 if (fsr
.regs
[G1_REGNUM
])
603 read_memory (fsr
.regs
[G1_REGNUM
], raw_buffer
, 7 * 4);
604 write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
, 7 * 4);
606 if (fsr
.regs
[I0_REGNUM
])
608 read_memory (fsr
.regs
[I0_REGNUM
], raw_buffer
, 8 * 4);
609 write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
, 8 * 4);
611 if (fsr
.regs
[PS_REGNUM
])
612 write_register (PS_REGNUM
, read_memory_integer (fsr
.regs
[PS_REGNUM
], 4));
613 if (fsr
.regs
[Y_REGNUM
])
614 write_register (Y_REGNUM
, read_memory_integer (fsr
.regs
[Y_REGNUM
], 4));
615 if (fsr
.regs
[PC_REGNUM
])
617 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
618 write_register (PC_REGNUM
, read_memory_integer (fsr
.regs
[PC_REGNUM
], 4));
619 if (fsr
.regs
[NPC_REGNUM
])
620 write_register (NPC_REGNUM
,
621 read_memory_integer (fsr
.regs
[NPC_REGNUM
], 4));
623 else if (fsr
.regs
[I7_REGNUM
])
625 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
626 pc
= PC_ADJUST (read_memory_integer (fsr
.regs
[I7_REGNUM
], 4));
627 write_register (PC_REGNUM
, pc
);
628 write_register (NPC_REGNUM
, pc
+ 4);
630 flush_cached_frames ();
631 set_current_frame ( create_new_frame (read_register (FP_REGNUM
),
635 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
636 encodes the structure size being returned. If we detect such
637 a fake insn, step past it. */
646 err
= target_read_memory (pc
+ 8, (char *)&insn
, sizeof(long));
647 SWAP_TARGET_AND_HOST (&insn
, sizeof(long));
648 if ((err
== 0) && (insn
& 0xfffffe00) == 0)
655 /* Structure of SPARC extended floating point numbers.
656 This information is not currently used by GDB, since no current SPARC
657 implementations support extended float. */
659 const struct ext_format ext_format_sparc
= {
660 /* tot sbyte smask expbyte manbyte */
661 16, 0, 0x80, 0,1, 4,8, /* sparc */
664 #ifdef USE_PROC_FS /* Target dependent support for /proc */
666 /* The /proc interface divides the target machine's register set up into
667 two different sets, the general register set (gregset) and the floating
668 point register set (fpregset). For each set, there is an ioctl to get
669 the current register set and another ioctl to set the current values.
671 The actual structure passed through the ioctl interface is, of course,
672 naturally machine dependent, and is different for each set of registers.
673 For the sparc for example, the general register set is typically defined
676 typedef int gregset_t[38];
682 and the floating point set by:
684 typedef struct prfpregset {
692 u_char pr_q_entrysize;
697 These routines provide the packing and unpacking of gregset_t and
698 fpregset_t formatted data.
703 /* Given a pointer to a general register set in /proc format (gregset_t *),
704 unpack the register contents and supply them as gdb's idea of the current
708 supply_gregset (gregsetp
)
709 prgregset_t
*gregsetp
;
712 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
714 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
715 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
717 supply_register (regi
, (char *) (regp
+ regi
));
720 /* These require a bit more care. */
721 supply_register (PS_REGNUM
, (char *) (regp
+ R_PS
));
722 supply_register (PC_REGNUM
, (char *) (regp
+ R_PC
));
723 supply_register (NPC_REGNUM
,(char *) (regp
+ R_nPC
));
724 supply_register (Y_REGNUM
, (char *) (regp
+ R_Y
));
728 fill_gregset (gregsetp
, regno
)
729 prgregset_t
*gregsetp
;
733 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
734 extern char registers
[];
736 for (regi
= 0 ; regi
<= R_I7
; regi
++)
738 if ((regno
== -1) || (regno
== regi
))
740 *(regp
+ regi
) = *(int *) ®isters
[REGISTER_BYTE (regi
)];
743 if ((regno
== -1) || (regno
== PS_REGNUM
))
745 *(regp
+ R_PS
) = *(int *) ®isters
[REGISTER_BYTE (PS_REGNUM
)];
747 if ((regno
== -1) || (regno
== PC_REGNUM
))
749 *(regp
+ R_PC
) = *(int *) ®isters
[REGISTER_BYTE (PC_REGNUM
)];
751 if ((regno
== -1) || (regno
== NPC_REGNUM
))
753 *(regp
+ R_nPC
) = *(int *) ®isters
[REGISTER_BYTE (NPC_REGNUM
)];
755 if ((regno
== -1) || (regno
== Y_REGNUM
))
757 *(regp
+ R_Y
) = *(int *) ®isters
[REGISTER_BYTE (Y_REGNUM
)];
761 #if defined (FP0_REGNUM)
763 /* Given a pointer to a floating point register set in /proc format
764 (fpregset_t *), unpack the register contents and supply them as gdb's
765 idea of the current floating point register values. */
768 supply_fpregset (fpregsetp
)
769 prfpregset_t
*fpregsetp
;
774 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
776 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
777 supply_register (regi
, from
);
779 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
782 /* Given a pointer to a floating point register set in /proc format
783 (fpregset_t *), update the register specified by REGNO from gdb's idea
784 of the current floating point register set. If REGNO is -1, update
788 fill_fpregset (fpregsetp
, regno
)
789 prfpregset_t
*fpregsetp
;
795 extern char registers
[];
797 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
799 if ((regno
== -1) || (regno
== regi
))
801 from
= (char *) ®isters
[REGISTER_BYTE (regi
)];
802 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
803 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
806 if ((regno
== -1) || (regno
== FPS_REGNUM
))
808 fpregsetp
->pr_fsr
= *(int *) ®isters
[REGISTER_BYTE (FPS_REGNUM
)];
812 #endif /* defined (FP0_REGNUM) */
814 #endif /* USE_PROC_FS */
817 #ifdef GET_LONGJMP_TARGET
819 /* Figure out where the longjmp will land. We expect that we have just entered
820 longjmp and haven't yet setup the stack frame, so the args are still in the
821 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
822 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
823 This routine returns true on success */
826 get_longjmp_target(pc
)
831 jb_addr
= read_register(O0_REGNUM
);
833 if (target_read_memory(jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, (char *) pc
,
837 SWAP_TARGET_AND_HOST(pc
, sizeof(CORE_ADDR
));
841 #endif /* GET_LONGJMP_TARGET */
843 /* So far used only for sparc solaris. In sparc solaris, we recognize
844 a trampoline by it's section name. That is, if the pc is in a
845 section named ".plt" then we are in a trampline. */
848 in_solib_trampoline(pc
, name
)
855 s
= find_pc_section(pc
);
858 && s
->sec_ptr
->name
!= NULL
859 && STREQ (s
->sec_ptr
->name
, ".plt"));