1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
25 #include "ieee-float.h"
27 #include "symfile.h" /* for objfiles.h */
28 #include "objfiles.h" /* for find_pc_section */
31 #include <sys/procfs.h>
37 extern int stop_after_trap
;
39 /* We don't store all registers immediately when requested, since they
40 get sent over in large chunks anyway. Instead, we accumulate most
41 of the changes and send them over once. "deferred_stores" keeps
42 track of which sets of registers we have locally-changed copies of,
43 so we only need send the groups that have changed. */
45 int deferred_stores
= 0; /* Cumulates stores we want to do eventually. */
49 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
52 /* Simulate single-step ptrace call for sun4. Code written by Gary
53 Beihl (beihl@mcc.com). */
55 /* npc4 and next_pc describe the situation at the time that the
56 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
57 static CORE_ADDR next_pc
, npc4
, target
;
58 static int brknpc4
, brktrg
;
59 typedef char binsn_quantum
[BREAKPOINT_MAX
];
60 static binsn_quantum break_mem
[3];
62 /* Non-zero if we just simulated a single-step ptrace call. This is
63 needed because we cannot remove the breakpoints in the inferior
64 process until after the `wait' in `wait_for_inferior'. Used for
69 /* single_step() is called just before we want to resume the inferior,
70 if we want to single-step it but there is no hardware or kernel single-step
71 support (as on all SPARCs). We find all the possible targets of the
72 coming instruction and breakpoint them.
74 single_step is also called just after the inferior stops. If we had
75 set up a simulated single-step, we undo our damage. */
79 int ignore
; /* pid, but we don't need it */
81 branch_type br
, isannulled();
87 /* Always set breakpoint for NPC. */
88 next_pc
= read_register (NPC_REGNUM
);
89 npc4
= next_pc
+ 4; /* branch not taken */
91 target_insert_breakpoint (next_pc
, break_mem
[0]);
92 /* printf ("set break at %x\n",next_pc); */
94 pc
= read_register (PC_REGNUM
);
95 pc_instruction
= read_memory_integer (pc
, sizeof(pc_instruction
));
96 br
= isannulled (pc_instruction
, pc
, &target
);
101 /* Conditional annulled branch will either end up at
102 npc (if taken) or at npc+4 (if not taken).
105 target_insert_breakpoint (npc4
, break_mem
[1]);
107 else if (br
== baa
&& target
!= next_pc
)
109 /* Unconditional annulled branch will always end up at
112 target_insert_breakpoint (target
, break_mem
[2]);
115 /* We are ready to let it go */
121 /* Remove breakpoints */
122 target_remove_breakpoint (next_pc
, break_mem
[0]);
125 target_remove_breakpoint (npc4
, break_mem
[1]);
128 target_remove_breakpoint (target
, break_mem
[2]);
134 #define FRAME_SAVED_L0 0 /* Byte offset from SP */
135 #define FRAME_SAVED_I0 (8 * REGISTER_RAW_SIZE (0)) /* Byte offset from SP */
138 sparc_frame_chain (thisframe
)
141 REGISTER_TYPE retval
;
145 addr
= thisframe
->frame
+ FRAME_SAVED_I0
+
146 REGISTER_RAW_SIZE (FP_REGNUM
) * (FP_REGNUM
- I0_REGNUM
);
147 err
= target_read_memory (addr
, (char *) &retval
, sizeof (REGISTER_TYPE
));
150 SWAP_TARGET_AND_HOST (&retval
, sizeof (retval
));
155 sparc_extract_struct_value_address (regbuf
)
156 char regbuf
[REGISTER_BYTES
];
158 /* FIXME, handle byte swapping */
159 return read_memory_integer (((int *)(regbuf
))[SP_REGNUM
]+(16*4),
163 /* Find the pc saved in frame FRAME. */
166 frame_saved_pc (frame
)
169 REGISTER_TYPE retval
;
170 CORE_ADDR addr
,prev_pc
;
172 if (get_current_frame () == frame
) /* FIXME, debug check. Remove >=gdb-4.6 */
174 if (read_register (SP_REGNUM
) != frame
->bottom
) abort();
177 addr
= (frame
->bottom
+ FRAME_SAVED_I0
+
178 REGISTER_RAW_SIZE (I7_REGNUM
) * (I7_REGNUM
- I0_REGNUM
));
179 read_memory (addr
, (char *) &retval
, sizeof (REGISTER_TYPE
));
180 SWAP_TARGET_AND_HOST (&retval
, sizeof (retval
));
182 /* CORE_ADDR isn't always the same size as REGISTER_TYPE, so convert. */
184 prev_pc
= (CORE_ADDR
) retval
;
185 return PC_ADJUST (prev_pc
);
189 * Since an individual frame in the frame cache is defined by two
190 * arguments (a frame pointer and a stack pointer), we need two
191 * arguments to get info for an arbitrary stack frame. This routine
192 * takes two arguments and makes the cached frames look as if these
193 * two arguments defined a frame on the cache. This allows the rest
194 * of info frame to extract the important arguments without
198 setup_arbitrary_frame (argc
, argv
)
205 error ("Sparc frame specifications require two arguments: fp and sp");
207 fid
= create_new_frame (argv
[0], 0);
210 fatal ("internal: create_new_frame returned invalid frame id");
212 fid
->bottom
= argv
[1];
213 fid
->pc
= FRAME_SAVED_PC (fid
);
217 /* Given a pc value, skip it forward past the function prologue by
218 disassembling instructions that appear to be a prologue.
220 If FRAMELESS_P is set, we are only testing to see if the function
221 is frameless. This allows a quicker answer.
223 This routine should be more specific in its actions; making sure
224 that it uses the same register in the initial prologue section. */
226 skip_prologue (start_pc
, frameless_p
)
232 unsigned long int code
;
238 unsigned int imm22
:22;
247 unsigned int simm13
:13;
252 CORE_ADDR pc
= start_pc
;
254 x
.i
= read_memory_integer (pc
, 4);
256 /* Recognize the `sethi' insn and record its destination. */
257 if (x
.sethi
.op
== 0 && x
.sethi
.op2
== 4)
261 x
.i
= read_memory_integer (pc
, 4);
264 /* Recognize an add immediate value to register to either %g1 or
265 the destination register recorded above. Actually, this might
266 well recognize several different arithmetic operations.
267 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
268 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
269 I imagine any compiler really does that, however). */
270 if (x
.add
.op
== 2 && x
.add
.i
&& (x
.add
.rd
== 1 || x
.add
.rd
== dest
))
273 x
.i
= read_memory_integer (pc
, 4);
276 /* This recognizes any SAVE insn. But why do the XOR and then
277 the compare? That's identical to comparing against 60 (as long
278 as there isn't any sign extension). */
279 if (x
.add
.op
== 2 && (x
.add
.op3
^ 32) == 28)
282 if (frameless_p
) /* If the save is all we care about, */
283 return pc
; /* return before doing more work */
284 x
.i
= read_memory_integer (pc
, 4);
288 /* Without a save instruction, it's not a prologue. */
292 /* Now we need to recognize stores into the frame from the input
293 registers. This recognizes all non alternate stores of input
294 register, into a location offset from the frame pointer. */
296 && (x
.add
.op3
& 0x3c) == 4 /* Store, non-alternate. */
297 && (x
.add
.rd
& 0x18) == 0x18 /* Input register. */
298 && x
.add
.i
/* Immediate mode. */
299 && x
.add
.rs1
== 30 /* Off of frame pointer. */
300 /* Into reserved stack space. */
301 && x
.add
.simm13
>= 0x44
302 && x
.add
.simm13
< 0x5b)
305 x
.i
= read_memory_integer (pc
, 4);
310 /* Check instruction at ADDR to see if it is an annulled branch.
311 All other instructions will go to NPC or will trap.
312 Set *TARGET if we find a canidate branch; set to zero if not. */
315 isannulled (instruction
, addr
, target
)
317 CORE_ADDR addr
, *target
;
319 branch_type val
= not_branch
;
320 long int offset
; /* Must be signed for sign-extend. */
323 unsigned long int code
;
330 unsigned int disp22
:22;
335 insn
.code
= instruction
;
338 && (insn
.b
.op2
== 2 || insn
.b
.op2
== 6 || insn
.b
.op2
== 7))
340 if (insn
.b
.cond
== 8)
341 val
= insn
.b
.a
? baa
: ba
;
343 val
= insn
.b
.a
? bicca
: bicc
;
344 offset
= 4 * ((int) (insn
.b
.disp22
<< 10) >> 10);
345 *target
= addr
+ offset
;
351 /* sparc_frame_find_saved_regs ()
353 Stores, into a struct frame_saved_regs,
354 the addresses of the saved registers of frame described by FRAME_INFO.
355 This includes special registers such as pc and fp saved in special
356 ways in the stack frame. sp is even more special:
357 the address we return for it IS the sp for the next frame.
359 Note that on register window machines, we are currently making the
360 assumption that window registers are being saved somewhere in the
361 frame in which they are being used. If they are stored in an
362 inferior frame, find_saved_register will break.
364 On the Sun 4, the only time all registers are saved is when
365 a dummy frame is involved. Otherwise, the only saved registers
366 are the LOCAL and IN registers which are saved as a result
367 of the "save/restore" opcodes. This condition is determined
368 by address rather than by value.
370 The "pc" is not stored in a frame on the SPARC. (What is stored
371 is a return address minus 8.) sparc_pop_frame knows how to
372 deal with that. Other routines might or might not.
374 See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information
375 about how this works. */
378 sparc_frame_find_saved_regs (fi
, saved_regs_addr
)
379 struct frame_info
*fi
;
380 struct frame_saved_regs
*saved_regs_addr
;
383 FRAME_ADDR frame
= read_register (FP_REGNUM
);
384 FRAME fid
= FRAME_INFO_ID (fi
);
387 fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS");
389 memset (saved_regs_addr
, 0, sizeof (*saved_regs_addr
));
392 if (fi->pc >= frame - CALL_DUMMY_LENGTH - 0x140
393 && fi->pc <= frame) */
395 if (fi
->pc
>= (fi
->bottom
? fi
->bottom
:
396 read_register (SP_REGNUM
))
397 && fi
->pc
<= FRAME_FP(fi
))
399 /* Dummy frame. All but the window regs are in there somewhere. */
400 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+7; regnum
++)
401 saved_regs_addr
->regs
[regnum
] =
402 frame
+ (regnum
- G0_REGNUM
) * 4 - 0xa0;
403 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+8; regnum
++)
404 saved_regs_addr
->regs
[regnum
] =
405 frame
+ (regnum
- I0_REGNUM
) * 4 - 0xc0;
406 for (regnum
= FP0_REGNUM
; regnum
< FP0_REGNUM
+ 32; regnum
++)
407 saved_regs_addr
->regs
[regnum
] =
408 frame
+ (regnum
- FP0_REGNUM
) * 4 - 0x80;
409 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
410 saved_regs_addr
->regs
[regnum
] =
411 frame
+ (regnum
- Y_REGNUM
) * 4 - 0xe0;
413 fi
->bottom
: read_register (SP_REGNUM
);
417 /* Normal frame. Just Local and In registers */
419 fi
->bottom
: read_register (SP_REGNUM
);
420 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+16; regnum
++)
421 saved_regs_addr
->regs
[regnum
] = frame
+ (regnum
-L0_REGNUM
) * 4;
425 /* Pull off either the next frame pointer or the stack pointer */
426 FRAME_ADDR next_next_frame
=
429 read_register (SP_REGNUM
));
430 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+8; regnum
++)
431 saved_regs_addr
->regs
[regnum
] = next_next_frame
+ regnum
* 4;
433 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
434 saved_regs_addr
->regs
[SP_REGNUM
] = FRAME_FP (fi
);
437 /* Push an empty stack frame, and record in it the current PC, regs, etc.
439 We save the non-windowed registers and the ins. The locals and outs
440 are new; they don't need to be saved. The i's and l's of
441 the last frame were already saved on the stack
443 The return pointer register %i7 does not have the pc saved into it
444 (return from this frame will be accomplished by a POP_FRAME). In
445 fact, we must leave it unclobbered, since we must preserve it in
446 the calling routine except across call instructions. I'm not sure
447 the preceding sentence is true; isn't it based on confusing the %i7
448 saved in the dummy frame versus the one saved in the frame of the
451 /* Definitely see tm-sparc.h for more doc of the frame format here. */
454 sparc_push_dummy_frame ()
457 char register_temp
[REGISTER_BYTES
];
459 sp
= read_register (SP_REGNUM
);
461 read_register_bytes (REGISTER_BYTE (FP0_REGNUM
), register_temp
,
462 REGISTER_RAW_SIZE (FP0_REGNUM
) * 32);
463 write_memory (sp
- 0x80, register_temp
, REGISTER_RAW_SIZE (FP0_REGNUM
) * 32);
465 read_register_bytes (REGISTER_BYTE (G0_REGNUM
), register_temp
,
466 REGISTER_RAW_SIZE (G0_REGNUM
) * 8);
467 write_memory (sp
- 0xa0, register_temp
, REGISTER_RAW_SIZE (G0_REGNUM
) * 8);
469 read_register_bytes (REGISTER_BYTE (O0_REGNUM
), register_temp
,
470 REGISTER_RAW_SIZE (O0_REGNUM
) * 8);
471 write_memory (sp
- 0xc0, register_temp
, REGISTER_RAW_SIZE (O0_REGNUM
) * 8);
473 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
474 read_register_bytes (REGISTER_BYTE (Y_REGNUM
), register_temp
,
475 REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
476 write_memory (sp
- 0xe0, register_temp
, REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
479 CORE_ADDR old_sp
= sp
;
481 /* Now move the stack pointer (equivalent to the add part of a save
484 write_register (SP_REGNUM
, sp
);
486 /* Now make sure that the frame pointer we save in the new frame points
487 to the old frame (equivalent to the register window shift part of
488 a save instruction). Need to do this after the write to the sp, or
489 else this might get written into the wrong set of saved ins&locals. */
490 write_register (FP_REGNUM
, old_sp
);
494 /* Discard from the stack the innermost frame, restoring all saved registers.
496 Note that the values stored in fsr by get_frame_saved_regs are *in
497 the context of the called frame*. What this means is that the i
498 regs of fsr must be restored into the o regs of the (calling) frame that
499 we pop into. We don't care about the output regs of the calling frame,
500 since unless it's a dummy frame, it won't have any output regs in it.
502 We never have to bother with %l (local) regs, since the called routine's
503 locals get tossed, and the calling routine's locals are already saved
506 /* Definitely see tm-sparc.h for more doc of the frame format here. */
511 register FRAME frame
= get_current_frame ();
512 register CORE_ADDR pc
;
513 struct frame_saved_regs fsr
;
514 struct frame_info
*fi
;
515 char raw_buffer
[REGISTER_BYTES
];
517 fi
= get_frame_info (frame
);
518 get_frame_saved_regs (fi
, &fsr
);
519 if (fsr
.regs
[FP0_REGNUM
])
521 read_memory (fsr
.regs
[FP0_REGNUM
], raw_buffer
, 32 * 4);
522 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
), raw_buffer
, 32 * 4);
524 if (fsr
.regs
[G1_REGNUM
])
526 read_memory (fsr
.regs
[G1_REGNUM
], raw_buffer
, 7 * 4);
527 write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
, 7 * 4);
529 if (fsr
.regs
[I0_REGNUM
])
533 char reg_temp
[REGISTER_BYTES
];
535 read_memory (fsr
.regs
[I0_REGNUM
], raw_buffer
, 8 * 4);
537 /* Get the ins and locals which we are about to restore. Just
538 moving the stack pointer is all that is really needed, except
539 store_inferior_registers is then going to write the ins and
540 locals from the registers array, so we need to muck with the
542 sp
= fsr
.regs
[SP_REGNUM
];
543 read_memory (sp
, reg_temp
, REGISTER_RAW_SIZE (L0_REGNUM
) * 16);
545 /* Restore the out registers.
546 Among other things this writes the new stack pointer. */
547 write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
,
548 REGISTER_RAW_SIZE (O0_REGNUM
) * 8);
550 write_register_bytes (REGISTER_BYTE (L0_REGNUM
), reg_temp
,
551 REGISTER_RAW_SIZE (L0_REGNUM
) * 16);
553 if (fsr
.regs
[PS_REGNUM
])
554 write_register (PS_REGNUM
, read_memory_integer (fsr
.regs
[PS_REGNUM
], 4));
555 if (fsr
.regs
[Y_REGNUM
])
556 write_register (Y_REGNUM
, read_memory_integer (fsr
.regs
[Y_REGNUM
], 4));
557 if (fsr
.regs
[PC_REGNUM
])
559 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
560 write_register (PC_REGNUM
, read_memory_integer (fsr
.regs
[PC_REGNUM
], 4));
561 if (fsr
.regs
[NPC_REGNUM
])
562 write_register (NPC_REGNUM
,
563 read_memory_integer (fsr
.regs
[NPC_REGNUM
], 4));
565 else if (fsr
.regs
[I7_REGNUM
])
567 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
568 pc
= PC_ADJUST (read_memory_integer (fsr
.regs
[I7_REGNUM
], 4));
569 write_register (PC_REGNUM
, pc
);
570 write_register (NPC_REGNUM
, pc
+ 4);
572 flush_cached_frames ();
573 set_current_frame ( create_new_frame (read_register (FP_REGNUM
),
577 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
578 encodes the structure size being returned. If we detect such
579 a fake insn, step past it. */
588 err
= target_read_memory (pc
+ 8, (char *)&insn
, sizeof(long));
589 SWAP_TARGET_AND_HOST (&insn
, sizeof(long));
590 if ((err
== 0) && (insn
& 0xfffffe00) == 0)
597 /* Structure of SPARC extended floating point numbers.
598 This information is not currently used by GDB, since no current SPARC
599 implementations support extended float. */
601 const struct ext_format ext_format_sparc
= {
602 /* tot sbyte smask expbyte manbyte */
603 16, 0, 0x80, 0,1, 4,8, /* sparc */
606 #ifdef USE_PROC_FS /* Target dependent support for /proc */
608 /* The /proc interface divides the target machine's register set up into
609 two different sets, the general register set (gregset) and the floating
610 point register set (fpregset). For each set, there is an ioctl to get
611 the current register set and another ioctl to set the current values.
613 The actual structure passed through the ioctl interface is, of course,
614 naturally machine dependent, and is different for each set of registers.
615 For the sparc for example, the general register set is typically defined
618 typedef int gregset_t[38];
624 and the floating point set by:
626 typedef struct prfpregset {
634 u_char pr_q_entrysize;
639 These routines provide the packing and unpacking of gregset_t and
640 fpregset_t formatted data.
645 /* Given a pointer to a general register set in /proc format (gregset_t *),
646 unpack the register contents and supply them as gdb's idea of the current
650 supply_gregset (gregsetp
)
651 prgregset_t
*gregsetp
;
654 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
656 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
657 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
659 supply_register (regi
, (char *) (regp
+ regi
));
662 /* These require a bit more care. */
663 supply_register (PS_REGNUM
, (char *) (regp
+ R_PS
));
664 supply_register (PC_REGNUM
, (char *) (regp
+ R_PC
));
665 supply_register (NPC_REGNUM
,(char *) (regp
+ R_nPC
));
666 supply_register (Y_REGNUM
, (char *) (regp
+ R_Y
));
670 fill_gregset (gregsetp
, regno
)
671 prgregset_t
*gregsetp
;
675 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
676 extern char registers
[];
678 for (regi
= 0 ; regi
<= R_I7
; regi
++)
680 if ((regno
== -1) || (regno
== regi
))
682 *(regp
+ regi
) = *(int *) ®isters
[REGISTER_BYTE (regi
)];
685 if ((regno
== -1) || (regno
== PS_REGNUM
))
687 *(regp
+ R_PS
) = *(int *) ®isters
[REGISTER_BYTE (PS_REGNUM
)];
689 if ((regno
== -1) || (regno
== PC_REGNUM
))
691 *(regp
+ R_PC
) = *(int *) ®isters
[REGISTER_BYTE (PC_REGNUM
)];
693 if ((regno
== -1) || (regno
== NPC_REGNUM
))
695 *(regp
+ R_nPC
) = *(int *) ®isters
[REGISTER_BYTE (NPC_REGNUM
)];
697 if ((regno
== -1) || (regno
== Y_REGNUM
))
699 *(regp
+ R_Y
) = *(int *) ®isters
[REGISTER_BYTE (Y_REGNUM
)];
703 #if defined (FP0_REGNUM)
705 /* Given a pointer to a floating point register set in /proc format
706 (fpregset_t *), unpack the register contents and supply them as gdb's
707 idea of the current floating point register values. */
710 supply_fpregset (fpregsetp
)
711 prfpregset_t
*fpregsetp
;
716 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
718 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
719 supply_register (regi
, from
);
721 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
724 /* Given a pointer to a floating point register set in /proc format
725 (fpregset_t *), update the register specified by REGNO from gdb's idea
726 of the current floating point register set. If REGNO is -1, update
730 fill_fpregset (fpregsetp
, regno
)
731 prfpregset_t
*fpregsetp
;
737 extern char registers
[];
739 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
741 if ((regno
== -1) || (regno
== regi
))
743 from
= (char *) ®isters
[REGISTER_BYTE (regi
)];
744 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
745 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
748 if ((regno
== -1) || (regno
== FPS_REGNUM
))
750 fpregsetp
->pr_fsr
= *(int *) ®isters
[REGISTER_BYTE (FPS_REGNUM
)];
754 #endif /* defined (FP0_REGNUM) */
756 #endif /* USE_PROC_FS */
759 #ifdef GET_LONGJMP_TARGET
761 /* Figure out where the longjmp will land. We expect that we have just entered
762 longjmp and haven't yet setup the stack frame, so the args are still in the
763 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
764 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
765 This routine returns true on success */
768 get_longjmp_target(pc
)
773 jb_addr
= read_register(O0_REGNUM
);
775 if (target_read_memory(jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, (char *) pc
,
779 SWAP_TARGET_AND_HOST(pc
, sizeof(CORE_ADDR
));
783 #endif /* GET_LONGJMP_TARGET */
785 /* So far used only for sparc solaris. In sparc solaris, we recognize
786 a trampoline by it's section name. That is, if the pc is in a
787 section named ".plt" then we are in a trampline. */
790 in_solib_trampoline(pc
, name
)
794 struct obj_section
*s
;
797 s
= find_pc_section(pc
);
800 && s
->sec_ptr
->name
!= NULL
801 && STREQ (s
->sec_ptr
->name
, ".plt"));