1 /* Target-dependent code for SPARC.
3 Copyright 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 #include "arch-utils.h"
25 #include "floatformat.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
39 #include "gdb_assert.h"
40 #include "gdb_string.h"
42 #include "sparc-tdep.h"
46 /* This file implements the The SPARC 32-bit ABI as defined by the
47 section "Low-Level System Information" of the SPARC Compliance
48 Definition (SCD) 2.4.1, which is the 32-bit System V psABI for
49 SPARC. The SCD lists changes with respect to the origional 32-bit
50 psABI as defined in the "System V ABI, SPARC Processor
53 Note that if we talk about SunOS, we mean SunOS 4.x, which was
54 BSD-based, which is sometimes (retroactively?) referred to as
55 Solaris 1.x. If we talk about Solaris we mean Solaris 2.x and
56 above (Solaris 7, 8 and 9 are nothing but Solaris 2.7, 2.8 and 2.9
57 suffering from severe version number inflation). Solaris 2.x is
58 also known as SunOS 5.x, since that's what uname(1) says. Solaris
61 /* Please use the sparc32_-prefix for 32-bit specific code, the
62 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
63 code that can handle both. The 64-bit specific code lives in
64 sparc64-tdep.c; don't add any here. */
66 /* The SPARC Floating-Point Quad-Precision format is similar to
67 big-endian IA-64 Quad-recision format. */
68 #define floatformat_sparc_quad floatformat_ia64_quad_big
70 /* The stack pointer is offset from the stack frame by a BIAS of 2047
71 (0x7ff) for 64-bit code. BIAS is likely to be defined on SPARC
72 hosts, so undefine it first. */
76 /* Macros to extract fields from SPARC instructions. */
77 #define X_OP(i) (((i) >> 30) & 0x3)
78 #define X_RD(i) (((i) >> 25) & 0x1f)
79 #define X_A(i) (((i) >> 29) & 1)
80 #define X_COND(i) (((i) >> 25) & 0xf)
81 #define X_OP2(i) (((i) >> 22) & 0x7)
82 #define X_IMM22(i) ((i) & 0x3fffff)
83 #define X_OP3(i) (((i) >> 19) & 0x3f)
84 #define X_I(i) (((i) >> 13) & 1)
85 /* Sign extension macros. */
86 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
87 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
89 /* Fetch the instruction at PC. Instructions are always big-endian
90 even if the processor operates in little-endian mode. */
93 sparc_fetch_instruction (CORE_ADDR pc
)
99 /* If we can't read the instruction at PC, return zero. */
100 if (target_read_memory (pc
, buf
, sizeof (buf
)))
104 for (i
= 0; i
< sizeof (buf
); i
++)
105 insn
= (insn
<< 8) | buf
[i
];
110 /* OpenBSD/sparc includes StackGhost, which according to the author's
111 website http://stackghost.cerias.purdue.edu "... transparently and
112 automatically protects applications' stack frames; more
113 specifically, it guards the return pointers. The protection
114 mechanisms require no application source or binary modification and
115 imposes only a negligible performance penalty."
117 The same website provides the following description of how
120 "StackGhost interfaces with the kernel trap handler that would
121 normally write out registers to the stack and the handler that
122 would read them back in. By XORing a cookie into the
123 return-address saved in the user stack when it is actually written
124 to the stack, and then XOR it out when the return-address is pulled
125 from the stack, StackGhost can cause attacker corrupted return
126 pointers to behave in a manner the attacker cannot predict.
127 StackGhost can also use several unused bits in the return pointer
128 to detect a smashed return pointer and abort the process."
130 For GDB this means that whenever we're reading %i7 from a stack
131 frame's window save area, we'll have to XOR the cookie.
133 More information on StackGuard can be found on in:
135 Mike Frantzen and Mike Shuey. "StackGhost: Hardware Facilitated
136 Stack Protection." 2001. Published in USENIX Security Symposium
139 /* Fetch StackGhost Per-Process XOR cookie. */
142 sparc_fetch_wcookie (void)
144 struct target_ops
*ops
= ¤t_target
;
148 len
= target_read_partial (ops
, TARGET_OBJECT_WCOOKIE
, NULL
, buf
, 0, 8);
152 /* We should have either an 32-bit or an 64-bit cookie. */
153 gdb_assert (len
== 4 || len
== 8);
155 return extract_unsigned_integer (buf
, len
);
159 /* Return the contents if register REGNUM as an address. */
162 sparc_address_from_register (int regnum
)
166 regcache_cooked_read_unsigned (current_regcache
, regnum
, &addr
);
171 /* The functions on this page are intended to be used to classify
172 function arguments. */
174 /* Check whether TYPE is "Integral or Pointer". */
177 sparc_integral_or_pointer_p (const struct type
*type
)
179 switch (TYPE_CODE (type
))
185 case TYPE_CODE_RANGE
:
187 /* We have byte, half-word, word and extended-word/doubleword
188 integral types. The doubleword is an extension to the
189 origional 32-bit ABI by the SCD 2.4.x. */
190 int len
= TYPE_LENGTH (type
);
191 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
197 /* Allow either 32-bit or 64-bit pointers. */
198 int len
= TYPE_LENGTH (type
);
199 return (len
== 4 || len
== 8);
209 /* Check whether TYPE is "Floating". */
212 sparc_floating_p (const struct type
*type
)
214 switch (TYPE_CODE (type
))
218 int len
= TYPE_LENGTH (type
);
219 return (len
== 4 || len
== 8 || len
== 16);
228 /* Check whether TYPE is "Structure or Union". */
231 sparc_structure_or_union_p (const struct type
*type
)
233 switch (TYPE_CODE (type
))
235 case TYPE_CODE_STRUCT
:
236 case TYPE_CODE_UNION
:
245 /* Register information. */
247 static const char *sparc32_register_names
[] =
249 "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
250 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
251 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
252 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
254 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
255 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
256 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
257 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
259 "y", "psr", "wim", "tbr", "pc", "npc", "fsr", "csr"
262 /* Total number of registers. */
263 #define SPARC32_NUM_REGS ARRAY_SIZE (sparc32_register_names)
265 /* We provide the aliases %d0..%d30 for the floating registers as
266 "psuedo" registers. */
268 static const char *sparc32_pseudo_register_names
[] =
270 "d0", "d2", "d4", "d6", "d8", "d10", "d12", "d14",
271 "d16", "d18", "d20", "d22", "d24", "d26", "d28", "d30"
274 /* Total number of pseudo registers. */
275 #define SPARC32_NUM_PSEUDO_REGS ARRAY_SIZE (sparc32_pseudo_register_names)
277 /* Return the name of register REGNUM. */
280 sparc32_register_name (int regnum
)
282 if (regnum
>= 0 && regnum
< SPARC32_NUM_REGS
)
283 return sparc32_register_names
[regnum
];
285 if (regnum
< SPARC32_NUM_REGS
+ SPARC32_NUM_PSEUDO_REGS
)
286 return sparc32_pseudo_register_names
[regnum
- SPARC32_NUM_REGS
];
291 /* Return the GDB type object for the "standard" data type of data in
295 sparc32_register_type (struct gdbarch
*gdbarch
, int regnum
)
297 if (regnum
>= SPARC_F0_REGNUM
&& regnum
<= SPARC_F31_REGNUM
)
298 return builtin_type_float
;
300 if (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
)
301 return builtin_type_double
;
303 if (regnum
== SPARC_SP_REGNUM
|| regnum
== SPARC_FP_REGNUM
)
304 return builtin_type_void_data_ptr
;
306 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== SPARC32_NPC_REGNUM
)
307 return builtin_type_void_func_ptr
;
309 return builtin_type_int32
;
313 sparc32_pseudo_register_read (struct gdbarch
*gdbarch
,
314 struct regcache
*regcache
,
315 int regnum
, void *buf
)
317 gdb_assert (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
);
319 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC32_D0_REGNUM
);
320 regcache_raw_read (regcache
, regnum
, buf
);
321 regcache_raw_read (regcache
, regnum
+ 1, ((char *)buf
) + 4);
325 sparc32_pseudo_register_write (struct gdbarch
*gdbarch
,
326 struct regcache
*regcache
,
327 int regnum
, const void *buf
)
329 gdb_assert (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
);
331 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC32_D0_REGNUM
);
332 regcache_raw_write (regcache
, regnum
, buf
);
333 regcache_raw_write (regcache
, regnum
+ 1, ((const char *)buf
) + 4);
338 sparc32_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
,
339 CORE_ADDR funcaddr
, int using_gcc
,
340 struct value
**args
, int nargs
,
341 struct type
*value_type
,
342 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
)
347 if (using_struct_return (value_type
, using_gcc
))
351 /* This is an UNIMP instruction. */
352 store_unsigned_integer (buf
, 4, TYPE_LENGTH (value_type
) & 0x1fff);
353 write_memory (sp
- 8, buf
, 4);
361 sparc32_store_arguments (struct regcache
*regcache
, int nargs
,
362 struct value
**args
, CORE_ADDR sp
,
363 int struct_return
, CORE_ADDR struct_addr
)
365 /* Number of words in the "parameter array". */
366 int num_elements
= 0;
370 for (i
= 0; i
< nargs
; i
++)
372 struct type
*type
= VALUE_TYPE (args
[i
]);
373 int len
= TYPE_LENGTH (type
);
375 if (sparc_structure_or_union_p (type
)
376 || (sparc_floating_p (type
) && len
== 16))
378 /* Structure, Union and Quad-Precision Arguments. */
381 /* Use doubleword alignment for these values. That's always
382 correct, and wasting a few bytes shouldn't be a problem. */
385 write_memory (sp
, VALUE_CONTENTS (args
[i
]), len
);
386 args
[i
] = value_from_pointer (lookup_pointer_type (type
), sp
);
389 else if (sparc_floating_p (type
))
391 /* Floating arguments. */
392 gdb_assert (len
== 4 || len
== 8);
393 num_elements
+= (len
/ 4);
397 /* Integral and pointer arguments. */
398 gdb_assert (sparc_integral_or_pointer_p (type
));
401 args
[i
] = value_cast (builtin_type_int32
, args
[i
]);
402 num_elements
+= ((len
+ 3) / 4);
406 /* Always allocate at least six words. */
407 sp
-= max (6, num_elements
) * 4;
409 /* The psABI says that "Software convention requires space for the
410 struct/union return value pointer, even if the word is unused." */
413 /* The psABI says that "Although software convention and the
414 operating system require every stack frame to be doubleword
418 for (i
= 0; i
< nargs
; i
++)
420 char *valbuf
= VALUE_CONTENTS (args
[i
]);
421 struct type
*type
= VALUE_TYPE (args
[i
]);
422 int len
= TYPE_LENGTH (type
);
424 gdb_assert (len
== 4 || len
== 8);
428 int regnum
= SPARC_O0_REGNUM
+ element
;
430 regcache_cooked_write (regcache
, regnum
, valbuf
);
431 if (len
> 4 && element
< 5)
432 regcache_cooked_write (regcache
, regnum
+ 1, valbuf
+ 4);
435 /* Always store the argument in memory. */
436 write_memory (sp
+ 4 + element
* 4, valbuf
, len
);
440 gdb_assert (element
== num_elements
);
446 store_unsigned_integer (buf
, 4, struct_addr
);
447 write_memory (sp
, buf
, 4);
454 sparc32_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
455 struct regcache
*regcache
, CORE_ADDR bp_addr
,
456 int nargs
, struct value
**args
, CORE_ADDR sp
,
457 int struct_return
, CORE_ADDR struct_addr
)
459 CORE_ADDR call_pc
= (struct_return
? (bp_addr
- 12) : (bp_addr
- 8));
461 /* Set return address. */
462 regcache_cooked_write_unsigned (regcache
, SPARC_O7_REGNUM
, call_pc
);
464 /* Set up function arguments. */
465 sp
= sparc32_store_arguments (regcache
, nargs
, args
, sp
,
466 struct_return
, struct_addr
);
468 /* Allocate the 16-word window save area. */
471 /* Stack should be doubleword aligned at this point. */
472 gdb_assert (sp
% 8 == 0);
474 /* Finally, update the stack pointer. */
475 regcache_cooked_write_unsigned (regcache
, SPARC_SP_REGNUM
, sp
);
481 /* Use the program counter to determine the contents and size of a
482 breakpoint instruction. Return a pointer to a string of bytes that
483 encode a breakpoint instruction, store the length of the string in
484 *LEN and optionally adjust *PC to point to the correct memory
485 location for inserting the breakpoint. */
487 static const unsigned char *
488 sparc_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
490 static unsigned char break_insn
[] = { 0x91, 0xd0, 0x20, 0x01 };
492 *len
= sizeof (break_insn
);
497 /* Allocate and initialize a frame cache. */
499 static struct sparc_frame_cache
*
500 sparc_alloc_frame_cache (void)
502 struct sparc_frame_cache
*cache
;
505 cache
= FRAME_OBSTACK_ZALLOC (struct sparc_frame_cache
);
511 /* Frameless until proven otherwise. */
512 cache
->frameless_p
= 1;
514 cache
->struct_return_p
= 0;
520 sparc_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
521 struct sparc_frame_cache
*cache
)
523 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
528 if (current_pc
<= pc
)
531 /* We have to handle to "Procedure Linkage Table" (PLT) special. On
532 SPARC the linker usually defines a symbol (typically
533 _PROCEDURE_LINKAGE_TABLE_) at the start of the .plt section.
534 This symbol makes us end up here with PC pointing at the start of
535 the PLT and CURRENT_PC probably pointing at a PLT entry. If we
536 would do our normal prologue analysis, we would probably conclude
537 that we've got a frame when in reality we don't, since the
538 dynamic linker patches up the first PLT with some code that
539 starts with a SAVE instruction. Patch up PC such that it points
540 at the start of our PLT entry. */
541 if (tdep
->plt_entry_size
> 0 && in_plt_section (current_pc
, NULL
))
542 pc
= current_pc
- ((current_pc
- pc
) % tdep
->plt_entry_size
);
544 insn
= sparc_fetch_instruction (pc
);
546 /* Recognize a SETHI insn and record its destination. */
547 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 0x04)
552 insn
= sparc_fetch_instruction (pc
+ 4);
555 /* Allow for an arithmetic operation on DEST or %g1. */
556 if (X_OP (insn
) == 2 && X_I (insn
)
557 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
561 insn
= sparc_fetch_instruction (pc
+ 8);
564 /* Check for the SAVE instruction that sets up the frame. */
565 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3c)
567 cache
->frameless_p
= 0;
568 return pc
+ offset
+ 4;
575 sparc_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
577 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
578 return frame_unwind_register_unsigned (next_frame
, tdep
->pc_regnum
);
581 /* Return PC of first real instruction of the function starting at
585 sparc32_skip_prologue (CORE_ADDR start_pc
)
587 struct symtab_and_line sal
;
588 CORE_ADDR func_start
, func_end
;
589 struct sparc_frame_cache cache
;
591 /* This is the preferred method, find the end of the prologue by
592 using the debugging information. */
593 if (find_pc_partial_function (start_pc
, NULL
, &func_start
, &func_end
))
595 sal
= find_pc_line (func_start
, 0);
597 if (sal
.end
< func_end
598 && start_pc
<= sal
.end
)
602 return sparc_analyze_prologue (start_pc
, 0xffffffffUL
, &cache
);
607 struct sparc_frame_cache
*
608 sparc_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
610 struct sparc_frame_cache
*cache
;
615 cache
= sparc_alloc_frame_cache ();
618 /* In priciple, for normal frames, %fp (%i6) holds the frame
619 pointer, which holds the base address for the current stack
622 cache
->base
= frame_unwind_register_unsigned (next_frame
, SPARC_FP_REGNUM
);
623 if (cache
->base
== 0)
626 cache
->pc
= frame_func_unwind (next_frame
);
629 CORE_ADDR addr_in_block
= frame_unwind_address_in_block (next_frame
);
630 sparc_analyze_prologue (cache
->pc
, addr_in_block
, cache
);
633 if (cache
->frameless_p
)
635 /* We didn't find a valid frame, which means that CACHE->base
636 currently holds the frame pointer for our calling frame. */
637 cache
->base
= frame_unwind_register_unsigned (next_frame
,
644 struct sparc_frame_cache
*
645 sparc32_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
647 struct sparc_frame_cache
*cache
;
653 cache
= sparc_frame_cache (next_frame
, this_cache
);
655 sym
= find_pc_function (cache
->pc
);
658 struct type
*type
= check_typedef (SYMBOL_TYPE (sym
));
659 enum type_code code
= TYPE_CODE (type
);
661 if (code
== TYPE_CODE_FUNC
|| code
== TYPE_CODE_METHOD
)
663 type
= check_typedef (TYPE_TARGET_TYPE (type
));
664 if (sparc_structure_or_union_p (type
)
665 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16))
666 cache
->struct_return_p
= 1;
674 sparc32_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
675 struct frame_id
*this_id
)
677 struct sparc_frame_cache
*cache
=
678 sparc32_frame_cache (next_frame
, this_cache
);
680 /* This marks the outermost frame. */
681 if (cache
->base
== 0)
684 (*this_id
) = frame_id_build (cache
->base
, cache
->pc
);
688 sparc32_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
689 int regnum
, int *optimizedp
,
690 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
691 int *realnump
, void *valuep
)
693 struct sparc_frame_cache
*cache
=
694 sparc32_frame_cache (next_frame
, this_cache
);
696 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== SPARC32_NPC_REGNUM
)
704 CORE_ADDR pc
= (regnum
== SPARC32_NPC_REGNUM
) ? 4 : 0;
706 /* If this functions has a Structure, Union or
707 Quad-Precision return value, we have to skip the UNIMP
708 instruction that encodes the size of the structure. */
709 if (cache
->struct_return_p
)
712 regnum
= cache
->frameless_p
? SPARC_O7_REGNUM
: SPARC_I7_REGNUM
;
713 pc
+= frame_unwind_register_unsigned (next_frame
, regnum
) + 8;
714 store_unsigned_integer (valuep
, 4, pc
);
719 /* Handle StackGhost. */
721 ULONGEST wcookie
= sparc_fetch_wcookie ();
723 if (wcookie
!= 0 && !cache
->frameless_p
&& regnum
== SPARC_I7_REGNUM
)
731 CORE_ADDR addr
= cache
->base
+ (regnum
- SPARC_L0_REGNUM
) * 4;
734 /* Read the value in from memory. */
735 i7
= get_frame_memory_unsigned (next_frame
, addr
, 4);
736 store_unsigned_integer (valuep
, 4, i7
^ wcookie
);
742 /* The previous frame's `local' and `in' registers have been saved
743 in the register save area. */
744 if (!cache
->frameless_p
745 && regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
)
748 *lvalp
= lval_memory
;
749 *addrp
= cache
->base
+ (regnum
- SPARC_L0_REGNUM
) * 4;
753 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
755 /* Read the value in from memory. */
756 read_memory (*addrp
, valuep
, register_size (gdbarch
, regnum
));
761 /* The previous frame's `out' registers are accessable as the
762 current frame's `in' registers. */
763 if (!cache
->frameless_p
764 && regnum
>= SPARC_O0_REGNUM
&& regnum
<= SPARC_O7_REGNUM
)
765 regnum
+= (SPARC_I0_REGNUM
- SPARC_O0_REGNUM
);
767 frame_register_unwind (next_frame
, regnum
,
768 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
771 static const struct frame_unwind sparc32_frame_unwind
=
774 sparc32_frame_this_id
,
775 sparc32_frame_prev_register
778 static const struct frame_unwind
*
779 sparc32_frame_sniffer (struct frame_info
*next_frame
)
781 return &sparc32_frame_unwind
;
786 sparc32_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
788 struct sparc_frame_cache
*cache
=
789 sparc32_frame_cache (next_frame
, this_cache
);
794 static const struct frame_base sparc32_frame_base
=
796 &sparc32_frame_unwind
,
797 sparc32_frame_base_address
,
798 sparc32_frame_base_address
,
799 sparc32_frame_base_address
802 static struct frame_id
803 sparc_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
807 sp
= frame_unwind_register_unsigned (next_frame
, SPARC_SP_REGNUM
);
808 return frame_id_build (sp
, frame_pc_unwind (next_frame
));
812 /* Extract from an array REGBUF containing the (raw) register state, a
813 function return value of TYPE, and copy that into VALBUF. */
816 sparc32_extract_return_value (struct type
*type
, struct regcache
*regcache
,
819 int len
= TYPE_LENGTH (type
);
822 gdb_assert (!sparc_structure_or_union_p (type
));
823 gdb_assert (!(sparc_floating_p (type
) && len
== 16));
825 if (sparc_floating_p (type
))
827 /* Floating return values. */
828 regcache_cooked_read (regcache
, SPARC_F0_REGNUM
, buf
);
830 regcache_cooked_read (regcache
, SPARC_F1_REGNUM
, buf
+ 4);
831 memcpy (valbuf
, buf
, len
);
835 /* Integral and pointer return values. */
836 gdb_assert (sparc_integral_or_pointer_p (type
));
838 regcache_cooked_read (regcache
, SPARC_O0_REGNUM
, buf
);
841 regcache_cooked_read (regcache
, SPARC_O1_REGNUM
, buf
+ 4);
842 gdb_assert (len
== 8);
843 memcpy (valbuf
, buf
, 8);
847 /* Just stripping off any unused bytes should preserve the
848 signed-ness just fine. */
849 memcpy (valbuf
, buf
+ 4 - len
, len
);
854 /* Write into the appropriate registers a function return value stored
855 in VALBUF of type TYPE. */
858 sparc32_store_return_value (struct type
*type
, struct regcache
*regcache
,
861 int len
= TYPE_LENGTH (type
);
864 gdb_assert (!sparc_structure_or_union_p (type
));
865 gdb_assert (!(sparc_floating_p (type
) && len
== 16));
867 if (sparc_floating_p (type
))
869 /* Floating return values. */
870 memcpy (buf
, valbuf
, len
);
871 regcache_cooked_write (regcache
, SPARC_F0_REGNUM
, buf
);
873 regcache_cooked_write (regcache
, SPARC_F1_REGNUM
, buf
+ 4);
877 /* Integral and pointer return values. */
878 gdb_assert (sparc_integral_or_pointer_p (type
));
882 gdb_assert (len
== 8);
883 memcpy (buf
, valbuf
, 8);
884 regcache_cooked_write (regcache
, SPARC_O1_REGNUM
, buf
+ 4);
888 /* ??? Do we need to do any sign-extension here? */
889 memcpy (buf
+ 4 - len
, valbuf
, len
);
891 regcache_cooked_write (regcache
, SPARC_O0_REGNUM
, buf
);
895 static enum return_value_convention
896 sparc32_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
897 struct regcache
*regcache
, void *readbuf
,
898 const void *writebuf
)
900 if (sparc_structure_or_union_p (type
)
901 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16))
902 return RETURN_VALUE_STRUCT_CONVENTION
;
905 sparc32_extract_return_value (type
, regcache
, readbuf
);
907 sparc32_store_return_value (type
, regcache
, writebuf
);
909 return RETURN_VALUE_REGISTER_CONVENTION
;
913 /* NOTE: cagney/2004-01-17: For the moment disable this method. The
914 architecture and CORE-gdb will need new code (and a replacement for
915 DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS) before this can be made to
916 work robustly. Here is a possible function signature: */
917 /* NOTE: cagney/2004-01-17: So far only the 32-bit SPARC ABI has been
918 identifed as having a way to robustly recover the address of a
919 struct-convention return-value (after the function has returned).
920 For all other ABIs so far examined, the calling convention makes no
921 guarenteed that the register containing the return-value will be
922 preserved and hence that the return-value's address can be
924 /* Extract from REGCACHE, which contains the (raw) register state, the
925 address in which a function should return its structure value, as a
929 sparc32_extract_struct_value_address (struct regcache
*regcache
)
933 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
934 return read_memory_unsigned_integer (sp
+ 64, 4);
939 sparc32_stabs_argument_has_addr (struct gdbarch
*gdbarch
, struct type
*type
)
941 return (sparc_structure_or_union_p (type
)
942 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16));
946 /* The SPARC Architecture doesn't have hardware single-step support,
947 and most operating systems don't implement it either, so we provide
948 software single-step mechanism. */
951 sparc_analyze_control_transfer (CORE_ADDR pc
, CORE_ADDR
*npc
)
953 unsigned long insn
= sparc_fetch_instruction (pc
);
954 int conditional_p
= X_COND (insn
) & 0x7;
956 long offset
= 0; /* Must be signed for sign-extend. */
958 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 3 && (insn
& 0x1000000) == 0)
960 /* Branch on Integer Register with Prediction (BPr). */
964 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 6)
966 /* Branch on Floating-Point Condition Codes (FBfcc). */
968 offset
= 4 * X_DISP22 (insn
);
970 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 5)
972 /* Branch on Floating-Point Condition Codes with Prediction
975 offset
= 4 * X_DISP19 (insn
);
977 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 2)
979 /* Branch on Integer Condition Codes (Bicc). */
981 offset
= 4 * X_DISP22 (insn
);
983 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 1)
985 /* Branch on Integer Condition Codes with Prediction (BPcc). */
987 offset
= 4 * X_DISP19 (insn
);
990 /* FIXME: Handle DONE and RETRY instructions. */
992 /* FIXME: Handle the Trap instruction. */
998 /* For conditional branches, return nPC + 4 iff the annul
1000 return (X_A (insn
) ? *npc
+ 4 : 0);
1004 /* For unconditional branches, return the target if its
1005 specified condition is "always" and return nPC + 4 if the
1006 condition is "never". If the annul bit is 1, set *NPC to
1008 if (X_COND (insn
) == 0x0)
1009 pc
= *npc
, offset
= 4;
1013 gdb_assert (offset
!= 0);
1022 sparc_software_single_step (enum target_signal sig
, int insert_breakpoints_p
)
1024 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1025 static CORE_ADDR npc
, nnpc
;
1026 static char npc_save
[4], nnpc_save
[4];
1028 if (insert_breakpoints_p
)
1032 pc
= sparc_address_from_register (tdep
->pc_regnum
);
1033 npc
= sparc_address_from_register (tdep
->npc_regnum
);
1035 /* Analyze the instruction at PC. */
1036 nnpc
= sparc_analyze_control_transfer (pc
, &npc
);
1038 target_insert_breakpoint (npc
, npc_save
);
1040 target_insert_breakpoint (nnpc
, nnpc_save
);
1042 /* Assert that we have set at least one breakpoint, and that
1043 they're not set at the same spot. */
1044 gdb_assert (npc
!= 0 || nnpc
!= 0);
1045 gdb_assert (nnpc
!= npc
);
1050 target_remove_breakpoint (npc
, npc_save
);
1052 target_remove_breakpoint (nnpc
, nnpc_save
);
1057 sparc_write_pc (CORE_ADDR pc
, ptid_t ptid
)
1059 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1061 write_register_pid (tdep
->pc_regnum
, pc
, ptid
);
1062 write_register_pid (tdep
->npc_regnum
, pc
+ 4, ptid
);
1065 /* Unglobalize NAME. */
1068 sparc_stabs_unglobalize_name (char *name
)
1070 /* The Sun compilers (Sun ONE Studio, Forte Developer, Sun WorkShop,
1071 SunPRO) convert file static variables into global values, a
1072 process known as globalization. In order to do this, the
1073 compiler will create a unique prefix and prepend it to each file
1074 static variable. For static variables within a function, this
1075 globalization prefix is followed by the function name (nested
1076 static variables within a function are supposed to generate a
1077 warning message, and are left alone). The procedure is
1078 documented in the Stabs Interface Manual, which is distrubuted
1079 with the compilers, although version 4.0 of the manual seems to
1080 be incorrect in some places, at least for SPARC. The
1081 globalization prefix is encoded into an N_OPT stab, with the form
1082 "G=<prefix>". The globalization prefix always seems to start
1083 with a dollar sign '$'; a dot '.' is used as a seperator. So we
1084 simply strip everything up until the last dot. */
1088 char *p
= strrchr (name
, '.');
1097 /* Return the appropriate register set for the core section identified
1098 by SECT_NAME and SECT_SIZE. */
1100 const struct regset
*
1101 sparc_regset_from_core_section (struct gdbarch
*gdbarch
,
1102 const char *sect_name
, size_t sect_size
)
1104 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1106 if (strcmp (sect_name
, ".reg") == 0 && sect_size
>= tdep
->sizeof_gregset
)
1107 return tdep
->gregset
;
1109 if (strcmp (sect_name
, ".reg2") == 0 && sect_size
>= tdep
->sizeof_fpregset
)
1110 return tdep
->fpregset
;
1116 static struct gdbarch
*
1117 sparc32_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1119 struct gdbarch_tdep
*tdep
;
1120 struct gdbarch
*gdbarch
;
1122 /* If there is already a candidate, use it. */
1123 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1125 return arches
->gdbarch
;
1127 /* Allocate space for the new architecture. */
1128 tdep
= XMALLOC (struct gdbarch_tdep
);
1129 gdbarch
= gdbarch_alloc (&info
, tdep
);
1131 tdep
->pc_regnum
= SPARC32_PC_REGNUM
;
1132 tdep
->npc_regnum
= SPARC32_NPC_REGNUM
;
1133 tdep
->gregset
= NULL
;
1134 tdep
->sizeof_gregset
= 0;
1135 tdep
->fpregset
= NULL
;
1136 tdep
->sizeof_fpregset
= 0;
1137 tdep
->plt_entry_size
= 0;
1139 set_gdbarch_long_double_bit (gdbarch
, 128);
1140 set_gdbarch_long_double_format (gdbarch
, &floatformat_sparc_quad
);
1142 set_gdbarch_num_regs (gdbarch
, SPARC32_NUM_REGS
);
1143 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
1144 set_gdbarch_register_type (gdbarch
, sparc32_register_type
);
1145 set_gdbarch_num_pseudo_regs (gdbarch
, SPARC32_NUM_PSEUDO_REGS
);
1146 set_gdbarch_pseudo_register_read (gdbarch
, sparc32_pseudo_register_read
);
1147 set_gdbarch_pseudo_register_write (gdbarch
, sparc32_pseudo_register_write
);
1149 /* Register numbers of various important registers. */
1150 set_gdbarch_sp_regnum (gdbarch
, SPARC_SP_REGNUM
); /* %sp */
1151 set_gdbarch_pc_regnum (gdbarch
, SPARC32_PC_REGNUM
); /* %pc */
1152 set_gdbarch_fp0_regnum (gdbarch
, SPARC_F0_REGNUM
); /* %f0 */
1154 /* Call dummy code. */
1155 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
1156 set_gdbarch_push_dummy_code (gdbarch
, sparc32_push_dummy_code
);
1157 set_gdbarch_push_dummy_call (gdbarch
, sparc32_push_dummy_call
);
1159 set_gdbarch_return_value (gdbarch
, sparc32_return_value
);
1160 set_gdbarch_stabs_argument_has_addr
1161 (gdbarch
, sparc32_stabs_argument_has_addr
);
1163 set_gdbarch_skip_prologue (gdbarch
, sparc32_skip_prologue
);
1165 /* Stack grows downward. */
1166 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1168 set_gdbarch_breakpoint_from_pc (gdbarch
, sparc_breakpoint_from_pc
);
1170 set_gdbarch_frame_args_skip (gdbarch
, 8);
1172 set_gdbarch_print_insn (gdbarch
, print_insn_sparc
);
1174 set_gdbarch_software_single_step (gdbarch
, sparc_software_single_step
);
1175 set_gdbarch_write_pc (gdbarch
, sparc_write_pc
);
1177 set_gdbarch_unwind_dummy_id (gdbarch
, sparc_unwind_dummy_id
);
1179 set_gdbarch_unwind_pc (gdbarch
, sparc_unwind_pc
);
1181 frame_base_set_default (gdbarch
, &sparc32_frame_base
);
1183 /* Hook in ABI-specific overrides, if they have been registered. */
1184 gdbarch_init_osabi (info
, gdbarch
);
1186 frame_unwind_append_sniffer (gdbarch
, sparc32_frame_sniffer
);
1188 /* If we have register sets, enable the generic core file support. */
1190 set_gdbarch_regset_from_core_section (gdbarch
,
1191 sparc_regset_from_core_section
);
1196 /* Helper functions for dealing with register windows. */
1199 sparc_supply_rwindow (struct regcache
*regcache
, CORE_ADDR sp
, int regnum
)
1207 /* Registers are 64-bit. */
1210 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1212 if (regnum
== i
|| regnum
== -1)
1214 target_read_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 8), buf
, 8);
1215 regcache_raw_supply (regcache
, i
, buf
);
1221 /* Registers are 32-bit. Toss any sign-extension of the stack
1225 /* Clear out the top half of the temporary buffer, and put the
1226 register value in the bottom half if we're in 64-bit mode. */
1227 if (gdbarch_ptr_bit (current_gdbarch
) == 64)
1233 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1235 if (regnum
== i
|| regnum
== -1)
1237 target_read_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 4),
1240 /* Handle StackGhost. */
1241 if (i
== SPARC_I7_REGNUM
)
1243 ULONGEST wcookie
= sparc_fetch_wcookie ();
1244 ULONGEST i7
= extract_unsigned_integer (buf
+ offset
, 4);
1246 store_unsigned_integer (buf
+ offset
, 4, i7
^ wcookie
);
1249 regcache_raw_supply (regcache
, i
, buf
);
1256 sparc_collect_rwindow (const struct regcache
*regcache
,
1257 CORE_ADDR sp
, int regnum
)
1265 /* Registers are 64-bit. */
1268 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1270 if (regnum
== -1 || regnum
== SPARC_SP_REGNUM
|| regnum
== i
)
1272 regcache_raw_collect (regcache
, i
, buf
);
1273 target_write_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 8), buf
, 8);
1279 /* Registers are 32-bit. Toss any sign-extension of the stack
1283 /* Only use the bottom half if we're in 64-bit mode. */
1284 if (gdbarch_ptr_bit (current_gdbarch
) == 64)
1287 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1289 if (regnum
== -1 || regnum
== SPARC_SP_REGNUM
|| regnum
== i
)
1291 regcache_raw_collect (regcache
, i
, buf
);
1293 /* Handle StackGhost. */
1294 if (i
== SPARC_I7_REGNUM
)
1296 ULONGEST wcookie
= sparc_fetch_wcookie ();
1297 ULONGEST i7
= extract_unsigned_integer (buf
+ offset
, 4);
1299 store_unsigned_integer (buf
+ offset
, 4, i7
^ wcookie
);
1302 target_write_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 4),
1309 /* Helper functions for dealing with register sets. */
1312 sparc32_supply_gregset (const struct sparc_gregset
*gregset
,
1313 struct regcache
*regcache
,
1314 int regnum
, const void *gregs
)
1316 const char *regs
= gregs
;
1319 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1320 regcache_raw_supply (regcache
, SPARC32_PSR_REGNUM
,
1321 regs
+ gregset
->r_psr_offset
);
1323 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1324 regcache_raw_supply (regcache
, SPARC32_PC_REGNUM
,
1325 regs
+ gregset
->r_pc_offset
);
1327 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1328 regcache_raw_supply (regcache
, SPARC32_NPC_REGNUM
,
1329 regs
+ gregset
->r_npc_offset
);
1331 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1332 regcache_raw_supply (regcache
, SPARC32_Y_REGNUM
,
1333 regs
+ gregset
->r_y_offset
);
1335 if (regnum
== SPARC_G0_REGNUM
|| regnum
== -1)
1336 regcache_raw_supply (regcache
, SPARC_G0_REGNUM
, NULL
);
1338 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1340 int offset
= gregset
->r_g1_offset
;
1342 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1344 if (regnum
== i
|| regnum
== -1)
1345 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1350 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1352 /* Not all of the register set variants include Locals and
1353 Inputs. For those that don't, we read them off the stack. */
1354 if (gregset
->r_l0_offset
== -1)
1358 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
1359 sparc_supply_rwindow (regcache
, sp
, regnum
);
1363 int offset
= gregset
->r_l0_offset
;
1365 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1367 if (regnum
== i
|| regnum
== -1)
1368 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1376 sparc32_collect_gregset (const struct sparc_gregset
*gregset
,
1377 const struct regcache
*regcache
,
1378 int regnum
, void *gregs
)
1383 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1384 regcache_raw_collect (regcache
, SPARC32_PSR_REGNUM
,
1385 regs
+ gregset
->r_psr_offset
);
1387 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1388 regcache_raw_collect (regcache
, SPARC32_PC_REGNUM
,
1389 regs
+ gregset
->r_pc_offset
);
1391 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1392 regcache_raw_collect (regcache
, SPARC32_NPC_REGNUM
,
1393 regs
+ gregset
->r_npc_offset
);
1395 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1396 regcache_raw_collect (regcache
, SPARC32_Y_REGNUM
,
1397 regs
+ gregset
->r_y_offset
);
1399 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1401 int offset
= gregset
->r_g1_offset
;
1403 /* %g0 is always zero. */
1404 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1406 if (regnum
== i
|| regnum
== -1)
1407 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1412 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1414 /* Not all of the register set variants include Locals and
1415 Inputs. For those that don't, we read them off the stack. */
1416 if (gregset
->r_l0_offset
!= -1)
1418 int offset
= gregset
->r_l0_offset
;
1420 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1422 if (regnum
== i
|| regnum
== -1)
1423 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1431 sparc32_supply_fpregset (struct regcache
*regcache
,
1432 int regnum
, const void *fpregs
)
1434 const char *regs
= fpregs
;
1437 for (i
= 0; i
< 32; i
++)
1439 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1440 regcache_raw_supply (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1443 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1444 regcache_raw_supply (regcache
, SPARC32_FSR_REGNUM
, regs
+ (32 * 4) + 4);
1448 sparc32_collect_fpregset (const struct regcache
*regcache
,
1449 int regnum
, void *fpregs
)
1451 char *regs
= fpregs
;
1454 for (i
= 0; i
< 32; i
++)
1456 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1457 regcache_raw_collect (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1460 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1461 regcache_raw_collect (regcache
, SPARC32_FSR_REGNUM
, regs
+ (32 * 4) + 4);
1467 /* From <machine/reg.h>. */
1468 const struct sparc_gregset sparc32_sunos4_gregset
=
1481 /* Provide a prototype to silence -Wmissing-prototypes. */
1482 void _initialize_sparc_tdep (void);
1485 _initialize_sparc_tdep (void)
1487 register_gdbarch_init (bfd_arch_sparc
, sparc32_gdbarch_init
);