1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
27 #include "symfile.h" /* for objfiles.h */
28 #include "objfiles.h" /* for find_pc_section */
31 #include <sys/procfs.h>
37 extern int stop_after_trap
;
39 /* We don't store all registers immediately when requested, since they
40 get sent over in large chunks anyway. Instead, we accumulate most
41 of the changes and send them over once. "deferred_stores" keeps
42 track of which sets of registers we have locally-changed copies of,
43 so we only need send the groups that have changed. */
45 int deferred_stores
= 0; /* Cumulates stores we want to do eventually. */
49 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
52 /* Simulate single-step ptrace call for sun4. Code written by Gary
53 Beihl (beihl@mcc.com). */
55 /* npc4 and next_pc describe the situation at the time that the
56 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
57 static CORE_ADDR next_pc
, npc4
, target
;
58 static int brknpc4
, brktrg
;
59 typedef char binsn_quantum
[BREAKPOINT_MAX
];
60 static binsn_quantum break_mem
[3];
62 /* Non-zero if we just simulated a single-step ptrace call. This is
63 needed because we cannot remove the breakpoints in the inferior
64 process until after the `wait' in `wait_for_inferior'. Used for
69 /* single_step() is called just before we want to resume the inferior,
70 if we want to single-step it but there is no hardware or kernel single-step
71 support (as on all SPARCs). We find all the possible targets of the
72 coming instruction and breakpoint them.
74 single_step is also called just after the inferior stops. If we had
75 set up a simulated single-step, we undo our damage. */
79 int ignore
; /* pid, but we don't need it */
81 branch_type br
, isannulled();
87 /* Always set breakpoint for NPC. */
88 next_pc
= read_register (NPC_REGNUM
);
89 npc4
= next_pc
+ 4; /* branch not taken */
91 target_insert_breakpoint (next_pc
, break_mem
[0]);
92 /* printf_unfiltered ("set break at %x\n",next_pc); */
94 pc
= read_register (PC_REGNUM
);
95 pc_instruction
= read_memory_integer (pc
, sizeof(pc_instruction
));
96 br
= isannulled (pc_instruction
, pc
, &target
);
101 /* Conditional annulled branch will either end up at
102 npc (if taken) or at npc+4 (if not taken).
105 target_insert_breakpoint (npc4
, break_mem
[1]);
107 else if (br
== baa
&& target
!= next_pc
)
109 /* Unconditional annulled branch will always end up at
112 target_insert_breakpoint (target
, break_mem
[2]);
115 /* We are ready to let it go */
121 /* Remove breakpoints */
122 target_remove_breakpoint (next_pc
, break_mem
[0]);
125 target_remove_breakpoint (npc4
, break_mem
[1]);
128 target_remove_breakpoint (target
, break_mem
[2]);
135 sparc_frame_chain (thisframe
)
138 char buf
[MAX_REGISTER_RAW_SIZE
];
142 addr
= thisframe
->frame
+ FRAME_SAVED_I0
+
143 REGISTER_RAW_SIZE (FP_REGNUM
) * (FP_REGNUM
- I0_REGNUM
);
144 err
= target_read_memory (addr
, buf
, REGISTER_RAW_SIZE (FP_REGNUM
));
147 return extract_address (buf
, REGISTER_RAW_SIZE (FP_REGNUM
));
151 sparc_extract_struct_value_address (regbuf
)
152 char regbuf
[REGISTER_BYTES
];
154 return read_memory_integer (((int *)(regbuf
))[SP_REGNUM
]+(16*4),
155 TARGET_PTR_BIT
/ TARGET_CHAR_BIT
);
158 /* Find the pc saved in frame FRAME. */
161 sparc_frame_saved_pc (frame
)
164 char buf
[MAX_REGISTER_RAW_SIZE
];
167 if (frame
->signal_handler_caller
)
169 /* This is the signal trampoline frame.
170 Get the saved PC from the sigcontext structure. */
172 #ifndef SIGCONTEXT_PC_OFFSET
173 #define SIGCONTEXT_PC_OFFSET 12
176 CORE_ADDR sigcontext_addr
;
177 char scbuf
[TARGET_PTR_BIT
/ HOST_CHAR_BIT
];
179 /* The sigcontext address is contained in register O2. */
180 get_saved_register (buf
, (int *)NULL
, (CORE_ADDR
*)NULL
,
181 frame
, O0_REGNUM
+ 2, (enum lval_type
*)NULL
);
182 sigcontext_addr
= extract_address (buf
, REGISTER_RAW_SIZE (O0_REGNUM
));
184 /* Don't cause a memory_error when accessing sigcontext in case the
185 stack layout has changed or the stack is corrupt. */
186 target_read_memory (sigcontext_addr
+ SIGCONTEXT_PC_OFFSET
,
187 scbuf
, sizeof (scbuf
));
188 return extract_address (scbuf
, sizeof (scbuf
));
190 addr
= (frame
->bottom
+ FRAME_SAVED_I0
+
191 REGISTER_RAW_SIZE (I7_REGNUM
) * (I7_REGNUM
- I0_REGNUM
));
192 read_memory (addr
, buf
, REGISTER_RAW_SIZE (I7_REGNUM
));
193 return PC_ADJUST (extract_address (buf
, REGISTER_RAW_SIZE (I7_REGNUM
)));
197 * Since an individual frame in the frame cache is defined by two
198 * arguments (a frame pointer and a stack pointer), we need two
199 * arguments to get info for an arbitrary stack frame. This routine
200 * takes two arguments and makes the cached frames look as if these
201 * two arguments defined a frame on the cache. This allows the rest
202 * of info frame to extract the important arguments without
206 setup_arbitrary_frame (argc
, argv
)
213 error ("Sparc frame specifications require two arguments: fp and sp");
215 fid
= create_new_frame (argv
[0], 0);
218 fatal ("internal: create_new_frame returned invalid frame id");
220 fid
->bottom
= argv
[1];
221 fid
->pc
= FRAME_SAVED_PC (fid
);
225 /* Given a pc value, skip it forward past the function prologue by
226 disassembling instructions that appear to be a prologue.
228 If FRAMELESS_P is set, we are only testing to see if the function
229 is frameless. This allows a quicker answer.
231 This routine should be more specific in its actions; making sure
232 that it uses the same register in the initial prologue section. */
234 skip_prologue (start_pc
, frameless_p
)
240 unsigned long int code
;
246 unsigned int imm22
:22;
255 unsigned int simm13
:13;
260 CORE_ADDR pc
= start_pc
;
262 x
.i
= read_memory_integer (pc
, 4);
264 /* Recognize the `sethi' insn and record its destination. */
265 if (x
.sethi
.op
== 0 && x
.sethi
.op2
== 4)
269 x
.i
= read_memory_integer (pc
, 4);
272 /* Recognize an add immediate value to register to either %g1 or
273 the destination register recorded above. Actually, this might
274 well recognize several different arithmetic operations.
275 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
276 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
277 I imagine any compiler really does that, however). */
278 if (x
.add
.op
== 2 && x
.add
.i
&& (x
.add
.rd
== 1 || x
.add
.rd
== dest
))
281 x
.i
= read_memory_integer (pc
, 4);
284 /* This recognizes any SAVE insn. But why do the XOR and then
285 the compare? That's identical to comparing against 60 (as long
286 as there isn't any sign extension). */
287 if (x
.add
.op
== 2 && (x
.add
.op3
^ 32) == 28)
290 if (frameless_p
) /* If the save is all we care about, */
291 return pc
; /* return before doing more work */
292 x
.i
= read_memory_integer (pc
, 4);
296 /* Without a save instruction, it's not a prologue. */
300 /* Now we need to recognize stores into the frame from the input
301 registers. This recognizes all non alternate stores of input
302 register, into a location offset from the frame pointer. */
304 && (x
.add
.op3
& 0x3c) == 4 /* Store, non-alternate. */
305 && (x
.add
.rd
& 0x18) == 0x18 /* Input register. */
306 && x
.add
.i
/* Immediate mode. */
307 && x
.add
.rs1
== 30 /* Off of frame pointer. */
308 /* Into reserved stack space. */
309 && x
.add
.simm13
>= 0x44
310 && x
.add
.simm13
< 0x5b)
313 x
.i
= read_memory_integer (pc
, 4);
318 /* Check instruction at ADDR to see if it is an annulled branch.
319 All other instructions will go to NPC or will trap.
320 Set *TARGET if we find a canidate branch; set to zero if not. */
323 isannulled (instruction
, addr
, target
)
325 CORE_ADDR addr
, *target
;
327 branch_type val
= not_branch
;
328 long int offset
; /* Must be signed for sign-extend. */
331 unsigned long int code
;
338 unsigned int disp22
:22;
343 insn
.code
= instruction
;
346 && (insn
.b
.op2
== 2 || insn
.b
.op2
== 6 || insn
.b
.op2
== 7))
348 if (insn
.b
.cond
== 8)
349 val
= insn
.b
.a
? baa
: ba
;
351 val
= insn
.b
.a
? bicca
: bicc
;
352 offset
= 4 * ((int) (insn
.b
.disp22
<< 10) >> 10);
353 *target
= addr
+ offset
;
359 /* sparc_frame_find_saved_regs ()
361 Stores, into a struct frame_saved_regs,
362 the addresses of the saved registers of frame described by FRAME_INFO.
363 This includes special registers such as pc and fp saved in special
364 ways in the stack frame. sp is even more special:
365 the address we return for it IS the sp for the next frame.
367 Note that on register window machines, we are currently making the
368 assumption that window registers are being saved somewhere in the
369 frame in which they are being used. If they are stored in an
370 inferior frame, find_saved_register will break.
372 On the Sun 4, the only time all registers are saved is when
373 a dummy frame is involved. Otherwise, the only saved registers
374 are the LOCAL and IN registers which are saved as a result
375 of the "save/restore" opcodes. This condition is determined
376 by address rather than by value.
378 The "pc" is not stored in a frame on the SPARC. (What is stored
379 is a return address minus 8.) sparc_pop_frame knows how to
380 deal with that. Other routines might or might not.
382 See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information
383 about how this works. */
386 sparc_frame_find_saved_regs (fi
, saved_regs_addr
)
387 struct frame_info
*fi
;
388 struct frame_saved_regs
*saved_regs_addr
;
391 FRAME_ADDR frame
= FRAME_FP(fi
);
392 FRAME fid
= FRAME_INFO_ID (fi
);
395 fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS");
397 memset (saved_regs_addr
, 0, sizeof (*saved_regs_addr
));
399 if (fi
->pc
>= (fi
->bottom
? fi
->bottom
:
400 read_register (SP_REGNUM
))
401 && fi
->pc
<= FRAME_FP(fi
))
403 /* Dummy frame. All but the window regs are in there somewhere. */
404 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+7; regnum
++)
405 saved_regs_addr
->regs
[regnum
] =
406 frame
+ (regnum
- G0_REGNUM
) * 4 - 0xa0;
407 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+8; regnum
++)
408 saved_regs_addr
->regs
[regnum
] =
409 frame
+ (regnum
- I0_REGNUM
) * 4 - 0xc0;
410 for (regnum
= FP0_REGNUM
; regnum
< FP0_REGNUM
+ 32; regnum
++)
411 saved_regs_addr
->regs
[regnum
] =
412 frame
+ (regnum
- FP0_REGNUM
) * 4 - 0x80;
413 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
414 saved_regs_addr
->regs
[regnum
] =
415 frame
+ (regnum
- Y_REGNUM
) * 4 - 0xe0;
417 fi
->bottom
: read_register (SP_REGNUM
);
421 /* Normal frame. Just Local and In registers */
423 fi
->bottom
: read_register (SP_REGNUM
);
424 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+16; regnum
++)
425 saved_regs_addr
->regs
[regnum
] = frame
+ (regnum
-L0_REGNUM
) * 4;
429 /* Pull off either the next frame pointer or the stack pointer */
430 FRAME_ADDR next_next_frame
=
433 read_register (SP_REGNUM
));
434 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+8; regnum
++)
435 saved_regs_addr
->regs
[regnum
] = next_next_frame
+ regnum
* 4;
437 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
438 saved_regs_addr
->regs
[SP_REGNUM
] = FRAME_FP (fi
);
441 /* Push an empty stack frame, and record in it the current PC, regs, etc.
443 We save the non-windowed registers and the ins. The locals and outs
444 are new; they don't need to be saved. The i's and l's of
445 the last frame were already saved on the stack. */
447 /* Definitely see tm-sparc.h for more doc of the frame format here. */
450 sparc_push_dummy_frame ()
452 CORE_ADDR sp
, old_sp
;
453 char register_temp
[0x140];
455 old_sp
= sp
= read_register (SP_REGNUM
);
457 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
458 read_register_bytes (REGISTER_BYTE (Y_REGNUM
), ®ister_temp
[0],
459 REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
461 read_register_bytes (REGISTER_BYTE (O0_REGNUM
), ®ister_temp
[8 * 4],
462 REGISTER_RAW_SIZE (O0_REGNUM
) * 8);
464 read_register_bytes (REGISTER_BYTE (G0_REGNUM
), ®ister_temp
[16 * 4],
465 REGISTER_RAW_SIZE (G0_REGNUM
) * 8);
467 read_register_bytes (REGISTER_BYTE (FP0_REGNUM
), ®ister_temp
[24 * 4],
468 REGISTER_RAW_SIZE (FP0_REGNUM
) * 32);
472 write_register (SP_REGNUM
, sp
);
474 write_memory (sp
+ 0x60, ®ister_temp
[0], (8 + 8 + 8 + 32) * 4);
476 write_register (FP_REGNUM
, old_sp
);
478 /* Set return address register for the call dummy to the current PC. */
479 write_register (I7_REGNUM
, read_pc() - 8);
482 /* Discard from the stack the innermost frame, restoring all saved registers.
484 Note that the values stored in fsr by get_frame_saved_regs are *in
485 the context of the called frame*. What this means is that the i
486 regs of fsr must be restored into the o regs of the (calling) frame that
487 we pop into. We don't care about the output regs of the calling frame,
488 since unless it's a dummy frame, it won't have any output regs in it.
490 We never have to bother with %l (local) regs, since the called routine's
491 locals get tossed, and the calling routine's locals are already saved
494 /* Definitely see tm-sparc.h for more doc of the frame format here. */
499 register FRAME frame
= get_current_frame ();
500 register CORE_ADDR pc
;
501 struct frame_saved_regs fsr
;
502 struct frame_info
*fi
;
503 char raw_buffer
[REGISTER_BYTES
];
505 fi
= get_frame_info (frame
);
506 get_frame_saved_regs (fi
, &fsr
);
507 if (fsr
.regs
[FP0_REGNUM
])
509 read_memory (fsr
.regs
[FP0_REGNUM
], raw_buffer
, 32 * 4);
510 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
), raw_buffer
, 32 * 4);
512 if (fsr
.regs
[FPS_REGNUM
])
514 read_memory (fsr
.regs
[FPS_REGNUM
], raw_buffer
, 4);
515 write_register_bytes (REGISTER_BYTE (FPS_REGNUM
), raw_buffer
, 4);
517 if (fsr
.regs
[CPS_REGNUM
])
519 read_memory (fsr
.regs
[CPS_REGNUM
], raw_buffer
, 4);
520 write_register_bytes (REGISTER_BYTE (CPS_REGNUM
), raw_buffer
, 4);
522 if (fsr
.regs
[G1_REGNUM
])
524 read_memory (fsr
.regs
[G1_REGNUM
], raw_buffer
, 7 * 4);
525 write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
, 7 * 4);
527 if (fsr
.regs
[I0_REGNUM
])
531 char reg_temp
[REGISTER_BYTES
];
533 read_memory (fsr
.regs
[I0_REGNUM
], raw_buffer
, 8 * 4);
535 /* Get the ins and locals which we are about to restore. Just
536 moving the stack pointer is all that is really needed, except
537 store_inferior_registers is then going to write the ins and
538 locals from the registers array, so we need to muck with the
540 sp
= fsr
.regs
[SP_REGNUM
];
541 read_memory (sp
, reg_temp
, REGISTER_RAW_SIZE (L0_REGNUM
) * 16);
543 /* Restore the out registers.
544 Among other things this writes the new stack pointer. */
545 write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
,
546 REGISTER_RAW_SIZE (O0_REGNUM
) * 8);
548 write_register_bytes (REGISTER_BYTE (L0_REGNUM
), reg_temp
,
549 REGISTER_RAW_SIZE (L0_REGNUM
) * 16);
551 if (fsr
.regs
[PS_REGNUM
])
552 write_register (PS_REGNUM
, read_memory_integer (fsr
.regs
[PS_REGNUM
], 4));
553 if (fsr
.regs
[Y_REGNUM
])
554 write_register (Y_REGNUM
, read_memory_integer (fsr
.regs
[Y_REGNUM
], 4));
555 if (fsr
.regs
[PC_REGNUM
])
557 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
558 write_register (PC_REGNUM
, read_memory_integer (fsr
.regs
[PC_REGNUM
], 4));
559 if (fsr
.regs
[NPC_REGNUM
])
560 write_register (NPC_REGNUM
,
561 read_memory_integer (fsr
.regs
[NPC_REGNUM
], 4));
563 else if (fsr
.regs
[I7_REGNUM
])
565 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
566 pc
= PC_ADJUST (read_memory_integer (fsr
.regs
[I7_REGNUM
], 4));
567 write_register (PC_REGNUM
, pc
);
568 write_register (NPC_REGNUM
, pc
+ 4);
570 flush_cached_frames ();
571 set_current_frame ( create_new_frame (read_register (FP_REGNUM
),
575 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
576 encodes the structure size being returned. If we detect such
577 a fake insn, step past it. */
587 err
= target_read_memory (pc
+ 8, buf
, sizeof(long));
588 insn
= extract_unsigned_integer (buf
, 4);
589 if ((err
== 0) && (insn
& 0xfffffe00) == 0)
595 #ifdef USE_PROC_FS /* Target dependent support for /proc */
597 /* The /proc interface divides the target machine's register set up into
598 two different sets, the general register set (gregset) and the floating
599 point register set (fpregset). For each set, there is an ioctl to get
600 the current register set and another ioctl to set the current values.
602 The actual structure passed through the ioctl interface is, of course,
603 naturally machine dependent, and is different for each set of registers.
604 For the sparc for example, the general register set is typically defined
607 typedef int gregset_t[38];
613 and the floating point set by:
615 typedef struct prfpregset {
623 u_char pr_q_entrysize;
628 These routines provide the packing and unpacking of gregset_t and
629 fpregset_t formatted data.
634 /* Given a pointer to a general register set in /proc format (gregset_t *),
635 unpack the register contents and supply them as gdb's idea of the current
639 supply_gregset (gregsetp
)
640 prgregset_t
*gregsetp
;
643 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
645 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
646 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
648 supply_register (regi
, (char *) (regp
+ regi
));
651 /* These require a bit more care. */
652 supply_register (PS_REGNUM
, (char *) (regp
+ R_PS
));
653 supply_register (PC_REGNUM
, (char *) (regp
+ R_PC
));
654 supply_register (NPC_REGNUM
,(char *) (regp
+ R_nPC
));
655 supply_register (Y_REGNUM
, (char *) (regp
+ R_Y
));
659 fill_gregset (gregsetp
, regno
)
660 prgregset_t
*gregsetp
;
664 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
665 extern char registers
[];
667 for (regi
= 0 ; regi
<= R_I7
; regi
++)
669 if ((regno
== -1) || (regno
== regi
))
671 *(regp
+ regi
) = *(int *) ®isters
[REGISTER_BYTE (regi
)];
674 if ((regno
== -1) || (regno
== PS_REGNUM
))
676 *(regp
+ R_PS
) = *(int *) ®isters
[REGISTER_BYTE (PS_REGNUM
)];
678 if ((regno
== -1) || (regno
== PC_REGNUM
))
680 *(regp
+ R_PC
) = *(int *) ®isters
[REGISTER_BYTE (PC_REGNUM
)];
682 if ((regno
== -1) || (regno
== NPC_REGNUM
))
684 *(regp
+ R_nPC
) = *(int *) ®isters
[REGISTER_BYTE (NPC_REGNUM
)];
686 if ((regno
== -1) || (regno
== Y_REGNUM
))
688 *(regp
+ R_Y
) = *(int *) ®isters
[REGISTER_BYTE (Y_REGNUM
)];
692 #if defined (FP0_REGNUM)
694 /* Given a pointer to a floating point register set in /proc format
695 (fpregset_t *), unpack the register contents and supply them as gdb's
696 idea of the current floating point register values. */
699 supply_fpregset (fpregsetp
)
700 prfpregset_t
*fpregsetp
;
705 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
707 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
708 supply_register (regi
, from
);
710 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
713 /* Given a pointer to a floating point register set in /proc format
714 (fpregset_t *), update the register specified by REGNO from gdb's idea
715 of the current floating point register set. If REGNO is -1, update
719 fill_fpregset (fpregsetp
, regno
)
720 prfpregset_t
*fpregsetp
;
726 extern char registers
[];
728 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
730 if ((regno
== -1) || (regno
== regi
))
732 from
= (char *) ®isters
[REGISTER_BYTE (regi
)];
733 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
734 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
737 if ((regno
== -1) || (regno
== FPS_REGNUM
))
739 fpregsetp
->pr_fsr
= *(int *) ®isters
[REGISTER_BYTE (FPS_REGNUM
)];
743 #endif /* defined (FP0_REGNUM) */
745 #endif /* USE_PROC_FS */
748 #ifdef GET_LONGJMP_TARGET
750 /* Figure out where the longjmp will land. We expect that we have just entered
751 longjmp and haven't yet setup the stack frame, so the args are still in the
752 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
753 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
754 This routine returns true on success */
757 get_longjmp_target(pc
)
761 #define LONGJMP_TARGET_SIZE 4
762 char buf
[LONGJMP_TARGET_SIZE
];
764 jb_addr
= read_register(O0_REGNUM
);
766 if (target_read_memory(jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, buf
,
767 LONGJMP_TARGET_SIZE
))
770 *pc
= extract_address (buf
, LONGJMP_TARGET_SIZE
);
774 #endif /* GET_LONGJMP_TARGET */
776 /* So far used only for sparc solaris. In sparc solaris, we recognize
777 a trampoline by it's section name. That is, if the pc is in a
778 section named ".plt" then we are in a trampline. */
781 in_solib_trampoline(pc
, name
)
785 struct obj_section
*s
;
788 s
= find_pc_section(pc
);
791 && s
->sec_ptr
->name
!= NULL
792 && STREQ (s
->sec_ptr
->name
, ".plt"));