1 /* Target-dependent code for SPARC.
3 Copyright (C) 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street, Fifth Floor,
20 Boston, MA 02110-1301, USA. */
23 #include "arch-utils.h"
25 #include "dwarf2-frame.h"
26 #include "floatformat.h"
28 #include "frame-base.h"
29 #include "frame-unwind.h"
40 #include "gdb_assert.h"
41 #include "gdb_string.h"
43 #include "sparc-tdep.h"
47 /* This file implements the SPARC 32-bit ABI as defined by the section
48 "Low-Level System Information" of the SPARC Compliance Definition
49 (SCD) 2.4.1, which is the 32-bit System V psABI for SPARC. The SCD
50 lists changes with respect to the original 32-bit psABI as defined
51 in the "System V ABI, SPARC Processor Supplement".
53 Note that if we talk about SunOS, we mean SunOS 4.x, which was
54 BSD-based, which is sometimes (retroactively?) referred to as
55 Solaris 1.x. If we talk about Solaris we mean Solaris 2.x and
56 above (Solaris 7, 8 and 9 are nothing but Solaris 2.7, 2.8 and 2.9
57 suffering from severe version number inflation). Solaris 2.x is
58 also known as SunOS 5.x, since that's what uname(1) says. Solaris
61 /* Please use the sparc32_-prefix for 32-bit specific code, the
62 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
63 code that can handle both. The 64-bit specific code lives in
64 sparc64-tdep.c; don't add any here. */
66 /* The SPARC Floating-Point Quad-Precision format is similar to
67 big-endian IA-64 Quad-recision format. */
68 #define floatformats_sparc_quad floatformats_ia64_quad
70 /* The stack pointer is offset from the stack frame by a BIAS of 2047
71 (0x7ff) for 64-bit code. BIAS is likely to be defined on SPARC
72 hosts, so undefine it first. */
76 /* Macros to extract fields from SPARC instructions. */
77 #define X_OP(i) (((i) >> 30) & 0x3)
78 #define X_RD(i) (((i) >> 25) & 0x1f)
79 #define X_A(i) (((i) >> 29) & 1)
80 #define X_COND(i) (((i) >> 25) & 0xf)
81 #define X_OP2(i) (((i) >> 22) & 0x7)
82 #define X_IMM22(i) ((i) & 0x3fffff)
83 #define X_OP3(i) (((i) >> 19) & 0x3f)
84 #define X_RS1(i) (((i) >> 14) & 0x1f)
85 #define X_I(i) (((i) >> 13) & 1)
86 /* Sign extension macros. */
87 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
88 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
89 #define X_SIMM13(i) ((((i) & 0x1fff) ^ 0x1000) - 0x1000)
91 /* Fetch the instruction at PC. Instructions are always big-endian
92 even if the processor operates in little-endian mode. */
95 sparc_fetch_instruction (CORE_ADDR pc
)
101 /* If we can't read the instruction at PC, return zero. */
102 if (read_memory_nobpt (pc
, buf
, sizeof (buf
)))
106 for (i
= 0; i
< sizeof (buf
); i
++)
107 insn
= (insn
<< 8) | buf
[i
];
112 /* Return non-zero if the instruction corresponding to PC is an "unimp"
116 sparc_is_unimp_insn (CORE_ADDR pc
)
118 const unsigned long insn
= sparc_fetch_instruction (pc
);
120 return ((insn
& 0xc1c00000) == 0);
123 /* OpenBSD/sparc includes StackGhost, which according to the author's
124 website http://stackghost.cerias.purdue.edu "... transparently and
125 automatically protects applications' stack frames; more
126 specifically, it guards the return pointers. The protection
127 mechanisms require no application source or binary modification and
128 imposes only a negligible performance penalty."
130 The same website provides the following description of how
133 "StackGhost interfaces with the kernel trap handler that would
134 normally write out registers to the stack and the handler that
135 would read them back in. By XORing a cookie into the
136 return-address saved in the user stack when it is actually written
137 to the stack, and then XOR it out when the return-address is pulled
138 from the stack, StackGhost can cause attacker corrupted return
139 pointers to behave in a manner the attacker cannot predict.
140 StackGhost can also use several unused bits in the return pointer
141 to detect a smashed return pointer and abort the process."
143 For GDB this means that whenever we're reading %i7 from a stack
144 frame's window save area, we'll have to XOR the cookie.
146 More information on StackGuard can be found on in:
148 Mike Frantzen and Mike Shuey. "StackGhost: Hardware Facilitated
149 Stack Protection." 2001. Published in USENIX Security Symposium
152 /* Fetch StackGhost Per-Process XOR cookie. */
155 sparc_fetch_wcookie (void)
157 struct target_ops
*ops
= ¤t_target
;
161 len
= target_read (ops
, TARGET_OBJECT_WCOOKIE
, NULL
, buf
, 0, 8);
165 /* We should have either an 32-bit or an 64-bit cookie. */
166 gdb_assert (len
== 4 || len
== 8);
168 return extract_unsigned_integer (buf
, len
);
172 /* Return the contents if register REGNUM as an address. */
175 sparc_address_from_register (int regnum
)
179 regcache_cooked_read_unsigned (current_regcache
, regnum
, &addr
);
184 /* The functions on this page are intended to be used to classify
185 function arguments. */
187 /* Check whether TYPE is "Integral or Pointer". */
190 sparc_integral_or_pointer_p (const struct type
*type
)
192 int len
= TYPE_LENGTH (type
);
194 switch (TYPE_CODE (type
))
200 case TYPE_CODE_RANGE
:
201 /* We have byte, half-word, word and extended-word/doubleword
202 integral types. The doubleword is an extension to the
203 original 32-bit ABI by the SCD 2.4.x. */
204 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
207 /* Allow either 32-bit or 64-bit pointers. */
208 return (len
== 4 || len
== 8);
216 /* Check whether TYPE is "Floating". */
219 sparc_floating_p (const struct type
*type
)
221 switch (TYPE_CODE (type
))
225 int len
= TYPE_LENGTH (type
);
226 return (len
== 4 || len
== 8 || len
== 16);
235 /* Check whether TYPE is "Structure or Union". */
238 sparc_structure_or_union_p (const struct type
*type
)
240 switch (TYPE_CODE (type
))
242 case TYPE_CODE_STRUCT
:
243 case TYPE_CODE_UNION
:
252 /* Register information. */
254 static const char *sparc32_register_names
[] =
256 "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
257 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
258 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
259 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
261 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
262 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
263 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
264 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
266 "y", "psr", "wim", "tbr", "pc", "npc", "fsr", "csr"
269 /* Total number of registers. */
270 #define SPARC32_NUM_REGS ARRAY_SIZE (sparc32_register_names)
272 /* We provide the aliases %d0..%d30 for the floating registers as
273 "psuedo" registers. */
275 static const char *sparc32_pseudo_register_names
[] =
277 "d0", "d2", "d4", "d6", "d8", "d10", "d12", "d14",
278 "d16", "d18", "d20", "d22", "d24", "d26", "d28", "d30"
281 /* Total number of pseudo registers. */
282 #define SPARC32_NUM_PSEUDO_REGS ARRAY_SIZE (sparc32_pseudo_register_names)
284 /* Return the name of register REGNUM. */
287 sparc32_register_name (int regnum
)
289 if (regnum
>= 0 && regnum
< SPARC32_NUM_REGS
)
290 return sparc32_register_names
[regnum
];
292 if (regnum
< SPARC32_NUM_REGS
+ SPARC32_NUM_PSEUDO_REGS
)
293 return sparc32_pseudo_register_names
[regnum
- SPARC32_NUM_REGS
];
300 struct type
*sparc_psr_type
;
303 struct type
*sparc_fsr_type
;
305 /* Construct types for ISA-specific registers. */
308 sparc_init_types (void)
312 type
= init_flags_type ("builtin_type_sparc_psr", 4);
313 append_flags_type_flag (type
, 5, "ET");
314 append_flags_type_flag (type
, 6, "PS");
315 append_flags_type_flag (type
, 7, "S");
316 append_flags_type_flag (type
, 12, "EF");
317 append_flags_type_flag (type
, 13, "EC");
318 sparc_psr_type
= type
;
320 type
= init_flags_type ("builtin_type_sparc_fsr", 4);
321 append_flags_type_flag (type
, 0, "NXA");
322 append_flags_type_flag (type
, 1, "DZA");
323 append_flags_type_flag (type
, 2, "UFA");
324 append_flags_type_flag (type
, 3, "OFA");
325 append_flags_type_flag (type
, 4, "NVA");
326 append_flags_type_flag (type
, 5, "NXC");
327 append_flags_type_flag (type
, 6, "DZC");
328 append_flags_type_flag (type
, 7, "UFC");
329 append_flags_type_flag (type
, 8, "OFC");
330 append_flags_type_flag (type
, 9, "NVC");
331 append_flags_type_flag (type
, 22, "NS");
332 append_flags_type_flag (type
, 23, "NXM");
333 append_flags_type_flag (type
, 24, "DZM");
334 append_flags_type_flag (type
, 25, "UFM");
335 append_flags_type_flag (type
, 26, "OFM");
336 append_flags_type_flag (type
, 27, "NVM");
337 sparc_fsr_type
= type
;
340 /* Return the GDB type object for the "standard" data type of data in
344 sparc32_register_type (struct gdbarch
*gdbarch
, int regnum
)
346 if (regnum
>= SPARC_F0_REGNUM
&& regnum
<= SPARC_F31_REGNUM
)
347 return builtin_type_float
;
349 if (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
)
350 return builtin_type_double
;
352 if (regnum
== SPARC_SP_REGNUM
|| regnum
== SPARC_FP_REGNUM
)
353 return builtin_type_void_data_ptr
;
355 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== SPARC32_NPC_REGNUM
)
356 return builtin_type_void_func_ptr
;
358 if (regnum
== SPARC32_PSR_REGNUM
)
359 return sparc_psr_type
;
361 if (regnum
== SPARC32_FSR_REGNUM
)
362 return sparc_fsr_type
;
364 return builtin_type_int32
;
368 sparc32_pseudo_register_read (struct gdbarch
*gdbarch
,
369 struct regcache
*regcache
,
370 int regnum
, gdb_byte
*buf
)
372 gdb_assert (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
);
374 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC32_D0_REGNUM
);
375 regcache_raw_read (regcache
, regnum
, buf
);
376 regcache_raw_read (regcache
, regnum
+ 1, buf
+ 4);
380 sparc32_pseudo_register_write (struct gdbarch
*gdbarch
,
381 struct regcache
*regcache
,
382 int regnum
, const gdb_byte
*buf
)
384 gdb_assert (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
);
386 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC32_D0_REGNUM
);
387 regcache_raw_write (regcache
, regnum
, buf
);
388 regcache_raw_write (regcache
, regnum
+ 1, buf
+ 4);
393 sparc32_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
,
394 CORE_ADDR funcaddr
, int using_gcc
,
395 struct value
**args
, int nargs
,
396 struct type
*value_type
,
397 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
)
402 if (using_struct_return (value_type
, using_gcc
))
406 /* This is an UNIMP instruction. */
407 store_unsigned_integer (buf
, 4, TYPE_LENGTH (value_type
) & 0x1fff);
408 write_memory (sp
- 8, buf
, 4);
416 sparc32_store_arguments (struct regcache
*regcache
, int nargs
,
417 struct value
**args
, CORE_ADDR sp
,
418 int struct_return
, CORE_ADDR struct_addr
)
420 /* Number of words in the "parameter array". */
421 int num_elements
= 0;
425 for (i
= 0; i
< nargs
; i
++)
427 struct type
*type
= value_type (args
[i
]);
428 int len
= TYPE_LENGTH (type
);
430 if (sparc_structure_or_union_p (type
)
431 || (sparc_floating_p (type
) && len
== 16))
433 /* Structure, Union and Quad-Precision Arguments. */
436 /* Use doubleword alignment for these values. That's always
437 correct, and wasting a few bytes shouldn't be a problem. */
440 write_memory (sp
, value_contents (args
[i
]), len
);
441 args
[i
] = value_from_pointer (lookup_pointer_type (type
), sp
);
444 else if (sparc_floating_p (type
))
446 /* Floating arguments. */
447 gdb_assert (len
== 4 || len
== 8);
448 num_elements
+= (len
/ 4);
452 /* Integral and pointer arguments. */
453 gdb_assert (sparc_integral_or_pointer_p (type
));
456 args
[i
] = value_cast (builtin_type_int32
, args
[i
]);
457 num_elements
+= ((len
+ 3) / 4);
461 /* Always allocate at least six words. */
462 sp
-= max (6, num_elements
) * 4;
464 /* The psABI says that "Software convention requires space for the
465 struct/union return value pointer, even if the word is unused." */
468 /* The psABI says that "Although software convention and the
469 operating system require every stack frame to be doubleword
473 for (i
= 0; i
< nargs
; i
++)
475 const bfd_byte
*valbuf
= value_contents (args
[i
]);
476 struct type
*type
= value_type (args
[i
]);
477 int len
= TYPE_LENGTH (type
);
479 gdb_assert (len
== 4 || len
== 8);
483 int regnum
= SPARC_O0_REGNUM
+ element
;
485 regcache_cooked_write (regcache
, regnum
, valbuf
);
486 if (len
> 4 && element
< 5)
487 regcache_cooked_write (regcache
, regnum
+ 1, valbuf
+ 4);
490 /* Always store the argument in memory. */
491 write_memory (sp
+ 4 + element
* 4, valbuf
, len
);
495 gdb_assert (element
== num_elements
);
501 store_unsigned_integer (buf
, 4, struct_addr
);
502 write_memory (sp
, buf
, 4);
509 sparc32_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
510 struct regcache
*regcache
, CORE_ADDR bp_addr
,
511 int nargs
, struct value
**args
, CORE_ADDR sp
,
512 int struct_return
, CORE_ADDR struct_addr
)
514 CORE_ADDR call_pc
= (struct_return
? (bp_addr
- 12) : (bp_addr
- 8));
516 /* Set return address. */
517 regcache_cooked_write_unsigned (regcache
, SPARC_O7_REGNUM
, call_pc
);
519 /* Set up function arguments. */
520 sp
= sparc32_store_arguments (regcache
, nargs
, args
, sp
,
521 struct_return
, struct_addr
);
523 /* Allocate the 16-word window save area. */
526 /* Stack should be doubleword aligned at this point. */
527 gdb_assert (sp
% 8 == 0);
529 /* Finally, update the stack pointer. */
530 regcache_cooked_write_unsigned (regcache
, SPARC_SP_REGNUM
, sp
);
536 /* Use the program counter to determine the contents and size of a
537 breakpoint instruction. Return a pointer to a string of bytes that
538 encode a breakpoint instruction, store the length of the string in
539 *LEN and optionally adjust *PC to point to the correct memory
540 location for inserting the breakpoint. */
542 static const gdb_byte
*
543 sparc_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
545 static const gdb_byte break_insn
[] = { 0x91, 0xd0, 0x20, 0x01 };
547 *len
= sizeof (break_insn
);
552 /* Allocate and initialize a frame cache. */
554 static struct sparc_frame_cache
*
555 sparc_alloc_frame_cache (void)
557 struct sparc_frame_cache
*cache
;
560 cache
= FRAME_OBSTACK_ZALLOC (struct sparc_frame_cache
);
566 /* Frameless until proven otherwise. */
567 cache
->frameless_p
= 1;
569 cache
->struct_return_p
= 0;
575 sparc_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
576 struct sparc_frame_cache
*cache
)
578 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
583 if (current_pc
<= pc
)
586 /* We have to handle to "Procedure Linkage Table" (PLT) special. On
587 SPARC the linker usually defines a symbol (typically
588 _PROCEDURE_LINKAGE_TABLE_) at the start of the .plt section.
589 This symbol makes us end up here with PC pointing at the start of
590 the PLT and CURRENT_PC probably pointing at a PLT entry. If we
591 would do our normal prologue analysis, we would probably conclude
592 that we've got a frame when in reality we don't, since the
593 dynamic linker patches up the first PLT with some code that
594 starts with a SAVE instruction. Patch up PC such that it points
595 at the start of our PLT entry. */
596 if (tdep
->plt_entry_size
> 0 && in_plt_section (current_pc
, NULL
))
597 pc
= current_pc
- ((current_pc
- pc
) % tdep
->plt_entry_size
);
599 insn
= sparc_fetch_instruction (pc
);
601 /* Recognize a SETHI insn and record its destination. */
602 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 0x04)
607 insn
= sparc_fetch_instruction (pc
+ 4);
610 /* Allow for an arithmetic operation on DEST or %g1. */
611 if (X_OP (insn
) == 2 && X_I (insn
)
612 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
616 insn
= sparc_fetch_instruction (pc
+ 8);
619 /* Check for the SAVE instruction that sets up the frame. */
620 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3c)
622 cache
->frameless_p
= 0;
623 return pc
+ offset
+ 4;
630 sparc_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
632 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
633 return frame_unwind_register_unsigned (next_frame
, tdep
->pc_regnum
);
636 /* Return PC of first real instruction of the function starting at
640 sparc32_skip_prologue (CORE_ADDR start_pc
)
642 struct symtab_and_line sal
;
643 CORE_ADDR func_start
, func_end
;
644 struct sparc_frame_cache cache
;
646 /* This is the preferred method, find the end of the prologue by
647 using the debugging information. */
648 if (find_pc_partial_function (start_pc
, NULL
, &func_start
, &func_end
))
650 sal
= find_pc_line (func_start
, 0);
652 if (sal
.end
< func_end
653 && start_pc
<= sal
.end
)
657 start_pc
= sparc_analyze_prologue (start_pc
, 0xffffffffUL
, &cache
);
659 /* The psABI says that "Although the first 6 words of arguments
660 reside in registers, the standard stack frame reserves space for
661 them.". It also suggests that a function may use that space to
662 "write incoming arguments 0 to 5" into that space, and that's
663 indeed what GCC seems to be doing. In that case GCC will
664 generate debug information that points to the stack slots instead
665 of the registers, so we should consider the instructions that
666 write out these incoming arguments onto the stack. Of course we
667 only need to do this if we have a stack frame. */
669 while (!cache
.frameless_p
)
671 unsigned long insn
= sparc_fetch_instruction (start_pc
);
673 /* Recognize instructions that store incoming arguments in
674 %i0...%i5 into the corresponding stack slot. */
675 if (X_OP (insn
) == 3 && (X_OP3 (insn
) & 0x3c) == 0x04 && X_I (insn
)
676 && (X_RD (insn
) >= 24 && X_RD (insn
) <= 29) && X_RS1 (insn
) == 30
677 && X_SIMM13 (insn
) == 68 + (X_RD (insn
) - 24) * 4)
691 struct sparc_frame_cache
*
692 sparc_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
694 struct sparc_frame_cache
*cache
;
699 cache
= sparc_alloc_frame_cache ();
702 cache
->pc
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
704 sparc_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
706 if (cache
->frameless_p
)
708 /* This function is frameless, so %fp (%i6) holds the frame
709 pointer for our calling frame. Use %sp (%o6) as this frame's
712 frame_unwind_register_unsigned (next_frame
, SPARC_SP_REGNUM
);
716 /* For normal frames, %fp (%i6) holds the frame pointer, the
717 base address for the current stack frame. */
719 frame_unwind_register_unsigned (next_frame
, SPARC_FP_REGNUM
);
729 sparc32_struct_return_from_sym (struct symbol
*sym
)
731 struct type
*type
= check_typedef (SYMBOL_TYPE (sym
));
732 enum type_code code
= TYPE_CODE (type
);
734 if (code
== TYPE_CODE_FUNC
|| code
== TYPE_CODE_METHOD
)
736 type
= check_typedef (TYPE_TARGET_TYPE (type
));
737 if (sparc_structure_or_union_p (type
)
738 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16))
745 struct sparc_frame_cache
*
746 sparc32_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
748 struct sparc_frame_cache
*cache
;
754 cache
= sparc_frame_cache (next_frame
, this_cache
);
756 sym
= find_pc_function (cache
->pc
);
759 cache
->struct_return_p
= sparc32_struct_return_from_sym (sym
);
763 /* There is no debugging information for this function to
764 help us determine whether this function returns a struct
765 or not. So we rely on another heuristic which is to check
766 the instruction at the return address and see if this is
767 an "unimp" instruction. If it is, then it is a struct-return
770 int regnum
= cache
->frameless_p
? SPARC_O7_REGNUM
: SPARC_I7_REGNUM
;
772 pc
= frame_unwind_register_unsigned (next_frame
, regnum
) + 8;
773 if (sparc_is_unimp_insn (pc
))
774 cache
->struct_return_p
= 1;
781 sparc32_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
782 struct frame_id
*this_id
)
784 struct sparc_frame_cache
*cache
=
785 sparc32_frame_cache (next_frame
, this_cache
);
787 /* This marks the outermost frame. */
788 if (cache
->base
== 0)
791 (*this_id
) = frame_id_build (cache
->base
, cache
->pc
);
795 sparc32_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
796 int regnum
, int *optimizedp
,
797 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
798 int *realnump
, gdb_byte
*valuep
)
800 struct sparc_frame_cache
*cache
=
801 sparc32_frame_cache (next_frame
, this_cache
);
803 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== SPARC32_NPC_REGNUM
)
811 CORE_ADDR pc
= (regnum
== SPARC32_NPC_REGNUM
) ? 4 : 0;
813 /* If this functions has a Structure, Union or
814 Quad-Precision return value, we have to skip the UNIMP
815 instruction that encodes the size of the structure. */
816 if (cache
->struct_return_p
)
819 regnum
= cache
->frameless_p
? SPARC_O7_REGNUM
: SPARC_I7_REGNUM
;
820 pc
+= frame_unwind_register_unsigned (next_frame
, regnum
) + 8;
821 store_unsigned_integer (valuep
, 4, pc
);
826 /* Handle StackGhost. */
828 ULONGEST wcookie
= sparc_fetch_wcookie ();
830 if (wcookie
!= 0 && !cache
->frameless_p
&& regnum
== SPARC_I7_REGNUM
)
838 CORE_ADDR addr
= cache
->base
+ (regnum
- SPARC_L0_REGNUM
) * 4;
841 /* Read the value in from memory. */
842 i7
= get_frame_memory_unsigned (next_frame
, addr
, 4);
843 store_unsigned_integer (valuep
, 4, i7
^ wcookie
);
849 /* The previous frame's `local' and `in' registers have been saved
850 in the register save area. */
851 if (!cache
->frameless_p
852 && regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
)
855 *lvalp
= lval_memory
;
856 *addrp
= cache
->base
+ (regnum
- SPARC_L0_REGNUM
) * 4;
860 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
862 /* Read the value in from memory. */
863 read_memory (*addrp
, valuep
, register_size (gdbarch
, regnum
));
868 /* The previous frame's `out' registers are accessable as the
869 current frame's `in' registers. */
870 if (!cache
->frameless_p
871 && regnum
>= SPARC_O0_REGNUM
&& regnum
<= SPARC_O7_REGNUM
)
872 regnum
+= (SPARC_I0_REGNUM
- SPARC_O0_REGNUM
);
875 *lvalp
= lval_register
;
879 frame_unwind_register (next_frame
, (*realnump
), valuep
);
882 static const struct frame_unwind sparc32_frame_unwind
=
885 sparc32_frame_this_id
,
886 sparc32_frame_prev_register
889 static const struct frame_unwind
*
890 sparc32_frame_sniffer (struct frame_info
*next_frame
)
892 return &sparc32_frame_unwind
;
897 sparc32_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
899 struct sparc_frame_cache
*cache
=
900 sparc32_frame_cache (next_frame
, this_cache
);
905 static const struct frame_base sparc32_frame_base
=
907 &sparc32_frame_unwind
,
908 sparc32_frame_base_address
,
909 sparc32_frame_base_address
,
910 sparc32_frame_base_address
913 static struct frame_id
914 sparc_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
918 sp
= frame_unwind_register_unsigned (next_frame
, SPARC_SP_REGNUM
);
921 return frame_id_build (sp
, frame_pc_unwind (next_frame
));
925 /* Extract from an array REGBUF containing the (raw) register state, a
926 function return value of TYPE, and copy that into VALBUF. */
929 sparc32_extract_return_value (struct type
*type
, struct regcache
*regcache
,
932 int len
= TYPE_LENGTH (type
);
935 gdb_assert (!sparc_structure_or_union_p (type
));
936 gdb_assert (!(sparc_floating_p (type
) && len
== 16));
938 if (sparc_floating_p (type
))
940 /* Floating return values. */
941 regcache_cooked_read (regcache
, SPARC_F0_REGNUM
, buf
);
943 regcache_cooked_read (regcache
, SPARC_F1_REGNUM
, buf
+ 4);
944 memcpy (valbuf
, buf
, len
);
948 /* Integral and pointer return values. */
949 gdb_assert (sparc_integral_or_pointer_p (type
));
951 regcache_cooked_read (regcache
, SPARC_O0_REGNUM
, buf
);
954 regcache_cooked_read (regcache
, SPARC_O1_REGNUM
, buf
+ 4);
955 gdb_assert (len
== 8);
956 memcpy (valbuf
, buf
, 8);
960 /* Just stripping off any unused bytes should preserve the
961 signed-ness just fine. */
962 memcpy (valbuf
, buf
+ 4 - len
, len
);
967 /* Write into the appropriate registers a function return value stored
968 in VALBUF of type TYPE. */
971 sparc32_store_return_value (struct type
*type
, struct regcache
*regcache
,
972 const gdb_byte
*valbuf
)
974 int len
= TYPE_LENGTH (type
);
977 gdb_assert (!sparc_structure_or_union_p (type
));
978 gdb_assert (!(sparc_floating_p (type
) && len
== 16));
980 if (sparc_floating_p (type
))
982 /* Floating return values. */
983 memcpy (buf
, valbuf
, len
);
984 regcache_cooked_write (regcache
, SPARC_F0_REGNUM
, buf
);
986 regcache_cooked_write (regcache
, SPARC_F1_REGNUM
, buf
+ 4);
990 /* Integral and pointer return values. */
991 gdb_assert (sparc_integral_or_pointer_p (type
));
995 gdb_assert (len
== 8);
996 memcpy (buf
, valbuf
, 8);
997 regcache_cooked_write (regcache
, SPARC_O1_REGNUM
, buf
+ 4);
1001 /* ??? Do we need to do any sign-extension here? */
1002 memcpy (buf
+ 4 - len
, valbuf
, len
);
1004 regcache_cooked_write (regcache
, SPARC_O0_REGNUM
, buf
);
1008 static enum return_value_convention
1009 sparc32_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1010 struct regcache
*regcache
, gdb_byte
*readbuf
,
1011 const gdb_byte
*writebuf
)
1013 /* The psABI says that "...every stack frame reserves the word at
1014 %fp+64. If a function returns a structure, union, or
1015 quad-precision value, this word should hold the address of the
1016 object into which the return value should be copied." This
1017 guarantees that we can always find the return value, not just
1018 before the function returns. */
1020 if (sparc_structure_or_union_p (type
)
1021 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16))
1028 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
1029 addr
= read_memory_unsigned_integer (sp
+ 64, 4);
1030 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
1033 return RETURN_VALUE_ABI_PRESERVES_ADDRESS
;
1037 sparc32_extract_return_value (type
, regcache
, readbuf
);
1039 sparc32_store_return_value (type
, regcache
, writebuf
);
1041 return RETURN_VALUE_REGISTER_CONVENTION
;
1045 sparc32_stabs_argument_has_addr (struct gdbarch
*gdbarch
, struct type
*type
)
1047 return (sparc_structure_or_union_p (type
)
1048 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16));
1052 sparc32_dwarf2_struct_return_p (struct frame_info
*next_frame
)
1054 CORE_ADDR pc
= frame_unwind_address_in_block (next_frame
, NORMAL_FRAME
);
1055 struct symbol
*sym
= find_pc_function (pc
);
1058 return sparc32_struct_return_from_sym (sym
);
1063 sparc32_dwarf2_frame_init_reg (struct gdbarch
*gdbarch
, int regnum
,
1064 struct dwarf2_frame_state_reg
*reg
,
1065 struct frame_info
*next_frame
)
1071 case SPARC_G0_REGNUM
:
1072 /* Since %g0 is always zero, there is no point in saving it, and
1073 people will be inclined omit it from the CFI. Make sure we
1074 don't warn about that. */
1075 reg
->how
= DWARF2_FRAME_REG_SAME_VALUE
;
1077 case SPARC_SP_REGNUM
:
1078 reg
->how
= DWARF2_FRAME_REG_CFA
;
1080 case SPARC32_PC_REGNUM
:
1081 case SPARC32_NPC_REGNUM
:
1082 reg
->how
= DWARF2_FRAME_REG_RA_OFFSET
;
1084 if (sparc32_dwarf2_struct_return_p (next_frame
))
1086 if (regnum
== SPARC32_NPC_REGNUM
)
1088 reg
->loc
.offset
= off
;
1094 /* The SPARC Architecture doesn't have hardware single-step support,
1095 and most operating systems don't implement it either, so we provide
1096 software single-step mechanism. */
1099 sparc_analyze_control_transfer (struct gdbarch
*arch
,
1100 CORE_ADDR pc
, CORE_ADDR
*npc
)
1102 unsigned long insn
= sparc_fetch_instruction (pc
);
1103 int conditional_p
= X_COND (insn
) & 0x7;
1105 long offset
= 0; /* Must be signed for sign-extend. */
1107 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 3 && (insn
& 0x1000000) == 0)
1109 /* Branch on Integer Register with Prediction (BPr). */
1113 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 6)
1115 /* Branch on Floating-Point Condition Codes (FBfcc). */
1117 offset
= 4 * X_DISP22 (insn
);
1119 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 5)
1121 /* Branch on Floating-Point Condition Codes with Prediction
1124 offset
= 4 * X_DISP19 (insn
);
1126 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 2)
1128 /* Branch on Integer Condition Codes (Bicc). */
1130 offset
= 4 * X_DISP22 (insn
);
1132 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 1)
1134 /* Branch on Integer Condition Codes with Prediction (BPcc). */
1136 offset
= 4 * X_DISP19 (insn
);
1138 else if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3a)
1140 /* Trap instruction (TRAP). */
1141 return gdbarch_tdep (arch
)->step_trap (insn
);
1144 /* FIXME: Handle DONE and RETRY instructions. */
1150 /* For conditional branches, return nPC + 4 iff the annul
1152 return (X_A (insn
) ? *npc
+ 4 : 0);
1156 /* For unconditional branches, return the target if its
1157 specified condition is "always" and return nPC + 4 if the
1158 condition is "never". If the annul bit is 1, set *NPC to
1160 if (X_COND (insn
) == 0x0)
1161 pc
= *npc
, offset
= 4;
1165 gdb_assert (offset
!= 0);
1174 sparc_step_trap (unsigned long insn
)
1180 sparc_software_single_step (enum target_signal sig
, int insert_breakpoints_p
)
1182 struct gdbarch
*arch
= current_gdbarch
;
1183 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
1184 CORE_ADDR npc
, nnpc
;
1186 if (insert_breakpoints_p
)
1188 CORE_ADDR pc
, orig_npc
;
1190 pc
= sparc_address_from_register (tdep
->pc_regnum
);
1191 orig_npc
= npc
= sparc_address_from_register (tdep
->npc_regnum
);
1193 /* Analyze the instruction at PC. */
1194 nnpc
= sparc_analyze_control_transfer (arch
, pc
, &npc
);
1196 insert_single_step_breakpoint (npc
);
1199 insert_single_step_breakpoint (nnpc
);
1201 /* Assert that we have set at least one breakpoint, and that
1202 they're not set at the same spot - unless we're going
1203 from here straight to NULL, i.e. a call or jump to 0. */
1204 gdb_assert (npc
!= 0 || nnpc
!= 0 || orig_npc
== 0);
1205 gdb_assert (nnpc
!= npc
|| orig_npc
== 0);
1208 remove_single_step_breakpoints ();
1212 sparc_write_pc (CORE_ADDR pc
, ptid_t ptid
)
1214 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1216 write_register_pid (tdep
->pc_regnum
, pc
, ptid
);
1217 write_register_pid (tdep
->npc_regnum
, pc
+ 4, ptid
);
1220 /* Unglobalize NAME. */
1223 sparc_stabs_unglobalize_name (char *name
)
1225 /* The Sun compilers (Sun ONE Studio, Forte Developer, Sun WorkShop,
1226 SunPRO) convert file static variables into global values, a
1227 process known as globalization. In order to do this, the
1228 compiler will create a unique prefix and prepend it to each file
1229 static variable. For static variables within a function, this
1230 globalization prefix is followed by the function name (nested
1231 static variables within a function are supposed to generate a
1232 warning message, and are left alone). The procedure is
1233 documented in the Stabs Interface Manual, which is distrubuted
1234 with the compilers, although version 4.0 of the manual seems to
1235 be incorrect in some places, at least for SPARC. The
1236 globalization prefix is encoded into an N_OPT stab, with the form
1237 "G=<prefix>". The globalization prefix always seems to start
1238 with a dollar sign '$'; a dot '.' is used as a seperator. So we
1239 simply strip everything up until the last dot. */
1243 char *p
= strrchr (name
, '.');
1252 /* Return the appropriate register set for the core section identified
1253 by SECT_NAME and SECT_SIZE. */
1255 const struct regset
*
1256 sparc_regset_from_core_section (struct gdbarch
*gdbarch
,
1257 const char *sect_name
, size_t sect_size
)
1259 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1261 if (strcmp (sect_name
, ".reg") == 0 && sect_size
>= tdep
->sizeof_gregset
)
1262 return tdep
->gregset
;
1264 if (strcmp (sect_name
, ".reg2") == 0 && sect_size
>= tdep
->sizeof_fpregset
)
1265 return tdep
->fpregset
;
1271 static struct gdbarch
*
1272 sparc32_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1274 struct gdbarch_tdep
*tdep
;
1275 struct gdbarch
*gdbarch
;
1277 /* If there is already a candidate, use it. */
1278 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1280 return arches
->gdbarch
;
1282 /* Allocate space for the new architecture. */
1283 tdep
= XMALLOC (struct gdbarch_tdep
);
1284 gdbarch
= gdbarch_alloc (&info
, tdep
);
1286 tdep
->pc_regnum
= SPARC32_PC_REGNUM
;
1287 tdep
->npc_regnum
= SPARC32_NPC_REGNUM
;
1288 tdep
->gregset
= NULL
;
1289 tdep
->sizeof_gregset
= 0;
1290 tdep
->fpregset
= NULL
;
1291 tdep
->sizeof_fpregset
= 0;
1292 tdep
->plt_entry_size
= 0;
1293 tdep
->step_trap
= sparc_step_trap
;
1295 set_gdbarch_long_double_bit (gdbarch
, 128);
1296 set_gdbarch_long_double_format (gdbarch
, floatformats_sparc_quad
);
1298 set_gdbarch_num_regs (gdbarch
, SPARC32_NUM_REGS
);
1299 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
1300 set_gdbarch_register_type (gdbarch
, sparc32_register_type
);
1301 set_gdbarch_num_pseudo_regs (gdbarch
, SPARC32_NUM_PSEUDO_REGS
);
1302 set_gdbarch_pseudo_register_read (gdbarch
, sparc32_pseudo_register_read
);
1303 set_gdbarch_pseudo_register_write (gdbarch
, sparc32_pseudo_register_write
);
1305 /* Register numbers of various important registers. */
1306 set_gdbarch_sp_regnum (gdbarch
, SPARC_SP_REGNUM
); /* %sp */
1307 set_gdbarch_pc_regnum (gdbarch
, SPARC32_PC_REGNUM
); /* %pc */
1308 set_gdbarch_fp0_regnum (gdbarch
, SPARC_F0_REGNUM
); /* %f0 */
1310 /* Call dummy code. */
1311 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
1312 set_gdbarch_push_dummy_code (gdbarch
, sparc32_push_dummy_code
);
1313 set_gdbarch_push_dummy_call (gdbarch
, sparc32_push_dummy_call
);
1315 set_gdbarch_return_value (gdbarch
, sparc32_return_value
);
1316 set_gdbarch_stabs_argument_has_addr
1317 (gdbarch
, sparc32_stabs_argument_has_addr
);
1319 set_gdbarch_skip_prologue (gdbarch
, sparc32_skip_prologue
);
1321 /* Stack grows downward. */
1322 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1324 set_gdbarch_breakpoint_from_pc (gdbarch
, sparc_breakpoint_from_pc
);
1326 set_gdbarch_frame_args_skip (gdbarch
, 8);
1328 set_gdbarch_print_insn (gdbarch
, print_insn_sparc
);
1330 set_gdbarch_software_single_step (gdbarch
, sparc_software_single_step
);
1331 set_gdbarch_write_pc (gdbarch
, sparc_write_pc
);
1333 set_gdbarch_unwind_dummy_id (gdbarch
, sparc_unwind_dummy_id
);
1335 set_gdbarch_unwind_pc (gdbarch
, sparc_unwind_pc
);
1337 frame_base_set_default (gdbarch
, &sparc32_frame_base
);
1339 /* Hook in the DWARF CFI frame unwinder. */
1340 dwarf2_frame_set_init_reg (gdbarch
, sparc32_dwarf2_frame_init_reg
);
1341 /* FIXME: kettenis/20050423: Don't enable the unwinder until the
1342 StackGhost issues have been resolved. */
1344 /* Hook in ABI-specific overrides, if they have been registered. */
1345 gdbarch_init_osabi (info
, gdbarch
);
1347 frame_unwind_append_sniffer (gdbarch
, sparc32_frame_sniffer
);
1349 /* If we have register sets, enable the generic core file support. */
1351 set_gdbarch_regset_from_core_section (gdbarch
,
1352 sparc_regset_from_core_section
);
1357 /* Helper functions for dealing with register windows. */
1360 sparc_supply_rwindow (struct regcache
*regcache
, CORE_ADDR sp
, int regnum
)
1368 /* Registers are 64-bit. */
1371 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1373 if (regnum
== i
|| regnum
== -1)
1375 target_read_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 8), buf
, 8);
1377 /* Handle StackGhost. */
1378 if (i
== SPARC_I7_REGNUM
)
1380 ULONGEST wcookie
= sparc_fetch_wcookie ();
1381 ULONGEST i7
= extract_unsigned_integer (buf
+ offset
, 8);
1383 store_unsigned_integer (buf
+ offset
, 8, i7
^ wcookie
);
1386 regcache_raw_supply (regcache
, i
, buf
);
1392 /* Registers are 32-bit. Toss any sign-extension of the stack
1396 /* Clear out the top half of the temporary buffer, and put the
1397 register value in the bottom half if we're in 64-bit mode. */
1398 if (gdbarch_ptr_bit (current_gdbarch
) == 64)
1404 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1406 if (regnum
== i
|| regnum
== -1)
1408 target_read_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 4),
1411 /* Handle StackGhost. */
1412 if (i
== SPARC_I7_REGNUM
)
1414 ULONGEST wcookie
= sparc_fetch_wcookie ();
1415 ULONGEST i7
= extract_unsigned_integer (buf
+ offset
, 4);
1417 store_unsigned_integer (buf
+ offset
, 4, i7
^ wcookie
);
1420 regcache_raw_supply (regcache
, i
, buf
);
1427 sparc_collect_rwindow (const struct regcache
*regcache
,
1428 CORE_ADDR sp
, int regnum
)
1436 /* Registers are 64-bit. */
1439 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1441 if (regnum
== -1 || regnum
== SPARC_SP_REGNUM
|| regnum
== i
)
1443 regcache_raw_collect (regcache
, i
, buf
);
1445 /* Handle StackGhost. */
1446 if (i
== SPARC_I7_REGNUM
)
1448 ULONGEST wcookie
= sparc_fetch_wcookie ();
1449 ULONGEST i7
= extract_unsigned_integer (buf
+ offset
, 8);
1451 store_unsigned_integer (buf
, 8, i7
^ wcookie
);
1454 target_write_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 8), buf
, 8);
1460 /* Registers are 32-bit. Toss any sign-extension of the stack
1464 /* Only use the bottom half if we're in 64-bit mode. */
1465 if (gdbarch_ptr_bit (current_gdbarch
) == 64)
1468 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1470 if (regnum
== -1 || regnum
== SPARC_SP_REGNUM
|| regnum
== i
)
1472 regcache_raw_collect (regcache
, i
, buf
);
1474 /* Handle StackGhost. */
1475 if (i
== SPARC_I7_REGNUM
)
1477 ULONGEST wcookie
= sparc_fetch_wcookie ();
1478 ULONGEST i7
= extract_unsigned_integer (buf
+ offset
, 4);
1480 store_unsigned_integer (buf
+ offset
, 4, i7
^ wcookie
);
1483 target_write_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 4),
1490 /* Helper functions for dealing with register sets. */
1493 sparc32_supply_gregset (const struct sparc_gregset
*gregset
,
1494 struct regcache
*regcache
,
1495 int regnum
, const void *gregs
)
1497 const gdb_byte
*regs
= gregs
;
1500 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1501 regcache_raw_supply (regcache
, SPARC32_PSR_REGNUM
,
1502 regs
+ gregset
->r_psr_offset
);
1504 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1505 regcache_raw_supply (regcache
, SPARC32_PC_REGNUM
,
1506 regs
+ gregset
->r_pc_offset
);
1508 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1509 regcache_raw_supply (regcache
, SPARC32_NPC_REGNUM
,
1510 regs
+ gregset
->r_npc_offset
);
1512 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1513 regcache_raw_supply (regcache
, SPARC32_Y_REGNUM
,
1514 regs
+ gregset
->r_y_offset
);
1516 if (regnum
== SPARC_G0_REGNUM
|| regnum
== -1)
1517 regcache_raw_supply (regcache
, SPARC_G0_REGNUM
, NULL
);
1519 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1521 int offset
= gregset
->r_g1_offset
;
1523 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1525 if (regnum
== i
|| regnum
== -1)
1526 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1531 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1533 /* Not all of the register set variants include Locals and
1534 Inputs. For those that don't, we read them off the stack. */
1535 if (gregset
->r_l0_offset
== -1)
1539 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
1540 sparc_supply_rwindow (regcache
, sp
, regnum
);
1544 int offset
= gregset
->r_l0_offset
;
1546 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1548 if (regnum
== i
|| regnum
== -1)
1549 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1557 sparc32_collect_gregset (const struct sparc_gregset
*gregset
,
1558 const struct regcache
*regcache
,
1559 int regnum
, void *gregs
)
1561 gdb_byte
*regs
= gregs
;
1564 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1565 regcache_raw_collect (regcache
, SPARC32_PSR_REGNUM
,
1566 regs
+ gregset
->r_psr_offset
);
1568 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1569 regcache_raw_collect (regcache
, SPARC32_PC_REGNUM
,
1570 regs
+ gregset
->r_pc_offset
);
1572 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1573 regcache_raw_collect (regcache
, SPARC32_NPC_REGNUM
,
1574 regs
+ gregset
->r_npc_offset
);
1576 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1577 regcache_raw_collect (regcache
, SPARC32_Y_REGNUM
,
1578 regs
+ gregset
->r_y_offset
);
1580 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1582 int offset
= gregset
->r_g1_offset
;
1584 /* %g0 is always zero. */
1585 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1587 if (regnum
== i
|| regnum
== -1)
1588 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1593 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1595 /* Not all of the register set variants include Locals and
1596 Inputs. For those that don't, we read them off the stack. */
1597 if (gregset
->r_l0_offset
!= -1)
1599 int offset
= gregset
->r_l0_offset
;
1601 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1603 if (regnum
== i
|| regnum
== -1)
1604 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1612 sparc32_supply_fpregset (struct regcache
*regcache
,
1613 int regnum
, const void *fpregs
)
1615 const gdb_byte
*regs
= fpregs
;
1618 for (i
= 0; i
< 32; i
++)
1620 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1621 regcache_raw_supply (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1624 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1625 regcache_raw_supply (regcache
, SPARC32_FSR_REGNUM
, regs
+ (32 * 4) + 4);
1629 sparc32_collect_fpregset (const struct regcache
*regcache
,
1630 int regnum
, void *fpregs
)
1632 gdb_byte
*regs
= fpregs
;
1635 for (i
= 0; i
< 32; i
++)
1637 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1638 regcache_raw_collect (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1641 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1642 regcache_raw_collect (regcache
, SPARC32_FSR_REGNUM
, regs
+ (32 * 4) + 4);
1648 /* From <machine/reg.h>. */
1649 const struct sparc_gregset sparc32_sunos4_gregset
=
1662 /* Provide a prototype to silence -Wmissing-prototypes. */
1663 void _initialize_sparc_tdep (void);
1666 _initialize_sparc_tdep (void)
1668 register_gdbarch_init (bfd_arch_sparc
, sparc32_gdbarch_init
);
1670 /* Initialize the SPARC-specific register types. */