1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* ??? Support for calling functions from gdb in sparc64 is unfinished. */
31 #include <sys/procfs.h>
36 #ifdef GDB_TARGET_IS_SPARC64
37 #define NUM_SPARC_FPREGS 64
39 #define NUM_SPARC_FPREGS 32
42 #define SPARC_INTREG_SIZE (REGISTER_RAW_SIZE (G0_REGNUM))
45 extern int stop_after_trap
;
47 /* We don't store all registers immediately when requested, since they
48 get sent over in large chunks anyway. Instead, we accumulate most
49 of the changes and send them over once. "deferred_stores" keeps
50 track of which sets of registers we have locally-changed copies of,
51 so we only need send the groups that have changed. */
53 int deferred_stores
= 0; /* Cumulates stores we want to do eventually. */
55 /* Branches with prediction are treated like their non-predicting cousins. */
56 /* FIXME: What about floating point branches? */
58 /* Macros to extract fields from sparc instructions. */
59 #define X_OP(i) (((i) >> 30) & 0x3)
60 #define X_RD(i) (((i) >> 25) & 0x1f)
61 #define X_A(i) (((i) >> 29) & 1)
62 #define X_COND(i) (((i) >> 25) & 0xf)
63 #define X_OP2(i) (((i) >> 22) & 0x7)
64 #define X_IMM22(i) ((i) & 0x3fffff)
65 #define X_OP3(i) (((i) >> 19) & 0x3f)
66 #define X_RS1(i) (((i) >> 14) & 0x1f)
67 #define X_I(i) (((i) >> 13) & 1)
68 #define X_IMM13(i) ((i) & 0x1fff)
69 /* Sign extension macros. */
70 #define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000)
71 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
72 #ifdef GDB_TARGET_IS_SPARC64
73 #define X_CC(i) (((i) >> 20) & 3)
74 #define X_P(i) (((i) >> 19) & 1)
75 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
76 #define X_RCOND(i) (((i) >> 25) & 7)
77 #define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000)
78 #define X_FCN(i) (((i) >> 25) & 31)
83 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
,
84 #ifdef GDB_TARGET_IS_SPARC64
89 /* Simulate single-step ptrace call for sun4. Code written by Gary
90 Beihl (beihl@mcc.com). */
92 /* npc4 and next_pc describe the situation at the time that the
93 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
94 static CORE_ADDR next_pc
, npc4
, target
;
95 static int brknpc4
, brktrg
;
96 typedef char binsn_quantum
[BREAKPOINT_MAX
];
97 static binsn_quantum break_mem
[3];
99 /* Non-zero if we just simulated a single-step ptrace call. This is
100 needed because we cannot remove the breakpoints in the inferior
101 process until after the `wait' in `wait_for_inferior'. Used for
106 /* single_step() is called just before we want to resume the inferior,
107 if we want to single-step it but there is no hardware or kernel single-step
108 support (as on all SPARCs). We find all the possible targets of the
109 coming instruction and breakpoint them.
111 single_step is also called just after the inferior stops. If we had
112 set up a simulated single-step, we undo our damage. */
116 int ignore
; /* pid, but we don't need it */
118 branch_type br
, isbranch();
124 /* Always set breakpoint for NPC. */
125 next_pc
= read_register (NPC_REGNUM
);
126 npc4
= next_pc
+ 4; /* branch not taken */
128 target_insert_breakpoint (next_pc
, break_mem
[0]);
129 /* printf_unfiltered ("set break at %x\n",next_pc); */
131 pc
= read_register (PC_REGNUM
);
132 pc_instruction
= read_memory_integer (pc
, 4);
133 br
= isbranch (pc_instruction
, pc
, &target
);
134 brknpc4
= brktrg
= 0;
138 /* Conditional annulled branch will either end up at
139 npc (if taken) or at npc+4 (if not taken).
142 target_insert_breakpoint (npc4
, break_mem
[1]);
144 else if (br
== baa
&& target
!= next_pc
)
146 /* Unconditional annulled branch will always end up at
149 target_insert_breakpoint (target
, break_mem
[2]);
151 #ifdef GDB_TARGET_IS_SPARC64
152 else if (br
== done_retry
)
155 target_insert_breakpoint (target
, break_mem
[2]);
159 /* We are ready to let it go */
165 /* Remove breakpoints */
166 target_remove_breakpoint (next_pc
, break_mem
[0]);
169 target_remove_breakpoint (npc4
, break_mem
[1]);
172 target_remove_breakpoint (target
, break_mem
[2]);
178 /* Call this for each newly created frame. For SPARC, we need to calculate
179 the bottom of the frame, and do some extra work if the prologue
180 has been generated via the -mflat option to GCC. In particular,
181 we need to know where the previous fp and the pc have been stashed,
182 since their exact position within the frame may vary. */
185 sparc_init_extra_frame_info (fromleaf
, fi
)
187 struct frame_info
*fi
;
195 (fi
->frame
== fi
->next
->frame
? fi
->next
->bottom
: fi
->next
->frame
) :
196 read_register (SP_REGNUM
));
198 /* If fi->next is NULL, then we already set ->frame by passing read_fp()
199 to create_new_frame. */
202 char buf
[MAX_REGISTER_RAW_SIZE
];
205 /* Compute ->frame as if not flat. If it is flat, we'll change
207 /* FIXME: If error reading memory, should just stop backtracing, rather
209 get_saved_register (buf
, 0, 0, fi
, FP_REGNUM
, 0);
210 fi
->frame
= extract_address (buf
, REGISTER_RAW_SIZE (FP_REGNUM
));
213 /* Decide whether this is a function with a ``flat register window''
214 frame. For such functions, the frame pointer is actually in %i7. */
216 if (find_pc_partial_function (fi
->pc
, &name
, &addr
, NULL
))
218 /* See if the function starts with an add (which will be of a
219 negative number if a flat frame) to the sp. FIXME: Does not
220 handle large frames which will need more than one instruction
222 insn
= read_memory_integer (addr
, 4);
223 if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0
224 && X_I (insn
) && X_SIMM13 (insn
) < 0)
226 int offset
= X_SIMM13 (insn
);
228 /* Then look for a save of %i7 into the frame. */
229 insn
= read_memory_integer (addr
+ 4, 4);
233 && X_RS1 (insn
) == 14)
235 char buf
[MAX_REGISTER_RAW_SIZE
];
237 /* We definitely have a flat frame now. */
240 fi
->sp_offset
= offset
;
242 /* Overwrite the frame's address with the value in %i7. */
243 get_saved_register (buf
, 0, 0, fi
, I7_REGNUM
, 0);
244 fi
->frame
= extract_address (buf
, REGISTER_RAW_SIZE (I7_REGNUM
));
246 /* Record where the fp got saved. */
247 fi
->fp_addr
= fi
->frame
+ fi
->sp_offset
+ X_SIMM13 (insn
);
249 /* Also try to collect where the pc got saved to. */
251 insn
= read_memory_integer (addr
+ 12, 4);
255 && X_RS1 (insn
) == 14)
256 fi
->pc_addr
= fi
->frame
+ fi
->sp_offset
+ X_SIMM13 (insn
);
260 if (fi
->next
&& fi
->frame
== 0)
262 /* Kludge to cause init_prev_frame_info to destroy the new frame. */
263 fi
->frame
= fi
->next
->frame
;
264 fi
->pc
= fi
->next
->pc
;
269 sparc_frame_chain (frame
)
270 struct frame_info
*frame
;
272 /* Value that will cause FRAME_CHAIN_VALID to not worry about the chain
273 value. If it realy is zero, we detect it later in
274 sparc_init_prev_frame. */
279 sparc_extract_struct_value_address (regbuf
)
280 char regbuf
[REGISTER_BYTES
];
282 return read_memory_integer (((int *)(regbuf
)) [SP_REGNUM
] + (16 * SPARC_INTREG_SIZE
),
283 TARGET_PTR_BIT
/ TARGET_CHAR_BIT
);
286 /* Find the pc saved in frame FRAME. */
289 sparc_frame_saved_pc (frame
)
290 struct frame_info
*frame
;
292 char buf
[MAX_REGISTER_RAW_SIZE
];
295 if (frame
->signal_handler_caller
)
297 /* This is the signal trampoline frame.
298 Get the saved PC from the sigcontext structure. */
300 #ifndef SIGCONTEXT_PC_OFFSET
301 #define SIGCONTEXT_PC_OFFSET 12
304 CORE_ADDR sigcontext_addr
;
305 char scbuf
[TARGET_PTR_BIT
/ HOST_CHAR_BIT
];
306 int saved_pc_offset
= SIGCONTEXT_PC_OFFSET
;
309 /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext
310 as the third parameter. The offset to the saved pc is 12. */
311 find_pc_partial_function (frame
->pc
, &name
,
312 (CORE_ADDR
*)NULL
,(CORE_ADDR
*)NULL
);
313 if (name
&& STREQ (name
, "ucbsigvechandler"))
314 saved_pc_offset
= 12;
316 /* The sigcontext address is contained in register O2. */
317 get_saved_register (buf
, (int *)NULL
, (CORE_ADDR
*)NULL
,
318 frame
, O0_REGNUM
+ 2, (enum lval_type
*)NULL
);
319 sigcontext_addr
= extract_address (buf
, REGISTER_RAW_SIZE (O0_REGNUM
+ 2));
321 /* Don't cause a memory_error when accessing sigcontext in case the
322 stack layout has changed or the stack is corrupt. */
323 target_read_memory (sigcontext_addr
+ saved_pc_offset
,
324 scbuf
, sizeof (scbuf
));
325 return extract_address (scbuf
, sizeof (scbuf
));
328 addr
= frame
->pc_addr
;
330 addr
= frame
->bottom
+ FRAME_SAVED_I0
+
331 SPARC_INTREG_SIZE
* (I7_REGNUM
- I0_REGNUM
);
334 /* A flat frame leaf function might not save the PC anywhere,
335 just leave it in %o7. */
336 return PC_ADJUST (read_register (O7_REGNUM
));
338 read_memory (addr
, buf
, SPARC_INTREG_SIZE
);
339 return PC_ADJUST (extract_address (buf
, SPARC_INTREG_SIZE
));
342 /* Since an individual frame in the frame cache is defined by two
343 arguments (a frame pointer and a stack pointer), we need two
344 arguments to get info for an arbitrary stack frame. This routine
345 takes two arguments and makes the cached frames look as if these
346 two arguments defined a frame on the cache. This allows the rest
347 of info frame to extract the important arguments without
351 setup_arbitrary_frame (argc
, argv
)
355 struct frame_info
*frame
;
358 error ("Sparc frame specifications require two arguments: fp and sp");
360 frame
= create_new_frame (argv
[0], 0);
363 fatal ("internal: create_new_frame returned invalid frame");
365 frame
->bottom
= argv
[1];
366 frame
->pc
= FRAME_SAVED_PC (frame
);
370 /* Given a pc value, skip it forward past the function prologue by
371 disassembling instructions that appear to be a prologue.
373 If FRAMELESS_P is set, we are only testing to see if the function
374 is frameless. This allows a quicker answer.
376 This routine should be more specific in its actions; making sure
377 that it uses the same register in the initial prologue section. */
379 static CORE_ADDR examine_prologue
PARAMS ((CORE_ADDR
, int, struct frame_info
*,
380 struct frame_saved_regs
*));
383 examine_prologue (start_pc
, frameless_p
, fi
, saved_regs
)
386 struct frame_info
*fi
;
387 struct frame_saved_regs
*saved_regs
;
391 CORE_ADDR pc
= start_pc
;
394 insn
= read_memory_integer (pc
, 4);
396 /* Recognize the `sethi' insn and record its destination. */
397 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 4)
401 insn
= read_memory_integer (pc
, 4);
404 /* Recognize an add immediate value to register to either %g1 or
405 the destination register recorded above. Actually, this might
406 well recognize several different arithmetic operations.
407 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
408 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
409 I imagine any compiler really does that, however). */
412 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
415 insn
= read_memory_integer (pc
, 4);
418 /* Recognize any SAVE insn. */
419 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 60)
422 if (frameless_p
) /* If the save is all we care about, */
423 return pc
; /* return before doing more work */
424 insn
= read_memory_integer (pc
, 4);
426 /* Recognize add to %sp. */
427 else if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0)
430 if (frameless_p
) /* If the add is all we care about, */
431 return pc
; /* return before doing more work */
433 insn
= read_memory_integer (pc
, 4);
434 /* Recognize store of frame pointer (i7). */
438 && X_RS1 (insn
) == 14)
441 insn
= read_memory_integer (pc
, 4);
443 /* Recognize sub %sp, <anything>, %i7. */
446 && X_RS1 (insn
) == 14
447 && X_RD (insn
) == 31)
450 insn
= read_memory_integer (pc
, 4);
459 /* Without a save or add instruction, it's not a prologue. */
464 /* Recognize stores into the frame from the input registers.
465 This recognizes all non alternate stores of input register,
466 into a location offset from the frame pointer. */
467 if ((X_OP (insn
) == 3
468 && (X_OP3 (insn
) & 0x3c) == 4 /* Store, non-alternate. */
469 && (X_RD (insn
) & 0x18) == 0x18 /* Input register. */
470 && X_I (insn
) /* Immediate mode. */
471 && X_RS1 (insn
) == 30 /* Off of frame pointer. */
472 /* Into reserved stack space. */
473 && X_SIMM13 (insn
) >= 0x44
474 && X_SIMM13 (insn
) < 0x5b))
479 && X_RS1 (insn
) == 14
482 if (saved_regs
&& X_I (insn
))
483 saved_regs
->regs
[X_RD (insn
)] =
484 fi
->frame
+ fi
->sp_offset
+ X_SIMM13 (insn
);
489 insn
= read_memory_integer (pc
, 4);
496 skip_prologue (start_pc
, frameless_p
)
500 return examine_prologue (start_pc
, frameless_p
, NULL
, NULL
);
503 /* Check instruction at ADDR to see if it is a branch.
504 All non-annulled instructions will go to NPC or will trap.
505 Set *TARGET if we find a candidate branch; set to zero if not.
507 This isn't static as it's used by remote-sa.sparc.c. */
510 isbranch (instruction
, addr
, target
)
512 CORE_ADDR addr
, *target
;
514 branch_type val
= not_branch
;
515 long int offset
; /* Must be signed for sign-extend. */
519 if (X_OP (instruction
) == 0
520 && (X_OP2 (instruction
) == 2
521 || X_OP2 (instruction
) == 6
522 #ifdef GDB_TARGET_IS_SPARC64
523 || X_OP2 (instruction
) == 1
524 || X_OP2 (instruction
) == 3
525 || X_OP2 (instruction
) == 5
527 || X_OP2 (instruction
) == 7
531 if (X_COND (instruction
) == 8)
532 val
= X_A (instruction
) ? baa
: ba
;
534 val
= X_A (instruction
) ? bicca
: bicc
;
535 switch (X_OP (instruction
))
539 #ifndef GDB_TARGET_IS_SPARC64
542 offset
= 4 * X_DISP22 (instruction
);
544 #ifdef GDB_TARGET_IS_SPARC64
547 offset
= 4 * X_DISP19 (instruction
);
550 offset
= 4 * X_DISP16 (instruction
);
554 *target
= addr
+ offset
;
556 #ifdef GDB_TARGET_IS_SPARC64
557 else if (X_OP (instruction
) == 2
558 && X_OP3 (instruction
) == 62)
560 if (X_FCN (instruction
) == 0)
563 *target
= read_register (TNPC_REGNUM
);
566 else if (X_FCN (instruction
) == 1)
569 *target
= read_register (TPC_REGNUM
);
578 /* Find register number REGNUM relative to FRAME and put its
579 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
580 was optimized out (and thus can't be fetched). If the variable
581 was fetched from memory, set *ADDRP to where it was fetched from,
582 otherwise it was fetched from a register.
584 The argument RAW_BUFFER must point to aligned memory. */
587 get_saved_register (raw_buffer
, optimized
, addrp
, frame
, regnum
, lval
)
591 struct frame_info
*frame
;
593 enum lval_type
*lval
;
595 struct frame_info
*frame1
;
598 if (!target_has_registers
)
599 error ("No registers.");
605 frame1
= frame
->next
;
606 while (frame1
!= NULL
)
608 if (frame1
->pc
>= (frame1
->bottom
? frame1
->bottom
:
609 read_register (SP_REGNUM
))
610 && frame1
->pc
<= FRAME_FP (frame1
))
612 /* Dummy frame. All but the window regs are in there somewhere. */
613 /* FIXME: The offsets are wrong for sparc64 (eg: 0xa0). */
614 if (regnum
>= G1_REGNUM
&& regnum
< G1_REGNUM
+ 7)
615 addr
= frame1
->frame
+ (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
616 - (NUM_SPARC_FPREGS
* 4 + 8 * SPARC_INTREG_SIZE
);
617 else if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
618 addr
= frame1
->frame
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
619 - (NUM_SPARC_FPREGS
* 4 + 16 * SPARC_INTREG_SIZE
);
620 else if (regnum
>= FP0_REGNUM
&& regnum
< FP0_REGNUM
+ NUM_SPARC_FPREGS
)
621 addr
= frame1
->frame
+ (regnum
- FP0_REGNUM
) * 4
622 - (NUM_SPARC_FPREGS
* 4);
623 else if (regnum
>= Y_REGNUM
&& regnum
< NUM_REGS
)
624 addr
= frame1
->frame
+ (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
625 - (NUM_SPARC_FPREGS
* 4 + 24 * SPARC_INTREG_SIZE
);
627 else if (frame1
->flat
)
630 if (regnum
== RP_REGNUM
)
631 addr
= frame1
->pc_addr
;
632 else if (regnum
== I7_REGNUM
)
633 addr
= frame1
->fp_addr
;
636 CORE_ADDR func_start
;
637 struct frame_saved_regs regs
;
638 memset (®s
, 0, sizeof (regs
));
640 find_pc_partial_function (frame1
->pc
, NULL
, &func_start
, NULL
);
641 examine_prologue (func_start
, 0, frame1
, ®s
);
642 addr
= regs
.regs
[regnum
];
647 /* Normal frame. Local and In registers are saved on stack. */
648 if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
649 addr
= (frame1
->prev
->bottom
650 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
652 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
653 addr
= (frame1
->prev
->bottom
654 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
656 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
658 /* Outs become ins. */
659 get_saved_register (raw_buffer
, optimized
, addrp
, frame1
,
660 (regnum
- O0_REGNUM
+ I0_REGNUM
), lval
);
666 frame1
= frame1
->next
;
672 if (regnum
== SP_REGNUM
)
674 if (raw_buffer
!= NULL
)
676 /* Put it back in target format. */
677 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), addr
);
683 if (raw_buffer
!= NULL
)
684 read_memory (addr
, raw_buffer
, REGISTER_RAW_SIZE (regnum
));
689 *lval
= lval_register
;
690 addr
= REGISTER_BYTE (regnum
);
691 if (raw_buffer
!= NULL
)
692 read_register_gen (regnum
, raw_buffer
);
698 /* Push an empty stack frame, and record in it the current PC, regs, etc.
700 We save the non-windowed registers and the ins. The locals and outs
701 are new; they don't need to be saved. The i's and l's of
702 the last frame were already saved on the stack. */
704 /* Definitely see tm-sparc.h for more doc of the frame format here. */
706 #ifdef GDB_TARGET_IS_SPARC64
707 #define DUMMY_REG_SAVE_OFFSET (128 + 16)
709 #define DUMMY_REG_SAVE_OFFSET 0x60
712 /* See tm-sparc.h for how this is calculated. */
713 #define DUMMY_STACK_REG_BUF_SIZE \
714 (((8+8+8) * SPARC_INTREG_SIZE) + (32 * REGISTER_RAW_SIZE (FP0_REGNUM)))
715 #define DUMMY_STACK_SIZE (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET)
718 sparc_push_dummy_frame ()
720 CORE_ADDR sp
, old_sp
;
721 char register_temp
[DUMMY_STACK_SIZE
];
723 old_sp
= sp
= read_register (SP_REGNUM
);
725 #ifdef GDB_TARGET_IS_SPARC64
726 /* FIXME: not sure what needs to be saved here. */
728 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
729 read_register_bytes (REGISTER_BYTE (Y_REGNUM
), ®ister_temp
[0],
730 REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
733 read_register_bytes (REGISTER_BYTE (O0_REGNUM
),
734 ®ister_temp
[8 * SPARC_INTREG_SIZE
],
735 SPARC_INTREG_SIZE
* 8);
737 read_register_bytes (REGISTER_BYTE (G0_REGNUM
),
738 ®ister_temp
[16 * SPARC_INTREG_SIZE
],
739 SPARC_INTREG_SIZE
* 8);
741 /* ??? The 32 here should be NUM_SPARC_FPREGS, but until we decide what
742 REGISTER_RAW_SIZE should be for fp regs, it's left as is. */
743 read_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
744 ®ister_temp
[24 * SPARC_INTREG_SIZE
],
745 REGISTER_RAW_SIZE (FP0_REGNUM
) * 32);
747 sp
-= DUMMY_STACK_SIZE
;
749 write_register (SP_REGNUM
, sp
);
751 write_memory (sp
+ DUMMY_REG_SAVE_OFFSET
, ®ister_temp
[0],
752 DUMMY_STACK_REG_BUF_SIZE
);
754 write_register (FP_REGNUM
, old_sp
);
756 /* Set return address register for the call dummy to the current PC. */
757 write_register (I7_REGNUM
, read_pc() - 8);
760 /* sparc_frame_find_saved_regs (). This function is here only because
761 pop_frame uses it. Note there is an interesting corner case which
762 I think few ports of GDB get right--if you are popping a frame
763 which does not save some register that *is* saved by a more inner
764 frame (such a frame will never be a dummy frame because dummy
765 frames save all registers). Rewriting pop_frame to use
766 get_saved_register would solve this problem and also get rid of the
767 ugly duplication between sparc_frame_find_saved_regs and
770 Stores, into a struct frame_saved_regs,
771 the addresses of the saved registers of frame described by FRAME_INFO.
772 This includes special registers such as pc and fp saved in special
773 ways in the stack frame. sp is even more special:
774 the address we return for it IS the sp for the next frame.
776 Note that on register window machines, we are currently making the
777 assumption that window registers are being saved somewhere in the
778 frame in which they are being used. If they are stored in an
779 inferior frame, find_saved_register will break.
781 On the Sun 4, the only time all registers are saved is when
782 a dummy frame is involved. Otherwise, the only saved registers
783 are the LOCAL and IN registers which are saved as a result
784 of the "save/restore" opcodes. This condition is determined
785 by address rather than by value.
787 The "pc" is not stored in a frame on the SPARC. (What is stored
788 is a return address minus 8.) sparc_pop_frame knows how to
789 deal with that. Other routines might or might not.
791 See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information
792 about how this works. */
794 static void sparc_frame_find_saved_regs
PARAMS ((struct frame_info
*,
795 struct frame_saved_regs
*));
798 sparc_frame_find_saved_regs (fi
, saved_regs_addr
)
799 struct frame_info
*fi
;
800 struct frame_saved_regs
*saved_regs_addr
;
803 CORE_ADDR frame_addr
= FRAME_FP (fi
);
806 fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS");
808 memset (saved_regs_addr
, 0, sizeof (*saved_regs_addr
));
810 if (fi
->pc
>= (fi
->bottom
? fi
->bottom
:
811 read_register (SP_REGNUM
))
812 && fi
->pc
<= FRAME_FP(fi
))
814 /* Dummy frame. All but the window regs are in there somewhere. */
815 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+7; regnum
++)
816 saved_regs_addr
->regs
[regnum
] =
817 frame_addr
+ (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
818 - (NUM_SPARC_FPREGS
* 4 + 8 * SPARC_INTREG_SIZE
);
819 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+8; regnum
++)
820 saved_regs_addr
->regs
[regnum
] =
821 frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
822 - (NUM_SPARC_FPREGS
* 4 + 16 * SPARC_INTREG_SIZE
);
823 for (regnum
= FP0_REGNUM
; regnum
< FP0_REGNUM
+ 32; regnum
++)
824 saved_regs_addr
->regs
[regnum
] =
825 frame_addr
+ (regnum
- FP0_REGNUM
) * 4
826 - (NUM_SPARC_FPREGS
* 4);
827 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
828 saved_regs_addr
->regs
[regnum
] =
829 frame_addr
+ (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
- 0xe0;
830 - (NUM_SPARC_FPREGS
* 4 + 24 * SPARC_INTREG_SIZE
);
831 frame_addr
= fi
->bottom
?
832 fi
->bottom
: read_register (SP_REGNUM
);
836 CORE_ADDR func_start
;
837 find_pc_partial_function (fi
->pc
, NULL
, &func_start
, NULL
);
838 examine_prologue (func_start
, 0, fi
, saved_regs_addr
);
840 /* Flat register window frame. */
841 saved_regs_addr
->regs
[RP_REGNUM
] = fi
->pc_addr
;
842 saved_regs_addr
->regs
[I7_REGNUM
] = fi
->fp_addr
;
846 /* Normal frame. Just Local and In registers */
847 frame_addr
= fi
->bottom
?
848 fi
->bottom
: read_register (SP_REGNUM
);
849 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+8; regnum
++)
850 saved_regs_addr
->regs
[regnum
] =
851 (frame_addr
+ (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
853 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+8; regnum
++)
854 saved_regs_addr
->regs
[regnum
] =
855 (frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
862 saved_regs_addr
->regs
[O7_REGNUM
] = fi
->pc_addr
;
866 /* Pull off either the next frame pointer or the stack pointer */
867 CORE_ADDR next_next_frame_addr
=
870 read_register (SP_REGNUM
));
871 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+8; regnum
++)
872 saved_regs_addr
->regs
[regnum
] =
873 (next_next_frame_addr
874 + (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
878 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
879 saved_regs_addr
->regs
[SP_REGNUM
] = FRAME_FP (fi
);
882 /* Discard from the stack the innermost frame, restoring all saved registers.
884 Note that the values stored in fsr by get_frame_saved_regs are *in
885 the context of the called frame*. What this means is that the i
886 regs of fsr must be restored into the o regs of the (calling) frame that
887 we pop into. We don't care about the output regs of the calling frame,
888 since unless it's a dummy frame, it won't have any output regs in it.
890 We never have to bother with %l (local) regs, since the called routine's
891 locals get tossed, and the calling routine's locals are already saved
894 /* Definitely see tm-sparc.h for more doc of the frame format here. */
899 register struct frame_info
*frame
= get_current_frame ();
900 register CORE_ADDR pc
;
901 struct frame_saved_regs fsr
;
902 char raw_buffer
[REGISTER_BYTES
];
905 sparc_frame_find_saved_regs (frame
, &fsr
);
906 if (fsr
.regs
[FP0_REGNUM
])
908 read_memory (fsr
.regs
[FP0_REGNUM
], raw_buffer
, NUM_SPARC_FPREGS
* 4);
909 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
910 raw_buffer
, NUM_SPARC_FPREGS
* 4);
912 #ifndef GDB_TARGET_IS_SPARC64
913 if (fsr
.regs
[FPS_REGNUM
])
915 read_memory (fsr
.regs
[FPS_REGNUM
], raw_buffer
, 4);
916 write_register_bytes (REGISTER_BYTE (FPS_REGNUM
), raw_buffer
, 4);
918 if (fsr
.regs
[CPS_REGNUM
])
920 read_memory (fsr
.regs
[CPS_REGNUM
], raw_buffer
, 4);
921 write_register_bytes (REGISTER_BYTE (CPS_REGNUM
), raw_buffer
, 4);
924 if (fsr
.regs
[G1_REGNUM
])
926 read_memory (fsr
.regs
[G1_REGNUM
], raw_buffer
, 7 * SPARC_INTREG_SIZE
);
927 write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
,
928 7 * SPARC_INTREG_SIZE
);
933 /* Each register might or might not have been saved, need to test
935 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; ++regnum
)
936 if (fsr
.regs
[regnum
])
937 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
],
939 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; ++regnum
)
940 if (fsr
.regs
[regnum
])
941 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
],
944 /* Handle all outs except stack pointer (o0-o5; o7). */
945 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 6; ++regnum
)
946 if (fsr
.regs
[regnum
])
947 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
],
949 if (fsr
.regs
[O0_REGNUM
+ 7])
950 write_register (O0_REGNUM
+ 7,
951 read_memory_integer (fsr
.regs
[O0_REGNUM
+ 7],
954 write_register (SP_REGNUM
, frame
->frame
);
956 else if (fsr
.regs
[I0_REGNUM
])
960 char reg_temp
[REGISTER_BYTES
];
962 read_memory (fsr
.regs
[I0_REGNUM
], raw_buffer
, 8 * SPARC_INTREG_SIZE
);
964 /* Get the ins and locals which we are about to restore. Just
965 moving the stack pointer is all that is really needed, except
966 store_inferior_registers is then going to write the ins and
967 locals from the registers array, so we need to muck with the
969 sp
= fsr
.regs
[SP_REGNUM
];
970 read_memory (sp
, reg_temp
, SPARC_INTREG_SIZE
* 16);
972 /* Restore the out registers.
973 Among other things this writes the new stack pointer. */
974 write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
,
975 SPARC_INTREG_SIZE
* 8);
977 write_register_bytes (REGISTER_BYTE (L0_REGNUM
), reg_temp
,
978 SPARC_INTREG_SIZE
* 16);
980 #ifndef GDB_TARGET_IS_SPARC64
981 if (fsr
.regs
[PS_REGNUM
])
982 write_register (PS_REGNUM
, read_memory_integer (fsr
.regs
[PS_REGNUM
], 4));
984 if (fsr
.regs
[Y_REGNUM
])
985 write_register (Y_REGNUM
, read_memory_integer (fsr
.regs
[Y_REGNUM
], REGISTER_RAW_SIZE (Y_REGNUM
)));
986 if (fsr
.regs
[PC_REGNUM
])
988 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
989 write_register (PC_REGNUM
, read_memory_integer (fsr
.regs
[PC_REGNUM
],
990 REGISTER_RAW_SIZE (PC_REGNUM
)));
991 if (fsr
.regs
[NPC_REGNUM
])
992 write_register (NPC_REGNUM
,
993 read_memory_integer (fsr
.regs
[NPC_REGNUM
],
994 REGISTER_RAW_SIZE (NPC_REGNUM
)));
996 else if (frame
->flat
)
999 pc
= PC_ADJUST ((CORE_ADDR
)
1000 read_memory_integer (frame
->pc_addr
,
1001 REGISTER_RAW_SIZE (PC_REGNUM
)));
1004 /* I think this happens only in the innermost frame, if so then
1005 it is a complicated way of saying
1006 "pc = read_register (O7_REGNUM);". */
1007 char buf
[MAX_REGISTER_RAW_SIZE
];
1008 get_saved_register (buf
, 0, 0, frame
, O7_REGNUM
, 0);
1009 pc
= PC_ADJUST (extract_address
1010 (buf
, REGISTER_RAW_SIZE (O7_REGNUM
)));
1013 write_register (PC_REGNUM
, pc
);
1014 write_register (NPC_REGNUM
, pc
+ 4);
1016 else if (fsr
.regs
[I7_REGNUM
])
1018 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
1019 pc
= PC_ADJUST ((CORE_ADDR
) read_memory_integer (fsr
.regs
[I7_REGNUM
],
1020 SPARC_INTREG_SIZE
));
1021 write_register (PC_REGNUM
, pc
);
1022 write_register (NPC_REGNUM
, pc
+ 4);
1024 flush_cached_frames ();
1027 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
1028 encodes the structure size being returned. If we detect such
1029 a fake insn, step past it. */
1039 err
= target_read_memory (pc
+ 8, buf
, sizeof(long));
1040 insn
= extract_unsigned_integer (buf
, 4);
1041 if ((err
== 0) && (insn
& 0xfffffe00) == 0)
1047 /* If pc is in a shared library trampoline, return its target.
1048 The SunOs 4.x linker rewrites the jump table entries for PIC
1049 compiled modules in the main executable to bypass the dynamic linker
1050 with jumps of the form
1053 and removes the corresponding jump table relocation entry in the
1054 dynamic relocations.
1055 find_solib_trampoline_target relies on the presence of the jump
1056 table relocation entry, so we have to detect these jump instructions
1060 sunos4_skip_trampoline_code (pc
)
1063 unsigned long insn1
;
1067 err
= target_read_memory (pc
, buf
, 4);
1068 insn1
= extract_unsigned_integer (buf
, 4);
1069 if (err
== 0 && (insn1
& 0xffc00000) == 0x03000000)
1071 unsigned long insn2
;
1073 err
= target_read_memory (pc
+ 4, buf
, 4);
1074 insn2
= extract_unsigned_integer (buf
, 4);
1075 if (err
== 0 && (insn2
& 0xffffe000) == 0x81c06000)
1077 CORE_ADDR target_pc
= (insn1
& 0x3fffff) << 10;
1078 int delta
= insn2
& 0x1fff;
1080 /* Sign extend the displacement. */
1083 return target_pc
+ delta
;
1086 return find_solib_trampoline_target (pc
);
1089 #ifdef USE_PROC_FS /* Target dependent support for /proc */
1091 /* The /proc interface divides the target machine's register set up into
1092 two different sets, the general register set (gregset) and the floating
1093 point register set (fpregset). For each set, there is an ioctl to get
1094 the current register set and another ioctl to set the current values.
1096 The actual structure passed through the ioctl interface is, of course,
1097 naturally machine dependent, and is different for each set of registers.
1098 For the sparc for example, the general register set is typically defined
1101 typedef int gregset_t[38];
1107 and the floating point set by:
1109 typedef struct prfpregset {
1112 double pr_dregs[16];
1117 u_char pr_q_entrysize;
1122 These routines provide the packing and unpacking of gregset_t and
1123 fpregset_t formatted data.
1127 /* Given a pointer to a general register set in /proc format (gregset_t *),
1128 unpack the register contents and supply them as gdb's idea of the current
1132 supply_gregset (gregsetp
)
1133 prgregset_t
*gregsetp
;
1136 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1138 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
1139 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
1141 supply_register (regi
, (char *) (regp
+ regi
));
1144 /* These require a bit more care. */
1145 supply_register (PS_REGNUM
, (char *) (regp
+ R_PS
));
1146 supply_register (PC_REGNUM
, (char *) (regp
+ R_PC
));
1147 supply_register (NPC_REGNUM
,(char *) (regp
+ R_nPC
));
1148 supply_register (Y_REGNUM
, (char *) (regp
+ R_Y
));
1152 fill_gregset (gregsetp
, regno
)
1153 prgregset_t
*gregsetp
;
1157 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1159 for (regi
= 0 ; regi
<= R_I7
; regi
++)
1161 if ((regno
== -1) || (regno
== regi
))
1163 *(regp
+ regi
) = *(int *) ®isters
[REGISTER_BYTE (regi
)];
1166 if ((regno
== -1) || (regno
== PS_REGNUM
))
1168 *(regp
+ R_PS
) = *(int *) ®isters
[REGISTER_BYTE (PS_REGNUM
)];
1170 if ((regno
== -1) || (regno
== PC_REGNUM
))
1172 *(regp
+ R_PC
) = *(int *) ®isters
[REGISTER_BYTE (PC_REGNUM
)];
1174 if ((regno
== -1) || (regno
== NPC_REGNUM
))
1176 *(regp
+ R_nPC
) = *(int *) ®isters
[REGISTER_BYTE (NPC_REGNUM
)];
1178 if ((regno
== -1) || (regno
== Y_REGNUM
))
1180 *(regp
+ R_Y
) = *(int *) ®isters
[REGISTER_BYTE (Y_REGNUM
)];
1184 #if defined (FP0_REGNUM)
1186 /* Given a pointer to a floating point register set in /proc format
1187 (fpregset_t *), unpack the register contents and supply them as gdb's
1188 idea of the current floating point register values. */
1191 supply_fpregset (fpregsetp
)
1192 prfpregset_t
*fpregsetp
;
1197 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
1199 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
1200 supply_register (regi
, from
);
1202 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
1205 /* Given a pointer to a floating point register set in /proc format
1206 (fpregset_t *), update the register specified by REGNO from gdb's idea
1207 of the current floating point register set. If REGNO is -1, update
1209 /* ??? This will probably need some changes for sparc64. */
1212 fill_fpregset (fpregsetp
, regno
)
1213 prfpregset_t
*fpregsetp
;
1220 /* ??? The 32 should probably be NUM_SPARC_FPREGS, but again we're
1221 waiting on what REGISTER_RAW_SIZE should be for fp regs. */
1222 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+ 32 ; regi
++)
1224 if ((regno
== -1) || (regno
== regi
))
1226 from
= (char *) ®isters
[REGISTER_BYTE (regi
)];
1227 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
1228 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
1231 if ((regno
== -1) || (regno
== FPS_REGNUM
))
1233 fpregsetp
->pr_fsr
= *(int *) ®isters
[REGISTER_BYTE (FPS_REGNUM
)];
1237 #endif /* defined (FP0_REGNUM) */
1239 #endif /* USE_PROC_FS */
1242 #ifdef GET_LONGJMP_TARGET
1244 /* Figure out where the longjmp will land. We expect that we have just entered
1245 longjmp and haven't yet setup the stack frame, so the args are still in the
1246 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
1247 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
1248 This routine returns true on success */
1251 get_longjmp_target (pc
)
1255 #define LONGJMP_TARGET_SIZE 4
1256 char buf
[LONGJMP_TARGET_SIZE
];
1258 jb_addr
= read_register (O0_REGNUM
);
1260 if (target_read_memory (jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, buf
,
1261 LONGJMP_TARGET_SIZE
))
1264 *pc
= extract_address (buf
, LONGJMP_TARGET_SIZE
);
1268 #endif /* GET_LONGJMP_TARGET */
1270 #ifdef STATIC_TRANSFORM_NAME
1271 /* SunPRO (3.0 at least), encodes the static variables. This is not
1272 related to C++ mangling, it is done for C too. */
1275 solaris_static_transform_name (name
)
1281 /* For file-local statics there will be a dollar sign, a bunch
1282 of junk (the contents of which match a string given in the
1283 N_OPT), a period and the name. For function-local statics
1284 there will be a bunch of junk (which seems to change the
1285 second character from 'A' to 'B'), a period, the name of the
1286 function, and the name. So just skip everything before the
1288 p
= strrchr (name
, '.');
1294 #endif /* STATIC_TRANSFORM_NAME */
1296 #ifdef GDB_TARGET_IS_SPARC64
1299 sparc64_extract_struct_value_address (regbuf
)
1300 char regbuf
[REGISTER_BYTES
];
1304 /* FIXME: We assume a non-leaf function. */
1305 addr
= read_register (I0_REGNUM
);
1309 /* Utilities for printing registers.
1310 Page numbers refer to the SPARC Architecture Manual. */
1313 dump_ccreg (reg
, val
)
1318 printf_unfiltered ("%s:%s,%s,%s,%s", reg
,
1319 val
& 8 ? "N" : "NN",
1320 val
& 4 ? "Z" : "NZ",
1321 val
& 2 ? "O" : "NO",
1322 val
& 1 ? "C" : "NC"
1333 case 4 : return "ASI_NUCLEUS";
1334 case 0x0c : return "ASI_NUCLEUS_LITTLE";
1335 case 0x10 : return "ASI_AS_IF_USER_PRIMARY";
1336 case 0x11 : return "ASI_AS_IF_USER_SECONDARY";
1337 case 0x18 : return "ASI_AS_IF_USER_PRIMARY_LITTLE";
1338 case 0x19 : return "ASI_AS_IF_USER_SECONDARY_LITTLE";
1339 case 0x80 : return "ASI_PRIMARY";
1340 case 0x81 : return "ASI_SECONDARY";
1341 case 0x82 : return "ASI_PRIMARY_NOFAULT";
1342 case 0x83 : return "ASI_SECONDARY_NOFAULT";
1343 case 0x88 : return "ASI_PRIMARY_LITTLE";
1344 case 0x89 : return "ASI_SECONDARY_LITTLE";
1345 case 0x8a : return "ASI_PRIMARY_NOFAULT_LITTLE";
1346 case 0x8b : return "ASI_SECONDARY_NOFAULT_LITTLE";
1347 default : return NULL
;
1351 /* PRINT_REGISTER_HOOK routine.
1352 Pretty print various registers. */
1353 /* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */
1356 sparc_print_register_hook (regno
)
1359 unsigned LONGEST val
;
1361 if (((unsigned) (regno
) - FP0_REGNUM
< FP_MAX_REGNUM
- FP0_REGNUM
)
1362 && ((regno
) & 1) == 0)
1364 char doublereg
[8]; /* two float regs */
1365 if (!read_relative_register_raw_bytes ((regno
), doublereg
))
1367 printf_unfiltered("\t");
1368 print_floating (doublereg
, builtin_type_double
, gdb_stdout
);
1373 /* FIXME: Some of these are priviledged registers.
1374 Not sure how they should be handled. */
1376 #define BITS(n, mask) ((int) (((val) >> (n)) & (mask)))
1378 val
= read_register (regno
);
1384 printf_unfiltered("\t");
1385 dump_ccreg ("xcc", val
>> 4);
1386 printf_unfiltered(", ");
1387 dump_ccreg ("icc", val
& 15);
1390 printf ("\tfef:%d, du:%d, dl:%d",
1391 BITS (2, 1), BITS (1, 1), BITS (0, 1));
1395 static char *fcc
[4] = { "=", "<", ">", "?" };
1396 static char *rd
[4] = { "N", "0", "+", "-" };
1397 /* Long, yes, but I'd rather leave it as is and use a wide screen. */
1398 printf ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d",
1399 fcc
[BITS (10, 3)], fcc
[BITS (32, 3)],
1400 fcc
[BITS (34, 3)], fcc
[BITS (36, 3)],
1401 rd
[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7),
1402 BITS (14, 7), BITS (13, 1), BITS (5, 31), BITS (0, 31));
1407 char *asi
= decode_asi (val
);
1409 printf ("\t%s", asi
);
1413 printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d",
1414 BITS (48, 0xffff), BITS (32, 0xffff),
1415 BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31));
1417 case PSTATE_REGNUM
:
1419 static char *mm
[4] = { "tso", "pso", "rso", "?" };
1420 printf ("\tcle:%d, tle:%d, mm:%s, red:%d, pef:%d, am:%d, priv:%d, ie:%d, ag:%d",
1421 BITS (9, 1), BITS (8, 1), mm
[BITS (6, 3)], BITS (5, 1),
1422 BITS (4, 1), BITS (3, 1), BITS (2, 1), BITS (1, 1),
1426 case TSTATE_REGNUM
:
1427 /* FIXME: print all 4? */
1430 /* FIXME: print all 4? */
1433 /* FIXME: print all 4? */
1436 /* FIXME: print all 4? */
1438 case WSTATE_REGNUM
:
1439 printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7));
1442 printf ("\t%d", BITS (0, 31));
1444 case CANSAVE_REGNUM
:
1445 printf ("\t%-2d before spill", BITS (0, 31));
1447 case CANRESTORE_REGNUM
:
1448 printf ("\t%-2d before fill", BITS (0, 31));
1450 case CLEANWIN_REGNUM
:
1451 printf ("\t%-2d before clean", BITS (0, 31));
1453 case OTHERWIN_REGNUM
:
1454 printf ("\t%d", BITS (0, 31));
1464 _initialize_sparc_tdep ()
1466 tm_print_insn
= print_insn_sparc
;