1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
25 #include "ieee-float.h"
27 #include "symfile.h" /* for objfiles.h */
28 #include "objfiles.h" /* for find_pc_section */
31 #include <sys/procfs.h>
37 extern int stop_after_trap
;
39 /* We don't store all registers immediately when requested, since they
40 get sent over in large chunks anyway. Instead, we accumulate most
41 of the changes and send them over once. "deferred_stores" keeps
42 track of which sets of registers we have locally-changed copies of,
43 so we only need send the groups that have changed. */
45 int deferred_stores
= 0; /* Cumulates stores we want to do eventually. */
49 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
52 /* Simulate single-step ptrace call for sun4. Code written by Gary
53 Beihl (beihl@mcc.com). */
55 /* npc4 and next_pc describe the situation at the time that the
56 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
57 static CORE_ADDR next_pc
, npc4
, target
;
58 static int brknpc4
, brktrg
;
59 typedef char binsn_quantum
[BREAKPOINT_MAX
];
60 static binsn_quantum break_mem
[3];
62 /* Non-zero if we just simulated a single-step ptrace call. This is
63 needed because we cannot remove the breakpoints in the inferior
64 process until after the `wait' in `wait_for_inferior'. Used for
69 /* single_step() is called just before we want to resume the inferior,
70 if we want to single-step it but there is no hardware or kernel single-step
71 support (as on all SPARCs). We find all the possible targets of the
72 coming instruction and breakpoint them.
74 single_step is also called just after the inferior stops. If we had
75 set up a simulated single-step, we undo our damage. */
79 int ignore
; /* pid, but we don't need it */
81 branch_type br
, isannulled();
87 /* Always set breakpoint for NPC. */
88 next_pc
= read_register (NPC_REGNUM
);
89 npc4
= next_pc
+ 4; /* branch not taken */
91 target_insert_breakpoint (next_pc
, break_mem
[0]);
92 /* printf_unfiltered ("set break at %x\n",next_pc); */
94 pc
= read_register (PC_REGNUM
);
95 pc_instruction
= read_memory_integer (pc
, sizeof(pc_instruction
));
96 br
= isannulled (pc_instruction
, pc
, &target
);
101 /* Conditional annulled branch will either end up at
102 npc (if taken) or at npc+4 (if not taken).
105 target_insert_breakpoint (npc4
, break_mem
[1]);
107 else if (br
== baa
&& target
!= next_pc
)
109 /* Unconditional annulled branch will always end up at
112 target_insert_breakpoint (target
, break_mem
[2]);
115 /* We are ready to let it go */
121 /* Remove breakpoints */
122 target_remove_breakpoint (next_pc
, break_mem
[0]);
125 target_remove_breakpoint (npc4
, break_mem
[1]);
128 target_remove_breakpoint (target
, break_mem
[2]);
135 sparc_frame_chain (thisframe
)
138 char buf
[MAX_REGISTER_RAW_SIZE
];
142 addr
= thisframe
->frame
+ FRAME_SAVED_I0
+
143 REGISTER_RAW_SIZE (FP_REGNUM
) * (FP_REGNUM
- I0_REGNUM
);
144 err
= target_read_memory (addr
, buf
, REGISTER_RAW_SIZE (FP_REGNUM
));
147 return extract_address (buf
, REGISTER_RAW_SIZE (FP_REGNUM
));
151 sparc_extract_struct_value_address (regbuf
)
152 char regbuf
[REGISTER_BYTES
];
154 return read_memory_integer (((int *)(regbuf
))[SP_REGNUM
]+(16*4),
155 TARGET_PTR_BIT
/ TARGET_CHAR_BIT
);
158 /* Find the pc saved in frame FRAME. */
161 sparc_frame_saved_pc (frame
)
164 char buf
[MAX_REGISTER_RAW_SIZE
];
167 addr
= (frame
->bottom
+ FRAME_SAVED_I0
+
168 REGISTER_RAW_SIZE (I7_REGNUM
) * (I7_REGNUM
- I0_REGNUM
));
169 read_memory (addr
, buf
, REGISTER_RAW_SIZE (I7_REGNUM
));
170 return PC_ADJUST (extract_address (buf
, REGISTER_RAW_SIZE (I7_REGNUM
)));
174 * Since an individual frame in the frame cache is defined by two
175 * arguments (a frame pointer and a stack pointer), we need two
176 * arguments to get info for an arbitrary stack frame. This routine
177 * takes two arguments and makes the cached frames look as if these
178 * two arguments defined a frame on the cache. This allows the rest
179 * of info frame to extract the important arguments without
183 setup_arbitrary_frame (argc
, argv
)
190 error ("Sparc frame specifications require two arguments: fp and sp");
192 fid
= create_new_frame (argv
[0], 0);
195 fatal ("internal: create_new_frame returned invalid frame id");
197 fid
->bottom
= argv
[1];
198 fid
->pc
= FRAME_SAVED_PC (fid
);
202 /* Given a pc value, skip it forward past the function prologue by
203 disassembling instructions that appear to be a prologue.
205 If FRAMELESS_P is set, we are only testing to see if the function
206 is frameless. This allows a quicker answer.
208 This routine should be more specific in its actions; making sure
209 that it uses the same register in the initial prologue section. */
211 skip_prologue (start_pc
, frameless_p
)
217 unsigned long int code
;
223 unsigned int imm22
:22;
232 unsigned int simm13
:13;
237 CORE_ADDR pc
= start_pc
;
239 x
.i
= read_memory_integer (pc
, 4);
241 /* Recognize the `sethi' insn and record its destination. */
242 if (x
.sethi
.op
== 0 && x
.sethi
.op2
== 4)
246 x
.i
= read_memory_integer (pc
, 4);
249 /* Recognize an add immediate value to register to either %g1 or
250 the destination register recorded above. Actually, this might
251 well recognize several different arithmetic operations.
252 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
253 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
254 I imagine any compiler really does that, however). */
255 if (x
.add
.op
== 2 && x
.add
.i
&& (x
.add
.rd
== 1 || x
.add
.rd
== dest
))
258 x
.i
= read_memory_integer (pc
, 4);
261 /* This recognizes any SAVE insn. But why do the XOR and then
262 the compare? That's identical to comparing against 60 (as long
263 as there isn't any sign extension). */
264 if (x
.add
.op
== 2 && (x
.add
.op3
^ 32) == 28)
267 if (frameless_p
) /* If the save is all we care about, */
268 return pc
; /* return before doing more work */
269 x
.i
= read_memory_integer (pc
, 4);
273 /* Without a save instruction, it's not a prologue. */
277 /* Now we need to recognize stores into the frame from the input
278 registers. This recognizes all non alternate stores of input
279 register, into a location offset from the frame pointer. */
281 && (x
.add
.op3
& 0x3c) == 4 /* Store, non-alternate. */
282 && (x
.add
.rd
& 0x18) == 0x18 /* Input register. */
283 && x
.add
.i
/* Immediate mode. */
284 && x
.add
.rs1
== 30 /* Off of frame pointer. */
285 /* Into reserved stack space. */
286 && x
.add
.simm13
>= 0x44
287 && x
.add
.simm13
< 0x5b)
290 x
.i
= read_memory_integer (pc
, 4);
295 /* Check instruction at ADDR to see if it is an annulled branch.
296 All other instructions will go to NPC or will trap.
297 Set *TARGET if we find a canidate branch; set to zero if not. */
300 isannulled (instruction
, addr
, target
)
302 CORE_ADDR addr
, *target
;
304 branch_type val
= not_branch
;
305 long int offset
; /* Must be signed for sign-extend. */
308 unsigned long int code
;
315 unsigned int disp22
:22;
320 insn
.code
= instruction
;
323 && (insn
.b
.op2
== 2 || insn
.b
.op2
== 6 || insn
.b
.op2
== 7))
325 if (insn
.b
.cond
== 8)
326 val
= insn
.b
.a
? baa
: ba
;
328 val
= insn
.b
.a
? bicca
: bicc
;
329 offset
= 4 * ((int) (insn
.b
.disp22
<< 10) >> 10);
330 *target
= addr
+ offset
;
336 /* sparc_frame_find_saved_regs ()
338 Stores, into a struct frame_saved_regs,
339 the addresses of the saved registers of frame described by FRAME_INFO.
340 This includes special registers such as pc and fp saved in special
341 ways in the stack frame. sp is even more special:
342 the address we return for it IS the sp for the next frame.
344 Note that on register window machines, we are currently making the
345 assumption that window registers are being saved somewhere in the
346 frame in which they are being used. If they are stored in an
347 inferior frame, find_saved_register will break.
349 On the Sun 4, the only time all registers are saved is when
350 a dummy frame is involved. Otherwise, the only saved registers
351 are the LOCAL and IN registers which are saved as a result
352 of the "save/restore" opcodes. This condition is determined
353 by address rather than by value.
355 The "pc" is not stored in a frame on the SPARC. (What is stored
356 is a return address minus 8.) sparc_pop_frame knows how to
357 deal with that. Other routines might or might not.
359 See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information
360 about how this works. */
363 sparc_frame_find_saved_regs (fi
, saved_regs_addr
)
364 struct frame_info
*fi
;
365 struct frame_saved_regs
*saved_regs_addr
;
368 FRAME_ADDR frame
= FRAME_FP(fi
);
369 FRAME fid
= FRAME_INFO_ID (fi
);
372 fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS");
374 memset (saved_regs_addr
, 0, sizeof (*saved_regs_addr
));
376 if (fi
->pc
>= (fi
->bottom
? fi
->bottom
:
377 read_register (SP_REGNUM
))
378 && fi
->pc
<= FRAME_FP(fi
))
380 /* Dummy frame. All but the window regs are in there somewhere. */
381 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+7; regnum
++)
382 saved_regs_addr
->regs
[regnum
] =
383 frame
+ (regnum
- G0_REGNUM
) * 4 - 0xa0;
384 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+8; regnum
++)
385 saved_regs_addr
->regs
[regnum
] =
386 frame
+ (regnum
- I0_REGNUM
) * 4 - 0xc0;
387 for (regnum
= FP0_REGNUM
; regnum
< FP0_REGNUM
+ 32; regnum
++)
388 saved_regs_addr
->regs
[regnum
] =
389 frame
+ (regnum
- FP0_REGNUM
) * 4 - 0x80;
390 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
391 saved_regs_addr
->regs
[regnum
] =
392 frame
+ (regnum
- Y_REGNUM
) * 4 - 0xe0;
394 fi
->bottom
: read_register (SP_REGNUM
);
398 /* Normal frame. Just Local and In registers */
400 fi
->bottom
: read_register (SP_REGNUM
);
401 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+16; regnum
++)
402 saved_regs_addr
->regs
[regnum
] = frame
+ (regnum
-L0_REGNUM
) * 4;
406 /* Pull off either the next frame pointer or the stack pointer */
407 FRAME_ADDR next_next_frame
=
410 read_register (SP_REGNUM
));
411 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+8; regnum
++)
412 saved_regs_addr
->regs
[regnum
] = next_next_frame
+ regnum
* 4;
414 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
415 saved_regs_addr
->regs
[SP_REGNUM
] = FRAME_FP (fi
);
418 /* Push an empty stack frame, and record in it the current PC, regs, etc.
420 We save the non-windowed registers and the ins. The locals and outs
421 are new; they don't need to be saved. The i's and l's of
422 the last frame were already saved on the stack. */
424 /* Definitely see tm-sparc.h for more doc of the frame format here. */
427 sparc_push_dummy_frame ()
429 CORE_ADDR sp
, old_sp
;
430 char register_temp
[0x140];
432 old_sp
= sp
= read_register (SP_REGNUM
);
434 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
435 read_register_bytes (REGISTER_BYTE (Y_REGNUM
), ®ister_temp
[0],
436 REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
438 read_register_bytes (REGISTER_BYTE (O0_REGNUM
), ®ister_temp
[8 * 4],
439 REGISTER_RAW_SIZE (O0_REGNUM
) * 8);
441 read_register_bytes (REGISTER_BYTE (G0_REGNUM
), ®ister_temp
[16 * 4],
442 REGISTER_RAW_SIZE (G0_REGNUM
) * 8);
444 read_register_bytes (REGISTER_BYTE (FP0_REGNUM
), ®ister_temp
[24 * 4],
445 REGISTER_RAW_SIZE (FP0_REGNUM
) * 32);
449 write_register (SP_REGNUM
, sp
);
451 write_memory (sp
+ 0x60, ®ister_temp
[0], (8 + 8 + 8 + 32) * 4);
453 write_register (FP_REGNUM
, old_sp
);
455 /* Set return address register for the call dummy to the current PC. */
456 write_register (I7_REGNUM
, read_pc() - 8);
459 /* Discard from the stack the innermost frame, restoring all saved registers.
461 Note that the values stored in fsr by get_frame_saved_regs are *in
462 the context of the called frame*. What this means is that the i
463 regs of fsr must be restored into the o regs of the (calling) frame that
464 we pop into. We don't care about the output regs of the calling frame,
465 since unless it's a dummy frame, it won't have any output regs in it.
467 We never have to bother with %l (local) regs, since the called routine's
468 locals get tossed, and the calling routine's locals are already saved
471 /* Definitely see tm-sparc.h for more doc of the frame format here. */
476 register FRAME frame
= get_current_frame ();
477 register CORE_ADDR pc
;
478 struct frame_saved_regs fsr
;
479 struct frame_info
*fi
;
480 char raw_buffer
[REGISTER_BYTES
];
482 fi
= get_frame_info (frame
);
483 get_frame_saved_regs (fi
, &fsr
);
484 if (fsr
.regs
[FP0_REGNUM
])
486 read_memory (fsr
.regs
[FP0_REGNUM
], raw_buffer
, 32 * 4);
487 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
), raw_buffer
, 32 * 4);
489 if (fsr
.regs
[FPS_REGNUM
])
491 read_memory (fsr
.regs
[FPS_REGNUM
], raw_buffer
, 4);
492 write_register_bytes (REGISTER_BYTE (FPS_REGNUM
), raw_buffer
, 4);
494 if (fsr
.regs
[CPS_REGNUM
])
496 read_memory (fsr
.regs
[CPS_REGNUM
], raw_buffer
, 4);
497 write_register_bytes (REGISTER_BYTE (CPS_REGNUM
), raw_buffer
, 4);
499 if (fsr
.regs
[G1_REGNUM
])
501 read_memory (fsr
.regs
[G1_REGNUM
], raw_buffer
, 7 * 4);
502 write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
, 7 * 4);
504 if (fsr
.regs
[I0_REGNUM
])
508 char reg_temp
[REGISTER_BYTES
];
510 read_memory (fsr
.regs
[I0_REGNUM
], raw_buffer
, 8 * 4);
512 /* Get the ins and locals which we are about to restore. Just
513 moving the stack pointer is all that is really needed, except
514 store_inferior_registers is then going to write the ins and
515 locals from the registers array, so we need to muck with the
517 sp
= fsr
.regs
[SP_REGNUM
];
518 read_memory (sp
, reg_temp
, REGISTER_RAW_SIZE (L0_REGNUM
) * 16);
520 /* Restore the out registers.
521 Among other things this writes the new stack pointer. */
522 write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
,
523 REGISTER_RAW_SIZE (O0_REGNUM
) * 8);
525 write_register_bytes (REGISTER_BYTE (L0_REGNUM
), reg_temp
,
526 REGISTER_RAW_SIZE (L0_REGNUM
) * 16);
528 if (fsr
.regs
[PS_REGNUM
])
529 write_register (PS_REGNUM
, read_memory_integer (fsr
.regs
[PS_REGNUM
], 4));
530 if (fsr
.regs
[Y_REGNUM
])
531 write_register (Y_REGNUM
, read_memory_integer (fsr
.regs
[Y_REGNUM
], 4));
532 if (fsr
.regs
[PC_REGNUM
])
534 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
535 write_register (PC_REGNUM
, read_memory_integer (fsr
.regs
[PC_REGNUM
], 4));
536 if (fsr
.regs
[NPC_REGNUM
])
537 write_register (NPC_REGNUM
,
538 read_memory_integer (fsr
.regs
[NPC_REGNUM
], 4));
540 else if (fsr
.regs
[I7_REGNUM
])
542 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
543 pc
= PC_ADJUST (read_memory_integer (fsr
.regs
[I7_REGNUM
], 4));
544 write_register (PC_REGNUM
, pc
);
545 write_register (NPC_REGNUM
, pc
+ 4);
547 flush_cached_frames ();
548 set_current_frame ( create_new_frame (read_register (FP_REGNUM
),
552 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
553 encodes the structure size being returned. If we detect such
554 a fake insn, step past it. */
564 err
= target_read_memory (pc
+ 8, buf
, sizeof(long));
565 insn
= extract_unsigned_integer (buf
, 4);
566 if ((err
== 0) && (insn
& 0xfffffe00) == 0)
573 /* Structure of SPARC extended floating point numbers.
574 This information is not currently used by GDB, since no current SPARC
575 implementations support extended float. */
577 const struct ext_format ext_format_sparc
= {
578 /* tot sbyte smask expbyte manbyte */
579 16, 0, 0x80, 0,1, 4,8, /* sparc */
582 #ifdef USE_PROC_FS /* Target dependent support for /proc */
584 /* The /proc interface divides the target machine's register set up into
585 two different sets, the general register set (gregset) and the floating
586 point register set (fpregset). For each set, there is an ioctl to get
587 the current register set and another ioctl to set the current values.
589 The actual structure passed through the ioctl interface is, of course,
590 naturally machine dependent, and is different for each set of registers.
591 For the sparc for example, the general register set is typically defined
594 typedef int gregset_t[38];
600 and the floating point set by:
602 typedef struct prfpregset {
610 u_char pr_q_entrysize;
615 These routines provide the packing and unpacking of gregset_t and
616 fpregset_t formatted data.
621 /* Given a pointer to a general register set in /proc format (gregset_t *),
622 unpack the register contents and supply them as gdb's idea of the current
626 supply_gregset (gregsetp
)
627 prgregset_t
*gregsetp
;
630 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
632 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
633 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
635 supply_register (regi
, (char *) (regp
+ regi
));
638 /* These require a bit more care. */
639 supply_register (PS_REGNUM
, (char *) (regp
+ R_PS
));
640 supply_register (PC_REGNUM
, (char *) (regp
+ R_PC
));
641 supply_register (NPC_REGNUM
,(char *) (regp
+ R_nPC
));
642 supply_register (Y_REGNUM
, (char *) (regp
+ R_Y
));
646 fill_gregset (gregsetp
, regno
)
647 prgregset_t
*gregsetp
;
651 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
652 extern char registers
[];
654 for (regi
= 0 ; regi
<= R_I7
; regi
++)
656 if ((regno
== -1) || (regno
== regi
))
658 *(regp
+ regi
) = *(int *) ®isters
[REGISTER_BYTE (regi
)];
661 if ((regno
== -1) || (regno
== PS_REGNUM
))
663 *(regp
+ R_PS
) = *(int *) ®isters
[REGISTER_BYTE (PS_REGNUM
)];
665 if ((regno
== -1) || (regno
== PC_REGNUM
))
667 *(regp
+ R_PC
) = *(int *) ®isters
[REGISTER_BYTE (PC_REGNUM
)];
669 if ((regno
== -1) || (regno
== NPC_REGNUM
))
671 *(regp
+ R_nPC
) = *(int *) ®isters
[REGISTER_BYTE (NPC_REGNUM
)];
673 if ((regno
== -1) || (regno
== Y_REGNUM
))
675 *(regp
+ R_Y
) = *(int *) ®isters
[REGISTER_BYTE (Y_REGNUM
)];
679 #if defined (FP0_REGNUM)
681 /* Given a pointer to a floating point register set in /proc format
682 (fpregset_t *), unpack the register contents and supply them as gdb's
683 idea of the current floating point register values. */
686 supply_fpregset (fpregsetp
)
687 prfpregset_t
*fpregsetp
;
692 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
694 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
695 supply_register (regi
, from
);
697 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
700 /* Given a pointer to a floating point register set in /proc format
701 (fpregset_t *), update the register specified by REGNO from gdb's idea
702 of the current floating point register set. If REGNO is -1, update
706 fill_fpregset (fpregsetp
, regno
)
707 prfpregset_t
*fpregsetp
;
713 extern char registers
[];
715 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
717 if ((regno
== -1) || (regno
== regi
))
719 from
= (char *) ®isters
[REGISTER_BYTE (regi
)];
720 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
721 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
724 if ((regno
== -1) || (regno
== FPS_REGNUM
))
726 fpregsetp
->pr_fsr
= *(int *) ®isters
[REGISTER_BYTE (FPS_REGNUM
)];
730 #endif /* defined (FP0_REGNUM) */
732 #endif /* USE_PROC_FS */
735 #ifdef GET_LONGJMP_TARGET
737 /* Figure out where the longjmp will land. We expect that we have just entered
738 longjmp and haven't yet setup the stack frame, so the args are still in the
739 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
740 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
741 This routine returns true on success */
744 get_longjmp_target(pc
)
748 #define LONGJMP_TARGET_SIZE 4
749 char buf
[LONGJMP_TARGET_SIZE
];
751 jb_addr
= read_register(O0_REGNUM
);
753 if (target_read_memory(jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, buf
,
754 LONGJMP_TARGET_SIZE
))
757 *pc
= extract_address (buf
, LONGJMP_TARGET_SIZE
);
761 #endif /* GET_LONGJMP_TARGET */
763 /* So far used only for sparc solaris. In sparc solaris, we recognize
764 a trampoline by it's section name. That is, if the pc is in a
765 section named ".plt" then we are in a trampline. */
768 in_solib_trampoline(pc
, name
)
772 struct obj_section
*s
;
775 s
= find_pc_section(pc
);
778 && s
->sec_ptr
->name
!= NULL
779 && STREQ (s
->sec_ptr
->name
, ".plt"));