1 /* Target-dependent code for SPARC.
3 Copyright (C) 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street, Fifth Floor,
20 Boston, MA 02110-1301, USA. */
23 #include "arch-utils.h"
25 #include "floatformat.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
39 #include "gdb_assert.h"
40 #include "gdb_string.h"
42 #include "sparc-tdep.h"
46 /* This file implements the SPARC 32-bit ABI as defined by the section
47 "Low-Level System Information" of the SPARC Compliance Definition
48 (SCD) 2.4.1, which is the 32-bit System V psABI for SPARC. The SCD
49 lists changes with respect to the original 32-bit psABI as defined
50 in the "System V ABI, SPARC Processor Supplement".
52 Note that if we talk about SunOS, we mean SunOS 4.x, which was
53 BSD-based, which is sometimes (retroactively?) referred to as
54 Solaris 1.x. If we talk about Solaris we mean Solaris 2.x and
55 above (Solaris 7, 8 and 9 are nothing but Solaris 2.7, 2.8 and 2.9
56 suffering from severe version number inflation). Solaris 2.x is
57 also known as SunOS 5.x, since that's what uname(1) says. Solaris
60 /* Please use the sparc32_-prefix for 32-bit specific code, the
61 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
62 code that can handle both. The 64-bit specific code lives in
63 sparc64-tdep.c; don't add any here. */
65 /* The SPARC Floating-Point Quad-Precision format is similar to
66 big-endian IA-64 Quad-recision format. */
67 #define floatformat_sparc_quad floatformat_ia64_quad_big
69 /* The stack pointer is offset from the stack frame by a BIAS of 2047
70 (0x7ff) for 64-bit code. BIAS is likely to be defined on SPARC
71 hosts, so undefine it first. */
75 /* Macros to extract fields from SPARC instructions. */
76 #define X_OP(i) (((i) >> 30) & 0x3)
77 #define X_RD(i) (((i) >> 25) & 0x1f)
78 #define X_A(i) (((i) >> 29) & 1)
79 #define X_COND(i) (((i) >> 25) & 0xf)
80 #define X_OP2(i) (((i) >> 22) & 0x7)
81 #define X_IMM22(i) ((i) & 0x3fffff)
82 #define X_OP3(i) (((i) >> 19) & 0x3f)
83 #define X_RS1(i) (((i) >> 14) & 0x1f)
84 #define X_I(i) (((i) >> 13) & 1)
85 /* Sign extension macros. */
86 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
87 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
88 #define X_SIMM13(i) ((((i) & 0x1fff) ^ 0x1000) - 0x1000)
90 /* Fetch the instruction at PC. Instructions are always big-endian
91 even if the processor operates in little-endian mode. */
94 sparc_fetch_instruction (CORE_ADDR pc
)
100 /* If we can't read the instruction at PC, return zero. */
101 if (target_read_memory (pc
, buf
, sizeof (buf
)))
105 for (i
= 0; i
< sizeof (buf
); i
++)
106 insn
= (insn
<< 8) | buf
[i
];
111 /* Return non-zero if the instruction corresponding to PC is an "unimp"
115 sparc_is_unimp_insn (CORE_ADDR pc
)
117 const unsigned long insn
= sparc_fetch_instruction (pc
);
119 return ((insn
& 0xc1c00000) == 0);
122 /* OpenBSD/sparc includes StackGhost, which according to the author's
123 website http://stackghost.cerias.purdue.edu "... transparently and
124 automatically protects applications' stack frames; more
125 specifically, it guards the return pointers. The protection
126 mechanisms require no application source or binary modification and
127 imposes only a negligible performance penalty."
129 The same website provides the following description of how
132 "StackGhost interfaces with the kernel trap handler that would
133 normally write out registers to the stack and the handler that
134 would read them back in. By XORing a cookie into the
135 return-address saved in the user stack when it is actually written
136 to the stack, and then XOR it out when the return-address is pulled
137 from the stack, StackGhost can cause attacker corrupted return
138 pointers to behave in a manner the attacker cannot predict.
139 StackGhost can also use several unused bits in the return pointer
140 to detect a smashed return pointer and abort the process."
142 For GDB this means that whenever we're reading %i7 from a stack
143 frame's window save area, we'll have to XOR the cookie.
145 More information on StackGuard can be found on in:
147 Mike Frantzen and Mike Shuey. "StackGhost: Hardware Facilitated
148 Stack Protection." 2001. Published in USENIX Security Symposium
151 /* Fetch StackGhost Per-Process XOR cookie. */
154 sparc_fetch_wcookie (void)
156 struct target_ops
*ops
= ¤t_target
;
160 len
= target_read_partial (ops
, TARGET_OBJECT_WCOOKIE
, NULL
, buf
, 0, 8);
164 /* We should have either an 32-bit or an 64-bit cookie. */
165 gdb_assert (len
== 4 || len
== 8);
167 return extract_unsigned_integer (buf
, len
);
171 /* Return the contents if register REGNUM as an address. */
174 sparc_address_from_register (int regnum
)
178 regcache_cooked_read_unsigned (current_regcache
, regnum
, &addr
);
183 /* The functions on this page are intended to be used to classify
184 function arguments. */
186 /* Check whether TYPE is "Integral or Pointer". */
189 sparc_integral_or_pointer_p (const struct type
*type
)
191 int len
= TYPE_LENGTH (type
);
193 switch (TYPE_CODE (type
))
199 case TYPE_CODE_RANGE
:
200 /* We have byte, half-word, word and extended-word/doubleword
201 integral types. The doubleword is an extension to the
202 original 32-bit ABI by the SCD 2.4.x. */
203 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
206 /* Allow either 32-bit or 64-bit pointers. */
207 return (len
== 4 || len
== 8);
215 /* Check whether TYPE is "Floating". */
218 sparc_floating_p (const struct type
*type
)
220 switch (TYPE_CODE (type
))
224 int len
= TYPE_LENGTH (type
);
225 return (len
== 4 || len
== 8 || len
== 16);
234 /* Check whether TYPE is "Structure or Union". */
237 sparc_structure_or_union_p (const struct type
*type
)
239 switch (TYPE_CODE (type
))
241 case TYPE_CODE_STRUCT
:
242 case TYPE_CODE_UNION
:
251 /* Register information. */
253 static const char *sparc32_register_names
[] =
255 "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
256 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
257 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
258 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
260 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
261 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
262 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
263 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
265 "y", "psr", "wim", "tbr", "pc", "npc", "fsr", "csr"
268 /* Total number of registers. */
269 #define SPARC32_NUM_REGS ARRAY_SIZE (sparc32_register_names)
271 /* We provide the aliases %d0..%d30 for the floating registers as
272 "psuedo" registers. */
274 static const char *sparc32_pseudo_register_names
[] =
276 "d0", "d2", "d4", "d6", "d8", "d10", "d12", "d14",
277 "d16", "d18", "d20", "d22", "d24", "d26", "d28", "d30"
280 /* Total number of pseudo registers. */
281 #define SPARC32_NUM_PSEUDO_REGS ARRAY_SIZE (sparc32_pseudo_register_names)
283 /* Return the name of register REGNUM. */
286 sparc32_register_name (int regnum
)
288 if (regnum
>= 0 && regnum
< SPARC32_NUM_REGS
)
289 return sparc32_register_names
[regnum
];
291 if (regnum
< SPARC32_NUM_REGS
+ SPARC32_NUM_PSEUDO_REGS
)
292 return sparc32_pseudo_register_names
[regnum
- SPARC32_NUM_REGS
];
297 /* Return the GDB type object for the "standard" data type of data in
301 sparc32_register_type (struct gdbarch
*gdbarch
, int regnum
)
303 if (regnum
>= SPARC_F0_REGNUM
&& regnum
<= SPARC_F31_REGNUM
)
304 return builtin_type_float
;
306 if (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
)
307 return builtin_type_double
;
309 if (regnum
== SPARC_SP_REGNUM
|| regnum
== SPARC_FP_REGNUM
)
310 return builtin_type_void_data_ptr
;
312 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== SPARC32_NPC_REGNUM
)
313 return builtin_type_void_func_ptr
;
315 return builtin_type_int32
;
319 sparc32_pseudo_register_read (struct gdbarch
*gdbarch
,
320 struct regcache
*regcache
,
321 int regnum
, gdb_byte
*buf
)
323 gdb_assert (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
);
325 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC32_D0_REGNUM
);
326 regcache_raw_read (regcache
, regnum
, buf
);
327 regcache_raw_read (regcache
, regnum
+ 1, buf
+ 4);
331 sparc32_pseudo_register_write (struct gdbarch
*gdbarch
,
332 struct regcache
*regcache
,
333 int regnum
, const gdb_byte
*buf
)
335 gdb_assert (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
);
337 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC32_D0_REGNUM
);
338 regcache_raw_write (regcache
, regnum
, buf
);
339 regcache_raw_write (regcache
, regnum
+ 1, buf
+ 4);
344 sparc32_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
,
345 CORE_ADDR funcaddr
, int using_gcc
,
346 struct value
**args
, int nargs
,
347 struct type
*value_type
,
348 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
)
353 if (using_struct_return (value_type
, using_gcc
))
357 /* This is an UNIMP instruction. */
358 store_unsigned_integer (buf
, 4, TYPE_LENGTH (value_type
) & 0x1fff);
359 write_memory (sp
- 8, buf
, 4);
367 sparc32_store_arguments (struct regcache
*regcache
, int nargs
,
368 struct value
**args
, CORE_ADDR sp
,
369 int struct_return
, CORE_ADDR struct_addr
)
371 /* Number of words in the "parameter array". */
372 int num_elements
= 0;
376 for (i
= 0; i
< nargs
; i
++)
378 struct type
*type
= value_type (args
[i
]);
379 int len
= TYPE_LENGTH (type
);
381 if (sparc_structure_or_union_p (type
)
382 || (sparc_floating_p (type
) && len
== 16))
384 /* Structure, Union and Quad-Precision Arguments. */
387 /* Use doubleword alignment for these values. That's always
388 correct, and wasting a few bytes shouldn't be a problem. */
391 write_memory (sp
, value_contents (args
[i
]), len
);
392 args
[i
] = value_from_pointer (lookup_pointer_type (type
), sp
);
395 else if (sparc_floating_p (type
))
397 /* Floating arguments. */
398 gdb_assert (len
== 4 || len
== 8);
399 num_elements
+= (len
/ 4);
403 /* Integral and pointer arguments. */
404 gdb_assert (sparc_integral_or_pointer_p (type
));
407 args
[i
] = value_cast (builtin_type_int32
, args
[i
]);
408 num_elements
+= ((len
+ 3) / 4);
412 /* Always allocate at least six words. */
413 sp
-= max (6, num_elements
) * 4;
415 /* The psABI says that "Software convention requires space for the
416 struct/union return value pointer, even if the word is unused." */
419 /* The psABI says that "Although software convention and the
420 operating system require every stack frame to be doubleword
424 for (i
= 0; i
< nargs
; i
++)
426 const bfd_byte
*valbuf
= value_contents (args
[i
]);
427 struct type
*type
= value_type (args
[i
]);
428 int len
= TYPE_LENGTH (type
);
430 gdb_assert (len
== 4 || len
== 8);
434 int regnum
= SPARC_O0_REGNUM
+ element
;
436 regcache_cooked_write (regcache
, regnum
, valbuf
);
437 if (len
> 4 && element
< 5)
438 regcache_cooked_write (regcache
, regnum
+ 1, valbuf
+ 4);
441 /* Always store the argument in memory. */
442 write_memory (sp
+ 4 + element
* 4, valbuf
, len
);
446 gdb_assert (element
== num_elements
);
452 store_unsigned_integer (buf
, 4, struct_addr
);
453 write_memory (sp
, buf
, 4);
460 sparc32_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
461 struct regcache
*regcache
, CORE_ADDR bp_addr
,
462 int nargs
, struct value
**args
, CORE_ADDR sp
,
463 int struct_return
, CORE_ADDR struct_addr
)
465 CORE_ADDR call_pc
= (struct_return
? (bp_addr
- 12) : (bp_addr
- 8));
467 /* Set return address. */
468 regcache_cooked_write_unsigned (regcache
, SPARC_O7_REGNUM
, call_pc
);
470 /* Set up function arguments. */
471 sp
= sparc32_store_arguments (regcache
, nargs
, args
, sp
,
472 struct_return
, struct_addr
);
474 /* Allocate the 16-word window save area. */
477 /* Stack should be doubleword aligned at this point. */
478 gdb_assert (sp
% 8 == 0);
480 /* Finally, update the stack pointer. */
481 regcache_cooked_write_unsigned (regcache
, SPARC_SP_REGNUM
, sp
);
487 /* Use the program counter to determine the contents and size of a
488 breakpoint instruction. Return a pointer to a string of bytes that
489 encode a breakpoint instruction, store the length of the string in
490 *LEN and optionally adjust *PC to point to the correct memory
491 location for inserting the breakpoint. */
493 static const gdb_byte
*
494 sparc_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
496 static const gdb_byte break_insn
[] = { 0x91, 0xd0, 0x20, 0x01 };
498 *len
= sizeof (break_insn
);
503 /* Allocate and initialize a frame cache. */
505 static struct sparc_frame_cache
*
506 sparc_alloc_frame_cache (void)
508 struct sparc_frame_cache
*cache
;
511 cache
= FRAME_OBSTACK_ZALLOC (struct sparc_frame_cache
);
517 /* Frameless until proven otherwise. */
518 cache
->frameless_p
= 1;
520 cache
->struct_return_p
= 0;
526 sparc_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
527 struct sparc_frame_cache
*cache
)
529 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
534 if (current_pc
<= pc
)
537 /* We have to handle to "Procedure Linkage Table" (PLT) special. On
538 SPARC the linker usually defines a symbol (typically
539 _PROCEDURE_LINKAGE_TABLE_) at the start of the .plt section.
540 This symbol makes us end up here with PC pointing at the start of
541 the PLT and CURRENT_PC probably pointing at a PLT entry. If we
542 would do our normal prologue analysis, we would probably conclude
543 that we've got a frame when in reality we don't, since the
544 dynamic linker patches up the first PLT with some code that
545 starts with a SAVE instruction. Patch up PC such that it points
546 at the start of our PLT entry. */
547 if (tdep
->plt_entry_size
> 0 && in_plt_section (current_pc
, NULL
))
548 pc
= current_pc
- ((current_pc
- pc
) % tdep
->plt_entry_size
);
550 insn
= sparc_fetch_instruction (pc
);
552 /* Recognize a SETHI insn and record its destination. */
553 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 0x04)
558 insn
= sparc_fetch_instruction (pc
+ 4);
561 /* Allow for an arithmetic operation on DEST or %g1. */
562 if (X_OP (insn
) == 2 && X_I (insn
)
563 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
567 insn
= sparc_fetch_instruction (pc
+ 8);
570 /* Check for the SAVE instruction that sets up the frame. */
571 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3c)
573 cache
->frameless_p
= 0;
574 return pc
+ offset
+ 4;
581 sparc_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
583 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
584 return frame_unwind_register_unsigned (next_frame
, tdep
->pc_regnum
);
587 /* Return PC of first real instruction of the function starting at
591 sparc32_skip_prologue (CORE_ADDR start_pc
)
593 struct symtab_and_line sal
;
594 CORE_ADDR func_start
, func_end
;
595 struct sparc_frame_cache cache
;
597 /* This is the preferred method, find the end of the prologue by
598 using the debugging information. */
599 if (find_pc_partial_function (start_pc
, NULL
, &func_start
, &func_end
))
601 sal
= find_pc_line (func_start
, 0);
603 if (sal
.end
< func_end
604 && start_pc
<= sal
.end
)
608 start_pc
= sparc_analyze_prologue (start_pc
, 0xffffffffUL
, &cache
);
610 /* The psABI says that "Although the first 6 words of arguments
611 reside in registers, the standard stack frame reserves space for
612 them.". It also suggests that a function may use that space to
613 "write incoming arguments 0 to 5" into that space, and that's
614 indeed what GCC seems to be doing. In that case GCC will
615 generate debug information that points to the stack slots instead
616 of the registers, so we should consider the instructions that
617 write out these incoming arguments onto the stack. Of course we
618 only need to do this if we have a stack frame. */
620 while (!cache
.frameless_p
)
622 unsigned long insn
= sparc_fetch_instruction (start_pc
);
624 /* Recognize instructions that store incoming arguments in
625 %i0...%i5 into the corresponding stack slot. */
626 if (X_OP (insn
) == 3 && (X_OP3 (insn
) & 0x3c) == 0x04 && X_I (insn
)
627 && (X_RD (insn
) >= 24 && X_RD (insn
) <= 29) && X_RS1 (insn
) == 30
628 && X_SIMM13 (insn
) == 68 + (X_RD (insn
) - 24) * 4)
642 struct sparc_frame_cache
*
643 sparc_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
645 struct sparc_frame_cache
*cache
;
650 cache
= sparc_alloc_frame_cache ();
653 cache
->pc
= frame_func_unwind (next_frame
);
656 CORE_ADDR addr_in_block
= frame_unwind_address_in_block (next_frame
);
657 sparc_analyze_prologue (cache
->pc
, addr_in_block
, cache
);
660 if (cache
->frameless_p
)
662 /* This function is frameless, so %fp (%i6) holds the frame
663 pointer for our calling frame. Use %sp (%o6) as this frame's
666 frame_unwind_register_unsigned (next_frame
, SPARC_SP_REGNUM
);
670 /* For normal frames, %fp (%i6) holds the frame pointer, the
671 base address for the current stack frame. */
673 frame_unwind_register_unsigned (next_frame
, SPARC_FP_REGNUM
);
682 struct sparc_frame_cache
*
683 sparc32_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
685 struct sparc_frame_cache
*cache
;
691 cache
= sparc_frame_cache (next_frame
, this_cache
);
693 sym
= find_pc_function (cache
->pc
);
696 struct type
*type
= check_typedef (SYMBOL_TYPE (sym
));
697 enum type_code code
= TYPE_CODE (type
);
699 if (code
== TYPE_CODE_FUNC
|| code
== TYPE_CODE_METHOD
)
701 type
= check_typedef (TYPE_TARGET_TYPE (type
));
702 if (sparc_structure_or_union_p (type
)
703 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16))
704 cache
->struct_return_p
= 1;
709 /* There is no debugging information for this function to
710 help us determine whether this function returns a struct
711 or not. So we rely on another heuristic which is to check
712 the instruction at the return address and see if this is
713 an "unimp" instruction. If it is, then it is a struct-return
716 int regnum
= cache
->frameless_p
? SPARC_O7_REGNUM
: SPARC_I7_REGNUM
;
718 pc
= frame_unwind_register_unsigned (next_frame
, regnum
) + 8;
719 if (sparc_is_unimp_insn (pc
))
720 cache
->struct_return_p
= 1;
727 sparc32_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
728 struct frame_id
*this_id
)
730 struct sparc_frame_cache
*cache
=
731 sparc32_frame_cache (next_frame
, this_cache
);
733 /* This marks the outermost frame. */
734 if (cache
->base
== 0)
737 (*this_id
) = frame_id_build (cache
->base
, cache
->pc
);
741 sparc32_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
742 int regnum
, int *optimizedp
,
743 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
744 int *realnump
, gdb_byte
*valuep
)
746 struct sparc_frame_cache
*cache
=
747 sparc32_frame_cache (next_frame
, this_cache
);
749 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== SPARC32_NPC_REGNUM
)
757 CORE_ADDR pc
= (regnum
== SPARC32_NPC_REGNUM
) ? 4 : 0;
759 /* If this functions has a Structure, Union or
760 Quad-Precision return value, we have to skip the UNIMP
761 instruction that encodes the size of the structure. */
762 if (cache
->struct_return_p
)
765 regnum
= cache
->frameless_p
? SPARC_O7_REGNUM
: SPARC_I7_REGNUM
;
766 pc
+= frame_unwind_register_unsigned (next_frame
, regnum
) + 8;
767 store_unsigned_integer (valuep
, 4, pc
);
772 /* Handle StackGhost. */
774 ULONGEST wcookie
= sparc_fetch_wcookie ();
776 if (wcookie
!= 0 && !cache
->frameless_p
&& regnum
== SPARC_I7_REGNUM
)
784 CORE_ADDR addr
= cache
->base
+ (regnum
- SPARC_L0_REGNUM
) * 4;
787 /* Read the value in from memory. */
788 i7
= get_frame_memory_unsigned (next_frame
, addr
, 4);
789 store_unsigned_integer (valuep
, 4, i7
^ wcookie
);
795 /* The previous frame's `local' and `in' registers have been saved
796 in the register save area. */
797 if (!cache
->frameless_p
798 && regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
)
801 *lvalp
= lval_memory
;
802 *addrp
= cache
->base
+ (regnum
- SPARC_L0_REGNUM
) * 4;
806 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
808 /* Read the value in from memory. */
809 read_memory (*addrp
, valuep
, register_size (gdbarch
, regnum
));
814 /* The previous frame's `out' registers are accessable as the
815 current frame's `in' registers. */
816 if (!cache
->frameless_p
817 && regnum
>= SPARC_O0_REGNUM
&& regnum
<= SPARC_O7_REGNUM
)
818 regnum
+= (SPARC_I0_REGNUM
- SPARC_O0_REGNUM
);
821 *lvalp
= lval_register
;
825 frame_unwind_register (next_frame
, (*realnump
), valuep
);
828 static const struct frame_unwind sparc32_frame_unwind
=
831 sparc32_frame_this_id
,
832 sparc32_frame_prev_register
835 static const struct frame_unwind
*
836 sparc32_frame_sniffer (struct frame_info
*next_frame
)
838 return &sparc32_frame_unwind
;
843 sparc32_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
845 struct sparc_frame_cache
*cache
=
846 sparc32_frame_cache (next_frame
, this_cache
);
851 static const struct frame_base sparc32_frame_base
=
853 &sparc32_frame_unwind
,
854 sparc32_frame_base_address
,
855 sparc32_frame_base_address
,
856 sparc32_frame_base_address
859 static struct frame_id
860 sparc_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
864 sp
= frame_unwind_register_unsigned (next_frame
, SPARC_SP_REGNUM
);
867 return frame_id_build (sp
, frame_pc_unwind (next_frame
));
871 /* Extract from an array REGBUF containing the (raw) register state, a
872 function return value of TYPE, and copy that into VALBUF. */
875 sparc32_extract_return_value (struct type
*type
, struct regcache
*regcache
,
878 int len
= TYPE_LENGTH (type
);
881 gdb_assert (!sparc_structure_or_union_p (type
));
882 gdb_assert (!(sparc_floating_p (type
) && len
== 16));
884 if (sparc_floating_p (type
))
886 /* Floating return values. */
887 regcache_cooked_read (regcache
, SPARC_F0_REGNUM
, buf
);
889 regcache_cooked_read (regcache
, SPARC_F1_REGNUM
, buf
+ 4);
890 memcpy (valbuf
, buf
, len
);
894 /* Integral and pointer return values. */
895 gdb_assert (sparc_integral_or_pointer_p (type
));
897 regcache_cooked_read (regcache
, SPARC_O0_REGNUM
, buf
);
900 regcache_cooked_read (regcache
, SPARC_O1_REGNUM
, buf
+ 4);
901 gdb_assert (len
== 8);
902 memcpy (valbuf
, buf
, 8);
906 /* Just stripping off any unused bytes should preserve the
907 signed-ness just fine. */
908 memcpy (valbuf
, buf
+ 4 - len
, len
);
913 /* Write into the appropriate registers a function return value stored
914 in VALBUF of type TYPE. */
917 sparc32_store_return_value (struct type
*type
, struct regcache
*regcache
,
918 const gdb_byte
*valbuf
)
920 int len
= TYPE_LENGTH (type
);
923 gdb_assert (!sparc_structure_or_union_p (type
));
924 gdb_assert (!(sparc_floating_p (type
) && len
== 16));
926 if (sparc_floating_p (type
))
928 /* Floating return values. */
929 memcpy (buf
, valbuf
, len
);
930 regcache_cooked_write (regcache
, SPARC_F0_REGNUM
, buf
);
932 regcache_cooked_write (regcache
, SPARC_F1_REGNUM
, buf
+ 4);
936 /* Integral and pointer return values. */
937 gdb_assert (sparc_integral_or_pointer_p (type
));
941 gdb_assert (len
== 8);
942 memcpy (buf
, valbuf
, 8);
943 regcache_cooked_write (regcache
, SPARC_O1_REGNUM
, buf
+ 4);
947 /* ??? Do we need to do any sign-extension here? */
948 memcpy (buf
+ 4 - len
, valbuf
, len
);
950 regcache_cooked_write (regcache
, SPARC_O0_REGNUM
, buf
);
954 static enum return_value_convention
955 sparc32_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
956 struct regcache
*regcache
, gdb_byte
*readbuf
,
957 const gdb_byte
*writebuf
)
959 /* The psABI says that "...every stack frame reserves the word at
960 %fp+64. If a function returns a structure, union, or
961 quad-precision value, this word should hold the address of the
962 object into which the return value should be copied." This
963 guarantees that we can always find the return value, not just
964 before the function returns. */
966 if (sparc_structure_or_union_p (type
)
967 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16))
974 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
975 addr
= read_memory_unsigned_integer (sp
+ 64, 4);
976 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
979 return RETURN_VALUE_ABI_PRESERVES_ADDRESS
;
983 sparc32_extract_return_value (type
, regcache
, readbuf
);
985 sparc32_store_return_value (type
, regcache
, writebuf
);
987 return RETURN_VALUE_REGISTER_CONVENTION
;
991 sparc32_stabs_argument_has_addr (struct gdbarch
*gdbarch
, struct type
*type
)
993 return (sparc_structure_or_union_p (type
)
994 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16));
998 /* The SPARC Architecture doesn't have hardware single-step support,
999 and most operating systems don't implement it either, so we provide
1000 software single-step mechanism. */
1003 sparc_analyze_control_transfer (struct gdbarch
*arch
,
1004 CORE_ADDR pc
, CORE_ADDR
*npc
)
1006 unsigned long insn
= sparc_fetch_instruction (pc
);
1007 int conditional_p
= X_COND (insn
) & 0x7;
1009 long offset
= 0; /* Must be signed for sign-extend. */
1011 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 3 && (insn
& 0x1000000) == 0)
1013 /* Branch on Integer Register with Prediction (BPr). */
1017 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 6)
1019 /* Branch on Floating-Point Condition Codes (FBfcc). */
1021 offset
= 4 * X_DISP22 (insn
);
1023 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 5)
1025 /* Branch on Floating-Point Condition Codes with Prediction
1028 offset
= 4 * X_DISP19 (insn
);
1030 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 2)
1032 /* Branch on Integer Condition Codes (Bicc). */
1034 offset
= 4 * X_DISP22 (insn
);
1036 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 1)
1038 /* Branch on Integer Condition Codes with Prediction (BPcc). */
1040 offset
= 4 * X_DISP19 (insn
);
1042 else if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3a)
1044 /* Trap instruction (TRAP). */
1045 return gdbarch_tdep (arch
)->step_trap (insn
);
1048 /* FIXME: Handle DONE and RETRY instructions. */
1054 /* For conditional branches, return nPC + 4 iff the annul
1056 return (X_A (insn
) ? *npc
+ 4 : 0);
1060 /* For unconditional branches, return the target if its
1061 specified condition is "always" and return nPC + 4 if the
1062 condition is "never". If the annul bit is 1, set *NPC to
1064 if (X_COND (insn
) == 0x0)
1065 pc
= *npc
, offset
= 4;
1069 gdb_assert (offset
!= 0);
1078 sparc_step_trap (unsigned long insn
)
1084 sparc_software_single_step (enum target_signal sig
, int insert_breakpoints_p
)
1086 struct gdbarch
*arch
= current_gdbarch
;
1087 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
1088 static CORE_ADDR npc
, nnpc
;
1089 static gdb_byte npc_save
[4], nnpc_save
[4];
1091 if (insert_breakpoints_p
)
1093 CORE_ADDR pc
, orig_npc
;
1095 pc
= sparc_address_from_register (tdep
->pc_regnum
);
1096 orig_npc
= npc
= sparc_address_from_register (tdep
->npc_regnum
);
1098 /* Analyze the instruction at PC. */
1099 nnpc
= sparc_analyze_control_transfer (arch
, pc
, &npc
);
1101 target_insert_breakpoint (npc
, npc_save
);
1103 target_insert_breakpoint (nnpc
, nnpc_save
);
1105 /* Assert that we have set at least one breakpoint, and that
1106 they're not set at the same spot - unless we're going
1107 from here straight to NULL, i.e. a call or jump to 0. */
1108 gdb_assert (npc
!= 0 || nnpc
!= 0 || orig_npc
== 0);
1109 gdb_assert (nnpc
!= npc
|| orig_npc
== 0);
1114 target_remove_breakpoint (npc
, npc_save
);
1116 target_remove_breakpoint (nnpc
, nnpc_save
);
1121 sparc_write_pc (CORE_ADDR pc
, ptid_t ptid
)
1123 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1125 write_register_pid (tdep
->pc_regnum
, pc
, ptid
);
1126 write_register_pid (tdep
->npc_regnum
, pc
+ 4, ptid
);
1129 /* Unglobalize NAME. */
1132 sparc_stabs_unglobalize_name (char *name
)
1134 /* The Sun compilers (Sun ONE Studio, Forte Developer, Sun WorkShop,
1135 SunPRO) convert file static variables into global values, a
1136 process known as globalization. In order to do this, the
1137 compiler will create a unique prefix and prepend it to each file
1138 static variable. For static variables within a function, this
1139 globalization prefix is followed by the function name (nested
1140 static variables within a function are supposed to generate a
1141 warning message, and are left alone). The procedure is
1142 documented in the Stabs Interface Manual, which is distrubuted
1143 with the compilers, although version 4.0 of the manual seems to
1144 be incorrect in some places, at least for SPARC. The
1145 globalization prefix is encoded into an N_OPT stab, with the form
1146 "G=<prefix>". The globalization prefix always seems to start
1147 with a dollar sign '$'; a dot '.' is used as a seperator. So we
1148 simply strip everything up until the last dot. */
1152 char *p
= strrchr (name
, '.');
1161 /* Return the appropriate register set for the core section identified
1162 by SECT_NAME and SECT_SIZE. */
1164 const struct regset
*
1165 sparc_regset_from_core_section (struct gdbarch
*gdbarch
,
1166 const char *sect_name
, size_t sect_size
)
1168 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1170 if (strcmp (sect_name
, ".reg") == 0 && sect_size
>= tdep
->sizeof_gregset
)
1171 return tdep
->gregset
;
1173 if (strcmp (sect_name
, ".reg2") == 0 && sect_size
>= tdep
->sizeof_fpregset
)
1174 return tdep
->fpregset
;
1180 static struct gdbarch
*
1181 sparc32_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1183 struct gdbarch_tdep
*tdep
;
1184 struct gdbarch
*gdbarch
;
1186 /* If there is already a candidate, use it. */
1187 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1189 return arches
->gdbarch
;
1191 /* Allocate space for the new architecture. */
1192 tdep
= XMALLOC (struct gdbarch_tdep
);
1193 gdbarch
= gdbarch_alloc (&info
, tdep
);
1195 tdep
->pc_regnum
= SPARC32_PC_REGNUM
;
1196 tdep
->npc_regnum
= SPARC32_NPC_REGNUM
;
1197 tdep
->gregset
= NULL
;
1198 tdep
->sizeof_gregset
= 0;
1199 tdep
->fpregset
= NULL
;
1200 tdep
->sizeof_fpregset
= 0;
1201 tdep
->plt_entry_size
= 0;
1202 tdep
->step_trap
= sparc_step_trap
;
1204 set_gdbarch_long_double_bit (gdbarch
, 128);
1205 set_gdbarch_long_double_format (gdbarch
, &floatformat_sparc_quad
);
1207 set_gdbarch_num_regs (gdbarch
, SPARC32_NUM_REGS
);
1208 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
1209 set_gdbarch_register_type (gdbarch
, sparc32_register_type
);
1210 set_gdbarch_num_pseudo_regs (gdbarch
, SPARC32_NUM_PSEUDO_REGS
);
1211 set_gdbarch_pseudo_register_read (gdbarch
, sparc32_pseudo_register_read
);
1212 set_gdbarch_pseudo_register_write (gdbarch
, sparc32_pseudo_register_write
);
1214 /* Register numbers of various important registers. */
1215 set_gdbarch_sp_regnum (gdbarch
, SPARC_SP_REGNUM
); /* %sp */
1216 set_gdbarch_pc_regnum (gdbarch
, SPARC32_PC_REGNUM
); /* %pc */
1217 set_gdbarch_fp0_regnum (gdbarch
, SPARC_F0_REGNUM
); /* %f0 */
1219 /* Call dummy code. */
1220 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
1221 set_gdbarch_push_dummy_code (gdbarch
, sparc32_push_dummy_code
);
1222 set_gdbarch_push_dummy_call (gdbarch
, sparc32_push_dummy_call
);
1224 set_gdbarch_return_value (gdbarch
, sparc32_return_value
);
1225 set_gdbarch_stabs_argument_has_addr
1226 (gdbarch
, sparc32_stabs_argument_has_addr
);
1228 set_gdbarch_skip_prologue (gdbarch
, sparc32_skip_prologue
);
1230 /* Stack grows downward. */
1231 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1233 set_gdbarch_breakpoint_from_pc (gdbarch
, sparc_breakpoint_from_pc
);
1235 set_gdbarch_frame_args_skip (gdbarch
, 8);
1237 set_gdbarch_print_insn (gdbarch
, print_insn_sparc
);
1239 set_gdbarch_software_single_step (gdbarch
, sparc_software_single_step
);
1240 set_gdbarch_write_pc (gdbarch
, sparc_write_pc
);
1242 set_gdbarch_unwind_dummy_id (gdbarch
, sparc_unwind_dummy_id
);
1244 set_gdbarch_unwind_pc (gdbarch
, sparc_unwind_pc
);
1246 frame_base_set_default (gdbarch
, &sparc32_frame_base
);
1248 /* Hook in ABI-specific overrides, if they have been registered. */
1249 gdbarch_init_osabi (info
, gdbarch
);
1251 frame_unwind_append_sniffer (gdbarch
, sparc32_frame_sniffer
);
1253 /* If we have register sets, enable the generic core file support. */
1255 set_gdbarch_regset_from_core_section (gdbarch
,
1256 sparc_regset_from_core_section
);
1261 /* Helper functions for dealing with register windows. */
1264 sparc_supply_rwindow (struct regcache
*regcache
, CORE_ADDR sp
, int regnum
)
1272 /* Registers are 64-bit. */
1275 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1277 if (regnum
== i
|| regnum
== -1)
1279 target_read_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 8), buf
, 8);
1281 /* Handle StackGhost. */
1282 if (i
== SPARC_I7_REGNUM
)
1284 ULONGEST wcookie
= sparc_fetch_wcookie ();
1285 ULONGEST i7
= extract_unsigned_integer (buf
+ offset
, 8);
1287 store_unsigned_integer (buf
+ offset
, 8, i7
^ wcookie
);
1290 regcache_raw_supply (regcache
, i
, buf
);
1296 /* Registers are 32-bit. Toss any sign-extension of the stack
1300 /* Clear out the top half of the temporary buffer, and put the
1301 register value in the bottom half if we're in 64-bit mode. */
1302 if (gdbarch_ptr_bit (current_gdbarch
) == 64)
1308 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1310 if (regnum
== i
|| regnum
== -1)
1312 target_read_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 4),
1315 /* Handle StackGhost. */
1316 if (i
== SPARC_I7_REGNUM
)
1318 ULONGEST wcookie
= sparc_fetch_wcookie ();
1319 ULONGEST i7
= extract_unsigned_integer (buf
+ offset
, 4);
1321 store_unsigned_integer (buf
+ offset
, 4, i7
^ wcookie
);
1324 regcache_raw_supply (regcache
, i
, buf
);
1331 sparc_collect_rwindow (const struct regcache
*regcache
,
1332 CORE_ADDR sp
, int regnum
)
1340 /* Registers are 64-bit. */
1343 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1345 if (regnum
== -1 || regnum
== SPARC_SP_REGNUM
|| regnum
== i
)
1347 regcache_raw_collect (regcache
, i
, buf
);
1349 /* Handle StackGhost. */
1350 if (i
== SPARC_I7_REGNUM
)
1352 ULONGEST wcookie
= sparc_fetch_wcookie ();
1353 ULONGEST i7
= extract_unsigned_integer (buf
+ offset
, 8);
1355 store_unsigned_integer (buf
, 8, i7
^ wcookie
);
1358 target_write_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 8), buf
, 8);
1364 /* Registers are 32-bit. Toss any sign-extension of the stack
1368 /* Only use the bottom half if we're in 64-bit mode. */
1369 if (gdbarch_ptr_bit (current_gdbarch
) == 64)
1372 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1374 if (regnum
== -1 || regnum
== SPARC_SP_REGNUM
|| regnum
== i
)
1376 regcache_raw_collect (regcache
, i
, buf
);
1378 /* Handle StackGhost. */
1379 if (i
== SPARC_I7_REGNUM
)
1381 ULONGEST wcookie
= sparc_fetch_wcookie ();
1382 ULONGEST i7
= extract_unsigned_integer (buf
+ offset
, 4);
1384 store_unsigned_integer (buf
+ offset
, 4, i7
^ wcookie
);
1387 target_write_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 4),
1394 /* Helper functions for dealing with register sets. */
1397 sparc32_supply_gregset (const struct sparc_gregset
*gregset
,
1398 struct regcache
*regcache
,
1399 int regnum
, const void *gregs
)
1401 const gdb_byte
*regs
= gregs
;
1404 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1405 regcache_raw_supply (regcache
, SPARC32_PSR_REGNUM
,
1406 regs
+ gregset
->r_psr_offset
);
1408 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1409 regcache_raw_supply (regcache
, SPARC32_PC_REGNUM
,
1410 regs
+ gregset
->r_pc_offset
);
1412 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1413 regcache_raw_supply (regcache
, SPARC32_NPC_REGNUM
,
1414 regs
+ gregset
->r_npc_offset
);
1416 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1417 regcache_raw_supply (regcache
, SPARC32_Y_REGNUM
,
1418 regs
+ gregset
->r_y_offset
);
1420 if (regnum
== SPARC_G0_REGNUM
|| regnum
== -1)
1421 regcache_raw_supply (regcache
, SPARC_G0_REGNUM
, NULL
);
1423 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1425 int offset
= gregset
->r_g1_offset
;
1427 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1429 if (regnum
== i
|| regnum
== -1)
1430 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1435 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1437 /* Not all of the register set variants include Locals and
1438 Inputs. For those that don't, we read them off the stack. */
1439 if (gregset
->r_l0_offset
== -1)
1443 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
1444 sparc_supply_rwindow (regcache
, sp
, regnum
);
1448 int offset
= gregset
->r_l0_offset
;
1450 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1452 if (regnum
== i
|| regnum
== -1)
1453 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1461 sparc32_collect_gregset (const struct sparc_gregset
*gregset
,
1462 const struct regcache
*regcache
,
1463 int regnum
, void *gregs
)
1465 gdb_byte
*regs
= gregs
;
1468 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1469 regcache_raw_collect (regcache
, SPARC32_PSR_REGNUM
,
1470 regs
+ gregset
->r_psr_offset
);
1472 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1473 regcache_raw_collect (regcache
, SPARC32_PC_REGNUM
,
1474 regs
+ gregset
->r_pc_offset
);
1476 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1477 regcache_raw_collect (regcache
, SPARC32_NPC_REGNUM
,
1478 regs
+ gregset
->r_npc_offset
);
1480 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1481 regcache_raw_collect (regcache
, SPARC32_Y_REGNUM
,
1482 regs
+ gregset
->r_y_offset
);
1484 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1486 int offset
= gregset
->r_g1_offset
;
1488 /* %g0 is always zero. */
1489 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1491 if (regnum
== i
|| regnum
== -1)
1492 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1497 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1499 /* Not all of the register set variants include Locals and
1500 Inputs. For those that don't, we read them off the stack. */
1501 if (gregset
->r_l0_offset
!= -1)
1503 int offset
= gregset
->r_l0_offset
;
1505 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1507 if (regnum
== i
|| regnum
== -1)
1508 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1516 sparc32_supply_fpregset (struct regcache
*regcache
,
1517 int regnum
, const void *fpregs
)
1519 const gdb_byte
*regs
= fpregs
;
1522 for (i
= 0; i
< 32; i
++)
1524 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1525 regcache_raw_supply (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1528 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1529 regcache_raw_supply (regcache
, SPARC32_FSR_REGNUM
, regs
+ (32 * 4) + 4);
1533 sparc32_collect_fpregset (const struct regcache
*regcache
,
1534 int regnum
, void *fpregs
)
1536 gdb_byte
*regs
= fpregs
;
1539 for (i
= 0; i
< 32; i
++)
1541 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1542 regcache_raw_collect (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1545 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1546 regcache_raw_collect (regcache
, SPARC32_FSR_REGNUM
, regs
+ (32 * 4) + 4);
1552 /* From <machine/reg.h>. */
1553 const struct sparc_gregset sparc32_sunos4_gregset
=
1566 /* Provide a prototype to silence -Wmissing-prototypes. */
1567 void _initialize_sparc_tdep (void);
1570 _initialize_sparc_tdep (void)
1572 register_gdbarch_init (bfd_arch_sparc
, sparc32_gdbarch_init
);