1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995,
4 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation,
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 /* ??? Support for calling functions from gdb in sparc64 is unfinished. */
27 #include "arch-utils.h"
33 #include "gdb_string.h"
38 #include <sys/procfs.h>
39 /* Prototypes for supply_gregset etc. */
45 #include "symfile.h" /* for 'entry_point_address' */
48 * Some local macros that have multi-arch and non-multi-arch versions:
51 #if (GDB_MULTI_ARCH > 0)
53 /* Does the target have Floating Point registers? */
54 #define SPARC_HAS_FPU (gdbarch_tdep (current_gdbarch)->has_fpu)
55 /* Number of bytes devoted to Floating Point registers: */
56 #define FP_REGISTER_BYTES (gdbarch_tdep (current_gdbarch)->fp_register_bytes)
57 /* Highest numbered Floating Point register. */
58 #define FP_MAX_REGNUM (gdbarch_tdep (current_gdbarch)->fp_max_regnum)
59 /* Size of a general (integer) register: */
60 #define SPARC_INTREG_SIZE (gdbarch_tdep (current_gdbarch)->intreg_size)
61 /* Offset within the call dummy stack of the saved registers. */
62 #define DUMMY_REG_SAVE_OFFSET (gdbarch_tdep (current_gdbarch)->reg_save_offset)
64 #else /* non-multi-arch */
67 /* Does the target have Floating Point registers? */
68 #if defined(TARGET_SPARCLET) || defined(TARGET_SPARCLITE)
69 #define SPARC_HAS_FPU 0
71 #define SPARC_HAS_FPU 1
74 /* Number of bytes devoted to Floating Point registers: */
75 #if (GDB_TARGET_IS_SPARC64)
76 #define FP_REGISTER_BYTES (64 * 4)
79 #define FP_REGISTER_BYTES (32 * 4)
81 #define FP_REGISTER_BYTES 0
85 /* Highest numbered Floating Point register. */
86 #if (GDB_TARGET_IS_SPARC64)
87 #define FP_MAX_REGNUM (FP0_REGNUM + 48)
89 #define FP_MAX_REGNUM (FP0_REGNUM + 32)
92 /* Size of a general (integer) register: */
93 #define SPARC_INTREG_SIZE (REGISTER_RAW_SIZE (G0_REGNUM))
95 /* Offset within the call dummy stack of the saved registers. */
96 #if (GDB_TARGET_IS_SPARC64)
97 #define DUMMY_REG_SAVE_OFFSET (128 + 16)
99 #define DUMMY_REG_SAVE_OFFSET 0x60
102 #endif /* GDB_MULTI_ARCH */
107 int fp_register_bytes
;
112 int call_dummy_call_offset
;
116 /* Now make GDB_TARGET_IS_SPARC64 a runtime test. */
117 /* FIXME MVS: or try testing bfd_arch_info.arch and bfd_arch_info.mach ...
118 * define GDB_TARGET_IS_SPARC64 \
119 * (TARGET_ARCHITECTURE->arch == bfd_arch_sparc && \
120 * (TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9 || \
121 * TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9a))
125 extern int stop_after_trap
;
127 /* We don't store all registers immediately when requested, since they
128 get sent over in large chunks anyway. Instead, we accumulate most
129 of the changes and send them over once. "deferred_stores" keeps
130 track of which sets of registers we have locally-changed copies of,
131 so we only need send the groups that have changed. */
133 int deferred_stores
= 0; /* Accumulated stores we want to do eventually. */
136 /* Some machines, such as Fujitsu SPARClite 86x, have a bi-endian mode
137 where instructions are big-endian and data are little-endian.
138 This flag is set when we detect that the target is of this type. */
143 /* Fetch a single instruction. Even on bi-endian machines
144 such as sparc86x, instructions are always big-endian. */
147 fetch_instruction (CORE_ADDR pc
)
149 unsigned long retval
;
151 unsigned char buf
[4];
153 read_memory (pc
, buf
, sizeof (buf
));
155 /* Start at the most significant end of the integer, and work towards
156 the least significant. */
158 for (i
= 0; i
< sizeof (buf
); ++i
)
159 retval
= (retval
<< 8) | buf
[i
];
164 /* Branches with prediction are treated like their non-predicting cousins. */
165 /* FIXME: What about floating point branches? */
167 /* Macros to extract fields from sparc instructions. */
168 #define X_OP(i) (((i) >> 30) & 0x3)
169 #define X_RD(i) (((i) >> 25) & 0x1f)
170 #define X_A(i) (((i) >> 29) & 1)
171 #define X_COND(i) (((i) >> 25) & 0xf)
172 #define X_OP2(i) (((i) >> 22) & 0x7)
173 #define X_IMM22(i) ((i) & 0x3fffff)
174 #define X_OP3(i) (((i) >> 19) & 0x3f)
175 #define X_RS1(i) (((i) >> 14) & 0x1f)
176 #define X_I(i) (((i) >> 13) & 1)
177 #define X_IMM13(i) ((i) & 0x1fff)
178 /* Sign extension macros. */
179 #define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000)
180 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
181 #define X_CC(i) (((i) >> 20) & 3)
182 #define X_P(i) (((i) >> 19) & 1)
183 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
184 #define X_RCOND(i) (((i) >> 25) & 7)
185 #define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000)
186 #define X_FCN(i) (((i) >> 25) & 31)
190 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
, done_retry
193 /* Simulate single-step ptrace call for sun4. Code written by Gary
194 Beihl (beihl@mcc.com). */
196 /* npc4 and next_pc describe the situation at the time that the
197 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
198 static CORE_ADDR next_pc
, npc4
, target
;
199 static int brknpc4
, brktrg
;
200 typedef char binsn_quantum
[BREAKPOINT_MAX
];
201 static binsn_quantum break_mem
[3];
203 static branch_type
isbranch (long, CORE_ADDR
, CORE_ADDR
*);
205 /* single_step() is called just before we want to resume the inferior,
206 if we want to single-step it but there is no hardware or kernel single-step
207 support (as on all SPARCs). We find all the possible targets of the
208 coming instruction and breakpoint them.
210 single_step is also called just after the inferior stops. If we had
211 set up a simulated single-step, we undo our damage. */
214 sparc_software_single_step (enum target_signal ignore
, /* pid, but we don't need it */
215 int insert_breakpoints_p
)
221 if (insert_breakpoints_p
)
223 /* Always set breakpoint for NPC. */
224 next_pc
= read_register (NPC_REGNUM
);
225 npc4
= next_pc
+ 4; /* branch not taken */
227 target_insert_breakpoint (next_pc
, break_mem
[0]);
228 /* printf_unfiltered ("set break at %x\n",next_pc); */
230 pc
= read_register (PC_REGNUM
);
231 pc_instruction
= fetch_instruction (pc
);
232 br
= isbranch (pc_instruction
, pc
, &target
);
233 brknpc4
= brktrg
= 0;
237 /* Conditional annulled branch will either end up at
238 npc (if taken) or at npc+4 (if not taken).
241 target_insert_breakpoint (npc4
, break_mem
[1]);
243 else if (br
== baa
&& target
!= next_pc
)
245 /* Unconditional annulled branch will always end up at
248 target_insert_breakpoint (target
, break_mem
[2]);
250 else if (GDB_TARGET_IS_SPARC64
&& br
== done_retry
)
253 target_insert_breakpoint (target
, break_mem
[2]);
258 /* Remove breakpoints */
259 target_remove_breakpoint (next_pc
, break_mem
[0]);
262 target_remove_breakpoint (npc4
, break_mem
[1]);
265 target_remove_breakpoint (target
, break_mem
[2]);
269 struct frame_extra_info
274 /* Following fields only relevant for flat frames. */
277 /* Add this to ->frame to get the value of the stack pointer at the
278 time of the register saves. */
282 /* Call this for each newly created frame. For SPARC, we need to
283 calculate the bottom of the frame, and do some extra work if the
284 prologue has been generated via the -mflat option to GCC. In
285 particular, we need to know where the previous fp and the pc have
286 been stashed, since their exact position within the frame may vary. */
289 sparc_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
292 CORE_ADDR prologue_start
, prologue_end
;
295 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
296 frame_saved_regs_zalloc (fi
);
298 fi
->extra_info
->bottom
=
300 (get_frame_base (fi
) == get_frame_base (fi
->next
) ? fi
->next
->extra_info
->bottom
:
301 get_frame_base (fi
->next
)) : read_sp ());
303 /* If fi->next is NULL, then we already set ->frame by passing read_fp()
304 to create_new_frame. */
309 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
311 /* Compute ->frame as if not flat. If it is flat, we'll change
313 if (fi
->next
->next
!= NULL
314 && ((get_frame_type (fi
->next
->next
) == SIGTRAMP_FRAME
)
315 || deprecated_frame_in_dummy (fi
->next
->next
))
316 && frameless_look_for_prologue (fi
->next
))
318 /* A frameless function interrupted by a signal did not change
319 the frame pointer, fix up frame pointer accordingly. */
320 deprecated_update_frame_base_hack (fi
, get_frame_base (fi
->next
));
321 fi
->extra_info
->bottom
= fi
->next
->extra_info
->bottom
;
325 /* Should we adjust for stack bias here? */
326 get_saved_register (buf
, 0, 0, fi
, FP_REGNUM
, 0);
327 deprecated_update_frame_base_hack (fi
, extract_address (buf
, REGISTER_RAW_SIZE (FP_REGNUM
)));
329 if (GDB_TARGET_IS_SPARC64
&& (get_frame_base (fi
) & 1))
330 deprecated_update_frame_base_hack (fi
, get_frame_base (fi
) + 2047);
334 /* Decide whether this is a function with a ``flat register window''
335 frame. For such functions, the frame pointer is actually in %i7. */
336 fi
->extra_info
->flat
= 0;
337 fi
->extra_info
->in_prologue
= 0;
338 if (find_pc_partial_function (get_frame_pc (fi
), &name
, &prologue_start
, &prologue_end
))
340 /* See if the function starts with an add (which will be of a
341 negative number if a flat frame) to the sp. FIXME: Does not
342 handle large frames which will need more than one instruction
344 insn
= fetch_instruction (prologue_start
);
345 if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0
346 && X_I (insn
) && X_SIMM13 (insn
) < 0)
348 int offset
= X_SIMM13 (insn
);
350 /* Then look for a save of %i7 into the frame. */
351 insn
= fetch_instruction (prologue_start
+ 4);
355 && X_RS1 (insn
) == 14)
359 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
361 /* We definitely have a flat frame now. */
362 fi
->extra_info
->flat
= 1;
364 fi
->extra_info
->sp_offset
= offset
;
366 /* Overwrite the frame's address with the value in %i7. */
367 get_saved_register (buf
, 0, 0, fi
, I7_REGNUM
, 0);
368 deprecated_update_frame_base_hack (fi
, extract_address (buf
, REGISTER_RAW_SIZE (I7_REGNUM
)));
370 if (GDB_TARGET_IS_SPARC64
&& (get_frame_base (fi
) & 1))
371 deprecated_update_frame_base_hack (fi
, get_frame_base (fi
) + 2047);
373 /* Record where the fp got saved. */
374 fi
->extra_info
->fp_addr
=
375 get_frame_base (fi
) + fi
->extra_info
->sp_offset
+ X_SIMM13 (insn
);
377 /* Also try to collect where the pc got saved to. */
378 fi
->extra_info
->pc_addr
= 0;
379 insn
= fetch_instruction (prologue_start
+ 12);
383 && X_RS1 (insn
) == 14)
384 fi
->extra_info
->pc_addr
=
385 get_frame_base (fi
) + fi
->extra_info
->sp_offset
+ X_SIMM13 (insn
);
390 /* Check if the PC is in the function prologue before a SAVE
391 instruction has been executed yet. If so, set the frame
392 to the current value of the stack pointer and set
393 the in_prologue flag. */
395 struct symtab_and_line sal
;
397 sal
= find_pc_line (prologue_start
, 0);
398 if (sal
.line
== 0) /* no line info, use PC */
399 prologue_end
= get_frame_pc (fi
);
400 else if (sal
.end
< prologue_end
)
401 prologue_end
= sal
.end
;
402 if (get_frame_pc (fi
) < prologue_end
)
404 for (addr
= prologue_start
; addr
< get_frame_pc (fi
); addr
+= 4)
406 insn
= read_memory_integer (addr
, 4);
407 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3c)
408 break; /* SAVE seen, stop searching */
410 if (addr
>= get_frame_pc (fi
))
412 fi
->extra_info
->in_prologue
= 1;
413 deprecated_update_frame_base_hack (fi
, read_register (SP_REGNUM
));
418 if (fi
->next
&& get_frame_base (fi
) == 0)
420 /* Kludge to cause init_prev_frame_info to destroy the new frame. */
421 deprecated_update_frame_base_hack (fi
, get_frame_base (fi
->next
));
422 deprecated_update_frame_pc_hack (fi
, get_frame_pc (fi
->next
));
427 sparc_frame_chain (struct frame_info
*frame
)
429 /* Value that will cause FRAME_CHAIN_VALID to not worry about the chain
430 value. If it really is zero, we detect it later in
431 sparc_init_prev_frame. */
432 return (CORE_ADDR
) 1;
436 sparc_extract_struct_value_address (char *regbuf
)
438 return extract_address (regbuf
+ REGISTER_BYTE (O0_REGNUM
),
439 REGISTER_RAW_SIZE (O0_REGNUM
));
442 /* Find the pc saved in frame FRAME. */
445 sparc_frame_saved_pc (struct frame_info
*frame
)
450 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
451 if ((get_frame_type (frame
) == SIGTRAMP_FRAME
))
453 /* This is the signal trampoline frame.
454 Get the saved PC from the sigcontext structure. */
456 #ifndef SIGCONTEXT_PC_OFFSET
457 #define SIGCONTEXT_PC_OFFSET 12
460 CORE_ADDR sigcontext_addr
;
462 int saved_pc_offset
= SIGCONTEXT_PC_OFFSET
;
465 scbuf
= alloca (TARGET_PTR_BIT
/ HOST_CHAR_BIT
);
467 /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext
468 as the third parameter. The offset to the saved pc is 12. */
469 find_pc_partial_function (get_frame_pc (frame
), &name
,
470 (CORE_ADDR
*) NULL
, (CORE_ADDR
*) NULL
);
471 if (name
&& STREQ (name
, "ucbsigvechandler"))
472 saved_pc_offset
= 12;
474 /* The sigcontext address is contained in register O2. */
475 get_saved_register (buf
, (int *) NULL
, (CORE_ADDR
*) NULL
,
476 frame
, O0_REGNUM
+ 2, (enum lval_type
*) NULL
);
477 sigcontext_addr
= extract_address (buf
, REGISTER_RAW_SIZE (O0_REGNUM
+ 2));
479 /* Don't cause a memory_error when accessing sigcontext in case the
480 stack layout has changed or the stack is corrupt. */
481 target_read_memory (sigcontext_addr
+ saved_pc_offset
,
482 scbuf
, sizeof (scbuf
));
483 return extract_address (scbuf
, sizeof (scbuf
));
485 else if (frame
->extra_info
->in_prologue
||
486 (frame
->next
!= NULL
&&
487 ((get_frame_type (frame
->next
) == SIGTRAMP_FRAME
) ||
488 deprecated_frame_in_dummy (frame
->next
)) &&
489 frameless_look_for_prologue (frame
)))
491 /* A frameless function interrupted by a signal did not save
492 the PC, it is still in %o7. */
493 get_saved_register (buf
, (int *) NULL
, (CORE_ADDR
*) NULL
,
494 frame
, O7_REGNUM
, (enum lval_type
*) NULL
);
495 return PC_ADJUST (extract_address (buf
, SPARC_INTREG_SIZE
));
497 if (frame
->extra_info
->flat
)
498 addr
= frame
->extra_info
->pc_addr
;
500 addr
= frame
->extra_info
->bottom
+ FRAME_SAVED_I0
+
501 SPARC_INTREG_SIZE
* (I7_REGNUM
- I0_REGNUM
);
504 /* A flat frame leaf function might not save the PC anywhere,
505 just leave it in %o7. */
506 return PC_ADJUST (read_register (O7_REGNUM
));
508 read_memory (addr
, buf
, SPARC_INTREG_SIZE
);
509 return PC_ADJUST (extract_address (buf
, SPARC_INTREG_SIZE
));
512 /* Since an individual frame in the frame cache is defined by two
513 arguments (a frame pointer and a stack pointer), we need two
514 arguments to get info for an arbitrary stack frame. This routine
515 takes two arguments and makes the cached frames look as if these
516 two arguments defined a frame on the cache. This allows the rest
517 of info frame to extract the important arguments without
521 setup_arbitrary_frame (int argc
, CORE_ADDR
*argv
)
523 struct frame_info
*frame
;
526 error ("Sparc frame specifications require two arguments: fp and sp");
528 frame
= create_new_frame (argv
[0], 0);
531 internal_error (__FILE__
, __LINE__
,
532 "create_new_frame returned invalid frame");
534 frame
->extra_info
->bottom
= argv
[1];
535 deprecated_update_frame_pc_hack (frame
, FRAME_SAVED_PC (frame
));
539 /* Given a pc value, skip it forward past the function prologue by
540 disassembling instructions that appear to be a prologue.
542 If FRAMELESS_P is set, we are only testing to see if the function
543 is frameless. This allows a quicker answer.
545 This routine should be more specific in its actions; making sure
546 that it uses the same register in the initial prologue section. */
548 static CORE_ADDR
examine_prologue (CORE_ADDR
, int, struct frame_info
*,
552 examine_prologue (CORE_ADDR start_pc
, int frameless_p
, struct frame_info
*fi
,
553 CORE_ADDR
*saved_regs
)
557 CORE_ADDR pc
= start_pc
;
560 insn
= fetch_instruction (pc
);
562 /* Recognize the `sethi' insn and record its destination. */
563 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 4)
567 insn
= fetch_instruction (pc
);
570 /* Recognize an add immediate value to register to either %g1 or
571 the destination register recorded above. Actually, this might
572 well recognize several different arithmetic operations.
573 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
574 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
575 I imagine any compiler really does that, however). */
578 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
581 insn
= fetch_instruction (pc
);
584 /* Recognize any SAVE insn. */
585 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 60)
588 if (frameless_p
) /* If the save is all we care about, */
589 return pc
; /* return before doing more work */
590 insn
= fetch_instruction (pc
);
592 /* Recognize add to %sp. */
593 else if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0)
596 if (frameless_p
) /* If the add is all we care about, */
597 return pc
; /* return before doing more work */
599 insn
= fetch_instruction (pc
);
600 /* Recognize store of frame pointer (i7). */
604 && X_RS1 (insn
) == 14)
607 insn
= fetch_instruction (pc
);
609 /* Recognize sub %sp, <anything>, %i7. */
612 && X_RS1 (insn
) == 14
613 && X_RD (insn
) == 31)
616 insn
= fetch_instruction (pc
);
625 /* Without a save or add instruction, it's not a prologue. */
630 /* Recognize stores into the frame from the input registers.
631 This recognizes all non alternate stores of an input register,
632 into a location offset from the frame pointer between
635 /* The above will fail for arguments that are promoted
636 (eg. shorts to ints or floats to doubles), because the compiler
637 will pass them in positive-offset frame space, but the prologue
638 will save them (after conversion) in negative frame space at an
639 unpredictable offset. Therefore I am going to remove the
640 restriction on the target-address of the save, on the theory
641 that any unbroken sequence of saves from input registers must
642 be part of the prologue. In un-optimized code (at least), I'm
643 fairly sure that the compiler would emit SOME other instruction
644 (eg. a move or add) before emitting another save that is actually
645 a part of the function body.
647 Besides, the reserved stack space is different for SPARC64 anyway.
652 && (X_OP3 (insn
) & 0x3c) == 4 /* Store, non-alternate. */
653 && (X_RD (insn
) & 0x18) == 0x18 /* Input register. */
654 && X_I (insn
) /* Immediate mode. */
655 && X_RS1 (insn
) == 30) /* Off of frame pointer. */
656 ; /* empty statement -- fall thru to end of loop */
657 else if (GDB_TARGET_IS_SPARC64
659 && (X_OP3 (insn
) & 0x3c) == 12 /* store, extended (64-bit) */
660 && (X_RD (insn
) & 0x18) == 0x18 /* input register */
661 && X_I (insn
) /* immediate mode */
662 && X_RS1 (insn
) == 30) /* off of frame pointer */
663 ; /* empty statement -- fall thru to end of loop */
664 else if (X_OP (insn
) == 3
665 && (X_OP3 (insn
) & 0x3c) == 36 /* store, floating-point */
666 && X_I (insn
) /* immediate mode */
667 && X_RS1 (insn
) == 30) /* off of frame pointer */
668 ; /* empty statement -- fall thru to end of loop */
671 && X_OP3 (insn
) == 4 /* store? */
672 && X_RS1 (insn
) == 14) /* off of frame pointer */
674 if (saved_regs
&& X_I (insn
))
675 saved_regs
[X_RD (insn
)] =
676 get_frame_base (fi
) + fi
->extra_info
->sp_offset
+ X_SIMM13 (insn
);
681 insn
= fetch_instruction (pc
);
687 /* Advance PC across any function entry prologue instructions to reach
691 sparc_skip_prologue (CORE_ADDR start_pc
)
693 struct symtab_and_line sal
;
694 CORE_ADDR func_start
, func_end
;
696 /* This is the preferred method, find the end of the prologue by
697 using the debugging information. */
698 if (find_pc_partial_function (start_pc
, NULL
, &func_start
, &func_end
))
700 sal
= find_pc_line (func_start
, 0);
702 if (sal
.end
< func_end
703 && start_pc
<= sal
.end
)
707 /* Oh well, examine the code by hand. */
708 return examine_prologue (start_pc
, 0, NULL
, NULL
);
711 /* Is the prologue at IP frameless? */
714 sparc_prologue_frameless_p (CORE_ADDR ip
)
716 return ip
== examine_prologue (ip
, 1, NULL
, NULL
);
719 /* Check instruction at ADDR to see if it is a branch.
720 All non-annulled instructions will go to NPC or will trap.
721 Set *TARGET if we find a candidate branch; set to zero if not.
723 This isn't static as it's used by remote-sa.sparc.c. */
726 isbranch (long instruction
, CORE_ADDR addr
, CORE_ADDR
*target
)
728 branch_type val
= not_branch
;
729 long int offset
= 0; /* Must be signed for sign-extend. */
733 if (X_OP (instruction
) == 0
734 && (X_OP2 (instruction
) == 2
735 || X_OP2 (instruction
) == 6
736 || X_OP2 (instruction
) == 1
737 || X_OP2 (instruction
) == 3
738 || X_OP2 (instruction
) == 5
739 || (GDB_TARGET_IS_SPARC64
&& X_OP2 (instruction
) == 7)))
741 if (X_COND (instruction
) == 8)
742 val
= X_A (instruction
) ? baa
: ba
;
744 val
= X_A (instruction
) ? bicca
: bicc
;
745 switch (X_OP2 (instruction
))
748 if (!GDB_TARGET_IS_SPARC64
)
753 offset
= 4 * X_DISP22 (instruction
);
757 offset
= 4 * X_DISP19 (instruction
);
760 offset
= 4 * X_DISP16 (instruction
);
763 *target
= addr
+ offset
;
765 else if (GDB_TARGET_IS_SPARC64
766 && X_OP (instruction
) == 2
767 && X_OP3 (instruction
) == 62)
769 if (X_FCN (instruction
) == 0)
772 *target
= read_register (TNPC_REGNUM
);
775 else if (X_FCN (instruction
) == 1)
778 *target
= read_register (TPC_REGNUM
);
786 /* Find register number REGNUM relative to FRAME and put its
787 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
788 was optimized out (and thus can't be fetched). If the variable
789 was fetched from memory, set *ADDRP to where it was fetched from,
790 otherwise it was fetched from a register.
792 The argument RAW_BUFFER must point to aligned memory. */
795 sparc_get_saved_register (char *raw_buffer
, int *optimized
, CORE_ADDR
*addrp
,
796 struct frame_info
*frame
, int regnum
,
797 enum lval_type
*lval
)
799 struct frame_info
*frame1
;
802 if (!target_has_registers
)
803 error ("No registers.");
810 /* FIXME This code extracted from infcmd.c; should put elsewhere! */
813 /* error ("No selected frame."); */
814 if (!target_has_registers
)
815 error ("The program has no registers now.");
816 if (deprecated_selected_frame
== NULL
)
817 error ("No selected frame.");
818 /* Try to use selected frame */
819 frame
= get_prev_frame (deprecated_selected_frame
);
821 error ("Cmd not meaningful in the outermost frame.");
825 frame1
= frame
->next
;
827 /* Get saved PC from the frame info if not in innermost frame. */
828 if (regnum
== PC_REGNUM
&& frame1
!= NULL
)
832 if (raw_buffer
!= NULL
)
834 /* Put it back in target format. */
835 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), get_frame_pc (frame
));
842 while (frame1
!= NULL
)
844 /* FIXME MVS: wrong test for dummy frame at entry. */
846 if (get_frame_pc (frame1
) >= (frame1
->extra_info
->bottom
?
847 frame1
->extra_info
->bottom
: read_sp ())
848 && get_frame_pc (frame1
) <= get_frame_base (frame1
))
850 /* Dummy frame. All but the window regs are in there somewhere.
851 The window registers are saved on the stack, just like in a
853 if (regnum
>= G1_REGNUM
&& regnum
< G1_REGNUM
+ 7)
854 addr
= get_frame_base (frame1
) + (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
855 - (FP_REGISTER_BYTES
+ 8 * SPARC_INTREG_SIZE
);
856 else if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
857 /* NOTE: cagney/2002-05-04: The call to get_prev_frame()
858 is safe/cheap - there will always be a prev frame.
859 This is because frame1 is initialized to frame->next
860 (frame1->prev == frame) and is then advanced towards
861 the innermost (next) frame. */
862 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
863 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
865 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
866 /* NOTE: cagney/2002-05-04: The call to get_prev_frame()
867 is safe/cheap - there will always be a prev frame.
868 This is because frame1 is initialized to frame->next
869 (frame1->prev == frame) and is then advanced towards
870 the innermost (next) frame. */
871 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
872 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
874 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
875 addr
= get_frame_base (frame1
) + (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
876 - (FP_REGISTER_BYTES
+ 16 * SPARC_INTREG_SIZE
);
877 else if (SPARC_HAS_FPU
&&
878 regnum
>= FP0_REGNUM
&& regnum
< FP0_REGNUM
+ 32)
879 addr
= get_frame_base (frame1
) + (regnum
- FP0_REGNUM
) * 4
880 - (FP_REGISTER_BYTES
);
881 else if (GDB_TARGET_IS_SPARC64
&& SPARC_HAS_FPU
&&
882 regnum
>= FP0_REGNUM
+ 32 && regnum
< FP_MAX_REGNUM
)
883 addr
= get_frame_base (frame1
) + 32 * 4 + (regnum
- FP0_REGNUM
- 32) * 8
884 - (FP_REGISTER_BYTES
);
885 else if (regnum
>= Y_REGNUM
&& regnum
< NUM_REGS
)
886 addr
= get_frame_base (frame1
) + (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
887 - (FP_REGISTER_BYTES
+ 24 * SPARC_INTREG_SIZE
);
889 else if (frame1
->extra_info
->flat
)
892 if (regnum
== RP_REGNUM
)
893 addr
= frame1
->extra_info
->pc_addr
;
894 else if (regnum
== I7_REGNUM
)
895 addr
= frame1
->extra_info
->fp_addr
;
898 CORE_ADDR func_start
;
901 regs
= alloca (NUM_REGS
* sizeof (CORE_ADDR
));
902 memset (regs
, 0, NUM_REGS
* sizeof (CORE_ADDR
));
904 find_pc_partial_function (get_frame_pc (frame1
), NULL
, &func_start
, NULL
);
905 examine_prologue (func_start
, 0, frame1
, regs
);
911 /* Normal frame. Local and In registers are saved on stack. */
912 if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
913 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
914 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
916 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
917 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
918 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
920 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
922 /* Outs become ins. */
923 get_saved_register (raw_buffer
, optimized
, addrp
, frame1
,
924 (regnum
- O0_REGNUM
+ I0_REGNUM
), lval
);
930 frame1
= frame1
->next
;
936 if (regnum
== SP_REGNUM
)
938 if (raw_buffer
!= NULL
)
940 /* Put it back in target format. */
941 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), addr
);
947 if (raw_buffer
!= NULL
)
948 read_memory (addr
, raw_buffer
, REGISTER_RAW_SIZE (regnum
));
953 *lval
= lval_register
;
954 addr
= REGISTER_BYTE (regnum
);
955 if (raw_buffer
!= NULL
)
956 deprecated_read_register_gen (regnum
, raw_buffer
);
962 /* Push an empty stack frame, and record in it the current PC, regs, etc.
964 We save the non-windowed registers and the ins. The locals and outs
965 are new; they don't need to be saved. The i's and l's of
966 the last frame were already saved on the stack. */
968 /* Definitely see tm-sparc.h for more doc of the frame format here. */
970 /* See tm-sparc.h for how this is calculated. */
972 #define DUMMY_STACK_REG_BUF_SIZE \
973 (((8+8+8) * SPARC_INTREG_SIZE) + FP_REGISTER_BYTES)
974 #define DUMMY_STACK_SIZE \
975 (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET)
978 sparc_push_dummy_frame (void)
980 CORE_ADDR sp
, old_sp
;
983 register_temp
= alloca (DUMMY_STACK_SIZE
);
985 old_sp
= sp
= read_sp ();
987 if (GDB_TARGET_IS_SPARC64
)
989 /* PC, NPC, CCR, FSR, FPRS, Y, ASI */
990 deprecated_read_register_bytes (REGISTER_BYTE (PC_REGNUM
),
992 REGISTER_RAW_SIZE (PC_REGNUM
) * 7);
993 deprecated_read_register_bytes (REGISTER_BYTE (PSTATE_REGNUM
),
994 ®ister_temp
[7 * SPARC_INTREG_SIZE
],
995 REGISTER_RAW_SIZE (PSTATE_REGNUM
));
996 /* FIXME: not sure what needs to be saved here. */
1000 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
1001 deprecated_read_register_bytes (REGISTER_BYTE (Y_REGNUM
),
1003 REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
1006 deprecated_read_register_bytes (REGISTER_BYTE (O0_REGNUM
),
1007 ®ister_temp
[8 * SPARC_INTREG_SIZE
],
1008 SPARC_INTREG_SIZE
* 8);
1010 deprecated_read_register_bytes (REGISTER_BYTE (G0_REGNUM
),
1011 ®ister_temp
[16 * SPARC_INTREG_SIZE
],
1012 SPARC_INTREG_SIZE
* 8);
1015 deprecated_read_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
1016 ®ister_temp
[24 * SPARC_INTREG_SIZE
],
1019 sp
-= DUMMY_STACK_SIZE
;
1023 write_memory (sp
+ DUMMY_REG_SAVE_OFFSET
, ®ister_temp
[0],
1024 DUMMY_STACK_REG_BUF_SIZE
);
1026 if (strcmp (target_shortname
, "sim") != 0)
1028 /* NOTE: cagney/2002-04-04: The code below originally contained
1029 GDB's _only_ call to write_fp(). That call was eliminated by
1030 inlining the corresponding code. For the 64 bit case, the
1031 old function (sparc64_write_fp) did the below although I'm
1032 not clear why. The same goes for why this is only done when
1033 the underlying target is a simulator. */
1034 if (GDB_TARGET_IS_SPARC64
)
1036 /* Target is a 64 bit SPARC. */
1037 CORE_ADDR oldfp
= read_register (FP_REGNUM
);
1039 write_register (FP_REGNUM
, old_sp
- 2047);
1041 write_register (FP_REGNUM
, old_sp
);
1045 /* Target is a 32 bit SPARC. */
1046 write_register (FP_REGNUM
, old_sp
);
1048 /* Set return address register for the call dummy to the current PC. */
1049 write_register (I7_REGNUM
, read_pc () - 8);
1053 /* The call dummy will write this value to FP before executing
1054 the 'save'. This ensures that register window flushes work
1055 correctly in the simulator. */
1056 write_register (G0_REGNUM
+ 1, read_register (FP_REGNUM
));
1058 /* The call dummy will write this value to FP after executing
1060 write_register (G0_REGNUM
+ 2, old_sp
);
1062 /* The call dummy will write this value to the return address (%i7) after
1063 executing the 'save'. */
1064 write_register (G0_REGNUM
+ 3, read_pc () - 8);
1066 /* Set the FP that the call dummy will be using after the 'save'.
1067 This makes backtraces from an inferior function call work properly. */
1068 write_register (FP_REGNUM
, old_sp
);
1072 /* sparc_frame_find_saved_regs (). This function is here only because
1073 pop_frame uses it. Note there is an interesting corner case which
1074 I think few ports of GDB get right--if you are popping a frame
1075 which does not save some register that *is* saved by a more inner
1076 frame (such a frame will never be a dummy frame because dummy
1077 frames save all registers). Rewriting pop_frame to use
1078 get_saved_register would solve this problem and also get rid of the
1079 ugly duplication between sparc_frame_find_saved_regs and
1082 Stores, into an array of CORE_ADDR,
1083 the addresses of the saved registers of frame described by FRAME_INFO.
1084 This includes special registers such as pc and fp saved in special
1085 ways in the stack frame. sp is even more special:
1086 the address we return for it IS the sp for the next frame.
1088 Note that on register window machines, we are currently making the
1089 assumption that window registers are being saved somewhere in the
1090 frame in which they are being used. If they are stored in an
1091 inferior frame, find_saved_register will break.
1093 On the Sun 4, the only time all registers are saved is when
1094 a dummy frame is involved. Otherwise, the only saved registers
1095 are the LOCAL and IN registers which are saved as a result
1096 of the "save/restore" opcodes. This condition is determined
1097 by address rather than by value.
1099 The "pc" is not stored in a frame on the SPARC. (What is stored
1100 is a return address minus 8.) sparc_pop_frame knows how to
1101 deal with that. Other routines might or might not.
1103 See tm-sparc.h (PUSH_DUMMY_FRAME and friends) for CRITICAL information
1104 about how this works. */
1106 static void sparc_frame_find_saved_regs (struct frame_info
*, CORE_ADDR
*);
1109 sparc_frame_find_saved_regs (struct frame_info
*fi
, CORE_ADDR
*saved_regs_addr
)
1111 register int regnum
;
1112 CORE_ADDR frame_addr
= get_frame_base (fi
);
1115 internal_error (__FILE__
, __LINE__
,
1116 "Bad frame info struct in FRAME_FIND_SAVED_REGS");
1118 memset (saved_regs_addr
, 0, NUM_REGS
* sizeof (CORE_ADDR
));
1120 if (get_frame_pc (fi
) >= (fi
->extra_info
->bottom
?
1121 fi
->extra_info
->bottom
: read_sp ())
1122 && get_frame_pc (fi
) <= get_frame_base (fi
))
1124 /* Dummy frame. All but the window regs are in there somewhere. */
1125 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+ 7; regnum
++)
1126 saved_regs_addr
[regnum
] =
1127 frame_addr
+ (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
1128 - DUMMY_STACK_REG_BUF_SIZE
+ 16 * SPARC_INTREG_SIZE
;
1130 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; regnum
++)
1131 saved_regs_addr
[regnum
] =
1132 frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
1133 - DUMMY_STACK_REG_BUF_SIZE
+ 8 * SPARC_INTREG_SIZE
;
1136 for (regnum
= FP0_REGNUM
; regnum
< FP_MAX_REGNUM
; regnum
++)
1137 saved_regs_addr
[regnum
] = frame_addr
+ (regnum
- FP0_REGNUM
) * 4
1138 - DUMMY_STACK_REG_BUF_SIZE
+ 24 * SPARC_INTREG_SIZE
;
1140 if (GDB_TARGET_IS_SPARC64
)
1142 for (regnum
= PC_REGNUM
; regnum
< PC_REGNUM
+ 7; regnum
++)
1144 saved_regs_addr
[regnum
] =
1145 frame_addr
+ (regnum
- PC_REGNUM
) * SPARC_INTREG_SIZE
1146 - DUMMY_STACK_REG_BUF_SIZE
;
1148 saved_regs_addr
[PSTATE_REGNUM
] =
1149 frame_addr
+ 8 * SPARC_INTREG_SIZE
- DUMMY_STACK_REG_BUF_SIZE
;
1152 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
1153 saved_regs_addr
[regnum
] =
1154 frame_addr
+ (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
1155 - DUMMY_STACK_REG_BUF_SIZE
;
1157 frame_addr
= fi
->extra_info
->bottom
?
1158 fi
->extra_info
->bottom
: read_sp ();
1160 else if (fi
->extra_info
->flat
)
1162 CORE_ADDR func_start
;
1163 find_pc_partial_function (get_frame_pc (fi
), NULL
, &func_start
, NULL
);
1164 examine_prologue (func_start
, 0, fi
, saved_regs_addr
);
1166 /* Flat register window frame. */
1167 saved_regs_addr
[RP_REGNUM
] = fi
->extra_info
->pc_addr
;
1168 saved_regs_addr
[I7_REGNUM
] = fi
->extra_info
->fp_addr
;
1172 /* Normal frame. Just Local and In registers */
1173 frame_addr
= fi
->extra_info
->bottom
?
1174 fi
->extra_info
->bottom
: read_sp ();
1175 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; regnum
++)
1176 saved_regs_addr
[regnum
] =
1177 (frame_addr
+ (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
1179 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; regnum
++)
1180 saved_regs_addr
[regnum
] =
1181 (frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
1186 if (fi
->extra_info
->flat
)
1188 saved_regs_addr
[O7_REGNUM
] = fi
->extra_info
->pc_addr
;
1192 /* Pull off either the next frame pointer or the stack pointer */
1193 CORE_ADDR next_next_frame_addr
=
1194 (fi
->next
->extra_info
->bottom
?
1195 fi
->next
->extra_info
->bottom
: read_sp ());
1196 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 8; regnum
++)
1197 saved_regs_addr
[regnum
] =
1198 (next_next_frame_addr
1199 + (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
1203 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
1204 /* FIXME -- should this adjust for the sparc64 offset? */
1205 saved_regs_addr
[SP_REGNUM
] = get_frame_base (fi
);
1208 /* Discard from the stack the innermost frame, restoring all saved registers.
1210 Note that the values stored in fsr by
1211 deprecated_get_frame_saved_regs are *in the context of the called
1212 frame*. What this means is that the i regs of fsr must be restored
1213 into the o regs of the (calling) frame that we pop into. We don't
1214 care about the output regs of the calling frame, since unless it's
1215 a dummy frame, it won't have any output regs in it.
1217 We never have to bother with %l (local) regs, since the called routine's
1218 locals get tossed, and the calling routine's locals are already saved
1221 /* Definitely see tm-sparc.h for more doc of the frame format here. */
1224 sparc_pop_frame (void)
1226 register struct frame_info
*frame
= get_current_frame ();
1227 register CORE_ADDR pc
;
1232 fsr
= alloca (NUM_REGS
* sizeof (CORE_ADDR
));
1233 raw_buffer
= alloca (REGISTER_BYTES
);
1234 sparc_frame_find_saved_regs (frame
, &fsr
[0]);
1237 if (fsr
[FP0_REGNUM
])
1239 read_memory (fsr
[FP0_REGNUM
], raw_buffer
, FP_REGISTER_BYTES
);
1240 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
1241 raw_buffer
, FP_REGISTER_BYTES
);
1243 if (!(GDB_TARGET_IS_SPARC64
))
1245 if (fsr
[FPS_REGNUM
])
1247 read_memory (fsr
[FPS_REGNUM
], raw_buffer
, SPARC_INTREG_SIZE
);
1248 deprecated_write_register_gen (FPS_REGNUM
, raw_buffer
);
1250 if (fsr
[CPS_REGNUM
])
1252 read_memory (fsr
[CPS_REGNUM
], raw_buffer
, SPARC_INTREG_SIZE
);
1253 deprecated_write_register_gen (CPS_REGNUM
, raw_buffer
);
1259 read_memory (fsr
[G1_REGNUM
], raw_buffer
, 7 * SPARC_INTREG_SIZE
);
1260 deprecated_write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
,
1261 7 * SPARC_INTREG_SIZE
);
1264 if (frame
->extra_info
->flat
)
1266 /* Each register might or might not have been saved, need to test
1268 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; ++regnum
)
1270 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1271 SPARC_INTREG_SIZE
));
1272 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; ++regnum
)
1274 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1275 SPARC_INTREG_SIZE
));
1277 /* Handle all outs except stack pointer (o0-o5; o7). */
1278 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 6; ++regnum
)
1280 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1281 SPARC_INTREG_SIZE
));
1282 if (fsr
[O0_REGNUM
+ 7])
1283 write_register (O0_REGNUM
+ 7,
1284 read_memory_integer (fsr
[O0_REGNUM
+ 7],
1285 SPARC_INTREG_SIZE
));
1287 write_sp (get_frame_base (frame
));
1289 else if (fsr
[I0_REGNUM
])
1295 reg_temp
= alloca (SPARC_INTREG_SIZE
* 16);
1297 read_memory (fsr
[I0_REGNUM
], raw_buffer
, 8 * SPARC_INTREG_SIZE
);
1299 /* Get the ins and locals which we are about to restore. Just
1300 moving the stack pointer is all that is really needed, except
1301 store_inferior_registers is then going to write the ins and
1302 locals from the registers array, so we need to muck with the
1304 sp
= fsr
[SP_REGNUM
];
1306 if (GDB_TARGET_IS_SPARC64
&& (sp
& 1))
1309 read_memory (sp
, reg_temp
, SPARC_INTREG_SIZE
* 16);
1311 /* Restore the out registers.
1312 Among other things this writes the new stack pointer. */
1313 deprecated_write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
,
1314 SPARC_INTREG_SIZE
* 8);
1316 deprecated_write_register_bytes (REGISTER_BYTE (L0_REGNUM
), reg_temp
,
1317 SPARC_INTREG_SIZE
* 16);
1320 if (!(GDB_TARGET_IS_SPARC64
))
1322 write_register (PS_REGNUM
,
1323 read_memory_integer (fsr
[PS_REGNUM
],
1324 REGISTER_RAW_SIZE (PS_REGNUM
)));
1327 write_register (Y_REGNUM
,
1328 read_memory_integer (fsr
[Y_REGNUM
],
1329 REGISTER_RAW_SIZE (Y_REGNUM
)));
1332 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
1333 write_register (PC_REGNUM
,
1334 read_memory_integer (fsr
[PC_REGNUM
],
1335 REGISTER_RAW_SIZE (PC_REGNUM
)));
1336 if (fsr
[NPC_REGNUM
])
1337 write_register (NPC_REGNUM
,
1338 read_memory_integer (fsr
[NPC_REGNUM
],
1339 REGISTER_RAW_SIZE (NPC_REGNUM
)));
1341 else if (frame
->extra_info
->flat
)
1343 if (frame
->extra_info
->pc_addr
)
1344 pc
= PC_ADJUST ((CORE_ADDR
)
1345 read_memory_integer (frame
->extra_info
->pc_addr
,
1346 REGISTER_RAW_SIZE (PC_REGNUM
)));
1349 /* I think this happens only in the innermost frame, if so then
1350 it is a complicated way of saying
1351 "pc = read_register (O7_REGNUM);". */
1354 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
1355 get_saved_register (buf
, 0, 0, frame
, O7_REGNUM
, 0);
1356 pc
= PC_ADJUST (extract_address
1357 (buf
, REGISTER_RAW_SIZE (O7_REGNUM
)));
1360 write_register (PC_REGNUM
, pc
);
1361 write_register (NPC_REGNUM
, pc
+ 4);
1363 else if (fsr
[I7_REGNUM
])
1365 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
1366 pc
= PC_ADJUST ((CORE_ADDR
) read_memory_integer (fsr
[I7_REGNUM
],
1367 SPARC_INTREG_SIZE
));
1368 write_register (PC_REGNUM
, pc
);
1369 write_register (NPC_REGNUM
, pc
+ 4);
1371 flush_cached_frames ();
1374 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
1375 encodes the structure size being returned. If we detect such
1376 a fake insn, step past it. */
1379 sparc_pc_adjust (CORE_ADDR pc
)
1385 err
= target_read_memory (pc
+ 8, buf
, 4);
1386 insn
= extract_unsigned_integer (buf
, 4);
1387 if ((err
== 0) && (insn
& 0xffc00000) == 0)
1393 /* If pc is in a shared library trampoline, return its target.
1394 The SunOs 4.x linker rewrites the jump table entries for PIC
1395 compiled modules in the main executable to bypass the dynamic linker
1396 with jumps of the form
1399 and removes the corresponding jump table relocation entry in the
1400 dynamic relocations.
1401 find_solib_trampoline_target relies on the presence of the jump
1402 table relocation entry, so we have to detect these jump instructions
1406 sunos4_skip_trampoline_code (CORE_ADDR pc
)
1408 unsigned long insn1
;
1412 err
= target_read_memory (pc
, buf
, 4);
1413 insn1
= extract_unsigned_integer (buf
, 4);
1414 if (err
== 0 && (insn1
& 0xffc00000) == 0x03000000)
1416 unsigned long insn2
;
1418 err
= target_read_memory (pc
+ 4, buf
, 4);
1419 insn2
= extract_unsigned_integer (buf
, 4);
1420 if (err
== 0 && (insn2
& 0xffffe000) == 0x81c06000)
1422 CORE_ADDR target_pc
= (insn1
& 0x3fffff) << 10;
1423 int delta
= insn2
& 0x1fff;
1425 /* Sign extend the displacement. */
1428 return target_pc
+ delta
;
1431 return find_solib_trampoline_target (pc
);
1434 #ifdef USE_PROC_FS /* Target dependent support for /proc */
1436 /* The /proc interface divides the target machine's register set up into
1437 two different sets, the general register set (gregset) and the floating
1438 point register set (fpregset). For each set, there is an ioctl to get
1439 the current register set and another ioctl to set the current values.
1441 The actual structure passed through the ioctl interface is, of course,
1442 naturally machine dependent, and is different for each set of registers.
1443 For the sparc for example, the general register set is typically defined
1446 typedef int gregset_t[38];
1452 and the floating point set by:
1454 typedef struct prfpregset {
1457 double pr_dregs[16];
1462 u_char pr_q_entrysize;
1467 These routines provide the packing and unpacking of gregset_t and
1468 fpregset_t formatted data.
1473 /* Given a pointer to a general register set in /proc format (gregset_t *),
1474 unpack the register contents and supply them as gdb's idea of the current
1478 supply_gregset (gdb_gregset_t
*gregsetp
)
1480 prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1481 int regi
, offset
= 0;
1483 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1484 then the gregset may contain 64-bit ints while supply_register
1485 is expecting 32-bit ints. Compensate. */
1486 if (sizeof (regp
[0]) == 8 && SPARC_INTREG_SIZE
== 4)
1489 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
1490 /* FIXME MVS: assumes the order of the first 32 elements... */
1491 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
1493 supply_register (regi
, ((char *) (regp
+ regi
)) + offset
);
1496 /* These require a bit more care. */
1497 supply_register (PC_REGNUM
, ((char *) (regp
+ R_PC
)) + offset
);
1498 supply_register (NPC_REGNUM
, ((char *) (regp
+ R_nPC
)) + offset
);
1499 supply_register (Y_REGNUM
, ((char *) (regp
+ R_Y
)) + offset
);
1501 if (GDB_TARGET_IS_SPARC64
)
1504 supply_register (CCR_REGNUM
, ((char *) (regp
+ R_CCR
)) + offset
);
1506 supply_register (CCR_REGNUM
, NULL
);
1509 supply_register (FPRS_REGNUM
, ((char *) (regp
+ R_FPRS
)) + offset
);
1511 supply_register (FPRS_REGNUM
, NULL
);
1514 supply_register (ASI_REGNUM
, ((char *) (regp
+ R_ASI
)) + offset
);
1516 supply_register (ASI_REGNUM
, NULL
);
1522 supply_register (PS_REGNUM
, ((char *) (regp
+ R_PS
)) + offset
);
1524 supply_register (PS_REGNUM
, NULL
);
1527 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1528 Steal R_ASI and R_FPRS, and hope for the best! */
1530 #if !defined (R_WIM) && defined (R_ASI)
1534 #if !defined (R_TBR) && defined (R_FPRS)
1535 #define R_TBR R_FPRS
1539 supply_register (WIM_REGNUM
, ((char *) (regp
+ R_WIM
)) + offset
);
1541 supply_register (WIM_REGNUM
, NULL
);
1545 supply_register (TBR_REGNUM
, ((char *) (regp
+ R_TBR
)) + offset
);
1547 supply_register (TBR_REGNUM
, NULL
);
1551 /* Fill inaccessible registers with zero. */
1552 if (GDB_TARGET_IS_SPARC64
)
1555 * don't know how to get value of any of the following:
1557 supply_register (VER_REGNUM
, NULL
);
1558 supply_register (TICK_REGNUM
, NULL
);
1559 supply_register (PIL_REGNUM
, NULL
);
1560 supply_register (PSTATE_REGNUM
, NULL
);
1561 supply_register (TSTATE_REGNUM
, NULL
);
1562 supply_register (TBA_REGNUM
, NULL
);
1563 supply_register (TL_REGNUM
, NULL
);
1564 supply_register (TT_REGNUM
, NULL
);
1565 supply_register (TPC_REGNUM
, NULL
);
1566 supply_register (TNPC_REGNUM
, NULL
);
1567 supply_register (WSTATE_REGNUM
, NULL
);
1568 supply_register (CWP_REGNUM
, NULL
);
1569 supply_register (CANSAVE_REGNUM
, NULL
);
1570 supply_register (CANRESTORE_REGNUM
, NULL
);
1571 supply_register (CLEANWIN_REGNUM
, NULL
);
1572 supply_register (OTHERWIN_REGNUM
, NULL
);
1573 supply_register (ASR16_REGNUM
, NULL
);
1574 supply_register (ASR17_REGNUM
, NULL
);
1575 supply_register (ASR18_REGNUM
, NULL
);
1576 supply_register (ASR19_REGNUM
, NULL
);
1577 supply_register (ASR20_REGNUM
, NULL
);
1578 supply_register (ASR21_REGNUM
, NULL
);
1579 supply_register (ASR22_REGNUM
, NULL
);
1580 supply_register (ASR23_REGNUM
, NULL
);
1581 supply_register (ASR24_REGNUM
, NULL
);
1582 supply_register (ASR25_REGNUM
, NULL
);
1583 supply_register (ASR26_REGNUM
, NULL
);
1584 supply_register (ASR27_REGNUM
, NULL
);
1585 supply_register (ASR28_REGNUM
, NULL
);
1586 supply_register (ASR29_REGNUM
, NULL
);
1587 supply_register (ASR30_REGNUM
, NULL
);
1588 supply_register (ASR31_REGNUM
, NULL
);
1589 supply_register (ICC_REGNUM
, NULL
);
1590 supply_register (XCC_REGNUM
, NULL
);
1594 supply_register (CPS_REGNUM
, NULL
);
1599 fill_gregset (gdb_gregset_t
*gregsetp
, int regno
)
1601 prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1602 int regi
, offset
= 0;
1604 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1605 then the gregset may contain 64-bit ints while supply_register
1606 is expecting 32-bit ints. Compensate. */
1607 if (sizeof (regp
[0]) == 8 && SPARC_INTREG_SIZE
== 4)
1610 for (regi
= 0; regi
<= R_I7
; regi
++)
1611 if ((regno
== -1) || (regno
== regi
))
1612 deprecated_read_register_gen (regi
, (char *) (regp
+ regi
) + offset
);
1614 if ((regno
== -1) || (regno
== PC_REGNUM
))
1615 deprecated_read_register_gen (PC_REGNUM
, (char *) (regp
+ R_PC
) + offset
);
1617 if ((regno
== -1) || (regno
== NPC_REGNUM
))
1618 deprecated_read_register_gen (NPC_REGNUM
, (char *) (regp
+ R_nPC
) + offset
);
1620 if ((regno
== -1) || (regno
== Y_REGNUM
))
1621 deprecated_read_register_gen (Y_REGNUM
, (char *) (regp
+ R_Y
) + offset
);
1623 if (GDB_TARGET_IS_SPARC64
)
1626 if (regno
== -1 || regno
== CCR_REGNUM
)
1627 deprecated_read_register_gen (CCR_REGNUM
, ((char *) (regp
+ R_CCR
)) + offset
);
1630 if (regno
== -1 || regno
== FPRS_REGNUM
)
1631 deprecated_read_register_gen (FPRS_REGNUM
, ((char *) (regp
+ R_FPRS
)) + offset
);
1634 if (regno
== -1 || regno
== ASI_REGNUM
)
1635 deprecated_read_register_gen (ASI_REGNUM
, ((char *) (regp
+ R_ASI
)) + offset
);
1641 if (regno
== -1 || regno
== PS_REGNUM
)
1642 deprecated_read_register_gen (PS_REGNUM
, ((char *) (regp
+ R_PS
)) + offset
);
1645 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1646 Steal R_ASI and R_FPRS, and hope for the best! */
1648 #if !defined (R_WIM) && defined (R_ASI)
1652 #if !defined (R_TBR) && defined (R_FPRS)
1653 #define R_TBR R_FPRS
1657 if (regno
== -1 || regno
== WIM_REGNUM
)
1658 deprecated_read_register_gen (WIM_REGNUM
, ((char *) (regp
+ R_WIM
)) + offset
);
1660 if (regno
== -1 || regno
== WIM_REGNUM
)
1661 deprecated_read_register_gen (WIM_REGNUM
, NULL
);
1665 if (regno
== -1 || regno
== TBR_REGNUM
)
1666 deprecated_read_register_gen (TBR_REGNUM
, ((char *) (regp
+ R_TBR
)) + offset
);
1668 if (regno
== -1 || regno
== TBR_REGNUM
)
1669 deprecated_read_register_gen (TBR_REGNUM
, NULL
);
1674 /* Given a pointer to a floating point register set in /proc format
1675 (fpregset_t *), unpack the register contents and supply them as gdb's
1676 idea of the current floating point register values. */
1679 supply_fpregset (gdb_fpregset_t
*fpregsetp
)
1687 for (regi
= FP0_REGNUM
; regi
< FP_MAX_REGNUM
; regi
++)
1689 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
- FP0_REGNUM
];
1690 supply_register (regi
, from
);
1693 if (GDB_TARGET_IS_SPARC64
)
1696 * don't know how to get value of the following.
1698 supply_register (FSR_REGNUM
, NULL
); /* zero it out for now */
1699 supply_register (FCC0_REGNUM
, NULL
);
1700 supply_register (FCC1_REGNUM
, NULL
); /* don't know how to get value */
1701 supply_register (FCC2_REGNUM
, NULL
); /* don't know how to get value */
1702 supply_register (FCC3_REGNUM
, NULL
); /* don't know how to get value */
1706 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
1710 /* Given a pointer to a floating point register set in /proc format
1711 (fpregset_t *), update the register specified by REGNO from gdb's idea
1712 of the current floating point register set. If REGNO is -1, update
1714 /* This will probably need some changes for sparc64. */
1717 fill_fpregset (gdb_fpregset_t
*fpregsetp
, int regno
)
1726 for (regi
= FP0_REGNUM
; regi
< FP_MAX_REGNUM
; regi
++)
1728 if ((regno
== -1) || (regno
== regi
))
1730 from
= (char *) &deprecated_registers
[REGISTER_BYTE (regi
)];
1731 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
- FP0_REGNUM
];
1732 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
1736 if (!(GDB_TARGET_IS_SPARC64
)) /* FIXME: does Sparc64 have this register? */
1737 if ((regno
== -1) || (regno
== FPS_REGNUM
))
1739 from
= (char *)&deprecated_registers
[REGISTER_BYTE (FPS_REGNUM
)];
1740 to
= (char *) &fpregsetp
->pr_fsr
;
1741 memcpy (to
, from
, REGISTER_RAW_SIZE (FPS_REGNUM
));
1745 #endif /* USE_PROC_FS */
1747 /* Because of Multi-arch, GET_LONGJMP_TARGET is always defined. So test
1748 for a definition of JB_PC. */
1751 /* Figure out where the longjmp will land. We expect that we have just entered
1752 longjmp and haven't yet setup the stack frame, so the args are still in the
1753 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
1754 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
1755 This routine returns true on success */
1758 get_longjmp_target (CORE_ADDR
*pc
)
1761 #define LONGJMP_TARGET_SIZE 4
1762 char buf
[LONGJMP_TARGET_SIZE
];
1764 jb_addr
= read_register (O0_REGNUM
);
1766 if (target_read_memory (jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, buf
,
1767 LONGJMP_TARGET_SIZE
))
1770 *pc
= extract_address (buf
, LONGJMP_TARGET_SIZE
);
1774 #endif /* GET_LONGJMP_TARGET */
1776 #ifdef STATIC_TRANSFORM_NAME
1777 /* SunPRO (3.0 at least), encodes the static variables. This is not
1778 related to C++ mangling, it is done for C too. */
1781 sunpro_static_transform_name (char *name
)
1786 /* For file-local statics there will be a dollar sign, a bunch
1787 of junk (the contents of which match a string given in the
1788 N_OPT), a period and the name. For function-local statics
1789 there will be a bunch of junk (which seems to change the
1790 second character from 'A' to 'B'), a period, the name of the
1791 function, and the name. So just skip everything before the
1793 p
= strrchr (name
, '.');
1799 #endif /* STATIC_TRANSFORM_NAME */
1802 /* Utilities for printing registers.
1803 Page numbers refer to the SPARC Architecture Manual. */
1805 static void dump_ccreg (char *, int);
1808 dump_ccreg (char *reg
, int val
)
1811 printf_unfiltered ("%s:%s,%s,%s,%s", reg
,
1812 val
& 8 ? "N" : "NN",
1813 val
& 4 ? "Z" : "NZ",
1814 val
& 2 ? "O" : "NO",
1815 val
& 1 ? "C" : "NC");
1819 decode_asi (int val
)
1825 return "ASI_NUCLEUS";
1827 return "ASI_NUCLEUS_LITTLE";
1829 return "ASI_AS_IF_USER_PRIMARY";
1831 return "ASI_AS_IF_USER_SECONDARY";
1833 return "ASI_AS_IF_USER_PRIMARY_LITTLE";
1835 return "ASI_AS_IF_USER_SECONDARY_LITTLE";
1837 return "ASI_PRIMARY";
1839 return "ASI_SECONDARY";
1841 return "ASI_PRIMARY_NOFAULT";
1843 return "ASI_SECONDARY_NOFAULT";
1845 return "ASI_PRIMARY_LITTLE";
1847 return "ASI_SECONDARY_LITTLE";
1849 return "ASI_PRIMARY_NOFAULT_LITTLE";
1851 return "ASI_SECONDARY_NOFAULT_LITTLE";
1857 /* PRINT_REGISTER_HOOK routine.
1858 Pretty print various registers. */
1859 /* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */
1862 sparc_print_register_hook (int regno
)
1866 /* Handle double/quad versions of lower 32 fp regs. */
1867 if (regno
>= FP0_REGNUM
&& regno
< FP0_REGNUM
+ 32
1868 && (regno
& 1) == 0)
1872 if (frame_register_read (deprecated_selected_frame
, regno
, value
)
1873 && frame_register_read (deprecated_selected_frame
, regno
+ 1, value
+ 4))
1875 printf_unfiltered ("\t");
1876 print_floating (value
, builtin_type_double
, gdb_stdout
);
1878 #if 0 /* FIXME: gdb doesn't handle long doubles */
1879 if ((regno
& 3) == 0)
1881 if (frame_register_read (deprecated_selected_frame
, regno
+ 2, value
+ 8)
1882 && frame_register_read (deprecated_selected_frame
, regno
+ 3, value
+ 12))
1884 printf_unfiltered ("\t");
1885 print_floating (value
, builtin_type_long_double
, gdb_stdout
);
1892 #if 0 /* FIXME: gdb doesn't handle long doubles */
1893 /* Print upper fp regs as long double if appropriate. */
1894 if (regno
>= FP0_REGNUM
+ 32 && regno
< FP_MAX_REGNUM
1895 /* We test for even numbered regs and not a multiple of 4 because
1896 the upper fp regs are recorded as doubles. */
1897 && (regno
& 1) == 0)
1901 if (frame_register_read (deprecated_selected_frame
, regno
, value
)
1902 && frame_register_read (deprecated_selected_frame
, regno
+ 1, value
+ 8))
1904 printf_unfiltered ("\t");
1905 print_floating (value
, builtin_type_long_double
, gdb_stdout
);
1911 /* FIXME: Some of these are priviledged registers.
1912 Not sure how they should be handled. */
1914 #define BITS(n, mask) ((int) (((val) >> (n)) & (mask)))
1916 val
= read_register (regno
);
1919 if (GDB_TARGET_IS_SPARC64
)
1923 printf_unfiltered ("\t");
1924 dump_ccreg ("xcc", val
>> 4);
1925 printf_unfiltered (", ");
1926 dump_ccreg ("icc", val
& 15);
1929 printf ("\tfef:%d, du:%d, dl:%d",
1930 BITS (2, 1), BITS (1, 1), BITS (0, 1));
1934 static char *fcc
[4] =
1935 {"=", "<", ">", "?"};
1936 static char *rd
[4] =
1937 {"N", "0", "+", "-"};
1938 /* Long, but I'd rather leave it as is and use a wide screen. */
1939 printf_filtered ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ",
1940 fcc
[BITS (10, 3)], fcc
[BITS (32, 3)],
1941 fcc
[BITS (34, 3)], fcc
[BITS (36, 3)],
1942 rd
[BITS (30, 3)], BITS (23, 31));
1943 printf_filtered ("ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d",
1944 BITS (22, 1), BITS (17, 7), BITS (14, 7),
1945 BITS (13, 1), BITS (5, 31), BITS (0, 31));
1950 char *asi
= decode_asi (val
);
1952 printf ("\t%s", asi
);
1956 printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d",
1957 BITS (48, 0xffff), BITS (32, 0xffff),
1958 BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31));
1962 static char *mm
[4] =
1963 {"tso", "pso", "rso", "?"};
1964 printf_filtered ("\tcle:%d, tle:%d, mm:%s, red:%d, ",
1965 BITS (9, 1), BITS (8, 1),
1966 mm
[BITS (6, 3)], BITS (5, 1));
1967 printf_filtered ("pef:%d, am:%d, priv:%d, ie:%d, ag:%d",
1968 BITS (4, 1), BITS (3, 1), BITS (2, 1),
1969 BITS (1, 1), BITS (0, 1));
1973 /* FIXME: print all 4? */
1976 /* FIXME: print all 4? */
1979 /* FIXME: print all 4? */
1982 /* FIXME: print all 4? */
1985 printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7));
1988 printf ("\t%d", BITS (0, 31));
1990 case CANSAVE_REGNUM
:
1991 printf ("\t%-2d before spill", BITS (0, 31));
1993 case CANRESTORE_REGNUM
:
1994 printf ("\t%-2d before fill", BITS (0, 31));
1996 case CLEANWIN_REGNUM
:
1997 printf ("\t%-2d before clean", BITS (0, 31));
1999 case OTHERWIN_REGNUM
:
2000 printf ("\t%d", BITS (0, 31));
2007 printf ("\ticc:%c%c%c%c, pil:%d, s:%d, ps:%d, et:%d, cwp:%d",
2008 BITS (23, 1) ? 'N' : '-', BITS (22, 1) ? 'Z' : '-',
2009 BITS (21, 1) ? 'V' : '-', BITS (20, 1) ? 'C' : '-',
2010 BITS (8, 15), BITS (7, 1), BITS (6, 1), BITS (5, 1),
2015 static char *fcc
[4] =
2016 {"=", "<", ">", "?"};
2017 static char *rd
[4] =
2018 {"N", "0", "+", "-"};
2019 /* Long, but I'd rather leave it as is and use a wide screen. */
2020 printf ("\trd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, "
2021 "fcc:%s, aexc:%d, cexc:%d",
2022 rd
[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7),
2023 BITS (14, 7), BITS (13, 1), fcc
[BITS (10, 3)], BITS (5, 31),
2033 sparc_print_registers (struct gdbarch
*gdbarch
,
2034 struct ui_file
*file
,
2035 struct frame_info
*frame
,
2036 int regnum
, int print_all
,
2037 void (*print_register_hook
) (int))
2040 const int numregs
= NUM_REGS
+ NUM_PSEUDO_REGS
;
2041 char *raw_buffer
= alloca (MAX_REGISTER_RAW_SIZE
);
2042 char *virtual_buffer
= alloca (MAX_REGISTER_VIRTUAL_SIZE
);
2044 for (i
= 0; i
< numregs
; i
++)
2046 /* Decide between printing all regs, non-float / vector regs, or
2052 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i
)) == TYPE_CODE_FLT
)
2054 if (TYPE_VECTOR (REGISTER_VIRTUAL_TYPE (i
)))
2064 /* If the register name is empty, it is undefined for this
2065 processor, so don't display anything. */
2066 if (REGISTER_NAME (i
) == NULL
|| *(REGISTER_NAME (i
)) == '\0')
2069 fputs_filtered (REGISTER_NAME (i
), file
);
2070 print_spaces_filtered (15 - strlen (REGISTER_NAME (i
)), file
);
2072 /* Get the data in raw format. */
2073 if (! frame_register_read (frame
, i
, raw_buffer
))
2075 fprintf_filtered (file
, "*value not available*\n");
2079 /* FIXME: cagney/2002-08-03: This code shouldn't be necessary.
2080 The function frame_register_read() should have returned the
2081 pre-cooked register so no conversion is necessary. */
2082 /* Convert raw data to virtual format if necessary. */
2083 if (REGISTER_CONVERTIBLE (i
))
2085 REGISTER_CONVERT_TO_VIRTUAL (i
, REGISTER_VIRTUAL_TYPE (i
),
2086 raw_buffer
, virtual_buffer
);
2090 memcpy (virtual_buffer
, raw_buffer
,
2091 REGISTER_VIRTUAL_SIZE (i
));
2094 /* If virtual format is floating, print it that way, and in raw
2096 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i
)) == TYPE_CODE_FLT
)
2100 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2101 file
, 0, 1, 0, Val_pretty_default
);
2103 fprintf_filtered (file
, "\t(raw 0x");
2104 for (j
= 0; j
< REGISTER_RAW_SIZE (i
); j
++)
2107 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2110 idx
= REGISTER_RAW_SIZE (i
) - 1 - j
;
2111 fprintf_filtered (file
, "%02x", (unsigned char) raw_buffer
[idx
]);
2113 fprintf_filtered (file
, ")");
2117 /* Print the register in hex. */
2118 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2119 file
, 'x', 1, 0, Val_pretty_default
);
2120 /* If not a vector register, print it also according to its
2122 if (TYPE_VECTOR (REGISTER_VIRTUAL_TYPE (i
)) == 0)
2124 fprintf_filtered (file
, "\t");
2125 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2126 file
, 0, 1, 0, Val_pretty_default
);
2130 /* Some sparc specific info. */
2131 if (print_register_hook
!= NULL
)
2132 print_register_hook (i
);
2134 fprintf_filtered (file
, "\n");
2139 sparc_print_registers_info (struct gdbarch
*gdbarch
,
2140 struct ui_file
*file
,
2141 struct frame_info
*frame
,
2142 int regnum
, int print_all
)
2144 sparc_print_registers (gdbarch
, file
, frame
, regnum
, print_all
,
2145 sparc_print_register_hook
);
2149 sparc_do_registers_info (int regnum
, int all
)
2151 sparc_print_registers_info (current_gdbarch
, gdb_stdout
, deprecated_selected_frame
,
2156 sparclet_print_registers_info (struct gdbarch
*gdbarch
,
2157 struct ui_file
*file
,
2158 struct frame_info
*frame
,
2159 int regnum
, int print_all
)
2161 sparc_print_registers (gdbarch
, file
, frame
, regnum
, print_all
, NULL
);
2165 sparclet_do_registers_info (int regnum
, int all
)
2167 sparclet_print_registers_info (current_gdbarch
, gdb_stdout
,
2168 deprecated_selected_frame
, regnum
, all
);
2173 gdb_print_insn_sparc (bfd_vma memaddr
, disassemble_info
*info
)
2175 /* It's necessary to override mach again because print_insn messes it up. */
2176 info
->mach
= TARGET_ARCHITECTURE
->mach
;
2177 return print_insn_sparc (memaddr
, info
);
2180 /* The SPARC passes the arguments on the stack; arguments smaller
2181 than an int are promoted to an int. The first 6 words worth of
2182 args are also passed in registers o0 - o5. */
2185 sparc32_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2186 int struct_return
, CORE_ADDR struct_addr
)
2189 int accumulate_size
= 0;
2196 struct sparc_arg
*sparc_args
=
2197 (struct sparc_arg
*) alloca (nargs
* sizeof (struct sparc_arg
));
2198 struct sparc_arg
*m_arg
;
2200 /* Promote arguments if necessary, and calculate their stack offsets
2202 for (i
= 0, m_arg
= sparc_args
; i
< nargs
; i
++, m_arg
++)
2204 struct value
*arg
= args
[i
];
2205 struct type
*arg_type
= check_typedef (VALUE_TYPE (arg
));
2206 /* Cast argument to long if necessary as the compiler does it too. */
2207 switch (TYPE_CODE (arg_type
))
2210 case TYPE_CODE_BOOL
:
2211 case TYPE_CODE_CHAR
:
2212 case TYPE_CODE_RANGE
:
2213 case TYPE_CODE_ENUM
:
2214 if (TYPE_LENGTH (arg_type
) < TYPE_LENGTH (builtin_type_long
))
2216 arg_type
= builtin_type_long
;
2217 arg
= value_cast (arg_type
, arg
);
2223 m_arg
->len
= TYPE_LENGTH (arg_type
);
2224 m_arg
->offset
= accumulate_size
;
2225 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 3) & ~3;
2226 m_arg
->contents
= VALUE_CONTENTS (arg
);
2229 /* Make room for the arguments on the stack. */
2230 accumulate_size
+= CALL_DUMMY_STACK_ADJUST
;
2231 sp
= ((sp
- accumulate_size
) & ~7) + CALL_DUMMY_STACK_ADJUST
;
2233 /* `Push' arguments on the stack. */
2234 for (i
= 0, oregnum
= 0, m_arg
= sparc_args
;
2238 write_memory (sp
+ m_arg
->offset
, m_arg
->contents
, m_arg
->len
);
2240 j
< m_arg
->len
&& oregnum
< 6;
2241 j
+= SPARC_INTREG_SIZE
, oregnum
++)
2242 deprecated_write_register_gen (O0_REGNUM
+ oregnum
, m_arg
->contents
+ j
);
2249 /* Extract from an array REGBUF containing the (raw) register state
2250 a function return value of type TYPE, and copy that, in virtual format,
2254 sparc32_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2256 int typelen
= TYPE_LENGTH (type
);
2257 int regsize
= REGISTER_RAW_SIZE (O0_REGNUM
);
2259 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2260 memcpy (valbuf
, ®buf
[REGISTER_BYTE (FP0_REGNUM
)], typelen
);
2263 ®buf
[O0_REGNUM
* regsize
+
2265 || TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
? 0
2266 : regsize
- typelen
)],
2271 /* Write into appropriate registers a function return value
2272 of type TYPE, given in virtual format. On SPARCs with FPUs,
2273 float values are returned in %f0 (and %f1). In all other cases,
2274 values are returned in register %o0. */
2277 sparc_store_return_value (struct type
*type
, char *valbuf
)
2282 buffer
= alloca (MAX_REGISTER_RAW_SIZE
);
2284 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2285 /* Floating-point values are returned in the register pair */
2286 /* formed by %f0 and %f1 (doubles are, anyway). */
2289 /* Other values are returned in register %o0. */
2292 /* Add leading zeros to the value. */
2293 if (TYPE_LENGTH (type
) < REGISTER_RAW_SIZE (regno
))
2295 memset (buffer
, 0, REGISTER_RAW_SIZE (regno
));
2296 memcpy (buffer
+ REGISTER_RAW_SIZE (regno
) - TYPE_LENGTH (type
), valbuf
,
2297 TYPE_LENGTH (type
));
2298 deprecated_write_register_gen (regno
, buffer
);
2301 deprecated_write_register_bytes (REGISTER_BYTE (regno
), valbuf
,
2302 TYPE_LENGTH (type
));
2306 sparclet_store_return_value (struct type
*type
, char *valbuf
)
2308 /* Other values are returned in register %o0. */
2309 deprecated_write_register_bytes (REGISTER_BYTE (O0_REGNUM
), valbuf
,
2310 TYPE_LENGTH (type
));
2314 #ifndef CALL_DUMMY_CALL_OFFSET
2315 #define CALL_DUMMY_CALL_OFFSET \
2316 (gdbarch_tdep (current_gdbarch)->call_dummy_call_offset)
2317 #endif /* CALL_DUMMY_CALL_OFFSET */
2319 /* Insert the function address into a call dummy instruction sequence
2322 For structs and unions, if the function was compiled with Sun cc,
2323 it expects 'unimp' after the call. But gcc doesn't use that
2324 (twisted) convention. So leave a nop there for gcc (FIX_CALL_DUMMY
2325 can assume it is operating on a pristine CALL_DUMMY, not one that
2326 has already been customized for a different function). */
2329 sparc_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
,
2330 struct type
*value_type
, int using_gcc
)
2334 /* Store the relative adddress of the target function into the
2335 'call' instruction. */
2336 store_unsigned_integer (dummy
+ CALL_DUMMY_CALL_OFFSET
, 4,
2338 | (((fun
- (pc
+ CALL_DUMMY_CALL_OFFSET
)) >> 2)
2341 /* If the called function returns an aggregate value, fill in the UNIMP
2342 instruction containing the size of the returned aggregate return value,
2343 which follows the call instruction.
2344 For details see the SPARC Architecture Manual Version 8, Appendix D.3.
2346 Adjust the call_dummy_breakpoint_offset for the bp_call_dummy breakpoint
2347 to the proper address in the call dummy, so that `finish' after a stop
2348 in a call dummy works.
2349 Tweeking current_gdbarch is not an optimal solution, but the call to
2350 sparc_fix_call_dummy is immediately followed by a call to run_stack_dummy,
2351 which is the only function where dummy_breakpoint_offset is actually
2352 used, if it is non-zero. */
2353 if (TYPE_CODE (value_type
) == TYPE_CODE_STRUCT
2354 || TYPE_CODE (value_type
) == TYPE_CODE_UNION
)
2356 store_unsigned_integer (dummy
+ CALL_DUMMY_CALL_OFFSET
+ 8, 4,
2357 TYPE_LENGTH (value_type
) & 0x1fff);
2358 set_gdbarch_call_dummy_breakpoint_offset (current_gdbarch
, 0x30);
2361 set_gdbarch_call_dummy_breakpoint_offset (current_gdbarch
, 0x2c);
2363 if (!(GDB_TARGET_IS_SPARC64
))
2365 /* If this is not a simulator target, change the first four
2366 instructions of the call dummy to NOPs. Those instructions
2367 include a 'save' instruction and are designed to work around
2368 problems with register window flushing in the simulator. */
2370 if (strcmp (target_shortname
, "sim") != 0)
2372 for (i
= 0; i
< 4; i
++)
2373 store_unsigned_integer (dummy
+ (i
* 4), 4, 0x01000000);
2377 /* If this is a bi-endian target, GDB has written the call dummy
2378 in little-endian order. We must byte-swap it back to big-endian. */
2381 for (i
= 0; i
< CALL_DUMMY_LENGTH
; i
+= 4)
2383 char tmp
= dummy
[i
];
2384 dummy
[i
] = dummy
[i
+ 3];
2387 dummy
[i
+ 1] = dummy
[i
+ 2];
2394 /* Set target byte order based on machine type. */
2397 sparc_target_architecture_hook (const bfd_arch_info_type
*ap
)
2401 if (ap
->mach
== bfd_mach_sparc_sparclite_le
)
2403 target_byte_order
= BFD_ENDIAN_LITTLE
;
2413 * Module "constructor" function.
2416 static struct gdbarch
* sparc_gdbarch_init (struct gdbarch_info info
,
2417 struct gdbarch_list
*arches
);
2418 static void sparc_dump_tdep (struct gdbarch
*, struct ui_file
*);
2421 _initialize_sparc_tdep (void)
2423 /* Hook us into the gdbarch mechanism. */
2424 gdbarch_register (bfd_arch_sparc
, sparc_gdbarch_init
, sparc_dump_tdep
);
2426 tm_print_insn
= gdb_print_insn_sparc
;
2427 tm_print_insn_info
.mach
= TM_PRINT_INSN_MACH
; /* Selects sparc/sparclite */
2428 target_architecture_hook
= sparc_target_architecture_hook
;
2431 /* Compensate for stack bias. Note that we currently don't handle
2432 mixed 32/64 bit code. */
2435 sparc64_read_sp (void)
2437 CORE_ADDR sp
= read_register (SP_REGNUM
);
2445 sparc64_read_fp (void)
2447 CORE_ADDR fp
= read_register (FP_REGNUM
);
2455 sparc64_write_sp (CORE_ADDR val
)
2457 CORE_ADDR oldsp
= read_register (SP_REGNUM
);
2459 write_register (SP_REGNUM
, val
- 2047);
2461 write_register (SP_REGNUM
, val
);
2464 /* The SPARC 64 ABI passes floating-point arguments in FP0 to FP31,
2465 and all other arguments in O0 to O5. They are also copied onto
2466 the stack in the correct places. Apparently (empirically),
2467 structs of less than 16 bytes are passed member-by-member in
2468 separate registers, but I am unable to figure out the algorithm.
2469 Some members go in floating point regs, but I don't know which.
2471 FIXME: Handle small structs (less than 16 bytes containing floats).
2473 The counting regimen for using both integer and FP registers
2474 for argument passing is rather odd -- a single counter is used
2475 for both; this means that if the arguments alternate between
2476 int and float, we will waste every other register of both types. */
2479 sparc64_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2480 int struct_return
, CORE_ADDR struct_retaddr
)
2482 int i
, j
, register_counter
= 0;
2484 struct type
*sparc_intreg_type
=
2485 TYPE_LENGTH (builtin_type_long
) == SPARC_INTREG_SIZE
?
2486 builtin_type_long
: builtin_type_long_long
;
2488 sp
= (sp
& ~(((unsigned long) SPARC_INTREG_SIZE
) - 1UL));
2490 /* Figure out how much space we'll need. */
2491 for (i
= nargs
- 1; i
>= 0; i
--)
2493 int len
= TYPE_LENGTH (check_typedef (VALUE_TYPE (args
[i
])));
2494 struct value
*copyarg
= args
[i
];
2497 if (copylen
< SPARC_INTREG_SIZE
)
2499 copyarg
= value_cast (sparc_intreg_type
, copyarg
);
2500 copylen
= SPARC_INTREG_SIZE
;
2509 /* if STRUCT_RETURN, then first argument is the struct return location. */
2511 write_register (O0_REGNUM
+ register_counter
++, struct_retaddr
);
2513 /* Now write the arguments onto the stack, while writing FP
2514 arguments into the FP registers, and other arguments into the
2515 first six 'O' registers. */
2517 for (i
= 0; i
< nargs
; i
++)
2519 int len
= TYPE_LENGTH (check_typedef (VALUE_TYPE (args
[i
])));
2520 struct value
*copyarg
= args
[i
];
2521 enum type_code typecode
= TYPE_CODE (VALUE_TYPE (args
[i
]));
2524 if (typecode
== TYPE_CODE_INT
||
2525 typecode
== TYPE_CODE_BOOL
||
2526 typecode
== TYPE_CODE_CHAR
||
2527 typecode
== TYPE_CODE_RANGE
||
2528 typecode
== TYPE_CODE_ENUM
)
2529 if (len
< SPARC_INTREG_SIZE
)
2531 /* Small ints will all take up the size of one intreg on
2533 copyarg
= value_cast (sparc_intreg_type
, copyarg
);
2534 copylen
= SPARC_INTREG_SIZE
;
2537 write_memory (tempsp
, VALUE_CONTENTS (copyarg
), copylen
);
2540 /* Corner case: Structs consisting of a single float member are floats.
2541 * FIXME! I don't know about structs containing multiple floats!
2542 * Structs containing mixed floats and ints are even more weird.
2547 /* Separate float args from all other args. */
2548 if (typecode
== TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2550 if (register_counter
< 16)
2552 /* This arg gets copied into a FP register. */
2556 case 4: /* Single-precision (float) */
2557 fpreg
= FP0_REGNUM
+ 2 * register_counter
+ 1;
2558 register_counter
+= 1;
2560 case 8: /* Double-precision (double) */
2561 fpreg
= FP0_REGNUM
+ 2 * register_counter
;
2562 register_counter
+= 1;
2564 case 16: /* Quad-precision (long double) */
2565 fpreg
= FP0_REGNUM
+ 2 * register_counter
;
2566 register_counter
+= 2;
2569 internal_error (__FILE__
, __LINE__
, "bad switch");
2571 deprecated_write_register_bytes (REGISTER_BYTE (fpreg
),
2572 VALUE_CONTENTS (args
[i
]),
2576 else /* all other args go into the first six 'o' registers */
2579 j
< len
&& register_counter
< 6;
2580 j
+= SPARC_INTREG_SIZE
)
2582 int oreg
= O0_REGNUM
+ register_counter
;
2584 deprecated_write_register_gen (oreg
, VALUE_CONTENTS (copyarg
) + j
);
2585 register_counter
+= 1;
2592 /* Values <= 32 bytes are returned in o0-o3 (floating-point values are
2593 returned in f0-f3). */
2596 sp64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
,
2599 int typelen
= TYPE_LENGTH (type
);
2600 int regsize
= REGISTER_RAW_SIZE (O0_REGNUM
);
2602 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2604 memcpy (valbuf
, ®buf
[REGISTER_BYTE (FP0_REGNUM
)], typelen
);
2608 if (TYPE_CODE (type
) != TYPE_CODE_STRUCT
2609 || (TYPE_LENGTH (type
) > 32))
2612 ®buf
[O0_REGNUM
* regsize
+
2613 (typelen
>= regsize
? 0 : regsize
- typelen
)],
2619 char *o0
= ®buf
[O0_REGNUM
* regsize
];
2620 char *f0
= ®buf
[FP0_REGNUM
* regsize
];
2623 for (x
= 0; x
< TYPE_NFIELDS (type
); x
++)
2625 struct field
*f
= &TYPE_FIELDS (type
)[x
];
2626 /* FIXME: We may need to handle static fields here. */
2627 int whichreg
= (f
->loc
.bitpos
+ bitoffset
) / 32;
2628 int remainder
= ((f
->loc
.bitpos
+ bitoffset
) % 32) / 8;
2629 int where
= (f
->loc
.bitpos
+ bitoffset
) / 8;
2630 int size
= TYPE_LENGTH (f
->type
);
2631 int typecode
= TYPE_CODE (f
->type
);
2633 if (typecode
== TYPE_CODE_STRUCT
)
2635 sp64_extract_return_value (f
->type
,
2638 bitoffset
+ f
->loc
.bitpos
);
2640 else if (typecode
== TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2642 memcpy (valbuf
+ where
, &f0
[whichreg
* 4] + remainder
, size
);
2646 memcpy (valbuf
+ where
, &o0
[whichreg
* 4] + remainder
, size
);
2653 sparc64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2655 sp64_extract_return_value (type
, regbuf
, valbuf
, 0);
2659 sparclet_extract_return_value (struct type
*type
,
2663 regbuf
+= REGISTER_RAW_SIZE (O0_REGNUM
) * 8;
2664 if (TYPE_LENGTH (type
) < REGISTER_RAW_SIZE (O0_REGNUM
))
2665 regbuf
+= REGISTER_RAW_SIZE (O0_REGNUM
) - TYPE_LENGTH (type
);
2667 memcpy ((void *) valbuf
, regbuf
, TYPE_LENGTH (type
));
2672 sparc32_stack_align (CORE_ADDR addr
)
2674 return ((addr
+ 7) & -8);
2678 sparc64_stack_align (CORE_ADDR addr
)
2680 return ((addr
+ 15) & -16);
2684 sparc_print_extra_frame_info (struct frame_info
*fi
)
2686 if (fi
&& fi
->extra_info
&& fi
->extra_info
->flat
)
2687 printf_filtered (" flat, pc saved at 0x%s, fp saved at 0x%s\n",
2688 paddr_nz (fi
->extra_info
->pc_addr
),
2689 paddr_nz (fi
->extra_info
->fp_addr
));
2692 /* MULTI_ARCH support */
2695 sparc32_register_name (int regno
)
2697 static char *register_names
[] =
2698 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2699 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2700 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2701 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2703 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2704 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2705 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2706 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2708 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr"
2712 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2715 return register_names
[regno
];
2719 sparc64_register_name (int regno
)
2721 static char *register_names
[] =
2722 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2723 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2724 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2725 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2727 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2728 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2729 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2730 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2731 "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",
2732 "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
2734 "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", "ver",
2735 "tick", "pil", "pstate", "tstate", "tba", "tl", "tt", "tpc",
2736 "tnpc", "wstate", "cwp", "cansave", "canrestore", "cleanwin", "otherwin",
2737 "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", "asr22", "asr23",
2738 "asr24", "asr25", "asr26", "asr27", "asr28", "asr29", "asr30", "asr31",
2739 /* These are here at the end to simplify removing them if we have to. */
2740 "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3"
2744 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2747 return register_names
[regno
];
2751 sparclite_register_name (int regno
)
2753 static char *register_names
[] =
2754 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2755 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2756 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2757 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2759 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2760 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2761 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2762 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2764 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr",
2765 "dia1", "dia2", "dda1", "dda2", "ddv1", "ddv2", "dcr", "dsr"
2769 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2772 return register_names
[regno
];
2776 sparclet_register_name (int regno
)
2778 static char *register_names
[] =
2779 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2780 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2781 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2782 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2784 "", "", "", "", "", "", "", "", /* no floating point registers */
2785 "", "", "", "", "", "", "", "",
2786 "", "", "", "", "", "", "", "",
2787 "", "", "", "", "", "", "", "",
2789 "y", "psr", "wim", "tbr", "pc", "npc", "", "", /* no FPSR or CPSR */
2790 "ccsr", "ccpr", "cccrcr", "ccor", "ccobr", "ccibr", "ccir", "",
2792 /* ASR15 ASR19 (don't display them) */
2793 "asr1", "", "asr17", "asr18", "", "asr20", "asr21", "asr22"
2794 /* None of the rest get displayed */
2796 "awr0", "awr1", "awr2", "awr3", "awr4", "awr5", "awr6", "awr7",
2797 "awr8", "awr9", "awr10", "awr11", "awr12", "awr13", "awr14", "awr15",
2798 "awr16", "awr17", "awr18", "awr19", "awr20", "awr21", "awr22", "awr23",
2799 "awr24", "awr25", "awr26", "awr27", "awr28", "awr29", "awr30", "awr31",
2805 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2808 return register_names
[regno
];
2812 sparc_push_return_address (CORE_ADDR pc_unused
, CORE_ADDR sp
)
2814 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2816 /* The return PC of the dummy_frame is the former 'current' PC
2817 (where we were before we made the target function call).
2818 This is saved in %i7 by push_dummy_frame.
2820 We will save the 'call dummy location' (ie. the address
2821 to which the target function will return) in %o7.
2822 This address will actually be the program's entry point.
2823 There will be a special call_dummy breakpoint there. */
2825 write_register (O7_REGNUM
,
2826 CALL_DUMMY_ADDRESS () - 8);
2832 /* Should call_function allocate stack space for a struct return? */
2835 sparc64_use_struct_convention (int gcc_p
, struct type
*type
)
2837 return (TYPE_LENGTH (type
) > 32);
2840 /* Store the address of the place in which to copy the structure the
2841 subroutine will return. This is called from call_function_by_hand.
2842 The ultimate mystery is, tho, what is the value "16"?
2844 MVS: That's the offset from where the sp is now, to where the
2845 subroutine is gonna expect to find the struct return address. */
2848 sparc32_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2853 val
= alloca (SPARC_INTREG_SIZE
);
2854 store_unsigned_integer (val
, SPARC_INTREG_SIZE
, addr
);
2855 write_memory (sp
+ (16 * SPARC_INTREG_SIZE
), val
, SPARC_INTREG_SIZE
);
2857 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2859 /* Now adjust the value of the link register, which was previously
2860 stored by push_return_address. Functions that return structs are
2861 peculiar in that they return to link register + 12, rather than
2862 link register + 8. */
2864 o7
= read_register (O7_REGNUM
);
2865 write_register (O7_REGNUM
, o7
- 4);
2870 sparc64_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2872 /* FIXME: V9 uses %o0 for this. */
2873 /* FIXME MVS: Only for small enough structs!!! */
2875 target_write_memory (sp
+ (16 * SPARC_INTREG_SIZE
),
2876 (char *) &addr
, SPARC_INTREG_SIZE
);
2878 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2880 /* Now adjust the value of the link register, which was previously
2881 stored by push_return_address. Functions that return structs are
2882 peculiar in that they return to link register + 12, rather than
2883 link register + 8. */
2885 write_register (O7_REGNUM
, read_register (O7_REGNUM
) - 4);
2890 /* Default target data type for register REGNO. */
2892 static struct type
*
2893 sparc32_register_virtual_type (int regno
)
2895 if (regno
== PC_REGNUM
||
2896 regno
== FP_REGNUM
||
2898 return builtin_type_unsigned_int
;
2900 return builtin_type_int
;
2902 return builtin_type_float
;
2903 return builtin_type_int
;
2906 static struct type
*
2907 sparc64_register_virtual_type (int regno
)
2909 if (regno
== PC_REGNUM
||
2910 regno
== FP_REGNUM
||
2912 return builtin_type_unsigned_long_long
;
2914 return builtin_type_long_long
;
2916 return builtin_type_float
;
2918 return builtin_type_double
;
2919 return builtin_type_long_long
;
2922 /* Number of bytes of storage in the actual machine representation for
2926 sparc32_register_size (int regno
)
2932 sparc64_register_size (int regno
)
2934 return (regno
< 32 ? 8 : regno
< 64 ? 4 : 8);
2937 /* Index within the `registers' buffer of the first byte of the space
2938 for register REGNO. */
2941 sparc32_register_byte (int regno
)
2947 sparc64_register_byte (int regno
)
2951 else if (regno
< 64)
2952 return 32 * 8 + (regno
- 32) * 4;
2953 else if (regno
< 80)
2954 return 32 * 8 + 32 * 4 + (regno
- 64) * 8;
2956 return 64 * 8 + (regno
- 80) * 8;
2959 /* Immediately after a function call, return the saved pc.
2960 Can't go through the frames for this because on some machines
2961 the new frame is not set up until the new function executes
2962 some instructions. */
2965 sparc_saved_pc_after_call (struct frame_info
*fi
)
2967 return sparc_pc_adjust (read_register (RP_REGNUM
));
2970 /* Convert registers between 'raw' and 'virtual' formats.
2971 They are the same on sparc, so there's nothing to do. */
2974 sparc_convert_to_virtual (int regnum
, struct type
*type
, char *from
, char *to
)
2975 { /* do nothing (should never be called) */
2979 sparc_convert_to_raw (struct type
*type
, int regnum
, char *from
, char *to
)
2980 { /* do nothing (should never be called) */
2983 /* Init saved regs: nothing to do, just a place-holder function. */
2986 sparc_frame_init_saved_regs (struct frame_info
*fi_ignored
)
2990 /* gdbarch fix call dummy:
2991 All this function does is rearrange the arguments before calling
2992 sparc_fix_call_dummy (which does the real work). */
2995 sparc_gdbarch_fix_call_dummy (char *dummy
,
2999 struct value
**args
,
3003 if (CALL_DUMMY_LOCATION
== ON_STACK
)
3004 sparc_fix_call_dummy (dummy
, pc
, fun
, type
, gcc_p
);
3007 /* CALL_DUMMY_ADDRESS: fetch the breakpoint address for a call dummy. */
3010 sparc_call_dummy_address (void)
3012 return (CALL_DUMMY_START_OFFSET
) + CALL_DUMMY_BREAKPOINT_OFFSET
;
3015 /* Supply the Y register number to those that need it. */
3018 sparc_y_regnum (void)
3020 return gdbarch_tdep (current_gdbarch
)->y_regnum
;
3024 sparc_reg_struct_has_addr (int gcc_p
, struct type
*type
)
3026 if (GDB_TARGET_IS_SPARC64
)
3027 return (TYPE_LENGTH (type
) > 32);
3029 return (gcc_p
!= 1);
3033 sparc_intreg_size (void)
3035 return SPARC_INTREG_SIZE
;
3039 sparc_return_value_on_stack (struct type
*type
)
3041 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&&
3042 TYPE_LENGTH (type
) > 8)
3049 * Gdbarch "constructor" function.
3052 #define SPARC32_CALL_DUMMY_ON_STACK
3054 #define SPARC_SP_REGNUM 14
3055 #define SPARC_FP_REGNUM 30
3056 #define SPARC_FP0_REGNUM 32
3057 #define SPARC32_NPC_REGNUM 69
3058 #define SPARC32_PC_REGNUM 68
3059 #define SPARC32_Y_REGNUM 64
3060 #define SPARC64_PC_REGNUM 80
3061 #define SPARC64_NPC_REGNUM 81
3062 #define SPARC64_Y_REGNUM 85
3064 static struct gdbarch
*
3065 sparc_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3067 struct gdbarch
*gdbarch
;
3068 struct gdbarch_tdep
*tdep
;
3070 static LONGEST call_dummy_32
[] =
3071 { 0xbc100001, 0x9de38000, 0xbc100002, 0xbe100003,
3072 0xda03a058, 0xd803a054, 0xd603a050, 0xd403a04c,
3073 0xd203a048, 0x40000000, 0xd003a044, 0x01000000,
3074 0x91d02001, 0x01000000
3076 static LONGEST call_dummy_64
[] =
3077 { 0x9de3bec0fd3fa7f7LL
, 0xf93fa7eff53fa7e7LL
,
3078 0xf13fa7dfed3fa7d7LL
, 0xe93fa7cfe53fa7c7LL
,
3079 0xe13fa7bfdd3fa7b7LL
, 0xd93fa7afd53fa7a7LL
,
3080 0xd13fa79fcd3fa797LL
, 0xc93fa78fc53fa787LL
,
3081 0xc13fa77fcc3fa777LL
, 0xc83fa76fc43fa767LL
,
3082 0xc03fa75ffc3fa757LL
, 0xf83fa74ff43fa747LL
,
3083 0xf03fa73f01000000LL
, 0x0100000001000000LL
,
3084 0x0100000091580000LL
, 0xd027a72b93500000LL
,
3085 0xd027a72791480000LL
, 0xd027a72391400000LL
,
3086 0xd027a71fda5ba8a7LL
, 0xd85ba89fd65ba897LL
,
3087 0xd45ba88fd25ba887LL
, 0x9fc02000d05ba87fLL
,
3088 0x0100000091d02001LL
, 0x0100000001000000LL
3090 static LONGEST call_dummy_nil
[] = {0};
3092 /* Try to determine the OS ABI of the object we are loading. */
3094 if (info
.abfd
!= NULL
3095 && info
.osabi
== GDB_OSABI_UNKNOWN
)
3097 /* If it's an ELF file, assume it's Solaris. */
3098 if (bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
3099 info
.osabi
= GDB_OSABI_SOLARIS
;
3102 /* First see if there is already a gdbarch that can satisfy the request. */
3103 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3105 return arches
->gdbarch
;
3107 /* None found: is the request for a sparc architecture? */
3108 if (info
.bfd_arch_info
->arch
!= bfd_arch_sparc
)
3109 return NULL
; /* No; then it's not for us. */
3111 /* Yes: create a new gdbarch for the specified machine type. */
3112 tdep
= (struct gdbarch_tdep
*) xmalloc (sizeof (struct gdbarch_tdep
));
3113 gdbarch
= gdbarch_alloc (&info
, tdep
);
3115 /* First set settings that are common for all sparc architectures. */
3116 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
3117 set_gdbarch_breakpoint_from_pc (gdbarch
, memory_breakpoint_from_pc
);
3118 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
3119 set_gdbarch_call_dummy_p (gdbarch
, 1);
3120 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 1);
3121 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
3122 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3123 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, sparc_extract_struct_value_address
);
3124 set_gdbarch_fix_call_dummy (gdbarch
, sparc_gdbarch_fix_call_dummy
);
3125 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3126 set_gdbarch_fp_regnum (gdbarch
, SPARC_FP_REGNUM
);
3127 set_gdbarch_fp0_regnum (gdbarch
, SPARC_FP0_REGNUM
);
3128 set_gdbarch_frame_chain (gdbarch
, sparc_frame_chain
);
3129 set_gdbarch_frame_init_saved_regs (gdbarch
, sparc_frame_init_saved_regs
);
3130 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
3131 set_gdbarch_frame_saved_pc (gdbarch
, sparc_frame_saved_pc
);
3132 set_gdbarch_frameless_function_invocation (gdbarch
,
3133 frameless_look_for_prologue
);
3134 set_gdbarch_get_saved_register (gdbarch
, sparc_get_saved_register
);
3135 set_gdbarch_init_extra_frame_info (gdbarch
, sparc_init_extra_frame_info
);
3136 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3137 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3138 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
3139 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3140 set_gdbarch_max_register_raw_size (gdbarch
, 8);
3141 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
3142 set_gdbarch_pop_frame (gdbarch
, sparc_pop_frame
);
3143 set_gdbarch_push_return_address (gdbarch
, sparc_push_return_address
);
3144 set_gdbarch_push_dummy_frame (gdbarch
, sparc_push_dummy_frame
);
3145 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
3146 set_gdbarch_register_convert_to_raw (gdbarch
, sparc_convert_to_raw
);
3147 set_gdbarch_register_convert_to_virtual (gdbarch
,
3148 sparc_convert_to_virtual
);
3149 set_gdbarch_register_convertible (gdbarch
,
3150 generic_register_convertible_not
);
3151 set_gdbarch_reg_struct_has_addr (gdbarch
, sparc_reg_struct_has_addr
);
3152 set_gdbarch_return_value_on_stack (gdbarch
, sparc_return_value_on_stack
);
3153 set_gdbarch_saved_pc_after_call (gdbarch
, sparc_saved_pc_after_call
);
3154 set_gdbarch_prologue_frameless_p (gdbarch
, sparc_prologue_frameless_p
);
3155 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
3156 set_gdbarch_skip_prologue (gdbarch
, sparc_skip_prologue
);
3157 set_gdbarch_sp_regnum (gdbarch
, SPARC_SP_REGNUM
);
3158 set_gdbarch_deprecated_use_generic_dummy_frames (gdbarch
, 0);
3159 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
3162 * Settings that depend only on 32/64 bit word size
3165 switch (info
.bfd_arch_info
->mach
)
3167 case bfd_mach_sparc
:
3168 case bfd_mach_sparc_sparclet
:
3169 case bfd_mach_sparc_sparclite
:
3170 case bfd_mach_sparc_v8plus
:
3171 case bfd_mach_sparc_v8plusa
:
3172 case bfd_mach_sparc_sparclite_le
:
3173 /* 32-bit machine types: */
3175 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3176 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_on_stack
);
3177 set_gdbarch_call_dummy_address (gdbarch
, sparc_call_dummy_address
);
3178 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0x30);
3179 set_gdbarch_call_dummy_length (gdbarch
, 0x38);
3181 /* NOTE: cagney/2002-04-26: Based from info posted by Peter
3182 Schauer around Oct '99. Briefly, due to aspects of the SPARC
3183 ABI, it isn't possible to use ON_STACK with a strictly
3186 Peter Schauer writes ...
3188 No, any call from GDB to a user function returning a
3189 struct/union will fail miserably. Try this:
3208 for (i = 0; i < 4; i++)
3214 Set a breakpoint at the gx = sret () statement, run to it and
3215 issue a `print sret()'. It will not succed with your
3216 approach, and I doubt that continuing the program will work
3219 For details of the ABI see the Sparc Architecture Manual. I
3220 have Version 8 (Prentice Hall ISBN 0-13-825001-4) and the
3221 calling conventions for functions returning aggregate values
3222 are explained in Appendix D.3. */
3224 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
3225 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_32
);
3227 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_at_entry_point
);
3228 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
3229 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
3230 set_gdbarch_call_dummy_length (gdbarch
, 0);
3231 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_nil
);
3233 set_gdbarch_call_dummy_stack_adjust (gdbarch
, 68);
3234 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
3235 set_gdbarch_frame_args_skip (gdbarch
, 68);
3236 set_gdbarch_function_start_offset (gdbarch
, 0);
3237 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3238 set_gdbarch_npc_regnum (gdbarch
, SPARC32_NPC_REGNUM
);
3239 set_gdbarch_pc_regnum (gdbarch
, SPARC32_PC_REGNUM
);
3240 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3241 set_gdbarch_push_arguments (gdbarch
, sparc32_push_arguments
);
3242 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
3243 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
3245 set_gdbarch_register_byte (gdbarch
, sparc32_register_byte
);
3246 set_gdbarch_register_raw_size (gdbarch
, sparc32_register_size
);
3247 set_gdbarch_register_size (gdbarch
, 4);
3248 set_gdbarch_register_virtual_size (gdbarch
, sparc32_register_size
);
3249 set_gdbarch_register_virtual_type (gdbarch
,
3250 sparc32_register_virtual_type
);
3251 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3252 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (call_dummy_32
));
3254 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
3256 set_gdbarch_stack_align (gdbarch
, sparc32_stack_align
);
3257 set_gdbarch_store_struct_return (gdbarch
, sparc32_store_struct_return
);
3258 set_gdbarch_use_struct_convention (gdbarch
,
3259 generic_use_struct_convention
);
3260 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
3261 tdep
->y_regnum
= SPARC32_Y_REGNUM
;
3262 tdep
->fp_max_regnum
= SPARC_FP0_REGNUM
+ 32;
3263 tdep
->intreg_size
= 4;
3264 tdep
->reg_save_offset
= 0x60;
3265 tdep
->call_dummy_call_offset
= 0x24;
3268 case bfd_mach_sparc_v9
:
3269 case bfd_mach_sparc_v9a
:
3270 /* 64-bit machine types: */
3271 default: /* Any new machine type is likely to be 64-bit. */
3273 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3274 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_on_stack
);
3275 set_gdbarch_call_dummy_address (gdbarch
, sparc_call_dummy_address
);
3276 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 8 * 4);
3277 set_gdbarch_call_dummy_length (gdbarch
, 192);
3278 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
3279 set_gdbarch_call_dummy_start_offset (gdbarch
, 148);
3280 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_64
);
3282 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_at_entry_point
);
3283 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
3284 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
3285 set_gdbarch_call_dummy_length (gdbarch
, 0);
3286 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
3287 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_nil
);
3289 set_gdbarch_call_dummy_stack_adjust (gdbarch
, 128);
3290 set_gdbarch_frame_args_skip (gdbarch
, 136);
3291 set_gdbarch_function_start_offset (gdbarch
, 0);
3292 set_gdbarch_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3293 set_gdbarch_npc_regnum (gdbarch
, SPARC64_NPC_REGNUM
);
3294 set_gdbarch_pc_regnum (gdbarch
, SPARC64_PC_REGNUM
);
3295 set_gdbarch_ptr_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3296 set_gdbarch_push_arguments (gdbarch
, sparc64_push_arguments
);
3297 /* NOTE different for at_entry */
3298 set_gdbarch_read_fp (gdbarch
, sparc64_read_fp
);
3299 set_gdbarch_read_sp (gdbarch
, sparc64_read_sp
);
3300 /* Some of the registers aren't 64 bits, but it's a lot simpler just
3301 to assume they all are (since most of them are). */
3302 set_gdbarch_register_byte (gdbarch
, sparc64_register_byte
);
3303 set_gdbarch_register_raw_size (gdbarch
, sparc64_register_size
);
3304 set_gdbarch_register_size (gdbarch
, 8);
3305 set_gdbarch_register_virtual_size (gdbarch
, sparc64_register_size
);
3306 set_gdbarch_register_virtual_type (gdbarch
,
3307 sparc64_register_virtual_type
);
3308 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3309 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (call_dummy_64
));
3311 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
3313 set_gdbarch_stack_align (gdbarch
, sparc64_stack_align
);
3314 set_gdbarch_store_struct_return (gdbarch
, sparc64_store_struct_return
);
3315 set_gdbarch_use_struct_convention (gdbarch
,
3316 sparc64_use_struct_convention
);
3317 set_gdbarch_write_sp (gdbarch
, sparc64_write_sp
);
3318 tdep
->y_regnum
= SPARC64_Y_REGNUM
;
3319 tdep
->fp_max_regnum
= SPARC_FP0_REGNUM
+ 48;
3320 tdep
->intreg_size
= 8;
3321 tdep
->reg_save_offset
= 0x90;
3322 tdep
->call_dummy_call_offset
= 148 + 4 * 5;
3327 * Settings that vary per-architecture:
3330 switch (info
.bfd_arch_info
->mach
)
3332 case bfd_mach_sparc
:
3333 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3334 set_gdbarch_num_regs (gdbarch
, 72);
3335 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3336 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3337 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3338 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3339 tdep
->fp_register_bytes
= 32 * 4;
3340 tdep
->print_insn_mach
= bfd_mach_sparc
;
3342 case bfd_mach_sparc_sparclet
:
3343 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparclet_extract_return_value
);
3344 set_gdbarch_num_regs (gdbarch
, 32 + 32 + 8 + 8 + 8);
3345 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4 + 8*4);
3346 set_gdbarch_register_name (gdbarch
, sparclet_register_name
);
3347 set_gdbarch_deprecated_store_return_value (gdbarch
, sparclet_store_return_value
);
3348 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3349 tdep
->fp_register_bytes
= 0;
3350 tdep
->print_insn_mach
= bfd_mach_sparc_sparclet
;
3352 case bfd_mach_sparc_sparclite
:
3353 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3354 set_gdbarch_num_regs (gdbarch
, 80);
3355 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4);
3356 set_gdbarch_register_name (gdbarch
, sparclite_register_name
);
3357 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3358 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3359 tdep
->fp_register_bytes
= 0;
3360 tdep
->print_insn_mach
= bfd_mach_sparc_sparclite
;
3362 case bfd_mach_sparc_v8plus
:
3363 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3364 set_gdbarch_num_regs (gdbarch
, 72);
3365 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3366 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3367 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3368 tdep
->print_insn_mach
= bfd_mach_sparc
;
3369 tdep
->fp_register_bytes
= 32 * 4;
3370 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3372 case bfd_mach_sparc_v8plusa
:
3373 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3374 set_gdbarch_num_regs (gdbarch
, 72);
3375 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3376 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3377 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3378 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3379 tdep
->fp_register_bytes
= 32 * 4;
3380 tdep
->print_insn_mach
= bfd_mach_sparc
;
3382 case bfd_mach_sparc_sparclite_le
:
3383 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3384 set_gdbarch_num_regs (gdbarch
, 80);
3385 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4);
3386 set_gdbarch_register_name (gdbarch
, sparclite_register_name
);
3387 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3388 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3389 tdep
->fp_register_bytes
= 0;
3390 tdep
->print_insn_mach
= bfd_mach_sparc_sparclite
;
3392 case bfd_mach_sparc_v9
:
3393 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc64_extract_return_value
);
3394 set_gdbarch_num_regs (gdbarch
, 125);
3395 set_gdbarch_register_bytes (gdbarch
, 32*8 + 32*8 + 45*8);
3396 set_gdbarch_register_name (gdbarch
, sparc64_register_name
);
3397 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3398 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3399 tdep
->fp_register_bytes
= 64 * 4;
3400 tdep
->print_insn_mach
= bfd_mach_sparc_v9a
;
3402 case bfd_mach_sparc_v9a
:
3403 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc64_extract_return_value
);
3404 set_gdbarch_num_regs (gdbarch
, 125);
3405 set_gdbarch_register_bytes (gdbarch
, 32*8 + 32*8 + 45*8);
3406 set_gdbarch_register_name (gdbarch
, sparc64_register_name
);
3407 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3408 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3409 tdep
->fp_register_bytes
= 64 * 4;
3410 tdep
->print_insn_mach
= bfd_mach_sparc_v9a
;
3414 /* Hook in OS ABI-specific overrides, if they have been registered. */
3415 gdbarch_init_osabi (info
, gdbarch
);
3421 sparc_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
3423 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3428 fprintf_unfiltered (file
, "sparc_dump_tdep: has_fpu = %d\n",
3430 fprintf_unfiltered (file
, "sparc_dump_tdep: fp_register_bytes = %d\n",
3431 tdep
->fp_register_bytes
);
3432 fprintf_unfiltered (file
, "sparc_dump_tdep: y_regnum = %d\n",
3434 fprintf_unfiltered (file
, "sparc_dump_tdep: fp_max_regnum = %d\n",
3435 tdep
->fp_max_regnum
);
3436 fprintf_unfiltered (file
, "sparc_dump_tdep: intreg_size = %d\n",
3438 fprintf_unfiltered (file
, "sparc_dump_tdep: reg_save_offset = %d\n",
3439 tdep
->reg_save_offset
);
3440 fprintf_unfiltered (file
, "sparc_dump_tdep: call_dummy_call_offset = %d\n",
3441 tdep
->call_dummy_call_offset
);
3442 fprintf_unfiltered (file
, "sparc_dump_tdep: print_insn_match = %d\n",
3443 tdep
->print_insn_mach
);