1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995,
4 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation,
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 /* ??? Support for calling functions from gdb in sparc64 is unfinished. */
27 #include "arch-utils.h"
33 #include "gdb_string.h"
38 #include <sys/procfs.h>
39 /* Prototypes for supply_gregset etc. */
44 #include "gdb_assert.h"
46 #include "symfile.h" /* for 'entry_point_address' */
49 * Some local macros that have multi-arch and non-multi-arch versions:
52 #if (GDB_MULTI_ARCH > 0)
54 /* Does the target have Floating Point registers? */
55 #define SPARC_HAS_FPU (gdbarch_tdep (current_gdbarch)->has_fpu)
56 /* Number of bytes devoted to Floating Point registers: */
57 #define FP_REGISTER_BYTES (gdbarch_tdep (current_gdbarch)->fp_register_bytes)
58 /* Highest numbered Floating Point register. */
59 #define FP_MAX_REGNUM (gdbarch_tdep (current_gdbarch)->fp_max_regnum)
60 /* Size of a general (integer) register: */
61 #define SPARC_INTREG_SIZE (gdbarch_tdep (current_gdbarch)->intreg_size)
62 /* Offset within the call dummy stack of the saved registers. */
63 #define DUMMY_REG_SAVE_OFFSET (gdbarch_tdep (current_gdbarch)->reg_save_offset)
65 #else /* non-multi-arch */
68 /* Does the target have Floating Point registers? */
69 #if defined(TARGET_SPARCLET) || defined(TARGET_SPARCLITE)
70 #define SPARC_HAS_FPU 0
72 #define SPARC_HAS_FPU 1
75 /* Number of bytes devoted to Floating Point registers: */
76 #if (GDB_TARGET_IS_SPARC64)
77 #define FP_REGISTER_BYTES (64 * 4)
80 #define FP_REGISTER_BYTES (32 * 4)
82 #define FP_REGISTER_BYTES 0
86 /* Highest numbered Floating Point register. */
87 #if (GDB_TARGET_IS_SPARC64)
88 #define FP_MAX_REGNUM (FP0_REGNUM + 48)
90 #define FP_MAX_REGNUM (FP0_REGNUM + 32)
93 /* Size of a general (integer) register: */
94 #define SPARC_INTREG_SIZE (REGISTER_RAW_SIZE (G0_REGNUM))
96 /* Offset within the call dummy stack of the saved registers. */
97 #if (GDB_TARGET_IS_SPARC64)
98 #define DUMMY_REG_SAVE_OFFSET (128 + 16)
100 #define DUMMY_REG_SAVE_OFFSET 0x60
103 #endif /* GDB_MULTI_ARCH */
108 int fp_register_bytes
;
113 int call_dummy_call_offset
;
117 /* Now make GDB_TARGET_IS_SPARC64 a runtime test. */
118 /* FIXME MVS: or try testing bfd_arch_info.arch and bfd_arch_info.mach ...
119 * define GDB_TARGET_IS_SPARC64 \
120 * (TARGET_ARCHITECTURE->arch == bfd_arch_sparc && \
121 * (TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9 || \
122 * TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9a))
126 extern int stop_after_trap
;
128 /* We don't store all registers immediately when requested, since they
129 get sent over in large chunks anyway. Instead, we accumulate most
130 of the changes and send them over once. "deferred_stores" keeps
131 track of which sets of registers we have locally-changed copies of,
132 so we only need send the groups that have changed. */
134 int deferred_stores
= 0; /* Accumulated stores we want to do eventually. */
137 /* Some machines, such as Fujitsu SPARClite 86x, have a bi-endian mode
138 where instructions are big-endian and data are little-endian.
139 This flag is set when we detect that the target is of this type. */
144 /* Fetch a single instruction. Even on bi-endian machines
145 such as sparc86x, instructions are always big-endian. */
148 fetch_instruction (CORE_ADDR pc
)
150 unsigned long retval
;
152 unsigned char buf
[4];
154 read_memory (pc
, buf
, sizeof (buf
));
156 /* Start at the most significant end of the integer, and work towards
157 the least significant. */
159 for (i
= 0; i
< sizeof (buf
); ++i
)
160 retval
= (retval
<< 8) | buf
[i
];
165 /* Branches with prediction are treated like their non-predicting cousins. */
166 /* FIXME: What about floating point branches? */
168 /* Macros to extract fields from sparc instructions. */
169 #define X_OP(i) (((i) >> 30) & 0x3)
170 #define X_RD(i) (((i) >> 25) & 0x1f)
171 #define X_A(i) (((i) >> 29) & 1)
172 #define X_COND(i) (((i) >> 25) & 0xf)
173 #define X_OP2(i) (((i) >> 22) & 0x7)
174 #define X_IMM22(i) ((i) & 0x3fffff)
175 #define X_OP3(i) (((i) >> 19) & 0x3f)
176 #define X_RS1(i) (((i) >> 14) & 0x1f)
177 #define X_I(i) (((i) >> 13) & 1)
178 #define X_IMM13(i) ((i) & 0x1fff)
179 /* Sign extension macros. */
180 #define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000)
181 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
182 #define X_CC(i) (((i) >> 20) & 3)
183 #define X_P(i) (((i) >> 19) & 1)
184 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
185 #define X_RCOND(i) (((i) >> 25) & 7)
186 #define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000)
187 #define X_FCN(i) (((i) >> 25) & 31)
191 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
, done_retry
194 /* Simulate single-step ptrace call for sun4. Code written by Gary
195 Beihl (beihl@mcc.com). */
197 /* npc4 and next_pc describe the situation at the time that the
198 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
199 static CORE_ADDR next_pc
, npc4
, target
;
200 static int brknpc4
, brktrg
;
201 typedef char binsn_quantum
[BREAKPOINT_MAX
];
202 static binsn_quantum break_mem
[3];
204 static branch_type
isbranch (long, CORE_ADDR
, CORE_ADDR
*);
206 /* single_step() is called just before we want to resume the inferior,
207 if we want to single-step it but there is no hardware or kernel single-step
208 support (as on all SPARCs). We find all the possible targets of the
209 coming instruction and breakpoint them.
211 single_step is also called just after the inferior stops. If we had
212 set up a simulated single-step, we undo our damage. */
215 sparc_software_single_step (enum target_signal ignore
, /* pid, but we don't need it */
216 int insert_breakpoints_p
)
222 if (insert_breakpoints_p
)
224 /* Always set breakpoint for NPC. */
225 next_pc
= read_register (NPC_REGNUM
);
226 npc4
= next_pc
+ 4; /* branch not taken */
228 target_insert_breakpoint (next_pc
, break_mem
[0]);
229 /* printf_unfiltered ("set break at %x\n",next_pc); */
231 pc
= read_register (PC_REGNUM
);
232 pc_instruction
= fetch_instruction (pc
);
233 br
= isbranch (pc_instruction
, pc
, &target
);
234 brknpc4
= brktrg
= 0;
238 /* Conditional annulled branch will either end up at
239 npc (if taken) or at npc+4 (if not taken).
242 target_insert_breakpoint (npc4
, break_mem
[1]);
244 else if (br
== baa
&& target
!= next_pc
)
246 /* Unconditional annulled branch will always end up at
249 target_insert_breakpoint (target
, break_mem
[2]);
251 else if (GDB_TARGET_IS_SPARC64
&& br
== done_retry
)
254 target_insert_breakpoint (target
, break_mem
[2]);
259 /* Remove breakpoints */
260 target_remove_breakpoint (next_pc
, break_mem
[0]);
263 target_remove_breakpoint (npc4
, break_mem
[1]);
266 target_remove_breakpoint (target
, break_mem
[2]);
270 struct frame_extra_info
275 /* Following fields only relevant for flat frames. */
278 /* Add this to ->frame to get the value of the stack pointer at the
279 time of the register saves. */
283 /* Call this for each newly created frame. For SPARC, we need to
284 calculate the bottom of the frame, and do some extra work if the
285 prologue has been generated via the -mflat option to GCC. In
286 particular, we need to know where the previous fp and the pc have
287 been stashed, since their exact position within the frame may vary. */
290 sparc_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
293 CORE_ADDR prologue_start
, prologue_end
;
296 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
297 frame_saved_regs_zalloc (fi
);
299 get_frame_extra_info (fi
)->bottom
=
301 ? (get_frame_base (fi
) == get_frame_base (get_next_frame (fi
))
302 ? get_frame_extra_info (get_next_frame (fi
))->bottom
303 : get_frame_base (get_next_frame (fi
)))
306 /* If fi->next is NULL, then we already set ->frame by passing read_fp()
307 to create_new_frame. */
308 if (get_next_frame (fi
))
312 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
314 /* Compute ->frame as if not flat. If it is flat, we'll change
316 if (get_next_frame (get_next_frame (fi
)) != NULL
317 && ((get_frame_type (get_next_frame (get_next_frame (fi
))) == SIGTRAMP_FRAME
)
318 || deprecated_frame_in_dummy (get_next_frame (get_next_frame (fi
))))
319 && frameless_look_for_prologue (get_next_frame (fi
)))
321 /* A frameless function interrupted by a signal did not change
322 the frame pointer, fix up frame pointer accordingly. */
323 deprecated_update_frame_base_hack (fi
, get_frame_base (get_next_frame (fi
)));
324 get_frame_extra_info (fi
)->bottom
=
325 get_frame_extra_info (get_next_frame (fi
))->bottom
;
329 /* Should we adjust for stack bias here? */
331 frame_read_unsigned_register (fi
, FP_REGNUM
, &tmp
);
332 deprecated_update_frame_base_hack (fi
, tmp
);
333 if (GDB_TARGET_IS_SPARC64
&& (get_frame_base (fi
) & 1))
334 deprecated_update_frame_base_hack (fi
, get_frame_base (fi
) + 2047);
338 /* Decide whether this is a function with a ``flat register window''
339 frame. For such functions, the frame pointer is actually in %i7. */
340 get_frame_extra_info (fi
)->flat
= 0;
341 get_frame_extra_info (fi
)->in_prologue
= 0;
342 if (find_pc_partial_function (get_frame_pc (fi
), &name
, &prologue_start
, &prologue_end
))
344 /* See if the function starts with an add (which will be of a
345 negative number if a flat frame) to the sp. FIXME: Does not
346 handle large frames which will need more than one instruction
348 insn
= fetch_instruction (prologue_start
);
349 if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0
350 && X_I (insn
) && X_SIMM13 (insn
) < 0)
352 int offset
= X_SIMM13 (insn
);
354 /* Then look for a save of %i7 into the frame. */
355 insn
= fetch_instruction (prologue_start
+ 4);
359 && X_RS1 (insn
) == 14)
363 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
365 /* We definitely have a flat frame now. */
366 get_frame_extra_info (fi
)->flat
= 1;
368 get_frame_extra_info (fi
)->sp_offset
= offset
;
370 /* Overwrite the frame's address with the value in %i7. */
373 frame_read_unsigned_register (fi
, I7_REGNUM
, &tmp
);
374 deprecated_update_frame_base_hack (fi
, tmp
);
377 if (GDB_TARGET_IS_SPARC64
&& (get_frame_base (fi
) & 1))
378 deprecated_update_frame_base_hack (fi
, get_frame_base (fi
) + 2047);
380 /* Record where the fp got saved. */
381 get_frame_extra_info (fi
)->fp_addr
=
382 get_frame_base (fi
) + get_frame_extra_info (fi
)->sp_offset
+ X_SIMM13 (insn
);
384 /* Also try to collect where the pc got saved to. */
385 get_frame_extra_info (fi
)->pc_addr
= 0;
386 insn
= fetch_instruction (prologue_start
+ 12);
390 && X_RS1 (insn
) == 14)
391 get_frame_extra_info (fi
)->pc_addr
=
392 get_frame_base (fi
) + get_frame_extra_info (fi
)->sp_offset
+ X_SIMM13 (insn
);
397 /* Check if the PC is in the function prologue before a SAVE
398 instruction has been executed yet. If so, set the frame
399 to the current value of the stack pointer and set
400 the in_prologue flag. */
402 struct symtab_and_line sal
;
404 sal
= find_pc_line (prologue_start
, 0);
405 if (sal
.line
== 0) /* no line info, use PC */
406 prologue_end
= get_frame_pc (fi
);
407 else if (sal
.end
< prologue_end
)
408 prologue_end
= sal
.end
;
409 if (get_frame_pc (fi
) < prologue_end
)
411 for (addr
= prologue_start
; addr
< get_frame_pc (fi
); addr
+= 4)
413 insn
= read_memory_integer (addr
, 4);
414 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3c)
415 break; /* SAVE seen, stop searching */
417 if (addr
>= get_frame_pc (fi
))
419 get_frame_extra_info (fi
)->in_prologue
= 1;
420 deprecated_update_frame_base_hack (fi
, read_register (SP_REGNUM
));
425 if (get_next_frame (fi
) && get_frame_base (fi
) == 0)
427 /* Kludge to cause init_prev_frame_info to destroy the new frame. */
428 deprecated_update_frame_base_hack (fi
, get_frame_base (get_next_frame (fi
)));
429 deprecated_update_frame_pc_hack (fi
, get_frame_pc (get_next_frame (fi
)));
434 sparc_frame_chain (struct frame_info
*frame
)
436 /* Value that will cause DEPRECATED_FRAME_CHAIN_VALID to not worry
437 about the chain value. If it really is zero, we detect it later
438 in sparc_init_prev_frame.
440 Note: kevinb/2003-02-18: The constant 1 used to be returned here,
441 but, after some recent changes to legacy_frame_chain_valid(),
442 this value is no longer suitable for causing
443 legacy_frame_chain_valid() to "not worry about the chain value."
444 The constant ~0 (i.e, 0xfff...) causes the failing test in
445 legacy_frame_chain_valid() to succeed thus preserving the "not
446 worry" property. I had considered using something like
447 ``get_frame_base (frame) + 1''. However, I think a constant
448 value is better, because when debugging this problem, I knew that
449 something funny was going on as soon as I saw the constant 1
450 being used as the frame chain elsewhere in GDB. */
452 return ~ (CORE_ADDR
) 0;
456 sparc_extract_struct_value_address (char *regbuf
)
458 return extract_address (regbuf
+ REGISTER_BYTE (O0_REGNUM
),
459 REGISTER_RAW_SIZE (O0_REGNUM
));
462 /* Find the pc saved in frame FRAME. */
465 sparc_frame_saved_pc (struct frame_info
*frame
)
470 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
471 if ((get_frame_type (frame
) == SIGTRAMP_FRAME
))
473 /* This is the signal trampoline frame.
474 Get the saved PC from the sigcontext structure. */
476 #ifndef SIGCONTEXT_PC_OFFSET
477 #define SIGCONTEXT_PC_OFFSET 12
480 CORE_ADDR sigcontext_addr
;
482 int saved_pc_offset
= SIGCONTEXT_PC_OFFSET
;
485 scbuf
= alloca (TARGET_PTR_BIT
/ HOST_CHAR_BIT
);
487 /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext
488 as the third parameter. The offset to the saved pc is 12. */
489 find_pc_partial_function (get_frame_pc (frame
), &name
,
490 (CORE_ADDR
*) NULL
, (CORE_ADDR
*) NULL
);
491 if (name
&& STREQ (name
, "ucbsigvechandler"))
492 saved_pc_offset
= 12;
494 /* The sigcontext address is contained in register O2. */
497 frame_read_unsigned_register (frame
, O0_REGNUM
+ 2, &tmp
);
498 sigcontext_addr
= tmp
;
501 /* Don't cause a memory_error when accessing sigcontext in case the
502 stack layout has changed or the stack is corrupt. */
503 target_read_memory (sigcontext_addr
+ saved_pc_offset
,
504 scbuf
, sizeof (scbuf
));
505 return extract_address (scbuf
, sizeof (scbuf
));
507 else if (get_frame_extra_info (frame
)->in_prologue
||
508 (get_next_frame (frame
) != NULL
&&
509 ((get_frame_type (get_next_frame (frame
)) == SIGTRAMP_FRAME
) ||
510 deprecated_frame_in_dummy (get_next_frame (frame
))) &&
511 frameless_look_for_prologue (frame
)))
513 /* A frameless function interrupted by a signal did not save
514 the PC, it is still in %o7. */
516 frame_read_unsigned_register (frame
, O7_REGNUM
, &tmp
);
517 return PC_ADJUST (tmp
);
519 if (get_frame_extra_info (frame
)->flat
)
520 addr
= get_frame_extra_info (frame
)->pc_addr
;
522 addr
= get_frame_extra_info (frame
)->bottom
+ FRAME_SAVED_I0
+
523 SPARC_INTREG_SIZE
* (I7_REGNUM
- I0_REGNUM
);
526 /* A flat frame leaf function might not save the PC anywhere,
527 just leave it in %o7. */
528 return PC_ADJUST (read_register (O7_REGNUM
));
530 read_memory (addr
, buf
, SPARC_INTREG_SIZE
);
531 return PC_ADJUST (extract_address (buf
, SPARC_INTREG_SIZE
));
534 /* Since an individual frame in the frame cache is defined by two
535 arguments (a frame pointer and a stack pointer), we need two
536 arguments to get info for an arbitrary stack frame. This routine
537 takes two arguments and makes the cached frames look as if these
538 two arguments defined a frame on the cache. This allows the rest
539 of info frame to extract the important arguments without
543 setup_arbitrary_frame (int argc
, CORE_ADDR
*argv
)
545 struct frame_info
*frame
;
548 error ("Sparc frame specifications require two arguments: fp and sp");
550 frame
= create_new_frame (argv
[0], 0);
553 internal_error (__FILE__
, __LINE__
,
554 "create_new_frame returned invalid frame");
556 get_frame_extra_info (frame
)->bottom
= argv
[1];
557 deprecated_update_frame_pc_hack (frame
, DEPRECATED_FRAME_SAVED_PC (frame
));
561 /* Given a pc value, skip it forward past the function prologue by
562 disassembling instructions that appear to be a prologue.
564 If FRAMELESS_P is set, we are only testing to see if the function
565 is frameless. This allows a quicker answer.
567 This routine should be more specific in its actions; making sure
568 that it uses the same register in the initial prologue section. */
570 static CORE_ADDR
examine_prologue (CORE_ADDR
, int, struct frame_info
*,
574 examine_prologue (CORE_ADDR start_pc
, int frameless_p
, struct frame_info
*fi
,
575 CORE_ADDR
*saved_regs
)
579 CORE_ADDR pc
= start_pc
;
582 insn
= fetch_instruction (pc
);
584 /* Recognize the `sethi' insn and record its destination. */
585 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 4)
589 insn
= fetch_instruction (pc
);
592 /* Recognize an add immediate value to register to either %g1 or
593 the destination register recorded above. Actually, this might
594 well recognize several different arithmetic operations.
595 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
596 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
597 I imagine any compiler really does that, however). */
600 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
603 insn
= fetch_instruction (pc
);
606 /* Recognize any SAVE insn. */
607 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 60)
610 if (frameless_p
) /* If the save is all we care about, */
611 return pc
; /* return before doing more work */
612 insn
= fetch_instruction (pc
);
614 /* Recognize add to %sp. */
615 else if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0)
618 if (frameless_p
) /* If the add is all we care about, */
619 return pc
; /* return before doing more work */
621 insn
= fetch_instruction (pc
);
622 /* Recognize store of frame pointer (i7). */
626 && X_RS1 (insn
) == 14)
629 insn
= fetch_instruction (pc
);
631 /* Recognize sub %sp, <anything>, %i7. */
634 && X_RS1 (insn
) == 14
635 && X_RD (insn
) == 31)
638 insn
= fetch_instruction (pc
);
647 /* Without a save or add instruction, it's not a prologue. */
652 /* Recognize stores into the frame from the input registers.
653 This recognizes all non alternate stores of an input register,
654 into a location offset from the frame pointer between
657 /* The above will fail for arguments that are promoted
658 (eg. shorts to ints or floats to doubles), because the compiler
659 will pass them in positive-offset frame space, but the prologue
660 will save them (after conversion) in negative frame space at an
661 unpredictable offset. Therefore I am going to remove the
662 restriction on the target-address of the save, on the theory
663 that any unbroken sequence of saves from input registers must
664 be part of the prologue. In un-optimized code (at least), I'm
665 fairly sure that the compiler would emit SOME other instruction
666 (eg. a move or add) before emitting another save that is actually
667 a part of the function body.
669 Besides, the reserved stack space is different for SPARC64 anyway.
674 && (X_OP3 (insn
) & 0x3c) == 4 /* Store, non-alternate. */
675 && (X_RD (insn
) & 0x18) == 0x18 /* Input register. */
676 && X_I (insn
) /* Immediate mode. */
677 && X_RS1 (insn
) == 30) /* Off of frame pointer. */
678 ; /* empty statement -- fall thru to end of loop */
679 else if (GDB_TARGET_IS_SPARC64
681 && (X_OP3 (insn
) & 0x3c) == 12 /* store, extended (64-bit) */
682 && (X_RD (insn
) & 0x18) == 0x18 /* input register */
683 && X_I (insn
) /* immediate mode */
684 && X_RS1 (insn
) == 30) /* off of frame pointer */
685 ; /* empty statement -- fall thru to end of loop */
686 else if (X_OP (insn
) == 3
687 && (X_OP3 (insn
) & 0x3c) == 36 /* store, floating-point */
688 && X_I (insn
) /* immediate mode */
689 && X_RS1 (insn
) == 30) /* off of frame pointer */
690 ; /* empty statement -- fall thru to end of loop */
693 && X_OP3 (insn
) == 4 /* store? */
694 && X_RS1 (insn
) == 14) /* off of frame pointer */
696 if (saved_regs
&& X_I (insn
))
697 saved_regs
[X_RD (insn
)] =
698 get_frame_base (fi
) + get_frame_extra_info (fi
)->sp_offset
+ X_SIMM13 (insn
);
703 insn
= fetch_instruction (pc
);
709 /* Advance PC across any function entry prologue instructions to reach
713 sparc_skip_prologue (CORE_ADDR start_pc
)
715 struct symtab_and_line sal
;
716 CORE_ADDR func_start
, func_end
;
718 /* This is the preferred method, find the end of the prologue by
719 using the debugging information. */
720 if (find_pc_partial_function (start_pc
, NULL
, &func_start
, &func_end
))
722 sal
= find_pc_line (func_start
, 0);
724 if (sal
.end
< func_end
725 && start_pc
<= sal
.end
)
729 /* Oh well, examine the code by hand. */
730 return examine_prologue (start_pc
, 0, NULL
, NULL
);
733 /* Is the prologue at IP frameless? */
736 sparc_prologue_frameless_p (CORE_ADDR ip
)
738 return ip
== examine_prologue (ip
, 1, NULL
, NULL
);
741 /* Check instruction at ADDR to see if it is a branch.
742 All non-annulled instructions will go to NPC or will trap.
743 Set *TARGET if we find a candidate branch; set to zero if not.
745 This isn't static as it's used by remote-sa.sparc.c. */
748 isbranch (long instruction
, CORE_ADDR addr
, CORE_ADDR
*target
)
750 branch_type val
= not_branch
;
751 long int offset
= 0; /* Must be signed for sign-extend. */
755 if (X_OP (instruction
) == 0
756 && (X_OP2 (instruction
) == 2
757 || X_OP2 (instruction
) == 6
758 || X_OP2 (instruction
) == 1
759 || X_OP2 (instruction
) == 3
760 || X_OP2 (instruction
) == 5
761 || (GDB_TARGET_IS_SPARC64
&& X_OP2 (instruction
) == 7)))
763 if (X_COND (instruction
) == 8)
764 val
= X_A (instruction
) ? baa
: ba
;
766 val
= X_A (instruction
) ? bicca
: bicc
;
767 switch (X_OP2 (instruction
))
770 if (!GDB_TARGET_IS_SPARC64
)
775 offset
= 4 * X_DISP22 (instruction
);
779 offset
= 4 * X_DISP19 (instruction
);
782 offset
= 4 * X_DISP16 (instruction
);
785 *target
= addr
+ offset
;
787 else if (GDB_TARGET_IS_SPARC64
788 && X_OP (instruction
) == 2
789 && X_OP3 (instruction
) == 62)
791 if (X_FCN (instruction
) == 0)
794 *target
= read_register (TNPC_REGNUM
);
797 else if (X_FCN (instruction
) == 1)
800 *target
= read_register (TPC_REGNUM
);
808 /* Find register number REGNUM relative to FRAME and put its
809 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
810 was optimized out (and thus can't be fetched). If the variable
811 was fetched from memory, set *ADDRP to where it was fetched from,
812 otherwise it was fetched from a register.
814 The argument RAW_BUFFER must point to aligned memory. */
817 sparc_get_saved_register (char *raw_buffer
, int *optimized
, CORE_ADDR
*addrp
,
818 struct frame_info
*frame
, int regnum
,
819 enum lval_type
*lval
)
821 struct frame_info
*frame1
;
824 if (!target_has_registers
)
825 error ("No registers.");
832 /* FIXME This code extracted from infcmd.c; should put elsewhere! */
835 /* error ("No selected frame."); */
836 if (!target_has_registers
)
837 error ("The program has no registers now.");
838 if (deprecated_selected_frame
== NULL
)
839 error ("No selected frame.");
840 /* Try to use selected frame */
841 frame
= get_prev_frame (deprecated_selected_frame
);
843 error ("Cmd not meaningful in the outermost frame.");
847 frame1
= get_next_frame (frame
);
849 /* Get saved PC from the frame info if not in innermost frame. */
850 if (regnum
== PC_REGNUM
&& frame1
!= NULL
)
854 if (raw_buffer
!= NULL
)
856 /* Put it back in target format. */
857 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), get_frame_pc (frame
));
864 while (frame1
!= NULL
)
866 /* FIXME MVS: wrong test for dummy frame at entry. */
868 if (get_frame_pc (frame1
) >= (get_frame_extra_info (frame1
)->bottom
869 ? get_frame_extra_info (frame1
)->bottom
871 && get_frame_pc (frame1
) <= get_frame_base (frame1
))
873 /* Dummy frame. All but the window regs are in there somewhere.
874 The window registers are saved on the stack, just like in a
876 if (regnum
>= G1_REGNUM
&& regnum
< G1_REGNUM
+ 7)
877 addr
= get_frame_base (frame1
) + (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
878 - (FP_REGISTER_BYTES
+ 8 * SPARC_INTREG_SIZE
);
879 else if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
880 /* NOTE: cagney/2002-05-04: The call to get_prev_frame()
881 is safe/cheap - there will always be a prev frame.
882 This is because frame1 is initialized to frame->next
883 (frame1->prev == frame) and is then advanced towards
884 the innermost (next) frame. */
885 addr
= (get_frame_extra_info (get_prev_frame (frame1
))->bottom
886 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
888 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
889 /* NOTE: cagney/2002-05-04: The call to get_prev_frame()
890 is safe/cheap - there will always be a prev frame.
891 This is because frame1 is initialized to frame->next
892 (frame1->prev == frame) and is then advanced towards
893 the innermost (next) frame. */
894 addr
= (get_frame_extra_info (get_prev_frame (frame1
))->bottom
895 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
897 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
898 addr
= get_frame_base (frame1
) + (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
899 - (FP_REGISTER_BYTES
+ 16 * SPARC_INTREG_SIZE
);
900 else if (SPARC_HAS_FPU
&&
901 regnum
>= FP0_REGNUM
&& regnum
< FP0_REGNUM
+ 32)
902 addr
= get_frame_base (frame1
) + (regnum
- FP0_REGNUM
) * 4
903 - (FP_REGISTER_BYTES
);
904 else if (GDB_TARGET_IS_SPARC64
&& SPARC_HAS_FPU
&&
905 regnum
>= FP0_REGNUM
+ 32 && regnum
< FP_MAX_REGNUM
)
906 addr
= get_frame_base (frame1
) + 32 * 4 + (regnum
- FP0_REGNUM
- 32) * 8
907 - (FP_REGISTER_BYTES
);
908 else if (regnum
>= Y_REGNUM
&& regnum
< NUM_REGS
)
909 addr
= get_frame_base (frame1
) + (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
910 - (FP_REGISTER_BYTES
+ 24 * SPARC_INTREG_SIZE
);
912 else if (get_frame_extra_info (frame1
)->flat
)
915 if (regnum
== RP_REGNUM
)
916 addr
= get_frame_extra_info (frame1
)->pc_addr
;
917 else if (regnum
== I7_REGNUM
)
918 addr
= get_frame_extra_info (frame1
)->fp_addr
;
921 CORE_ADDR func_start
;
924 regs
= alloca (NUM_REGS
* sizeof (CORE_ADDR
));
925 memset (regs
, 0, NUM_REGS
* sizeof (CORE_ADDR
));
927 find_pc_partial_function (get_frame_pc (frame1
), NULL
, &func_start
, NULL
);
928 examine_prologue (func_start
, 0, frame1
, regs
);
934 /* Normal frame. Local and In registers are saved on stack. */
935 if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
936 addr
= (get_frame_extra_info (get_prev_frame (frame1
))->bottom
937 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
939 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
940 addr
= (get_frame_extra_info (get_prev_frame (frame1
))->bottom
941 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
943 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
945 /* Outs become ins. */
947 frame_register (frame1
, (regnum
- O0_REGNUM
+ I0_REGNUM
),
948 optimized
, lval
, addrp
, &realnum
, raw_buffer
);
954 frame1
= get_next_frame (frame1
);
960 if (regnum
== SP_REGNUM
)
962 if (raw_buffer
!= NULL
)
964 /* Put it back in target format. */
965 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), addr
);
971 if (raw_buffer
!= NULL
)
972 read_memory (addr
, raw_buffer
, REGISTER_RAW_SIZE (regnum
));
977 *lval
= lval_register
;
978 addr
= REGISTER_BYTE (regnum
);
979 if (raw_buffer
!= NULL
)
980 deprecated_read_register_gen (regnum
, raw_buffer
);
986 /* Push an empty stack frame, and record in it the current PC, regs, etc.
988 We save the non-windowed registers and the ins. The locals and outs
989 are new; they don't need to be saved. The i's and l's of
990 the last frame were already saved on the stack. */
992 /* Definitely see tm-sparc.h for more doc of the frame format here. */
994 /* See tm-sparc.h for how this is calculated. */
996 #define DUMMY_STACK_REG_BUF_SIZE \
997 (((8+8+8) * SPARC_INTREG_SIZE) + FP_REGISTER_BYTES)
998 #define DUMMY_STACK_SIZE \
999 (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET)
1002 sparc_push_dummy_frame (void)
1004 CORE_ADDR sp
, old_sp
;
1005 char *register_temp
;
1007 register_temp
= alloca (DUMMY_STACK_SIZE
);
1009 old_sp
= sp
= read_sp ();
1011 if (GDB_TARGET_IS_SPARC64
)
1013 /* PC, NPC, CCR, FSR, FPRS, Y, ASI */
1014 deprecated_read_register_bytes (REGISTER_BYTE (PC_REGNUM
),
1016 REGISTER_RAW_SIZE (PC_REGNUM
) * 7);
1017 deprecated_read_register_bytes (REGISTER_BYTE (PSTATE_REGNUM
),
1018 ®ister_temp
[7 * SPARC_INTREG_SIZE
],
1019 REGISTER_RAW_SIZE (PSTATE_REGNUM
));
1020 /* FIXME: not sure what needs to be saved here. */
1024 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
1025 deprecated_read_register_bytes (REGISTER_BYTE (Y_REGNUM
),
1027 REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
1030 deprecated_read_register_bytes (REGISTER_BYTE (O0_REGNUM
),
1031 ®ister_temp
[8 * SPARC_INTREG_SIZE
],
1032 SPARC_INTREG_SIZE
* 8);
1034 deprecated_read_register_bytes (REGISTER_BYTE (G0_REGNUM
),
1035 ®ister_temp
[16 * SPARC_INTREG_SIZE
],
1036 SPARC_INTREG_SIZE
* 8);
1039 deprecated_read_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
1040 ®ister_temp
[24 * SPARC_INTREG_SIZE
],
1043 sp
-= DUMMY_STACK_SIZE
;
1045 DEPRECATED_DUMMY_WRITE_SP (sp
);
1047 write_memory (sp
+ DUMMY_REG_SAVE_OFFSET
, ®ister_temp
[0],
1048 DUMMY_STACK_REG_BUF_SIZE
);
1050 if (strcmp (target_shortname
, "sim") != 0)
1052 /* NOTE: cagney/2002-04-04: The code below originally contained
1053 GDB's _only_ call to write_fp(). That call was eliminated by
1054 inlining the corresponding code. For the 64 bit case, the
1055 old function (sparc64_write_fp) did the below although I'm
1056 not clear why. The same goes for why this is only done when
1057 the underlying target is a simulator. */
1058 if (GDB_TARGET_IS_SPARC64
)
1060 /* Target is a 64 bit SPARC. */
1061 CORE_ADDR oldfp
= read_register (FP_REGNUM
);
1063 write_register (FP_REGNUM
, old_sp
- 2047);
1065 write_register (FP_REGNUM
, old_sp
);
1069 /* Target is a 32 bit SPARC. */
1070 write_register (FP_REGNUM
, old_sp
);
1072 /* Set return address register for the call dummy to the current PC. */
1073 write_register (I7_REGNUM
, read_pc () - 8);
1077 /* The call dummy will write this value to FP before executing
1078 the 'save'. This ensures that register window flushes work
1079 correctly in the simulator. */
1080 write_register (G0_REGNUM
+ 1, read_register (FP_REGNUM
));
1082 /* The call dummy will write this value to FP after executing
1084 write_register (G0_REGNUM
+ 2, old_sp
);
1086 /* The call dummy will write this value to the return address (%i7) after
1087 executing the 'save'. */
1088 write_register (G0_REGNUM
+ 3, read_pc () - 8);
1090 /* Set the FP that the call dummy will be using after the 'save'.
1091 This makes backtraces from an inferior function call work properly. */
1092 write_register (FP_REGNUM
, old_sp
);
1096 /* sparc_frame_find_saved_regs (). This function is here only because
1097 pop_frame uses it. Note there is an interesting corner case which
1098 I think few ports of GDB get right--if you are popping a frame
1099 which does not save some register that *is* saved by a more inner
1100 frame (such a frame will never be a dummy frame because dummy
1101 frames save all registers).
1103 NOTE: cagney/2003-03-12: Since pop_frame has been rewritten to use
1104 frame_unwind_register() the need for this function is questionable.
1106 Stores, into an array of CORE_ADDR,
1107 the addresses of the saved registers of frame described by FRAME_INFO.
1108 This includes special registers such as pc and fp saved in special
1109 ways in the stack frame. sp is even more special:
1110 the address we return for it IS the sp for the next frame.
1112 Note that on register window machines, we are currently making the
1113 assumption that window registers are being saved somewhere in the
1114 frame in which they are being used. If they are stored in an
1115 inferior frame, find_saved_register will break.
1117 On the Sun 4, the only time all registers are saved is when
1118 a dummy frame is involved. Otherwise, the only saved registers
1119 are the LOCAL and IN registers which are saved as a result
1120 of the "save/restore" opcodes. This condition is determined
1121 by address rather than by value.
1123 The "pc" is not stored in a frame on the SPARC. (What is stored
1124 is a return address minus 8.) sparc_pop_frame knows how to
1125 deal with that. Other routines might or might not.
1127 See tm-sparc.h (PUSH_DUMMY_FRAME and friends) for CRITICAL information
1128 about how this works. */
1130 static void sparc_frame_find_saved_regs (struct frame_info
*, CORE_ADDR
*);
1133 sparc_frame_find_saved_regs (struct frame_info
*fi
, CORE_ADDR
*saved_regs_addr
)
1135 register int regnum
;
1136 CORE_ADDR frame_addr
= get_frame_base (fi
);
1138 gdb_assert (fi
!= NULL
);
1140 memset (saved_regs_addr
, 0, NUM_REGS
* sizeof (CORE_ADDR
));
1142 if (get_frame_pc (fi
) >= (get_frame_extra_info (fi
)->bottom
1143 ? get_frame_extra_info (fi
)->bottom
1145 && get_frame_pc (fi
) <= get_frame_base (fi
))
1147 /* Dummy frame. All but the window regs are in there somewhere. */
1148 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+ 7; regnum
++)
1149 saved_regs_addr
[regnum
] =
1150 frame_addr
+ (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
1151 - DUMMY_STACK_REG_BUF_SIZE
+ 16 * SPARC_INTREG_SIZE
;
1153 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; regnum
++)
1154 saved_regs_addr
[regnum
] =
1155 frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
1156 - DUMMY_STACK_REG_BUF_SIZE
+ 8 * SPARC_INTREG_SIZE
;
1159 for (regnum
= FP0_REGNUM
; regnum
< FP_MAX_REGNUM
; regnum
++)
1160 saved_regs_addr
[regnum
] = frame_addr
+ (regnum
- FP0_REGNUM
) * 4
1161 - DUMMY_STACK_REG_BUF_SIZE
+ 24 * SPARC_INTREG_SIZE
;
1163 if (GDB_TARGET_IS_SPARC64
)
1165 for (regnum
= PC_REGNUM
; regnum
< PC_REGNUM
+ 7; regnum
++)
1167 saved_regs_addr
[regnum
] =
1168 frame_addr
+ (regnum
- PC_REGNUM
) * SPARC_INTREG_SIZE
1169 - DUMMY_STACK_REG_BUF_SIZE
;
1171 saved_regs_addr
[PSTATE_REGNUM
] =
1172 frame_addr
+ 8 * SPARC_INTREG_SIZE
- DUMMY_STACK_REG_BUF_SIZE
;
1175 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
1176 saved_regs_addr
[regnum
] =
1177 frame_addr
+ (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
1178 - DUMMY_STACK_REG_BUF_SIZE
;
1180 frame_addr
= (get_frame_extra_info (fi
)->bottom
1181 ? get_frame_extra_info (fi
)->bottom
1184 else if (get_frame_extra_info (fi
)->flat
)
1186 CORE_ADDR func_start
;
1187 find_pc_partial_function (get_frame_pc (fi
), NULL
, &func_start
, NULL
);
1188 examine_prologue (func_start
, 0, fi
, saved_regs_addr
);
1190 /* Flat register window frame. */
1191 saved_regs_addr
[RP_REGNUM
] = get_frame_extra_info (fi
)->pc_addr
;
1192 saved_regs_addr
[I7_REGNUM
] = get_frame_extra_info (fi
)->fp_addr
;
1196 /* Normal frame. Just Local and In registers */
1197 frame_addr
= (get_frame_extra_info (fi
)->bottom
1198 ? get_frame_extra_info (fi
)->bottom
1200 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; regnum
++)
1201 saved_regs_addr
[regnum
] =
1202 (frame_addr
+ (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
1204 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; regnum
++)
1205 saved_regs_addr
[regnum
] =
1206 (frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
1209 if (get_next_frame (fi
))
1211 if (get_frame_extra_info (fi
)->flat
)
1213 saved_regs_addr
[O7_REGNUM
] = get_frame_extra_info (fi
)->pc_addr
;
1217 /* Pull off either the next frame pointer or the stack pointer */
1218 CORE_ADDR next_next_frame_addr
=
1219 (get_frame_extra_info (get_next_frame (fi
))->bottom
1220 ? get_frame_extra_info (get_next_frame (fi
))->bottom
1222 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 8; regnum
++)
1223 saved_regs_addr
[regnum
] =
1224 (next_next_frame_addr
1225 + (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
1229 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
1230 /* FIXME -- should this adjust for the sparc64 offset? */
1231 saved_regs_addr
[SP_REGNUM
] = get_frame_base (fi
);
1234 /* Discard from the stack the innermost frame, restoring all saved registers.
1236 Note that the values stored in fsr by
1237 deprecated_get_frame_saved_regs are *in the context of the called
1238 frame*. What this means is that the i regs of fsr must be restored
1239 into the o regs of the (calling) frame that we pop into. We don't
1240 care about the output regs of the calling frame, since unless it's
1241 a dummy frame, it won't have any output regs in it.
1243 We never have to bother with %l (local) regs, since the called routine's
1244 locals get tossed, and the calling routine's locals are already saved
1247 /* Definitely see tm-sparc.h for more doc of the frame format here. */
1250 sparc_pop_frame (void)
1252 register struct frame_info
*frame
= get_current_frame ();
1253 register CORE_ADDR pc
;
1258 fsr
= alloca (NUM_REGS
* sizeof (CORE_ADDR
));
1259 raw_buffer
= alloca (REGISTER_BYTES
);
1260 sparc_frame_find_saved_regs (frame
, &fsr
[0]);
1263 if (fsr
[FP0_REGNUM
])
1265 read_memory (fsr
[FP0_REGNUM
], raw_buffer
, FP_REGISTER_BYTES
);
1266 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
1267 raw_buffer
, FP_REGISTER_BYTES
);
1269 if (!(GDB_TARGET_IS_SPARC64
))
1271 if (fsr
[FPS_REGNUM
])
1273 read_memory (fsr
[FPS_REGNUM
], raw_buffer
, SPARC_INTREG_SIZE
);
1274 deprecated_write_register_gen (FPS_REGNUM
, raw_buffer
);
1276 if (fsr
[CPS_REGNUM
])
1278 read_memory (fsr
[CPS_REGNUM
], raw_buffer
, SPARC_INTREG_SIZE
);
1279 deprecated_write_register_gen (CPS_REGNUM
, raw_buffer
);
1285 read_memory (fsr
[G1_REGNUM
], raw_buffer
, 7 * SPARC_INTREG_SIZE
);
1286 deprecated_write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
,
1287 7 * SPARC_INTREG_SIZE
);
1290 if (get_frame_extra_info (frame
)->flat
)
1292 /* Each register might or might not have been saved, need to test
1294 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; ++regnum
)
1296 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1297 SPARC_INTREG_SIZE
));
1298 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; ++regnum
)
1300 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1301 SPARC_INTREG_SIZE
));
1303 /* Handle all outs except stack pointer (o0-o5; o7). */
1304 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 6; ++regnum
)
1306 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1307 SPARC_INTREG_SIZE
));
1308 if (fsr
[O0_REGNUM
+ 7])
1309 write_register (O0_REGNUM
+ 7,
1310 read_memory_integer (fsr
[O0_REGNUM
+ 7],
1311 SPARC_INTREG_SIZE
));
1313 DEPRECATED_DUMMY_WRITE_SP (get_frame_base (frame
));
1315 else if (fsr
[I0_REGNUM
])
1321 reg_temp
= alloca (SPARC_INTREG_SIZE
* 16);
1323 read_memory (fsr
[I0_REGNUM
], raw_buffer
, 8 * SPARC_INTREG_SIZE
);
1325 /* Get the ins and locals which we are about to restore. Just
1326 moving the stack pointer is all that is really needed, except
1327 store_inferior_registers is then going to write the ins and
1328 locals from the registers array, so we need to muck with the
1330 sp
= fsr
[SP_REGNUM
];
1332 if (GDB_TARGET_IS_SPARC64
&& (sp
& 1))
1335 read_memory (sp
, reg_temp
, SPARC_INTREG_SIZE
* 16);
1337 /* Restore the out registers.
1338 Among other things this writes the new stack pointer. */
1339 deprecated_write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
,
1340 SPARC_INTREG_SIZE
* 8);
1342 deprecated_write_register_bytes (REGISTER_BYTE (L0_REGNUM
), reg_temp
,
1343 SPARC_INTREG_SIZE
* 16);
1346 if (!(GDB_TARGET_IS_SPARC64
))
1348 write_register (PS_REGNUM
,
1349 read_memory_integer (fsr
[PS_REGNUM
],
1350 REGISTER_RAW_SIZE (PS_REGNUM
)));
1353 write_register (Y_REGNUM
,
1354 read_memory_integer (fsr
[Y_REGNUM
],
1355 REGISTER_RAW_SIZE (Y_REGNUM
)));
1358 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
1359 write_register (PC_REGNUM
,
1360 read_memory_integer (fsr
[PC_REGNUM
],
1361 REGISTER_RAW_SIZE (PC_REGNUM
)));
1362 if (fsr
[NPC_REGNUM
])
1363 write_register (NPC_REGNUM
,
1364 read_memory_integer (fsr
[NPC_REGNUM
],
1365 REGISTER_RAW_SIZE (NPC_REGNUM
)));
1367 else if (get_frame_extra_info (frame
)->flat
)
1369 if (get_frame_extra_info (frame
)->pc_addr
)
1370 pc
= PC_ADJUST ((CORE_ADDR
)
1371 read_memory_integer (get_frame_extra_info (frame
)->pc_addr
,
1372 REGISTER_RAW_SIZE (PC_REGNUM
)));
1375 /* I think this happens only in the innermost frame, if so then
1376 it is a complicated way of saying
1377 "pc = read_register (O7_REGNUM);". */
1379 frame_read_unsigned_register (frame
, O7_REGNUM
, &tmp
);
1380 pc
= PC_ADJUST (tmp
);
1383 write_register (PC_REGNUM
, pc
);
1384 write_register (NPC_REGNUM
, pc
+ 4);
1386 else if (fsr
[I7_REGNUM
])
1388 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
1389 pc
= PC_ADJUST ((CORE_ADDR
) read_memory_integer (fsr
[I7_REGNUM
],
1390 SPARC_INTREG_SIZE
));
1391 write_register (PC_REGNUM
, pc
);
1392 write_register (NPC_REGNUM
, pc
+ 4);
1394 flush_cached_frames ();
1397 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
1398 encodes the structure size being returned. If we detect such
1399 a fake insn, step past it. */
1402 sparc_pc_adjust (CORE_ADDR pc
)
1408 err
= target_read_memory (pc
+ 8, buf
, 4);
1409 insn
= extract_unsigned_integer (buf
, 4);
1410 if ((err
== 0) && (insn
& 0xffc00000) == 0)
1416 /* If pc is in a shared library trampoline, return its target.
1417 The SunOs 4.x linker rewrites the jump table entries for PIC
1418 compiled modules in the main executable to bypass the dynamic linker
1419 with jumps of the form
1422 and removes the corresponding jump table relocation entry in the
1423 dynamic relocations.
1424 find_solib_trampoline_target relies on the presence of the jump
1425 table relocation entry, so we have to detect these jump instructions
1429 sunos4_skip_trampoline_code (CORE_ADDR pc
)
1431 unsigned long insn1
;
1435 err
= target_read_memory (pc
, buf
, 4);
1436 insn1
= extract_unsigned_integer (buf
, 4);
1437 if (err
== 0 && (insn1
& 0xffc00000) == 0x03000000)
1439 unsigned long insn2
;
1441 err
= target_read_memory (pc
+ 4, buf
, 4);
1442 insn2
= extract_unsigned_integer (buf
, 4);
1443 if (err
== 0 && (insn2
& 0xffffe000) == 0x81c06000)
1445 CORE_ADDR target_pc
= (insn1
& 0x3fffff) << 10;
1446 int delta
= insn2
& 0x1fff;
1448 /* Sign extend the displacement. */
1451 return target_pc
+ delta
;
1454 return find_solib_trampoline_target (pc
);
1457 #ifdef USE_PROC_FS /* Target dependent support for /proc */
1459 /* The /proc interface divides the target machine's register set up into
1460 two different sets, the general register set (gregset) and the floating
1461 point register set (fpregset). For each set, there is an ioctl to get
1462 the current register set and another ioctl to set the current values.
1464 The actual structure passed through the ioctl interface is, of course,
1465 naturally machine dependent, and is different for each set of registers.
1466 For the sparc for example, the general register set is typically defined
1469 typedef int gregset_t[38];
1475 and the floating point set by:
1477 typedef struct prfpregset {
1480 double pr_dregs[16];
1485 u_char pr_q_entrysize;
1490 These routines provide the packing and unpacking of gregset_t and
1491 fpregset_t formatted data.
1496 /* Given a pointer to a general register set in /proc format (gregset_t *),
1497 unpack the register contents and supply them as gdb's idea of the current
1501 supply_gregset (gdb_gregset_t
*gregsetp
)
1503 prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1504 int regi
, offset
= 0;
1506 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1507 then the gregset may contain 64-bit ints while supply_register
1508 is expecting 32-bit ints. Compensate. */
1509 if (sizeof (regp
[0]) == 8 && SPARC_INTREG_SIZE
== 4)
1512 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
1513 /* FIXME MVS: assumes the order of the first 32 elements... */
1514 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
1516 supply_register (regi
, ((char *) (regp
+ regi
)) + offset
);
1519 /* These require a bit more care. */
1520 supply_register (PC_REGNUM
, ((char *) (regp
+ R_PC
)) + offset
);
1521 supply_register (NPC_REGNUM
, ((char *) (regp
+ R_nPC
)) + offset
);
1522 supply_register (Y_REGNUM
, ((char *) (regp
+ R_Y
)) + offset
);
1524 if (GDB_TARGET_IS_SPARC64
)
1527 supply_register (CCR_REGNUM
, ((char *) (regp
+ R_CCR
)) + offset
);
1529 supply_register (CCR_REGNUM
, NULL
);
1532 supply_register (FPRS_REGNUM
, ((char *) (regp
+ R_FPRS
)) + offset
);
1534 supply_register (FPRS_REGNUM
, NULL
);
1537 supply_register (ASI_REGNUM
, ((char *) (regp
+ R_ASI
)) + offset
);
1539 supply_register (ASI_REGNUM
, NULL
);
1545 supply_register (PS_REGNUM
, ((char *) (regp
+ R_PS
)) + offset
);
1547 supply_register (PS_REGNUM
, NULL
);
1550 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1551 Steal R_ASI and R_FPRS, and hope for the best! */
1553 #if !defined (R_WIM) && defined (R_ASI)
1557 #if !defined (R_TBR) && defined (R_FPRS)
1558 #define R_TBR R_FPRS
1562 supply_register (WIM_REGNUM
, ((char *) (regp
+ R_WIM
)) + offset
);
1564 supply_register (WIM_REGNUM
, NULL
);
1568 supply_register (TBR_REGNUM
, ((char *) (regp
+ R_TBR
)) + offset
);
1570 supply_register (TBR_REGNUM
, NULL
);
1574 /* Fill inaccessible registers with zero. */
1575 if (GDB_TARGET_IS_SPARC64
)
1578 * don't know how to get value of any of the following:
1580 supply_register (VER_REGNUM
, NULL
);
1581 supply_register (TICK_REGNUM
, NULL
);
1582 supply_register (PIL_REGNUM
, NULL
);
1583 supply_register (PSTATE_REGNUM
, NULL
);
1584 supply_register (TSTATE_REGNUM
, NULL
);
1585 supply_register (TBA_REGNUM
, NULL
);
1586 supply_register (TL_REGNUM
, NULL
);
1587 supply_register (TT_REGNUM
, NULL
);
1588 supply_register (TPC_REGNUM
, NULL
);
1589 supply_register (TNPC_REGNUM
, NULL
);
1590 supply_register (WSTATE_REGNUM
, NULL
);
1591 supply_register (CWP_REGNUM
, NULL
);
1592 supply_register (CANSAVE_REGNUM
, NULL
);
1593 supply_register (CANRESTORE_REGNUM
, NULL
);
1594 supply_register (CLEANWIN_REGNUM
, NULL
);
1595 supply_register (OTHERWIN_REGNUM
, NULL
);
1596 supply_register (ASR16_REGNUM
, NULL
);
1597 supply_register (ASR17_REGNUM
, NULL
);
1598 supply_register (ASR18_REGNUM
, NULL
);
1599 supply_register (ASR19_REGNUM
, NULL
);
1600 supply_register (ASR20_REGNUM
, NULL
);
1601 supply_register (ASR21_REGNUM
, NULL
);
1602 supply_register (ASR22_REGNUM
, NULL
);
1603 supply_register (ASR23_REGNUM
, NULL
);
1604 supply_register (ASR24_REGNUM
, NULL
);
1605 supply_register (ASR25_REGNUM
, NULL
);
1606 supply_register (ASR26_REGNUM
, NULL
);
1607 supply_register (ASR27_REGNUM
, NULL
);
1608 supply_register (ASR28_REGNUM
, NULL
);
1609 supply_register (ASR29_REGNUM
, NULL
);
1610 supply_register (ASR30_REGNUM
, NULL
);
1611 supply_register (ASR31_REGNUM
, NULL
);
1612 supply_register (ICC_REGNUM
, NULL
);
1613 supply_register (XCC_REGNUM
, NULL
);
1617 supply_register (CPS_REGNUM
, NULL
);
1622 fill_gregset (gdb_gregset_t
*gregsetp
, int regno
)
1624 prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1625 int regi
, offset
= 0;
1627 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1628 then the gregset may contain 64-bit ints while supply_register
1629 is expecting 32-bit ints. Compensate. */
1630 if (sizeof (regp
[0]) == 8 && SPARC_INTREG_SIZE
== 4)
1633 for (regi
= 0; regi
<= R_I7
; regi
++)
1634 if ((regno
== -1) || (regno
== regi
))
1635 deprecated_read_register_gen (regi
, (char *) (regp
+ regi
) + offset
);
1637 if ((regno
== -1) || (regno
== PC_REGNUM
))
1638 deprecated_read_register_gen (PC_REGNUM
, (char *) (regp
+ R_PC
) + offset
);
1640 if ((regno
== -1) || (regno
== NPC_REGNUM
))
1641 deprecated_read_register_gen (NPC_REGNUM
, (char *) (regp
+ R_nPC
) + offset
);
1643 if ((regno
== -1) || (regno
== Y_REGNUM
))
1644 deprecated_read_register_gen (Y_REGNUM
, (char *) (regp
+ R_Y
) + offset
);
1646 if (GDB_TARGET_IS_SPARC64
)
1649 if (regno
== -1 || regno
== CCR_REGNUM
)
1650 deprecated_read_register_gen (CCR_REGNUM
, ((char *) (regp
+ R_CCR
)) + offset
);
1653 if (regno
== -1 || regno
== FPRS_REGNUM
)
1654 deprecated_read_register_gen (FPRS_REGNUM
, ((char *) (regp
+ R_FPRS
)) + offset
);
1657 if (regno
== -1 || regno
== ASI_REGNUM
)
1658 deprecated_read_register_gen (ASI_REGNUM
, ((char *) (regp
+ R_ASI
)) + offset
);
1664 if (regno
== -1 || regno
== PS_REGNUM
)
1665 deprecated_read_register_gen (PS_REGNUM
, ((char *) (regp
+ R_PS
)) + offset
);
1668 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1669 Steal R_ASI and R_FPRS, and hope for the best! */
1671 #if !defined (R_WIM) && defined (R_ASI)
1675 #if !defined (R_TBR) && defined (R_FPRS)
1676 #define R_TBR R_FPRS
1680 if (regno
== -1 || regno
== WIM_REGNUM
)
1681 deprecated_read_register_gen (WIM_REGNUM
, ((char *) (regp
+ R_WIM
)) + offset
);
1683 if (regno
== -1 || regno
== WIM_REGNUM
)
1684 deprecated_read_register_gen (WIM_REGNUM
, NULL
);
1688 if (regno
== -1 || regno
== TBR_REGNUM
)
1689 deprecated_read_register_gen (TBR_REGNUM
, ((char *) (regp
+ R_TBR
)) + offset
);
1691 if (regno
== -1 || regno
== TBR_REGNUM
)
1692 deprecated_read_register_gen (TBR_REGNUM
, NULL
);
1697 /* Given a pointer to a floating point register set in /proc format
1698 (fpregset_t *), unpack the register contents and supply them as gdb's
1699 idea of the current floating point register values. */
1702 supply_fpregset (gdb_fpregset_t
*fpregsetp
)
1710 for (regi
= FP0_REGNUM
; regi
< FP_MAX_REGNUM
; regi
++)
1712 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
- FP0_REGNUM
];
1713 supply_register (regi
, from
);
1716 if (GDB_TARGET_IS_SPARC64
)
1719 * don't know how to get value of the following.
1721 supply_register (FSR_REGNUM
, NULL
); /* zero it out for now */
1722 supply_register (FCC0_REGNUM
, NULL
);
1723 supply_register (FCC1_REGNUM
, NULL
); /* don't know how to get value */
1724 supply_register (FCC2_REGNUM
, NULL
); /* don't know how to get value */
1725 supply_register (FCC3_REGNUM
, NULL
); /* don't know how to get value */
1729 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
1733 /* Given a pointer to a floating point register set in /proc format
1734 (fpregset_t *), update the register specified by REGNO from gdb's idea
1735 of the current floating point register set. If REGNO is -1, update
1737 /* This will probably need some changes for sparc64. */
1740 fill_fpregset (gdb_fpregset_t
*fpregsetp
, int regno
)
1749 for (regi
= FP0_REGNUM
; regi
< FP_MAX_REGNUM
; regi
++)
1751 if ((regno
== -1) || (regno
== regi
))
1753 from
= (char *) &deprecated_registers
[REGISTER_BYTE (regi
)];
1754 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
- FP0_REGNUM
];
1755 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
1759 if (!(GDB_TARGET_IS_SPARC64
)) /* FIXME: does Sparc64 have this register? */
1760 if ((regno
== -1) || (regno
== FPS_REGNUM
))
1762 from
= (char *)&deprecated_registers
[REGISTER_BYTE (FPS_REGNUM
)];
1763 to
= (char *) &fpregsetp
->pr_fsr
;
1764 memcpy (to
, from
, REGISTER_RAW_SIZE (FPS_REGNUM
));
1768 #endif /* USE_PROC_FS */
1770 /* Because of Multi-arch, GET_LONGJMP_TARGET is always defined. So test
1771 for a definition of JB_PC. */
1774 /* Figure out where the longjmp will land. We expect that we have just entered
1775 longjmp and haven't yet setup the stack frame, so the args are still in the
1776 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
1777 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
1778 This routine returns true on success */
1781 get_longjmp_target (CORE_ADDR
*pc
)
1784 #define LONGJMP_TARGET_SIZE 4
1785 char buf
[LONGJMP_TARGET_SIZE
];
1787 jb_addr
= read_register (O0_REGNUM
);
1789 if (target_read_memory (jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, buf
,
1790 LONGJMP_TARGET_SIZE
))
1793 *pc
= extract_address (buf
, LONGJMP_TARGET_SIZE
);
1797 #endif /* GET_LONGJMP_TARGET */
1799 #ifdef STATIC_TRANSFORM_NAME
1800 /* SunPRO (3.0 at least), encodes the static variables. This is not
1801 related to C++ mangling, it is done for C too. */
1804 sunpro_static_transform_name (char *name
)
1809 /* For file-local statics there will be a dollar sign, a bunch
1810 of junk (the contents of which match a string given in the
1811 N_OPT), a period and the name. For function-local statics
1812 there will be a bunch of junk (which seems to change the
1813 second character from 'A' to 'B'), a period, the name of the
1814 function, and the name. So just skip everything before the
1816 p
= strrchr (name
, '.');
1822 #endif /* STATIC_TRANSFORM_NAME */
1825 /* Utilities for printing registers.
1826 Page numbers refer to the SPARC Architecture Manual. */
1828 static void dump_ccreg (char *, int);
1831 dump_ccreg (char *reg
, int val
)
1834 printf_unfiltered ("%s:%s,%s,%s,%s", reg
,
1835 val
& 8 ? "N" : "NN",
1836 val
& 4 ? "Z" : "NZ",
1837 val
& 2 ? "O" : "NO",
1838 val
& 1 ? "C" : "NC");
1842 decode_asi (int val
)
1848 return "ASI_NUCLEUS";
1850 return "ASI_NUCLEUS_LITTLE";
1852 return "ASI_AS_IF_USER_PRIMARY";
1854 return "ASI_AS_IF_USER_SECONDARY";
1856 return "ASI_AS_IF_USER_PRIMARY_LITTLE";
1858 return "ASI_AS_IF_USER_SECONDARY_LITTLE";
1860 return "ASI_PRIMARY";
1862 return "ASI_SECONDARY";
1864 return "ASI_PRIMARY_NOFAULT";
1866 return "ASI_SECONDARY_NOFAULT";
1868 return "ASI_PRIMARY_LITTLE";
1870 return "ASI_SECONDARY_LITTLE";
1872 return "ASI_PRIMARY_NOFAULT_LITTLE";
1874 return "ASI_SECONDARY_NOFAULT_LITTLE";
1880 /* Pretty print various registers. */
1881 /* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */
1884 sparc_print_register_hook (int regno
)
1888 /* Handle double/quad versions of lower 32 fp regs. */
1889 if (regno
>= FP0_REGNUM
&& regno
< FP0_REGNUM
+ 32
1890 && (regno
& 1) == 0)
1894 if (frame_register_read (deprecated_selected_frame
, regno
, value
)
1895 && frame_register_read (deprecated_selected_frame
, regno
+ 1, value
+ 4))
1897 printf_unfiltered ("\t");
1898 print_floating (value
, builtin_type_double
, gdb_stdout
);
1900 #if 0 /* FIXME: gdb doesn't handle long doubles */
1901 if ((regno
& 3) == 0)
1903 if (frame_register_read (deprecated_selected_frame
, regno
+ 2, value
+ 8)
1904 && frame_register_read (deprecated_selected_frame
, regno
+ 3, value
+ 12))
1906 printf_unfiltered ("\t");
1907 print_floating (value
, builtin_type_long_double
, gdb_stdout
);
1914 #if 0 /* FIXME: gdb doesn't handle long doubles */
1915 /* Print upper fp regs as long double if appropriate. */
1916 if (regno
>= FP0_REGNUM
+ 32 && regno
< FP_MAX_REGNUM
1917 /* We test for even numbered regs and not a multiple of 4 because
1918 the upper fp regs are recorded as doubles. */
1919 && (regno
& 1) == 0)
1923 if (frame_register_read (deprecated_selected_frame
, regno
, value
)
1924 && frame_register_read (deprecated_selected_frame
, regno
+ 1, value
+ 8))
1926 printf_unfiltered ("\t");
1927 print_floating (value
, builtin_type_long_double
, gdb_stdout
);
1933 /* FIXME: Some of these are priviledged registers.
1934 Not sure how they should be handled. */
1936 #define BITS(n, mask) ((int) (((val) >> (n)) & (mask)))
1938 val
= read_register (regno
);
1941 if (GDB_TARGET_IS_SPARC64
)
1945 printf_unfiltered ("\t");
1946 dump_ccreg ("xcc", val
>> 4);
1947 printf_unfiltered (", ");
1948 dump_ccreg ("icc", val
& 15);
1951 printf ("\tfef:%d, du:%d, dl:%d",
1952 BITS (2, 1), BITS (1, 1), BITS (0, 1));
1956 static char *fcc
[4] =
1957 {"=", "<", ">", "?"};
1958 static char *rd
[4] =
1959 {"N", "0", "+", "-"};
1960 /* Long, but I'd rather leave it as is and use a wide screen. */
1961 printf_filtered ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ",
1962 fcc
[BITS (10, 3)], fcc
[BITS (32, 3)],
1963 fcc
[BITS (34, 3)], fcc
[BITS (36, 3)],
1964 rd
[BITS (30, 3)], BITS (23, 31));
1965 printf_filtered ("ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d",
1966 BITS (22, 1), BITS (17, 7), BITS (14, 7),
1967 BITS (13, 1), BITS (5, 31), BITS (0, 31));
1972 char *asi
= decode_asi (val
);
1974 printf ("\t%s", asi
);
1978 printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d",
1979 BITS (48, 0xffff), BITS (32, 0xffff),
1980 BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31));
1984 static char *mm
[4] =
1985 {"tso", "pso", "rso", "?"};
1986 printf_filtered ("\tcle:%d, tle:%d, mm:%s, red:%d, ",
1987 BITS (9, 1), BITS (8, 1),
1988 mm
[BITS (6, 3)], BITS (5, 1));
1989 printf_filtered ("pef:%d, am:%d, priv:%d, ie:%d, ag:%d",
1990 BITS (4, 1), BITS (3, 1), BITS (2, 1),
1991 BITS (1, 1), BITS (0, 1));
1995 /* FIXME: print all 4? */
1998 /* FIXME: print all 4? */
2001 /* FIXME: print all 4? */
2004 /* FIXME: print all 4? */
2007 printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7));
2010 printf ("\t%d", BITS (0, 31));
2012 case CANSAVE_REGNUM
:
2013 printf ("\t%-2d before spill", BITS (0, 31));
2015 case CANRESTORE_REGNUM
:
2016 printf ("\t%-2d before fill", BITS (0, 31));
2018 case CLEANWIN_REGNUM
:
2019 printf ("\t%-2d before clean", BITS (0, 31));
2021 case OTHERWIN_REGNUM
:
2022 printf ("\t%d", BITS (0, 31));
2029 printf ("\ticc:%c%c%c%c, pil:%d, s:%d, ps:%d, et:%d, cwp:%d",
2030 BITS (23, 1) ? 'N' : '-', BITS (22, 1) ? 'Z' : '-',
2031 BITS (21, 1) ? 'V' : '-', BITS (20, 1) ? 'C' : '-',
2032 BITS (8, 15), BITS (7, 1), BITS (6, 1), BITS (5, 1),
2037 static char *fcc
[4] =
2038 {"=", "<", ">", "?"};
2039 static char *rd
[4] =
2040 {"N", "0", "+", "-"};
2041 /* Long, but I'd rather leave it as is and use a wide screen. */
2042 printf ("\trd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, "
2043 "fcc:%s, aexc:%d, cexc:%d",
2044 rd
[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7),
2045 BITS (14, 7), BITS (13, 1), fcc
[BITS (10, 3)], BITS (5, 31),
2055 sparc_print_registers (struct gdbarch
*gdbarch
,
2056 struct ui_file
*file
,
2057 struct frame_info
*frame
,
2058 int regnum
, int print_all
,
2059 void (*print_register_hook
) (int))
2062 const int numregs
= NUM_REGS
+ NUM_PSEUDO_REGS
;
2063 char *raw_buffer
= alloca (MAX_REGISTER_RAW_SIZE
);
2064 char *virtual_buffer
= alloca (MAX_REGISTER_VIRTUAL_SIZE
);
2066 for (i
= 0; i
< numregs
; i
++)
2068 /* Decide between printing all regs, non-float / vector regs, or
2074 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i
)) == TYPE_CODE_FLT
)
2076 if (TYPE_VECTOR (REGISTER_VIRTUAL_TYPE (i
)))
2086 /* If the register name is empty, it is undefined for this
2087 processor, so don't display anything. */
2088 if (REGISTER_NAME (i
) == NULL
|| *(REGISTER_NAME (i
)) == '\0')
2091 fputs_filtered (REGISTER_NAME (i
), file
);
2092 print_spaces_filtered (15 - strlen (REGISTER_NAME (i
)), file
);
2094 /* Get the data in raw format. */
2095 if (! frame_register_read (frame
, i
, raw_buffer
))
2097 fprintf_filtered (file
, "*value not available*\n");
2101 /* FIXME: cagney/2002-08-03: This code shouldn't be necessary.
2102 The function frame_register_read() should have returned the
2103 pre-cooked register so no conversion is necessary. */
2104 /* Convert raw data to virtual format if necessary. */
2105 if (REGISTER_CONVERTIBLE (i
))
2107 REGISTER_CONVERT_TO_VIRTUAL (i
, REGISTER_VIRTUAL_TYPE (i
),
2108 raw_buffer
, virtual_buffer
);
2112 memcpy (virtual_buffer
, raw_buffer
,
2113 REGISTER_VIRTUAL_SIZE (i
));
2116 /* If virtual format is floating, print it that way, and in raw
2118 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i
)) == TYPE_CODE_FLT
)
2122 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2123 file
, 0, 1, 0, Val_pretty_default
);
2125 fprintf_filtered (file
, "\t(raw 0x");
2126 for (j
= 0; j
< REGISTER_RAW_SIZE (i
); j
++)
2129 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2132 idx
= REGISTER_RAW_SIZE (i
) - 1 - j
;
2133 fprintf_filtered (file
, "%02x", (unsigned char) raw_buffer
[idx
]);
2135 fprintf_filtered (file
, ")");
2139 /* Print the register in hex. */
2140 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2141 file
, 'x', 1, 0, Val_pretty_default
);
2142 /* If not a vector register, print it also according to its
2144 if (TYPE_VECTOR (REGISTER_VIRTUAL_TYPE (i
)) == 0)
2146 fprintf_filtered (file
, "\t");
2147 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2148 file
, 0, 1, 0, Val_pretty_default
);
2152 /* Some sparc specific info. */
2153 if (print_register_hook
!= NULL
)
2154 print_register_hook (i
);
2156 fprintf_filtered (file
, "\n");
2161 sparc_print_registers_info (struct gdbarch
*gdbarch
,
2162 struct ui_file
*file
,
2163 struct frame_info
*frame
,
2164 int regnum
, int print_all
)
2166 sparc_print_registers (gdbarch
, file
, frame
, regnum
, print_all
,
2167 sparc_print_register_hook
);
2171 sparc_do_registers_info (int regnum
, int all
)
2173 sparc_print_registers_info (current_gdbarch
, gdb_stdout
, deprecated_selected_frame
,
2178 sparclet_print_registers_info (struct gdbarch
*gdbarch
,
2179 struct ui_file
*file
,
2180 struct frame_info
*frame
,
2181 int regnum
, int print_all
)
2183 sparc_print_registers (gdbarch
, file
, frame
, regnum
, print_all
, NULL
);
2187 sparclet_do_registers_info (int regnum
, int all
)
2189 sparclet_print_registers_info (current_gdbarch
, gdb_stdout
,
2190 deprecated_selected_frame
, regnum
, all
);
2195 gdb_print_insn_sparc (bfd_vma memaddr
, disassemble_info
*info
)
2197 /* It's necessary to override mach again because print_insn messes it up. */
2198 info
->mach
= TARGET_ARCHITECTURE
->mach
;
2199 return print_insn_sparc (memaddr
, info
);
2202 /* The SPARC passes the arguments on the stack; arguments smaller
2203 than an int are promoted to an int. The first 6 words worth of
2204 args are also passed in registers o0 - o5. */
2207 sparc32_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2208 int struct_return
, CORE_ADDR struct_addr
)
2211 int accumulate_size
= 0;
2218 struct sparc_arg
*sparc_args
=
2219 (struct sparc_arg
*) alloca (nargs
* sizeof (struct sparc_arg
));
2220 struct sparc_arg
*m_arg
;
2222 /* Promote arguments if necessary, and calculate their stack offsets
2224 for (i
= 0, m_arg
= sparc_args
; i
< nargs
; i
++, m_arg
++)
2226 struct value
*arg
= args
[i
];
2227 struct type
*arg_type
= check_typedef (VALUE_TYPE (arg
));
2228 /* Cast argument to long if necessary as the compiler does it too. */
2229 switch (TYPE_CODE (arg_type
))
2232 case TYPE_CODE_BOOL
:
2233 case TYPE_CODE_CHAR
:
2234 case TYPE_CODE_RANGE
:
2235 case TYPE_CODE_ENUM
:
2236 if (TYPE_LENGTH (arg_type
) < TYPE_LENGTH (builtin_type_long
))
2238 arg_type
= builtin_type_long
;
2239 arg
= value_cast (arg_type
, arg
);
2245 m_arg
->len
= TYPE_LENGTH (arg_type
);
2246 m_arg
->offset
= accumulate_size
;
2247 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 3) & ~3;
2248 m_arg
->contents
= VALUE_CONTENTS (arg
);
2251 /* Make room for the arguments on the stack. */
2252 accumulate_size
+= DEPRECATED_CALL_DUMMY_STACK_ADJUST
;
2253 sp
= ((sp
- accumulate_size
) & ~7) + DEPRECATED_CALL_DUMMY_STACK_ADJUST
;
2255 /* `Push' arguments on the stack. */
2256 for (i
= 0, oregnum
= 0, m_arg
= sparc_args
;
2260 write_memory (sp
+ m_arg
->offset
, m_arg
->contents
, m_arg
->len
);
2262 j
< m_arg
->len
&& oregnum
< 6;
2263 j
+= SPARC_INTREG_SIZE
, oregnum
++)
2264 deprecated_write_register_gen (O0_REGNUM
+ oregnum
, m_arg
->contents
+ j
);
2271 /* Extract from an array REGBUF containing the (raw) register state
2272 a function return value of type TYPE, and copy that, in virtual format,
2276 sparc32_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2278 int typelen
= TYPE_LENGTH (type
);
2279 int regsize
= REGISTER_RAW_SIZE (O0_REGNUM
);
2281 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2282 memcpy (valbuf
, ®buf
[REGISTER_BYTE (FP0_REGNUM
)], typelen
);
2285 ®buf
[O0_REGNUM
* regsize
+
2287 || TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
? 0
2288 : regsize
- typelen
)],
2293 /* Write into appropriate registers a function return value
2294 of type TYPE, given in virtual format. On SPARCs with FPUs,
2295 float values are returned in %f0 (and %f1). In all other cases,
2296 values are returned in register %o0. */
2299 sparc_store_return_value (struct type
*type
, char *valbuf
)
2304 buffer
= alloca (MAX_REGISTER_RAW_SIZE
);
2306 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2307 /* Floating-point values are returned in the register pair */
2308 /* formed by %f0 and %f1 (doubles are, anyway). */
2311 /* Other values are returned in register %o0. */
2314 /* Add leading zeros to the value. */
2315 if (TYPE_LENGTH (type
) < REGISTER_RAW_SIZE (regno
))
2317 memset (buffer
, 0, REGISTER_RAW_SIZE (regno
));
2318 memcpy (buffer
+ REGISTER_RAW_SIZE (regno
) - TYPE_LENGTH (type
), valbuf
,
2319 TYPE_LENGTH (type
));
2320 deprecated_write_register_gen (regno
, buffer
);
2323 deprecated_write_register_bytes (REGISTER_BYTE (regno
), valbuf
,
2324 TYPE_LENGTH (type
));
2328 sparclet_store_return_value (struct type
*type
, char *valbuf
)
2330 /* Other values are returned in register %o0. */
2331 deprecated_write_register_bytes (REGISTER_BYTE (O0_REGNUM
), valbuf
,
2332 TYPE_LENGTH (type
));
2336 #ifndef CALL_DUMMY_CALL_OFFSET
2337 #define CALL_DUMMY_CALL_OFFSET \
2338 (gdbarch_tdep (current_gdbarch)->call_dummy_call_offset)
2339 #endif /* CALL_DUMMY_CALL_OFFSET */
2341 /* Insert the function address into a call dummy instruction sequence
2344 For structs and unions, if the function was compiled with Sun cc,
2345 it expects 'unimp' after the call. But gcc doesn't use that
2346 (twisted) convention. So leave a nop there for gcc (FIX_CALL_DUMMY
2347 can assume it is operating on a pristine CALL_DUMMY, not one that
2348 has already been customized for a different function). */
2351 sparc_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
,
2352 struct type
*value_type
, int using_gcc
)
2356 /* Store the relative adddress of the target function into the
2357 'call' instruction. */
2358 store_unsigned_integer (dummy
+ CALL_DUMMY_CALL_OFFSET
, 4,
2360 | (((fun
- (pc
+ CALL_DUMMY_CALL_OFFSET
)) >> 2)
2363 /* If the called function returns an aggregate value, fill in the UNIMP
2364 instruction containing the size of the returned aggregate return value,
2365 which follows the call instruction.
2366 For details see the SPARC Architecture Manual Version 8, Appendix D.3.
2368 Adjust the call_dummy_breakpoint_offset for the bp_call_dummy breakpoint
2369 to the proper address in the call dummy, so that `finish' after a stop
2370 in a call dummy works.
2371 Tweeking current_gdbarch is not an optimal solution, but the call to
2372 sparc_fix_call_dummy is immediately followed by a call to run_stack_dummy,
2373 which is the only function where dummy_breakpoint_offset is actually
2374 used, if it is non-zero. */
2375 if (TYPE_CODE (value_type
) == TYPE_CODE_STRUCT
2376 || TYPE_CODE (value_type
) == TYPE_CODE_UNION
)
2378 store_unsigned_integer (dummy
+ CALL_DUMMY_CALL_OFFSET
+ 8, 4,
2379 TYPE_LENGTH (value_type
) & 0x1fff);
2380 set_gdbarch_call_dummy_breakpoint_offset (current_gdbarch
, 0x30);
2383 set_gdbarch_call_dummy_breakpoint_offset (current_gdbarch
, 0x2c);
2385 if (!(GDB_TARGET_IS_SPARC64
))
2387 /* If this is not a simulator target, change the first four
2388 instructions of the call dummy to NOPs. Those instructions
2389 include a 'save' instruction and are designed to work around
2390 problems with register window flushing in the simulator. */
2392 if (strcmp (target_shortname
, "sim") != 0)
2394 for (i
= 0; i
< 4; i
++)
2395 store_unsigned_integer (dummy
+ (i
* 4), 4, 0x01000000);
2399 /* If this is a bi-endian target, GDB has written the call dummy
2400 in little-endian order. We must byte-swap it back to big-endian. */
2403 for (i
= 0; i
< CALL_DUMMY_LENGTH
; i
+= 4)
2405 char tmp
= dummy
[i
];
2406 dummy
[i
] = dummy
[i
+ 3];
2409 dummy
[i
+ 1] = dummy
[i
+ 2];
2416 /* Set target byte order based on machine type. */
2419 sparc_target_architecture_hook (const bfd_arch_info_type
*ap
)
2423 if (ap
->mach
== bfd_mach_sparc_sparclite_le
)
2425 target_byte_order
= BFD_ENDIAN_LITTLE
;
2435 * Module "constructor" function.
2438 static struct gdbarch
* sparc_gdbarch_init (struct gdbarch_info info
,
2439 struct gdbarch_list
*arches
);
2440 static void sparc_dump_tdep (struct gdbarch
*, struct ui_file
*);
2443 _initialize_sparc_tdep (void)
2445 /* Hook us into the gdbarch mechanism. */
2446 gdbarch_register (bfd_arch_sparc
, sparc_gdbarch_init
, sparc_dump_tdep
);
2448 tm_print_insn
= gdb_print_insn_sparc
;
2449 tm_print_insn_info
.mach
= TM_PRINT_INSN_MACH
; /* Selects sparc/sparclite */
2450 target_architecture_hook
= sparc_target_architecture_hook
;
2453 /* Compensate for stack bias. Note that we currently don't handle
2454 mixed 32/64 bit code. */
2457 sparc64_read_sp (void)
2459 CORE_ADDR sp
= read_register (SP_REGNUM
);
2467 sparc64_read_fp (void)
2469 CORE_ADDR fp
= read_register (FP_REGNUM
);
2477 sparc64_write_sp (CORE_ADDR val
)
2479 CORE_ADDR oldsp
= read_register (SP_REGNUM
);
2481 write_register (SP_REGNUM
, val
- 2047);
2483 write_register (SP_REGNUM
, val
);
2486 /* The SPARC 64 ABI passes floating-point arguments in FP0 to FP31,
2487 and all other arguments in O0 to O5. They are also copied onto
2488 the stack in the correct places. Apparently (empirically),
2489 structs of less than 16 bytes are passed member-by-member in
2490 separate registers, but I am unable to figure out the algorithm.
2491 Some members go in floating point regs, but I don't know which.
2493 FIXME: Handle small structs (less than 16 bytes containing floats).
2495 The counting regimen for using both integer and FP registers
2496 for argument passing is rather odd -- a single counter is used
2497 for both; this means that if the arguments alternate between
2498 int and float, we will waste every other register of both types. */
2501 sparc64_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2502 int struct_return
, CORE_ADDR struct_retaddr
)
2504 int i
, j
, register_counter
= 0;
2506 struct type
*sparc_intreg_type
=
2507 TYPE_LENGTH (builtin_type_long
) == SPARC_INTREG_SIZE
?
2508 builtin_type_long
: builtin_type_long_long
;
2510 sp
= (sp
& ~(((unsigned long) SPARC_INTREG_SIZE
) - 1UL));
2512 /* Figure out how much space we'll need. */
2513 for (i
= nargs
- 1; i
>= 0; i
--)
2515 int len
= TYPE_LENGTH (check_typedef (VALUE_TYPE (args
[i
])));
2516 struct value
*copyarg
= args
[i
];
2519 if (copylen
< SPARC_INTREG_SIZE
)
2521 copyarg
= value_cast (sparc_intreg_type
, copyarg
);
2522 copylen
= SPARC_INTREG_SIZE
;
2531 /* if STRUCT_RETURN, then first argument is the struct return location. */
2533 write_register (O0_REGNUM
+ register_counter
++, struct_retaddr
);
2535 /* Now write the arguments onto the stack, while writing FP
2536 arguments into the FP registers, and other arguments into the
2537 first six 'O' registers. */
2539 for (i
= 0; i
< nargs
; i
++)
2541 int len
= TYPE_LENGTH (check_typedef (VALUE_TYPE (args
[i
])));
2542 struct value
*copyarg
= args
[i
];
2543 enum type_code typecode
= TYPE_CODE (VALUE_TYPE (args
[i
]));
2546 if (typecode
== TYPE_CODE_INT
||
2547 typecode
== TYPE_CODE_BOOL
||
2548 typecode
== TYPE_CODE_CHAR
||
2549 typecode
== TYPE_CODE_RANGE
||
2550 typecode
== TYPE_CODE_ENUM
)
2551 if (len
< SPARC_INTREG_SIZE
)
2553 /* Small ints will all take up the size of one intreg on
2555 copyarg
= value_cast (sparc_intreg_type
, copyarg
);
2556 copylen
= SPARC_INTREG_SIZE
;
2559 write_memory (tempsp
, VALUE_CONTENTS (copyarg
), copylen
);
2562 /* Corner case: Structs consisting of a single float member are floats.
2563 * FIXME! I don't know about structs containing multiple floats!
2564 * Structs containing mixed floats and ints are even more weird.
2569 /* Separate float args from all other args. */
2570 if (typecode
== TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2572 if (register_counter
< 16)
2574 /* This arg gets copied into a FP register. */
2578 case 4: /* Single-precision (float) */
2579 fpreg
= FP0_REGNUM
+ 2 * register_counter
+ 1;
2580 register_counter
+= 1;
2582 case 8: /* Double-precision (double) */
2583 fpreg
= FP0_REGNUM
+ 2 * register_counter
;
2584 register_counter
+= 1;
2586 case 16: /* Quad-precision (long double) */
2587 fpreg
= FP0_REGNUM
+ 2 * register_counter
;
2588 register_counter
+= 2;
2591 internal_error (__FILE__
, __LINE__
, "bad switch");
2593 deprecated_write_register_bytes (REGISTER_BYTE (fpreg
),
2594 VALUE_CONTENTS (args
[i
]),
2598 else /* all other args go into the first six 'o' registers */
2601 j
< len
&& register_counter
< 6;
2602 j
+= SPARC_INTREG_SIZE
)
2604 int oreg
= O0_REGNUM
+ register_counter
;
2606 deprecated_write_register_gen (oreg
, VALUE_CONTENTS (copyarg
) + j
);
2607 register_counter
+= 1;
2614 /* Values <= 32 bytes are returned in o0-o3 (floating-point values are
2615 returned in f0-f3). */
2618 sp64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
,
2621 int typelen
= TYPE_LENGTH (type
);
2622 int regsize
= REGISTER_RAW_SIZE (O0_REGNUM
);
2624 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2626 memcpy (valbuf
, ®buf
[REGISTER_BYTE (FP0_REGNUM
)], typelen
);
2630 if (TYPE_CODE (type
) != TYPE_CODE_STRUCT
2631 || (TYPE_LENGTH (type
) > 32))
2634 ®buf
[O0_REGNUM
* regsize
+
2635 (typelen
>= regsize
? 0 : regsize
- typelen
)],
2641 char *o0
= ®buf
[O0_REGNUM
* regsize
];
2642 char *f0
= ®buf
[FP0_REGNUM
* regsize
];
2645 for (x
= 0; x
< TYPE_NFIELDS (type
); x
++)
2647 struct field
*f
= &TYPE_FIELDS (type
)[x
];
2648 /* FIXME: We may need to handle static fields here. */
2649 int whichreg
= (f
->loc
.bitpos
+ bitoffset
) / 32;
2650 int remainder
= ((f
->loc
.bitpos
+ bitoffset
) % 32) / 8;
2651 int where
= (f
->loc
.bitpos
+ bitoffset
) / 8;
2652 int size
= TYPE_LENGTH (f
->type
);
2653 int typecode
= TYPE_CODE (f
->type
);
2655 if (typecode
== TYPE_CODE_STRUCT
)
2657 sp64_extract_return_value (f
->type
,
2660 bitoffset
+ f
->loc
.bitpos
);
2662 else if (typecode
== TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2664 memcpy (valbuf
+ where
, &f0
[whichreg
* 4] + remainder
, size
);
2668 memcpy (valbuf
+ where
, &o0
[whichreg
* 4] + remainder
, size
);
2675 sparc64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2677 sp64_extract_return_value (type
, regbuf
, valbuf
, 0);
2681 sparclet_extract_return_value (struct type
*type
,
2685 regbuf
+= REGISTER_RAW_SIZE (O0_REGNUM
) * 8;
2686 if (TYPE_LENGTH (type
) < REGISTER_RAW_SIZE (O0_REGNUM
))
2687 regbuf
+= REGISTER_RAW_SIZE (O0_REGNUM
) - TYPE_LENGTH (type
);
2689 memcpy ((void *) valbuf
, regbuf
, TYPE_LENGTH (type
));
2694 sparc32_stack_align (CORE_ADDR addr
)
2696 return ((addr
+ 7) & -8);
2700 sparc64_stack_align (CORE_ADDR addr
)
2702 return ((addr
+ 15) & -16);
2706 sparc_print_extra_frame_info (struct frame_info
*fi
)
2708 if (fi
&& get_frame_extra_info (fi
) && get_frame_extra_info (fi
)->flat
)
2709 printf_filtered (" flat, pc saved at 0x%s, fp saved at 0x%s\n",
2710 paddr_nz (get_frame_extra_info (fi
)->pc_addr
),
2711 paddr_nz (get_frame_extra_info (fi
)->fp_addr
));
2714 /* MULTI_ARCH support */
2717 sparc32_register_name (int regno
)
2719 static char *register_names
[] =
2720 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2721 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2722 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2723 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2725 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2726 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2727 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2728 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2730 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr"
2734 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2737 return register_names
[regno
];
2741 sparc64_register_name (int regno
)
2743 static char *register_names
[] =
2744 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2745 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2746 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2747 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2749 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2750 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2751 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2752 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2753 "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",
2754 "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
2756 "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", "ver",
2757 "tick", "pil", "pstate", "tstate", "tba", "tl", "tt", "tpc",
2758 "tnpc", "wstate", "cwp", "cansave", "canrestore", "cleanwin", "otherwin",
2759 "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", "asr22", "asr23",
2760 "asr24", "asr25", "asr26", "asr27", "asr28", "asr29", "asr30", "asr31",
2761 /* These are here at the end to simplify removing them if we have to. */
2762 "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3"
2766 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2769 return register_names
[regno
];
2773 sparclite_register_name (int regno
)
2775 static char *register_names
[] =
2776 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2777 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2778 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2779 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2781 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2782 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2783 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2784 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2786 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr",
2787 "dia1", "dia2", "dda1", "dda2", "ddv1", "ddv2", "dcr", "dsr"
2791 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2794 return register_names
[regno
];
2798 sparclet_register_name (int regno
)
2800 static char *register_names
[] =
2801 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2802 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2803 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2804 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2806 "", "", "", "", "", "", "", "", /* no floating point registers */
2807 "", "", "", "", "", "", "", "",
2808 "", "", "", "", "", "", "", "",
2809 "", "", "", "", "", "", "", "",
2811 "y", "psr", "wim", "tbr", "pc", "npc", "", "", /* no FPSR or CPSR */
2812 "ccsr", "ccpr", "cccrcr", "ccor", "ccobr", "ccibr", "ccir", "",
2814 /* ASR15 ASR19 (don't display them) */
2815 "asr1", "", "asr17", "asr18", "", "asr20", "asr21", "asr22"
2816 /* None of the rest get displayed */
2818 "awr0", "awr1", "awr2", "awr3", "awr4", "awr5", "awr6", "awr7",
2819 "awr8", "awr9", "awr10", "awr11", "awr12", "awr13", "awr14", "awr15",
2820 "awr16", "awr17", "awr18", "awr19", "awr20", "awr21", "awr22", "awr23",
2821 "awr24", "awr25", "awr26", "awr27", "awr28", "awr29", "awr30", "awr31",
2827 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2830 return register_names
[regno
];
2834 sparc_push_return_address (CORE_ADDR pc_unused
, CORE_ADDR sp
)
2836 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2838 /* The return PC of the dummy_frame is the former 'current' PC
2839 (where we were before we made the target function call).
2840 This is saved in %i7 by push_dummy_frame.
2842 We will save the 'call dummy location' (ie. the address
2843 to which the target function will return) in %o7.
2844 This address will actually be the program's entry point.
2845 There will be a special call_dummy breakpoint there. */
2847 write_register (O7_REGNUM
,
2848 CALL_DUMMY_ADDRESS () - 8);
2854 /* Should call_function allocate stack space for a struct return? */
2857 sparc64_use_struct_convention (int gcc_p
, struct type
*type
)
2859 return (TYPE_LENGTH (type
) > 32);
2862 /* Store the address of the place in which to copy the structure the
2863 subroutine will return. This is called from call_function_by_hand.
2864 The ultimate mystery is, tho, what is the value "16"?
2866 MVS: That's the offset from where the sp is now, to where the
2867 subroutine is gonna expect to find the struct return address. */
2870 sparc32_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2875 val
= alloca (SPARC_INTREG_SIZE
);
2876 store_unsigned_integer (val
, SPARC_INTREG_SIZE
, addr
);
2877 write_memory (sp
+ (16 * SPARC_INTREG_SIZE
), val
, SPARC_INTREG_SIZE
);
2879 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2881 /* Now adjust the value of the link register, which was previously
2882 stored by push_return_address. Functions that return structs are
2883 peculiar in that they return to link register + 12, rather than
2884 link register + 8. */
2886 o7
= read_register (O7_REGNUM
);
2887 write_register (O7_REGNUM
, o7
- 4);
2892 sparc64_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2894 /* FIXME: V9 uses %o0 for this. */
2895 /* FIXME MVS: Only for small enough structs!!! */
2897 target_write_memory (sp
+ (16 * SPARC_INTREG_SIZE
),
2898 (char *) &addr
, SPARC_INTREG_SIZE
);
2900 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2902 /* Now adjust the value of the link register, which was previously
2903 stored by push_return_address. Functions that return structs are
2904 peculiar in that they return to link register + 12, rather than
2905 link register + 8. */
2907 write_register (O7_REGNUM
, read_register (O7_REGNUM
) - 4);
2912 /* Default target data type for register REGNO. */
2914 static struct type
*
2915 sparc32_register_virtual_type (int regno
)
2917 if (regno
== PC_REGNUM
||
2918 regno
== FP_REGNUM
||
2920 return builtin_type_unsigned_int
;
2922 return builtin_type_int
;
2924 return builtin_type_float
;
2925 return builtin_type_int
;
2928 static struct type
*
2929 sparc64_register_virtual_type (int regno
)
2931 if (regno
== PC_REGNUM
||
2932 regno
== FP_REGNUM
||
2934 return builtin_type_unsigned_long_long
;
2936 return builtin_type_long_long
;
2938 return builtin_type_float
;
2940 return builtin_type_double
;
2941 return builtin_type_long_long
;
2944 /* Number of bytes of storage in the actual machine representation for
2948 sparc32_register_size (int regno
)
2954 sparc64_register_size (int regno
)
2956 return (regno
< 32 ? 8 : regno
< 64 ? 4 : 8);
2959 /* Index within the `registers' buffer of the first byte of the space
2960 for register REGNO. */
2963 sparc32_register_byte (int regno
)
2969 sparc64_register_byte (int regno
)
2973 else if (regno
< 64)
2974 return 32 * 8 + (regno
- 32) * 4;
2975 else if (regno
< 80)
2976 return 32 * 8 + 32 * 4 + (regno
- 64) * 8;
2978 return 64 * 8 + (regno
- 80) * 8;
2981 /* Immediately after a function call, return the saved pc.
2982 Can't go through the frames for this because on some machines
2983 the new frame is not set up until the new function executes
2984 some instructions. */
2987 sparc_saved_pc_after_call (struct frame_info
*fi
)
2989 return sparc_pc_adjust (read_register (RP_REGNUM
));
2992 /* Convert registers between 'raw' and 'virtual' formats.
2993 They are the same on sparc, so there's nothing to do. */
2996 sparc_convert_to_virtual (int regnum
, struct type
*type
, char *from
, char *to
)
2997 { /* do nothing (should never be called) */
3001 sparc_convert_to_raw (struct type
*type
, int regnum
, char *from
, char *to
)
3002 { /* do nothing (should never be called) */
3005 /* Init saved regs: nothing to do, just a place-holder function. */
3008 sparc_frame_init_saved_regs (struct frame_info
*fi_ignored
)
3012 /* gdbarch fix call dummy:
3013 All this function does is rearrange the arguments before calling
3014 sparc_fix_call_dummy (which does the real work). */
3017 sparc_gdbarch_fix_call_dummy (char *dummy
,
3021 struct value
**args
,
3025 if (CALL_DUMMY_LOCATION
== ON_STACK
)
3026 sparc_fix_call_dummy (dummy
, pc
, fun
, type
, gcc_p
);
3029 /* CALL_DUMMY_ADDRESS: fetch the breakpoint address for a call dummy. */
3032 sparc_call_dummy_address (void)
3034 return (CALL_DUMMY_START_OFFSET
) + CALL_DUMMY_BREAKPOINT_OFFSET
;
3037 /* Supply the Y register number to those that need it. */
3040 sparc_y_regnum (void)
3042 return gdbarch_tdep (current_gdbarch
)->y_regnum
;
3046 sparc_reg_struct_has_addr (int gcc_p
, struct type
*type
)
3048 if (GDB_TARGET_IS_SPARC64
)
3049 return (TYPE_LENGTH (type
) > 32);
3051 return (gcc_p
!= 1);
3055 sparc_intreg_size (void)
3057 return SPARC_INTREG_SIZE
;
3061 sparc_return_value_on_stack (struct type
*type
)
3063 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&&
3064 TYPE_LENGTH (type
) > 8)
3071 * Gdbarch "constructor" function.
3074 #define SPARC32_CALL_DUMMY_ON_STACK
3076 #define SPARC_SP_REGNUM 14
3077 #define SPARC_FP_REGNUM 30
3078 #define SPARC_FP0_REGNUM 32
3079 #define SPARC32_NPC_REGNUM 69
3080 #define SPARC32_PC_REGNUM 68
3081 #define SPARC32_Y_REGNUM 64
3082 #define SPARC64_PC_REGNUM 80
3083 #define SPARC64_NPC_REGNUM 81
3084 #define SPARC64_Y_REGNUM 85
3086 static struct gdbarch
*
3087 sparc_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3089 struct gdbarch
*gdbarch
;
3090 struct gdbarch_tdep
*tdep
;
3092 static LONGEST call_dummy_32
[] =
3093 { 0xbc100001, 0x9de38000, 0xbc100002, 0xbe100003,
3094 0xda03a058, 0xd803a054, 0xd603a050, 0xd403a04c,
3095 0xd203a048, 0x40000000, 0xd003a044, 0x01000000,
3096 0x91d02001, 0x01000000
3098 static LONGEST call_dummy_64
[] =
3099 { 0x9de3bec0fd3fa7f7LL
, 0xf93fa7eff53fa7e7LL
,
3100 0xf13fa7dfed3fa7d7LL
, 0xe93fa7cfe53fa7c7LL
,
3101 0xe13fa7bfdd3fa7b7LL
, 0xd93fa7afd53fa7a7LL
,
3102 0xd13fa79fcd3fa797LL
, 0xc93fa78fc53fa787LL
,
3103 0xc13fa77fcc3fa777LL
, 0xc83fa76fc43fa767LL
,
3104 0xc03fa75ffc3fa757LL
, 0xf83fa74ff43fa747LL
,
3105 0xf03fa73f01000000LL
, 0x0100000001000000LL
,
3106 0x0100000091580000LL
, 0xd027a72b93500000LL
,
3107 0xd027a72791480000LL
, 0xd027a72391400000LL
,
3108 0xd027a71fda5ba8a7LL
, 0xd85ba89fd65ba897LL
,
3109 0xd45ba88fd25ba887LL
, 0x9fc02000d05ba87fLL
,
3110 0x0100000091d02001LL
, 0x0100000001000000LL
3112 static LONGEST call_dummy_nil
[] = {0};
3114 /* Try to determine the OS ABI of the object we are loading. */
3116 if (info
.abfd
!= NULL
3117 && info
.osabi
== GDB_OSABI_UNKNOWN
)
3119 /* If it's an ELF file, assume it's Solaris. */
3120 if (bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
3121 info
.osabi
= GDB_OSABI_SOLARIS
;
3124 /* First see if there is already a gdbarch that can satisfy the request. */
3125 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3127 return arches
->gdbarch
;
3129 /* None found: is the request for a sparc architecture? */
3130 if (info
.bfd_arch_info
->arch
!= bfd_arch_sparc
)
3131 return NULL
; /* No; then it's not for us. */
3133 /* Yes: create a new gdbarch for the specified machine type. */
3134 tdep
= (struct gdbarch_tdep
*) xmalloc (sizeof (struct gdbarch_tdep
));
3135 gdbarch
= gdbarch_alloc (&info
, tdep
);
3137 /* First set settings that are common for all sparc architectures. */
3138 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
3139 set_gdbarch_breakpoint_from_pc (gdbarch
, memory_breakpoint_from_pc
);
3140 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
3141 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3142 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, sparc_extract_struct_value_address
);
3143 set_gdbarch_fix_call_dummy (gdbarch
, sparc_gdbarch_fix_call_dummy
);
3144 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3145 set_gdbarch_fp_regnum (gdbarch
, SPARC_FP_REGNUM
);
3146 set_gdbarch_fp0_regnum (gdbarch
, SPARC_FP0_REGNUM
);
3147 set_gdbarch_deprecated_frame_chain (gdbarch
, sparc_frame_chain
);
3148 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sparc_frame_init_saved_regs
);
3149 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
3150 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, sparc_frame_saved_pc
);
3151 set_gdbarch_frameless_function_invocation (gdbarch
,
3152 frameless_look_for_prologue
);
3153 set_gdbarch_deprecated_get_saved_register (gdbarch
, sparc_get_saved_register
);
3154 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, sparc_init_extra_frame_info
);
3155 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3156 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3157 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
3158 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3159 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, 8);
3160 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, 8);
3161 set_gdbarch_deprecated_pop_frame (gdbarch
, sparc_pop_frame
);
3162 set_gdbarch_deprecated_push_return_address (gdbarch
, sparc_push_return_address
);
3163 set_gdbarch_deprecated_push_dummy_frame (gdbarch
, sparc_push_dummy_frame
);
3164 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
3165 set_gdbarch_register_convert_to_raw (gdbarch
, sparc_convert_to_raw
);
3166 set_gdbarch_register_convert_to_virtual (gdbarch
,
3167 sparc_convert_to_virtual
);
3168 set_gdbarch_register_convertible (gdbarch
,
3169 generic_register_convertible_not
);
3170 set_gdbarch_reg_struct_has_addr (gdbarch
, sparc_reg_struct_has_addr
);
3171 set_gdbarch_return_value_on_stack (gdbarch
, sparc_return_value_on_stack
);
3172 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, sparc_saved_pc_after_call
);
3173 set_gdbarch_prologue_frameless_p (gdbarch
, sparc_prologue_frameless_p
);
3174 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
3175 set_gdbarch_skip_prologue (gdbarch
, sparc_skip_prologue
);
3176 set_gdbarch_sp_regnum (gdbarch
, SPARC_SP_REGNUM
);
3177 set_gdbarch_deprecated_use_generic_dummy_frames (gdbarch
, 0);
3178 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
3181 * Settings that depend only on 32/64 bit word size
3184 switch (info
.bfd_arch_info
->mach
)
3186 case bfd_mach_sparc
:
3187 case bfd_mach_sparc_sparclet
:
3188 case bfd_mach_sparc_sparclite
:
3189 case bfd_mach_sparc_v8plus
:
3190 case bfd_mach_sparc_v8plusa
:
3191 case bfd_mach_sparc_sparclite_le
:
3192 /* 32-bit machine types: */
3194 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3195 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_on_stack
);
3196 set_gdbarch_call_dummy_address (gdbarch
, sparc_call_dummy_address
);
3197 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0x30);
3198 set_gdbarch_call_dummy_length (gdbarch
, 0x38);
3200 /* NOTE: cagney/2002-04-26: Based from info posted by Peter
3201 Schauer around Oct '99. Briefly, due to aspects of the SPARC
3202 ABI, it isn't possible to use ON_STACK with a strictly
3205 Peter Schauer writes ...
3207 No, any call from GDB to a user function returning a
3208 struct/union will fail miserably. Try this:
3227 for (i = 0; i < 4; i++)
3233 Set a breakpoint at the gx = sret () statement, run to it and
3234 issue a `print sret()'. It will not succed with your
3235 approach, and I doubt that continuing the program will work
3238 For details of the ABI see the Sparc Architecture Manual. I
3239 have Version 8 (Prentice Hall ISBN 0-13-825001-4) and the
3240 calling conventions for functions returning aggregate values
3241 are explained in Appendix D.3. */
3243 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
3244 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_32
);
3246 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_at_entry_point
);
3247 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_nil
);
3249 set_gdbarch_deprecated_call_dummy_stack_adjust (gdbarch
, 68);
3250 set_gdbarch_frame_args_skip (gdbarch
, 68);
3251 set_gdbarch_function_start_offset (gdbarch
, 0);
3252 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3253 set_gdbarch_npc_regnum (gdbarch
, SPARC32_NPC_REGNUM
);
3254 set_gdbarch_pc_regnum (gdbarch
, SPARC32_PC_REGNUM
);
3255 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3256 set_gdbarch_deprecated_push_arguments (gdbarch
, sparc32_push_arguments
);
3257 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
3258 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
3260 set_gdbarch_register_byte (gdbarch
, sparc32_register_byte
);
3261 set_gdbarch_register_raw_size (gdbarch
, sparc32_register_size
);
3262 set_gdbarch_register_size (gdbarch
, 4);
3263 set_gdbarch_register_virtual_size (gdbarch
, sparc32_register_size
);
3264 set_gdbarch_register_virtual_type (gdbarch
,
3265 sparc32_register_virtual_type
);
3266 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3267 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (call_dummy_32
));
3269 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
3271 set_gdbarch_stack_align (gdbarch
, sparc32_stack_align
);
3272 set_gdbarch_deprecated_extra_stack_alignment_needed (gdbarch
, 1);
3273 set_gdbarch_deprecated_store_struct_return (gdbarch
, sparc32_store_struct_return
);
3274 set_gdbarch_use_struct_convention (gdbarch
,
3275 generic_use_struct_convention
);
3276 set_gdbarch_deprecated_dummy_write_sp (gdbarch
, generic_target_write_sp
);
3277 tdep
->y_regnum
= SPARC32_Y_REGNUM
;
3278 tdep
->fp_max_regnum
= SPARC_FP0_REGNUM
+ 32;
3279 tdep
->intreg_size
= 4;
3280 tdep
->reg_save_offset
= 0x60;
3281 tdep
->call_dummy_call_offset
= 0x24;
3284 case bfd_mach_sparc_v9
:
3285 case bfd_mach_sparc_v9a
:
3286 /* 64-bit machine types: */
3287 default: /* Any new machine type is likely to be 64-bit. */
3289 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3290 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_on_stack
);
3291 set_gdbarch_call_dummy_address (gdbarch
, sparc_call_dummy_address
);
3292 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 8 * 4);
3293 set_gdbarch_call_dummy_length (gdbarch
, 192);
3294 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
3295 set_gdbarch_call_dummy_start_offset (gdbarch
, 148);
3296 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_64
);
3298 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_at_entry_point
);
3299 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_nil
);
3301 set_gdbarch_deprecated_call_dummy_stack_adjust (gdbarch
, 128);
3302 set_gdbarch_frame_args_skip (gdbarch
, 136);
3303 set_gdbarch_function_start_offset (gdbarch
, 0);
3304 set_gdbarch_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3305 set_gdbarch_npc_regnum (gdbarch
, SPARC64_NPC_REGNUM
);
3306 set_gdbarch_pc_regnum (gdbarch
, SPARC64_PC_REGNUM
);
3307 set_gdbarch_ptr_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3308 set_gdbarch_deprecated_push_arguments (gdbarch
, sparc64_push_arguments
);
3309 /* NOTE different for at_entry */
3310 set_gdbarch_read_fp (gdbarch
, sparc64_read_fp
);
3311 set_gdbarch_read_sp (gdbarch
, sparc64_read_sp
);
3312 /* Some of the registers aren't 64 bits, but it's a lot simpler just
3313 to assume they all are (since most of them are). */
3314 set_gdbarch_register_byte (gdbarch
, sparc64_register_byte
);
3315 set_gdbarch_register_raw_size (gdbarch
, sparc64_register_size
);
3316 set_gdbarch_register_size (gdbarch
, 8);
3317 set_gdbarch_register_virtual_size (gdbarch
, sparc64_register_size
);
3318 set_gdbarch_register_virtual_type (gdbarch
,
3319 sparc64_register_virtual_type
);
3320 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3321 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (call_dummy_64
));
3323 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
3325 set_gdbarch_stack_align (gdbarch
, sparc64_stack_align
);
3326 set_gdbarch_deprecated_extra_stack_alignment_needed (gdbarch
, 1);
3327 set_gdbarch_deprecated_store_struct_return (gdbarch
, sparc64_store_struct_return
);
3328 set_gdbarch_use_struct_convention (gdbarch
,
3329 sparc64_use_struct_convention
);
3330 set_gdbarch_deprecated_dummy_write_sp (gdbarch
, sparc64_write_sp
);
3331 tdep
->y_regnum
= SPARC64_Y_REGNUM
;
3332 tdep
->fp_max_regnum
= SPARC_FP0_REGNUM
+ 48;
3333 tdep
->intreg_size
= 8;
3334 tdep
->reg_save_offset
= 0x90;
3335 tdep
->call_dummy_call_offset
= 148 + 4 * 5;
3340 * Settings that vary per-architecture:
3343 switch (info
.bfd_arch_info
->mach
)
3345 case bfd_mach_sparc
:
3346 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3347 set_gdbarch_num_regs (gdbarch
, 72);
3348 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3349 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3350 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3351 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3352 tdep
->fp_register_bytes
= 32 * 4;
3353 tdep
->print_insn_mach
= bfd_mach_sparc
;
3355 case bfd_mach_sparc_sparclet
:
3356 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparclet_extract_return_value
);
3357 set_gdbarch_num_regs (gdbarch
, 32 + 32 + 8 + 8 + 8);
3358 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4 + 8*4);
3359 set_gdbarch_register_name (gdbarch
, sparclet_register_name
);
3360 set_gdbarch_deprecated_store_return_value (gdbarch
, sparclet_store_return_value
);
3361 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3362 tdep
->fp_register_bytes
= 0;
3363 tdep
->print_insn_mach
= bfd_mach_sparc_sparclet
;
3365 case bfd_mach_sparc_sparclite
:
3366 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3367 set_gdbarch_num_regs (gdbarch
, 80);
3368 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4);
3369 set_gdbarch_register_name (gdbarch
, sparclite_register_name
);
3370 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3371 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3372 tdep
->fp_register_bytes
= 0;
3373 tdep
->print_insn_mach
= bfd_mach_sparc_sparclite
;
3375 case bfd_mach_sparc_v8plus
:
3376 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3377 set_gdbarch_num_regs (gdbarch
, 72);
3378 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3379 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3380 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3381 tdep
->print_insn_mach
= bfd_mach_sparc
;
3382 tdep
->fp_register_bytes
= 32 * 4;
3383 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3385 case bfd_mach_sparc_v8plusa
:
3386 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3387 set_gdbarch_num_regs (gdbarch
, 72);
3388 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3389 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3390 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3391 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3392 tdep
->fp_register_bytes
= 32 * 4;
3393 tdep
->print_insn_mach
= bfd_mach_sparc
;
3395 case bfd_mach_sparc_sparclite_le
:
3396 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3397 set_gdbarch_num_regs (gdbarch
, 80);
3398 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4);
3399 set_gdbarch_register_name (gdbarch
, sparclite_register_name
);
3400 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3401 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3402 tdep
->fp_register_bytes
= 0;
3403 tdep
->print_insn_mach
= bfd_mach_sparc_sparclite
;
3405 case bfd_mach_sparc_v9
:
3406 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc64_extract_return_value
);
3407 set_gdbarch_num_regs (gdbarch
, 125);
3408 set_gdbarch_register_bytes (gdbarch
, 32*8 + 32*8 + 45*8);
3409 set_gdbarch_register_name (gdbarch
, sparc64_register_name
);
3410 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3411 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3412 tdep
->fp_register_bytes
= 64 * 4;
3413 tdep
->print_insn_mach
= bfd_mach_sparc_v9a
;
3415 case bfd_mach_sparc_v9a
:
3416 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc64_extract_return_value
);
3417 set_gdbarch_num_regs (gdbarch
, 125);
3418 set_gdbarch_register_bytes (gdbarch
, 32*8 + 32*8 + 45*8);
3419 set_gdbarch_register_name (gdbarch
, sparc64_register_name
);
3420 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3421 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3422 tdep
->fp_register_bytes
= 64 * 4;
3423 tdep
->print_insn_mach
= bfd_mach_sparc_v9a
;
3427 /* Hook in OS ABI-specific overrides, if they have been registered. */
3428 gdbarch_init_osabi (info
, gdbarch
);
3434 sparc_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
3436 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3441 fprintf_unfiltered (file
, "sparc_dump_tdep: has_fpu = %d\n",
3443 fprintf_unfiltered (file
, "sparc_dump_tdep: fp_register_bytes = %d\n",
3444 tdep
->fp_register_bytes
);
3445 fprintf_unfiltered (file
, "sparc_dump_tdep: y_regnum = %d\n",
3447 fprintf_unfiltered (file
, "sparc_dump_tdep: fp_max_regnum = %d\n",
3448 tdep
->fp_max_regnum
);
3449 fprintf_unfiltered (file
, "sparc_dump_tdep: intreg_size = %d\n",
3451 fprintf_unfiltered (file
, "sparc_dump_tdep: reg_save_offset = %d\n",
3452 tdep
->reg_save_offset
);
3453 fprintf_unfiltered (file
, "sparc_dump_tdep: call_dummy_call_offset = %d\n",
3454 tdep
->call_dummy_call_offset
);
3455 fprintf_unfiltered (file
, "sparc_dump_tdep: print_insn_match = %d\n",
3456 tdep
->print_insn_mach
);