1 /* Target-dependent code for SPARC.
3 Copyright 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 #include "arch-utils.h"
25 #include "floatformat.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
39 #include "gdb_assert.h"
40 #include "gdb_string.h"
42 #include "sparc-tdep.h"
46 /* This file implements the The SPARC 32-bit ABI as defined by the
47 section "Low-Level System Information" of the SPARC Compliance
48 Definition (SCD) 2.4.1, which is the 32-bit System V psABI for
49 SPARC. The SCD lists changes with respect to the origional 32-bit
50 psABI as defined in the "System V ABI, SPARC Processor
53 Note that if we talk about SunOS, we mean SunOS 4.x, which was
54 BSD-based, which is sometimes (retroactively?) referred to as
55 Solaris 1.x. If we talk about Solaris we mean Solaris 2.x and
56 above (Solaris 7, 8 and 9 are nothing but Solaris 2.7, 2.8 and 2.9
57 suffering from severe version number inflation). Solaris 2.x is
58 also known as SunOS 5.x, since that's what uname(1) says. Solaris
61 /* Please use the sparc32_-prefix for 32-bit specific code, the
62 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
63 code that can handle both. The 64-bit specific code lives in
64 sparc64-tdep.c; don't add any here. */
66 /* The SPARC Floating-Point Quad-Precision format is similar to
67 big-endian IA-64 Quad-recision format. */
68 #define floatformat_sparc_quad floatformat_ia64_quad_big
70 /* The stack pointer is offset from the stack frame by a BIAS of 2047
71 (0x7ff) for 64-bit code. BIAS is likely to be defined on SPARC
72 hosts, so undefine it first. */
76 /* Macros to extract fields from SPARC instructions. */
77 #define X_OP(i) (((i) >> 30) & 0x3)
78 #define X_RD(i) (((i) >> 25) & 0x1f)
79 #define X_A(i) (((i) >> 29) & 1)
80 #define X_COND(i) (((i) >> 25) & 0xf)
81 #define X_OP2(i) (((i) >> 22) & 0x7)
82 #define X_IMM22(i) ((i) & 0x3fffff)
83 #define X_OP3(i) (((i) >> 19) & 0x3f)
84 #define X_I(i) (((i) >> 13) & 1)
85 /* Sign extension macros. */
86 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
87 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
89 /* Fetch the instruction at PC. Instructions are always big-endian
90 even if the processor operates in little-endian mode. */
93 sparc_fetch_instruction (CORE_ADDR pc
)
99 /* If we can't read the instruction at PC, return zero. */
100 if (target_read_memory (pc
, buf
, sizeof (buf
)))
104 for (i
= 0; i
< sizeof (buf
); i
++)
105 insn
= (insn
<< 8) | buf
[i
];
109 /* Return the contents if register REGNUM as an address. */
112 sparc_address_from_register (int regnum
)
116 regcache_cooked_read_unsigned (current_regcache
, regnum
, &addr
);
121 /* The functions on this page are intended to be used to classify
122 function arguments. */
124 /* Check whether TYPE is "Integral or Pointer". */
127 sparc_integral_or_pointer_p (const struct type
*type
)
129 switch (TYPE_CODE (type
))
135 case TYPE_CODE_RANGE
:
137 /* We have byte, half-word, word and extended-word/doubleword
138 integral types. The doubleword is an extension to the
139 origional 32-bit ABI by the SCD 2.4.x. */
140 int len
= TYPE_LENGTH (type
);
141 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
147 /* Allow either 32-bit or 64-bit pointers. */
148 int len
= TYPE_LENGTH (type
);
149 return (len
== 4 || len
== 8);
159 /* Check whether TYPE is "Floating". */
162 sparc_floating_p (const struct type
*type
)
164 switch (TYPE_CODE (type
))
168 int len
= TYPE_LENGTH (type
);
169 return (len
== 4 || len
== 8 || len
== 16);
178 /* Check whether TYPE is "Structure or Union". */
181 sparc_structure_or_union_p (const struct type
*type
)
183 switch (TYPE_CODE (type
))
185 case TYPE_CODE_STRUCT
:
186 case TYPE_CODE_UNION
:
195 /* Register information. */
197 static const char *sparc32_register_names
[] =
199 "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
200 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
201 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
202 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
204 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
205 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
206 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
207 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
209 "y", "psr", "wim", "tbr", "pc", "npc", "fsr", "csr"
212 /* Total number of registers. */
213 #define SPARC32_NUM_REGS ARRAY_SIZE (sparc32_register_names)
215 /* We provide the aliases %d0..%d30 for the floating registers as
216 "psuedo" registers. */
218 static const char *sparc32_pseudo_register_names
[] =
220 "d0", "d2", "d4", "d6", "d8", "d10", "d12", "d14",
221 "d16", "d18", "d20", "d22", "d24", "d26", "d28", "d30"
224 /* Total number of pseudo registers. */
225 #define SPARC32_NUM_PSEUDO_REGS ARRAY_SIZE (sparc32_pseudo_register_names)
227 /* Return the name of register REGNUM. */
230 sparc32_register_name (int regnum
)
232 if (regnum
>= 0 && regnum
< SPARC32_NUM_REGS
)
233 return sparc32_register_names
[regnum
];
235 if (regnum
< SPARC32_NUM_REGS
+ SPARC32_NUM_PSEUDO_REGS
)
236 return sparc32_pseudo_register_names
[regnum
- SPARC32_NUM_REGS
];
241 /* Return the GDB type object for the "standard" data type of data in
245 sparc32_register_type (struct gdbarch
*gdbarch
, int regnum
)
247 if (regnum
>= SPARC_F0_REGNUM
&& regnum
<= SPARC_F31_REGNUM
)
248 return builtin_type_float
;
250 if (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
)
251 return builtin_type_double
;
253 if (regnum
== SPARC_SP_REGNUM
|| regnum
== SPARC_FP_REGNUM
)
254 return builtin_type_void_data_ptr
;
256 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== SPARC32_NPC_REGNUM
)
257 return builtin_type_void_func_ptr
;
259 return builtin_type_int32
;
263 sparc32_pseudo_register_read (struct gdbarch
*gdbarch
,
264 struct regcache
*regcache
,
265 int regnum
, void *buf
)
267 gdb_assert (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
);
269 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC32_D0_REGNUM
);
270 regcache_raw_read (regcache
, regnum
, buf
);
271 regcache_raw_read (regcache
, regnum
+ 1, ((char *)buf
) + 4);
275 sparc32_pseudo_register_write (struct gdbarch
*gdbarch
,
276 struct regcache
*regcache
,
277 int regnum
, const void *buf
)
279 gdb_assert (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
);
281 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC32_D0_REGNUM
);
282 regcache_raw_write (regcache
, regnum
, buf
);
283 regcache_raw_write (regcache
, regnum
+ 1, ((const char *)buf
) + 4);
288 sparc32_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
,
289 CORE_ADDR funcaddr
, int using_gcc
,
290 struct value
**args
, int nargs
,
291 struct type
*value_type
,
292 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
)
297 if (using_struct_return (value_type
, using_gcc
))
301 /* This is an UNIMP instruction. */
302 store_unsigned_integer (buf
, 4, TYPE_LENGTH (value_type
) & 0x1fff);
303 write_memory (sp
- 8, buf
, 4);
311 sparc32_store_arguments (struct regcache
*regcache
, int nargs
,
312 struct value
**args
, CORE_ADDR sp
,
313 int struct_return
, CORE_ADDR struct_addr
)
315 /* Number of words in the "parameter array". */
316 int num_elements
= 0;
320 for (i
= 0; i
< nargs
; i
++)
322 struct type
*type
= VALUE_TYPE (args
[i
]);
323 int len
= TYPE_LENGTH (type
);
325 if (sparc_structure_or_union_p (type
)
326 || (sparc_floating_p (type
) && len
== 16))
328 /* Structure, Union and Quad-Precision Arguments. */
331 /* Use doubleword alignment for these values. That's always
332 correct, and wasting a few bytes shouldn't be a problem. */
335 write_memory (sp
, VALUE_CONTENTS (args
[i
]), len
);
336 args
[i
] = value_from_pointer (lookup_pointer_type (type
), sp
);
339 else if (sparc_floating_p (type
))
341 /* Floating arguments. */
342 gdb_assert (len
== 4 || len
== 8);
343 num_elements
+= (len
/ 4);
347 /* Integral and pointer arguments. */
348 gdb_assert (sparc_integral_or_pointer_p (type
));
351 args
[i
] = value_cast (builtin_type_int32
, args
[i
]);
352 num_elements
+= ((len
+ 3) / 4);
356 /* Always allocate at least six words. */
357 sp
-= max (6, num_elements
) * 4;
359 /* The psABI says that "Software convention requires space for the
360 struct/union return value pointer, even if the word is unused." */
363 /* The psABI says that "Although software convention and the
364 operating system require every stack frame to be doubleword
368 for (i
= 0; i
< nargs
; i
++)
370 char *valbuf
= VALUE_CONTENTS (args
[i
]);
371 struct type
*type
= VALUE_TYPE (args
[i
]);
372 int len
= TYPE_LENGTH (type
);
374 gdb_assert (len
== 4 || len
== 8);
378 int regnum
= SPARC_O0_REGNUM
+ element
;
380 regcache_cooked_write (regcache
, regnum
, valbuf
);
381 if (len
> 4 && element
< 5)
382 regcache_cooked_write (regcache
, regnum
+ 1, valbuf
+ 4);
385 /* Always store the argument in memory. */
386 write_memory (sp
+ 4 + element
* 4, valbuf
, len
);
390 gdb_assert (element
== num_elements
);
396 store_unsigned_integer (buf
, 4, struct_addr
);
397 write_memory (sp
, buf
, 4);
404 sparc32_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
405 struct regcache
*regcache
, CORE_ADDR bp_addr
,
406 int nargs
, struct value
**args
, CORE_ADDR sp
,
407 int struct_return
, CORE_ADDR struct_addr
)
409 CORE_ADDR call_pc
= (struct_return
? (bp_addr
- 12) : (bp_addr
- 8));
411 /* Set return address. */
412 regcache_cooked_write_unsigned (regcache
, SPARC_O7_REGNUM
, call_pc
);
414 /* Set up function arguments. */
415 sp
= sparc32_store_arguments (regcache
, nargs
, args
, sp
,
416 struct_return
, struct_addr
);
418 /* Allocate the 16-word window save area. */
421 /* Stack should be doubleword aligned at this point. */
422 gdb_assert (sp
% 8 == 0);
424 /* Finally, update the stack pointer. */
425 regcache_cooked_write_unsigned (regcache
, SPARC_SP_REGNUM
, sp
);
431 /* Use the program counter to determine the contents and size of a
432 breakpoint instruction. Return a pointer to a string of bytes that
433 encode a breakpoint instruction, store the length of the string in
434 *LEN and optionally adjust *PC to point to the correct memory
435 location for inserting the breakpoint. */
437 static const unsigned char *
438 sparc_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
440 static unsigned char break_insn
[] = { 0x91, 0xd0, 0x20, 0x01 };
442 *len
= sizeof (break_insn
);
447 /* Allocate and initialize a frame cache. */
449 static struct sparc_frame_cache
*
450 sparc_alloc_frame_cache (void)
452 struct sparc_frame_cache
*cache
;
455 cache
= FRAME_OBSTACK_ZALLOC (struct sparc_frame_cache
);
461 /* Frameless until proven otherwise. */
462 cache
->frameless_p
= 1;
464 cache
->struct_return_p
= 0;
470 sparc_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
471 struct sparc_frame_cache
*cache
)
473 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
478 if (current_pc
<= pc
)
481 /* We have to handle to "Procedure Linkage Table" (PLT) special. On
482 SPARC the linker usually defines a symbol (typically
483 _PROCEDURE_LINKAGE_TABLE_) at the start of the .plt section.
484 This symbol makes us end up here with PC pointing at the start of
485 the PLT and CURRENT_PC probably pointing at a PLT entry. If we
486 would do our normal prologue analysis, we would probably conclude
487 that we've got a frame when in reality we don't, since the
488 dynamic linker patches up the first PLT with some code that
489 starts with a SAVE instruction. Patch up PC such that it points
490 at the start of our PLT entry. */
491 if (tdep
->plt_entry_size
> 0 && in_plt_section (current_pc
, NULL
))
492 pc
= current_pc
- ((current_pc
- pc
) % tdep
->plt_entry_size
);
494 insn
= sparc_fetch_instruction (pc
);
496 /* Recognize a SETHI insn and record its destination. */
497 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 0x04)
502 insn
= sparc_fetch_instruction (pc
+ 4);
505 /* Allow for an arithmetic operation on DEST or %g1. */
506 if (X_OP (insn
) == 2 && X_I (insn
)
507 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
511 insn
= sparc_fetch_instruction (pc
+ 8);
514 /* Check for the SAVE instruction that sets up the frame. */
515 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3c)
517 cache
->frameless_p
= 0;
518 return pc
+ offset
+ 4;
525 sparc_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
527 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
528 return frame_unwind_register_unsigned (next_frame
, tdep
->pc_regnum
);
531 /* Return PC of first real instruction of the function starting at
535 sparc32_skip_prologue (CORE_ADDR start_pc
)
537 struct symtab_and_line sal
;
538 CORE_ADDR func_start
, func_end
;
539 struct sparc_frame_cache cache
;
541 /* This is the preferred method, find the end of the prologue by
542 using the debugging information. */
543 if (find_pc_partial_function (start_pc
, NULL
, &func_start
, &func_end
))
545 sal
= find_pc_line (func_start
, 0);
547 if (sal
.end
< func_end
548 && start_pc
<= sal
.end
)
552 return sparc_analyze_prologue (start_pc
, 0xffffffffUL
, &cache
);
557 struct sparc_frame_cache
*
558 sparc_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
560 struct sparc_frame_cache
*cache
;
565 cache
= sparc_alloc_frame_cache ();
568 /* In priciple, for normal frames, %fp (%i6) holds the frame
569 pointer, which holds the base address for the current stack
572 cache
->base
= frame_unwind_register_unsigned (next_frame
, SPARC_FP_REGNUM
);
573 if (cache
->base
== 0)
576 cache
->pc
= frame_func_unwind (next_frame
);
579 CORE_ADDR addr_in_block
= frame_unwind_address_in_block (next_frame
);
580 sparc_analyze_prologue (cache
->pc
, addr_in_block
, cache
);
583 if (cache
->frameless_p
)
585 /* We didn't find a valid frame, which means that CACHE->base
586 currently holds the frame pointer for our calling frame. */
587 cache
->base
= frame_unwind_register_unsigned (next_frame
,
594 struct sparc_frame_cache
*
595 sparc32_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
597 struct sparc_frame_cache
*cache
;
603 cache
= sparc_frame_cache (next_frame
, this_cache
);
605 sym
= find_pc_function (cache
->pc
);
608 struct type
*type
= check_typedef (SYMBOL_TYPE (sym
));
609 enum type_code code
= TYPE_CODE (type
);
611 if (code
== TYPE_CODE_FUNC
|| code
== TYPE_CODE_METHOD
)
613 type
= check_typedef (TYPE_TARGET_TYPE (type
));
614 if (sparc_structure_or_union_p (type
)
615 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16))
616 cache
->struct_return_p
= 1;
624 sparc32_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
625 struct frame_id
*this_id
)
627 struct sparc_frame_cache
*cache
=
628 sparc32_frame_cache (next_frame
, this_cache
);
630 /* This marks the outermost frame. */
631 if (cache
->base
== 0)
634 (*this_id
) = frame_id_build (cache
->base
, cache
->pc
);
638 sparc32_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
639 int regnum
, int *optimizedp
,
640 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
641 int *realnump
, void *valuep
)
643 struct sparc_frame_cache
*cache
=
644 sparc32_frame_cache (next_frame
, this_cache
);
646 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== SPARC32_NPC_REGNUM
)
654 CORE_ADDR pc
= (regnum
== SPARC32_NPC_REGNUM
) ? 4 : 0;
656 /* If this functions has a Structure, Union or
657 Quad-Precision return value, we have to skip the UNIMP
658 instruction that encodes the size of the structure. */
659 if (cache
->struct_return_p
)
662 regnum
= cache
->frameless_p
? SPARC_O7_REGNUM
: SPARC_I7_REGNUM
;
663 pc
+= frame_unwind_register_unsigned (next_frame
, regnum
) + 8;
664 store_unsigned_integer (valuep
, 4, pc
);
669 /* The previous frame's `local' and `in' registers have been saved
670 in the register save area. */
671 if (!cache
->frameless_p
672 && regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
)
675 *lvalp
= lval_memory
;
676 *addrp
= cache
->base
+ (regnum
- SPARC_L0_REGNUM
) * 4;
680 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
682 /* Read the value in from memory. */
683 read_memory (*addrp
, valuep
, register_size (gdbarch
, regnum
));
688 /* The previous frame's `out' registers are accessable as the
689 current frame's `in' registers. */
690 if (!cache
->frameless_p
691 && regnum
>= SPARC_O0_REGNUM
&& regnum
<= SPARC_O7_REGNUM
)
692 regnum
+= (SPARC_I0_REGNUM
- SPARC_O0_REGNUM
);
694 frame_register_unwind (next_frame
, regnum
,
695 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
698 static const struct frame_unwind sparc32_frame_unwind
=
701 sparc32_frame_this_id
,
702 sparc32_frame_prev_register
705 static const struct frame_unwind
*
706 sparc32_frame_sniffer (struct frame_info
*next_frame
)
708 return &sparc32_frame_unwind
;
713 sparc32_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
715 struct sparc_frame_cache
*cache
=
716 sparc32_frame_cache (next_frame
, this_cache
);
721 static const struct frame_base sparc32_frame_base
=
723 &sparc32_frame_unwind
,
724 sparc32_frame_base_address
,
725 sparc32_frame_base_address
,
726 sparc32_frame_base_address
729 static struct frame_id
730 sparc_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
734 sp
= frame_unwind_register_unsigned (next_frame
, SPARC_SP_REGNUM
);
735 return frame_id_build (sp
, frame_pc_unwind (next_frame
));
739 /* Extract from an array REGBUF containing the (raw) register state, a
740 function return value of TYPE, and copy that into VALBUF. */
743 sparc32_extract_return_value (struct type
*type
, struct regcache
*regcache
,
746 int len
= TYPE_LENGTH (type
);
749 gdb_assert (!sparc_structure_or_union_p (type
));
750 gdb_assert (!(sparc_floating_p (type
) && len
== 16));
752 if (sparc_floating_p (type
))
754 /* Floating return values. */
755 regcache_cooked_read (regcache
, SPARC_F0_REGNUM
, buf
);
757 regcache_cooked_read (regcache
, SPARC_F1_REGNUM
, buf
+ 4);
758 memcpy (valbuf
, buf
, len
);
762 /* Integral and pointer return values. */
763 gdb_assert (sparc_integral_or_pointer_p (type
));
765 regcache_cooked_read (regcache
, SPARC_O0_REGNUM
, buf
);
768 regcache_cooked_read (regcache
, SPARC_O1_REGNUM
, buf
+ 4);
769 gdb_assert (len
== 8);
770 memcpy (valbuf
, buf
, 8);
774 /* Just stripping off any unused bytes should preserve the
775 signed-ness just fine. */
776 memcpy (valbuf
, buf
+ 4 - len
, len
);
781 /* Write into the appropriate registers a function return value stored
782 in VALBUF of type TYPE. */
785 sparc32_store_return_value (struct type
*type
, struct regcache
*regcache
,
788 int len
= TYPE_LENGTH (type
);
791 gdb_assert (!sparc_structure_or_union_p (type
));
792 gdb_assert (!(sparc_floating_p (type
) && len
== 16));
794 if (sparc_floating_p (type
))
796 /* Floating return values. */
797 memcpy (buf
, valbuf
, len
);
798 regcache_cooked_write (regcache
, SPARC_F0_REGNUM
, buf
);
800 regcache_cooked_write (regcache
, SPARC_F1_REGNUM
, buf
+ 4);
804 /* Integral and pointer return values. */
805 gdb_assert (sparc_integral_or_pointer_p (type
));
809 gdb_assert (len
== 8);
810 memcpy (buf
, valbuf
, 8);
811 regcache_cooked_write (regcache
, SPARC_O1_REGNUM
, buf
+ 4);
815 /* ??? Do we need to do any sign-extension here? */
816 memcpy (buf
+ 4 - len
, valbuf
, len
);
818 regcache_cooked_write (regcache
, SPARC_O0_REGNUM
, buf
);
822 static enum return_value_convention
823 sparc32_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
824 struct regcache
*regcache
, void *readbuf
,
825 const void *writebuf
)
827 if (sparc_structure_or_union_p (type
)
828 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16))
829 return RETURN_VALUE_STRUCT_CONVENTION
;
832 sparc32_extract_return_value (type
, regcache
, readbuf
);
834 sparc32_store_return_value (type
, regcache
, writebuf
);
836 return RETURN_VALUE_REGISTER_CONVENTION
;
840 /* NOTE: cagney/2004-01-17: For the moment disable this method. The
841 architecture and CORE-gdb will need new code (and a replacement for
842 DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS) before this can be made to
843 work robustly. Here is a possible function signature: */
844 /* NOTE: cagney/2004-01-17: So far only the 32-bit SPARC ABI has been
845 identifed as having a way to robustly recover the address of a
846 struct-convention return-value (after the function has returned).
847 For all other ABIs so far examined, the calling convention makes no
848 guarenteed that the register containing the return-value will be
849 preserved and hence that the return-value's address can be
851 /* Extract from REGCACHE, which contains the (raw) register state, the
852 address in which a function should return its structure value, as a
856 sparc32_extract_struct_value_address (struct regcache
*regcache
)
860 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
861 return read_memory_unsigned_integer (sp
+ 64, 4);
866 sparc32_stabs_argument_has_addr (struct gdbarch
*gdbarch
, struct type
*type
)
868 return (sparc_structure_or_union_p (type
)
869 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16));
873 /* The SPARC Architecture doesn't have hardware single-step support,
874 and most operating systems don't implement it either, so we provide
875 software single-step mechanism. */
878 sparc_analyze_control_transfer (CORE_ADDR pc
, CORE_ADDR
*npc
)
880 unsigned long insn
= sparc_fetch_instruction (pc
);
881 int conditional_p
= X_COND (insn
) & 0x7;
883 long offset
= 0; /* Must be signed for sign-extend. */
885 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 3 && (insn
& 0x1000000) == 0)
887 /* Branch on Integer Register with Prediction (BPr). */
891 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 6)
893 /* Branch on Floating-Point Condition Codes (FBfcc). */
895 offset
= 4 * X_DISP22 (insn
);
897 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 5)
899 /* Branch on Floating-Point Condition Codes with Prediction
902 offset
= 4 * X_DISP19 (insn
);
904 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 2)
906 /* Branch on Integer Condition Codes (Bicc). */
908 offset
= 4 * X_DISP22 (insn
);
910 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 1)
912 /* Branch on Integer Condition Codes with Prediction (BPcc). */
914 offset
= 4 * X_DISP19 (insn
);
917 /* FIXME: Handle DONE and RETRY instructions. */
919 /* FIXME: Handle the Trap instruction. */
925 /* For conditional branches, return nPC + 4 iff the annul
927 return (X_A (insn
) ? *npc
+ 4 : 0);
931 /* For unconditional branches, return the target if its
932 specified condition is "always" and return nPC + 4 if the
933 condition is "never". If the annul bit is 1, set *NPC to
935 if (X_COND (insn
) == 0x0)
936 pc
= *npc
, offset
= 4;
940 gdb_assert (offset
!= 0);
949 sparc_software_single_step (enum target_signal sig
, int insert_breakpoints_p
)
951 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
952 static CORE_ADDR npc
, nnpc
;
953 static char npc_save
[4], nnpc_save
[4];
955 if (insert_breakpoints_p
)
959 pc
= sparc_address_from_register (tdep
->pc_regnum
);
960 npc
= sparc_address_from_register (tdep
->npc_regnum
);
962 /* Analyze the instruction at PC. */
963 nnpc
= sparc_analyze_control_transfer (pc
, &npc
);
965 target_insert_breakpoint (npc
, npc_save
);
967 target_insert_breakpoint (nnpc
, nnpc_save
);
969 /* Assert that we have set at least one breakpoint, and that
970 they're not set at the same spot. */
971 gdb_assert (npc
!= 0 || nnpc
!= 0);
972 gdb_assert (nnpc
!= npc
);
977 target_remove_breakpoint (npc
, npc_save
);
979 target_remove_breakpoint (nnpc
, nnpc_save
);
984 sparc_write_pc (CORE_ADDR pc
, ptid_t ptid
)
986 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
988 write_register_pid (tdep
->pc_regnum
, pc
, ptid
);
989 write_register_pid (tdep
->npc_regnum
, pc
+ 4, ptid
);
992 /* Unglobalize NAME. */
995 sparc_stabs_unglobalize_name (char *name
)
997 /* The Sun compilers (Sun ONE Studio, Forte Developer, Sun WorkShop,
998 SunPRO) convert file static variables into global values, a
999 process known as globalization. In order to do this, the
1000 compiler will create a unique prefix and prepend it to each file
1001 static variable. For static variables within a function, this
1002 globalization prefix is followed by the function name (nested
1003 static variables within a function are supposed to generate a
1004 warning message, and are left alone). The procedure is
1005 documented in the Stabs Interface Manual, which is distrubuted
1006 with the compilers, although version 4.0 of the manual seems to
1007 be incorrect in some places, at least for SPARC. The
1008 globalization prefix is encoded into an N_OPT stab, with the form
1009 "G=<prefix>". The globalization prefix always seems to start
1010 with a dollar sign '$'; a dot '.' is used as a seperator. So we
1011 simply strip everything up until the last dot. */
1015 char *p
= strrchr (name
, '.');
1024 /* Return the appropriate register set for the core section identified
1025 by SECT_NAME and SECT_SIZE. */
1027 const struct regset
*
1028 sparc_regset_from_core_section (struct gdbarch
*gdbarch
,
1029 const char *sect_name
, size_t sect_size
)
1031 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1033 if (strcmp (sect_name
, ".reg") == 0 && sect_size
>= tdep
->sizeof_gregset
)
1034 return tdep
->gregset
;
1036 if (strcmp (sect_name
, ".reg2") == 0 && sect_size
>= tdep
->sizeof_fpregset
)
1037 return tdep
->fpregset
;
1043 static struct gdbarch
*
1044 sparc32_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1046 struct gdbarch_tdep
*tdep
;
1047 struct gdbarch
*gdbarch
;
1049 /* If there is already a candidate, use it. */
1050 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1052 return arches
->gdbarch
;
1054 /* Allocate space for the new architecture. */
1055 tdep
= XMALLOC (struct gdbarch_tdep
);
1056 gdbarch
= gdbarch_alloc (&info
, tdep
);
1058 tdep
->pc_regnum
= SPARC32_PC_REGNUM
;
1059 tdep
->npc_regnum
= SPARC32_NPC_REGNUM
;
1060 tdep
->gregset
= NULL
;
1061 tdep
->sizeof_gregset
= 0;
1062 tdep
->fpregset
= NULL
;
1063 tdep
->sizeof_fpregset
= 0;
1064 tdep
->plt_entry_size
= 0;
1066 set_gdbarch_long_double_bit (gdbarch
, 128);
1067 set_gdbarch_long_double_format (gdbarch
, &floatformat_sparc_quad
);
1069 set_gdbarch_num_regs (gdbarch
, SPARC32_NUM_REGS
);
1070 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
1071 set_gdbarch_register_type (gdbarch
, sparc32_register_type
);
1072 set_gdbarch_num_pseudo_regs (gdbarch
, SPARC32_NUM_PSEUDO_REGS
);
1073 set_gdbarch_pseudo_register_read (gdbarch
, sparc32_pseudo_register_read
);
1074 set_gdbarch_pseudo_register_write (gdbarch
, sparc32_pseudo_register_write
);
1076 /* Register numbers of various important registers. */
1077 set_gdbarch_sp_regnum (gdbarch
, SPARC_SP_REGNUM
); /* %sp */
1078 set_gdbarch_pc_regnum (gdbarch
, SPARC32_PC_REGNUM
); /* %pc */
1079 set_gdbarch_fp0_regnum (gdbarch
, SPARC_F0_REGNUM
); /* %f0 */
1081 /* Call dummy code. */
1082 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
1083 set_gdbarch_push_dummy_code (gdbarch
, sparc32_push_dummy_code
);
1084 set_gdbarch_push_dummy_call (gdbarch
, sparc32_push_dummy_call
);
1086 set_gdbarch_return_value (gdbarch
, sparc32_return_value
);
1087 set_gdbarch_stabs_argument_has_addr
1088 (gdbarch
, sparc32_stabs_argument_has_addr
);
1090 set_gdbarch_skip_prologue (gdbarch
, sparc32_skip_prologue
);
1092 /* Stack grows downward. */
1093 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1095 set_gdbarch_breakpoint_from_pc (gdbarch
, sparc_breakpoint_from_pc
);
1097 set_gdbarch_frame_args_skip (gdbarch
, 8);
1099 set_gdbarch_print_insn (gdbarch
, print_insn_sparc
);
1101 set_gdbarch_software_single_step (gdbarch
, sparc_software_single_step
);
1102 set_gdbarch_write_pc (gdbarch
, sparc_write_pc
);
1104 set_gdbarch_unwind_dummy_id (gdbarch
, sparc_unwind_dummy_id
);
1106 set_gdbarch_unwind_pc (gdbarch
, sparc_unwind_pc
);
1108 frame_base_set_default (gdbarch
, &sparc32_frame_base
);
1110 /* Hook in ABI-specific overrides, if they have been registered. */
1111 gdbarch_init_osabi (info
, gdbarch
);
1113 frame_unwind_append_sniffer (gdbarch
, sparc32_frame_sniffer
);
1115 /* If we have register sets, enable the generic core file support. */
1117 set_gdbarch_regset_from_core_section (gdbarch
,
1118 sparc_regset_from_core_section
);
1123 /* Helper functions for dealing with register windows. */
1126 sparc_supply_rwindow (struct regcache
*regcache
, CORE_ADDR sp
, int regnum
)
1134 /* Registers are 64-bit. */
1137 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1139 if (regnum
== i
|| regnum
== -1)
1141 target_read_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 8), buf
, 8);
1142 regcache_raw_supply (regcache
, i
, buf
);
1148 /* Registers are 32-bit. Toss any sign-extension of the stack
1152 /* Clear out the top half of the temporary buffer, and put the
1153 register value in the bottom half if we're in 64-bit mode. */
1154 if (gdbarch_ptr_bit (current_gdbarch
) == 64)
1160 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1162 if (regnum
== i
|| regnum
== -1)
1164 target_read_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 4),
1166 regcache_raw_supply (regcache
, i
, buf
);
1173 sparc_collect_rwindow (const struct regcache
*regcache
,
1174 CORE_ADDR sp
, int regnum
)
1182 /* Registers are 64-bit. */
1185 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1187 if (regnum
== -1 || regnum
== SPARC_SP_REGNUM
|| regnum
== i
)
1189 regcache_raw_collect (regcache
, i
, buf
);
1190 target_write_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 8), buf
, 8);
1196 /* Registers are 32-bit. Toss any sign-extension of the stack
1200 /* Only use the bottom half if we're in 64-bit mode. */
1201 if (gdbarch_ptr_bit (current_gdbarch
) == 64)
1204 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1206 if (regnum
== -1 || regnum
== SPARC_SP_REGNUM
|| regnum
== i
)
1208 regcache_raw_collect (regcache
, i
, buf
);
1209 target_write_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 4),
1216 /* Helper functions for dealing with register sets. */
1219 sparc32_supply_gregset (const struct sparc_gregset
*gregset
,
1220 struct regcache
*regcache
,
1221 int regnum
, const void *gregs
)
1223 const char *regs
= gregs
;
1226 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1227 regcache_raw_supply (regcache
, SPARC32_PSR_REGNUM
,
1228 regs
+ gregset
->r_psr_offset
);
1230 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1231 regcache_raw_supply (regcache
, SPARC32_PC_REGNUM
,
1232 regs
+ gregset
->r_pc_offset
);
1234 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1235 regcache_raw_supply (regcache
, SPARC32_NPC_REGNUM
,
1236 regs
+ gregset
->r_npc_offset
);
1238 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1239 regcache_raw_supply (regcache
, SPARC32_Y_REGNUM
,
1240 regs
+ gregset
->r_y_offset
);
1242 if (regnum
== SPARC_G0_REGNUM
|| regnum
== -1)
1243 regcache_raw_supply (regcache
, SPARC_G0_REGNUM
, NULL
);
1245 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1247 int offset
= gregset
->r_g1_offset
;
1249 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1251 if (regnum
== i
|| regnum
== -1)
1252 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1257 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1259 /* Not all of the register set variants include Locals and
1260 Inputs. For those that don't, we read them off the stack. */
1261 if (gregset
->r_l0_offset
== -1)
1265 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
1266 sparc_supply_rwindow (regcache
, sp
, regnum
);
1270 int offset
= gregset
->r_l0_offset
;
1272 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1274 if (regnum
== i
|| regnum
== -1)
1275 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1283 sparc32_collect_gregset (const struct sparc_gregset
*gregset
,
1284 const struct regcache
*regcache
,
1285 int regnum
, void *gregs
)
1290 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1291 regcache_raw_collect (regcache
, SPARC32_PSR_REGNUM
,
1292 regs
+ gregset
->r_psr_offset
);
1294 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1295 regcache_raw_collect (regcache
, SPARC32_PC_REGNUM
,
1296 regs
+ gregset
->r_pc_offset
);
1298 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1299 regcache_raw_collect (regcache
, SPARC32_NPC_REGNUM
,
1300 regs
+ gregset
->r_npc_offset
);
1302 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1303 regcache_raw_collect (regcache
, SPARC32_Y_REGNUM
,
1304 regs
+ gregset
->r_y_offset
);
1306 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1308 int offset
= gregset
->r_g1_offset
;
1310 /* %g0 is always zero. */
1311 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1313 if (regnum
== i
|| regnum
== -1)
1314 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1319 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1321 /* Not all of the register set variants include Locals and
1322 Inputs. For those that don't, we read them off the stack. */
1323 if (gregset
->r_l0_offset
!= -1)
1325 int offset
= gregset
->r_l0_offset
;
1327 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1329 if (regnum
== i
|| regnum
== -1)
1330 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1338 sparc32_supply_fpregset (struct regcache
*regcache
,
1339 int regnum
, const void *fpregs
)
1341 const char *regs
= fpregs
;
1344 for (i
= 0; i
< 32; i
++)
1346 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1347 regcache_raw_supply (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1350 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1351 regcache_raw_supply (regcache
, SPARC32_FSR_REGNUM
, regs
+ (32 * 4) + 4);
1355 sparc32_collect_fpregset (const struct regcache
*regcache
,
1356 int regnum
, void *fpregs
)
1358 char *regs
= fpregs
;
1361 for (i
= 0; i
< 32; i
++)
1363 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1364 regcache_raw_collect (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1367 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1368 regcache_raw_collect (regcache
, SPARC32_FSR_REGNUM
, regs
+ (32 * 4) + 4);
1374 /* From <machine/reg.h>. */
1375 const struct sparc_gregset sparc32_sunos4_gregset
=
1388 /* Provide a prototype to silence -Wmissing-prototypes. */
1389 void _initialize_sparc_tdep (void);
1392 _initialize_sparc_tdep (void)
1394 register_gdbarch_init (bfd_arch_sparc
, sparc32_gdbarch_init
);