1 /* SPU target-dependent code for GDB, the GNU debugger.
2 Copyright (C) 2006-2013 Free Software Foundation, Inc.
4 Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
5 Based on a port by Sid Manning <sid@us.ibm.com>.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
30 #include "frame-unwind.h"
31 #include "frame-base.h"
32 #include "trad-frame.h"
41 #include "reggroups.h"
42 #include "floatformat.h"
47 #include "exceptions.h"
51 /* The list of available "set spu " and "show spu " commands. */
52 static struct cmd_list_element
*setspucmdlist
= NULL
;
53 static struct cmd_list_element
*showspucmdlist
= NULL
;
55 /* Whether to stop for new SPE contexts. */
56 static int spu_stop_on_load_p
= 0;
57 /* Whether to automatically flush the SW-managed cache. */
58 static int spu_auto_flush_cache_p
= 1;
61 /* The tdep structure. */
64 /* The spufs ID identifying our address space. */
67 /* SPU-specific vector type. */
68 struct type
*spu_builtin_type_vec128
;
72 /* SPU-specific vector type. */
74 spu_builtin_type_vec128 (struct gdbarch
*gdbarch
)
76 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
78 if (!tdep
->spu_builtin_type_vec128
)
80 const struct builtin_type
*bt
= builtin_type (gdbarch
);
83 t
= arch_composite_type (gdbarch
,
84 "__spu_builtin_type_vec128", TYPE_CODE_UNION
);
85 append_composite_type_field (t
, "uint128", bt
->builtin_int128
);
86 append_composite_type_field (t
, "v2_int64",
87 init_vector_type (bt
->builtin_int64
, 2));
88 append_composite_type_field (t
, "v4_int32",
89 init_vector_type (bt
->builtin_int32
, 4));
90 append_composite_type_field (t
, "v8_int16",
91 init_vector_type (bt
->builtin_int16
, 8));
92 append_composite_type_field (t
, "v16_int8",
93 init_vector_type (bt
->builtin_int8
, 16));
94 append_composite_type_field (t
, "v2_double",
95 init_vector_type (bt
->builtin_double
, 2));
96 append_composite_type_field (t
, "v4_float",
97 init_vector_type (bt
->builtin_float
, 4));
100 TYPE_NAME (t
) = "spu_builtin_type_vec128";
102 tdep
->spu_builtin_type_vec128
= t
;
105 return tdep
->spu_builtin_type_vec128
;
109 /* The list of available "info spu " commands. */
110 static struct cmd_list_element
*infospucmdlist
= NULL
;
115 spu_register_name (struct gdbarch
*gdbarch
, int reg_nr
)
117 static char *register_names
[] =
119 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
120 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
121 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
122 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
123 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
124 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
125 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
126 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
127 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
128 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
129 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
130 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
131 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
132 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
133 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
134 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
135 "id", "pc", "sp", "fpscr", "srr0", "lslr", "decr", "decr_status"
140 if (reg_nr
>= sizeof register_names
/ sizeof *register_names
)
143 return register_names
[reg_nr
];
147 spu_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
149 if (reg_nr
< SPU_NUM_GPRS
)
150 return spu_builtin_type_vec128 (gdbarch
);
155 return builtin_type (gdbarch
)->builtin_uint32
;
158 return builtin_type (gdbarch
)->builtin_func_ptr
;
161 return builtin_type (gdbarch
)->builtin_data_ptr
;
163 case SPU_FPSCR_REGNUM
:
164 return builtin_type (gdbarch
)->builtin_uint128
;
166 case SPU_SRR0_REGNUM
:
167 return builtin_type (gdbarch
)->builtin_uint32
;
169 case SPU_LSLR_REGNUM
:
170 return builtin_type (gdbarch
)->builtin_uint32
;
172 case SPU_DECR_REGNUM
:
173 return builtin_type (gdbarch
)->builtin_uint32
;
175 case SPU_DECR_STATUS_REGNUM
:
176 return builtin_type (gdbarch
)->builtin_uint32
;
179 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
183 /* Pseudo registers for preferred slots - stack pointer. */
185 static enum register_status
186 spu_pseudo_register_read_spu (struct regcache
*regcache
, const char *regname
,
189 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
190 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
191 enum register_status status
;
196 status
= regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
197 if (status
!= REG_VALID
)
199 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
200 memset (reg
, 0, sizeof reg
);
201 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
204 store_unsigned_integer (buf
, 4, byte_order
, strtoulst (reg
, NULL
, 16));
208 static enum register_status
209 spu_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
210 int regnum
, gdb_byte
*buf
)
215 enum register_status status
;
220 status
= regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
221 if (status
!= REG_VALID
)
223 memcpy (buf
, reg
, 4);
226 case SPU_FPSCR_REGNUM
:
227 status
= regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
228 if (status
!= REG_VALID
)
230 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
231 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
234 case SPU_SRR0_REGNUM
:
235 return spu_pseudo_register_read_spu (regcache
, "srr0", buf
);
237 case SPU_LSLR_REGNUM
:
238 return spu_pseudo_register_read_spu (regcache
, "lslr", buf
);
240 case SPU_DECR_REGNUM
:
241 return spu_pseudo_register_read_spu (regcache
, "decr", buf
);
243 case SPU_DECR_STATUS_REGNUM
:
244 return spu_pseudo_register_read_spu (regcache
, "decr_status", buf
);
247 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
252 spu_pseudo_register_write_spu (struct regcache
*regcache
, const char *regname
,
255 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
256 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
261 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
262 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
263 xsnprintf (reg
, sizeof reg
, "0x%s",
264 phex_nz (extract_unsigned_integer (buf
, 4, byte_order
), 4));
265 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
,
266 reg
, 0, strlen (reg
));
270 spu_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
271 int regnum
, const gdb_byte
*buf
)
280 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
281 memcpy (reg
, buf
, 4);
282 regcache_raw_write (regcache
, SPU_RAW_SP_REGNUM
, reg
);
285 case SPU_FPSCR_REGNUM
:
286 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
287 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
288 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
291 case SPU_SRR0_REGNUM
:
292 spu_pseudo_register_write_spu (regcache
, "srr0", buf
);
295 case SPU_LSLR_REGNUM
:
296 spu_pseudo_register_write_spu (regcache
, "lslr", buf
);
299 case SPU_DECR_REGNUM
:
300 spu_pseudo_register_write_spu (regcache
, "decr", buf
);
303 case SPU_DECR_STATUS_REGNUM
:
304 spu_pseudo_register_write_spu (regcache
, "decr_status", buf
);
308 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
312 /* Value conversion -- access scalar values at the preferred slot. */
314 static struct value
*
315 spu_value_from_register (struct type
*type
, int regnum
,
316 struct frame_info
*frame
)
318 struct value
*value
= default_value_from_register (type
, regnum
, frame
);
319 int len
= TYPE_LENGTH (type
);
321 if (regnum
< SPU_NUM_GPRS
&& len
< 16)
323 int preferred_slot
= len
< 4 ? 4 - len
: 0;
324 set_value_offset (value
, preferred_slot
);
330 /* Register groups. */
333 spu_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
334 struct reggroup
*group
)
336 /* Registers displayed via 'info regs'. */
337 if (group
== general_reggroup
)
340 /* Registers displayed via 'info float'. */
341 if (group
== float_reggroup
)
344 /* Registers that need to be saved/restored in order to
345 push or pop frames. */
346 if (group
== save_reggroup
|| group
== restore_reggroup
)
349 return default_register_reggroup_p (gdbarch
, regnum
, group
);
353 /* Address handling. */
356 spu_gdbarch_id (struct gdbarch
*gdbarch
)
358 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
361 /* The objfile architecture of a standalone SPU executable does not
362 provide an SPU ID. Retrieve it from the objfile's relocated
363 address range in this special case. */
365 && symfile_objfile
&& symfile_objfile
->obfd
366 && bfd_get_arch (symfile_objfile
->obfd
) == bfd_arch_spu
367 && symfile_objfile
->sections
!= symfile_objfile
->sections_end
)
368 id
= SPUADDR_SPU (obj_section_addr (symfile_objfile
->sections
));
374 spu_address_class_type_flags (int byte_size
, int dwarf2_addr_class
)
376 if (dwarf2_addr_class
== 1)
377 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
383 spu_address_class_type_flags_to_name (struct gdbarch
*gdbarch
, int type_flags
)
385 if (type_flags
& TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
)
392 spu_address_class_name_to_type_flags (struct gdbarch
*gdbarch
,
393 const char *name
, int *type_flags_ptr
)
395 if (strcmp (name
, "__ea") == 0)
397 *type_flags_ptr
= TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
405 spu_address_to_pointer (struct gdbarch
*gdbarch
,
406 struct type
*type
, gdb_byte
*buf
, CORE_ADDR addr
)
408 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
409 store_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
,
410 SPUADDR_ADDR (addr
));
414 spu_pointer_to_address (struct gdbarch
*gdbarch
,
415 struct type
*type
, const gdb_byte
*buf
)
417 int id
= spu_gdbarch_id (gdbarch
);
418 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
420 = extract_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
);
422 /* Do not convert __ea pointers. */
423 if (TYPE_ADDRESS_CLASS_1 (type
))
426 return addr
? SPUADDR (id
, addr
) : 0;
430 spu_integer_to_address (struct gdbarch
*gdbarch
,
431 struct type
*type
, const gdb_byte
*buf
)
433 int id
= spu_gdbarch_id (gdbarch
);
434 ULONGEST addr
= unpack_long (type
, buf
);
436 return SPUADDR (id
, addr
);
440 /* Decoding SPU instructions. */
477 is_rr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
)
479 if ((insn
>> 21) == op
)
482 *ra
= (insn
>> 7) & 127;
483 *rb
= (insn
>> 14) & 127;
491 is_rrr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
, int *rc
)
493 if ((insn
>> 28) == op
)
495 *rt
= (insn
>> 21) & 127;
496 *ra
= (insn
>> 7) & 127;
497 *rb
= (insn
>> 14) & 127;
506 is_ri7 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i7
)
508 if ((insn
>> 21) == op
)
511 *ra
= (insn
>> 7) & 127;
512 *i7
= (((insn
>> 14) & 127) ^ 0x40) - 0x40;
520 is_ri10 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i10
)
522 if ((insn
>> 24) == op
)
525 *ra
= (insn
>> 7) & 127;
526 *i10
= (((insn
>> 14) & 0x3ff) ^ 0x200) - 0x200;
534 is_ri16 (unsigned int insn
, int op
, int *rt
, int *i16
)
536 if ((insn
>> 23) == op
)
539 *i16
= (((insn
>> 7) & 0xffff) ^ 0x8000) - 0x8000;
547 is_ri18 (unsigned int insn
, int op
, int *rt
, int *i18
)
549 if ((insn
>> 25) == op
)
552 *i18
= (((insn
>> 7) & 0x3ffff) ^ 0x20000) - 0x20000;
560 is_branch (unsigned int insn
, int *offset
, int *reg
)
564 if (is_ri16 (insn
, op_br
, &rt
, &i16
)
565 || is_ri16 (insn
, op_brsl
, &rt
, &i16
)
566 || is_ri16 (insn
, op_brnz
, &rt
, &i16
)
567 || is_ri16 (insn
, op_brz
, &rt
, &i16
)
568 || is_ri16 (insn
, op_brhnz
, &rt
, &i16
)
569 || is_ri16 (insn
, op_brhz
, &rt
, &i16
))
571 *reg
= SPU_PC_REGNUM
;
576 if (is_ri16 (insn
, op_bra
, &rt
, &i16
)
577 || is_ri16 (insn
, op_brasl
, &rt
, &i16
))
584 if (is_ri7 (insn
, op_bi
, &rt
, reg
, &i7
)
585 || is_ri7 (insn
, op_bisl
, &rt
, reg
, &i7
)
586 || is_ri7 (insn
, op_biz
, &rt
, reg
, &i7
)
587 || is_ri7 (insn
, op_binz
, &rt
, reg
, &i7
)
588 || is_ri7 (insn
, op_bihz
, &rt
, reg
, &i7
)
589 || is_ri7 (insn
, op_bihnz
, &rt
, reg
, &i7
))
599 /* Prolog parsing. */
601 struct spu_prologue_data
603 /* Stack frame size. -1 if analysis was unsuccessful. */
606 /* How to find the CFA. The CFA is equal to SP at function entry. */
610 /* Offset relative to CFA where a register is saved. -1 if invalid. */
611 int reg_offset
[SPU_NUM_GPRS
];
615 spu_analyze_prologue (struct gdbarch
*gdbarch
,
616 CORE_ADDR start_pc
, CORE_ADDR end_pc
,
617 struct spu_prologue_data
*data
)
619 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
624 int reg_immed
[SPU_NUM_GPRS
];
626 CORE_ADDR prolog_pc
= start_pc
;
631 /* Initialize DATA to default values. */
634 data
->cfa_reg
= SPU_RAW_SP_REGNUM
;
635 data
->cfa_offset
= 0;
637 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
638 data
->reg_offset
[i
] = -1;
640 /* Set up REG_IMMED array. This is non-zero for a register if we know its
641 preferred slot currently holds this immediate value. */
642 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
645 /* Scan instructions until the first branch.
647 The following instructions are important prolog components:
649 - The first instruction to set up the stack pointer.
650 - The first instruction to set up the frame pointer.
651 - The first instruction to save the link register.
652 - The first instruction to save the backchain.
654 We return the instruction after the latest of these four,
655 or the incoming PC if none is found. The first instruction
656 to set up the stack pointer also defines the frame size.
658 Note that instructions saving incoming arguments to their stack
659 slots are not counted as important, because they are hard to
660 identify with certainty. This should not matter much, because
661 arguments are relevant only in code compiled with debug data,
662 and in such code the GDB core will advance until the first source
663 line anyway, using SAL data.
665 For purposes of stack unwinding, we analyze the following types
666 of instructions in addition:
668 - Any instruction adding to the current frame pointer.
669 - Any instruction loading an immediate constant into a register.
670 - Any instruction storing a register onto the stack.
672 These are used to compute the CFA and REG_OFFSET output. */
674 for (pc
= start_pc
; pc
< end_pc
; pc
+= 4)
677 int rt
, ra
, rb
, rc
, immed
;
679 if (target_read_memory (pc
, buf
, 4))
681 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
683 /* AI is the typical instruction to set up a stack frame.
684 It is also used to initialize the frame pointer. */
685 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
))
687 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
688 data
->cfa_offset
-= immed
;
690 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
698 else if (rt
== SPU_FP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
704 data
->cfa_reg
= SPU_FP_REGNUM
;
705 data
->cfa_offset
-= immed
;
709 /* A is used to set up stack frames of size >= 512 bytes.
710 If we have tracked the contents of the addend register,
711 we can handle this as well. */
712 else if (is_rr (insn
, op_a
, &rt
, &ra
, &rb
))
714 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
716 if (reg_immed
[rb
] != 0)
717 data
->cfa_offset
-= reg_immed
[rb
];
719 data
->cfa_reg
= -1; /* We don't know the CFA any more. */
722 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
728 if (reg_immed
[rb
] != 0)
729 data
->size
= -reg_immed
[rb
];
733 /* We need to track IL and ILA used to load immediate constants
734 in case they are later used as input to an A instruction. */
735 else if (is_ri16 (insn
, op_il
, &rt
, &immed
))
737 reg_immed
[rt
] = immed
;
739 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
743 else if (is_ri18 (insn
, op_ila
, &rt
, &immed
))
745 reg_immed
[rt
] = immed
& 0x3ffff;
747 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
751 /* STQD is used to save registers to the stack. */
752 else if (is_ri10 (insn
, op_stqd
, &rt
, &ra
, &immed
))
754 if (ra
== data
->cfa_reg
)
755 data
->reg_offset
[rt
] = data
->cfa_offset
- (immed
<< 4);
757 if (ra
== data
->cfa_reg
&& rt
== SPU_LR_REGNUM
764 if (ra
== SPU_RAW_SP_REGNUM
765 && (found_sp
? immed
== 0 : rt
== SPU_RAW_SP_REGNUM
)
773 /* _start uses SELB to set up the stack pointer. */
774 else if (is_rrr (insn
, op_selb
, &rt
, &ra
, &rb
, &rc
))
776 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
780 /* We terminate if we find a branch. */
781 else if (is_branch (insn
, &immed
, &ra
))
786 /* If we successfully parsed until here, and didn't find any instruction
787 modifying SP, we assume we have a frameless function. */
791 /* Return cooked instead of raw SP. */
792 if (data
->cfa_reg
== SPU_RAW_SP_REGNUM
)
793 data
->cfa_reg
= SPU_SP_REGNUM
;
798 /* Return the first instruction after the prologue starting at PC. */
800 spu_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
802 struct spu_prologue_data data
;
803 return spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
806 /* Return the frame pointer in use at address PC. */
808 spu_virtual_frame_pointer (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
809 int *reg
, LONGEST
*offset
)
811 struct spu_prologue_data data
;
812 spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
814 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
816 /* The 'frame pointer' address is CFA minus frame size. */
818 *offset
= data
.cfa_offset
- data
.size
;
822 /* ??? We don't really know ... */
823 *reg
= SPU_SP_REGNUM
;
828 /* Return true if we are in the function's epilogue, i.e. after the
829 instruction that destroyed the function's stack frame.
831 1) scan forward from the point of execution:
832 a) If you find an instruction that modifies the stack pointer
833 or transfers control (except a return), execution is not in
835 b) Stop scanning if you find a return instruction or reach the
836 end of the function or reach the hard limit for the size of
838 2) scan backward from the point of execution:
839 a) If you find an instruction that modifies the stack pointer,
840 execution *is* in an epilogue, return.
841 b) Stop scanning if you reach an instruction that transfers
842 control or the beginning of the function or reach the hard
843 limit for the size of an epilogue. */
846 spu_in_function_epilogue_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
848 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
849 CORE_ADDR scan_pc
, func_start
, func_end
, epilogue_start
, epilogue_end
;
852 int rt
, ra
, rb
, immed
;
854 /* Find the search limits based on function boundaries and hard limit.
855 We assume the epilogue can be up to 64 instructions long. */
857 const int spu_max_epilogue_size
= 64 * 4;
859 if (!find_pc_partial_function (pc
, NULL
, &func_start
, &func_end
))
862 if (pc
- func_start
< spu_max_epilogue_size
)
863 epilogue_start
= func_start
;
865 epilogue_start
= pc
- spu_max_epilogue_size
;
867 if (func_end
- pc
< spu_max_epilogue_size
)
868 epilogue_end
= func_end
;
870 epilogue_end
= pc
+ spu_max_epilogue_size
;
872 /* Scan forward until next 'bi $0'. */
874 for (scan_pc
= pc
; scan_pc
< epilogue_end
; scan_pc
+= 4)
876 if (target_read_memory (scan_pc
, buf
, 4))
878 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
880 if (is_branch (insn
, &immed
, &ra
))
882 if (immed
== 0 && ra
== SPU_LR_REGNUM
)
888 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
889 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
890 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
892 if (rt
== SPU_RAW_SP_REGNUM
)
897 if (scan_pc
>= epilogue_end
)
900 /* Scan backward until adjustment to stack pointer (R1). */
902 for (scan_pc
= pc
- 4; scan_pc
>= epilogue_start
; scan_pc
-= 4)
904 if (target_read_memory (scan_pc
, buf
, 4))
906 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
908 if (is_branch (insn
, &immed
, &ra
))
911 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
912 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
913 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
915 if (rt
== SPU_RAW_SP_REGNUM
)
924 /* Normal stack frames. */
926 struct spu_unwind_cache
929 CORE_ADDR frame_base
;
930 CORE_ADDR local_base
;
932 struct trad_frame_saved_reg
*saved_regs
;
935 static struct spu_unwind_cache
*
936 spu_frame_unwind_cache (struct frame_info
*this_frame
,
937 void **this_prologue_cache
)
939 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
940 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
941 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
942 struct spu_unwind_cache
*info
;
943 struct spu_prologue_data data
;
944 CORE_ADDR id
= tdep
->id
;
947 if (*this_prologue_cache
)
948 return *this_prologue_cache
;
950 info
= FRAME_OBSTACK_ZALLOC (struct spu_unwind_cache
);
951 *this_prologue_cache
= info
;
952 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
953 info
->frame_base
= 0;
954 info
->local_base
= 0;
956 /* Find the start of the current function, and analyze its prologue. */
957 info
->func
= get_frame_func (this_frame
);
960 /* Fall back to using the current PC as frame ID. */
961 info
->func
= get_frame_pc (this_frame
);
965 spu_analyze_prologue (gdbarch
, info
->func
, get_frame_pc (this_frame
),
968 /* If successful, use prologue analysis data. */
969 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
974 /* Determine CFA via unwound CFA_REG plus CFA_OFFSET. */
975 get_frame_register (this_frame
, data
.cfa_reg
, buf
);
976 cfa
= extract_unsigned_integer (buf
, 4, byte_order
) + data
.cfa_offset
;
977 cfa
= SPUADDR (id
, cfa
);
979 /* Call-saved register slots. */
980 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
981 if (i
== SPU_LR_REGNUM
982 || (i
>= SPU_SAVED1_REGNUM
&& i
<= SPU_SAVEDN_REGNUM
))
983 if (data
.reg_offset
[i
] != -1)
984 info
->saved_regs
[i
].addr
= cfa
- data
.reg_offset
[i
];
987 info
->frame_base
= cfa
;
988 info
->local_base
= cfa
- data
.size
;
991 /* Otherwise, fall back to reading the backchain link. */
999 /* Get local store limit. */
1000 lslr
= get_frame_register_unsigned (this_frame
, SPU_LSLR_REGNUM
);
1002 lslr
= (ULONGEST
) -1;
1004 /* Get the backchain. */
1005 reg
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1006 status
= safe_read_memory_integer (SPUADDR (id
, reg
), 4, byte_order
,
1009 /* A zero backchain terminates the frame chain. Also, sanity
1010 check against the local store size limit. */
1011 if (status
&& backchain
> 0 && backchain
<= lslr
)
1013 /* Assume the link register is saved into its slot. */
1014 if (backchain
+ 16 <= lslr
)
1015 info
->saved_regs
[SPU_LR_REGNUM
].addr
= SPUADDR (id
,
1019 info
->frame_base
= SPUADDR (id
, backchain
);
1020 info
->local_base
= SPUADDR (id
, reg
);
1024 /* If we didn't find a frame, we cannot determine SP / return address. */
1025 if (info
->frame_base
== 0)
1028 /* The previous SP is equal to the CFA. */
1029 trad_frame_set_value (info
->saved_regs
, SPU_SP_REGNUM
,
1030 SPUADDR_ADDR (info
->frame_base
));
1032 /* Read full contents of the unwound link register in order to
1033 be able to determine the return address. */
1034 if (trad_frame_addr_p (info
->saved_regs
, SPU_LR_REGNUM
))
1035 target_read_memory (info
->saved_regs
[SPU_LR_REGNUM
].addr
, buf
, 16);
1037 get_frame_register (this_frame
, SPU_LR_REGNUM
, buf
);
1039 /* Normally, the return address is contained in the slot 0 of the
1040 link register, and slots 1-3 are zero. For an overlay return,
1041 slot 0 contains the address of the overlay manager return stub,
1042 slot 1 contains the partition number of the overlay section to
1043 be returned to, and slot 2 contains the return address within
1044 that section. Return the latter address in that case. */
1045 if (extract_unsigned_integer (buf
+ 8, 4, byte_order
) != 0)
1046 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1047 extract_unsigned_integer (buf
+ 8, 4, byte_order
));
1049 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1050 extract_unsigned_integer (buf
, 4, byte_order
));
1056 spu_frame_this_id (struct frame_info
*this_frame
,
1057 void **this_prologue_cache
, struct frame_id
*this_id
)
1059 struct spu_unwind_cache
*info
=
1060 spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1062 if (info
->frame_base
== 0)
1065 *this_id
= frame_id_build (info
->frame_base
, info
->func
);
1068 static struct value
*
1069 spu_frame_prev_register (struct frame_info
*this_frame
,
1070 void **this_prologue_cache
, int regnum
)
1072 struct spu_unwind_cache
*info
1073 = spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1075 /* Special-case the stack pointer. */
1076 if (regnum
== SPU_RAW_SP_REGNUM
)
1077 regnum
= SPU_SP_REGNUM
;
1079 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
1082 static const struct frame_unwind spu_frame_unwind
= {
1084 default_frame_unwind_stop_reason
,
1086 spu_frame_prev_register
,
1088 default_frame_sniffer
1092 spu_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
1094 struct spu_unwind_cache
*info
1095 = spu_frame_unwind_cache (this_frame
, this_cache
);
1096 return info
->local_base
;
1099 static const struct frame_base spu_frame_base
= {
1101 spu_frame_base_address
,
1102 spu_frame_base_address
,
1103 spu_frame_base_address
1107 spu_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1109 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1110 CORE_ADDR pc
= frame_unwind_register_unsigned (next_frame
, SPU_PC_REGNUM
);
1111 /* Mask off interrupt enable bit. */
1112 return SPUADDR (tdep
->id
, pc
& -4);
1116 spu_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1118 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1119 CORE_ADDR sp
= frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
1120 return SPUADDR (tdep
->id
, sp
);
1124 spu_read_pc (struct regcache
*regcache
)
1126 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1128 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &pc
);
1129 /* Mask off interrupt enable bit. */
1130 return SPUADDR (tdep
->id
, pc
& -4);
1134 spu_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1136 /* Keep interrupt enabled state unchanged. */
1138 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &old_pc
);
1139 regcache_cooked_write_unsigned (regcache
, SPU_PC_REGNUM
,
1140 (SPUADDR_ADDR (pc
) & -4) | (old_pc
& 3));
1144 /* Cell/B.E. cross-architecture unwinder support. */
1146 struct spu2ppu_cache
1148 struct frame_id frame_id
;
1149 struct regcache
*regcache
;
1152 static struct gdbarch
*
1153 spu2ppu_prev_arch (struct frame_info
*this_frame
, void **this_cache
)
1155 struct spu2ppu_cache
*cache
= *this_cache
;
1156 return get_regcache_arch (cache
->regcache
);
1160 spu2ppu_this_id (struct frame_info
*this_frame
,
1161 void **this_cache
, struct frame_id
*this_id
)
1163 struct spu2ppu_cache
*cache
= *this_cache
;
1164 *this_id
= cache
->frame_id
;
1167 static struct value
*
1168 spu2ppu_prev_register (struct frame_info
*this_frame
,
1169 void **this_cache
, int regnum
)
1171 struct spu2ppu_cache
*cache
= *this_cache
;
1172 struct gdbarch
*gdbarch
= get_regcache_arch (cache
->regcache
);
1175 buf
= alloca (register_size (gdbarch
, regnum
));
1176 regcache_cooked_read (cache
->regcache
, regnum
, buf
);
1177 return frame_unwind_got_bytes (this_frame
, regnum
, buf
);
1181 spu2ppu_sniffer (const struct frame_unwind
*self
,
1182 struct frame_info
*this_frame
, void **this_prologue_cache
)
1184 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1185 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1186 CORE_ADDR base
, func
, backchain
;
1189 if (gdbarch_bfd_arch_info (target_gdbarch ())->arch
== bfd_arch_spu
)
1192 base
= get_frame_sp (this_frame
);
1193 func
= get_frame_pc (this_frame
);
1194 if (target_read_memory (base
, buf
, 4))
1196 backchain
= extract_unsigned_integer (buf
, 4, byte_order
);
1200 struct frame_info
*fi
;
1202 struct spu2ppu_cache
*cache
1203 = FRAME_OBSTACK_CALLOC (1, struct spu2ppu_cache
);
1205 cache
->frame_id
= frame_id_build (base
+ 16, func
);
1207 for (fi
= get_next_frame (this_frame
); fi
; fi
= get_next_frame (fi
))
1208 if (gdbarch_bfd_arch_info (get_frame_arch (fi
))->arch
!= bfd_arch_spu
)
1213 cache
->regcache
= frame_save_as_regcache (fi
);
1214 *this_prologue_cache
= cache
;
1219 struct regcache
*regcache
;
1220 regcache
= get_thread_arch_regcache (inferior_ptid
, target_gdbarch ());
1221 cache
->regcache
= regcache_dup (regcache
);
1222 *this_prologue_cache
= cache
;
1231 spu2ppu_dealloc_cache (struct frame_info
*self
, void *this_cache
)
1233 struct spu2ppu_cache
*cache
= this_cache
;
1234 regcache_xfree (cache
->regcache
);
1237 static const struct frame_unwind spu2ppu_unwind
= {
1239 default_frame_unwind_stop_reason
,
1241 spu2ppu_prev_register
,
1244 spu2ppu_dealloc_cache
,
1249 /* Function calling convention. */
1252 spu_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1258 spu_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
1259 struct value
**args
, int nargs
, struct type
*value_type
,
1260 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
1261 struct regcache
*regcache
)
1263 /* Allocate space sufficient for a breakpoint, keeping the stack aligned. */
1264 sp
= (sp
- 4) & ~15;
1265 /* Store the address of that breakpoint */
1267 /* The call starts at the callee's entry point. */
1274 spu_scalar_value_p (struct type
*type
)
1276 switch (TYPE_CODE (type
))
1279 case TYPE_CODE_ENUM
:
1280 case TYPE_CODE_RANGE
:
1281 case TYPE_CODE_CHAR
:
1282 case TYPE_CODE_BOOL
:
1285 return TYPE_LENGTH (type
) <= 16;
1293 spu_value_to_regcache (struct regcache
*regcache
, int regnum
,
1294 struct type
*type
, const gdb_byte
*in
)
1296 int len
= TYPE_LENGTH (type
);
1298 if (spu_scalar_value_p (type
))
1300 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1301 regcache_cooked_write_part (regcache
, regnum
, preferred_slot
, len
, in
);
1307 regcache_cooked_write (regcache
, regnum
++, in
);
1313 regcache_cooked_write_part (regcache
, regnum
, 0, len
, in
);
1318 spu_regcache_to_value (struct regcache
*regcache
, int regnum
,
1319 struct type
*type
, gdb_byte
*out
)
1321 int len
= TYPE_LENGTH (type
);
1323 if (spu_scalar_value_p (type
))
1325 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1326 regcache_cooked_read_part (regcache
, regnum
, preferred_slot
, len
, out
);
1332 regcache_cooked_read (regcache
, regnum
++, out
);
1338 regcache_cooked_read_part (regcache
, regnum
, 0, len
, out
);
1343 spu_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1344 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1345 int nargs
, struct value
**args
, CORE_ADDR sp
,
1346 int struct_return
, CORE_ADDR struct_addr
)
1348 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1351 int regnum
= SPU_ARG1_REGNUM
;
1355 /* Set the return address. */
1356 memset (buf
, 0, sizeof buf
);
1357 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (bp_addr
));
1358 regcache_cooked_write (regcache
, SPU_LR_REGNUM
, buf
);
1360 /* If STRUCT_RETURN is true, then the struct return address (in
1361 STRUCT_ADDR) will consume the first argument-passing register.
1362 Both adjust the register count and store that value. */
1365 memset (buf
, 0, sizeof buf
);
1366 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (struct_addr
));
1367 regcache_cooked_write (regcache
, regnum
++, buf
);
1370 /* Fill in argument registers. */
1371 for (i
= 0; i
< nargs
; i
++)
1373 struct value
*arg
= args
[i
];
1374 struct type
*type
= check_typedef (value_type (arg
));
1375 const gdb_byte
*contents
= value_contents (arg
);
1376 int n_regs
= align_up (TYPE_LENGTH (type
), 16) / 16;
1378 /* If the argument doesn't wholly fit into registers, it and
1379 all subsequent arguments go to the stack. */
1380 if (regnum
+ n_regs
- 1 > SPU_ARGN_REGNUM
)
1386 spu_value_to_regcache (regcache
, regnum
, type
, contents
);
1390 /* Overflow arguments go to the stack. */
1391 if (stack_arg
!= -1)
1395 /* Allocate all required stack size. */
1396 for (i
= stack_arg
; i
< nargs
; i
++)
1398 struct type
*type
= check_typedef (value_type (args
[i
]));
1399 sp
-= align_up (TYPE_LENGTH (type
), 16);
1402 /* Fill in stack arguments. */
1404 for (i
= stack_arg
; i
< nargs
; i
++)
1406 struct value
*arg
= args
[i
];
1407 struct type
*type
= check_typedef (value_type (arg
));
1408 int len
= TYPE_LENGTH (type
);
1411 if (spu_scalar_value_p (type
))
1412 preferred_slot
= len
< 4 ? 4 - len
: 0;
1416 target_write_memory (ap
+ preferred_slot
, value_contents (arg
), len
);
1417 ap
+= align_up (TYPE_LENGTH (type
), 16);
1421 /* Allocate stack frame header. */
1424 /* Store stack back chain. */
1425 regcache_cooked_read (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1426 target_write_memory (sp
, buf
, 16);
1428 /* Finally, update all slots of the SP register. */
1429 sp_delta
= sp
- extract_unsigned_integer (buf
, 4, byte_order
);
1430 for (i
= 0; i
< 4; i
++)
1432 CORE_ADDR sp_slot
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
1433 store_unsigned_integer (buf
+ 4*i
, 4, byte_order
, sp_slot
+ sp_delta
);
1435 regcache_cooked_write (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1440 static struct frame_id
1441 spu_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1443 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1444 CORE_ADDR pc
= get_frame_register_unsigned (this_frame
, SPU_PC_REGNUM
);
1445 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1446 return frame_id_build (SPUADDR (tdep
->id
, sp
), SPUADDR (tdep
->id
, pc
& -4));
1449 /* Function return value access. */
1451 static enum return_value_convention
1452 spu_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
1453 struct type
*type
, struct regcache
*regcache
,
1454 gdb_byte
*out
, const gdb_byte
*in
)
1456 struct type
*func_type
= function
? value_type (function
) : NULL
;
1457 enum return_value_convention rvc
;
1458 int opencl_vector
= 0;
1462 func_type
= check_typedef (func_type
);
1464 if (TYPE_CODE (func_type
) == TYPE_CODE_PTR
)
1465 func_type
= check_typedef (TYPE_TARGET_TYPE (func_type
));
1467 if (TYPE_CODE (func_type
) == TYPE_CODE_FUNC
1468 && TYPE_CALLING_CONVENTION (func_type
) == DW_CC_GDB_IBM_OpenCL
1469 && TYPE_CODE (type
) == TYPE_CODE_ARRAY
1470 && TYPE_VECTOR (type
))
1474 if (TYPE_LENGTH (type
) <= (SPU_ARGN_REGNUM
- SPU_ARG1_REGNUM
+ 1) * 16)
1475 rvc
= RETURN_VALUE_REGISTER_CONVENTION
;
1477 rvc
= RETURN_VALUE_STRUCT_CONVENTION
;
1483 case RETURN_VALUE_REGISTER_CONVENTION
:
1484 if (opencl_vector
&& TYPE_LENGTH (type
) == 2)
1485 regcache_cooked_write_part (regcache
, SPU_ARG1_REGNUM
, 2, 2, in
);
1487 spu_value_to_regcache (regcache
, SPU_ARG1_REGNUM
, type
, in
);
1490 case RETURN_VALUE_STRUCT_CONVENTION
:
1491 error (_("Cannot set function return value."));
1499 case RETURN_VALUE_REGISTER_CONVENTION
:
1500 if (opencl_vector
&& TYPE_LENGTH (type
) == 2)
1501 regcache_cooked_read_part (regcache
, SPU_ARG1_REGNUM
, 2, 2, out
);
1503 spu_regcache_to_value (regcache
, SPU_ARG1_REGNUM
, type
, out
);
1506 case RETURN_VALUE_STRUCT_CONVENTION
:
1507 error (_("Function return value unknown."));
1518 static const gdb_byte
*
1519 spu_breakpoint_from_pc (struct gdbarch
*gdbarch
,
1520 CORE_ADDR
* pcptr
, int *lenptr
)
1522 static const gdb_byte breakpoint
[] = { 0x00, 0x00, 0x3f, 0xff };
1524 *lenptr
= sizeof breakpoint
;
1529 spu_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
1530 struct bp_target_info
*bp_tgt
)
1532 /* We work around a problem in combined Cell/B.E. debugging here. Consider
1533 that in a combined application, we have some breakpoints inserted in SPU
1534 code, and now the application forks (on the PPU side). GDB common code
1535 will assume that the fork system call copied all breakpoints into the new
1536 process' address space, and that all those copies now need to be removed
1537 (see breakpoint.c:detach_breakpoints).
1539 While this is certainly true for PPU side breakpoints, it is not true
1540 for SPU side breakpoints. fork will clone the SPU context file
1541 descriptors, so that all the existing SPU contexts are in accessible
1542 in the new process. However, the contents of the SPU contexts themselves
1543 are *not* cloned. Therefore the effect of detach_breakpoints is to
1544 remove SPU breakpoints from the *original* SPU context's local store
1545 -- this is not the correct behaviour.
1547 The workaround is to check whether the PID we are asked to remove this
1548 breakpoint from (i.e. ptid_get_pid (inferior_ptid)) is different from the
1549 PID of the current inferior (i.e. current_inferior ()->pid). This is only
1550 true in the context of detach_breakpoints. If so, we simply do nothing.
1551 [ Note that for the fork child process, it does not matter if breakpoints
1552 remain inserted, because those SPU contexts are not runnable anyway --
1553 the Linux kernel allows only the original process to invoke spu_run. */
1555 if (ptid_get_pid (inferior_ptid
) != current_inferior ()->pid
)
1558 return default_memory_remove_breakpoint (gdbarch
, bp_tgt
);
1562 /* Software single-stepping support. */
1565 spu_software_single_step (struct frame_info
*frame
)
1567 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1568 struct address_space
*aspace
= get_frame_address_space (frame
);
1569 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1570 CORE_ADDR pc
, next_pc
;
1576 pc
= get_frame_pc (frame
);
1578 if (target_read_memory (pc
, buf
, 4))
1580 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
1582 /* Get local store limit. */
1583 lslr
= get_frame_register_unsigned (frame
, SPU_LSLR_REGNUM
);
1585 lslr
= (ULONGEST
) -1;
1587 /* Next sequential instruction is at PC + 4, except if the current
1588 instruction is a PPE-assisted call, in which case it is at PC + 8.
1589 Wrap around LS limit to be on the safe side. */
1590 if ((insn
& 0xffffff00) == 0x00002100)
1591 next_pc
= (SPUADDR_ADDR (pc
) + 8) & lslr
;
1593 next_pc
= (SPUADDR_ADDR (pc
) + 4) & lslr
;
1595 insert_single_step_breakpoint (gdbarch
,
1596 aspace
, SPUADDR (SPUADDR_SPU (pc
), next_pc
));
1598 if (is_branch (insn
, &offset
, ®
))
1600 CORE_ADDR target
= offset
;
1602 if (reg
== SPU_PC_REGNUM
)
1603 target
+= SPUADDR_ADDR (pc
);
1608 if (get_frame_register_bytes (frame
, reg
, 0, 4, buf
,
1610 target
+= extract_unsigned_integer (buf
, 4, byte_order
) & -4;
1614 error (_("Could not determine address of "
1615 "single-step breakpoint."));
1617 throw_error (NOT_AVAILABLE_ERROR
,
1618 _("Could not determine address of "
1619 "single-step breakpoint."));
1623 target
= target
& lslr
;
1624 if (target
!= next_pc
)
1625 insert_single_step_breakpoint (gdbarch
, aspace
,
1626 SPUADDR (SPUADDR_SPU (pc
), target
));
1633 /* Longjmp support. */
1636 spu_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
1638 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1639 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1640 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1645 /* Jump buffer is pointed to by the argument register $r3. */
1646 if (!get_frame_register_bytes (frame
, SPU_ARG1_REGNUM
, 0, 4, buf
,
1650 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
1651 if (target_read_memory (SPUADDR (tdep
->id
, jb_addr
), buf
, 4))
1654 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
1655 *pc
= SPUADDR (tdep
->id
, *pc
);
1662 struct spu_dis_asm_data
1664 struct gdbarch
*gdbarch
;
1669 spu_dis_asm_print_address (bfd_vma addr
, struct disassemble_info
*info
)
1671 struct spu_dis_asm_data
*data
= info
->application_data
;
1672 print_address (data
->gdbarch
, SPUADDR (data
->id
, addr
), info
->stream
);
1676 gdb_print_insn_spu (bfd_vma memaddr
, struct disassemble_info
*info
)
1678 /* The opcodes disassembler does 18-bit address arithmetic. Make
1679 sure the SPU ID encoded in the high bits is added back when we
1680 call print_address. */
1681 struct disassemble_info spu_info
= *info
;
1682 struct spu_dis_asm_data data
;
1683 data
.gdbarch
= info
->application_data
;
1684 data
.id
= SPUADDR_SPU (memaddr
);
1686 spu_info
.application_data
= &data
;
1687 spu_info
.print_address_func
= spu_dis_asm_print_address
;
1688 return print_insn_spu (memaddr
, &spu_info
);
1692 /* Target overlays for the SPU overlay manager.
1694 See the documentation of simple_overlay_update for how the
1695 interface is supposed to work.
1697 Data structures used by the overlay manager:
1705 } _ovly_table[]; -- one entry per overlay section
1707 struct ovly_buf_table
1710 } _ovly_buf_table[]; -- one entry per overlay buffer
1712 _ovly_table should never change.
1714 Both tables are aligned to a 16-byte boundary, the symbols
1715 _ovly_table and _ovly_buf_table are of type STT_OBJECT and their
1716 size set to the size of the respective array. buf in _ovly_table is
1717 an index into _ovly_buf_table.
1719 mapped is an index into _ovly_table. Both the mapped and buf indices start
1720 from one to reference the first entry in their respective tables. */
1722 /* Using the per-objfile private data mechanism, we store for each
1723 objfile an array of "struct spu_overlay_table" structures, one
1724 for each obj_section of the objfile. This structure holds two
1725 fields, MAPPED_PTR and MAPPED_VAL. If MAPPED_PTR is zero, this
1726 is *not* an overlay section. If it is non-zero, it represents
1727 a target address. The overlay section is mapped iff the target
1728 integer at this location equals MAPPED_VAL. */
1730 static const struct objfile_data
*spu_overlay_data
;
1732 struct spu_overlay_table
1734 CORE_ADDR mapped_ptr
;
1735 CORE_ADDR mapped_val
;
1738 /* Retrieve the overlay table for OBJFILE. If not already cached, read
1739 the _ovly_table data structure from the target and initialize the
1740 spu_overlay_table data structure from it. */
1741 static struct spu_overlay_table
*
1742 spu_get_overlay_table (struct objfile
*objfile
)
1744 enum bfd_endian byte_order
= bfd_big_endian (objfile
->obfd
)?
1745 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1746 struct minimal_symbol
*ovly_table_msym
, *ovly_buf_table_msym
;
1747 CORE_ADDR ovly_table_base
, ovly_buf_table_base
;
1748 unsigned ovly_table_size
, ovly_buf_table_size
;
1749 struct spu_overlay_table
*tbl
;
1750 struct obj_section
*osect
;
1754 tbl
= objfile_data (objfile
, spu_overlay_data
);
1758 ovly_table_msym
= lookup_minimal_symbol ("_ovly_table", NULL
, objfile
);
1759 if (!ovly_table_msym
)
1762 ovly_buf_table_msym
= lookup_minimal_symbol ("_ovly_buf_table",
1764 if (!ovly_buf_table_msym
)
1767 ovly_table_base
= SYMBOL_VALUE_ADDRESS (ovly_table_msym
);
1768 ovly_table_size
= MSYMBOL_SIZE (ovly_table_msym
);
1770 ovly_buf_table_base
= SYMBOL_VALUE_ADDRESS (ovly_buf_table_msym
);
1771 ovly_buf_table_size
= MSYMBOL_SIZE (ovly_buf_table_msym
);
1773 ovly_table
= xmalloc (ovly_table_size
);
1774 read_memory (ovly_table_base
, ovly_table
, ovly_table_size
);
1776 tbl
= OBSTACK_CALLOC (&objfile
->objfile_obstack
,
1777 objfile
->sections_end
- objfile
->sections
,
1778 struct spu_overlay_table
);
1780 for (i
= 0; i
< ovly_table_size
/ 16; i
++)
1782 CORE_ADDR vma
= extract_unsigned_integer (ovly_table
+ 16*i
+ 0,
1784 CORE_ADDR size
= extract_unsigned_integer (ovly_table
+ 16*i
+ 4,
1786 CORE_ADDR pos
= extract_unsigned_integer (ovly_table
+ 16*i
+ 8,
1788 CORE_ADDR buf
= extract_unsigned_integer (ovly_table
+ 16*i
+ 12,
1791 if (buf
== 0 || (buf
- 1) * 4 >= ovly_buf_table_size
)
1794 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1795 if (vma
== bfd_section_vma (objfile
->obfd
, osect
->the_bfd_section
)
1796 && pos
== osect
->the_bfd_section
->filepos
)
1798 int ndx
= osect
- objfile
->sections
;
1799 tbl
[ndx
].mapped_ptr
= ovly_buf_table_base
+ (buf
- 1) * 4;
1800 tbl
[ndx
].mapped_val
= i
+ 1;
1806 set_objfile_data (objfile
, spu_overlay_data
, tbl
);
1810 /* Read _ovly_buf_table entry from the target to dermine whether
1811 OSECT is currently mapped, and update the mapped state. */
1813 spu_overlay_update_osect (struct obj_section
*osect
)
1815 enum bfd_endian byte_order
= bfd_big_endian (osect
->objfile
->obfd
)?
1816 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1817 struct spu_overlay_table
*ovly_table
;
1820 ovly_table
= spu_get_overlay_table (osect
->objfile
);
1824 ovly_table
+= osect
- osect
->objfile
->sections
;
1825 if (ovly_table
->mapped_ptr
== 0)
1828 id
= SPUADDR_SPU (obj_section_addr (osect
));
1829 val
= read_memory_unsigned_integer (SPUADDR (id
, ovly_table
->mapped_ptr
),
1831 osect
->ovly_mapped
= (val
== ovly_table
->mapped_val
);
1834 /* If OSECT is NULL, then update all sections' mapped state.
1835 If OSECT is non-NULL, then update only OSECT's mapped state. */
1837 spu_overlay_update (struct obj_section
*osect
)
1839 /* Just one section. */
1841 spu_overlay_update_osect (osect
);
1846 struct objfile
*objfile
;
1848 ALL_OBJSECTIONS (objfile
, osect
)
1849 if (section_is_overlay (osect
))
1850 spu_overlay_update_osect (osect
);
1854 /* Whenever a new objfile is loaded, read the target's _ovly_table.
1855 If there is one, go through all sections and make sure for non-
1856 overlay sections LMA equals VMA, while for overlay sections LMA
1857 is larger than SPU_OVERLAY_LMA. */
1859 spu_overlay_new_objfile (struct objfile
*objfile
)
1861 struct spu_overlay_table
*ovly_table
;
1862 struct obj_section
*osect
;
1864 /* If we've already touched this file, do nothing. */
1865 if (!objfile
|| objfile_data (objfile
, spu_overlay_data
) != NULL
)
1868 /* Consider only SPU objfiles. */
1869 if (bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1872 /* Check if this objfile has overlays. */
1873 ovly_table
= spu_get_overlay_table (objfile
);
1877 /* Now go and fiddle with all the LMAs. */
1878 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1880 bfd
*obfd
= objfile
->obfd
;
1881 asection
*bsect
= osect
->the_bfd_section
;
1882 int ndx
= osect
- objfile
->sections
;
1884 if (ovly_table
[ndx
].mapped_ptr
== 0)
1885 bfd_section_lma (obfd
, bsect
) = bfd_section_vma (obfd
, bsect
);
1887 bfd_section_lma (obfd
, bsect
) = SPU_OVERLAY_LMA
+ bsect
->filepos
;
1892 /* Insert temporary breakpoint on "main" function of newly loaded
1893 SPE context OBJFILE. */
1895 spu_catch_start (struct objfile
*objfile
)
1897 struct minimal_symbol
*minsym
;
1898 struct symtab
*symtab
;
1902 /* Do this only if requested by "set spu stop-on-load on". */
1903 if (!spu_stop_on_load_p
)
1906 /* Consider only SPU objfiles. */
1907 if (!objfile
|| bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1910 /* The main objfile is handled differently. */
1911 if (objfile
== symfile_objfile
)
1914 /* There can be multiple symbols named "main". Search for the
1915 "main" in *this* objfile. */
1916 minsym
= lookup_minimal_symbol ("main", NULL
, objfile
);
1920 /* If we have debugging information, try to use it -- this
1921 will allow us to properly skip the prologue. */
1922 pc
= SYMBOL_VALUE_ADDRESS (minsym
);
1923 symtab
= find_pc_sect_symtab (pc
, SYMBOL_OBJ_SECTION (minsym
));
1926 struct blockvector
*bv
= BLOCKVECTOR (symtab
);
1927 struct block
*block
= BLOCKVECTOR_BLOCK (bv
, GLOBAL_BLOCK
);
1929 struct symtab_and_line sal
;
1931 sym
= lookup_block_symbol (block
, "main", VAR_DOMAIN
);
1934 fixup_symbol_section (sym
, objfile
);
1935 sal
= find_function_start_sal (sym
, 1);
1940 /* Use a numerical address for the set_breakpoint command to avoid having
1941 the breakpoint re-set incorrectly. */
1942 xsnprintf (buf
, sizeof buf
, "*%s", core_addr_to_string (pc
));
1943 create_breakpoint (get_objfile_arch (objfile
), buf
/* arg */,
1944 NULL
/* cond_string */, -1 /* thread */,
1945 NULL
/* extra_string */,
1946 0 /* parse_condition_and_thread */, 1 /* tempflag */,
1947 bp_breakpoint
/* type_wanted */,
1948 0 /* ignore_count */,
1949 AUTO_BOOLEAN_FALSE
/* pending_break_support */,
1950 &bkpt_breakpoint_ops
/* ops */, 0 /* from_tty */,
1951 1 /* enabled */, 0 /* internal */, 0);
1955 /* Look up OBJFILE loaded into FRAME's SPU context. */
1956 static struct objfile
*
1957 spu_objfile_from_frame (struct frame_info
*frame
)
1959 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1960 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1961 struct objfile
*obj
;
1963 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
1968 if (obj
->sections
!= obj
->sections_end
1969 && SPUADDR_SPU (obj_section_addr (obj
->sections
)) == tdep
->id
)
1976 /* Flush cache for ea pointer access if available. */
1978 flush_ea_cache (void)
1980 struct minimal_symbol
*msymbol
;
1981 struct objfile
*obj
;
1983 if (!has_stack_frames ())
1986 obj
= spu_objfile_from_frame (get_current_frame ());
1990 /* Lookup inferior function __cache_flush. */
1991 msymbol
= lookup_minimal_symbol ("__cache_flush", NULL
, obj
);
1992 if (msymbol
!= NULL
)
1997 type
= objfile_type (obj
)->builtin_void
;
1998 type
= lookup_function_type (type
);
1999 type
= lookup_pointer_type (type
);
2000 addr
= SYMBOL_VALUE_ADDRESS (msymbol
);
2002 call_function_by_hand (value_from_pointer (type
, addr
), 0, NULL
);
2006 /* This handler is called when the inferior has stopped. If it is stopped in
2007 SPU architecture then flush the ea cache if used. */
2009 spu_attach_normal_stop (struct bpstats
*bs
, int print_frame
)
2011 if (!spu_auto_flush_cache_p
)
2014 /* Temporarily reset spu_auto_flush_cache_p to avoid recursively
2015 re-entering this function when __cache_flush stops. */
2016 spu_auto_flush_cache_p
= 0;
2018 spu_auto_flush_cache_p
= 1;
2022 /* "info spu" commands. */
2025 info_spu_event_command (char *args
, int from_tty
)
2027 struct frame_info
*frame
= get_selected_frame (NULL
);
2028 ULONGEST event_status
= 0;
2029 ULONGEST event_mask
= 0;
2030 struct cleanup
*chain
;
2036 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
2037 error (_("\"info spu\" is only supported on the SPU architecture."));
2039 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2041 xsnprintf (annex
, sizeof annex
, "%d/event_status", id
);
2042 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2043 buf
, 0, (sizeof (buf
) - 1));
2045 error (_("Could not read event_status."));
2047 event_status
= strtoulst (buf
, NULL
, 16);
2049 xsnprintf (annex
, sizeof annex
, "%d/event_mask", id
);
2050 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2051 buf
, 0, (sizeof (buf
) - 1));
2053 error (_("Could not read event_mask."));
2055 event_mask
= strtoulst (buf
, NULL
, 16);
2057 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "SPUInfoEvent");
2059 if (ui_out_is_mi_like_p (current_uiout
))
2061 ui_out_field_fmt (current_uiout
, "event_status",
2062 "0x%s", phex_nz (event_status
, 4));
2063 ui_out_field_fmt (current_uiout
, "event_mask",
2064 "0x%s", phex_nz (event_mask
, 4));
2068 printf_filtered (_("Event Status 0x%s\n"), phex (event_status
, 4));
2069 printf_filtered (_("Event Mask 0x%s\n"), phex (event_mask
, 4));
2072 do_cleanups (chain
);
2076 info_spu_signal_command (char *args
, int from_tty
)
2078 struct frame_info
*frame
= get_selected_frame (NULL
);
2079 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2080 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2081 ULONGEST signal1
= 0;
2082 ULONGEST signal1_type
= 0;
2083 int signal1_pending
= 0;
2084 ULONGEST signal2
= 0;
2085 ULONGEST signal2_type
= 0;
2086 int signal2_pending
= 0;
2087 struct cleanup
*chain
;
2093 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2094 error (_("\"info spu\" is only supported on the SPU architecture."));
2096 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2098 xsnprintf (annex
, sizeof annex
, "%d/signal1", id
);
2099 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2101 error (_("Could not read signal1."));
2104 signal1
= extract_unsigned_integer (buf
, 4, byte_order
);
2105 signal1_pending
= 1;
2108 xsnprintf (annex
, sizeof annex
, "%d/signal1_type", id
);
2109 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2110 buf
, 0, (sizeof (buf
) - 1));
2112 error (_("Could not read signal1_type."));
2114 signal1_type
= strtoulst (buf
, NULL
, 16);
2116 xsnprintf (annex
, sizeof annex
, "%d/signal2", id
);
2117 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2119 error (_("Could not read signal2."));
2122 signal2
= extract_unsigned_integer (buf
, 4, byte_order
);
2123 signal2_pending
= 1;
2126 xsnprintf (annex
, sizeof annex
, "%d/signal2_type", id
);
2127 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2128 buf
, 0, (sizeof (buf
) - 1));
2130 error (_("Could not read signal2_type."));
2132 signal2_type
= strtoulst (buf
, NULL
, 16);
2134 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "SPUInfoSignal");
2136 if (ui_out_is_mi_like_p (current_uiout
))
2138 ui_out_field_int (current_uiout
, "signal1_pending", signal1_pending
);
2139 ui_out_field_fmt (current_uiout
, "signal1", "0x%s", phex_nz (signal1
, 4));
2140 ui_out_field_int (current_uiout
, "signal1_type", signal1_type
);
2141 ui_out_field_int (current_uiout
, "signal2_pending", signal2_pending
);
2142 ui_out_field_fmt (current_uiout
, "signal2", "0x%s", phex_nz (signal2
, 4));
2143 ui_out_field_int (current_uiout
, "signal2_type", signal2_type
);
2147 if (signal1_pending
)
2148 printf_filtered (_("Signal 1 control word 0x%s "), phex (signal1
, 4));
2150 printf_filtered (_("Signal 1 not pending "));
2153 printf_filtered (_("(Type Or)\n"));
2155 printf_filtered (_("(Type Overwrite)\n"));
2157 if (signal2_pending
)
2158 printf_filtered (_("Signal 2 control word 0x%s "), phex (signal2
, 4));
2160 printf_filtered (_("Signal 2 not pending "));
2163 printf_filtered (_("(Type Or)\n"));
2165 printf_filtered (_("(Type Overwrite)\n"));
2168 do_cleanups (chain
);
2172 info_spu_mailbox_list (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
,
2173 const char *field
, const char *msg
)
2175 struct cleanup
*chain
;
2181 chain
= make_cleanup_ui_out_table_begin_end (current_uiout
, 1, nr
, "mbox");
2183 ui_out_table_header (current_uiout
, 32, ui_left
, field
, msg
);
2184 ui_out_table_body (current_uiout
);
2186 for (i
= 0; i
< nr
; i
++)
2188 struct cleanup
*val_chain
;
2190 val_chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "mbox");
2191 val
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
2192 ui_out_field_fmt (current_uiout
, field
, "0x%s", phex (val
, 4));
2193 do_cleanups (val_chain
);
2195 if (!ui_out_is_mi_like_p (current_uiout
))
2196 printf_filtered ("\n");
2199 do_cleanups (chain
);
2203 info_spu_mailbox_command (char *args
, int from_tty
)
2205 struct frame_info
*frame
= get_selected_frame (NULL
);
2206 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2207 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2208 struct cleanup
*chain
;
2214 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2215 error (_("\"info spu\" is only supported on the SPU architecture."));
2217 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2219 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "SPUInfoMailbox");
2221 xsnprintf (annex
, sizeof annex
, "%d/mbox_info", id
);
2222 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2223 buf
, 0, sizeof buf
);
2225 error (_("Could not read mbox_info."));
2227 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2228 "mbox", "SPU Outbound Mailbox");
2230 xsnprintf (annex
, sizeof annex
, "%d/ibox_info", id
);
2231 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2232 buf
, 0, sizeof buf
);
2234 error (_("Could not read ibox_info."));
2236 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2237 "ibox", "SPU Outbound Interrupt Mailbox");
2239 xsnprintf (annex
, sizeof annex
, "%d/wbox_info", id
);
2240 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2241 buf
, 0, sizeof buf
);
2243 error (_("Could not read wbox_info."));
2245 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2246 "wbox", "SPU Inbound Mailbox");
2248 do_cleanups (chain
);
2252 spu_mfc_get_bitfield (ULONGEST word
, int first
, int last
)
2254 ULONGEST mask
= ~(~(ULONGEST
)0 << (last
- first
+ 1));
2255 return (word
>> (63 - last
)) & mask
;
2259 info_spu_dma_cmdlist (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
)
2261 static char *spu_mfc_opcode
[256] =
2263 /* 00 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2264 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2265 /* 10 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2266 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2267 /* 20 */ "put", "putb", "putf", NULL
, "putl", "putlb", "putlf", NULL
,
2268 "puts", "putbs", "putfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2269 /* 30 */ "putr", "putrb", "putrf", NULL
, "putrl", "putrlb", "putrlf", NULL
,
2270 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2271 /* 40 */ "get", "getb", "getf", NULL
, "getl", "getlb", "getlf", NULL
,
2272 "gets", "getbs", "getfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2273 /* 50 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2274 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2275 /* 60 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2276 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2277 /* 70 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2278 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2279 /* 80 */ "sdcrt", "sdcrtst", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2280 NULL
, "sdcrz", NULL
, NULL
, NULL
, "sdcrst", NULL
, "sdcrf",
2281 /* 90 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2282 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2283 /* a0 */ "sndsig", "sndsigb", "sndsigf", NULL
, NULL
, NULL
, NULL
, NULL
,
2284 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2285 /* b0 */ "putlluc", NULL
, NULL
, NULL
, "putllc", NULL
, NULL
, NULL
,
2286 "putqlluc", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2287 /* c0 */ "barrier", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2288 "mfceieio", NULL
, NULL
, NULL
, "mfcsync", NULL
, NULL
, NULL
,
2289 /* d0 */ "getllar", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2290 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2291 /* e0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2292 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2293 /* f0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2294 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2297 int *seq
= alloca (nr
* sizeof (int));
2299 struct cleanup
*chain
;
2303 /* Determine sequence in which to display (valid) entries. */
2304 for (i
= 0; i
< nr
; i
++)
2306 /* Search for the first valid entry all of whose
2307 dependencies are met. */
2308 for (j
= 0; j
< nr
; j
++)
2310 ULONGEST mfc_cq_dw3
;
2311 ULONGEST dependencies
;
2313 if (done
& (1 << (nr
- 1 - j
)))
2317 = extract_unsigned_integer (buf
+ 32*j
+ 24,8, byte_order
);
2318 if (!spu_mfc_get_bitfield (mfc_cq_dw3
, 16, 16))
2321 dependencies
= spu_mfc_get_bitfield (mfc_cq_dw3
, 0, nr
- 1);
2322 if ((dependencies
& done
) != dependencies
)
2326 done
|= 1 << (nr
- 1 - j
);
2337 chain
= make_cleanup_ui_out_table_begin_end (current_uiout
, 10, nr
,
2340 ui_out_table_header (current_uiout
, 7, ui_left
, "opcode", "Opcode");
2341 ui_out_table_header (current_uiout
, 3, ui_left
, "tag", "Tag");
2342 ui_out_table_header (current_uiout
, 3, ui_left
, "tid", "TId");
2343 ui_out_table_header (current_uiout
, 3, ui_left
, "rid", "RId");
2344 ui_out_table_header (current_uiout
, 18, ui_left
, "ea", "EA");
2345 ui_out_table_header (current_uiout
, 7, ui_left
, "lsa", "LSA");
2346 ui_out_table_header (current_uiout
, 7, ui_left
, "size", "Size");
2347 ui_out_table_header (current_uiout
, 7, ui_left
, "lstaddr", "LstAddr");
2348 ui_out_table_header (current_uiout
, 7, ui_left
, "lstsize", "LstSize");
2349 ui_out_table_header (current_uiout
, 1, ui_left
, "error_p", "E");
2351 ui_out_table_body (current_uiout
);
2353 for (i
= 0; i
< nr
; i
++)
2355 struct cleanup
*cmd_chain
;
2356 ULONGEST mfc_cq_dw0
;
2357 ULONGEST mfc_cq_dw1
;
2358 ULONGEST mfc_cq_dw2
;
2359 int mfc_cmd_opcode
, mfc_cmd_tag
, rclass_id
, tclass_id
;
2360 int list_lsa
, list_size
, mfc_lsa
, mfc_size
;
2362 int list_valid_p
, noop_valid_p
, qw_valid_p
, ea_valid_p
, cmd_error_p
;
2364 /* Decode contents of MFC Command Queue Context Save/Restore Registers.
2365 See "Cell Broadband Engine Registers V1.3", section 3.3.2.1. */
2368 = extract_unsigned_integer (buf
+ 32*seq
[i
], 8, byte_order
);
2370 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 8, 8, byte_order
);
2372 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 16, 8, byte_order
);
2374 list_lsa
= spu_mfc_get_bitfield (mfc_cq_dw0
, 0, 14);
2375 list_size
= spu_mfc_get_bitfield (mfc_cq_dw0
, 15, 26);
2376 mfc_cmd_opcode
= spu_mfc_get_bitfield (mfc_cq_dw0
, 27, 34);
2377 mfc_cmd_tag
= spu_mfc_get_bitfield (mfc_cq_dw0
, 35, 39);
2378 list_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw0
, 40, 40);
2379 rclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 41, 43);
2380 tclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 44, 46);
2382 mfc_ea
= spu_mfc_get_bitfield (mfc_cq_dw1
, 0, 51) << 12
2383 | spu_mfc_get_bitfield (mfc_cq_dw2
, 25, 36);
2385 mfc_lsa
= spu_mfc_get_bitfield (mfc_cq_dw2
, 0, 13);
2386 mfc_size
= spu_mfc_get_bitfield (mfc_cq_dw2
, 14, 24);
2387 noop_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 37, 37);
2388 qw_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 38, 38);
2389 ea_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 39, 39);
2390 cmd_error_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 40, 40);
2392 cmd_chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "cmd");
2394 if (spu_mfc_opcode
[mfc_cmd_opcode
])
2395 ui_out_field_string (current_uiout
, "opcode", spu_mfc_opcode
[mfc_cmd_opcode
]);
2397 ui_out_field_int (current_uiout
, "opcode", mfc_cmd_opcode
);
2399 ui_out_field_int (current_uiout
, "tag", mfc_cmd_tag
);
2400 ui_out_field_int (current_uiout
, "tid", tclass_id
);
2401 ui_out_field_int (current_uiout
, "rid", rclass_id
);
2404 ui_out_field_fmt (current_uiout
, "ea", "0x%s", phex (mfc_ea
, 8));
2406 ui_out_field_skip (current_uiout
, "ea");
2408 ui_out_field_fmt (current_uiout
, "lsa", "0x%05x", mfc_lsa
<< 4);
2410 ui_out_field_fmt (current_uiout
, "size", "0x%05x", mfc_size
<< 4);
2412 ui_out_field_fmt (current_uiout
, "size", "0x%05x", mfc_size
);
2416 ui_out_field_fmt (current_uiout
, "lstaddr", "0x%05x", list_lsa
<< 3);
2417 ui_out_field_fmt (current_uiout
, "lstsize", "0x%05x", list_size
<< 3);
2421 ui_out_field_skip (current_uiout
, "lstaddr");
2422 ui_out_field_skip (current_uiout
, "lstsize");
2426 ui_out_field_string (current_uiout
, "error_p", "*");
2428 ui_out_field_skip (current_uiout
, "error_p");
2430 do_cleanups (cmd_chain
);
2432 if (!ui_out_is_mi_like_p (current_uiout
))
2433 printf_filtered ("\n");
2436 do_cleanups (chain
);
2440 info_spu_dma_command (char *args
, int from_tty
)
2442 struct frame_info
*frame
= get_selected_frame (NULL
);
2443 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2444 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2445 ULONGEST dma_info_type
;
2446 ULONGEST dma_info_mask
;
2447 ULONGEST dma_info_status
;
2448 ULONGEST dma_info_stall_and_notify
;
2449 ULONGEST dma_info_atomic_command_status
;
2450 struct cleanup
*chain
;
2456 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
2457 error (_("\"info spu\" is only supported on the SPU architecture."));
2459 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2461 xsnprintf (annex
, sizeof annex
, "%d/dma_info", id
);
2462 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2463 buf
, 0, 40 + 16 * 32);
2465 error (_("Could not read dma_info."));
2468 = extract_unsigned_integer (buf
, 8, byte_order
);
2470 = extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2472 = extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2473 dma_info_stall_and_notify
2474 = extract_unsigned_integer (buf
+ 24, 8, byte_order
);
2475 dma_info_atomic_command_status
2476 = extract_unsigned_integer (buf
+ 32, 8, byte_order
);
2478 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "SPUInfoDMA");
2480 if (ui_out_is_mi_like_p (current_uiout
))
2482 ui_out_field_fmt (current_uiout
, "dma_info_type", "0x%s",
2483 phex_nz (dma_info_type
, 4));
2484 ui_out_field_fmt (current_uiout
, "dma_info_mask", "0x%s",
2485 phex_nz (dma_info_mask
, 4));
2486 ui_out_field_fmt (current_uiout
, "dma_info_status", "0x%s",
2487 phex_nz (dma_info_status
, 4));
2488 ui_out_field_fmt (current_uiout
, "dma_info_stall_and_notify", "0x%s",
2489 phex_nz (dma_info_stall_and_notify
, 4));
2490 ui_out_field_fmt (current_uiout
, "dma_info_atomic_command_status", "0x%s",
2491 phex_nz (dma_info_atomic_command_status
, 4));
2495 const char *query_msg
= _("no query pending");
2497 if (dma_info_type
& 4)
2498 switch (dma_info_type
& 3)
2500 case 1: query_msg
= _("'any' query pending"); break;
2501 case 2: query_msg
= _("'all' query pending"); break;
2502 default: query_msg
= _("undefined query type"); break;
2505 printf_filtered (_("Tag-Group Status 0x%s\n"),
2506 phex (dma_info_status
, 4));
2507 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2508 phex (dma_info_mask
, 4), query_msg
);
2509 printf_filtered (_("Stall-and-Notify 0x%s\n"),
2510 phex (dma_info_stall_and_notify
, 4));
2511 printf_filtered (_("Atomic Cmd Status 0x%s\n"),
2512 phex (dma_info_atomic_command_status
, 4));
2513 printf_filtered ("\n");
2516 info_spu_dma_cmdlist (buf
+ 40, 16, byte_order
);
2517 do_cleanups (chain
);
2521 info_spu_proxydma_command (char *args
, int from_tty
)
2523 struct frame_info
*frame
= get_selected_frame (NULL
);
2524 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2525 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2526 ULONGEST dma_info_type
;
2527 ULONGEST dma_info_mask
;
2528 ULONGEST dma_info_status
;
2529 struct cleanup
*chain
;
2535 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2536 error (_("\"info spu\" is only supported on the SPU architecture."));
2538 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2540 xsnprintf (annex
, sizeof annex
, "%d/proxydma_info", id
);
2541 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2542 buf
, 0, 24 + 8 * 32);
2544 error (_("Could not read proxydma_info."));
2546 dma_info_type
= extract_unsigned_integer (buf
, 8, byte_order
);
2547 dma_info_mask
= extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2548 dma_info_status
= extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2550 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
,
2553 if (ui_out_is_mi_like_p (current_uiout
))
2555 ui_out_field_fmt (current_uiout
, "proxydma_info_type", "0x%s",
2556 phex_nz (dma_info_type
, 4));
2557 ui_out_field_fmt (current_uiout
, "proxydma_info_mask", "0x%s",
2558 phex_nz (dma_info_mask
, 4));
2559 ui_out_field_fmt (current_uiout
, "proxydma_info_status", "0x%s",
2560 phex_nz (dma_info_status
, 4));
2564 const char *query_msg
;
2566 switch (dma_info_type
& 3)
2568 case 0: query_msg
= _("no query pending"); break;
2569 case 1: query_msg
= _("'any' query pending"); break;
2570 case 2: query_msg
= _("'all' query pending"); break;
2571 default: query_msg
= _("undefined query type"); break;
2574 printf_filtered (_("Tag-Group Status 0x%s\n"),
2575 phex (dma_info_status
, 4));
2576 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2577 phex (dma_info_mask
, 4), query_msg
);
2578 printf_filtered ("\n");
2581 info_spu_dma_cmdlist (buf
+ 24, 8, byte_order
);
2582 do_cleanups (chain
);
2586 info_spu_command (char *args
, int from_tty
)
2588 printf_unfiltered (_("\"info spu\" must be followed by "
2589 "the name of an SPU facility.\n"));
2590 help_list (infospucmdlist
, "info spu ", -1, gdb_stdout
);
2594 /* Root of all "set spu "/"show spu " commands. */
2597 show_spu_command (char *args
, int from_tty
)
2599 help_list (showspucmdlist
, "show spu ", all_commands
, gdb_stdout
);
2603 set_spu_command (char *args
, int from_tty
)
2605 help_list (setspucmdlist
, "set spu ", all_commands
, gdb_stdout
);
2609 show_spu_stop_on_load (struct ui_file
*file
, int from_tty
,
2610 struct cmd_list_element
*c
, const char *value
)
2612 fprintf_filtered (file
, _("Stopping for new SPE threads is %s.\n"),
2617 show_spu_auto_flush_cache (struct ui_file
*file
, int from_tty
,
2618 struct cmd_list_element
*c
, const char *value
)
2620 fprintf_filtered (file
, _("Automatic software-cache flush is %s.\n"),
2625 /* Set up gdbarch struct. */
2627 static struct gdbarch
*
2628 spu_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2630 struct gdbarch
*gdbarch
;
2631 struct gdbarch_tdep
*tdep
;
2634 /* Which spufs ID was requested as address space? */
2636 id
= *(int *)info
.tdep_info
;
2637 /* For objfile architectures of SPU solibs, decode the ID from the name.
2638 This assumes the filename convention employed by solib-spu.c. */
2641 char *name
= strrchr (info
.abfd
->filename
, '@');
2643 sscanf (name
, "@0x%*x <%d>", &id
);
2646 /* Find a candidate among extant architectures. */
2647 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2649 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2651 tdep
= gdbarch_tdep (arches
->gdbarch
);
2652 if (tdep
&& tdep
->id
== id
)
2653 return arches
->gdbarch
;
2656 /* None found, so create a new architecture. */
2657 tdep
= XCALLOC (1, struct gdbarch_tdep
);
2659 gdbarch
= gdbarch_alloc (&info
, tdep
);
2662 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_spu
);
2665 set_gdbarch_num_regs (gdbarch
, SPU_NUM_REGS
);
2666 set_gdbarch_num_pseudo_regs (gdbarch
, SPU_NUM_PSEUDO_REGS
);
2667 set_gdbarch_sp_regnum (gdbarch
, SPU_SP_REGNUM
);
2668 set_gdbarch_pc_regnum (gdbarch
, SPU_PC_REGNUM
);
2669 set_gdbarch_read_pc (gdbarch
, spu_read_pc
);
2670 set_gdbarch_write_pc (gdbarch
, spu_write_pc
);
2671 set_gdbarch_register_name (gdbarch
, spu_register_name
);
2672 set_gdbarch_register_type (gdbarch
, spu_register_type
);
2673 set_gdbarch_pseudo_register_read (gdbarch
, spu_pseudo_register_read
);
2674 set_gdbarch_pseudo_register_write (gdbarch
, spu_pseudo_register_write
);
2675 set_gdbarch_value_from_register (gdbarch
, spu_value_from_register
);
2676 set_gdbarch_register_reggroup_p (gdbarch
, spu_register_reggroup_p
);
2679 set_gdbarch_char_signed (gdbarch
, 0);
2680 set_gdbarch_ptr_bit (gdbarch
, 32);
2681 set_gdbarch_addr_bit (gdbarch
, 32);
2682 set_gdbarch_short_bit (gdbarch
, 16);
2683 set_gdbarch_int_bit (gdbarch
, 32);
2684 set_gdbarch_long_bit (gdbarch
, 32);
2685 set_gdbarch_long_long_bit (gdbarch
, 64);
2686 set_gdbarch_float_bit (gdbarch
, 32);
2687 set_gdbarch_double_bit (gdbarch
, 64);
2688 set_gdbarch_long_double_bit (gdbarch
, 64);
2689 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
2690 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
2691 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
2693 /* Address handling. */
2694 set_gdbarch_address_to_pointer (gdbarch
, spu_address_to_pointer
);
2695 set_gdbarch_pointer_to_address (gdbarch
, spu_pointer_to_address
);
2696 set_gdbarch_integer_to_address (gdbarch
, spu_integer_to_address
);
2697 set_gdbarch_address_class_type_flags (gdbarch
, spu_address_class_type_flags
);
2698 set_gdbarch_address_class_type_flags_to_name
2699 (gdbarch
, spu_address_class_type_flags_to_name
);
2700 set_gdbarch_address_class_name_to_type_flags
2701 (gdbarch
, spu_address_class_name_to_type_flags
);
2704 /* Inferior function calls. */
2705 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
2706 set_gdbarch_frame_align (gdbarch
, spu_frame_align
);
2707 set_gdbarch_frame_red_zone_size (gdbarch
, 2000);
2708 set_gdbarch_push_dummy_code (gdbarch
, spu_push_dummy_code
);
2709 set_gdbarch_push_dummy_call (gdbarch
, spu_push_dummy_call
);
2710 set_gdbarch_dummy_id (gdbarch
, spu_dummy_id
);
2711 set_gdbarch_return_value (gdbarch
, spu_return_value
);
2713 /* Frame handling. */
2714 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2715 frame_unwind_append_unwinder (gdbarch
, &spu_frame_unwind
);
2716 frame_base_set_default (gdbarch
, &spu_frame_base
);
2717 set_gdbarch_unwind_pc (gdbarch
, spu_unwind_pc
);
2718 set_gdbarch_unwind_sp (gdbarch
, spu_unwind_sp
);
2719 set_gdbarch_virtual_frame_pointer (gdbarch
, spu_virtual_frame_pointer
);
2720 set_gdbarch_frame_args_skip (gdbarch
, 0);
2721 set_gdbarch_skip_prologue (gdbarch
, spu_skip_prologue
);
2722 set_gdbarch_in_function_epilogue_p (gdbarch
, spu_in_function_epilogue_p
);
2724 /* Cell/B.E. cross-architecture unwinder support. */
2725 frame_unwind_prepend_unwinder (gdbarch
, &spu2ppu_unwind
);
2728 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
2729 set_gdbarch_breakpoint_from_pc (gdbarch
, spu_breakpoint_from_pc
);
2730 set_gdbarch_memory_remove_breakpoint (gdbarch
, spu_memory_remove_breakpoint
);
2731 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
2732 set_gdbarch_software_single_step (gdbarch
, spu_software_single_step
);
2733 set_gdbarch_get_longjmp_target (gdbarch
, spu_get_longjmp_target
);
2736 set_gdbarch_overlay_update (gdbarch
, spu_overlay_update
);
2741 /* Provide a prototype to silence -Wmissing-prototypes. */
2742 extern initialize_file_ftype _initialize_spu_tdep
;
2745 _initialize_spu_tdep (void)
2747 register_gdbarch_init (bfd_arch_spu
, spu_gdbarch_init
);
2749 /* Add ourselves to objfile event chain. */
2750 observer_attach_new_objfile (spu_overlay_new_objfile
);
2751 spu_overlay_data
= register_objfile_data ();
2753 /* Install spu stop-on-load handler. */
2754 observer_attach_new_objfile (spu_catch_start
);
2756 /* Add ourselves to normal_stop event chain. */
2757 observer_attach_normal_stop (spu_attach_normal_stop
);
2759 /* Add root prefix command for all "set spu"/"show spu" commands. */
2760 add_prefix_cmd ("spu", no_class
, set_spu_command
,
2761 _("Various SPU specific commands."),
2762 &setspucmdlist
, "set spu ", 0, &setlist
);
2763 add_prefix_cmd ("spu", no_class
, show_spu_command
,
2764 _("Various SPU specific commands."),
2765 &showspucmdlist
, "show spu ", 0, &showlist
);
2767 /* Toggle whether or not to add a temporary breakpoint at the "main"
2768 function of new SPE contexts. */
2769 add_setshow_boolean_cmd ("stop-on-load", class_support
,
2770 &spu_stop_on_load_p
, _("\
2771 Set whether to stop for new SPE threads."),
2773 Show whether to stop for new SPE threads."),
2775 Use \"on\" to give control to the user when a new SPE thread\n\
2776 enters its \"main\" function.\n\
2777 Use \"off\" to disable stopping for new SPE threads."),
2779 show_spu_stop_on_load
,
2780 &setspucmdlist
, &showspucmdlist
);
2782 /* Toggle whether or not to automatically flush the software-managed
2783 cache whenever SPE execution stops. */
2784 add_setshow_boolean_cmd ("auto-flush-cache", class_support
,
2785 &spu_auto_flush_cache_p
, _("\
2786 Set whether to automatically flush the software-managed cache."),
2788 Show whether to automatically flush the software-managed cache."),
2790 Use \"on\" to automatically flush the software-managed cache\n\
2791 whenever SPE execution stops.\n\
2792 Use \"off\" to never automatically flush the software-managed cache."),
2794 show_spu_auto_flush_cache
,
2795 &setspucmdlist
, &showspucmdlist
);
2797 /* Add root prefix command for all "info spu" commands. */
2798 add_prefix_cmd ("spu", class_info
, info_spu_command
,
2799 _("Various SPU specific commands."),
2800 &infospucmdlist
, "info spu ", 0, &infolist
);
2802 /* Add various "info spu" commands. */
2803 add_cmd ("event", class_info
, info_spu_event_command
,
2804 _("Display SPU event facility status.\n"),
2806 add_cmd ("signal", class_info
, info_spu_signal_command
,
2807 _("Display SPU signal notification facility status.\n"),
2809 add_cmd ("mailbox", class_info
, info_spu_mailbox_command
,
2810 _("Display SPU mailbox facility status.\n"),
2812 add_cmd ("dma", class_info
, info_spu_dma_command
,
2813 _("Display MFC DMA status.\n"),
2815 add_cmd ("proxydma", class_info
, info_spu_proxydma_command
,
2816 _("Display MFC Proxy-DMA status.\n"),