1 /* SPU target-dependent code for GDB, the GNU debugger.
2 Copyright (C) 2006, 2007 Free Software Foundation, Inc.
4 Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
5 Based on a port by Sid Manning <sid@us.ibm.com>.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street, Fifth Floor,
22 Boston, MA 02110-1301, USA. */
25 #include "arch-utils.h"
29 #include "gdb_string.h"
30 #include "gdb_assert.h"
32 #include "frame-unwind.h"
33 #include "frame-base.h"
34 #include "trad-frame.h"
43 #include "reggroups.h"
44 #include "floatformat.h"
49 /* SPU-specific vector type. */
50 struct type
*spu_builtin_type_vec128
;
55 spu_register_name (int reg_nr
)
57 static char *register_names
[] =
59 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
60 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
61 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
62 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
63 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
64 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
65 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
66 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
67 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
68 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
69 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
70 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
71 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
72 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
73 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
74 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
80 if (reg_nr
>= sizeof register_names
/ sizeof *register_names
)
83 return register_names
[reg_nr
];
87 spu_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
89 if (reg_nr
< SPU_NUM_GPRS
)
90 return spu_builtin_type_vec128
;
95 return builtin_type_uint32
;
98 return builtin_type_void_func_ptr
;
101 return builtin_type_void_data_ptr
;
104 internal_error (__FILE__
, __LINE__
, "invalid regnum");
108 /* Pseudo registers for preferred slots - stack pointer. */
111 spu_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
112 int regnum
, gdb_byte
*buf
)
119 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
120 memcpy (buf
, reg
, 4);
124 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
129 spu_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
130 int regnum
, const gdb_byte
*buf
)
137 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
138 memcpy (reg
, buf
, 4);
139 regcache_raw_write (regcache
, SPU_RAW_SP_REGNUM
, reg
);
143 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
147 /* Value conversion -- access scalar values at the preferred slot. */
149 static struct value
*
150 spu_value_from_register (struct type
*type
, int regnum
,
151 struct frame_info
*frame
)
153 struct value
*value
= default_value_from_register (type
, regnum
, frame
);
154 int len
= TYPE_LENGTH (type
);
156 if (regnum
< SPU_NUM_GPRS
&& len
< 16)
158 int preferred_slot
= len
< 4 ? 4 - len
: 0;
159 set_value_offset (value
, preferred_slot
);
165 /* Register groups. */
168 spu_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
169 struct reggroup
*group
)
171 /* Registers displayed via 'info regs'. */
172 if (group
== general_reggroup
)
175 /* Registers displayed via 'info float'. */
176 if (group
== float_reggroup
)
179 /* Registers that need to be saved/restored in order to
180 push or pop frames. */
181 if (group
== save_reggroup
|| group
== restore_reggroup
)
184 return default_register_reggroup_p (gdbarch
, regnum
, group
);
188 /* Decoding SPU instructions. */
225 is_rr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
)
227 if ((insn
>> 21) == op
)
230 *ra
= (insn
>> 7) & 127;
231 *rb
= (insn
>> 14) & 127;
239 is_rrr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
, int *rc
)
241 if ((insn
>> 28) == op
)
243 *rt
= (insn
>> 21) & 127;
244 *ra
= (insn
>> 7) & 127;
245 *rb
= (insn
>> 14) & 127;
254 is_ri7 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i7
)
256 if ((insn
>> 21) == op
)
259 *ra
= (insn
>> 7) & 127;
260 *i7
= (((insn
>> 14) & 127) ^ 0x40) - 0x40;
268 is_ri10 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i10
)
270 if ((insn
>> 24) == op
)
273 *ra
= (insn
>> 7) & 127;
274 *i10
= (((insn
>> 14) & 0x3ff) ^ 0x200) - 0x200;
282 is_ri16 (unsigned int insn
, int op
, int *rt
, int *i16
)
284 if ((insn
>> 23) == op
)
287 *i16
= (((insn
>> 7) & 0xffff) ^ 0x8000) - 0x8000;
295 is_ri18 (unsigned int insn
, int op
, int *rt
, int *i18
)
297 if ((insn
>> 25) == op
)
300 *i18
= (((insn
>> 7) & 0x3ffff) ^ 0x20000) - 0x20000;
308 is_branch (unsigned int insn
, int *offset
, int *reg
)
312 if (is_ri16 (insn
, op_br
, &rt
, &i16
)
313 || is_ri16 (insn
, op_brsl
, &rt
, &i16
)
314 || is_ri16 (insn
, op_brnz
, &rt
, &i16
)
315 || is_ri16 (insn
, op_brz
, &rt
, &i16
)
316 || is_ri16 (insn
, op_brhnz
, &rt
, &i16
)
317 || is_ri16 (insn
, op_brhz
, &rt
, &i16
))
319 *reg
= SPU_PC_REGNUM
;
324 if (is_ri16 (insn
, op_bra
, &rt
, &i16
)
325 || is_ri16 (insn
, op_brasl
, &rt
, &i16
))
332 if (is_ri7 (insn
, op_bi
, &rt
, reg
, &i7
)
333 || is_ri7 (insn
, op_bisl
, &rt
, reg
, &i7
)
334 || is_ri7 (insn
, op_biz
, &rt
, reg
, &i7
)
335 || is_ri7 (insn
, op_binz
, &rt
, reg
, &i7
)
336 || is_ri7 (insn
, op_bihz
, &rt
, reg
, &i7
)
337 || is_ri7 (insn
, op_bihnz
, &rt
, reg
, &i7
))
347 /* Prolog parsing. */
349 struct spu_prologue_data
351 /* Stack frame size. -1 if analysis was unsuccessful. */
354 /* How to find the CFA. The CFA is equal to SP at function entry. */
358 /* Offset relative to CFA where a register is saved. -1 if invalid. */
359 int reg_offset
[SPU_NUM_GPRS
];
363 spu_analyze_prologue (CORE_ADDR start_pc
, CORE_ADDR end_pc
,
364 struct spu_prologue_data
*data
)
369 int reg_immed
[SPU_NUM_GPRS
];
371 CORE_ADDR prolog_pc
= start_pc
;
376 /* Initialize DATA to default values. */
379 data
->cfa_reg
= SPU_RAW_SP_REGNUM
;
380 data
->cfa_offset
= 0;
382 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
383 data
->reg_offset
[i
] = -1;
385 /* Set up REG_IMMED array. This is non-zero for a register if we know its
386 preferred slot currently holds this immediate value. */
387 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
390 /* Scan instructions until the first branch.
392 The following instructions are important prolog components:
394 - The first instruction to set up the stack pointer.
395 - The first instruction to set up the frame pointer.
396 - The first instruction to save the link register.
398 We return the instruction after the latest of these three,
399 or the incoming PC if none is found. The first instruction
400 to set up the stack pointer also defines the frame size.
402 Note that instructions saving incoming arguments to their stack
403 slots are not counted as important, because they are hard to
404 identify with certainty. This should not matter much, because
405 arguments are relevant only in code compiled with debug data,
406 and in such code the GDB core will advance until the first source
407 line anyway, using SAL data.
409 For purposes of stack unwinding, we analyze the following types
410 of instructions in addition:
412 - Any instruction adding to the current frame pointer.
413 - Any instruction loading an immediate constant into a register.
414 - Any instruction storing a register onto the stack.
416 These are used to compute the CFA and REG_OFFSET output. */
418 for (pc
= start_pc
; pc
< end_pc
; pc
+= 4)
421 int rt
, ra
, rb
, rc
, immed
;
423 if (target_read_memory (pc
, buf
, 4))
425 insn
= extract_unsigned_integer (buf
, 4);
427 /* AI is the typical instruction to set up a stack frame.
428 It is also used to initialize the frame pointer. */
429 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
))
431 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
432 data
->cfa_offset
-= immed
;
434 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
442 else if (rt
== SPU_FP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
448 data
->cfa_reg
= SPU_FP_REGNUM
;
449 data
->cfa_offset
-= immed
;
453 /* A is used to set up stack frames of size >= 512 bytes.
454 If we have tracked the contents of the addend register,
455 we can handle this as well. */
456 else if (is_rr (insn
, op_a
, &rt
, &ra
, &rb
))
458 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
460 if (reg_immed
[rb
] != 0)
461 data
->cfa_offset
-= reg_immed
[rb
];
463 data
->cfa_reg
= -1; /* We don't know the CFA any more. */
466 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
472 if (reg_immed
[rb
] != 0)
473 data
->size
= -reg_immed
[rb
];
477 /* We need to track IL and ILA used to load immediate constants
478 in case they are later used as input to an A instruction. */
479 else if (is_ri16 (insn
, op_il
, &rt
, &immed
))
481 reg_immed
[rt
] = immed
;
483 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
487 else if (is_ri18 (insn
, op_ila
, &rt
, &immed
))
489 reg_immed
[rt
] = immed
& 0x3ffff;
491 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
495 /* STQD is used to save registers to the stack. */
496 else if (is_ri10 (insn
, op_stqd
, &rt
, &ra
, &immed
))
498 if (ra
== data
->cfa_reg
)
499 data
->reg_offset
[rt
] = data
->cfa_offset
- (immed
<< 4);
501 if (ra
== data
->cfa_reg
&& rt
== SPU_LR_REGNUM
509 /* _start uses SELB to set up the stack pointer. */
510 else if (is_rrr (insn
, op_selb
, &rt
, &ra
, &rb
, &rc
))
512 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
516 /* We terminate if we find a branch. */
517 else if (is_branch (insn
, &immed
, &ra
))
522 /* If we successfully parsed until here, and didn't find any instruction
523 modifying SP, we assume we have a frameless function. */
527 /* Return cooked instead of raw SP. */
528 if (data
->cfa_reg
== SPU_RAW_SP_REGNUM
)
529 data
->cfa_reg
= SPU_SP_REGNUM
;
534 /* Return the first instruction after the prologue starting at PC. */
536 spu_skip_prologue (CORE_ADDR pc
)
538 struct spu_prologue_data data
;
539 return spu_analyze_prologue (pc
, (CORE_ADDR
)-1, &data
);
542 /* Return the frame pointer in use at address PC. */
544 spu_virtual_frame_pointer (CORE_ADDR pc
, int *reg
, LONGEST
*offset
)
546 struct spu_prologue_data data
;
547 spu_analyze_prologue (pc
, (CORE_ADDR
)-1, &data
);
549 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
551 /* The 'frame pointer' address is CFA minus frame size. */
553 *offset
= data
.cfa_offset
- data
.size
;
557 /* ??? We don't really know ... */
558 *reg
= SPU_SP_REGNUM
;
563 /* Return true if we are in the function's epilogue, i.e. after the
564 instruction that destroyed the function's stack frame.
566 1) scan forward from the point of execution:
567 a) If you find an instruction that modifies the stack pointer
568 or transfers control (except a return), execution is not in
570 b) Stop scanning if you find a return instruction or reach the
571 end of the function or reach the hard limit for the size of
573 2) scan backward from the point of execution:
574 a) If you find an instruction that modifies the stack pointer,
575 execution *is* in an epilogue, return.
576 b) Stop scanning if you reach an instruction that transfers
577 control or the beginning of the function or reach the hard
578 limit for the size of an epilogue. */
581 spu_in_function_epilogue_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
583 CORE_ADDR scan_pc
, func_start
, func_end
, epilogue_start
, epilogue_end
;
586 int rt
, ra
, rb
, rc
, immed
;
588 /* Find the search limits based on function boundaries and hard limit.
589 We assume the epilogue can be up to 64 instructions long. */
591 const int spu_max_epilogue_size
= 64 * 4;
593 if (!find_pc_partial_function (pc
, NULL
, &func_start
, &func_end
))
596 if (pc
- func_start
< spu_max_epilogue_size
)
597 epilogue_start
= func_start
;
599 epilogue_start
= pc
- spu_max_epilogue_size
;
601 if (func_end
- pc
< spu_max_epilogue_size
)
602 epilogue_end
= func_end
;
604 epilogue_end
= pc
+ spu_max_epilogue_size
;
606 /* Scan forward until next 'bi $0'. */
608 for (scan_pc
= pc
; scan_pc
< epilogue_end
; scan_pc
+= 4)
610 if (target_read_memory (scan_pc
, buf
, 4))
612 insn
= extract_unsigned_integer (buf
, 4);
614 if (is_branch (insn
, &immed
, &ra
))
616 if (immed
== 0 && ra
== SPU_LR_REGNUM
)
622 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
623 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
624 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
626 if (rt
== SPU_RAW_SP_REGNUM
)
631 if (scan_pc
>= epilogue_end
)
634 /* Scan backward until adjustment to stack pointer (R1). */
636 for (scan_pc
= pc
- 4; scan_pc
>= epilogue_start
; scan_pc
-= 4)
638 if (target_read_memory (scan_pc
, buf
, 4))
640 insn
= extract_unsigned_integer (buf
, 4);
642 if (is_branch (insn
, &immed
, &ra
))
645 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
646 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
647 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
649 if (rt
== SPU_RAW_SP_REGNUM
)
658 /* Normal stack frames. */
660 struct spu_unwind_cache
663 CORE_ADDR frame_base
;
664 CORE_ADDR local_base
;
666 struct trad_frame_saved_reg
*saved_regs
;
669 static struct spu_unwind_cache
*
670 spu_frame_unwind_cache (struct frame_info
*next_frame
,
671 void **this_prologue_cache
)
673 struct spu_unwind_cache
*info
;
674 struct spu_prologue_data data
;
677 if (*this_prologue_cache
)
678 return *this_prologue_cache
;
680 info
= FRAME_OBSTACK_ZALLOC (struct spu_unwind_cache
);
681 *this_prologue_cache
= info
;
682 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
683 info
->frame_base
= 0;
684 info
->local_base
= 0;
686 /* Find the start of the current function, and analyze its prologue. */
687 info
->func
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
690 /* Fall back to using the current PC as frame ID. */
691 info
->func
= frame_pc_unwind (next_frame
);
695 spu_analyze_prologue (info
->func
, frame_pc_unwind (next_frame
), &data
);
698 /* If successful, use prologue analysis data. */
699 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
704 /* Determine CFA via unwound CFA_REG plus CFA_OFFSET. */
705 frame_unwind_register (next_frame
, data
.cfa_reg
, buf
);
706 cfa
= extract_unsigned_integer (buf
, 4) + data
.cfa_offset
;
708 /* Call-saved register slots. */
709 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
710 if (i
== SPU_LR_REGNUM
711 || (i
>= SPU_SAVED1_REGNUM
&& i
<= SPU_SAVEDN_REGNUM
))
712 if (data
.reg_offset
[i
] != -1)
713 info
->saved_regs
[i
].addr
= cfa
- data
.reg_offset
[i
];
716 info
->frame_base
= cfa
;
717 info
->local_base
= cfa
- data
.size
;
720 /* Otherwise, fall back to reading the backchain link. */
723 CORE_ADDR reg
, backchain
;
725 /* Get the backchain. */
726 reg
= frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
727 backchain
= read_memory_unsigned_integer (reg
, 4);
729 /* A zero backchain terminates the frame chain. Also, sanity
730 check against the local store size limit. */
731 if (backchain
!= 0 && backchain
< SPU_LS_SIZE
)
733 /* Assume the link register is saved into its slot. */
734 if (backchain
+ 16 < SPU_LS_SIZE
)
735 info
->saved_regs
[SPU_LR_REGNUM
].addr
= backchain
+ 16;
738 info
->frame_base
= backchain
;
739 info
->local_base
= reg
;
743 /* The previous SP is equal to the CFA. */
744 trad_frame_set_value (info
->saved_regs
, SPU_SP_REGNUM
, info
->frame_base
);
746 /* Read full contents of the unwound link register in order to
747 be able to determine the return address. */
748 if (trad_frame_addr_p (info
->saved_regs
, SPU_LR_REGNUM
))
749 target_read_memory (info
->saved_regs
[SPU_LR_REGNUM
].addr
, buf
, 16);
751 frame_unwind_register (next_frame
, SPU_LR_REGNUM
, buf
);
753 /* Normally, the return address is contained in the slot 0 of the
754 link register, and slots 1-3 are zero. For an overlay return,
755 slot 0 contains the address of the overlay manager return stub,
756 slot 1 contains the partition number of the overlay section to
757 be returned to, and slot 2 contains the return address within
758 that section. Return the latter address in that case. */
759 if (extract_unsigned_integer (buf
+ 8, 4) != 0)
760 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
761 extract_unsigned_integer (buf
+ 8, 4));
763 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
764 extract_unsigned_integer (buf
, 4));
770 spu_frame_this_id (struct frame_info
*next_frame
,
771 void **this_prologue_cache
, struct frame_id
*this_id
)
773 struct spu_unwind_cache
*info
=
774 spu_frame_unwind_cache (next_frame
, this_prologue_cache
);
776 if (info
->frame_base
== 0)
779 *this_id
= frame_id_build (info
->frame_base
, info
->func
);
783 spu_frame_prev_register (struct frame_info
*next_frame
,
784 void **this_prologue_cache
,
785 int regnum
, int *optimizedp
,
786 enum lval_type
*lvalp
, CORE_ADDR
* addrp
,
787 int *realnump
, gdb_byte
*bufferp
)
789 struct spu_unwind_cache
*info
790 = spu_frame_unwind_cache (next_frame
, this_prologue_cache
);
792 /* Special-case the stack pointer. */
793 if (regnum
== SPU_RAW_SP_REGNUM
)
794 regnum
= SPU_SP_REGNUM
;
796 trad_frame_get_prev_register (next_frame
, info
->saved_regs
, regnum
,
797 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
800 static const struct frame_unwind spu_frame_unwind
= {
803 spu_frame_prev_register
806 const struct frame_unwind
*
807 spu_frame_sniffer (struct frame_info
*next_frame
)
809 return &spu_frame_unwind
;
813 spu_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
815 struct spu_unwind_cache
*info
816 = spu_frame_unwind_cache (next_frame
, this_cache
);
817 return info
->local_base
;
820 static const struct frame_base spu_frame_base
= {
822 spu_frame_base_address
,
823 spu_frame_base_address
,
824 spu_frame_base_address
828 spu_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
830 CORE_ADDR pc
= frame_unwind_register_unsigned (next_frame
, SPU_PC_REGNUM
);
831 /* Mask off interrupt enable bit. */
836 spu_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
838 return frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
842 spu_read_pc (ptid_t ptid
)
844 CORE_ADDR pc
= read_register_pid (SPU_PC_REGNUM
, ptid
);
845 /* Mask off interrupt enable bit. */
850 spu_write_pc (CORE_ADDR pc
, ptid_t ptid
)
852 /* Keep interrupt enabled state unchanged. */
853 CORE_ADDR old_pc
= read_register_pid (SPU_PC_REGNUM
, ptid
);
854 write_register_pid (SPU_PC_REGNUM
, (pc
& -4) | (old_pc
& 3), ptid
);
858 /* Function calling convention. */
861 spu_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
867 spu_scalar_value_p (struct type
*type
)
869 switch (TYPE_CODE (type
))
873 case TYPE_CODE_RANGE
:
878 return TYPE_LENGTH (type
) <= 16;
886 spu_value_to_regcache (struct regcache
*regcache
, int regnum
,
887 struct type
*type
, const gdb_byte
*in
)
889 int len
= TYPE_LENGTH (type
);
891 if (spu_scalar_value_p (type
))
893 int preferred_slot
= len
< 4 ? 4 - len
: 0;
894 regcache_cooked_write_part (regcache
, regnum
, preferred_slot
, len
, in
);
900 regcache_cooked_write (regcache
, regnum
++, in
);
906 regcache_cooked_write_part (regcache
, regnum
, 0, len
, in
);
911 spu_regcache_to_value (struct regcache
*regcache
, int regnum
,
912 struct type
*type
, gdb_byte
*out
)
914 int len
= TYPE_LENGTH (type
);
916 if (spu_scalar_value_p (type
))
918 int preferred_slot
= len
< 4 ? 4 - len
: 0;
919 regcache_cooked_read_part (regcache
, regnum
, preferred_slot
, len
, out
);
925 regcache_cooked_read (regcache
, regnum
++, out
);
931 regcache_cooked_read_part (regcache
, regnum
, 0, len
, out
);
936 spu_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
937 struct regcache
*regcache
, CORE_ADDR bp_addr
,
938 int nargs
, struct value
**args
, CORE_ADDR sp
,
939 int struct_return
, CORE_ADDR struct_addr
)
942 int regnum
= SPU_ARG1_REGNUM
;
946 /* Set the return address. */
947 memset (buf
, 0, sizeof buf
);
948 store_unsigned_integer (buf
, 4, bp_addr
);
949 regcache_cooked_write (regcache
, SPU_LR_REGNUM
, buf
);
951 /* If STRUCT_RETURN is true, then the struct return address (in
952 STRUCT_ADDR) will consume the first argument-passing register.
953 Both adjust the register count and store that value. */
956 memset (buf
, 0, sizeof buf
);
957 store_unsigned_integer (buf
, 4, struct_addr
);
958 regcache_cooked_write (regcache
, regnum
++, buf
);
961 /* Fill in argument registers. */
962 for (i
= 0; i
< nargs
; i
++)
964 struct value
*arg
= args
[i
];
965 struct type
*type
= check_typedef (value_type (arg
));
966 const gdb_byte
*contents
= value_contents (arg
);
967 int len
= TYPE_LENGTH (type
);
968 int n_regs
= align_up (len
, 16) / 16;
970 /* If the argument doesn't wholly fit into registers, it and
971 all subsequent arguments go to the stack. */
972 if (regnum
+ n_regs
- 1 > SPU_ARGN_REGNUM
)
978 spu_value_to_regcache (regcache
, regnum
, type
, contents
);
982 /* Overflow arguments go to the stack. */
987 /* Allocate all required stack size. */
988 for (i
= stack_arg
; i
< nargs
; i
++)
990 struct type
*type
= check_typedef (value_type (args
[i
]));
991 sp
-= align_up (TYPE_LENGTH (type
), 16);
994 /* Fill in stack arguments. */
996 for (i
= stack_arg
; i
< nargs
; i
++)
998 struct value
*arg
= args
[i
];
999 struct type
*type
= check_typedef (value_type (arg
));
1000 int len
= TYPE_LENGTH (type
);
1003 if (spu_scalar_value_p (type
))
1004 preferred_slot
= len
< 4 ? 4 - len
: 0;
1008 target_write_memory (ap
+ preferred_slot
, value_contents (arg
), len
);
1009 ap
+= align_up (TYPE_LENGTH (type
), 16);
1013 /* Allocate stack frame header. */
1016 /* Store stack back chain. */
1017 regcache_cooked_read (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1018 target_write_memory (sp
, buf
, 16);
1020 /* Finally, update the SP register. */
1021 regcache_cooked_write_unsigned (regcache
, SPU_SP_REGNUM
, sp
);
1026 static struct frame_id
1027 spu_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1029 return frame_id_build (spu_unwind_sp (gdbarch
, next_frame
),
1030 spu_unwind_pc (gdbarch
, next_frame
));
1033 /* Function return value access. */
1035 static enum return_value_convention
1036 spu_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1037 struct regcache
*regcache
, gdb_byte
*out
, const gdb_byte
*in
)
1039 enum return_value_convention rvc
;
1041 if (TYPE_LENGTH (type
) <= (SPU_ARGN_REGNUM
- SPU_ARG1_REGNUM
+ 1) * 16)
1042 rvc
= RETURN_VALUE_REGISTER_CONVENTION
;
1044 rvc
= RETURN_VALUE_STRUCT_CONVENTION
;
1050 case RETURN_VALUE_REGISTER_CONVENTION
:
1051 spu_value_to_regcache (regcache
, SPU_ARG1_REGNUM
, type
, in
);
1054 case RETURN_VALUE_STRUCT_CONVENTION
:
1055 error ("Cannot set function return value.");
1063 case RETURN_VALUE_REGISTER_CONVENTION
:
1064 spu_regcache_to_value (regcache
, SPU_ARG1_REGNUM
, type
, out
);
1067 case RETURN_VALUE_STRUCT_CONVENTION
:
1068 error ("Function return value unknown.");
1079 static const gdb_byte
*
1080 spu_breakpoint_from_pc (CORE_ADDR
* pcptr
, int *lenptr
)
1082 static const gdb_byte breakpoint
[] = { 0x00, 0x00, 0x3f, 0xff };
1084 *lenptr
= sizeof breakpoint
;
1089 /* Software single-stepping support. */
1092 spu_software_single_step (struct regcache
*regcache
)
1094 CORE_ADDR pc
, next_pc
;
1099 regcache_cooked_read (regcache
, SPU_PC_REGNUM
, buf
);
1100 /* Mask off interrupt enable bit. */
1101 pc
= extract_unsigned_integer (buf
, 4) & -4;
1103 if (target_read_memory (pc
, buf
, 4))
1105 insn
= extract_unsigned_integer (buf
, 4);
1107 /* Next sequential instruction is at PC + 4, except if the current
1108 instruction is a PPE-assisted call, in which case it is at PC + 8.
1109 Wrap around LS limit to be on the safe side. */
1110 if ((insn
& 0xffffff00) == 0x00002100)
1111 next_pc
= (pc
+ 8) & (SPU_LS_SIZE
- 1);
1113 next_pc
= (pc
+ 4) & (SPU_LS_SIZE
- 1);
1115 insert_single_step_breakpoint (next_pc
);
1117 if (is_branch (insn
, &offset
, ®
))
1119 CORE_ADDR target
= offset
;
1121 if (reg
== SPU_PC_REGNUM
)
1125 regcache_cooked_read_part (regcache
, reg
, 0, 4, buf
);
1126 target
+= extract_unsigned_integer (buf
, 4) & -4;
1129 target
= target
& (SPU_LS_SIZE
- 1);
1130 if (target
!= next_pc
)
1131 insert_single_step_breakpoint (target
);
1137 /* Target overlays for the SPU overlay manager.
1139 See the documentation of simple_overlay_update for how the
1140 interface is supposed to work.
1142 Data structures used by the overlay manager:
1150 } _ovly_table[]; -- one entry per overlay section
1152 struct ovly_buf_table
1155 } _ovly_buf_table[]; -- one entry per overlay buffer
1157 _ovly_table should never change.
1159 Both tables are aligned to a 16-byte boundary, the symbols _ovly_table
1160 and _ovly_buf_table are of type STT_OBJECT and their size set to the size
1161 of the respective array. buf in _ovly_table is an index into _ovly_buf_table.
1163 mapped is an index into _ovly_table. Both the mapped and buf indices start
1164 from one to reference the first entry in their respective tables. */
1166 /* Using the per-objfile private data mechanism, we store for each
1167 objfile an array of "struct spu_overlay_table" structures, one
1168 for each obj_section of the objfile. This structure holds two
1169 fields, MAPPED_PTR and MAPPED_VAL. If MAPPED_PTR is zero, this
1170 is *not* an overlay section. If it is non-zero, it represents
1171 a target address. The overlay section is mapped iff the target
1172 integer at this location equals MAPPED_VAL. */
1174 static const struct objfile_data
*spu_overlay_data
;
1176 struct spu_overlay_table
1178 CORE_ADDR mapped_ptr
;
1179 CORE_ADDR mapped_val
;
1182 /* Retrieve the overlay table for OBJFILE. If not already cached, read
1183 the _ovly_table data structure from the target and initialize the
1184 spu_overlay_table data structure from it. */
1185 static struct spu_overlay_table
*
1186 spu_get_overlay_table (struct objfile
*objfile
)
1188 struct minimal_symbol
*ovly_table_msym
, *ovly_buf_table_msym
;
1189 CORE_ADDR ovly_table_base
, ovly_buf_table_base
;
1190 unsigned ovly_table_size
, ovly_buf_table_size
;
1191 struct spu_overlay_table
*tbl
;
1192 struct obj_section
*osect
;
1196 tbl
= objfile_data (objfile
, spu_overlay_data
);
1200 ovly_table_msym
= lookup_minimal_symbol ("_ovly_table", NULL
, objfile
);
1201 if (!ovly_table_msym
)
1204 ovly_buf_table_msym
= lookup_minimal_symbol ("_ovly_buf_table", NULL
, objfile
);
1205 if (!ovly_buf_table_msym
)
1208 ovly_table_base
= SYMBOL_VALUE_ADDRESS (ovly_table_msym
);
1209 ovly_table_size
= MSYMBOL_SIZE (ovly_table_msym
);
1211 ovly_buf_table_base
= SYMBOL_VALUE_ADDRESS (ovly_buf_table_msym
);
1212 ovly_buf_table_size
= MSYMBOL_SIZE (ovly_buf_table_msym
);
1214 ovly_table
= xmalloc (ovly_table_size
);
1215 read_memory (ovly_table_base
, ovly_table
, ovly_table_size
);
1217 tbl
= OBSTACK_CALLOC (&objfile
->objfile_obstack
,
1218 objfile
->sections_end
- objfile
->sections
,
1219 struct spu_overlay_table
);
1221 for (i
= 0; i
< ovly_table_size
/ 16; i
++)
1223 CORE_ADDR vma
= extract_unsigned_integer (ovly_table
+ 16*i
+ 0, 4);
1224 CORE_ADDR size
= extract_unsigned_integer (ovly_table
+ 16*i
+ 4, 4);
1225 CORE_ADDR pos
= extract_unsigned_integer (ovly_table
+ 16*i
+ 8, 4);
1226 CORE_ADDR buf
= extract_unsigned_integer (ovly_table
+ 16*i
+ 12, 4);
1228 if (buf
== 0 || (buf
- 1) * 4 >= ovly_buf_table_size
)
1231 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1232 if (vma
== bfd_section_vma (objfile
->obfd
, osect
->the_bfd_section
)
1233 && pos
== osect
->the_bfd_section
->filepos
)
1235 int ndx
= osect
- objfile
->sections
;
1236 tbl
[ndx
].mapped_ptr
= ovly_buf_table_base
+ (buf
- 1) * 4;
1237 tbl
[ndx
].mapped_val
= i
+ 1;
1243 set_objfile_data (objfile
, spu_overlay_data
, tbl
);
1247 /* Read _ovly_buf_table entry from the target to dermine whether
1248 OSECT is currently mapped, and update the mapped state. */
1250 spu_overlay_update_osect (struct obj_section
*osect
)
1252 struct spu_overlay_table
*ovly_table
;
1255 ovly_table
= spu_get_overlay_table (osect
->objfile
);
1259 ovly_table
+= osect
- osect
->objfile
->sections
;
1260 if (ovly_table
->mapped_ptr
== 0)
1263 val
= read_memory_unsigned_integer (ovly_table
->mapped_ptr
, 4);
1264 osect
->ovly_mapped
= (val
== ovly_table
->mapped_val
);
1267 /* If OSECT is NULL, then update all sections' mapped state.
1268 If OSECT is non-NULL, then update only OSECT's mapped state. */
1270 spu_overlay_update (struct obj_section
*osect
)
1272 /* Just one section. */
1274 spu_overlay_update_osect (osect
);
1279 struct objfile
*objfile
;
1281 ALL_OBJSECTIONS (objfile
, osect
)
1282 if (section_is_overlay (osect
->the_bfd_section
))
1283 spu_overlay_update_osect (osect
);
1287 /* Whenever a new objfile is loaded, read the target's _ovly_table.
1288 If there is one, go through all sections and make sure for non-
1289 overlay sections LMA equals VMA, while for overlay sections LMA
1290 is larger than local store size. */
1292 spu_overlay_new_objfile (struct objfile
*objfile
)
1294 struct spu_overlay_table
*ovly_table
;
1295 struct obj_section
*osect
;
1297 /* If we've already touched this file, do nothing. */
1298 if (!objfile
|| objfile_data (objfile
, spu_overlay_data
) != NULL
)
1301 /* Check if this objfile has overlays. */
1302 ovly_table
= spu_get_overlay_table (objfile
);
1306 /* Now go and fiddle with all the LMAs. */
1307 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1309 bfd
*obfd
= objfile
->obfd
;
1310 asection
*bsect
= osect
->the_bfd_section
;
1311 int ndx
= osect
- objfile
->sections
;
1313 if (ovly_table
[ndx
].mapped_ptr
== 0)
1314 bfd_section_lma (obfd
, bsect
) = bfd_section_vma (obfd
, bsect
);
1316 bfd_section_lma (obfd
, bsect
) = bsect
->filepos
+ SPU_LS_SIZE
;
1321 /* Set up gdbarch struct. */
1323 static struct gdbarch
*
1324 spu_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1326 struct gdbarch
*gdbarch
;
1328 /* Find a candidate among the list of pre-declared architectures. */
1329 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1331 return arches
->gdbarch
;
1334 if (info
.bfd_arch_info
->mach
!= bfd_mach_spu
)
1337 /* Yes, create a new architecture. */
1338 gdbarch
= gdbarch_alloc (&info
, NULL
);
1341 set_gdbarch_print_insn (gdbarch
, print_insn_spu
);
1344 set_gdbarch_num_regs (gdbarch
, SPU_NUM_REGS
);
1345 set_gdbarch_num_pseudo_regs (gdbarch
, SPU_NUM_PSEUDO_REGS
);
1346 set_gdbarch_sp_regnum (gdbarch
, SPU_SP_REGNUM
);
1347 set_gdbarch_pc_regnum (gdbarch
, SPU_PC_REGNUM
);
1348 set_gdbarch_read_pc (gdbarch
, spu_read_pc
);
1349 set_gdbarch_write_pc (gdbarch
, spu_write_pc
);
1350 set_gdbarch_register_name (gdbarch
, spu_register_name
);
1351 set_gdbarch_register_type (gdbarch
, spu_register_type
);
1352 set_gdbarch_pseudo_register_read (gdbarch
, spu_pseudo_register_read
);
1353 set_gdbarch_pseudo_register_write (gdbarch
, spu_pseudo_register_write
);
1354 set_gdbarch_value_from_register (gdbarch
, spu_value_from_register
);
1355 set_gdbarch_register_reggroup_p (gdbarch
, spu_register_reggroup_p
);
1358 set_gdbarch_char_signed (gdbarch
, 0);
1359 set_gdbarch_ptr_bit (gdbarch
, 32);
1360 set_gdbarch_addr_bit (gdbarch
, 32);
1361 set_gdbarch_short_bit (gdbarch
, 16);
1362 set_gdbarch_int_bit (gdbarch
, 32);
1363 set_gdbarch_long_bit (gdbarch
, 32);
1364 set_gdbarch_long_long_bit (gdbarch
, 64);
1365 set_gdbarch_float_bit (gdbarch
, 32);
1366 set_gdbarch_double_bit (gdbarch
, 64);
1367 set_gdbarch_long_double_bit (gdbarch
, 64);
1368 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
1369 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
1370 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
1372 /* Inferior function calls. */
1373 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
1374 set_gdbarch_frame_align (gdbarch
, spu_frame_align
);
1375 set_gdbarch_push_dummy_call (gdbarch
, spu_push_dummy_call
);
1376 set_gdbarch_unwind_dummy_id (gdbarch
, spu_unwind_dummy_id
);
1377 set_gdbarch_return_value (gdbarch
, spu_return_value
);
1379 /* Frame handling. */
1380 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1381 frame_unwind_append_sniffer (gdbarch
, spu_frame_sniffer
);
1382 frame_base_set_default (gdbarch
, &spu_frame_base
);
1383 set_gdbarch_unwind_pc (gdbarch
, spu_unwind_pc
);
1384 set_gdbarch_unwind_sp (gdbarch
, spu_unwind_sp
);
1385 set_gdbarch_virtual_frame_pointer (gdbarch
, spu_virtual_frame_pointer
);
1386 set_gdbarch_frame_args_skip (gdbarch
, 0);
1387 set_gdbarch_skip_prologue (gdbarch
, spu_skip_prologue
);
1388 set_gdbarch_in_function_epilogue_p (gdbarch
, spu_in_function_epilogue_p
);
1391 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
1392 set_gdbarch_breakpoint_from_pc (gdbarch
, spu_breakpoint_from_pc
);
1393 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
1394 set_gdbarch_software_single_step (gdbarch
, spu_software_single_step
);
1397 set_gdbarch_overlay_update (gdbarch
, spu_overlay_update
);
1402 /* Implement a SPU-specific vector type as replacement
1403 for __gdb_builtin_type_vec128. */
1405 spu_init_vector_type (void)
1409 type
= init_composite_type ("__spu_builtin_type_vec128", TYPE_CODE_UNION
);
1410 append_composite_type_field (type
, "uint128", builtin_type_int128
);
1411 append_composite_type_field (type
, "v2_int64", builtin_type_v2_int64
);
1412 append_composite_type_field (type
, "v4_int32", builtin_type_v4_int32
);
1413 append_composite_type_field (type
, "v8_int16", builtin_type_v8_int16
);
1414 append_composite_type_field (type
, "v16_int8", builtin_type_v16_int8
);
1415 append_composite_type_field (type
, "v2_double", builtin_type_v2_double
);
1416 append_composite_type_field (type
, "v4_float", builtin_type_v4_float
);
1418 TYPE_FLAGS (type
) |= TYPE_FLAG_VECTOR
;
1419 TYPE_NAME (type
) = "spu_builtin_type_vec128";
1420 spu_builtin_type_vec128
= type
;
1424 _initialize_spu_tdep (void)
1426 register_gdbarch_init (bfd_arch_spu
, spu_gdbarch_init
);
1428 spu_init_vector_type ();
1430 /* Add ourselves to objfile event chain. */
1431 observer_attach_new_objfile (spu_overlay_new_objfile
);
1432 spu_overlay_data
= register_objfile_data ();