1 /* SPU target-dependent code for GDB, the GNU debugger.
2 Copyright (C) 2006, 2007 Free Software Foundation, Inc.
4 Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
5 Based on a port by Sid Manning <sid@us.ibm.com>.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
30 #include "frame-unwind.h"
31 #include "frame-base.h"
32 #include "trad-frame.h"
41 #include "reggroups.h"
42 #include "floatformat.h"
48 /* The tdep structure. */
51 /* SPU-specific vector type. */
52 struct type
*spu_builtin_type_vec128
;
56 /* SPU-specific vector type. */
58 spu_builtin_type_vec128 (struct gdbarch
*gdbarch
)
60 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
62 if (!tdep
->spu_builtin_type_vec128
)
66 t
= init_composite_type ("__spu_builtin_type_vec128", TYPE_CODE_UNION
);
67 append_composite_type_field (t
, "uint128", builtin_type_int128
);
68 append_composite_type_field (t
, "v2_int64",
69 init_vector_type (builtin_type_int64
, 2));
70 append_composite_type_field (t
, "v4_int32",
71 init_vector_type (builtin_type_int32
, 4));
72 append_composite_type_field (t
, "v8_int16",
73 init_vector_type (builtin_type_int16
, 8));
74 append_composite_type_field (t
, "v16_int8",
75 init_vector_type (builtin_type_int8
, 16));
76 append_composite_type_field (t
, "v2_double",
77 init_vector_type (builtin_type_double
, 2));
78 append_composite_type_field (t
, "v4_float",
79 init_vector_type (builtin_type_float
, 4));
81 TYPE_FLAGS (t
) |= TYPE_FLAG_VECTOR
;
82 TYPE_NAME (t
) = "spu_builtin_type_vec128";
84 tdep
->spu_builtin_type_vec128
= t
;
87 return tdep
->spu_builtin_type_vec128
;
91 /* The list of available "info spu " commands. */
92 static struct cmd_list_element
*infospucmdlist
= NULL
;
97 spu_register_name (int reg_nr
)
99 static char *register_names
[] =
101 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
102 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
103 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
104 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
105 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
106 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
107 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
108 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
109 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
110 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
111 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
112 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
113 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
114 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
115 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
116 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
117 "id", "pc", "sp", "fpscr", "srr0", "lslr", "decr", "decr_status"
122 if (reg_nr
>= sizeof register_names
/ sizeof *register_names
)
125 return register_names
[reg_nr
];
129 spu_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
131 if (reg_nr
< SPU_NUM_GPRS
)
132 return spu_builtin_type_vec128 (gdbarch
);
137 return builtin_type_uint32
;
140 return builtin_type_void_func_ptr
;
143 return builtin_type_void_data_ptr
;
145 case SPU_FPSCR_REGNUM
:
146 return builtin_type_uint128
;
148 case SPU_SRR0_REGNUM
:
149 return builtin_type_uint32
;
151 case SPU_LSLR_REGNUM
:
152 return builtin_type_uint32
;
154 case SPU_DECR_REGNUM
:
155 return builtin_type_uint32
;
157 case SPU_DECR_STATUS_REGNUM
:
158 return builtin_type_uint32
;
161 internal_error (__FILE__
, __LINE__
, "invalid regnum");
165 /* Pseudo registers for preferred slots - stack pointer. */
168 spu_pseudo_register_read_spu (struct regcache
*regcache
, const char *regname
,
175 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
176 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
177 memset (reg
, 0, sizeof reg
);
178 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
181 store_unsigned_integer (buf
, 4, strtoulst (reg
, NULL
, 16));
185 spu_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
186 int regnum
, gdb_byte
*buf
)
195 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
196 memcpy (buf
, reg
, 4);
199 case SPU_FPSCR_REGNUM
:
200 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
201 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
202 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
205 case SPU_SRR0_REGNUM
:
206 spu_pseudo_register_read_spu (regcache
, "srr0", buf
);
209 case SPU_LSLR_REGNUM
:
210 spu_pseudo_register_read_spu (regcache
, "lslr", buf
);
213 case SPU_DECR_REGNUM
:
214 spu_pseudo_register_read_spu (regcache
, "decr", buf
);
217 case SPU_DECR_STATUS_REGNUM
:
218 spu_pseudo_register_read_spu (regcache
, "decr_status", buf
);
222 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
227 spu_pseudo_register_write_spu (struct regcache
*regcache
, const char *regname
,
234 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
235 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
236 xsnprintf (reg
, sizeof reg
, "0x%s",
237 phex_nz (extract_unsigned_integer (buf
, 4), 4));
238 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
,
239 reg
, 0, strlen (reg
));
243 spu_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
244 int regnum
, const gdb_byte
*buf
)
253 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
254 memcpy (reg
, buf
, 4);
255 regcache_raw_write (regcache
, SPU_RAW_SP_REGNUM
, reg
);
258 case SPU_FPSCR_REGNUM
:
259 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
260 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
261 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
264 case SPU_SRR0_REGNUM
:
265 spu_pseudo_register_write_spu (regcache
, "srr0", buf
);
268 case SPU_LSLR_REGNUM
:
269 spu_pseudo_register_write_spu (regcache
, "lslr", buf
);
272 case SPU_DECR_REGNUM
:
273 spu_pseudo_register_write_spu (regcache
, "decr", buf
);
276 case SPU_DECR_STATUS_REGNUM
:
277 spu_pseudo_register_write_spu (regcache
, "decr_status", buf
);
281 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
285 /* Value conversion -- access scalar values at the preferred slot. */
287 static struct value
*
288 spu_value_from_register (struct type
*type
, int regnum
,
289 struct frame_info
*frame
)
291 struct value
*value
= default_value_from_register (type
, regnum
, frame
);
292 int len
= TYPE_LENGTH (type
);
294 if (regnum
< SPU_NUM_GPRS
&& len
< 16)
296 int preferred_slot
= len
< 4 ? 4 - len
: 0;
297 set_value_offset (value
, preferred_slot
);
303 /* Register groups. */
306 spu_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
307 struct reggroup
*group
)
309 /* Registers displayed via 'info regs'. */
310 if (group
== general_reggroup
)
313 /* Registers displayed via 'info float'. */
314 if (group
== float_reggroup
)
317 /* Registers that need to be saved/restored in order to
318 push or pop frames. */
319 if (group
== save_reggroup
|| group
== restore_reggroup
)
322 return default_register_reggroup_p (gdbarch
, regnum
, group
);
325 /* Address conversion. */
328 spu_pointer_to_address (struct type
*type
, const gdb_byte
*buf
)
330 ULONGEST addr
= extract_unsigned_integer (buf
, TYPE_LENGTH (type
));
331 ULONGEST lslr
= SPU_LS_SIZE
- 1; /* Hard-wired LS size. */
333 if (target_has_registers
&& target_has_stack
&& target_has_memory
)
334 lslr
= get_frame_register_unsigned (get_selected_frame (NULL
),
341 spu_integer_to_address (struct gdbarch
*gdbarch
,
342 struct type
*type
, const gdb_byte
*buf
)
344 ULONGEST addr
= unpack_long (type
, buf
);
345 ULONGEST lslr
= SPU_LS_SIZE
- 1; /* Hard-wired LS size. */
347 if (target_has_registers
&& target_has_stack
&& target_has_memory
)
348 lslr
= get_frame_register_unsigned (get_selected_frame (NULL
),
355 /* Decoding SPU instructions. */
392 is_rr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
)
394 if ((insn
>> 21) == op
)
397 *ra
= (insn
>> 7) & 127;
398 *rb
= (insn
>> 14) & 127;
406 is_rrr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
, int *rc
)
408 if ((insn
>> 28) == op
)
410 *rt
= (insn
>> 21) & 127;
411 *ra
= (insn
>> 7) & 127;
412 *rb
= (insn
>> 14) & 127;
421 is_ri7 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i7
)
423 if ((insn
>> 21) == op
)
426 *ra
= (insn
>> 7) & 127;
427 *i7
= (((insn
>> 14) & 127) ^ 0x40) - 0x40;
435 is_ri10 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i10
)
437 if ((insn
>> 24) == op
)
440 *ra
= (insn
>> 7) & 127;
441 *i10
= (((insn
>> 14) & 0x3ff) ^ 0x200) - 0x200;
449 is_ri16 (unsigned int insn
, int op
, int *rt
, int *i16
)
451 if ((insn
>> 23) == op
)
454 *i16
= (((insn
>> 7) & 0xffff) ^ 0x8000) - 0x8000;
462 is_ri18 (unsigned int insn
, int op
, int *rt
, int *i18
)
464 if ((insn
>> 25) == op
)
467 *i18
= (((insn
>> 7) & 0x3ffff) ^ 0x20000) - 0x20000;
475 is_branch (unsigned int insn
, int *offset
, int *reg
)
479 if (is_ri16 (insn
, op_br
, &rt
, &i16
)
480 || is_ri16 (insn
, op_brsl
, &rt
, &i16
)
481 || is_ri16 (insn
, op_brnz
, &rt
, &i16
)
482 || is_ri16 (insn
, op_brz
, &rt
, &i16
)
483 || is_ri16 (insn
, op_brhnz
, &rt
, &i16
)
484 || is_ri16 (insn
, op_brhz
, &rt
, &i16
))
486 *reg
= SPU_PC_REGNUM
;
491 if (is_ri16 (insn
, op_bra
, &rt
, &i16
)
492 || is_ri16 (insn
, op_brasl
, &rt
, &i16
))
499 if (is_ri7 (insn
, op_bi
, &rt
, reg
, &i7
)
500 || is_ri7 (insn
, op_bisl
, &rt
, reg
, &i7
)
501 || is_ri7 (insn
, op_biz
, &rt
, reg
, &i7
)
502 || is_ri7 (insn
, op_binz
, &rt
, reg
, &i7
)
503 || is_ri7 (insn
, op_bihz
, &rt
, reg
, &i7
)
504 || is_ri7 (insn
, op_bihnz
, &rt
, reg
, &i7
))
514 /* Prolog parsing. */
516 struct spu_prologue_data
518 /* Stack frame size. -1 if analysis was unsuccessful. */
521 /* How to find the CFA. The CFA is equal to SP at function entry. */
525 /* Offset relative to CFA where a register is saved. -1 if invalid. */
526 int reg_offset
[SPU_NUM_GPRS
];
530 spu_analyze_prologue (CORE_ADDR start_pc
, CORE_ADDR end_pc
,
531 struct spu_prologue_data
*data
)
536 int reg_immed
[SPU_NUM_GPRS
];
538 CORE_ADDR prolog_pc
= start_pc
;
543 /* Initialize DATA to default values. */
546 data
->cfa_reg
= SPU_RAW_SP_REGNUM
;
547 data
->cfa_offset
= 0;
549 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
550 data
->reg_offset
[i
] = -1;
552 /* Set up REG_IMMED array. This is non-zero for a register if we know its
553 preferred slot currently holds this immediate value. */
554 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
557 /* Scan instructions until the first branch.
559 The following instructions are important prolog components:
561 - The first instruction to set up the stack pointer.
562 - The first instruction to set up the frame pointer.
563 - The first instruction to save the link register.
565 We return the instruction after the latest of these three,
566 or the incoming PC if none is found. The first instruction
567 to set up the stack pointer also defines the frame size.
569 Note that instructions saving incoming arguments to their stack
570 slots are not counted as important, because they are hard to
571 identify with certainty. This should not matter much, because
572 arguments are relevant only in code compiled with debug data,
573 and in such code the GDB core will advance until the first source
574 line anyway, using SAL data.
576 For purposes of stack unwinding, we analyze the following types
577 of instructions in addition:
579 - Any instruction adding to the current frame pointer.
580 - Any instruction loading an immediate constant into a register.
581 - Any instruction storing a register onto the stack.
583 These are used to compute the CFA and REG_OFFSET output. */
585 for (pc
= start_pc
; pc
< end_pc
; pc
+= 4)
588 int rt
, ra
, rb
, rc
, immed
;
590 if (target_read_memory (pc
, buf
, 4))
592 insn
= extract_unsigned_integer (buf
, 4);
594 /* AI is the typical instruction to set up a stack frame.
595 It is also used to initialize the frame pointer. */
596 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
))
598 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
599 data
->cfa_offset
-= immed
;
601 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
609 else if (rt
== SPU_FP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
615 data
->cfa_reg
= SPU_FP_REGNUM
;
616 data
->cfa_offset
-= immed
;
620 /* A is used to set up stack frames of size >= 512 bytes.
621 If we have tracked the contents of the addend register,
622 we can handle this as well. */
623 else if (is_rr (insn
, op_a
, &rt
, &ra
, &rb
))
625 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
627 if (reg_immed
[rb
] != 0)
628 data
->cfa_offset
-= reg_immed
[rb
];
630 data
->cfa_reg
= -1; /* We don't know the CFA any more. */
633 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
639 if (reg_immed
[rb
] != 0)
640 data
->size
= -reg_immed
[rb
];
644 /* We need to track IL and ILA used to load immediate constants
645 in case they are later used as input to an A instruction. */
646 else if (is_ri16 (insn
, op_il
, &rt
, &immed
))
648 reg_immed
[rt
] = immed
;
650 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
654 else if (is_ri18 (insn
, op_ila
, &rt
, &immed
))
656 reg_immed
[rt
] = immed
& 0x3ffff;
658 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
662 /* STQD is used to save registers to the stack. */
663 else if (is_ri10 (insn
, op_stqd
, &rt
, &ra
, &immed
))
665 if (ra
== data
->cfa_reg
)
666 data
->reg_offset
[rt
] = data
->cfa_offset
- (immed
<< 4);
668 if (ra
== data
->cfa_reg
&& rt
== SPU_LR_REGNUM
676 /* _start uses SELB to set up the stack pointer. */
677 else if (is_rrr (insn
, op_selb
, &rt
, &ra
, &rb
, &rc
))
679 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
683 /* We terminate if we find a branch. */
684 else if (is_branch (insn
, &immed
, &ra
))
689 /* If we successfully parsed until here, and didn't find any instruction
690 modifying SP, we assume we have a frameless function. */
694 /* Return cooked instead of raw SP. */
695 if (data
->cfa_reg
== SPU_RAW_SP_REGNUM
)
696 data
->cfa_reg
= SPU_SP_REGNUM
;
701 /* Return the first instruction after the prologue starting at PC. */
703 spu_skip_prologue (CORE_ADDR pc
)
705 struct spu_prologue_data data
;
706 return spu_analyze_prologue (pc
, (CORE_ADDR
)-1, &data
);
709 /* Return the frame pointer in use at address PC. */
711 spu_virtual_frame_pointer (CORE_ADDR pc
, int *reg
, LONGEST
*offset
)
713 struct spu_prologue_data data
;
714 spu_analyze_prologue (pc
, (CORE_ADDR
)-1, &data
);
716 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
718 /* The 'frame pointer' address is CFA minus frame size. */
720 *offset
= data
.cfa_offset
- data
.size
;
724 /* ??? We don't really know ... */
725 *reg
= SPU_SP_REGNUM
;
730 /* Return true if we are in the function's epilogue, i.e. after the
731 instruction that destroyed the function's stack frame.
733 1) scan forward from the point of execution:
734 a) If you find an instruction that modifies the stack pointer
735 or transfers control (except a return), execution is not in
737 b) Stop scanning if you find a return instruction or reach the
738 end of the function or reach the hard limit for the size of
740 2) scan backward from the point of execution:
741 a) If you find an instruction that modifies the stack pointer,
742 execution *is* in an epilogue, return.
743 b) Stop scanning if you reach an instruction that transfers
744 control or the beginning of the function or reach the hard
745 limit for the size of an epilogue. */
748 spu_in_function_epilogue_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
750 CORE_ADDR scan_pc
, func_start
, func_end
, epilogue_start
, epilogue_end
;
753 int rt
, ra
, rb
, rc
, immed
;
755 /* Find the search limits based on function boundaries and hard limit.
756 We assume the epilogue can be up to 64 instructions long. */
758 const int spu_max_epilogue_size
= 64 * 4;
760 if (!find_pc_partial_function (pc
, NULL
, &func_start
, &func_end
))
763 if (pc
- func_start
< spu_max_epilogue_size
)
764 epilogue_start
= func_start
;
766 epilogue_start
= pc
- spu_max_epilogue_size
;
768 if (func_end
- pc
< spu_max_epilogue_size
)
769 epilogue_end
= func_end
;
771 epilogue_end
= pc
+ spu_max_epilogue_size
;
773 /* Scan forward until next 'bi $0'. */
775 for (scan_pc
= pc
; scan_pc
< epilogue_end
; scan_pc
+= 4)
777 if (target_read_memory (scan_pc
, buf
, 4))
779 insn
= extract_unsigned_integer (buf
, 4);
781 if (is_branch (insn
, &immed
, &ra
))
783 if (immed
== 0 && ra
== SPU_LR_REGNUM
)
789 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
790 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
791 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
793 if (rt
== SPU_RAW_SP_REGNUM
)
798 if (scan_pc
>= epilogue_end
)
801 /* Scan backward until adjustment to stack pointer (R1). */
803 for (scan_pc
= pc
- 4; scan_pc
>= epilogue_start
; scan_pc
-= 4)
805 if (target_read_memory (scan_pc
, buf
, 4))
807 insn
= extract_unsigned_integer (buf
, 4);
809 if (is_branch (insn
, &immed
, &ra
))
812 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
813 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
814 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
816 if (rt
== SPU_RAW_SP_REGNUM
)
825 /* Normal stack frames. */
827 struct spu_unwind_cache
830 CORE_ADDR frame_base
;
831 CORE_ADDR local_base
;
833 struct trad_frame_saved_reg
*saved_regs
;
836 static struct spu_unwind_cache
*
837 spu_frame_unwind_cache (struct frame_info
*next_frame
,
838 void **this_prologue_cache
)
840 struct spu_unwind_cache
*info
;
841 struct spu_prologue_data data
;
844 if (*this_prologue_cache
)
845 return *this_prologue_cache
;
847 info
= FRAME_OBSTACK_ZALLOC (struct spu_unwind_cache
);
848 *this_prologue_cache
= info
;
849 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
850 info
->frame_base
= 0;
851 info
->local_base
= 0;
853 /* Find the start of the current function, and analyze its prologue. */
854 info
->func
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
857 /* Fall back to using the current PC as frame ID. */
858 info
->func
= frame_pc_unwind (next_frame
);
862 spu_analyze_prologue (info
->func
, frame_pc_unwind (next_frame
), &data
);
865 /* If successful, use prologue analysis data. */
866 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
871 /* Determine CFA via unwound CFA_REG plus CFA_OFFSET. */
872 frame_unwind_register (next_frame
, data
.cfa_reg
, buf
);
873 cfa
= extract_unsigned_integer (buf
, 4) + data
.cfa_offset
;
875 /* Call-saved register slots. */
876 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
877 if (i
== SPU_LR_REGNUM
878 || (i
>= SPU_SAVED1_REGNUM
&& i
<= SPU_SAVEDN_REGNUM
))
879 if (data
.reg_offset
[i
] != -1)
880 info
->saved_regs
[i
].addr
= cfa
- data
.reg_offset
[i
];
883 info
->frame_base
= cfa
;
884 info
->local_base
= cfa
- data
.size
;
887 /* Otherwise, fall back to reading the backchain link. */
890 CORE_ADDR reg
, backchain
;
892 /* Get the backchain. */
893 reg
= frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
894 backchain
= read_memory_unsigned_integer (reg
, 4);
896 /* A zero backchain terminates the frame chain. Also, sanity
897 check against the local store size limit. */
898 if (backchain
!= 0 && backchain
< SPU_LS_SIZE
)
900 /* Assume the link register is saved into its slot. */
901 if (backchain
+ 16 < SPU_LS_SIZE
)
902 info
->saved_regs
[SPU_LR_REGNUM
].addr
= backchain
+ 16;
905 info
->frame_base
= backchain
;
906 info
->local_base
= reg
;
910 /* The previous SP is equal to the CFA. */
911 trad_frame_set_value (info
->saved_regs
, SPU_SP_REGNUM
, info
->frame_base
);
913 /* Read full contents of the unwound link register in order to
914 be able to determine the return address. */
915 if (trad_frame_addr_p (info
->saved_regs
, SPU_LR_REGNUM
))
916 target_read_memory (info
->saved_regs
[SPU_LR_REGNUM
].addr
, buf
, 16);
918 frame_unwind_register (next_frame
, SPU_LR_REGNUM
, buf
);
920 /* Normally, the return address is contained in the slot 0 of the
921 link register, and slots 1-3 are zero. For an overlay return,
922 slot 0 contains the address of the overlay manager return stub,
923 slot 1 contains the partition number of the overlay section to
924 be returned to, and slot 2 contains the return address within
925 that section. Return the latter address in that case. */
926 if (extract_unsigned_integer (buf
+ 8, 4) != 0)
927 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
928 extract_unsigned_integer (buf
+ 8, 4));
930 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
931 extract_unsigned_integer (buf
, 4));
937 spu_frame_this_id (struct frame_info
*next_frame
,
938 void **this_prologue_cache
, struct frame_id
*this_id
)
940 struct spu_unwind_cache
*info
=
941 spu_frame_unwind_cache (next_frame
, this_prologue_cache
);
943 if (info
->frame_base
== 0)
946 *this_id
= frame_id_build (info
->frame_base
, info
->func
);
950 spu_frame_prev_register (struct frame_info
*next_frame
,
951 void **this_prologue_cache
,
952 int regnum
, int *optimizedp
,
953 enum lval_type
*lvalp
, CORE_ADDR
* addrp
,
954 int *realnump
, gdb_byte
*bufferp
)
956 struct spu_unwind_cache
*info
957 = spu_frame_unwind_cache (next_frame
, this_prologue_cache
);
959 /* Special-case the stack pointer. */
960 if (regnum
== SPU_RAW_SP_REGNUM
)
961 regnum
= SPU_SP_REGNUM
;
963 trad_frame_get_prev_register (next_frame
, info
->saved_regs
, regnum
,
964 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
967 static const struct frame_unwind spu_frame_unwind
= {
970 spu_frame_prev_register
973 const struct frame_unwind
*
974 spu_frame_sniffer (struct frame_info
*next_frame
)
976 return &spu_frame_unwind
;
980 spu_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
982 struct spu_unwind_cache
*info
983 = spu_frame_unwind_cache (next_frame
, this_cache
);
984 return info
->local_base
;
987 static const struct frame_base spu_frame_base
= {
989 spu_frame_base_address
,
990 spu_frame_base_address
,
991 spu_frame_base_address
995 spu_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
997 CORE_ADDR pc
= frame_unwind_register_unsigned (next_frame
, SPU_PC_REGNUM
);
998 /* Mask off interrupt enable bit. */
1003 spu_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1005 return frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
1009 spu_read_pc (struct regcache
*regcache
)
1012 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &pc
);
1013 /* Mask off interrupt enable bit. */
1018 spu_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1020 /* Keep interrupt enabled state unchanged. */
1022 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &old_pc
);
1023 regcache_cooked_write_unsigned (regcache
, SPU_PC_REGNUM
,
1024 (pc
& -4) | (old_pc
& 3));
1028 /* Function calling convention. */
1031 spu_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1037 spu_scalar_value_p (struct type
*type
)
1039 switch (TYPE_CODE (type
))
1042 case TYPE_CODE_ENUM
:
1043 case TYPE_CODE_RANGE
:
1044 case TYPE_CODE_CHAR
:
1045 case TYPE_CODE_BOOL
:
1048 return TYPE_LENGTH (type
) <= 16;
1056 spu_value_to_regcache (struct regcache
*regcache
, int regnum
,
1057 struct type
*type
, const gdb_byte
*in
)
1059 int len
= TYPE_LENGTH (type
);
1061 if (spu_scalar_value_p (type
))
1063 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1064 regcache_cooked_write_part (regcache
, regnum
, preferred_slot
, len
, in
);
1070 regcache_cooked_write (regcache
, regnum
++, in
);
1076 regcache_cooked_write_part (regcache
, regnum
, 0, len
, in
);
1081 spu_regcache_to_value (struct regcache
*regcache
, int regnum
,
1082 struct type
*type
, gdb_byte
*out
)
1084 int len
= TYPE_LENGTH (type
);
1086 if (spu_scalar_value_p (type
))
1088 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1089 regcache_cooked_read_part (regcache
, regnum
, preferred_slot
, len
, out
);
1095 regcache_cooked_read (regcache
, regnum
++, out
);
1101 regcache_cooked_read_part (regcache
, regnum
, 0, len
, out
);
1106 spu_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1107 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1108 int nargs
, struct value
**args
, CORE_ADDR sp
,
1109 int struct_return
, CORE_ADDR struct_addr
)
1112 int regnum
= SPU_ARG1_REGNUM
;
1116 /* Set the return address. */
1117 memset (buf
, 0, sizeof buf
);
1118 store_unsigned_integer (buf
, 4, bp_addr
);
1119 regcache_cooked_write (regcache
, SPU_LR_REGNUM
, buf
);
1121 /* If STRUCT_RETURN is true, then the struct return address (in
1122 STRUCT_ADDR) will consume the first argument-passing register.
1123 Both adjust the register count and store that value. */
1126 memset (buf
, 0, sizeof buf
);
1127 store_unsigned_integer (buf
, 4, struct_addr
);
1128 regcache_cooked_write (regcache
, regnum
++, buf
);
1131 /* Fill in argument registers. */
1132 for (i
= 0; i
< nargs
; i
++)
1134 struct value
*arg
= args
[i
];
1135 struct type
*type
= check_typedef (value_type (arg
));
1136 const gdb_byte
*contents
= value_contents (arg
);
1137 int len
= TYPE_LENGTH (type
);
1138 int n_regs
= align_up (len
, 16) / 16;
1140 /* If the argument doesn't wholly fit into registers, it and
1141 all subsequent arguments go to the stack. */
1142 if (regnum
+ n_regs
- 1 > SPU_ARGN_REGNUM
)
1148 spu_value_to_regcache (regcache
, regnum
, type
, contents
);
1152 /* Overflow arguments go to the stack. */
1153 if (stack_arg
!= -1)
1157 /* Allocate all required stack size. */
1158 for (i
= stack_arg
; i
< nargs
; i
++)
1160 struct type
*type
= check_typedef (value_type (args
[i
]));
1161 sp
-= align_up (TYPE_LENGTH (type
), 16);
1164 /* Fill in stack arguments. */
1166 for (i
= stack_arg
; i
< nargs
; i
++)
1168 struct value
*arg
= args
[i
];
1169 struct type
*type
= check_typedef (value_type (arg
));
1170 int len
= TYPE_LENGTH (type
);
1173 if (spu_scalar_value_p (type
))
1174 preferred_slot
= len
< 4 ? 4 - len
: 0;
1178 target_write_memory (ap
+ preferred_slot
, value_contents (arg
), len
);
1179 ap
+= align_up (TYPE_LENGTH (type
), 16);
1183 /* Allocate stack frame header. */
1186 /* Store stack back chain. */
1187 regcache_cooked_read (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1188 target_write_memory (sp
, buf
, 16);
1190 /* Finally, update the SP register. */
1191 regcache_cooked_write_unsigned (regcache
, SPU_SP_REGNUM
, sp
);
1196 static struct frame_id
1197 spu_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1199 return frame_id_build (spu_unwind_sp (gdbarch
, next_frame
),
1200 spu_unwind_pc (gdbarch
, next_frame
));
1203 /* Function return value access. */
1205 static enum return_value_convention
1206 spu_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1207 struct regcache
*regcache
, gdb_byte
*out
, const gdb_byte
*in
)
1209 enum return_value_convention rvc
;
1211 if (TYPE_LENGTH (type
) <= (SPU_ARGN_REGNUM
- SPU_ARG1_REGNUM
+ 1) * 16)
1212 rvc
= RETURN_VALUE_REGISTER_CONVENTION
;
1214 rvc
= RETURN_VALUE_STRUCT_CONVENTION
;
1220 case RETURN_VALUE_REGISTER_CONVENTION
:
1221 spu_value_to_regcache (regcache
, SPU_ARG1_REGNUM
, type
, in
);
1224 case RETURN_VALUE_STRUCT_CONVENTION
:
1225 error ("Cannot set function return value.");
1233 case RETURN_VALUE_REGISTER_CONVENTION
:
1234 spu_regcache_to_value (regcache
, SPU_ARG1_REGNUM
, type
, out
);
1237 case RETURN_VALUE_STRUCT_CONVENTION
:
1238 error ("Function return value unknown.");
1249 static const gdb_byte
*
1250 spu_breakpoint_from_pc (CORE_ADDR
* pcptr
, int *lenptr
)
1252 static const gdb_byte breakpoint
[] = { 0x00, 0x00, 0x3f, 0xff };
1254 *lenptr
= sizeof breakpoint
;
1259 /* Software single-stepping support. */
1262 spu_software_single_step (struct frame_info
*frame
)
1264 CORE_ADDR pc
, next_pc
;
1269 pc
= get_frame_pc (frame
);
1271 if (target_read_memory (pc
, buf
, 4))
1273 insn
= extract_unsigned_integer (buf
, 4);
1275 /* Next sequential instruction is at PC + 4, except if the current
1276 instruction is a PPE-assisted call, in which case it is at PC + 8.
1277 Wrap around LS limit to be on the safe side. */
1278 if ((insn
& 0xffffff00) == 0x00002100)
1279 next_pc
= (pc
+ 8) & (SPU_LS_SIZE
- 1);
1281 next_pc
= (pc
+ 4) & (SPU_LS_SIZE
- 1);
1283 insert_single_step_breakpoint (next_pc
);
1285 if (is_branch (insn
, &offset
, ®
))
1287 CORE_ADDR target
= offset
;
1289 if (reg
== SPU_PC_REGNUM
)
1293 get_frame_register_bytes (frame
, reg
, 0, 4, buf
);
1294 target
+= extract_unsigned_integer (buf
, 4) & -4;
1297 target
= target
& (SPU_LS_SIZE
- 1);
1298 if (target
!= next_pc
)
1299 insert_single_step_breakpoint (target
);
1305 /* Target overlays for the SPU overlay manager.
1307 See the documentation of simple_overlay_update for how the
1308 interface is supposed to work.
1310 Data structures used by the overlay manager:
1318 } _ovly_table[]; -- one entry per overlay section
1320 struct ovly_buf_table
1323 } _ovly_buf_table[]; -- one entry per overlay buffer
1325 _ovly_table should never change.
1327 Both tables are aligned to a 16-byte boundary, the symbols _ovly_table
1328 and _ovly_buf_table are of type STT_OBJECT and their size set to the size
1329 of the respective array. buf in _ovly_table is an index into _ovly_buf_table.
1331 mapped is an index into _ovly_table. Both the mapped and buf indices start
1332 from one to reference the first entry in their respective tables. */
1334 /* Using the per-objfile private data mechanism, we store for each
1335 objfile an array of "struct spu_overlay_table" structures, one
1336 for each obj_section of the objfile. This structure holds two
1337 fields, MAPPED_PTR and MAPPED_VAL. If MAPPED_PTR is zero, this
1338 is *not* an overlay section. If it is non-zero, it represents
1339 a target address. The overlay section is mapped iff the target
1340 integer at this location equals MAPPED_VAL. */
1342 static const struct objfile_data
*spu_overlay_data
;
1344 struct spu_overlay_table
1346 CORE_ADDR mapped_ptr
;
1347 CORE_ADDR mapped_val
;
1350 /* Retrieve the overlay table for OBJFILE. If not already cached, read
1351 the _ovly_table data structure from the target and initialize the
1352 spu_overlay_table data structure from it. */
1353 static struct spu_overlay_table
*
1354 spu_get_overlay_table (struct objfile
*objfile
)
1356 struct minimal_symbol
*ovly_table_msym
, *ovly_buf_table_msym
;
1357 CORE_ADDR ovly_table_base
, ovly_buf_table_base
;
1358 unsigned ovly_table_size
, ovly_buf_table_size
;
1359 struct spu_overlay_table
*tbl
;
1360 struct obj_section
*osect
;
1364 tbl
= objfile_data (objfile
, spu_overlay_data
);
1368 ovly_table_msym
= lookup_minimal_symbol ("_ovly_table", NULL
, objfile
);
1369 if (!ovly_table_msym
)
1372 ovly_buf_table_msym
= lookup_minimal_symbol ("_ovly_buf_table", NULL
, objfile
);
1373 if (!ovly_buf_table_msym
)
1376 ovly_table_base
= SYMBOL_VALUE_ADDRESS (ovly_table_msym
);
1377 ovly_table_size
= MSYMBOL_SIZE (ovly_table_msym
);
1379 ovly_buf_table_base
= SYMBOL_VALUE_ADDRESS (ovly_buf_table_msym
);
1380 ovly_buf_table_size
= MSYMBOL_SIZE (ovly_buf_table_msym
);
1382 ovly_table
= xmalloc (ovly_table_size
);
1383 read_memory (ovly_table_base
, ovly_table
, ovly_table_size
);
1385 tbl
= OBSTACK_CALLOC (&objfile
->objfile_obstack
,
1386 objfile
->sections_end
- objfile
->sections
,
1387 struct spu_overlay_table
);
1389 for (i
= 0; i
< ovly_table_size
/ 16; i
++)
1391 CORE_ADDR vma
= extract_unsigned_integer (ovly_table
+ 16*i
+ 0, 4);
1392 CORE_ADDR size
= extract_unsigned_integer (ovly_table
+ 16*i
+ 4, 4);
1393 CORE_ADDR pos
= extract_unsigned_integer (ovly_table
+ 16*i
+ 8, 4);
1394 CORE_ADDR buf
= extract_unsigned_integer (ovly_table
+ 16*i
+ 12, 4);
1396 if (buf
== 0 || (buf
- 1) * 4 >= ovly_buf_table_size
)
1399 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1400 if (vma
== bfd_section_vma (objfile
->obfd
, osect
->the_bfd_section
)
1401 && pos
== osect
->the_bfd_section
->filepos
)
1403 int ndx
= osect
- objfile
->sections
;
1404 tbl
[ndx
].mapped_ptr
= ovly_buf_table_base
+ (buf
- 1) * 4;
1405 tbl
[ndx
].mapped_val
= i
+ 1;
1411 set_objfile_data (objfile
, spu_overlay_data
, tbl
);
1415 /* Read _ovly_buf_table entry from the target to dermine whether
1416 OSECT is currently mapped, and update the mapped state. */
1418 spu_overlay_update_osect (struct obj_section
*osect
)
1420 struct spu_overlay_table
*ovly_table
;
1423 ovly_table
= spu_get_overlay_table (osect
->objfile
);
1427 ovly_table
+= osect
- osect
->objfile
->sections
;
1428 if (ovly_table
->mapped_ptr
== 0)
1431 val
= read_memory_unsigned_integer (ovly_table
->mapped_ptr
, 4);
1432 osect
->ovly_mapped
= (val
== ovly_table
->mapped_val
);
1435 /* If OSECT is NULL, then update all sections' mapped state.
1436 If OSECT is non-NULL, then update only OSECT's mapped state. */
1438 spu_overlay_update (struct obj_section
*osect
)
1440 /* Just one section. */
1442 spu_overlay_update_osect (osect
);
1447 struct objfile
*objfile
;
1449 ALL_OBJSECTIONS (objfile
, osect
)
1450 if (section_is_overlay (osect
->the_bfd_section
))
1451 spu_overlay_update_osect (osect
);
1455 /* Whenever a new objfile is loaded, read the target's _ovly_table.
1456 If there is one, go through all sections and make sure for non-
1457 overlay sections LMA equals VMA, while for overlay sections LMA
1458 is larger than local store size. */
1460 spu_overlay_new_objfile (struct objfile
*objfile
)
1462 struct spu_overlay_table
*ovly_table
;
1463 struct obj_section
*osect
;
1465 /* If we've already touched this file, do nothing. */
1466 if (!objfile
|| objfile_data (objfile
, spu_overlay_data
) != NULL
)
1469 /* Check if this objfile has overlays. */
1470 ovly_table
= spu_get_overlay_table (objfile
);
1474 /* Now go and fiddle with all the LMAs. */
1475 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1477 bfd
*obfd
= objfile
->obfd
;
1478 asection
*bsect
= osect
->the_bfd_section
;
1479 int ndx
= osect
- objfile
->sections
;
1481 if (ovly_table
[ndx
].mapped_ptr
== 0)
1482 bfd_section_lma (obfd
, bsect
) = bfd_section_vma (obfd
, bsect
);
1484 bfd_section_lma (obfd
, bsect
) = bsect
->filepos
+ SPU_LS_SIZE
;
1489 /* "info spu" commands. */
1492 info_spu_event_command (char *args
, int from_tty
)
1494 struct frame_info
*frame
= get_selected_frame (NULL
);
1495 ULONGEST event_status
= 0;
1496 ULONGEST event_mask
= 0;
1497 struct cleanup
*chain
;
1503 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
1505 xsnprintf (annex
, sizeof annex
, "%d/event_status", id
);
1506 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1507 buf
, 0, sizeof buf
);
1509 error (_("Could not read event_status."));
1510 event_status
= strtoulst (buf
, NULL
, 16);
1512 xsnprintf (annex
, sizeof annex
, "%d/event_mask", id
);
1513 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1514 buf
, 0, sizeof buf
);
1516 error (_("Could not read event_mask."));
1517 event_mask
= strtoulst (buf
, NULL
, 16);
1519 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoEvent");
1521 if (ui_out_is_mi_like_p (uiout
))
1523 ui_out_field_fmt (uiout
, "event_status",
1524 "0x%s", phex_nz (event_status
, 4));
1525 ui_out_field_fmt (uiout
, "event_mask",
1526 "0x%s", phex_nz (event_mask
, 4));
1530 printf_filtered (_("Event Status 0x%s\n"), phex (event_status
, 4));
1531 printf_filtered (_("Event Mask 0x%s\n"), phex (event_mask
, 4));
1534 do_cleanups (chain
);
1538 info_spu_signal_command (char *args
, int from_tty
)
1540 struct frame_info
*frame
= get_selected_frame (NULL
);
1541 ULONGEST signal1
= 0;
1542 ULONGEST signal1_type
= 0;
1543 int signal1_pending
= 0;
1544 ULONGEST signal2
= 0;
1545 ULONGEST signal2_type
= 0;
1546 int signal2_pending
= 0;
1547 struct cleanup
*chain
;
1553 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
1555 xsnprintf (annex
, sizeof annex
, "%d/signal1", id
);
1556 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
1558 error (_("Could not read signal1."));
1561 signal1
= extract_unsigned_integer (buf
, 4);
1562 signal1_pending
= 1;
1565 xsnprintf (annex
, sizeof annex
, "%d/signal1_type", id
);
1566 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1567 buf
, 0, sizeof buf
);
1569 error (_("Could not read signal1_type."));
1570 signal1_type
= strtoulst (buf
, NULL
, 16);
1572 xsnprintf (annex
, sizeof annex
, "%d/signal2", id
);
1573 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
1575 error (_("Could not read signal2."));
1578 signal2
= extract_unsigned_integer (buf
, 4);
1579 signal2_pending
= 1;
1582 xsnprintf (annex
, sizeof annex
, "%d/signal2_type", id
);
1583 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1584 buf
, 0, sizeof buf
);
1586 error (_("Could not read signal2_type."));
1587 signal2_type
= strtoulst (buf
, NULL
, 16);
1589 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoSignal");
1591 if (ui_out_is_mi_like_p (uiout
))
1593 ui_out_field_int (uiout
, "signal1_pending", signal1_pending
);
1594 ui_out_field_fmt (uiout
, "signal1", "0x%s", phex_nz (signal1
, 4));
1595 ui_out_field_int (uiout
, "signal1_type", signal1_type
);
1596 ui_out_field_int (uiout
, "signal2_pending", signal2_pending
);
1597 ui_out_field_fmt (uiout
, "signal2", "0x%s", phex_nz (signal2
, 4));
1598 ui_out_field_int (uiout
, "signal2_type", signal2_type
);
1602 if (signal1_pending
)
1603 printf_filtered (_("Signal 1 control word 0x%s "), phex (signal1
, 4));
1605 printf_filtered (_("Signal 1 not pending "));
1608 printf_filtered (_("(Type Or)\n"));
1610 printf_filtered (_("(Type Overwrite)\n"));
1612 if (signal2_pending
)
1613 printf_filtered (_("Signal 2 control word 0x%s "), phex (signal2
, 4));
1615 printf_filtered (_("Signal 2 not pending "));
1618 printf_filtered (_("(Type Or)\n"));
1620 printf_filtered (_("(Type Overwrite)\n"));
1623 do_cleanups (chain
);
1627 info_spu_mailbox_list (gdb_byte
*buf
, int nr
,
1628 const char *field
, const char *msg
)
1630 struct cleanup
*chain
;
1636 chain
= make_cleanup_ui_out_table_begin_end (uiout
, 1, nr
, "mbox");
1638 ui_out_table_header (uiout
, 32, ui_left
, field
, msg
);
1639 ui_out_table_body (uiout
);
1641 for (i
= 0; i
< nr
; i
++)
1643 struct cleanup
*val_chain
;
1645 val_chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "mbox");
1646 val
= extract_unsigned_integer (buf
+ 4*i
, 4);
1647 ui_out_field_fmt (uiout
, field
, "0x%s", phex (val
, 4));
1648 do_cleanups (val_chain
);
1650 if (!ui_out_is_mi_like_p (uiout
))
1651 printf_filtered ("\n");
1654 do_cleanups (chain
);
1658 info_spu_mailbox_command (char *args
, int from_tty
)
1660 struct frame_info
*frame
= get_selected_frame (NULL
);
1661 struct cleanup
*chain
;
1667 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
1669 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoMailbox");
1671 xsnprintf (annex
, sizeof annex
, "%d/mbox_info", id
);
1672 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1673 buf
, 0, sizeof buf
);
1675 error (_("Could not read mbox_info."));
1677 info_spu_mailbox_list (buf
, len
/ 4, "mbox", "SPU Outbound Mailbox");
1679 xsnprintf (annex
, sizeof annex
, "%d/ibox_info", id
);
1680 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1681 buf
, 0, sizeof buf
);
1683 error (_("Could not read ibox_info."));
1685 info_spu_mailbox_list (buf
, len
/ 4, "ibox", "SPU Outbound Interrupt Mailbox");
1687 xsnprintf (annex
, sizeof annex
, "%d/wbox_info", id
);
1688 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1689 buf
, 0, sizeof buf
);
1691 error (_("Could not read wbox_info."));
1693 info_spu_mailbox_list (buf
, len
/ 4, "wbox", "SPU Inbound Mailbox");
1695 do_cleanups (chain
);
1699 spu_mfc_get_bitfield (ULONGEST word
, int first
, int last
)
1701 ULONGEST mask
= ~(~(ULONGEST
)0 << (last
- first
+ 1));
1702 return (word
>> (63 - last
)) & mask
;
1706 info_spu_dma_cmdlist (gdb_byte
*buf
, int nr
)
1708 static char *spu_mfc_opcode
[256] =
1710 /* 00 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1711 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1712 /* 10 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1713 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1714 /* 20 */ "put", "putb", "putf", NULL
, "putl", "putlb", "putlf", NULL
,
1715 "puts", "putbs", "putfs", NULL
, NULL
, NULL
, NULL
, NULL
,
1716 /* 30 */ "putr", "putrb", "putrf", NULL
, "putrl", "putrlb", "putrlf", NULL
,
1717 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1718 /* 40 */ "get", "getb", "getf", NULL
, "getl", "getlb", "getlf", NULL
,
1719 "gets", "getbs", "getfs", NULL
, NULL
, NULL
, NULL
, NULL
,
1720 /* 50 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1721 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1722 /* 60 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1723 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1724 /* 70 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1725 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1726 /* 80 */ "sdcrt", "sdcrtst", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1727 NULL
, "sdcrz", NULL
, NULL
, NULL
, "sdcrst", NULL
, "sdcrf",
1728 /* 90 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1729 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1730 /* a0 */ "sndsig", "sndsigb", "sndsigf", NULL
, NULL
, NULL
, NULL
, NULL
,
1731 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1732 /* b0 */ "putlluc", NULL
, NULL
, NULL
, "putllc", NULL
, NULL
, NULL
,
1733 "putqlluc", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1734 /* c0 */ "barrier", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1735 "mfceieio", NULL
, NULL
, NULL
, "mfcsync", NULL
, NULL
, NULL
,
1736 /* d0 */ "getllar", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1737 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1738 /* e0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1739 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1740 /* f0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1741 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1744 struct cleanup
*chain
;
1747 chain
= make_cleanup_ui_out_table_begin_end (uiout
, 10, nr
, "dma_cmd");
1749 ui_out_table_header (uiout
, 7, ui_left
, "opcode", "Opcode");
1750 ui_out_table_header (uiout
, 3, ui_left
, "tag", "Tag");
1751 ui_out_table_header (uiout
, 3, ui_left
, "tid", "TId");
1752 ui_out_table_header (uiout
, 3, ui_left
, "rid", "RId");
1753 ui_out_table_header (uiout
, 18, ui_left
, "ea", "EA");
1754 ui_out_table_header (uiout
, 7, ui_left
, "lsa", "LSA");
1755 ui_out_table_header (uiout
, 7, ui_left
, "size", "Size");
1756 ui_out_table_header (uiout
, 7, ui_left
, "lstaddr", "LstAddr");
1757 ui_out_table_header (uiout
, 7, ui_left
, "lstsize", "LstSize");
1758 ui_out_table_header (uiout
, 1, ui_left
, "error_p", "E");
1760 ui_out_table_body (uiout
);
1762 for (i
= 0; i
< nr
; i
++)
1764 struct cleanup
*cmd_chain
;
1765 ULONGEST mfc_cq_dw0
;
1766 ULONGEST mfc_cq_dw1
;
1767 ULONGEST mfc_cq_dw2
;
1768 ULONGEST mfc_cq_dw3
;
1769 int mfc_cmd_opcode
, mfc_cmd_tag
, rclass_id
, tclass_id
;
1770 int lsa
, size
, list_lsa
, list_size
, mfc_lsa
, mfc_size
;
1772 int list_valid_p
, noop_valid_p
, qw_valid_p
, ea_valid_p
, cmd_error_p
;
1774 /* Decode contents of MFC Command Queue Context Save/Restore Registers.
1775 See "Cell Broadband Engine Registers V1.3", section 3.3.2.1. */
1777 mfc_cq_dw0
= extract_unsigned_integer (buf
+ 32*i
, 8);
1778 mfc_cq_dw1
= extract_unsigned_integer (buf
+ 32*i
+ 8, 8);
1779 mfc_cq_dw2
= extract_unsigned_integer (buf
+ 32*i
+ 16, 8);
1780 mfc_cq_dw3
= extract_unsigned_integer (buf
+ 32*i
+ 24, 8);
1782 list_lsa
= spu_mfc_get_bitfield (mfc_cq_dw0
, 0, 14);
1783 list_size
= spu_mfc_get_bitfield (mfc_cq_dw0
, 15, 26);
1784 mfc_cmd_opcode
= spu_mfc_get_bitfield (mfc_cq_dw0
, 27, 34);
1785 mfc_cmd_tag
= spu_mfc_get_bitfield (mfc_cq_dw0
, 35, 39);
1786 list_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw0
, 40, 40);
1787 rclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 41, 43);
1788 tclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 44, 46);
1790 mfc_ea
= spu_mfc_get_bitfield (mfc_cq_dw1
, 0, 51) << 12
1791 | spu_mfc_get_bitfield (mfc_cq_dw2
, 25, 36);
1793 mfc_lsa
= spu_mfc_get_bitfield (mfc_cq_dw2
, 0, 13);
1794 mfc_size
= spu_mfc_get_bitfield (mfc_cq_dw2
, 14, 24);
1795 noop_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 37, 37);
1796 qw_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 38, 38);
1797 ea_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 39, 39);
1798 cmd_error_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 40, 40);
1800 cmd_chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "cmd");
1802 if (spu_mfc_opcode
[mfc_cmd_opcode
])
1803 ui_out_field_string (uiout
, "opcode", spu_mfc_opcode
[mfc_cmd_opcode
]);
1805 ui_out_field_int (uiout
, "opcode", mfc_cmd_opcode
);
1807 ui_out_field_int (uiout
, "tag", mfc_cmd_tag
);
1808 ui_out_field_int (uiout
, "tid", tclass_id
);
1809 ui_out_field_int (uiout
, "rid", rclass_id
);
1812 ui_out_field_fmt (uiout
, "ea", "0x%s", phex (mfc_ea
, 8));
1814 ui_out_field_skip (uiout
, "ea");
1816 ui_out_field_fmt (uiout
, "lsa", "0x%05x", mfc_lsa
<< 4);
1818 ui_out_field_fmt (uiout
, "size", "0x%05x", mfc_size
<< 4);
1820 ui_out_field_fmt (uiout
, "size", "0x%05x", mfc_size
);
1824 ui_out_field_fmt (uiout
, "lstaddr", "0x%05x", list_lsa
<< 3);
1825 ui_out_field_fmt (uiout
, "lstsize", "0x%05x", list_size
<< 3);
1829 ui_out_field_skip (uiout
, "lstaddr");
1830 ui_out_field_skip (uiout
, "lstsize");
1834 ui_out_field_string (uiout
, "error_p", "*");
1836 ui_out_field_skip (uiout
, "error_p");
1838 do_cleanups (cmd_chain
);
1840 if (!ui_out_is_mi_like_p (uiout
))
1841 printf_filtered ("\n");
1844 do_cleanups (chain
);
1848 info_spu_dma_command (char *args
, int from_tty
)
1850 struct frame_info
*frame
= get_selected_frame (NULL
);
1851 ULONGEST dma_info_type
;
1852 ULONGEST dma_info_mask
;
1853 ULONGEST dma_info_status
;
1854 ULONGEST dma_info_stall_and_notify
;
1855 ULONGEST dma_info_atomic_command_status
;
1856 struct cleanup
*chain
;
1862 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
1864 xsnprintf (annex
, sizeof annex
, "%d/dma_info", id
);
1865 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1866 buf
, 0, 40 + 16 * 32);
1868 error (_("Could not read dma_info."));
1870 dma_info_type
= extract_unsigned_integer (buf
, 8);
1871 dma_info_mask
= extract_unsigned_integer (buf
+ 8, 8);
1872 dma_info_status
= extract_unsigned_integer (buf
+ 16, 8);
1873 dma_info_stall_and_notify
= extract_unsigned_integer (buf
+ 24, 8);
1874 dma_info_atomic_command_status
= extract_unsigned_integer (buf
+ 32, 8);
1876 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoDMA");
1878 if (ui_out_is_mi_like_p (uiout
))
1880 ui_out_field_fmt (uiout
, "dma_info_type", "0x%s",
1881 phex_nz (dma_info_type
, 4));
1882 ui_out_field_fmt (uiout
, "dma_info_mask", "0x%s",
1883 phex_nz (dma_info_mask
, 4));
1884 ui_out_field_fmt (uiout
, "dma_info_status", "0x%s",
1885 phex_nz (dma_info_status
, 4));
1886 ui_out_field_fmt (uiout
, "dma_info_stall_and_notify", "0x%s",
1887 phex_nz (dma_info_stall_and_notify
, 4));
1888 ui_out_field_fmt (uiout
, "dma_info_atomic_command_status", "0x%s",
1889 phex_nz (dma_info_atomic_command_status
, 4));
1893 const char *query_msg
;
1895 switch (dma_info_type
)
1897 case 0: query_msg
= _("no query pending"); break;
1898 case 1: query_msg
= _("'any' query pending"); break;
1899 case 2: query_msg
= _("'all' query pending"); break;
1900 default: query_msg
= _("undefined query type"); break;
1903 printf_filtered (_("Tag-Group Status 0x%s\n"),
1904 phex (dma_info_status
, 4));
1905 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
1906 phex (dma_info_mask
, 4), query_msg
);
1907 printf_filtered (_("Stall-and-Notify 0x%s\n"),
1908 phex (dma_info_stall_and_notify
, 4));
1909 printf_filtered (_("Atomic Cmd Status 0x%s\n"),
1910 phex (dma_info_atomic_command_status
, 4));
1911 printf_filtered ("\n");
1914 info_spu_dma_cmdlist (buf
+ 40, 16);
1915 do_cleanups (chain
);
1919 info_spu_proxydma_command (char *args
, int from_tty
)
1921 struct frame_info
*frame
= get_selected_frame (NULL
);
1922 ULONGEST dma_info_type
;
1923 ULONGEST dma_info_mask
;
1924 ULONGEST dma_info_status
;
1925 struct cleanup
*chain
;
1931 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
1933 xsnprintf (annex
, sizeof annex
, "%d/proxydma_info", id
);
1934 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1935 buf
, 0, 24 + 8 * 32);
1937 error (_("Could not read proxydma_info."));
1939 dma_info_type
= extract_unsigned_integer (buf
, 8);
1940 dma_info_mask
= extract_unsigned_integer (buf
+ 8, 8);
1941 dma_info_status
= extract_unsigned_integer (buf
+ 16, 8);
1943 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoProxyDMA");
1945 if (ui_out_is_mi_like_p (uiout
))
1947 ui_out_field_fmt (uiout
, "proxydma_info_type", "0x%s",
1948 phex_nz (dma_info_type
, 4));
1949 ui_out_field_fmt (uiout
, "proxydma_info_mask", "0x%s",
1950 phex_nz (dma_info_mask
, 4));
1951 ui_out_field_fmt (uiout
, "proxydma_info_status", "0x%s",
1952 phex_nz (dma_info_status
, 4));
1956 const char *query_msg
;
1958 switch (dma_info_type
)
1960 case 0: query_msg
= _("no query pending"); break;
1961 case 1: query_msg
= _("'any' query pending"); break;
1962 case 2: query_msg
= _("'all' query pending"); break;
1963 default: query_msg
= _("undefined query type"); break;
1966 printf_filtered (_("Tag-Group Status 0x%s\n"),
1967 phex (dma_info_status
, 4));
1968 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
1969 phex (dma_info_mask
, 4), query_msg
);
1970 printf_filtered ("\n");
1973 info_spu_dma_cmdlist (buf
+ 24, 8);
1974 do_cleanups (chain
);
1978 info_spu_command (char *args
, int from_tty
)
1980 printf_unfiltered (_("\"info spu\" must be followed by the name of an SPU facility.\n"));
1981 help_list (infospucmdlist
, "info spu ", -1, gdb_stdout
);
1985 /* Set up gdbarch struct. */
1987 static struct gdbarch
*
1988 spu_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1990 struct gdbarch
*gdbarch
;
1991 struct gdbarch_tdep
*tdep
;
1993 /* Find a candidate among the list of pre-declared architectures. */
1994 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1996 return arches
->gdbarch
;
1999 if (info
.bfd_arch_info
->mach
!= bfd_mach_spu
)
2002 /* Yes, create a new architecture. */
2003 tdep
= XCALLOC (1, struct gdbarch_tdep
);
2004 gdbarch
= gdbarch_alloc (&info
, tdep
);
2007 set_gdbarch_print_insn (gdbarch
, print_insn_spu
);
2010 set_gdbarch_num_regs (gdbarch
, SPU_NUM_REGS
);
2011 set_gdbarch_num_pseudo_regs (gdbarch
, SPU_NUM_PSEUDO_REGS
);
2012 set_gdbarch_sp_regnum (gdbarch
, SPU_SP_REGNUM
);
2013 set_gdbarch_pc_regnum (gdbarch
, SPU_PC_REGNUM
);
2014 set_gdbarch_read_pc (gdbarch
, spu_read_pc
);
2015 set_gdbarch_write_pc (gdbarch
, spu_write_pc
);
2016 set_gdbarch_register_name (gdbarch
, spu_register_name
);
2017 set_gdbarch_register_type (gdbarch
, spu_register_type
);
2018 set_gdbarch_pseudo_register_read (gdbarch
, spu_pseudo_register_read
);
2019 set_gdbarch_pseudo_register_write (gdbarch
, spu_pseudo_register_write
);
2020 set_gdbarch_value_from_register (gdbarch
, spu_value_from_register
);
2021 set_gdbarch_register_reggroup_p (gdbarch
, spu_register_reggroup_p
);
2024 set_gdbarch_char_signed (gdbarch
, 0);
2025 set_gdbarch_ptr_bit (gdbarch
, 32);
2026 set_gdbarch_addr_bit (gdbarch
, 32);
2027 set_gdbarch_short_bit (gdbarch
, 16);
2028 set_gdbarch_int_bit (gdbarch
, 32);
2029 set_gdbarch_long_bit (gdbarch
, 32);
2030 set_gdbarch_long_long_bit (gdbarch
, 64);
2031 set_gdbarch_float_bit (gdbarch
, 32);
2032 set_gdbarch_double_bit (gdbarch
, 64);
2033 set_gdbarch_long_double_bit (gdbarch
, 64);
2034 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
2035 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
2036 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
2038 /* Address conversion. */
2039 set_gdbarch_pointer_to_address (gdbarch
, spu_pointer_to_address
);
2040 set_gdbarch_integer_to_address (gdbarch
, spu_integer_to_address
);
2042 /* Inferior function calls. */
2043 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
2044 set_gdbarch_frame_align (gdbarch
, spu_frame_align
);
2045 set_gdbarch_push_dummy_call (gdbarch
, spu_push_dummy_call
);
2046 set_gdbarch_unwind_dummy_id (gdbarch
, spu_unwind_dummy_id
);
2047 set_gdbarch_return_value (gdbarch
, spu_return_value
);
2049 /* Frame handling. */
2050 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2051 frame_unwind_append_sniffer (gdbarch
, spu_frame_sniffer
);
2052 frame_base_set_default (gdbarch
, &spu_frame_base
);
2053 set_gdbarch_unwind_pc (gdbarch
, spu_unwind_pc
);
2054 set_gdbarch_unwind_sp (gdbarch
, spu_unwind_sp
);
2055 set_gdbarch_virtual_frame_pointer (gdbarch
, spu_virtual_frame_pointer
);
2056 set_gdbarch_frame_args_skip (gdbarch
, 0);
2057 set_gdbarch_skip_prologue (gdbarch
, spu_skip_prologue
);
2058 set_gdbarch_in_function_epilogue_p (gdbarch
, spu_in_function_epilogue_p
);
2061 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
2062 set_gdbarch_breakpoint_from_pc (gdbarch
, spu_breakpoint_from_pc
);
2063 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
2064 set_gdbarch_software_single_step (gdbarch
, spu_software_single_step
);
2067 set_gdbarch_overlay_update (gdbarch
, spu_overlay_update
);
2073 _initialize_spu_tdep (void)
2075 register_gdbarch_init (bfd_arch_spu
, spu_gdbarch_init
);
2077 /* Add ourselves to objfile event chain. */
2078 observer_attach_new_objfile (spu_overlay_new_objfile
);
2079 spu_overlay_data
= register_objfile_data ();
2081 /* Add root prefix command for all "info spu" commands. */
2082 add_prefix_cmd ("spu", class_info
, info_spu_command
,
2083 _("Various SPU specific commands."),
2084 &infospucmdlist
, "info spu ", 0, &infolist
);
2086 /* Add various "info spu" commands. */
2087 add_cmd ("event", class_info
, info_spu_event_command
,
2088 _("Display SPU event facility status.\n"),
2090 add_cmd ("signal", class_info
, info_spu_signal_command
,
2091 _("Display SPU signal notification facility status.\n"),
2093 add_cmd ("mailbox", class_info
, info_spu_mailbox_command
,
2094 _("Display SPU mailbox facility status.\n"),
2096 add_cmd ("dma", class_info
, info_spu_dma_command
,
2097 _("Display MFC DMA status.\n"),
2099 add_cmd ("proxydma", class_info
, info_spu_proxydma_command
,
2100 _("Display MFC Proxy-DMA status.\n"),