1 /* SPU target-dependent code for GDB, the GNU debugger.
2 Copyright (C) 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
4 Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
5 Based on a port by Sid Manning <sid@us.ibm.com>.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
30 #include "frame-unwind.h"
31 #include "frame-base.h"
32 #include "trad-frame.h"
41 #include "reggroups.h"
42 #include "floatformat.h"
50 /* The list of available "set spu " and "show spu " commands. */
51 static struct cmd_list_element
*setspucmdlist
= NULL
;
52 static struct cmd_list_element
*showspucmdlist
= NULL
;
54 /* Whether to stop for new SPE contexts. */
55 static int spu_stop_on_load_p
= 0;
56 /* Whether to automatically flush the SW-managed cache. */
57 static int spu_auto_flush_cache_p
= 1;
60 /* The tdep structure. */
63 /* The spufs ID identifying our address space. */
66 /* SPU-specific vector type. */
67 struct type
*spu_builtin_type_vec128
;
71 /* SPU-specific vector type. */
73 spu_builtin_type_vec128 (struct gdbarch
*gdbarch
)
75 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
77 if (!tdep
->spu_builtin_type_vec128
)
79 const struct builtin_type
*bt
= builtin_type (gdbarch
);
82 t
= arch_composite_type (gdbarch
,
83 "__spu_builtin_type_vec128", TYPE_CODE_UNION
);
84 append_composite_type_field (t
, "uint128", bt
->builtin_int128
);
85 append_composite_type_field (t
, "v2_int64",
86 init_vector_type (bt
->builtin_int64
, 2));
87 append_composite_type_field (t
, "v4_int32",
88 init_vector_type (bt
->builtin_int32
, 4));
89 append_composite_type_field (t
, "v8_int16",
90 init_vector_type (bt
->builtin_int16
, 8));
91 append_composite_type_field (t
, "v16_int8",
92 init_vector_type (bt
->builtin_int8
, 16));
93 append_composite_type_field (t
, "v2_double",
94 init_vector_type (bt
->builtin_double
, 2));
95 append_composite_type_field (t
, "v4_float",
96 init_vector_type (bt
->builtin_float
, 4));
99 TYPE_NAME (t
) = "spu_builtin_type_vec128";
101 tdep
->spu_builtin_type_vec128
= t
;
104 return tdep
->spu_builtin_type_vec128
;
108 /* The list of available "info spu " commands. */
109 static struct cmd_list_element
*infospucmdlist
= NULL
;
114 spu_register_name (struct gdbarch
*gdbarch
, int reg_nr
)
116 static char *register_names
[] =
118 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
119 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
120 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
121 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
122 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
123 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
124 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
125 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
126 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
127 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
128 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
129 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
130 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
131 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
132 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
133 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
134 "id", "pc", "sp", "fpscr", "srr0", "lslr", "decr", "decr_status"
139 if (reg_nr
>= sizeof register_names
/ sizeof *register_names
)
142 return register_names
[reg_nr
];
146 spu_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
148 if (reg_nr
< SPU_NUM_GPRS
)
149 return spu_builtin_type_vec128 (gdbarch
);
154 return builtin_type (gdbarch
)->builtin_uint32
;
157 return builtin_type (gdbarch
)->builtin_func_ptr
;
160 return builtin_type (gdbarch
)->builtin_data_ptr
;
162 case SPU_FPSCR_REGNUM
:
163 return builtin_type (gdbarch
)->builtin_uint128
;
165 case SPU_SRR0_REGNUM
:
166 return builtin_type (gdbarch
)->builtin_uint32
;
168 case SPU_LSLR_REGNUM
:
169 return builtin_type (gdbarch
)->builtin_uint32
;
171 case SPU_DECR_REGNUM
:
172 return builtin_type (gdbarch
)->builtin_uint32
;
174 case SPU_DECR_STATUS_REGNUM
:
175 return builtin_type (gdbarch
)->builtin_uint32
;
178 internal_error (__FILE__
, __LINE__
, "invalid regnum");
182 /* Pseudo registers for preferred slots - stack pointer. */
185 spu_pseudo_register_read_spu (struct regcache
*regcache
, const char *regname
,
188 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
189 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
194 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
195 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
196 memset (reg
, 0, sizeof reg
);
197 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
200 store_unsigned_integer (buf
, 4, byte_order
, strtoulst (reg
, NULL
, 16));
204 spu_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
205 int regnum
, gdb_byte
*buf
)
214 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
215 memcpy (buf
, reg
, 4);
218 case SPU_FPSCR_REGNUM
:
219 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
220 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
221 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
224 case SPU_SRR0_REGNUM
:
225 spu_pseudo_register_read_spu (regcache
, "srr0", buf
);
228 case SPU_LSLR_REGNUM
:
229 spu_pseudo_register_read_spu (regcache
, "lslr", buf
);
232 case SPU_DECR_REGNUM
:
233 spu_pseudo_register_read_spu (regcache
, "decr", buf
);
236 case SPU_DECR_STATUS_REGNUM
:
237 spu_pseudo_register_read_spu (regcache
, "decr_status", buf
);
241 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
246 spu_pseudo_register_write_spu (struct regcache
*regcache
, const char *regname
,
249 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
250 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
255 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
256 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
257 xsnprintf (reg
, sizeof reg
, "0x%s",
258 phex_nz (extract_unsigned_integer (buf
, 4, byte_order
), 4));
259 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
,
260 reg
, 0, strlen (reg
));
264 spu_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
265 int regnum
, const gdb_byte
*buf
)
274 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
275 memcpy (reg
, buf
, 4);
276 regcache_raw_write (regcache
, SPU_RAW_SP_REGNUM
, reg
);
279 case SPU_FPSCR_REGNUM
:
280 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
281 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
282 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
285 case SPU_SRR0_REGNUM
:
286 spu_pseudo_register_write_spu (regcache
, "srr0", buf
);
289 case SPU_LSLR_REGNUM
:
290 spu_pseudo_register_write_spu (regcache
, "lslr", buf
);
293 case SPU_DECR_REGNUM
:
294 spu_pseudo_register_write_spu (regcache
, "decr", buf
);
297 case SPU_DECR_STATUS_REGNUM
:
298 spu_pseudo_register_write_spu (regcache
, "decr_status", buf
);
302 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
306 /* Value conversion -- access scalar values at the preferred slot. */
308 static struct value
*
309 spu_value_from_register (struct type
*type
, int regnum
,
310 struct frame_info
*frame
)
312 struct value
*value
= default_value_from_register (type
, regnum
, frame
);
313 int len
= TYPE_LENGTH (type
);
315 if (regnum
< SPU_NUM_GPRS
&& len
< 16)
317 int preferred_slot
= len
< 4 ? 4 - len
: 0;
318 set_value_offset (value
, preferred_slot
);
324 /* Register groups. */
327 spu_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
328 struct reggroup
*group
)
330 /* Registers displayed via 'info regs'. */
331 if (group
== general_reggroup
)
334 /* Registers displayed via 'info float'. */
335 if (group
== float_reggroup
)
338 /* Registers that need to be saved/restored in order to
339 push or pop frames. */
340 if (group
== save_reggroup
|| group
== restore_reggroup
)
343 return default_register_reggroup_p (gdbarch
, regnum
, group
);
347 /* Address handling. */
350 spu_gdbarch_id (struct gdbarch
*gdbarch
)
352 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
355 /* The objfile architecture of a standalone SPU executable does not
356 provide an SPU ID. Retrieve it from the the objfile's relocated
357 address range in this special case. */
359 && symfile_objfile
&& symfile_objfile
->obfd
360 && bfd_get_arch (symfile_objfile
->obfd
) == bfd_arch_spu
361 && symfile_objfile
->sections
!= symfile_objfile
->sections_end
)
362 id
= SPUADDR_SPU (obj_section_addr (symfile_objfile
->sections
));
374 return SPU_LS_SIZE
- 1;
376 xsnprintf (annex
, sizeof annex
, "%d/lslr", id
);
377 memset (buf
, 0, sizeof buf
);
378 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
381 return strtoulst (buf
, NULL
, 16);
385 spu_address_class_type_flags (int byte_size
, int dwarf2_addr_class
)
387 if (dwarf2_addr_class
== 1)
388 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
394 spu_address_class_type_flags_to_name (struct gdbarch
*gdbarch
, int type_flags
)
396 if (type_flags
& TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
)
403 spu_address_class_name_to_type_flags (struct gdbarch
*gdbarch
,
404 const char *name
, int *type_flags_ptr
)
406 if (strcmp (name
, "__ea") == 0)
408 *type_flags_ptr
= TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
416 spu_address_to_pointer (struct gdbarch
*gdbarch
,
417 struct type
*type
, gdb_byte
*buf
, CORE_ADDR addr
)
419 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
420 store_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
,
421 SPUADDR_ADDR (addr
));
425 spu_pointer_to_address (struct gdbarch
*gdbarch
,
426 struct type
*type
, const gdb_byte
*buf
)
428 int id
= spu_gdbarch_id (gdbarch
);
429 ULONGEST lslr
= spu_lslr (id
);
430 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
432 = extract_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
);
434 /* Do not convert __ea pointers. */
435 if (TYPE_ADDRESS_CLASS_1 (type
))
438 return addr
? SPUADDR (id
, addr
& lslr
) : 0;
442 spu_integer_to_address (struct gdbarch
*gdbarch
,
443 struct type
*type
, const gdb_byte
*buf
)
445 int id
= spu_gdbarch_id (gdbarch
);
446 ULONGEST lslr
= spu_lslr (id
);
447 ULONGEST addr
= unpack_long (type
, buf
);
449 return SPUADDR (id
, addr
& lslr
);
453 /* Decoding SPU instructions. */
490 is_rr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
)
492 if ((insn
>> 21) == op
)
495 *ra
= (insn
>> 7) & 127;
496 *rb
= (insn
>> 14) & 127;
504 is_rrr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
, int *rc
)
506 if ((insn
>> 28) == op
)
508 *rt
= (insn
>> 21) & 127;
509 *ra
= (insn
>> 7) & 127;
510 *rb
= (insn
>> 14) & 127;
519 is_ri7 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i7
)
521 if ((insn
>> 21) == op
)
524 *ra
= (insn
>> 7) & 127;
525 *i7
= (((insn
>> 14) & 127) ^ 0x40) - 0x40;
533 is_ri10 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i10
)
535 if ((insn
>> 24) == op
)
538 *ra
= (insn
>> 7) & 127;
539 *i10
= (((insn
>> 14) & 0x3ff) ^ 0x200) - 0x200;
547 is_ri16 (unsigned int insn
, int op
, int *rt
, int *i16
)
549 if ((insn
>> 23) == op
)
552 *i16
= (((insn
>> 7) & 0xffff) ^ 0x8000) - 0x8000;
560 is_ri18 (unsigned int insn
, int op
, int *rt
, int *i18
)
562 if ((insn
>> 25) == op
)
565 *i18
= (((insn
>> 7) & 0x3ffff) ^ 0x20000) - 0x20000;
573 is_branch (unsigned int insn
, int *offset
, int *reg
)
577 if (is_ri16 (insn
, op_br
, &rt
, &i16
)
578 || is_ri16 (insn
, op_brsl
, &rt
, &i16
)
579 || is_ri16 (insn
, op_brnz
, &rt
, &i16
)
580 || is_ri16 (insn
, op_brz
, &rt
, &i16
)
581 || is_ri16 (insn
, op_brhnz
, &rt
, &i16
)
582 || is_ri16 (insn
, op_brhz
, &rt
, &i16
))
584 *reg
= SPU_PC_REGNUM
;
589 if (is_ri16 (insn
, op_bra
, &rt
, &i16
)
590 || is_ri16 (insn
, op_brasl
, &rt
, &i16
))
597 if (is_ri7 (insn
, op_bi
, &rt
, reg
, &i7
)
598 || is_ri7 (insn
, op_bisl
, &rt
, reg
, &i7
)
599 || is_ri7 (insn
, op_biz
, &rt
, reg
, &i7
)
600 || is_ri7 (insn
, op_binz
, &rt
, reg
, &i7
)
601 || is_ri7 (insn
, op_bihz
, &rt
, reg
, &i7
)
602 || is_ri7 (insn
, op_bihnz
, &rt
, reg
, &i7
))
612 /* Prolog parsing. */
614 struct spu_prologue_data
616 /* Stack frame size. -1 if analysis was unsuccessful. */
619 /* How to find the CFA. The CFA is equal to SP at function entry. */
623 /* Offset relative to CFA where a register is saved. -1 if invalid. */
624 int reg_offset
[SPU_NUM_GPRS
];
628 spu_analyze_prologue (struct gdbarch
*gdbarch
,
629 CORE_ADDR start_pc
, CORE_ADDR end_pc
,
630 struct spu_prologue_data
*data
)
632 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
636 int reg_immed
[SPU_NUM_GPRS
];
638 CORE_ADDR prolog_pc
= start_pc
;
643 /* Initialize DATA to default values. */
646 data
->cfa_reg
= SPU_RAW_SP_REGNUM
;
647 data
->cfa_offset
= 0;
649 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
650 data
->reg_offset
[i
] = -1;
652 /* Set up REG_IMMED array. This is non-zero for a register if we know its
653 preferred slot currently holds this immediate value. */
654 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
657 /* Scan instructions until the first branch.
659 The following instructions are important prolog components:
661 - The first instruction to set up the stack pointer.
662 - The first instruction to set up the frame pointer.
663 - The first instruction to save the link register.
665 We return the instruction after the latest of these three,
666 or the incoming PC if none is found. The first instruction
667 to set up the stack pointer also defines the frame size.
669 Note that instructions saving incoming arguments to their stack
670 slots are not counted as important, because they are hard to
671 identify with certainty. This should not matter much, because
672 arguments are relevant only in code compiled with debug data,
673 and in such code the GDB core will advance until the first source
674 line anyway, using SAL data.
676 For purposes of stack unwinding, we analyze the following types
677 of instructions in addition:
679 - Any instruction adding to the current frame pointer.
680 - Any instruction loading an immediate constant into a register.
681 - Any instruction storing a register onto the stack.
683 These are used to compute the CFA and REG_OFFSET output. */
685 for (pc
= start_pc
; pc
< end_pc
; pc
+= 4)
688 int rt
, ra
, rb
, rc
, immed
;
690 if (target_read_memory (pc
, buf
, 4))
692 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
694 /* AI is the typical instruction to set up a stack frame.
695 It is also used to initialize the frame pointer. */
696 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
))
698 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
699 data
->cfa_offset
-= immed
;
701 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
709 else if (rt
== SPU_FP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
715 data
->cfa_reg
= SPU_FP_REGNUM
;
716 data
->cfa_offset
-= immed
;
720 /* A is used to set up stack frames of size >= 512 bytes.
721 If we have tracked the contents of the addend register,
722 we can handle this as well. */
723 else if (is_rr (insn
, op_a
, &rt
, &ra
, &rb
))
725 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
727 if (reg_immed
[rb
] != 0)
728 data
->cfa_offset
-= reg_immed
[rb
];
730 data
->cfa_reg
= -1; /* We don't know the CFA any more. */
733 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
739 if (reg_immed
[rb
] != 0)
740 data
->size
= -reg_immed
[rb
];
744 /* We need to track IL and ILA used to load immediate constants
745 in case they are later used as input to an A instruction. */
746 else if (is_ri16 (insn
, op_il
, &rt
, &immed
))
748 reg_immed
[rt
] = immed
;
750 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
754 else if (is_ri18 (insn
, op_ila
, &rt
, &immed
))
756 reg_immed
[rt
] = immed
& 0x3ffff;
758 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
762 /* STQD is used to save registers to the stack. */
763 else if (is_ri10 (insn
, op_stqd
, &rt
, &ra
, &immed
))
765 if (ra
== data
->cfa_reg
)
766 data
->reg_offset
[rt
] = data
->cfa_offset
- (immed
<< 4);
768 if (ra
== data
->cfa_reg
&& rt
== SPU_LR_REGNUM
776 /* _start uses SELB to set up the stack pointer. */
777 else if (is_rrr (insn
, op_selb
, &rt
, &ra
, &rb
, &rc
))
779 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
783 /* We terminate if we find a branch. */
784 else if (is_branch (insn
, &immed
, &ra
))
789 /* If we successfully parsed until here, and didn't find any instruction
790 modifying SP, we assume we have a frameless function. */
794 /* Return cooked instead of raw SP. */
795 if (data
->cfa_reg
== SPU_RAW_SP_REGNUM
)
796 data
->cfa_reg
= SPU_SP_REGNUM
;
801 /* Return the first instruction after the prologue starting at PC. */
803 spu_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
805 struct spu_prologue_data data
;
806 return spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
809 /* Return the frame pointer in use at address PC. */
811 spu_virtual_frame_pointer (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
812 int *reg
, LONGEST
*offset
)
814 struct spu_prologue_data data
;
815 spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
817 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
819 /* The 'frame pointer' address is CFA minus frame size. */
821 *offset
= data
.cfa_offset
- data
.size
;
825 /* ??? We don't really know ... */
826 *reg
= SPU_SP_REGNUM
;
831 /* Return true if we are in the function's epilogue, i.e. after the
832 instruction that destroyed the function's stack frame.
834 1) scan forward from the point of execution:
835 a) If you find an instruction that modifies the stack pointer
836 or transfers control (except a return), execution is not in
838 b) Stop scanning if you find a return instruction or reach the
839 end of the function or reach the hard limit for the size of
841 2) scan backward from the point of execution:
842 a) If you find an instruction that modifies the stack pointer,
843 execution *is* in an epilogue, return.
844 b) Stop scanning if you reach an instruction that transfers
845 control or the beginning of the function or reach the hard
846 limit for the size of an epilogue. */
849 spu_in_function_epilogue_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
851 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
852 CORE_ADDR scan_pc
, func_start
, func_end
, epilogue_start
, epilogue_end
;
855 int rt
, ra
, rb
, rc
, immed
;
857 /* Find the search limits based on function boundaries and hard limit.
858 We assume the epilogue can be up to 64 instructions long. */
860 const int spu_max_epilogue_size
= 64 * 4;
862 if (!find_pc_partial_function (pc
, NULL
, &func_start
, &func_end
))
865 if (pc
- func_start
< spu_max_epilogue_size
)
866 epilogue_start
= func_start
;
868 epilogue_start
= pc
- spu_max_epilogue_size
;
870 if (func_end
- pc
< spu_max_epilogue_size
)
871 epilogue_end
= func_end
;
873 epilogue_end
= pc
+ spu_max_epilogue_size
;
875 /* Scan forward until next 'bi $0'. */
877 for (scan_pc
= pc
; scan_pc
< epilogue_end
; scan_pc
+= 4)
879 if (target_read_memory (scan_pc
, buf
, 4))
881 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
883 if (is_branch (insn
, &immed
, &ra
))
885 if (immed
== 0 && ra
== SPU_LR_REGNUM
)
891 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
892 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
893 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
895 if (rt
== SPU_RAW_SP_REGNUM
)
900 if (scan_pc
>= epilogue_end
)
903 /* Scan backward until adjustment to stack pointer (R1). */
905 for (scan_pc
= pc
- 4; scan_pc
>= epilogue_start
; scan_pc
-= 4)
907 if (target_read_memory (scan_pc
, buf
, 4))
909 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
911 if (is_branch (insn
, &immed
, &ra
))
914 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
915 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
916 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
918 if (rt
== SPU_RAW_SP_REGNUM
)
927 /* Normal stack frames. */
929 struct spu_unwind_cache
932 CORE_ADDR frame_base
;
933 CORE_ADDR local_base
;
935 struct trad_frame_saved_reg
*saved_regs
;
938 static struct spu_unwind_cache
*
939 spu_frame_unwind_cache (struct frame_info
*this_frame
,
940 void **this_prologue_cache
)
942 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
943 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
944 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
945 struct spu_unwind_cache
*info
;
946 struct spu_prologue_data data
;
947 CORE_ADDR id
= tdep
->id
;
950 if (*this_prologue_cache
)
951 return *this_prologue_cache
;
953 info
= FRAME_OBSTACK_ZALLOC (struct spu_unwind_cache
);
954 *this_prologue_cache
= info
;
955 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
956 info
->frame_base
= 0;
957 info
->local_base
= 0;
959 /* Find the start of the current function, and analyze its prologue. */
960 info
->func
= get_frame_func (this_frame
);
963 /* Fall back to using the current PC as frame ID. */
964 info
->func
= get_frame_pc (this_frame
);
968 spu_analyze_prologue (gdbarch
, info
->func
, get_frame_pc (this_frame
),
971 /* If successful, use prologue analysis data. */
972 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
977 /* Determine CFA via unwound CFA_REG plus CFA_OFFSET. */
978 get_frame_register (this_frame
, data
.cfa_reg
, buf
);
979 cfa
= extract_unsigned_integer (buf
, 4, byte_order
) + data
.cfa_offset
;
980 cfa
= SPUADDR (id
, cfa
);
982 /* Call-saved register slots. */
983 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
984 if (i
== SPU_LR_REGNUM
985 || (i
>= SPU_SAVED1_REGNUM
&& i
<= SPU_SAVEDN_REGNUM
))
986 if (data
.reg_offset
[i
] != -1)
987 info
->saved_regs
[i
].addr
= cfa
- data
.reg_offset
[i
];
990 info
->frame_base
= cfa
;
991 info
->local_base
= cfa
- data
.size
;
994 /* Otherwise, fall back to reading the backchain link. */
1001 /* Get the backchain. */
1002 reg
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1003 status
= safe_read_memory_integer (SPUADDR (id
, reg
), 4, byte_order
,
1006 /* A zero backchain terminates the frame chain. Also, sanity
1007 check against the local store size limit. */
1008 if (status
&& backchain
> 0 && backchain
< SPU_LS_SIZE
)
1010 /* Assume the link register is saved into its slot. */
1011 if (backchain
+ 16 < SPU_LS_SIZE
)
1012 info
->saved_regs
[SPU_LR_REGNUM
].addr
= SPUADDR (id
, backchain
+ 16);
1015 info
->frame_base
= SPUADDR (id
, backchain
);
1016 info
->local_base
= SPUADDR (id
, reg
);
1020 /* If we didn't find a frame, we cannot determine SP / return address. */
1021 if (info
->frame_base
== 0)
1024 /* The previous SP is equal to the CFA. */
1025 trad_frame_set_value (info
->saved_regs
, SPU_SP_REGNUM
,
1026 SPUADDR_ADDR (info
->frame_base
));
1028 /* Read full contents of the unwound link register in order to
1029 be able to determine the return address. */
1030 if (trad_frame_addr_p (info
->saved_regs
, SPU_LR_REGNUM
))
1031 target_read_memory (info
->saved_regs
[SPU_LR_REGNUM
].addr
, buf
, 16);
1033 get_frame_register (this_frame
, SPU_LR_REGNUM
, buf
);
1035 /* Normally, the return address is contained in the slot 0 of the
1036 link register, and slots 1-3 are zero. For an overlay return,
1037 slot 0 contains the address of the overlay manager return stub,
1038 slot 1 contains the partition number of the overlay section to
1039 be returned to, and slot 2 contains the return address within
1040 that section. Return the latter address in that case. */
1041 if (extract_unsigned_integer (buf
+ 8, 4, byte_order
) != 0)
1042 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1043 extract_unsigned_integer (buf
+ 8, 4, byte_order
));
1045 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1046 extract_unsigned_integer (buf
, 4, byte_order
));
1052 spu_frame_this_id (struct frame_info
*this_frame
,
1053 void **this_prologue_cache
, struct frame_id
*this_id
)
1055 struct spu_unwind_cache
*info
=
1056 spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1058 if (info
->frame_base
== 0)
1061 *this_id
= frame_id_build (info
->frame_base
, info
->func
);
1064 static struct value
*
1065 spu_frame_prev_register (struct frame_info
*this_frame
,
1066 void **this_prologue_cache
, int regnum
)
1068 struct spu_unwind_cache
*info
1069 = spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1071 /* Special-case the stack pointer. */
1072 if (regnum
== SPU_RAW_SP_REGNUM
)
1073 regnum
= SPU_SP_REGNUM
;
1075 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
1078 static const struct frame_unwind spu_frame_unwind
= {
1081 spu_frame_prev_register
,
1083 default_frame_sniffer
1087 spu_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
1089 struct spu_unwind_cache
*info
1090 = spu_frame_unwind_cache (this_frame
, this_cache
);
1091 return info
->local_base
;
1094 static const struct frame_base spu_frame_base
= {
1096 spu_frame_base_address
,
1097 spu_frame_base_address
,
1098 spu_frame_base_address
1102 spu_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1104 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1105 CORE_ADDR pc
= frame_unwind_register_unsigned (next_frame
, SPU_PC_REGNUM
);
1106 /* Mask off interrupt enable bit. */
1107 return SPUADDR (tdep
->id
, pc
& -4);
1111 spu_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1113 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1114 CORE_ADDR sp
= frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
1115 return SPUADDR (tdep
->id
, sp
);
1119 spu_read_pc (struct regcache
*regcache
)
1121 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1123 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &pc
);
1124 /* Mask off interrupt enable bit. */
1125 return SPUADDR (tdep
->id
, pc
& -4);
1129 spu_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1131 /* Keep interrupt enabled state unchanged. */
1133 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &old_pc
);
1134 regcache_cooked_write_unsigned (regcache
, SPU_PC_REGNUM
,
1135 (SPUADDR_ADDR (pc
) & -4) | (old_pc
& 3));
1139 /* Cell/B.E. cross-architecture unwinder support. */
1141 struct spu2ppu_cache
1143 struct frame_id frame_id
;
1144 struct regcache
*regcache
;
1147 static struct gdbarch
*
1148 spu2ppu_prev_arch (struct frame_info
*this_frame
, void **this_cache
)
1150 struct spu2ppu_cache
*cache
= *this_cache
;
1151 return get_regcache_arch (cache
->regcache
);
1155 spu2ppu_this_id (struct frame_info
*this_frame
,
1156 void **this_cache
, struct frame_id
*this_id
)
1158 struct spu2ppu_cache
*cache
= *this_cache
;
1159 *this_id
= cache
->frame_id
;
1162 static struct value
*
1163 spu2ppu_prev_register (struct frame_info
*this_frame
,
1164 void **this_cache
, int regnum
)
1166 struct spu2ppu_cache
*cache
= *this_cache
;
1167 struct gdbarch
*gdbarch
= get_regcache_arch (cache
->regcache
);
1170 buf
= alloca (register_size (gdbarch
, regnum
));
1171 regcache_cooked_read (cache
->regcache
, regnum
, buf
);
1172 return frame_unwind_got_bytes (this_frame
, regnum
, buf
);
1176 spu2ppu_sniffer (const struct frame_unwind
*self
,
1177 struct frame_info
*this_frame
, void **this_prologue_cache
)
1179 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1180 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1181 CORE_ADDR base
, func
, backchain
;
1184 if (gdbarch_bfd_arch_info (target_gdbarch
)->arch
== bfd_arch_spu
)
1187 base
= get_frame_sp (this_frame
);
1188 func
= get_frame_pc (this_frame
);
1189 if (target_read_memory (base
, buf
, 4))
1191 backchain
= extract_unsigned_integer (buf
, 4, byte_order
);
1195 struct frame_info
*fi
;
1197 struct spu2ppu_cache
*cache
1198 = FRAME_OBSTACK_CALLOC (1, struct spu2ppu_cache
);
1200 cache
->frame_id
= frame_id_build (base
+ 16, func
);
1202 for (fi
= get_next_frame (this_frame
); fi
; fi
= get_next_frame (fi
))
1203 if (gdbarch_bfd_arch_info (get_frame_arch (fi
))->arch
!= bfd_arch_spu
)
1208 cache
->regcache
= frame_save_as_regcache (fi
);
1209 *this_prologue_cache
= cache
;
1214 struct regcache
*regcache
;
1215 regcache
= get_thread_arch_regcache (inferior_ptid
, target_gdbarch
);
1216 cache
->regcache
= regcache_dup (regcache
);
1217 *this_prologue_cache
= cache
;
1226 spu2ppu_dealloc_cache (struct frame_info
*self
, void *this_cache
)
1228 struct spu2ppu_cache
*cache
= this_cache
;
1229 regcache_xfree (cache
->regcache
);
1232 static const struct frame_unwind spu2ppu_unwind
= {
1235 spu2ppu_prev_register
,
1238 spu2ppu_dealloc_cache
,
1243 /* Function calling convention. */
1246 spu_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1252 spu_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
1253 struct value
**args
, int nargs
, struct type
*value_type
,
1254 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
1255 struct regcache
*regcache
)
1257 /* Allocate space sufficient for a breakpoint, keeping the stack aligned. */
1258 sp
= (sp
- 4) & ~15;
1259 /* Store the address of that breakpoint */
1261 /* The call starts at the callee's entry point. */
1268 spu_scalar_value_p (struct type
*type
)
1270 switch (TYPE_CODE (type
))
1273 case TYPE_CODE_ENUM
:
1274 case TYPE_CODE_RANGE
:
1275 case TYPE_CODE_CHAR
:
1276 case TYPE_CODE_BOOL
:
1279 return TYPE_LENGTH (type
) <= 16;
1287 spu_value_to_regcache (struct regcache
*regcache
, int regnum
,
1288 struct type
*type
, const gdb_byte
*in
)
1290 int len
= TYPE_LENGTH (type
);
1292 if (spu_scalar_value_p (type
))
1294 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1295 regcache_cooked_write_part (regcache
, regnum
, preferred_slot
, len
, in
);
1301 regcache_cooked_write (regcache
, regnum
++, in
);
1307 regcache_cooked_write_part (regcache
, regnum
, 0, len
, in
);
1312 spu_regcache_to_value (struct regcache
*regcache
, int regnum
,
1313 struct type
*type
, gdb_byte
*out
)
1315 int len
= TYPE_LENGTH (type
);
1317 if (spu_scalar_value_p (type
))
1319 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1320 regcache_cooked_read_part (regcache
, regnum
, preferred_slot
, len
, out
);
1326 regcache_cooked_read (regcache
, regnum
++, out
);
1332 regcache_cooked_read_part (regcache
, regnum
, 0, len
, out
);
1337 spu_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1338 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1339 int nargs
, struct value
**args
, CORE_ADDR sp
,
1340 int struct_return
, CORE_ADDR struct_addr
)
1342 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1345 int regnum
= SPU_ARG1_REGNUM
;
1349 /* Set the return address. */
1350 memset (buf
, 0, sizeof buf
);
1351 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (bp_addr
));
1352 regcache_cooked_write (regcache
, SPU_LR_REGNUM
, buf
);
1354 /* If STRUCT_RETURN is true, then the struct return address (in
1355 STRUCT_ADDR) will consume the first argument-passing register.
1356 Both adjust the register count and store that value. */
1359 memset (buf
, 0, sizeof buf
);
1360 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (struct_addr
));
1361 regcache_cooked_write (regcache
, regnum
++, buf
);
1364 /* Fill in argument registers. */
1365 for (i
= 0; i
< nargs
; i
++)
1367 struct value
*arg
= args
[i
];
1368 struct type
*type
= check_typedef (value_type (arg
));
1369 const gdb_byte
*contents
= value_contents (arg
);
1370 int len
= TYPE_LENGTH (type
);
1371 int n_regs
= align_up (len
, 16) / 16;
1373 /* If the argument doesn't wholly fit into registers, it and
1374 all subsequent arguments go to the stack. */
1375 if (regnum
+ n_regs
- 1 > SPU_ARGN_REGNUM
)
1381 spu_value_to_regcache (regcache
, regnum
, type
, contents
);
1385 /* Overflow arguments go to the stack. */
1386 if (stack_arg
!= -1)
1390 /* Allocate all required stack size. */
1391 for (i
= stack_arg
; i
< nargs
; i
++)
1393 struct type
*type
= check_typedef (value_type (args
[i
]));
1394 sp
-= align_up (TYPE_LENGTH (type
), 16);
1397 /* Fill in stack arguments. */
1399 for (i
= stack_arg
; i
< nargs
; i
++)
1401 struct value
*arg
= args
[i
];
1402 struct type
*type
= check_typedef (value_type (arg
));
1403 int len
= TYPE_LENGTH (type
);
1406 if (spu_scalar_value_p (type
))
1407 preferred_slot
= len
< 4 ? 4 - len
: 0;
1411 target_write_memory (ap
+ preferred_slot
, value_contents (arg
), len
);
1412 ap
+= align_up (TYPE_LENGTH (type
), 16);
1416 /* Allocate stack frame header. */
1419 /* Store stack back chain. */
1420 regcache_cooked_read (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1421 target_write_memory (sp
, buf
, 16);
1423 /* Finally, update all slots of the SP register. */
1424 sp_delta
= sp
- extract_unsigned_integer (buf
, 4, byte_order
);
1425 for (i
= 0; i
< 4; i
++)
1427 CORE_ADDR sp_slot
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
1428 store_unsigned_integer (buf
+ 4*i
, 4, byte_order
, sp_slot
+ sp_delta
);
1430 regcache_cooked_write (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1435 static struct frame_id
1436 spu_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1438 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1439 CORE_ADDR pc
= get_frame_register_unsigned (this_frame
, SPU_PC_REGNUM
);
1440 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1441 return frame_id_build (SPUADDR (tdep
->id
, sp
), SPUADDR (tdep
->id
, pc
& -4));
1444 /* Function return value access. */
1446 static enum return_value_convention
1447 spu_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
1448 struct type
*type
, struct regcache
*regcache
,
1449 gdb_byte
*out
, const gdb_byte
*in
)
1451 enum return_value_convention rvc
;
1453 if (TYPE_LENGTH (type
) <= (SPU_ARGN_REGNUM
- SPU_ARG1_REGNUM
+ 1) * 16)
1454 rvc
= RETURN_VALUE_REGISTER_CONVENTION
;
1456 rvc
= RETURN_VALUE_STRUCT_CONVENTION
;
1462 case RETURN_VALUE_REGISTER_CONVENTION
:
1463 spu_value_to_regcache (regcache
, SPU_ARG1_REGNUM
, type
, in
);
1466 case RETURN_VALUE_STRUCT_CONVENTION
:
1467 error ("Cannot set function return value.");
1475 case RETURN_VALUE_REGISTER_CONVENTION
:
1476 spu_regcache_to_value (regcache
, SPU_ARG1_REGNUM
, type
, out
);
1479 case RETURN_VALUE_STRUCT_CONVENTION
:
1480 error ("Function return value unknown.");
1491 static const gdb_byte
*
1492 spu_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
* pcptr
, int *lenptr
)
1494 static const gdb_byte breakpoint
[] = { 0x00, 0x00, 0x3f, 0xff };
1496 *lenptr
= sizeof breakpoint
;
1501 /* Software single-stepping support. */
1504 spu_software_single_step (struct frame_info
*frame
)
1506 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1507 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1508 CORE_ADDR pc
, next_pc
;
1513 pc
= get_frame_pc (frame
);
1515 if (target_read_memory (pc
, buf
, 4))
1517 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
1519 /* Next sequential instruction is at PC + 4, except if the current
1520 instruction is a PPE-assisted call, in which case it is at PC + 8.
1521 Wrap around LS limit to be on the safe side. */
1522 if ((insn
& 0xffffff00) == 0x00002100)
1523 next_pc
= (SPUADDR_ADDR (pc
) + 8) & (SPU_LS_SIZE
- 1);
1525 next_pc
= (SPUADDR_ADDR (pc
) + 4) & (SPU_LS_SIZE
- 1);
1527 insert_single_step_breakpoint (gdbarch
, SPUADDR (SPUADDR_SPU (pc
), next_pc
));
1529 if (is_branch (insn
, &offset
, ®
))
1531 CORE_ADDR target
= offset
;
1533 if (reg
== SPU_PC_REGNUM
)
1534 target
+= SPUADDR_ADDR (pc
);
1537 get_frame_register_bytes (frame
, reg
, 0, 4, buf
);
1538 target
+= extract_unsigned_integer (buf
, 4, byte_order
) & -4;
1541 target
= target
& (SPU_LS_SIZE
- 1);
1542 if (target
!= next_pc
)
1543 insert_single_step_breakpoint (gdbarch
,
1544 SPUADDR (SPUADDR_SPU (pc
), target
));
1551 /* Longjmp support. */
1554 spu_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
1556 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1557 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1558 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1562 /* Jump buffer is pointed to by the argument register $r3. */
1563 get_frame_register_bytes (frame
, SPU_ARG1_REGNUM
, 0, 4, buf
);
1564 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
1565 if (target_read_memory (SPUADDR (tdep
->id
, jb_addr
), buf
, 4))
1568 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
1569 *pc
= SPUADDR (tdep
->id
, *pc
);
1576 struct spu_dis_asm_data
1578 struct gdbarch
*gdbarch
;
1583 spu_dis_asm_print_address (bfd_vma addr
, struct disassemble_info
*info
)
1585 struct spu_dis_asm_data
*data
= info
->application_data
;
1586 print_address (data
->gdbarch
, SPUADDR (data
->id
, addr
), info
->stream
);
1590 gdb_print_insn_spu (bfd_vma memaddr
, struct disassemble_info
*info
)
1592 /* The opcodes disassembler does 18-bit address arithmetic. Make sure the
1593 SPU ID encoded in the high bits is added back when we call print_address. */
1594 struct disassemble_info spu_info
= *info
;
1595 struct spu_dis_asm_data data
;
1596 data
.gdbarch
= info
->application_data
;
1597 data
.id
= SPUADDR_SPU (memaddr
);
1599 spu_info
.application_data
= &data
;
1600 spu_info
.print_address_func
= spu_dis_asm_print_address
;
1601 return print_insn_spu (memaddr
, &spu_info
);
1605 /* Target overlays for the SPU overlay manager.
1607 See the documentation of simple_overlay_update for how the
1608 interface is supposed to work.
1610 Data structures used by the overlay manager:
1618 } _ovly_table[]; -- one entry per overlay section
1620 struct ovly_buf_table
1623 } _ovly_buf_table[]; -- one entry per overlay buffer
1625 _ovly_table should never change.
1627 Both tables are aligned to a 16-byte boundary, the symbols _ovly_table
1628 and _ovly_buf_table are of type STT_OBJECT and their size set to the size
1629 of the respective array. buf in _ovly_table is an index into _ovly_buf_table.
1631 mapped is an index into _ovly_table. Both the mapped and buf indices start
1632 from one to reference the first entry in their respective tables. */
1634 /* Using the per-objfile private data mechanism, we store for each
1635 objfile an array of "struct spu_overlay_table" structures, one
1636 for each obj_section of the objfile. This structure holds two
1637 fields, MAPPED_PTR and MAPPED_VAL. If MAPPED_PTR is zero, this
1638 is *not* an overlay section. If it is non-zero, it represents
1639 a target address. The overlay section is mapped iff the target
1640 integer at this location equals MAPPED_VAL. */
1642 static const struct objfile_data
*spu_overlay_data
;
1644 struct spu_overlay_table
1646 CORE_ADDR mapped_ptr
;
1647 CORE_ADDR mapped_val
;
1650 /* Retrieve the overlay table for OBJFILE. If not already cached, read
1651 the _ovly_table data structure from the target and initialize the
1652 spu_overlay_table data structure from it. */
1653 static struct spu_overlay_table
*
1654 spu_get_overlay_table (struct objfile
*objfile
)
1656 enum bfd_endian byte_order
= bfd_big_endian (objfile
->obfd
)?
1657 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1658 struct minimal_symbol
*ovly_table_msym
, *ovly_buf_table_msym
;
1659 CORE_ADDR ovly_table_base
, ovly_buf_table_base
;
1660 unsigned ovly_table_size
, ovly_buf_table_size
;
1661 struct spu_overlay_table
*tbl
;
1662 struct obj_section
*osect
;
1666 tbl
= objfile_data (objfile
, spu_overlay_data
);
1670 ovly_table_msym
= lookup_minimal_symbol ("_ovly_table", NULL
, objfile
);
1671 if (!ovly_table_msym
)
1674 ovly_buf_table_msym
= lookup_minimal_symbol ("_ovly_buf_table", NULL
, objfile
);
1675 if (!ovly_buf_table_msym
)
1678 ovly_table_base
= SYMBOL_VALUE_ADDRESS (ovly_table_msym
);
1679 ovly_table_size
= MSYMBOL_SIZE (ovly_table_msym
);
1681 ovly_buf_table_base
= SYMBOL_VALUE_ADDRESS (ovly_buf_table_msym
);
1682 ovly_buf_table_size
= MSYMBOL_SIZE (ovly_buf_table_msym
);
1684 ovly_table
= xmalloc (ovly_table_size
);
1685 read_memory (ovly_table_base
, ovly_table
, ovly_table_size
);
1687 tbl
= OBSTACK_CALLOC (&objfile
->objfile_obstack
,
1688 objfile
->sections_end
- objfile
->sections
,
1689 struct spu_overlay_table
);
1691 for (i
= 0; i
< ovly_table_size
/ 16; i
++)
1693 CORE_ADDR vma
= extract_unsigned_integer (ovly_table
+ 16*i
+ 0,
1695 CORE_ADDR size
= extract_unsigned_integer (ovly_table
+ 16*i
+ 4,
1697 CORE_ADDR pos
= extract_unsigned_integer (ovly_table
+ 16*i
+ 8,
1699 CORE_ADDR buf
= extract_unsigned_integer (ovly_table
+ 16*i
+ 12,
1702 if (buf
== 0 || (buf
- 1) * 4 >= ovly_buf_table_size
)
1705 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1706 if (vma
== bfd_section_vma (objfile
->obfd
, osect
->the_bfd_section
)
1707 && pos
== osect
->the_bfd_section
->filepos
)
1709 int ndx
= osect
- objfile
->sections
;
1710 tbl
[ndx
].mapped_ptr
= ovly_buf_table_base
+ (buf
- 1) * 4;
1711 tbl
[ndx
].mapped_val
= i
+ 1;
1717 set_objfile_data (objfile
, spu_overlay_data
, tbl
);
1721 /* Read _ovly_buf_table entry from the target to dermine whether
1722 OSECT is currently mapped, and update the mapped state. */
1724 spu_overlay_update_osect (struct obj_section
*osect
)
1726 enum bfd_endian byte_order
= bfd_big_endian (osect
->objfile
->obfd
)?
1727 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1728 struct spu_overlay_table
*ovly_table
;
1731 ovly_table
= spu_get_overlay_table (osect
->objfile
);
1735 ovly_table
+= osect
- osect
->objfile
->sections
;
1736 if (ovly_table
->mapped_ptr
== 0)
1739 id
= SPUADDR_SPU (obj_section_addr (osect
));
1740 val
= read_memory_unsigned_integer (SPUADDR (id
, ovly_table
->mapped_ptr
),
1742 osect
->ovly_mapped
= (val
== ovly_table
->mapped_val
);
1745 /* If OSECT is NULL, then update all sections' mapped state.
1746 If OSECT is non-NULL, then update only OSECT's mapped state. */
1748 spu_overlay_update (struct obj_section
*osect
)
1750 /* Just one section. */
1752 spu_overlay_update_osect (osect
);
1757 struct objfile
*objfile
;
1759 ALL_OBJSECTIONS (objfile
, osect
)
1760 if (section_is_overlay (osect
))
1761 spu_overlay_update_osect (osect
);
1765 /* Whenever a new objfile is loaded, read the target's _ovly_table.
1766 If there is one, go through all sections and make sure for non-
1767 overlay sections LMA equals VMA, while for overlay sections LMA
1768 is larger than local store size. */
1770 spu_overlay_new_objfile (struct objfile
*objfile
)
1772 struct spu_overlay_table
*ovly_table
;
1773 struct obj_section
*osect
;
1775 /* If we've already touched this file, do nothing. */
1776 if (!objfile
|| objfile_data (objfile
, spu_overlay_data
) != NULL
)
1779 /* Consider only SPU objfiles. */
1780 if (bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1783 /* Check if this objfile has overlays. */
1784 ovly_table
= spu_get_overlay_table (objfile
);
1788 /* Now go and fiddle with all the LMAs. */
1789 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1791 bfd
*obfd
= objfile
->obfd
;
1792 asection
*bsect
= osect
->the_bfd_section
;
1793 int ndx
= osect
- objfile
->sections
;
1795 if (ovly_table
[ndx
].mapped_ptr
== 0)
1796 bfd_section_lma (obfd
, bsect
) = bfd_section_vma (obfd
, bsect
);
1798 bfd_section_lma (obfd
, bsect
) = bsect
->filepos
+ SPU_LS_SIZE
;
1803 /* Insert temporary breakpoint on "main" function of newly loaded
1804 SPE context OBJFILE. */
1806 spu_catch_start (struct objfile
*objfile
)
1808 struct minimal_symbol
*minsym
;
1809 struct symtab
*symtab
;
1813 /* Do this only if requested by "set spu stop-on-load on". */
1814 if (!spu_stop_on_load_p
)
1817 /* Consider only SPU objfiles. */
1818 if (!objfile
|| bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1821 /* The main objfile is handled differently. */
1822 if (objfile
== symfile_objfile
)
1825 /* There can be multiple symbols named "main". Search for the
1826 "main" in *this* objfile. */
1827 minsym
= lookup_minimal_symbol ("main", NULL
, objfile
);
1831 /* If we have debugging information, try to use it -- this
1832 will allow us to properly skip the prologue. */
1833 pc
= SYMBOL_VALUE_ADDRESS (minsym
);
1834 symtab
= find_pc_sect_symtab (pc
, SYMBOL_OBJ_SECTION (minsym
));
1837 struct blockvector
*bv
= BLOCKVECTOR (symtab
);
1838 struct block
*block
= BLOCKVECTOR_BLOCK (bv
, GLOBAL_BLOCK
);
1840 struct symtab_and_line sal
;
1842 sym
= lookup_block_symbol (block
, "main", NULL
, VAR_DOMAIN
);
1845 fixup_symbol_section (sym
, objfile
);
1846 sal
= find_function_start_sal (sym
, 1);
1851 /* Use a numerical address for the set_breakpoint command to avoid having
1852 the breakpoint re-set incorrectly. */
1853 xsnprintf (buf
, sizeof buf
, "*%s", core_addr_to_string (pc
));
1854 set_breakpoint (get_objfile_arch (objfile
),
1855 buf
, NULL
/* condition */,
1856 0 /* hardwareflag */, 1 /* tempflag */,
1857 -1 /* thread */, 0 /* ignore_count */,
1858 0 /* pending */, 1 /* enabled */);
1862 /* Look up OBJFILE loaded into FRAME's SPU context. */
1863 static struct objfile
*
1864 spu_objfile_from_frame (struct frame_info
*frame
)
1866 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1867 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1868 struct objfile
*obj
;
1870 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
1875 if (obj
->sections
!= obj
->sections_end
1876 && SPUADDR_SPU (obj_section_addr (obj
->sections
)) == tdep
->id
)
1883 /* Flush cache for ea pointer access if available. */
1885 flush_ea_cache (void)
1887 struct minimal_symbol
*msymbol
;
1888 struct objfile
*obj
;
1890 if (!has_stack_frames ())
1893 obj
= spu_objfile_from_frame (get_current_frame ());
1897 /* Lookup inferior function __cache_flush. */
1898 msymbol
= lookup_minimal_symbol ("__cache_flush", NULL
, obj
);
1899 if (msymbol
!= NULL
)
1904 type
= objfile_type (obj
)->builtin_void
;
1905 type
= lookup_function_type (type
);
1906 type
= lookup_pointer_type (type
);
1907 addr
= SYMBOL_VALUE_ADDRESS (msymbol
);
1909 call_function_by_hand (value_from_pointer (type
, addr
), 0, NULL
);
1913 /* This handler is called when the inferior has stopped. If it is stopped in
1914 SPU architecture then flush the ea cache if used. */
1916 spu_attach_normal_stop (struct bpstats
*bs
, int print_frame
)
1918 if (!spu_auto_flush_cache_p
)
1921 /* Temporarily reset spu_auto_flush_cache_p to avoid recursively
1922 re-entering this function when __cache_flush stops. */
1923 spu_auto_flush_cache_p
= 0;
1925 spu_auto_flush_cache_p
= 1;
1929 /* "info spu" commands. */
1932 info_spu_event_command (char *args
, int from_tty
)
1934 struct frame_info
*frame
= get_selected_frame (NULL
);
1935 ULONGEST event_status
= 0;
1936 ULONGEST event_mask
= 0;
1937 struct cleanup
*chain
;
1943 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
1944 error (_("\"info spu\" is only supported on the SPU architecture."));
1946 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
1948 xsnprintf (annex
, sizeof annex
, "%d/event_status", id
);
1949 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1950 buf
, 0, (sizeof (buf
) - 1));
1952 error (_("Could not read event_status."));
1954 event_status
= strtoulst (buf
, NULL
, 16);
1956 xsnprintf (annex
, sizeof annex
, "%d/event_mask", id
);
1957 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1958 buf
, 0, (sizeof (buf
) - 1));
1960 error (_("Could not read event_mask."));
1962 event_mask
= strtoulst (buf
, NULL
, 16);
1964 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoEvent");
1966 if (ui_out_is_mi_like_p (uiout
))
1968 ui_out_field_fmt (uiout
, "event_status",
1969 "0x%s", phex_nz (event_status
, 4));
1970 ui_out_field_fmt (uiout
, "event_mask",
1971 "0x%s", phex_nz (event_mask
, 4));
1975 printf_filtered (_("Event Status 0x%s\n"), phex (event_status
, 4));
1976 printf_filtered (_("Event Mask 0x%s\n"), phex (event_mask
, 4));
1979 do_cleanups (chain
);
1983 info_spu_signal_command (char *args
, int from_tty
)
1985 struct frame_info
*frame
= get_selected_frame (NULL
);
1986 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1987 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1988 ULONGEST signal1
= 0;
1989 ULONGEST signal1_type
= 0;
1990 int signal1_pending
= 0;
1991 ULONGEST signal2
= 0;
1992 ULONGEST signal2_type
= 0;
1993 int signal2_pending
= 0;
1994 struct cleanup
*chain
;
2000 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2001 error (_("\"info spu\" is only supported on the SPU architecture."));
2003 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2005 xsnprintf (annex
, sizeof annex
, "%d/signal1", id
);
2006 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2008 error (_("Could not read signal1."));
2011 signal1
= extract_unsigned_integer (buf
, 4, byte_order
);
2012 signal1_pending
= 1;
2015 xsnprintf (annex
, sizeof annex
, "%d/signal1_type", id
);
2016 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2017 buf
, 0, (sizeof (buf
) - 1));
2019 error (_("Could not read signal1_type."));
2021 signal1_type
= strtoulst (buf
, NULL
, 16);
2023 xsnprintf (annex
, sizeof annex
, "%d/signal2", id
);
2024 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2026 error (_("Could not read signal2."));
2029 signal2
= extract_unsigned_integer (buf
, 4, byte_order
);
2030 signal2_pending
= 1;
2033 xsnprintf (annex
, sizeof annex
, "%d/signal2_type", id
);
2034 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2035 buf
, 0, (sizeof (buf
) - 1));
2037 error (_("Could not read signal2_type."));
2039 signal2_type
= strtoulst (buf
, NULL
, 16);
2041 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoSignal");
2043 if (ui_out_is_mi_like_p (uiout
))
2045 ui_out_field_int (uiout
, "signal1_pending", signal1_pending
);
2046 ui_out_field_fmt (uiout
, "signal1", "0x%s", phex_nz (signal1
, 4));
2047 ui_out_field_int (uiout
, "signal1_type", signal1_type
);
2048 ui_out_field_int (uiout
, "signal2_pending", signal2_pending
);
2049 ui_out_field_fmt (uiout
, "signal2", "0x%s", phex_nz (signal2
, 4));
2050 ui_out_field_int (uiout
, "signal2_type", signal2_type
);
2054 if (signal1_pending
)
2055 printf_filtered (_("Signal 1 control word 0x%s "), phex (signal1
, 4));
2057 printf_filtered (_("Signal 1 not pending "));
2060 printf_filtered (_("(Type Or)\n"));
2062 printf_filtered (_("(Type Overwrite)\n"));
2064 if (signal2_pending
)
2065 printf_filtered (_("Signal 2 control word 0x%s "), phex (signal2
, 4));
2067 printf_filtered (_("Signal 2 not pending "));
2070 printf_filtered (_("(Type Or)\n"));
2072 printf_filtered (_("(Type Overwrite)\n"));
2075 do_cleanups (chain
);
2079 info_spu_mailbox_list (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
,
2080 const char *field
, const char *msg
)
2082 struct cleanup
*chain
;
2088 chain
= make_cleanup_ui_out_table_begin_end (uiout
, 1, nr
, "mbox");
2090 ui_out_table_header (uiout
, 32, ui_left
, field
, msg
);
2091 ui_out_table_body (uiout
);
2093 for (i
= 0; i
< nr
; i
++)
2095 struct cleanup
*val_chain
;
2097 val_chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "mbox");
2098 val
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
2099 ui_out_field_fmt (uiout
, field
, "0x%s", phex (val
, 4));
2100 do_cleanups (val_chain
);
2102 if (!ui_out_is_mi_like_p (uiout
))
2103 printf_filtered ("\n");
2106 do_cleanups (chain
);
2110 info_spu_mailbox_command (char *args
, int from_tty
)
2112 struct frame_info
*frame
= get_selected_frame (NULL
);
2113 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2114 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2115 struct cleanup
*chain
;
2121 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2122 error (_("\"info spu\" is only supported on the SPU architecture."));
2124 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2126 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoMailbox");
2128 xsnprintf (annex
, sizeof annex
, "%d/mbox_info", id
);
2129 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2130 buf
, 0, sizeof buf
);
2132 error (_("Could not read mbox_info."));
2134 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2135 "mbox", "SPU Outbound Mailbox");
2137 xsnprintf (annex
, sizeof annex
, "%d/ibox_info", id
);
2138 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2139 buf
, 0, sizeof buf
);
2141 error (_("Could not read ibox_info."));
2143 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2144 "ibox", "SPU Outbound Interrupt Mailbox");
2146 xsnprintf (annex
, sizeof annex
, "%d/wbox_info", id
);
2147 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2148 buf
, 0, sizeof buf
);
2150 error (_("Could not read wbox_info."));
2152 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2153 "wbox", "SPU Inbound Mailbox");
2155 do_cleanups (chain
);
2159 spu_mfc_get_bitfield (ULONGEST word
, int first
, int last
)
2161 ULONGEST mask
= ~(~(ULONGEST
)0 << (last
- first
+ 1));
2162 return (word
>> (63 - last
)) & mask
;
2166 info_spu_dma_cmdlist (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
)
2168 static char *spu_mfc_opcode
[256] =
2170 /* 00 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2171 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2172 /* 10 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2173 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2174 /* 20 */ "put", "putb", "putf", NULL
, "putl", "putlb", "putlf", NULL
,
2175 "puts", "putbs", "putfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2176 /* 30 */ "putr", "putrb", "putrf", NULL
, "putrl", "putrlb", "putrlf", NULL
,
2177 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2178 /* 40 */ "get", "getb", "getf", NULL
, "getl", "getlb", "getlf", NULL
,
2179 "gets", "getbs", "getfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2180 /* 50 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2181 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2182 /* 60 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2183 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2184 /* 70 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2185 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2186 /* 80 */ "sdcrt", "sdcrtst", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2187 NULL
, "sdcrz", NULL
, NULL
, NULL
, "sdcrst", NULL
, "sdcrf",
2188 /* 90 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2189 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2190 /* a0 */ "sndsig", "sndsigb", "sndsigf", NULL
, NULL
, NULL
, NULL
, NULL
,
2191 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2192 /* b0 */ "putlluc", NULL
, NULL
, NULL
, "putllc", NULL
, NULL
, NULL
,
2193 "putqlluc", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2194 /* c0 */ "barrier", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2195 "mfceieio", NULL
, NULL
, NULL
, "mfcsync", NULL
, NULL
, NULL
,
2196 /* d0 */ "getllar", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2197 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2198 /* e0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2199 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2200 /* f0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2201 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2204 int *seq
= alloca (nr
* sizeof (int));
2206 struct cleanup
*chain
;
2210 /* Determine sequence in which to display (valid) entries. */
2211 for (i
= 0; i
< nr
; i
++)
2213 /* Search for the first valid entry all of whose
2214 dependencies are met. */
2215 for (j
= 0; j
< nr
; j
++)
2217 ULONGEST mfc_cq_dw3
;
2218 ULONGEST dependencies
;
2220 if (done
& (1 << (nr
- 1 - j
)))
2224 = extract_unsigned_integer (buf
+ 32*j
+ 24,8, byte_order
);
2225 if (!spu_mfc_get_bitfield (mfc_cq_dw3
, 16, 16))
2228 dependencies
= spu_mfc_get_bitfield (mfc_cq_dw3
, 0, nr
- 1);
2229 if ((dependencies
& done
) != dependencies
)
2233 done
|= 1 << (nr
- 1 - j
);
2244 chain
= make_cleanup_ui_out_table_begin_end (uiout
, 10, nr
, "dma_cmd");
2246 ui_out_table_header (uiout
, 7, ui_left
, "opcode", "Opcode");
2247 ui_out_table_header (uiout
, 3, ui_left
, "tag", "Tag");
2248 ui_out_table_header (uiout
, 3, ui_left
, "tid", "TId");
2249 ui_out_table_header (uiout
, 3, ui_left
, "rid", "RId");
2250 ui_out_table_header (uiout
, 18, ui_left
, "ea", "EA");
2251 ui_out_table_header (uiout
, 7, ui_left
, "lsa", "LSA");
2252 ui_out_table_header (uiout
, 7, ui_left
, "size", "Size");
2253 ui_out_table_header (uiout
, 7, ui_left
, "lstaddr", "LstAddr");
2254 ui_out_table_header (uiout
, 7, ui_left
, "lstsize", "LstSize");
2255 ui_out_table_header (uiout
, 1, ui_left
, "error_p", "E");
2257 ui_out_table_body (uiout
);
2259 for (i
= 0; i
< nr
; i
++)
2261 struct cleanup
*cmd_chain
;
2262 ULONGEST mfc_cq_dw0
;
2263 ULONGEST mfc_cq_dw1
;
2264 ULONGEST mfc_cq_dw2
;
2265 int mfc_cmd_opcode
, mfc_cmd_tag
, rclass_id
, tclass_id
;
2266 int lsa
, size
, list_lsa
, list_size
, mfc_lsa
, mfc_size
;
2268 int list_valid_p
, noop_valid_p
, qw_valid_p
, ea_valid_p
, cmd_error_p
;
2270 /* Decode contents of MFC Command Queue Context Save/Restore Registers.
2271 See "Cell Broadband Engine Registers V1.3", section 3.3.2.1. */
2274 = extract_unsigned_integer (buf
+ 32*seq
[i
], 8, byte_order
);
2276 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 8, 8, byte_order
);
2278 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 16, 8, byte_order
);
2280 list_lsa
= spu_mfc_get_bitfield (mfc_cq_dw0
, 0, 14);
2281 list_size
= spu_mfc_get_bitfield (mfc_cq_dw0
, 15, 26);
2282 mfc_cmd_opcode
= spu_mfc_get_bitfield (mfc_cq_dw0
, 27, 34);
2283 mfc_cmd_tag
= spu_mfc_get_bitfield (mfc_cq_dw0
, 35, 39);
2284 list_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw0
, 40, 40);
2285 rclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 41, 43);
2286 tclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 44, 46);
2288 mfc_ea
= spu_mfc_get_bitfield (mfc_cq_dw1
, 0, 51) << 12
2289 | spu_mfc_get_bitfield (mfc_cq_dw2
, 25, 36);
2291 mfc_lsa
= spu_mfc_get_bitfield (mfc_cq_dw2
, 0, 13);
2292 mfc_size
= spu_mfc_get_bitfield (mfc_cq_dw2
, 14, 24);
2293 noop_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 37, 37);
2294 qw_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 38, 38);
2295 ea_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 39, 39);
2296 cmd_error_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 40, 40);
2298 cmd_chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "cmd");
2300 if (spu_mfc_opcode
[mfc_cmd_opcode
])
2301 ui_out_field_string (uiout
, "opcode", spu_mfc_opcode
[mfc_cmd_opcode
]);
2303 ui_out_field_int (uiout
, "opcode", mfc_cmd_opcode
);
2305 ui_out_field_int (uiout
, "tag", mfc_cmd_tag
);
2306 ui_out_field_int (uiout
, "tid", tclass_id
);
2307 ui_out_field_int (uiout
, "rid", rclass_id
);
2310 ui_out_field_fmt (uiout
, "ea", "0x%s", phex (mfc_ea
, 8));
2312 ui_out_field_skip (uiout
, "ea");
2314 ui_out_field_fmt (uiout
, "lsa", "0x%05x", mfc_lsa
<< 4);
2316 ui_out_field_fmt (uiout
, "size", "0x%05x", mfc_size
<< 4);
2318 ui_out_field_fmt (uiout
, "size", "0x%05x", mfc_size
);
2322 ui_out_field_fmt (uiout
, "lstaddr", "0x%05x", list_lsa
<< 3);
2323 ui_out_field_fmt (uiout
, "lstsize", "0x%05x", list_size
<< 3);
2327 ui_out_field_skip (uiout
, "lstaddr");
2328 ui_out_field_skip (uiout
, "lstsize");
2332 ui_out_field_string (uiout
, "error_p", "*");
2334 ui_out_field_skip (uiout
, "error_p");
2336 do_cleanups (cmd_chain
);
2338 if (!ui_out_is_mi_like_p (uiout
))
2339 printf_filtered ("\n");
2342 do_cleanups (chain
);
2346 info_spu_dma_command (char *args
, int from_tty
)
2348 struct frame_info
*frame
= get_selected_frame (NULL
);
2349 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2350 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2351 ULONGEST dma_info_type
;
2352 ULONGEST dma_info_mask
;
2353 ULONGEST dma_info_status
;
2354 ULONGEST dma_info_stall_and_notify
;
2355 ULONGEST dma_info_atomic_command_status
;
2356 struct cleanup
*chain
;
2362 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
2363 error (_("\"info spu\" is only supported on the SPU architecture."));
2365 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2367 xsnprintf (annex
, sizeof annex
, "%d/dma_info", id
);
2368 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2369 buf
, 0, 40 + 16 * 32);
2371 error (_("Could not read dma_info."));
2374 = extract_unsigned_integer (buf
, 8, byte_order
);
2376 = extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2378 = extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2379 dma_info_stall_and_notify
2380 = extract_unsigned_integer (buf
+ 24, 8, byte_order
);
2381 dma_info_atomic_command_status
2382 = extract_unsigned_integer (buf
+ 32, 8, byte_order
);
2384 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoDMA");
2386 if (ui_out_is_mi_like_p (uiout
))
2388 ui_out_field_fmt (uiout
, "dma_info_type", "0x%s",
2389 phex_nz (dma_info_type
, 4));
2390 ui_out_field_fmt (uiout
, "dma_info_mask", "0x%s",
2391 phex_nz (dma_info_mask
, 4));
2392 ui_out_field_fmt (uiout
, "dma_info_status", "0x%s",
2393 phex_nz (dma_info_status
, 4));
2394 ui_out_field_fmt (uiout
, "dma_info_stall_and_notify", "0x%s",
2395 phex_nz (dma_info_stall_and_notify
, 4));
2396 ui_out_field_fmt (uiout
, "dma_info_atomic_command_status", "0x%s",
2397 phex_nz (dma_info_atomic_command_status
, 4));
2401 const char *query_msg
= _("no query pending");
2403 if (dma_info_type
& 4)
2404 switch (dma_info_type
& 3)
2406 case 1: query_msg
= _("'any' query pending"); break;
2407 case 2: query_msg
= _("'all' query pending"); break;
2408 default: query_msg
= _("undefined query type"); break;
2411 printf_filtered (_("Tag-Group Status 0x%s\n"),
2412 phex (dma_info_status
, 4));
2413 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2414 phex (dma_info_mask
, 4), query_msg
);
2415 printf_filtered (_("Stall-and-Notify 0x%s\n"),
2416 phex (dma_info_stall_and_notify
, 4));
2417 printf_filtered (_("Atomic Cmd Status 0x%s\n"),
2418 phex (dma_info_atomic_command_status
, 4));
2419 printf_filtered ("\n");
2422 info_spu_dma_cmdlist (buf
+ 40, 16, byte_order
);
2423 do_cleanups (chain
);
2427 info_spu_proxydma_command (char *args
, int from_tty
)
2429 struct frame_info
*frame
= get_selected_frame (NULL
);
2430 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2431 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2432 ULONGEST dma_info_type
;
2433 ULONGEST dma_info_mask
;
2434 ULONGEST dma_info_status
;
2435 struct cleanup
*chain
;
2441 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2442 error (_("\"info spu\" is only supported on the SPU architecture."));
2444 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2446 xsnprintf (annex
, sizeof annex
, "%d/proxydma_info", id
);
2447 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2448 buf
, 0, 24 + 8 * 32);
2450 error (_("Could not read proxydma_info."));
2452 dma_info_type
= extract_unsigned_integer (buf
, 8, byte_order
);
2453 dma_info_mask
= extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2454 dma_info_status
= extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2456 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoProxyDMA");
2458 if (ui_out_is_mi_like_p (uiout
))
2460 ui_out_field_fmt (uiout
, "proxydma_info_type", "0x%s",
2461 phex_nz (dma_info_type
, 4));
2462 ui_out_field_fmt (uiout
, "proxydma_info_mask", "0x%s",
2463 phex_nz (dma_info_mask
, 4));
2464 ui_out_field_fmt (uiout
, "proxydma_info_status", "0x%s",
2465 phex_nz (dma_info_status
, 4));
2469 const char *query_msg
;
2471 switch (dma_info_type
& 3)
2473 case 0: query_msg
= _("no query pending"); break;
2474 case 1: query_msg
= _("'any' query pending"); break;
2475 case 2: query_msg
= _("'all' query pending"); break;
2476 default: query_msg
= _("undefined query type"); break;
2479 printf_filtered (_("Tag-Group Status 0x%s\n"),
2480 phex (dma_info_status
, 4));
2481 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2482 phex (dma_info_mask
, 4), query_msg
);
2483 printf_filtered ("\n");
2486 info_spu_dma_cmdlist (buf
+ 24, 8, byte_order
);
2487 do_cleanups (chain
);
2491 info_spu_command (char *args
, int from_tty
)
2493 printf_unfiltered (_("\"info spu\" must be followed by the name of an SPU facility.\n"));
2494 help_list (infospucmdlist
, "info spu ", -1, gdb_stdout
);
2498 /* Root of all "set spu "/"show spu " commands. */
2501 show_spu_command (char *args
, int from_tty
)
2503 help_list (showspucmdlist
, "show spu ", all_commands
, gdb_stdout
);
2507 set_spu_command (char *args
, int from_tty
)
2509 help_list (setspucmdlist
, "set spu ", all_commands
, gdb_stdout
);
2513 show_spu_stop_on_load (struct ui_file
*file
, int from_tty
,
2514 struct cmd_list_element
*c
, const char *value
)
2516 fprintf_filtered (file
, _("Stopping for new SPE threads is %s.\n"),
2521 show_spu_auto_flush_cache (struct ui_file
*file
, int from_tty
,
2522 struct cmd_list_element
*c
, const char *value
)
2524 fprintf_filtered (file
, _("Automatic software-cache flush is %s.\n"),
2529 /* Set up gdbarch struct. */
2531 static struct gdbarch
*
2532 spu_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2534 struct gdbarch
*gdbarch
;
2535 struct gdbarch_tdep
*tdep
;
2538 /* Which spufs ID was requested as address space? */
2540 id
= *(int *)info
.tdep_info
;
2541 /* For objfile architectures of SPU solibs, decode the ID from the name.
2542 This assumes the filename convention employed by solib-spu.c. */
2545 char *name
= strrchr (info
.abfd
->filename
, '@');
2547 sscanf (name
, "@0x%*x <%d>", &id
);
2550 /* Find a candidate among extant architectures. */
2551 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2553 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2555 tdep
= gdbarch_tdep (arches
->gdbarch
);
2556 if (tdep
&& tdep
->id
== id
)
2557 return arches
->gdbarch
;
2560 /* None found, so create a new architecture. */
2561 tdep
= XCALLOC (1, struct gdbarch_tdep
);
2563 gdbarch
= gdbarch_alloc (&info
, tdep
);
2566 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_spu
);
2569 set_gdbarch_num_regs (gdbarch
, SPU_NUM_REGS
);
2570 set_gdbarch_num_pseudo_regs (gdbarch
, SPU_NUM_PSEUDO_REGS
);
2571 set_gdbarch_sp_regnum (gdbarch
, SPU_SP_REGNUM
);
2572 set_gdbarch_pc_regnum (gdbarch
, SPU_PC_REGNUM
);
2573 set_gdbarch_read_pc (gdbarch
, spu_read_pc
);
2574 set_gdbarch_write_pc (gdbarch
, spu_write_pc
);
2575 set_gdbarch_register_name (gdbarch
, spu_register_name
);
2576 set_gdbarch_register_type (gdbarch
, spu_register_type
);
2577 set_gdbarch_pseudo_register_read (gdbarch
, spu_pseudo_register_read
);
2578 set_gdbarch_pseudo_register_write (gdbarch
, spu_pseudo_register_write
);
2579 set_gdbarch_value_from_register (gdbarch
, spu_value_from_register
);
2580 set_gdbarch_register_reggroup_p (gdbarch
, spu_register_reggroup_p
);
2583 set_gdbarch_char_signed (gdbarch
, 0);
2584 set_gdbarch_ptr_bit (gdbarch
, 32);
2585 set_gdbarch_addr_bit (gdbarch
, 32);
2586 set_gdbarch_short_bit (gdbarch
, 16);
2587 set_gdbarch_int_bit (gdbarch
, 32);
2588 set_gdbarch_long_bit (gdbarch
, 32);
2589 set_gdbarch_long_long_bit (gdbarch
, 64);
2590 set_gdbarch_float_bit (gdbarch
, 32);
2591 set_gdbarch_double_bit (gdbarch
, 64);
2592 set_gdbarch_long_double_bit (gdbarch
, 64);
2593 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
2594 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
2595 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
2597 /* Address handling. */
2598 set_gdbarch_address_to_pointer (gdbarch
, spu_address_to_pointer
);
2599 set_gdbarch_pointer_to_address (gdbarch
, spu_pointer_to_address
);
2600 set_gdbarch_integer_to_address (gdbarch
, spu_integer_to_address
);
2601 set_gdbarch_address_class_type_flags (gdbarch
, spu_address_class_type_flags
);
2602 set_gdbarch_address_class_type_flags_to_name
2603 (gdbarch
, spu_address_class_type_flags_to_name
);
2604 set_gdbarch_address_class_name_to_type_flags
2605 (gdbarch
, spu_address_class_name_to_type_flags
);
2608 /* Inferior function calls. */
2609 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
2610 set_gdbarch_frame_align (gdbarch
, spu_frame_align
);
2611 set_gdbarch_frame_red_zone_size (gdbarch
, 2000);
2612 set_gdbarch_push_dummy_code (gdbarch
, spu_push_dummy_code
);
2613 set_gdbarch_push_dummy_call (gdbarch
, spu_push_dummy_call
);
2614 set_gdbarch_dummy_id (gdbarch
, spu_dummy_id
);
2615 set_gdbarch_return_value (gdbarch
, spu_return_value
);
2617 /* Frame handling. */
2618 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2619 frame_unwind_append_unwinder (gdbarch
, &spu_frame_unwind
);
2620 frame_base_set_default (gdbarch
, &spu_frame_base
);
2621 set_gdbarch_unwind_pc (gdbarch
, spu_unwind_pc
);
2622 set_gdbarch_unwind_sp (gdbarch
, spu_unwind_sp
);
2623 set_gdbarch_virtual_frame_pointer (gdbarch
, spu_virtual_frame_pointer
);
2624 set_gdbarch_frame_args_skip (gdbarch
, 0);
2625 set_gdbarch_skip_prologue (gdbarch
, spu_skip_prologue
);
2626 set_gdbarch_in_function_epilogue_p (gdbarch
, spu_in_function_epilogue_p
);
2628 /* Cell/B.E. cross-architecture unwinder support. */
2629 frame_unwind_prepend_unwinder (gdbarch
, &spu2ppu_unwind
);
2632 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
2633 set_gdbarch_breakpoint_from_pc (gdbarch
, spu_breakpoint_from_pc
);
2634 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
2635 set_gdbarch_software_single_step (gdbarch
, spu_software_single_step
);
2636 set_gdbarch_get_longjmp_target (gdbarch
, spu_get_longjmp_target
);
2639 set_gdbarch_overlay_update (gdbarch
, spu_overlay_update
);
2644 /* Provide a prototype to silence -Wmissing-prototypes. */
2645 extern initialize_file_ftype _initialize_spu_tdep
;
2648 _initialize_spu_tdep (void)
2650 register_gdbarch_init (bfd_arch_spu
, spu_gdbarch_init
);
2652 /* Add ourselves to objfile event chain. */
2653 observer_attach_new_objfile (spu_overlay_new_objfile
);
2654 spu_overlay_data
= register_objfile_data ();
2656 /* Install spu stop-on-load handler. */
2657 observer_attach_new_objfile (spu_catch_start
);
2659 /* Add ourselves to normal_stop event chain. */
2660 observer_attach_normal_stop (spu_attach_normal_stop
);
2662 /* Add root prefix command for all "set spu"/"show spu" commands. */
2663 add_prefix_cmd ("spu", no_class
, set_spu_command
,
2664 _("Various SPU specific commands."),
2665 &setspucmdlist
, "set spu ", 0, &setlist
);
2666 add_prefix_cmd ("spu", no_class
, show_spu_command
,
2667 _("Various SPU specific commands."),
2668 &showspucmdlist
, "show spu ", 0, &showlist
);
2670 /* Toggle whether or not to add a temporary breakpoint at the "main"
2671 function of new SPE contexts. */
2672 add_setshow_boolean_cmd ("stop-on-load", class_support
,
2673 &spu_stop_on_load_p
, _("\
2674 Set whether to stop for new SPE threads."),
2676 Show whether to stop for new SPE threads."),
2678 Use \"on\" to give control to the user when a new SPE thread\n\
2679 enters its \"main\" function.\n\
2680 Use \"off\" to disable stopping for new SPE threads."),
2682 show_spu_stop_on_load
,
2683 &setspucmdlist
, &showspucmdlist
);
2685 /* Toggle whether or not to automatically flush the software-managed
2686 cache whenever SPE execution stops. */
2687 add_setshow_boolean_cmd ("auto-flush-cache", class_support
,
2688 &spu_auto_flush_cache_p
, _("\
2689 Set whether to automatically flush the software-managed cache."),
2691 Show whether to automatically flush the software-managed cache."),
2693 Use \"on\" to automatically flush the software-managed cache\n\
2694 whenever SPE execution stops.\n\
2695 Use \"off\" to never automatically flush the software-managed cache."),
2697 show_spu_auto_flush_cache
,
2698 &setspucmdlist
, &showspucmdlist
);
2700 /* Add root prefix command for all "info spu" commands. */
2701 add_prefix_cmd ("spu", class_info
, info_spu_command
,
2702 _("Various SPU specific commands."),
2703 &infospucmdlist
, "info spu ", 0, &infolist
);
2705 /* Add various "info spu" commands. */
2706 add_cmd ("event", class_info
, info_spu_event_command
,
2707 _("Display SPU event facility status.\n"),
2709 add_cmd ("signal", class_info
, info_spu_signal_command
,
2710 _("Display SPU signal notification facility status.\n"),
2712 add_cmd ("mailbox", class_info
, info_spu_mailbox_command
,
2713 _("Display SPU mailbox facility status.\n"),
2715 add_cmd ("dma", class_info
, info_spu_dma_command
,
2716 _("Display MFC DMA status.\n"),
2718 add_cmd ("proxydma", class_info
, info_spu_proxydma_command
,
2719 _("Display MFC Proxy-DMA status.\n"),