1 /* SPU target-dependent code for GDB, the GNU debugger.
2 Copyright (C) 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
4 Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
5 Based on a port by Sid Manning <sid@us.ibm.com>.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
30 #include "frame-unwind.h"
31 #include "frame-base.h"
32 #include "trad-frame.h"
41 #include "reggroups.h"
42 #include "floatformat.h"
50 /* The list of available "set spu " and "show spu " commands. */
51 static struct cmd_list_element
*setspucmdlist
= NULL
;
52 static struct cmd_list_element
*showspucmdlist
= NULL
;
54 /* Whether to stop for new SPE contexts. */
55 static int spu_stop_on_load_p
= 0;
56 /* Whether to automatically flush the SW-managed cache. */
57 static int spu_auto_flush_cache_p
= 1;
60 /* The tdep structure. */
63 /* The spufs ID identifying our address space. */
66 /* SPU-specific vector type. */
67 struct type
*spu_builtin_type_vec128
;
71 /* SPU-specific vector type. */
73 spu_builtin_type_vec128 (struct gdbarch
*gdbarch
)
75 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
77 if (!tdep
->spu_builtin_type_vec128
)
79 const struct builtin_type
*bt
= builtin_type (gdbarch
);
82 t
= arch_composite_type (gdbarch
,
83 "__spu_builtin_type_vec128", TYPE_CODE_UNION
);
84 append_composite_type_field (t
, "uint128", bt
->builtin_int128
);
85 append_composite_type_field (t
, "v2_int64",
86 init_vector_type (bt
->builtin_int64
, 2));
87 append_composite_type_field (t
, "v4_int32",
88 init_vector_type (bt
->builtin_int32
, 4));
89 append_composite_type_field (t
, "v8_int16",
90 init_vector_type (bt
->builtin_int16
, 8));
91 append_composite_type_field (t
, "v16_int8",
92 init_vector_type (bt
->builtin_int8
, 16));
93 append_composite_type_field (t
, "v2_double",
94 init_vector_type (bt
->builtin_double
, 2));
95 append_composite_type_field (t
, "v4_float",
96 init_vector_type (bt
->builtin_float
, 4));
99 TYPE_NAME (t
) = "spu_builtin_type_vec128";
101 tdep
->spu_builtin_type_vec128
= t
;
104 return tdep
->spu_builtin_type_vec128
;
108 /* The list of available "info spu " commands. */
109 static struct cmd_list_element
*infospucmdlist
= NULL
;
114 spu_register_name (struct gdbarch
*gdbarch
, int reg_nr
)
116 static char *register_names
[] =
118 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
119 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
120 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
121 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
122 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
123 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
124 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
125 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
126 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
127 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
128 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
129 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
130 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
131 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
132 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
133 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
134 "id", "pc", "sp", "fpscr", "srr0", "lslr", "decr", "decr_status"
139 if (reg_nr
>= sizeof register_names
/ sizeof *register_names
)
142 return register_names
[reg_nr
];
146 spu_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
148 if (reg_nr
< SPU_NUM_GPRS
)
149 return spu_builtin_type_vec128 (gdbarch
);
154 return builtin_type (gdbarch
)->builtin_uint32
;
157 return builtin_type (gdbarch
)->builtin_func_ptr
;
160 return builtin_type (gdbarch
)->builtin_data_ptr
;
162 case SPU_FPSCR_REGNUM
:
163 return builtin_type (gdbarch
)->builtin_uint128
;
165 case SPU_SRR0_REGNUM
:
166 return builtin_type (gdbarch
)->builtin_uint32
;
168 case SPU_LSLR_REGNUM
:
169 return builtin_type (gdbarch
)->builtin_uint32
;
171 case SPU_DECR_REGNUM
:
172 return builtin_type (gdbarch
)->builtin_uint32
;
174 case SPU_DECR_STATUS_REGNUM
:
175 return builtin_type (gdbarch
)->builtin_uint32
;
178 internal_error (__FILE__
, __LINE__
, "invalid regnum");
182 /* Pseudo registers for preferred slots - stack pointer. */
185 spu_pseudo_register_read_spu (struct regcache
*regcache
, const char *regname
,
188 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
189 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
194 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
195 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
196 memset (reg
, 0, sizeof reg
);
197 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
200 store_unsigned_integer (buf
, 4, byte_order
, strtoulst (reg
, NULL
, 16));
204 spu_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
205 int regnum
, gdb_byte
*buf
)
214 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
215 memcpy (buf
, reg
, 4);
218 case SPU_FPSCR_REGNUM
:
219 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
220 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
221 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
224 case SPU_SRR0_REGNUM
:
225 spu_pseudo_register_read_spu (regcache
, "srr0", buf
);
228 case SPU_LSLR_REGNUM
:
229 spu_pseudo_register_read_spu (regcache
, "lslr", buf
);
232 case SPU_DECR_REGNUM
:
233 spu_pseudo_register_read_spu (regcache
, "decr", buf
);
236 case SPU_DECR_STATUS_REGNUM
:
237 spu_pseudo_register_read_spu (regcache
, "decr_status", buf
);
241 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
246 spu_pseudo_register_write_spu (struct regcache
*regcache
, const char *regname
,
249 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
250 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
255 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
256 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
257 xsnprintf (reg
, sizeof reg
, "0x%s",
258 phex_nz (extract_unsigned_integer (buf
, 4, byte_order
), 4));
259 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
,
260 reg
, 0, strlen (reg
));
264 spu_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
265 int regnum
, const gdb_byte
*buf
)
274 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
275 memcpy (reg
, buf
, 4);
276 regcache_raw_write (regcache
, SPU_RAW_SP_REGNUM
, reg
);
279 case SPU_FPSCR_REGNUM
:
280 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
281 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
282 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
285 case SPU_SRR0_REGNUM
:
286 spu_pseudo_register_write_spu (regcache
, "srr0", buf
);
289 case SPU_LSLR_REGNUM
:
290 spu_pseudo_register_write_spu (regcache
, "lslr", buf
);
293 case SPU_DECR_REGNUM
:
294 spu_pseudo_register_write_spu (regcache
, "decr", buf
);
297 case SPU_DECR_STATUS_REGNUM
:
298 spu_pseudo_register_write_spu (regcache
, "decr_status", buf
);
302 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
306 /* Value conversion -- access scalar values at the preferred slot. */
308 static struct value
*
309 spu_value_from_register (struct type
*type
, int regnum
,
310 struct frame_info
*frame
)
312 struct value
*value
= default_value_from_register (type
, regnum
, frame
);
313 int len
= TYPE_LENGTH (type
);
315 if (regnum
< SPU_NUM_GPRS
&& len
< 16)
317 int preferred_slot
= len
< 4 ? 4 - len
: 0;
318 set_value_offset (value
, preferred_slot
);
324 /* Register groups. */
327 spu_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
328 struct reggroup
*group
)
330 /* Registers displayed via 'info regs'. */
331 if (group
== general_reggroup
)
334 /* Registers displayed via 'info float'. */
335 if (group
== float_reggroup
)
338 /* Registers that need to be saved/restored in order to
339 push or pop frames. */
340 if (group
== save_reggroup
|| group
== restore_reggroup
)
343 return default_register_reggroup_p (gdbarch
, regnum
, group
);
347 /* Address handling. */
350 spu_gdbarch_id (struct gdbarch
*gdbarch
)
352 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
355 /* The objfile architecture of a standalone SPU executable does not
356 provide an SPU ID. Retrieve it from the the objfile's relocated
357 address range in this special case. */
359 && symfile_objfile
&& symfile_objfile
->obfd
360 && bfd_get_arch (symfile_objfile
->obfd
) == bfd_arch_spu
361 && symfile_objfile
->sections
!= symfile_objfile
->sections_end
)
362 id
= SPUADDR_SPU (obj_section_addr (symfile_objfile
->sections
));
374 return SPU_LS_SIZE
- 1;
376 xsnprintf (annex
, sizeof annex
, "%d/lslr", id
);
377 memset (buf
, 0, sizeof buf
);
378 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
381 return strtoulst (buf
, NULL
, 16);
385 spu_address_class_type_flags (int byte_size
, int dwarf2_addr_class
)
387 if (dwarf2_addr_class
== 1)
388 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
394 spu_address_class_type_flags_to_name (struct gdbarch
*gdbarch
, int type_flags
)
396 if (type_flags
& TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
)
403 spu_address_class_name_to_type_flags (struct gdbarch
*gdbarch
,
404 const char *name
, int *type_flags_ptr
)
406 if (strcmp (name
, "__ea") == 0)
408 *type_flags_ptr
= TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
416 spu_address_to_pointer (struct gdbarch
*gdbarch
,
417 struct type
*type
, gdb_byte
*buf
, CORE_ADDR addr
)
419 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
420 store_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
,
421 SPUADDR_ADDR (addr
));
425 spu_pointer_to_address (struct gdbarch
*gdbarch
,
426 struct type
*type
, const gdb_byte
*buf
)
428 int id
= spu_gdbarch_id (gdbarch
);
429 ULONGEST lslr
= spu_lslr (id
);
430 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
432 = extract_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
);
434 /* Do not convert __ea pointers. */
435 if (TYPE_ADDRESS_CLASS_1 (type
))
438 return addr
? SPUADDR (id
, addr
& lslr
) : 0;
442 spu_integer_to_address (struct gdbarch
*gdbarch
,
443 struct type
*type
, const gdb_byte
*buf
)
445 int id
= spu_gdbarch_id (gdbarch
);
446 ULONGEST lslr
= spu_lslr (id
);
447 ULONGEST addr
= unpack_long (type
, buf
);
449 return SPUADDR (id
, addr
& lslr
);
453 /* Decoding SPU instructions. */
490 is_rr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
)
492 if ((insn
>> 21) == op
)
495 *ra
= (insn
>> 7) & 127;
496 *rb
= (insn
>> 14) & 127;
504 is_rrr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
, int *rc
)
506 if ((insn
>> 28) == op
)
508 *rt
= (insn
>> 21) & 127;
509 *ra
= (insn
>> 7) & 127;
510 *rb
= (insn
>> 14) & 127;
519 is_ri7 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i7
)
521 if ((insn
>> 21) == op
)
524 *ra
= (insn
>> 7) & 127;
525 *i7
= (((insn
>> 14) & 127) ^ 0x40) - 0x40;
533 is_ri10 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i10
)
535 if ((insn
>> 24) == op
)
538 *ra
= (insn
>> 7) & 127;
539 *i10
= (((insn
>> 14) & 0x3ff) ^ 0x200) - 0x200;
547 is_ri16 (unsigned int insn
, int op
, int *rt
, int *i16
)
549 if ((insn
>> 23) == op
)
552 *i16
= (((insn
>> 7) & 0xffff) ^ 0x8000) - 0x8000;
560 is_ri18 (unsigned int insn
, int op
, int *rt
, int *i18
)
562 if ((insn
>> 25) == op
)
565 *i18
= (((insn
>> 7) & 0x3ffff) ^ 0x20000) - 0x20000;
573 is_branch (unsigned int insn
, int *offset
, int *reg
)
577 if (is_ri16 (insn
, op_br
, &rt
, &i16
)
578 || is_ri16 (insn
, op_brsl
, &rt
, &i16
)
579 || is_ri16 (insn
, op_brnz
, &rt
, &i16
)
580 || is_ri16 (insn
, op_brz
, &rt
, &i16
)
581 || is_ri16 (insn
, op_brhnz
, &rt
, &i16
)
582 || is_ri16 (insn
, op_brhz
, &rt
, &i16
))
584 *reg
= SPU_PC_REGNUM
;
589 if (is_ri16 (insn
, op_bra
, &rt
, &i16
)
590 || is_ri16 (insn
, op_brasl
, &rt
, &i16
))
597 if (is_ri7 (insn
, op_bi
, &rt
, reg
, &i7
)
598 || is_ri7 (insn
, op_bisl
, &rt
, reg
, &i7
)
599 || is_ri7 (insn
, op_biz
, &rt
, reg
, &i7
)
600 || is_ri7 (insn
, op_binz
, &rt
, reg
, &i7
)
601 || is_ri7 (insn
, op_bihz
, &rt
, reg
, &i7
)
602 || is_ri7 (insn
, op_bihnz
, &rt
, reg
, &i7
))
612 /* Prolog parsing. */
614 struct spu_prologue_data
616 /* Stack frame size. -1 if analysis was unsuccessful. */
619 /* How to find the CFA. The CFA is equal to SP at function entry. */
623 /* Offset relative to CFA where a register is saved. -1 if invalid. */
624 int reg_offset
[SPU_NUM_GPRS
];
628 spu_analyze_prologue (struct gdbarch
*gdbarch
,
629 CORE_ADDR start_pc
, CORE_ADDR end_pc
,
630 struct spu_prologue_data
*data
)
632 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
637 int reg_immed
[SPU_NUM_GPRS
];
639 CORE_ADDR prolog_pc
= start_pc
;
644 /* Initialize DATA to default values. */
647 data
->cfa_reg
= SPU_RAW_SP_REGNUM
;
648 data
->cfa_offset
= 0;
650 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
651 data
->reg_offset
[i
] = -1;
653 /* Set up REG_IMMED array. This is non-zero for a register if we know its
654 preferred slot currently holds this immediate value. */
655 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
658 /* Scan instructions until the first branch.
660 The following instructions are important prolog components:
662 - The first instruction to set up the stack pointer.
663 - The first instruction to set up the frame pointer.
664 - The first instruction to save the link register.
665 - The first instruction to save the backchain.
667 We return the instruction after the latest of these four,
668 or the incoming PC if none is found. The first instruction
669 to set up the stack pointer also defines the frame size.
671 Note that instructions saving incoming arguments to their stack
672 slots are not counted as important, because they are hard to
673 identify with certainty. This should not matter much, because
674 arguments are relevant only in code compiled with debug data,
675 and in such code the GDB core will advance until the first source
676 line anyway, using SAL data.
678 For purposes of stack unwinding, we analyze the following types
679 of instructions in addition:
681 - Any instruction adding to the current frame pointer.
682 - Any instruction loading an immediate constant into a register.
683 - Any instruction storing a register onto the stack.
685 These are used to compute the CFA and REG_OFFSET output. */
687 for (pc
= start_pc
; pc
< end_pc
; pc
+= 4)
690 int rt
, ra
, rb
, rc
, immed
;
692 if (target_read_memory (pc
, buf
, 4))
694 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
696 /* AI is the typical instruction to set up a stack frame.
697 It is also used to initialize the frame pointer. */
698 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
))
700 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
701 data
->cfa_offset
-= immed
;
703 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
711 else if (rt
== SPU_FP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
717 data
->cfa_reg
= SPU_FP_REGNUM
;
718 data
->cfa_offset
-= immed
;
722 /* A is used to set up stack frames of size >= 512 bytes.
723 If we have tracked the contents of the addend register,
724 we can handle this as well. */
725 else if (is_rr (insn
, op_a
, &rt
, &ra
, &rb
))
727 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
729 if (reg_immed
[rb
] != 0)
730 data
->cfa_offset
-= reg_immed
[rb
];
732 data
->cfa_reg
= -1; /* We don't know the CFA any more. */
735 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
741 if (reg_immed
[rb
] != 0)
742 data
->size
= -reg_immed
[rb
];
746 /* We need to track IL and ILA used to load immediate constants
747 in case they are later used as input to an A instruction. */
748 else if (is_ri16 (insn
, op_il
, &rt
, &immed
))
750 reg_immed
[rt
] = immed
;
752 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
756 else if (is_ri18 (insn
, op_ila
, &rt
, &immed
))
758 reg_immed
[rt
] = immed
& 0x3ffff;
760 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
764 /* STQD is used to save registers to the stack. */
765 else if (is_ri10 (insn
, op_stqd
, &rt
, &ra
, &immed
))
767 if (ra
== data
->cfa_reg
)
768 data
->reg_offset
[rt
] = data
->cfa_offset
- (immed
<< 4);
770 if (ra
== data
->cfa_reg
&& rt
== SPU_LR_REGNUM
777 if (ra
== SPU_RAW_SP_REGNUM
778 && (found_sp
? immed
== 0 : rt
== SPU_RAW_SP_REGNUM
)
786 /* _start uses SELB to set up the stack pointer. */
787 else if (is_rrr (insn
, op_selb
, &rt
, &ra
, &rb
, &rc
))
789 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
793 /* We terminate if we find a branch. */
794 else if (is_branch (insn
, &immed
, &ra
))
799 /* If we successfully parsed until here, and didn't find any instruction
800 modifying SP, we assume we have a frameless function. */
804 /* Return cooked instead of raw SP. */
805 if (data
->cfa_reg
== SPU_RAW_SP_REGNUM
)
806 data
->cfa_reg
= SPU_SP_REGNUM
;
811 /* Return the first instruction after the prologue starting at PC. */
813 spu_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
815 struct spu_prologue_data data
;
816 return spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
819 /* Return the frame pointer in use at address PC. */
821 spu_virtual_frame_pointer (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
822 int *reg
, LONGEST
*offset
)
824 struct spu_prologue_data data
;
825 spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
827 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
829 /* The 'frame pointer' address is CFA minus frame size. */
831 *offset
= data
.cfa_offset
- data
.size
;
835 /* ??? We don't really know ... */
836 *reg
= SPU_SP_REGNUM
;
841 /* Return true if we are in the function's epilogue, i.e. after the
842 instruction that destroyed the function's stack frame.
844 1) scan forward from the point of execution:
845 a) If you find an instruction that modifies the stack pointer
846 or transfers control (except a return), execution is not in
848 b) Stop scanning if you find a return instruction or reach the
849 end of the function or reach the hard limit for the size of
851 2) scan backward from the point of execution:
852 a) If you find an instruction that modifies the stack pointer,
853 execution *is* in an epilogue, return.
854 b) Stop scanning if you reach an instruction that transfers
855 control or the beginning of the function or reach the hard
856 limit for the size of an epilogue. */
859 spu_in_function_epilogue_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
861 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
862 CORE_ADDR scan_pc
, func_start
, func_end
, epilogue_start
, epilogue_end
;
865 int rt
, ra
, rb
, rc
, immed
;
867 /* Find the search limits based on function boundaries and hard limit.
868 We assume the epilogue can be up to 64 instructions long. */
870 const int spu_max_epilogue_size
= 64 * 4;
872 if (!find_pc_partial_function (pc
, NULL
, &func_start
, &func_end
))
875 if (pc
- func_start
< spu_max_epilogue_size
)
876 epilogue_start
= func_start
;
878 epilogue_start
= pc
- spu_max_epilogue_size
;
880 if (func_end
- pc
< spu_max_epilogue_size
)
881 epilogue_end
= func_end
;
883 epilogue_end
= pc
+ spu_max_epilogue_size
;
885 /* Scan forward until next 'bi $0'. */
887 for (scan_pc
= pc
; scan_pc
< epilogue_end
; scan_pc
+= 4)
889 if (target_read_memory (scan_pc
, buf
, 4))
891 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
893 if (is_branch (insn
, &immed
, &ra
))
895 if (immed
== 0 && ra
== SPU_LR_REGNUM
)
901 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
902 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
903 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
905 if (rt
== SPU_RAW_SP_REGNUM
)
910 if (scan_pc
>= epilogue_end
)
913 /* Scan backward until adjustment to stack pointer (R1). */
915 for (scan_pc
= pc
- 4; scan_pc
>= epilogue_start
; scan_pc
-= 4)
917 if (target_read_memory (scan_pc
, buf
, 4))
919 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
921 if (is_branch (insn
, &immed
, &ra
))
924 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
925 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
926 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
928 if (rt
== SPU_RAW_SP_REGNUM
)
937 /* Normal stack frames. */
939 struct spu_unwind_cache
942 CORE_ADDR frame_base
;
943 CORE_ADDR local_base
;
945 struct trad_frame_saved_reg
*saved_regs
;
948 static struct spu_unwind_cache
*
949 spu_frame_unwind_cache (struct frame_info
*this_frame
,
950 void **this_prologue_cache
)
952 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
953 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
954 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
955 struct spu_unwind_cache
*info
;
956 struct spu_prologue_data data
;
957 CORE_ADDR id
= tdep
->id
;
960 if (*this_prologue_cache
)
961 return *this_prologue_cache
;
963 info
= FRAME_OBSTACK_ZALLOC (struct spu_unwind_cache
);
964 *this_prologue_cache
= info
;
965 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
966 info
->frame_base
= 0;
967 info
->local_base
= 0;
969 /* Find the start of the current function, and analyze its prologue. */
970 info
->func
= get_frame_func (this_frame
);
973 /* Fall back to using the current PC as frame ID. */
974 info
->func
= get_frame_pc (this_frame
);
978 spu_analyze_prologue (gdbarch
, info
->func
, get_frame_pc (this_frame
),
981 /* If successful, use prologue analysis data. */
982 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
987 /* Determine CFA via unwound CFA_REG plus CFA_OFFSET. */
988 get_frame_register (this_frame
, data
.cfa_reg
, buf
);
989 cfa
= extract_unsigned_integer (buf
, 4, byte_order
) + data
.cfa_offset
;
990 cfa
= SPUADDR (id
, cfa
);
992 /* Call-saved register slots. */
993 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
994 if (i
== SPU_LR_REGNUM
995 || (i
>= SPU_SAVED1_REGNUM
&& i
<= SPU_SAVEDN_REGNUM
))
996 if (data
.reg_offset
[i
] != -1)
997 info
->saved_regs
[i
].addr
= cfa
- data
.reg_offset
[i
];
1000 info
->frame_base
= cfa
;
1001 info
->local_base
= cfa
- data
.size
;
1004 /* Otherwise, fall back to reading the backchain link. */
1011 /* Get the backchain. */
1012 reg
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1013 status
= safe_read_memory_integer (SPUADDR (id
, reg
), 4, byte_order
,
1016 /* A zero backchain terminates the frame chain. Also, sanity
1017 check against the local store size limit. */
1018 if (status
&& backchain
> 0 && backchain
< SPU_LS_SIZE
)
1020 /* Assume the link register is saved into its slot. */
1021 if (backchain
+ 16 < SPU_LS_SIZE
)
1022 info
->saved_regs
[SPU_LR_REGNUM
].addr
= SPUADDR (id
, backchain
+ 16);
1025 info
->frame_base
= SPUADDR (id
, backchain
);
1026 info
->local_base
= SPUADDR (id
, reg
);
1030 /* If we didn't find a frame, we cannot determine SP / return address. */
1031 if (info
->frame_base
== 0)
1034 /* The previous SP is equal to the CFA. */
1035 trad_frame_set_value (info
->saved_regs
, SPU_SP_REGNUM
,
1036 SPUADDR_ADDR (info
->frame_base
));
1038 /* Read full contents of the unwound link register in order to
1039 be able to determine the return address. */
1040 if (trad_frame_addr_p (info
->saved_regs
, SPU_LR_REGNUM
))
1041 target_read_memory (info
->saved_regs
[SPU_LR_REGNUM
].addr
, buf
, 16);
1043 get_frame_register (this_frame
, SPU_LR_REGNUM
, buf
);
1045 /* Normally, the return address is contained in the slot 0 of the
1046 link register, and slots 1-3 are zero. For an overlay return,
1047 slot 0 contains the address of the overlay manager return stub,
1048 slot 1 contains the partition number of the overlay section to
1049 be returned to, and slot 2 contains the return address within
1050 that section. Return the latter address in that case. */
1051 if (extract_unsigned_integer (buf
+ 8, 4, byte_order
) != 0)
1052 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1053 extract_unsigned_integer (buf
+ 8, 4, byte_order
));
1055 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1056 extract_unsigned_integer (buf
, 4, byte_order
));
1062 spu_frame_this_id (struct frame_info
*this_frame
,
1063 void **this_prologue_cache
, struct frame_id
*this_id
)
1065 struct spu_unwind_cache
*info
=
1066 spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1068 if (info
->frame_base
== 0)
1071 *this_id
= frame_id_build (info
->frame_base
, info
->func
);
1074 static struct value
*
1075 spu_frame_prev_register (struct frame_info
*this_frame
,
1076 void **this_prologue_cache
, int regnum
)
1078 struct spu_unwind_cache
*info
1079 = spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1081 /* Special-case the stack pointer. */
1082 if (regnum
== SPU_RAW_SP_REGNUM
)
1083 regnum
= SPU_SP_REGNUM
;
1085 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
1088 static const struct frame_unwind spu_frame_unwind
= {
1091 spu_frame_prev_register
,
1093 default_frame_sniffer
1097 spu_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
1099 struct spu_unwind_cache
*info
1100 = spu_frame_unwind_cache (this_frame
, this_cache
);
1101 return info
->local_base
;
1104 static const struct frame_base spu_frame_base
= {
1106 spu_frame_base_address
,
1107 spu_frame_base_address
,
1108 spu_frame_base_address
1112 spu_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1114 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1115 CORE_ADDR pc
= frame_unwind_register_unsigned (next_frame
, SPU_PC_REGNUM
);
1116 /* Mask off interrupt enable bit. */
1117 return SPUADDR (tdep
->id
, pc
& -4);
1121 spu_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1123 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1124 CORE_ADDR sp
= frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
1125 return SPUADDR (tdep
->id
, sp
);
1129 spu_read_pc (struct regcache
*regcache
)
1131 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1133 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &pc
);
1134 /* Mask off interrupt enable bit. */
1135 return SPUADDR (tdep
->id
, pc
& -4);
1139 spu_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1141 /* Keep interrupt enabled state unchanged. */
1143 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &old_pc
);
1144 regcache_cooked_write_unsigned (regcache
, SPU_PC_REGNUM
,
1145 (SPUADDR_ADDR (pc
) & -4) | (old_pc
& 3));
1149 /* Cell/B.E. cross-architecture unwinder support. */
1151 struct spu2ppu_cache
1153 struct frame_id frame_id
;
1154 struct regcache
*regcache
;
1157 static struct gdbarch
*
1158 spu2ppu_prev_arch (struct frame_info
*this_frame
, void **this_cache
)
1160 struct spu2ppu_cache
*cache
= *this_cache
;
1161 return get_regcache_arch (cache
->regcache
);
1165 spu2ppu_this_id (struct frame_info
*this_frame
,
1166 void **this_cache
, struct frame_id
*this_id
)
1168 struct spu2ppu_cache
*cache
= *this_cache
;
1169 *this_id
= cache
->frame_id
;
1172 static struct value
*
1173 spu2ppu_prev_register (struct frame_info
*this_frame
,
1174 void **this_cache
, int regnum
)
1176 struct spu2ppu_cache
*cache
= *this_cache
;
1177 struct gdbarch
*gdbarch
= get_regcache_arch (cache
->regcache
);
1180 buf
= alloca (register_size (gdbarch
, regnum
));
1181 regcache_cooked_read (cache
->regcache
, regnum
, buf
);
1182 return frame_unwind_got_bytes (this_frame
, regnum
, buf
);
1186 spu2ppu_sniffer (const struct frame_unwind
*self
,
1187 struct frame_info
*this_frame
, void **this_prologue_cache
)
1189 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1190 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1191 CORE_ADDR base
, func
, backchain
;
1194 if (gdbarch_bfd_arch_info (target_gdbarch
)->arch
== bfd_arch_spu
)
1197 base
= get_frame_sp (this_frame
);
1198 func
= get_frame_pc (this_frame
);
1199 if (target_read_memory (base
, buf
, 4))
1201 backchain
= extract_unsigned_integer (buf
, 4, byte_order
);
1205 struct frame_info
*fi
;
1207 struct spu2ppu_cache
*cache
1208 = FRAME_OBSTACK_CALLOC (1, struct spu2ppu_cache
);
1210 cache
->frame_id
= frame_id_build (base
+ 16, func
);
1212 for (fi
= get_next_frame (this_frame
); fi
; fi
= get_next_frame (fi
))
1213 if (gdbarch_bfd_arch_info (get_frame_arch (fi
))->arch
!= bfd_arch_spu
)
1218 cache
->regcache
= frame_save_as_regcache (fi
);
1219 *this_prologue_cache
= cache
;
1224 struct regcache
*regcache
;
1225 regcache
= get_thread_arch_regcache (inferior_ptid
, target_gdbarch
);
1226 cache
->regcache
= regcache_dup (regcache
);
1227 *this_prologue_cache
= cache
;
1236 spu2ppu_dealloc_cache (struct frame_info
*self
, void *this_cache
)
1238 struct spu2ppu_cache
*cache
= this_cache
;
1239 regcache_xfree (cache
->regcache
);
1242 static const struct frame_unwind spu2ppu_unwind
= {
1245 spu2ppu_prev_register
,
1248 spu2ppu_dealloc_cache
,
1253 /* Function calling convention. */
1256 spu_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1262 spu_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
1263 struct value
**args
, int nargs
, struct type
*value_type
,
1264 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
1265 struct regcache
*regcache
)
1267 /* Allocate space sufficient for a breakpoint, keeping the stack aligned. */
1268 sp
= (sp
- 4) & ~15;
1269 /* Store the address of that breakpoint */
1271 /* The call starts at the callee's entry point. */
1278 spu_scalar_value_p (struct type
*type
)
1280 switch (TYPE_CODE (type
))
1283 case TYPE_CODE_ENUM
:
1284 case TYPE_CODE_RANGE
:
1285 case TYPE_CODE_CHAR
:
1286 case TYPE_CODE_BOOL
:
1289 return TYPE_LENGTH (type
) <= 16;
1297 spu_value_to_regcache (struct regcache
*regcache
, int regnum
,
1298 struct type
*type
, const gdb_byte
*in
)
1300 int len
= TYPE_LENGTH (type
);
1302 if (spu_scalar_value_p (type
))
1304 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1305 regcache_cooked_write_part (regcache
, regnum
, preferred_slot
, len
, in
);
1311 regcache_cooked_write (regcache
, regnum
++, in
);
1317 regcache_cooked_write_part (regcache
, regnum
, 0, len
, in
);
1322 spu_regcache_to_value (struct regcache
*regcache
, int regnum
,
1323 struct type
*type
, gdb_byte
*out
)
1325 int len
= TYPE_LENGTH (type
);
1327 if (spu_scalar_value_p (type
))
1329 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1330 regcache_cooked_read_part (regcache
, regnum
, preferred_slot
, len
, out
);
1336 regcache_cooked_read (regcache
, regnum
++, out
);
1342 regcache_cooked_read_part (regcache
, regnum
, 0, len
, out
);
1347 spu_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1348 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1349 int nargs
, struct value
**args
, CORE_ADDR sp
,
1350 int struct_return
, CORE_ADDR struct_addr
)
1352 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1355 int regnum
= SPU_ARG1_REGNUM
;
1359 /* Set the return address. */
1360 memset (buf
, 0, sizeof buf
);
1361 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (bp_addr
));
1362 regcache_cooked_write (regcache
, SPU_LR_REGNUM
, buf
);
1364 /* If STRUCT_RETURN is true, then the struct return address (in
1365 STRUCT_ADDR) will consume the first argument-passing register.
1366 Both adjust the register count and store that value. */
1369 memset (buf
, 0, sizeof buf
);
1370 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (struct_addr
));
1371 regcache_cooked_write (regcache
, regnum
++, buf
);
1374 /* Fill in argument registers. */
1375 for (i
= 0; i
< nargs
; i
++)
1377 struct value
*arg
= args
[i
];
1378 struct type
*type
= check_typedef (value_type (arg
));
1379 const gdb_byte
*contents
= value_contents (arg
);
1380 int len
= TYPE_LENGTH (type
);
1381 int n_regs
= align_up (len
, 16) / 16;
1383 /* If the argument doesn't wholly fit into registers, it and
1384 all subsequent arguments go to the stack. */
1385 if (regnum
+ n_regs
- 1 > SPU_ARGN_REGNUM
)
1391 spu_value_to_regcache (regcache
, regnum
, type
, contents
);
1395 /* Overflow arguments go to the stack. */
1396 if (stack_arg
!= -1)
1400 /* Allocate all required stack size. */
1401 for (i
= stack_arg
; i
< nargs
; i
++)
1403 struct type
*type
= check_typedef (value_type (args
[i
]));
1404 sp
-= align_up (TYPE_LENGTH (type
), 16);
1407 /* Fill in stack arguments. */
1409 for (i
= stack_arg
; i
< nargs
; i
++)
1411 struct value
*arg
= args
[i
];
1412 struct type
*type
= check_typedef (value_type (arg
));
1413 int len
= TYPE_LENGTH (type
);
1416 if (spu_scalar_value_p (type
))
1417 preferred_slot
= len
< 4 ? 4 - len
: 0;
1421 target_write_memory (ap
+ preferred_slot
, value_contents (arg
), len
);
1422 ap
+= align_up (TYPE_LENGTH (type
), 16);
1426 /* Allocate stack frame header. */
1429 /* Store stack back chain. */
1430 regcache_cooked_read (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1431 target_write_memory (sp
, buf
, 16);
1433 /* Finally, update all slots of the SP register. */
1434 sp_delta
= sp
- extract_unsigned_integer (buf
, 4, byte_order
);
1435 for (i
= 0; i
< 4; i
++)
1437 CORE_ADDR sp_slot
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
1438 store_unsigned_integer (buf
+ 4*i
, 4, byte_order
, sp_slot
+ sp_delta
);
1440 regcache_cooked_write (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1445 static struct frame_id
1446 spu_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1448 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1449 CORE_ADDR pc
= get_frame_register_unsigned (this_frame
, SPU_PC_REGNUM
);
1450 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1451 return frame_id_build (SPUADDR (tdep
->id
, sp
), SPUADDR (tdep
->id
, pc
& -4));
1454 /* Function return value access. */
1456 static enum return_value_convention
1457 spu_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
1458 struct type
*type
, struct regcache
*regcache
,
1459 gdb_byte
*out
, const gdb_byte
*in
)
1461 enum return_value_convention rvc
;
1463 if (TYPE_LENGTH (type
) <= (SPU_ARGN_REGNUM
- SPU_ARG1_REGNUM
+ 1) * 16)
1464 rvc
= RETURN_VALUE_REGISTER_CONVENTION
;
1466 rvc
= RETURN_VALUE_STRUCT_CONVENTION
;
1472 case RETURN_VALUE_REGISTER_CONVENTION
:
1473 spu_value_to_regcache (regcache
, SPU_ARG1_REGNUM
, type
, in
);
1476 case RETURN_VALUE_STRUCT_CONVENTION
:
1477 error ("Cannot set function return value.");
1485 case RETURN_VALUE_REGISTER_CONVENTION
:
1486 spu_regcache_to_value (regcache
, SPU_ARG1_REGNUM
, type
, out
);
1489 case RETURN_VALUE_STRUCT_CONVENTION
:
1490 error ("Function return value unknown.");
1501 static const gdb_byte
*
1502 spu_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
* pcptr
, int *lenptr
)
1504 static const gdb_byte breakpoint
[] = { 0x00, 0x00, 0x3f, 0xff };
1506 *lenptr
= sizeof breakpoint
;
1511 /* Software single-stepping support. */
1514 spu_software_single_step (struct frame_info
*frame
)
1516 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1517 struct address_space
*aspace
= get_frame_address_space (frame
);
1518 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1519 CORE_ADDR pc
, next_pc
;
1524 pc
= get_frame_pc (frame
);
1526 if (target_read_memory (pc
, buf
, 4))
1528 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
1530 /* Next sequential instruction is at PC + 4, except if the current
1531 instruction is a PPE-assisted call, in which case it is at PC + 8.
1532 Wrap around LS limit to be on the safe side. */
1533 if ((insn
& 0xffffff00) == 0x00002100)
1534 next_pc
= (SPUADDR_ADDR (pc
) + 8) & (SPU_LS_SIZE
- 1);
1536 next_pc
= (SPUADDR_ADDR (pc
) + 4) & (SPU_LS_SIZE
- 1);
1538 insert_single_step_breakpoint (gdbarch
,
1539 aspace
, SPUADDR (SPUADDR_SPU (pc
), next_pc
));
1541 if (is_branch (insn
, &offset
, ®
))
1543 CORE_ADDR target
= offset
;
1545 if (reg
== SPU_PC_REGNUM
)
1546 target
+= SPUADDR_ADDR (pc
);
1549 get_frame_register_bytes (frame
, reg
, 0, 4, buf
);
1550 target
+= extract_unsigned_integer (buf
, 4, byte_order
) & -4;
1553 target
= target
& (SPU_LS_SIZE
- 1);
1554 if (target
!= next_pc
)
1555 insert_single_step_breakpoint (gdbarch
, aspace
,
1556 SPUADDR (SPUADDR_SPU (pc
), target
));
1563 /* Longjmp support. */
1566 spu_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
1568 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1569 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1570 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1574 /* Jump buffer is pointed to by the argument register $r3. */
1575 get_frame_register_bytes (frame
, SPU_ARG1_REGNUM
, 0, 4, buf
);
1576 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
1577 if (target_read_memory (SPUADDR (tdep
->id
, jb_addr
), buf
, 4))
1580 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
1581 *pc
= SPUADDR (tdep
->id
, *pc
);
1588 struct spu_dis_asm_data
1590 struct gdbarch
*gdbarch
;
1595 spu_dis_asm_print_address (bfd_vma addr
, struct disassemble_info
*info
)
1597 struct spu_dis_asm_data
*data
= info
->application_data
;
1598 print_address (data
->gdbarch
, SPUADDR (data
->id
, addr
), info
->stream
);
1602 gdb_print_insn_spu (bfd_vma memaddr
, struct disassemble_info
*info
)
1604 /* The opcodes disassembler does 18-bit address arithmetic. Make sure the
1605 SPU ID encoded in the high bits is added back when we call print_address. */
1606 struct disassemble_info spu_info
= *info
;
1607 struct spu_dis_asm_data data
;
1608 data
.gdbarch
= info
->application_data
;
1609 data
.id
= SPUADDR_SPU (memaddr
);
1611 spu_info
.application_data
= &data
;
1612 spu_info
.print_address_func
= spu_dis_asm_print_address
;
1613 return print_insn_spu (memaddr
, &spu_info
);
1617 /* Target overlays for the SPU overlay manager.
1619 See the documentation of simple_overlay_update for how the
1620 interface is supposed to work.
1622 Data structures used by the overlay manager:
1630 } _ovly_table[]; -- one entry per overlay section
1632 struct ovly_buf_table
1635 } _ovly_buf_table[]; -- one entry per overlay buffer
1637 _ovly_table should never change.
1639 Both tables are aligned to a 16-byte boundary, the symbols _ovly_table
1640 and _ovly_buf_table are of type STT_OBJECT and their size set to the size
1641 of the respective array. buf in _ovly_table is an index into _ovly_buf_table.
1643 mapped is an index into _ovly_table. Both the mapped and buf indices start
1644 from one to reference the first entry in their respective tables. */
1646 /* Using the per-objfile private data mechanism, we store for each
1647 objfile an array of "struct spu_overlay_table" structures, one
1648 for each obj_section of the objfile. This structure holds two
1649 fields, MAPPED_PTR and MAPPED_VAL. If MAPPED_PTR is zero, this
1650 is *not* an overlay section. If it is non-zero, it represents
1651 a target address. The overlay section is mapped iff the target
1652 integer at this location equals MAPPED_VAL. */
1654 static const struct objfile_data
*spu_overlay_data
;
1656 struct spu_overlay_table
1658 CORE_ADDR mapped_ptr
;
1659 CORE_ADDR mapped_val
;
1662 /* Retrieve the overlay table for OBJFILE. If not already cached, read
1663 the _ovly_table data structure from the target and initialize the
1664 spu_overlay_table data structure from it. */
1665 static struct spu_overlay_table
*
1666 spu_get_overlay_table (struct objfile
*objfile
)
1668 enum bfd_endian byte_order
= bfd_big_endian (objfile
->obfd
)?
1669 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1670 struct minimal_symbol
*ovly_table_msym
, *ovly_buf_table_msym
;
1671 CORE_ADDR ovly_table_base
, ovly_buf_table_base
;
1672 unsigned ovly_table_size
, ovly_buf_table_size
;
1673 struct spu_overlay_table
*tbl
;
1674 struct obj_section
*osect
;
1678 tbl
= objfile_data (objfile
, spu_overlay_data
);
1682 ovly_table_msym
= lookup_minimal_symbol ("_ovly_table", NULL
, objfile
);
1683 if (!ovly_table_msym
)
1686 ovly_buf_table_msym
= lookup_minimal_symbol ("_ovly_buf_table", NULL
, objfile
);
1687 if (!ovly_buf_table_msym
)
1690 ovly_table_base
= SYMBOL_VALUE_ADDRESS (ovly_table_msym
);
1691 ovly_table_size
= MSYMBOL_SIZE (ovly_table_msym
);
1693 ovly_buf_table_base
= SYMBOL_VALUE_ADDRESS (ovly_buf_table_msym
);
1694 ovly_buf_table_size
= MSYMBOL_SIZE (ovly_buf_table_msym
);
1696 ovly_table
= xmalloc (ovly_table_size
);
1697 read_memory (ovly_table_base
, ovly_table
, ovly_table_size
);
1699 tbl
= OBSTACK_CALLOC (&objfile
->objfile_obstack
,
1700 objfile
->sections_end
- objfile
->sections
,
1701 struct spu_overlay_table
);
1703 for (i
= 0; i
< ovly_table_size
/ 16; i
++)
1705 CORE_ADDR vma
= extract_unsigned_integer (ovly_table
+ 16*i
+ 0,
1707 CORE_ADDR size
= extract_unsigned_integer (ovly_table
+ 16*i
+ 4,
1709 CORE_ADDR pos
= extract_unsigned_integer (ovly_table
+ 16*i
+ 8,
1711 CORE_ADDR buf
= extract_unsigned_integer (ovly_table
+ 16*i
+ 12,
1714 if (buf
== 0 || (buf
- 1) * 4 >= ovly_buf_table_size
)
1717 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1718 if (vma
== bfd_section_vma (objfile
->obfd
, osect
->the_bfd_section
)
1719 && pos
== osect
->the_bfd_section
->filepos
)
1721 int ndx
= osect
- objfile
->sections
;
1722 tbl
[ndx
].mapped_ptr
= ovly_buf_table_base
+ (buf
- 1) * 4;
1723 tbl
[ndx
].mapped_val
= i
+ 1;
1729 set_objfile_data (objfile
, spu_overlay_data
, tbl
);
1733 /* Read _ovly_buf_table entry from the target to dermine whether
1734 OSECT is currently mapped, and update the mapped state. */
1736 spu_overlay_update_osect (struct obj_section
*osect
)
1738 enum bfd_endian byte_order
= bfd_big_endian (osect
->objfile
->obfd
)?
1739 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1740 struct spu_overlay_table
*ovly_table
;
1743 ovly_table
= spu_get_overlay_table (osect
->objfile
);
1747 ovly_table
+= osect
- osect
->objfile
->sections
;
1748 if (ovly_table
->mapped_ptr
== 0)
1751 id
= SPUADDR_SPU (obj_section_addr (osect
));
1752 val
= read_memory_unsigned_integer (SPUADDR (id
, ovly_table
->mapped_ptr
),
1754 osect
->ovly_mapped
= (val
== ovly_table
->mapped_val
);
1757 /* If OSECT is NULL, then update all sections' mapped state.
1758 If OSECT is non-NULL, then update only OSECT's mapped state. */
1760 spu_overlay_update (struct obj_section
*osect
)
1762 /* Just one section. */
1764 spu_overlay_update_osect (osect
);
1769 struct objfile
*objfile
;
1771 ALL_OBJSECTIONS (objfile
, osect
)
1772 if (section_is_overlay (osect
))
1773 spu_overlay_update_osect (osect
);
1777 /* Whenever a new objfile is loaded, read the target's _ovly_table.
1778 If there is one, go through all sections and make sure for non-
1779 overlay sections LMA equals VMA, while for overlay sections LMA
1780 is larger than local store size. */
1782 spu_overlay_new_objfile (struct objfile
*objfile
)
1784 struct spu_overlay_table
*ovly_table
;
1785 struct obj_section
*osect
;
1787 /* If we've already touched this file, do nothing. */
1788 if (!objfile
|| objfile_data (objfile
, spu_overlay_data
) != NULL
)
1791 /* Consider only SPU objfiles. */
1792 if (bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1795 /* Check if this objfile has overlays. */
1796 ovly_table
= spu_get_overlay_table (objfile
);
1800 /* Now go and fiddle with all the LMAs. */
1801 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1803 bfd
*obfd
= objfile
->obfd
;
1804 asection
*bsect
= osect
->the_bfd_section
;
1805 int ndx
= osect
- objfile
->sections
;
1807 if (ovly_table
[ndx
].mapped_ptr
== 0)
1808 bfd_section_lma (obfd
, bsect
) = bfd_section_vma (obfd
, bsect
);
1810 bfd_section_lma (obfd
, bsect
) = bsect
->filepos
+ SPU_LS_SIZE
;
1815 /* Insert temporary breakpoint on "main" function of newly loaded
1816 SPE context OBJFILE. */
1818 spu_catch_start (struct objfile
*objfile
)
1820 struct minimal_symbol
*minsym
;
1821 struct symtab
*symtab
;
1825 /* Do this only if requested by "set spu stop-on-load on". */
1826 if (!spu_stop_on_load_p
)
1829 /* Consider only SPU objfiles. */
1830 if (!objfile
|| bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1833 /* The main objfile is handled differently. */
1834 if (objfile
== symfile_objfile
)
1837 /* There can be multiple symbols named "main". Search for the
1838 "main" in *this* objfile. */
1839 minsym
= lookup_minimal_symbol ("main", NULL
, objfile
);
1843 /* If we have debugging information, try to use it -- this
1844 will allow us to properly skip the prologue. */
1845 pc
= SYMBOL_VALUE_ADDRESS (minsym
);
1846 symtab
= find_pc_sect_symtab (pc
, SYMBOL_OBJ_SECTION (minsym
));
1849 struct blockvector
*bv
= BLOCKVECTOR (symtab
);
1850 struct block
*block
= BLOCKVECTOR_BLOCK (bv
, GLOBAL_BLOCK
);
1852 struct symtab_and_line sal
;
1854 sym
= lookup_block_symbol (block
, "main", VAR_DOMAIN
);
1857 fixup_symbol_section (sym
, objfile
);
1858 sal
= find_function_start_sal (sym
, 1);
1863 /* Use a numerical address for the set_breakpoint command to avoid having
1864 the breakpoint re-set incorrectly. */
1865 xsnprintf (buf
, sizeof buf
, "*%s", core_addr_to_string (pc
));
1866 create_breakpoint (get_objfile_arch (objfile
), buf
/* arg */,
1867 NULL
/* cond_string */, -1 /* thread */,
1868 0 /* parse_condition_and_thread */, 1 /* tempflag */,
1869 0 /* hardwareflag */, 0 /* traceflag */,
1870 0 /* ignore_count */,
1871 AUTO_BOOLEAN_FALSE
/* pending_break_support */,
1872 NULL
/* ops */, 0 /* from_tty */, 1 /* enabled */);
1876 /* Look up OBJFILE loaded into FRAME's SPU context. */
1877 static struct objfile
*
1878 spu_objfile_from_frame (struct frame_info
*frame
)
1880 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1881 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1882 struct objfile
*obj
;
1884 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
1889 if (obj
->sections
!= obj
->sections_end
1890 && SPUADDR_SPU (obj_section_addr (obj
->sections
)) == tdep
->id
)
1897 /* Flush cache for ea pointer access if available. */
1899 flush_ea_cache (void)
1901 struct minimal_symbol
*msymbol
;
1902 struct objfile
*obj
;
1904 if (!has_stack_frames ())
1907 obj
= spu_objfile_from_frame (get_current_frame ());
1911 /* Lookup inferior function __cache_flush. */
1912 msymbol
= lookup_minimal_symbol ("__cache_flush", NULL
, obj
);
1913 if (msymbol
!= NULL
)
1918 type
= objfile_type (obj
)->builtin_void
;
1919 type
= lookup_function_type (type
);
1920 type
= lookup_pointer_type (type
);
1921 addr
= SYMBOL_VALUE_ADDRESS (msymbol
);
1923 call_function_by_hand (value_from_pointer (type
, addr
), 0, NULL
);
1927 /* This handler is called when the inferior has stopped. If it is stopped in
1928 SPU architecture then flush the ea cache if used. */
1930 spu_attach_normal_stop (struct bpstats
*bs
, int print_frame
)
1932 if (!spu_auto_flush_cache_p
)
1935 /* Temporarily reset spu_auto_flush_cache_p to avoid recursively
1936 re-entering this function when __cache_flush stops. */
1937 spu_auto_flush_cache_p
= 0;
1939 spu_auto_flush_cache_p
= 1;
1943 /* "info spu" commands. */
1946 info_spu_event_command (char *args
, int from_tty
)
1948 struct frame_info
*frame
= get_selected_frame (NULL
);
1949 ULONGEST event_status
= 0;
1950 ULONGEST event_mask
= 0;
1951 struct cleanup
*chain
;
1957 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
1958 error (_("\"info spu\" is only supported on the SPU architecture."));
1960 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
1962 xsnprintf (annex
, sizeof annex
, "%d/event_status", id
);
1963 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1964 buf
, 0, (sizeof (buf
) - 1));
1966 error (_("Could not read event_status."));
1968 event_status
= strtoulst (buf
, NULL
, 16);
1970 xsnprintf (annex
, sizeof annex
, "%d/event_mask", id
);
1971 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1972 buf
, 0, (sizeof (buf
) - 1));
1974 error (_("Could not read event_mask."));
1976 event_mask
= strtoulst (buf
, NULL
, 16);
1978 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoEvent");
1980 if (ui_out_is_mi_like_p (uiout
))
1982 ui_out_field_fmt (uiout
, "event_status",
1983 "0x%s", phex_nz (event_status
, 4));
1984 ui_out_field_fmt (uiout
, "event_mask",
1985 "0x%s", phex_nz (event_mask
, 4));
1989 printf_filtered (_("Event Status 0x%s\n"), phex (event_status
, 4));
1990 printf_filtered (_("Event Mask 0x%s\n"), phex (event_mask
, 4));
1993 do_cleanups (chain
);
1997 info_spu_signal_command (char *args
, int from_tty
)
1999 struct frame_info
*frame
= get_selected_frame (NULL
);
2000 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2001 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2002 ULONGEST signal1
= 0;
2003 ULONGEST signal1_type
= 0;
2004 int signal1_pending
= 0;
2005 ULONGEST signal2
= 0;
2006 ULONGEST signal2_type
= 0;
2007 int signal2_pending
= 0;
2008 struct cleanup
*chain
;
2014 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2015 error (_("\"info spu\" is only supported on the SPU architecture."));
2017 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2019 xsnprintf (annex
, sizeof annex
, "%d/signal1", id
);
2020 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2022 error (_("Could not read signal1."));
2025 signal1
= extract_unsigned_integer (buf
, 4, byte_order
);
2026 signal1_pending
= 1;
2029 xsnprintf (annex
, sizeof annex
, "%d/signal1_type", id
);
2030 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2031 buf
, 0, (sizeof (buf
) - 1));
2033 error (_("Could not read signal1_type."));
2035 signal1_type
= strtoulst (buf
, NULL
, 16);
2037 xsnprintf (annex
, sizeof annex
, "%d/signal2", id
);
2038 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2040 error (_("Could not read signal2."));
2043 signal2
= extract_unsigned_integer (buf
, 4, byte_order
);
2044 signal2_pending
= 1;
2047 xsnprintf (annex
, sizeof annex
, "%d/signal2_type", id
);
2048 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2049 buf
, 0, (sizeof (buf
) - 1));
2051 error (_("Could not read signal2_type."));
2053 signal2_type
= strtoulst (buf
, NULL
, 16);
2055 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoSignal");
2057 if (ui_out_is_mi_like_p (uiout
))
2059 ui_out_field_int (uiout
, "signal1_pending", signal1_pending
);
2060 ui_out_field_fmt (uiout
, "signal1", "0x%s", phex_nz (signal1
, 4));
2061 ui_out_field_int (uiout
, "signal1_type", signal1_type
);
2062 ui_out_field_int (uiout
, "signal2_pending", signal2_pending
);
2063 ui_out_field_fmt (uiout
, "signal2", "0x%s", phex_nz (signal2
, 4));
2064 ui_out_field_int (uiout
, "signal2_type", signal2_type
);
2068 if (signal1_pending
)
2069 printf_filtered (_("Signal 1 control word 0x%s "), phex (signal1
, 4));
2071 printf_filtered (_("Signal 1 not pending "));
2074 printf_filtered (_("(Type Or)\n"));
2076 printf_filtered (_("(Type Overwrite)\n"));
2078 if (signal2_pending
)
2079 printf_filtered (_("Signal 2 control word 0x%s "), phex (signal2
, 4));
2081 printf_filtered (_("Signal 2 not pending "));
2084 printf_filtered (_("(Type Or)\n"));
2086 printf_filtered (_("(Type Overwrite)\n"));
2089 do_cleanups (chain
);
2093 info_spu_mailbox_list (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
,
2094 const char *field
, const char *msg
)
2096 struct cleanup
*chain
;
2102 chain
= make_cleanup_ui_out_table_begin_end (uiout
, 1, nr
, "mbox");
2104 ui_out_table_header (uiout
, 32, ui_left
, field
, msg
);
2105 ui_out_table_body (uiout
);
2107 for (i
= 0; i
< nr
; i
++)
2109 struct cleanup
*val_chain
;
2111 val_chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "mbox");
2112 val
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
2113 ui_out_field_fmt (uiout
, field
, "0x%s", phex (val
, 4));
2114 do_cleanups (val_chain
);
2116 if (!ui_out_is_mi_like_p (uiout
))
2117 printf_filtered ("\n");
2120 do_cleanups (chain
);
2124 info_spu_mailbox_command (char *args
, int from_tty
)
2126 struct frame_info
*frame
= get_selected_frame (NULL
);
2127 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2128 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2129 struct cleanup
*chain
;
2135 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2136 error (_("\"info spu\" is only supported on the SPU architecture."));
2138 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2140 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoMailbox");
2142 xsnprintf (annex
, sizeof annex
, "%d/mbox_info", id
);
2143 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2144 buf
, 0, sizeof buf
);
2146 error (_("Could not read mbox_info."));
2148 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2149 "mbox", "SPU Outbound Mailbox");
2151 xsnprintf (annex
, sizeof annex
, "%d/ibox_info", id
);
2152 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2153 buf
, 0, sizeof buf
);
2155 error (_("Could not read ibox_info."));
2157 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2158 "ibox", "SPU Outbound Interrupt Mailbox");
2160 xsnprintf (annex
, sizeof annex
, "%d/wbox_info", id
);
2161 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2162 buf
, 0, sizeof buf
);
2164 error (_("Could not read wbox_info."));
2166 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2167 "wbox", "SPU Inbound Mailbox");
2169 do_cleanups (chain
);
2173 spu_mfc_get_bitfield (ULONGEST word
, int first
, int last
)
2175 ULONGEST mask
= ~(~(ULONGEST
)0 << (last
- first
+ 1));
2176 return (word
>> (63 - last
)) & mask
;
2180 info_spu_dma_cmdlist (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
)
2182 static char *spu_mfc_opcode
[256] =
2184 /* 00 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2185 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2186 /* 10 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2187 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2188 /* 20 */ "put", "putb", "putf", NULL
, "putl", "putlb", "putlf", NULL
,
2189 "puts", "putbs", "putfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2190 /* 30 */ "putr", "putrb", "putrf", NULL
, "putrl", "putrlb", "putrlf", NULL
,
2191 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2192 /* 40 */ "get", "getb", "getf", NULL
, "getl", "getlb", "getlf", NULL
,
2193 "gets", "getbs", "getfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2194 /* 50 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2195 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2196 /* 60 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2197 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2198 /* 70 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2199 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2200 /* 80 */ "sdcrt", "sdcrtst", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2201 NULL
, "sdcrz", NULL
, NULL
, NULL
, "sdcrst", NULL
, "sdcrf",
2202 /* 90 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2203 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2204 /* a0 */ "sndsig", "sndsigb", "sndsigf", NULL
, NULL
, NULL
, NULL
, NULL
,
2205 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2206 /* b0 */ "putlluc", NULL
, NULL
, NULL
, "putllc", NULL
, NULL
, NULL
,
2207 "putqlluc", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2208 /* c0 */ "barrier", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2209 "mfceieio", NULL
, NULL
, NULL
, "mfcsync", NULL
, NULL
, NULL
,
2210 /* d0 */ "getllar", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2211 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2212 /* e0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2213 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2214 /* f0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2215 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2218 int *seq
= alloca (nr
* sizeof (int));
2220 struct cleanup
*chain
;
2224 /* Determine sequence in which to display (valid) entries. */
2225 for (i
= 0; i
< nr
; i
++)
2227 /* Search for the first valid entry all of whose
2228 dependencies are met. */
2229 for (j
= 0; j
< nr
; j
++)
2231 ULONGEST mfc_cq_dw3
;
2232 ULONGEST dependencies
;
2234 if (done
& (1 << (nr
- 1 - j
)))
2238 = extract_unsigned_integer (buf
+ 32*j
+ 24,8, byte_order
);
2239 if (!spu_mfc_get_bitfield (mfc_cq_dw3
, 16, 16))
2242 dependencies
= spu_mfc_get_bitfield (mfc_cq_dw3
, 0, nr
- 1);
2243 if ((dependencies
& done
) != dependencies
)
2247 done
|= 1 << (nr
- 1 - j
);
2258 chain
= make_cleanup_ui_out_table_begin_end (uiout
, 10, nr
, "dma_cmd");
2260 ui_out_table_header (uiout
, 7, ui_left
, "opcode", "Opcode");
2261 ui_out_table_header (uiout
, 3, ui_left
, "tag", "Tag");
2262 ui_out_table_header (uiout
, 3, ui_left
, "tid", "TId");
2263 ui_out_table_header (uiout
, 3, ui_left
, "rid", "RId");
2264 ui_out_table_header (uiout
, 18, ui_left
, "ea", "EA");
2265 ui_out_table_header (uiout
, 7, ui_left
, "lsa", "LSA");
2266 ui_out_table_header (uiout
, 7, ui_left
, "size", "Size");
2267 ui_out_table_header (uiout
, 7, ui_left
, "lstaddr", "LstAddr");
2268 ui_out_table_header (uiout
, 7, ui_left
, "lstsize", "LstSize");
2269 ui_out_table_header (uiout
, 1, ui_left
, "error_p", "E");
2271 ui_out_table_body (uiout
);
2273 for (i
= 0; i
< nr
; i
++)
2275 struct cleanup
*cmd_chain
;
2276 ULONGEST mfc_cq_dw0
;
2277 ULONGEST mfc_cq_dw1
;
2278 ULONGEST mfc_cq_dw2
;
2279 int mfc_cmd_opcode
, mfc_cmd_tag
, rclass_id
, tclass_id
;
2280 int lsa
, size
, list_lsa
, list_size
, mfc_lsa
, mfc_size
;
2282 int list_valid_p
, noop_valid_p
, qw_valid_p
, ea_valid_p
, cmd_error_p
;
2284 /* Decode contents of MFC Command Queue Context Save/Restore Registers.
2285 See "Cell Broadband Engine Registers V1.3", section 3.3.2.1. */
2288 = extract_unsigned_integer (buf
+ 32*seq
[i
], 8, byte_order
);
2290 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 8, 8, byte_order
);
2292 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 16, 8, byte_order
);
2294 list_lsa
= spu_mfc_get_bitfield (mfc_cq_dw0
, 0, 14);
2295 list_size
= spu_mfc_get_bitfield (mfc_cq_dw0
, 15, 26);
2296 mfc_cmd_opcode
= spu_mfc_get_bitfield (mfc_cq_dw0
, 27, 34);
2297 mfc_cmd_tag
= spu_mfc_get_bitfield (mfc_cq_dw0
, 35, 39);
2298 list_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw0
, 40, 40);
2299 rclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 41, 43);
2300 tclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 44, 46);
2302 mfc_ea
= spu_mfc_get_bitfield (mfc_cq_dw1
, 0, 51) << 12
2303 | spu_mfc_get_bitfield (mfc_cq_dw2
, 25, 36);
2305 mfc_lsa
= spu_mfc_get_bitfield (mfc_cq_dw2
, 0, 13);
2306 mfc_size
= spu_mfc_get_bitfield (mfc_cq_dw2
, 14, 24);
2307 noop_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 37, 37);
2308 qw_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 38, 38);
2309 ea_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 39, 39);
2310 cmd_error_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 40, 40);
2312 cmd_chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "cmd");
2314 if (spu_mfc_opcode
[mfc_cmd_opcode
])
2315 ui_out_field_string (uiout
, "opcode", spu_mfc_opcode
[mfc_cmd_opcode
]);
2317 ui_out_field_int (uiout
, "opcode", mfc_cmd_opcode
);
2319 ui_out_field_int (uiout
, "tag", mfc_cmd_tag
);
2320 ui_out_field_int (uiout
, "tid", tclass_id
);
2321 ui_out_field_int (uiout
, "rid", rclass_id
);
2324 ui_out_field_fmt (uiout
, "ea", "0x%s", phex (mfc_ea
, 8));
2326 ui_out_field_skip (uiout
, "ea");
2328 ui_out_field_fmt (uiout
, "lsa", "0x%05x", mfc_lsa
<< 4);
2330 ui_out_field_fmt (uiout
, "size", "0x%05x", mfc_size
<< 4);
2332 ui_out_field_fmt (uiout
, "size", "0x%05x", mfc_size
);
2336 ui_out_field_fmt (uiout
, "lstaddr", "0x%05x", list_lsa
<< 3);
2337 ui_out_field_fmt (uiout
, "lstsize", "0x%05x", list_size
<< 3);
2341 ui_out_field_skip (uiout
, "lstaddr");
2342 ui_out_field_skip (uiout
, "lstsize");
2346 ui_out_field_string (uiout
, "error_p", "*");
2348 ui_out_field_skip (uiout
, "error_p");
2350 do_cleanups (cmd_chain
);
2352 if (!ui_out_is_mi_like_p (uiout
))
2353 printf_filtered ("\n");
2356 do_cleanups (chain
);
2360 info_spu_dma_command (char *args
, int from_tty
)
2362 struct frame_info
*frame
= get_selected_frame (NULL
);
2363 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2364 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2365 ULONGEST dma_info_type
;
2366 ULONGEST dma_info_mask
;
2367 ULONGEST dma_info_status
;
2368 ULONGEST dma_info_stall_and_notify
;
2369 ULONGEST dma_info_atomic_command_status
;
2370 struct cleanup
*chain
;
2376 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
2377 error (_("\"info spu\" is only supported on the SPU architecture."));
2379 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2381 xsnprintf (annex
, sizeof annex
, "%d/dma_info", id
);
2382 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2383 buf
, 0, 40 + 16 * 32);
2385 error (_("Could not read dma_info."));
2388 = extract_unsigned_integer (buf
, 8, byte_order
);
2390 = extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2392 = extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2393 dma_info_stall_and_notify
2394 = extract_unsigned_integer (buf
+ 24, 8, byte_order
);
2395 dma_info_atomic_command_status
2396 = extract_unsigned_integer (buf
+ 32, 8, byte_order
);
2398 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoDMA");
2400 if (ui_out_is_mi_like_p (uiout
))
2402 ui_out_field_fmt (uiout
, "dma_info_type", "0x%s",
2403 phex_nz (dma_info_type
, 4));
2404 ui_out_field_fmt (uiout
, "dma_info_mask", "0x%s",
2405 phex_nz (dma_info_mask
, 4));
2406 ui_out_field_fmt (uiout
, "dma_info_status", "0x%s",
2407 phex_nz (dma_info_status
, 4));
2408 ui_out_field_fmt (uiout
, "dma_info_stall_and_notify", "0x%s",
2409 phex_nz (dma_info_stall_and_notify
, 4));
2410 ui_out_field_fmt (uiout
, "dma_info_atomic_command_status", "0x%s",
2411 phex_nz (dma_info_atomic_command_status
, 4));
2415 const char *query_msg
= _("no query pending");
2417 if (dma_info_type
& 4)
2418 switch (dma_info_type
& 3)
2420 case 1: query_msg
= _("'any' query pending"); break;
2421 case 2: query_msg
= _("'all' query pending"); break;
2422 default: query_msg
= _("undefined query type"); break;
2425 printf_filtered (_("Tag-Group Status 0x%s\n"),
2426 phex (dma_info_status
, 4));
2427 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2428 phex (dma_info_mask
, 4), query_msg
);
2429 printf_filtered (_("Stall-and-Notify 0x%s\n"),
2430 phex (dma_info_stall_and_notify
, 4));
2431 printf_filtered (_("Atomic Cmd Status 0x%s\n"),
2432 phex (dma_info_atomic_command_status
, 4));
2433 printf_filtered ("\n");
2436 info_spu_dma_cmdlist (buf
+ 40, 16, byte_order
);
2437 do_cleanups (chain
);
2441 info_spu_proxydma_command (char *args
, int from_tty
)
2443 struct frame_info
*frame
= get_selected_frame (NULL
);
2444 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2445 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2446 ULONGEST dma_info_type
;
2447 ULONGEST dma_info_mask
;
2448 ULONGEST dma_info_status
;
2449 struct cleanup
*chain
;
2455 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2456 error (_("\"info spu\" is only supported on the SPU architecture."));
2458 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2460 xsnprintf (annex
, sizeof annex
, "%d/proxydma_info", id
);
2461 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2462 buf
, 0, 24 + 8 * 32);
2464 error (_("Could not read proxydma_info."));
2466 dma_info_type
= extract_unsigned_integer (buf
, 8, byte_order
);
2467 dma_info_mask
= extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2468 dma_info_status
= extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2470 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoProxyDMA");
2472 if (ui_out_is_mi_like_p (uiout
))
2474 ui_out_field_fmt (uiout
, "proxydma_info_type", "0x%s",
2475 phex_nz (dma_info_type
, 4));
2476 ui_out_field_fmt (uiout
, "proxydma_info_mask", "0x%s",
2477 phex_nz (dma_info_mask
, 4));
2478 ui_out_field_fmt (uiout
, "proxydma_info_status", "0x%s",
2479 phex_nz (dma_info_status
, 4));
2483 const char *query_msg
;
2485 switch (dma_info_type
& 3)
2487 case 0: query_msg
= _("no query pending"); break;
2488 case 1: query_msg
= _("'any' query pending"); break;
2489 case 2: query_msg
= _("'all' query pending"); break;
2490 default: query_msg
= _("undefined query type"); break;
2493 printf_filtered (_("Tag-Group Status 0x%s\n"),
2494 phex (dma_info_status
, 4));
2495 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2496 phex (dma_info_mask
, 4), query_msg
);
2497 printf_filtered ("\n");
2500 info_spu_dma_cmdlist (buf
+ 24, 8, byte_order
);
2501 do_cleanups (chain
);
2505 info_spu_command (char *args
, int from_tty
)
2507 printf_unfiltered (_("\"info spu\" must be followed by the name of an SPU facility.\n"));
2508 help_list (infospucmdlist
, "info spu ", -1, gdb_stdout
);
2512 /* Root of all "set spu "/"show spu " commands. */
2515 show_spu_command (char *args
, int from_tty
)
2517 help_list (showspucmdlist
, "show spu ", all_commands
, gdb_stdout
);
2521 set_spu_command (char *args
, int from_tty
)
2523 help_list (setspucmdlist
, "set spu ", all_commands
, gdb_stdout
);
2527 show_spu_stop_on_load (struct ui_file
*file
, int from_tty
,
2528 struct cmd_list_element
*c
, const char *value
)
2530 fprintf_filtered (file
, _("Stopping for new SPE threads is %s.\n"),
2535 show_spu_auto_flush_cache (struct ui_file
*file
, int from_tty
,
2536 struct cmd_list_element
*c
, const char *value
)
2538 fprintf_filtered (file
, _("Automatic software-cache flush is %s.\n"),
2543 /* Set up gdbarch struct. */
2545 static struct gdbarch
*
2546 spu_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2548 struct gdbarch
*gdbarch
;
2549 struct gdbarch_tdep
*tdep
;
2552 /* Which spufs ID was requested as address space? */
2554 id
= *(int *)info
.tdep_info
;
2555 /* For objfile architectures of SPU solibs, decode the ID from the name.
2556 This assumes the filename convention employed by solib-spu.c. */
2559 char *name
= strrchr (info
.abfd
->filename
, '@');
2561 sscanf (name
, "@0x%*x <%d>", &id
);
2564 /* Find a candidate among extant architectures. */
2565 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2567 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2569 tdep
= gdbarch_tdep (arches
->gdbarch
);
2570 if (tdep
&& tdep
->id
== id
)
2571 return arches
->gdbarch
;
2574 /* None found, so create a new architecture. */
2575 tdep
= XCALLOC (1, struct gdbarch_tdep
);
2577 gdbarch
= gdbarch_alloc (&info
, tdep
);
2580 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_spu
);
2583 set_gdbarch_num_regs (gdbarch
, SPU_NUM_REGS
);
2584 set_gdbarch_num_pseudo_regs (gdbarch
, SPU_NUM_PSEUDO_REGS
);
2585 set_gdbarch_sp_regnum (gdbarch
, SPU_SP_REGNUM
);
2586 set_gdbarch_pc_regnum (gdbarch
, SPU_PC_REGNUM
);
2587 set_gdbarch_read_pc (gdbarch
, spu_read_pc
);
2588 set_gdbarch_write_pc (gdbarch
, spu_write_pc
);
2589 set_gdbarch_register_name (gdbarch
, spu_register_name
);
2590 set_gdbarch_register_type (gdbarch
, spu_register_type
);
2591 set_gdbarch_pseudo_register_read (gdbarch
, spu_pseudo_register_read
);
2592 set_gdbarch_pseudo_register_write (gdbarch
, spu_pseudo_register_write
);
2593 set_gdbarch_value_from_register (gdbarch
, spu_value_from_register
);
2594 set_gdbarch_register_reggroup_p (gdbarch
, spu_register_reggroup_p
);
2597 set_gdbarch_char_signed (gdbarch
, 0);
2598 set_gdbarch_ptr_bit (gdbarch
, 32);
2599 set_gdbarch_addr_bit (gdbarch
, 32);
2600 set_gdbarch_short_bit (gdbarch
, 16);
2601 set_gdbarch_int_bit (gdbarch
, 32);
2602 set_gdbarch_long_bit (gdbarch
, 32);
2603 set_gdbarch_long_long_bit (gdbarch
, 64);
2604 set_gdbarch_float_bit (gdbarch
, 32);
2605 set_gdbarch_double_bit (gdbarch
, 64);
2606 set_gdbarch_long_double_bit (gdbarch
, 64);
2607 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
2608 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
2609 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
2611 /* Address handling. */
2612 set_gdbarch_address_to_pointer (gdbarch
, spu_address_to_pointer
);
2613 set_gdbarch_pointer_to_address (gdbarch
, spu_pointer_to_address
);
2614 set_gdbarch_integer_to_address (gdbarch
, spu_integer_to_address
);
2615 set_gdbarch_address_class_type_flags (gdbarch
, spu_address_class_type_flags
);
2616 set_gdbarch_address_class_type_flags_to_name
2617 (gdbarch
, spu_address_class_type_flags_to_name
);
2618 set_gdbarch_address_class_name_to_type_flags
2619 (gdbarch
, spu_address_class_name_to_type_flags
);
2622 /* Inferior function calls. */
2623 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
2624 set_gdbarch_frame_align (gdbarch
, spu_frame_align
);
2625 set_gdbarch_frame_red_zone_size (gdbarch
, 2000);
2626 set_gdbarch_push_dummy_code (gdbarch
, spu_push_dummy_code
);
2627 set_gdbarch_push_dummy_call (gdbarch
, spu_push_dummy_call
);
2628 set_gdbarch_dummy_id (gdbarch
, spu_dummy_id
);
2629 set_gdbarch_return_value (gdbarch
, spu_return_value
);
2631 /* Frame handling. */
2632 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2633 frame_unwind_append_unwinder (gdbarch
, &spu_frame_unwind
);
2634 frame_base_set_default (gdbarch
, &spu_frame_base
);
2635 set_gdbarch_unwind_pc (gdbarch
, spu_unwind_pc
);
2636 set_gdbarch_unwind_sp (gdbarch
, spu_unwind_sp
);
2637 set_gdbarch_virtual_frame_pointer (gdbarch
, spu_virtual_frame_pointer
);
2638 set_gdbarch_frame_args_skip (gdbarch
, 0);
2639 set_gdbarch_skip_prologue (gdbarch
, spu_skip_prologue
);
2640 set_gdbarch_in_function_epilogue_p (gdbarch
, spu_in_function_epilogue_p
);
2642 /* Cell/B.E. cross-architecture unwinder support. */
2643 frame_unwind_prepend_unwinder (gdbarch
, &spu2ppu_unwind
);
2646 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
2647 set_gdbarch_breakpoint_from_pc (gdbarch
, spu_breakpoint_from_pc
);
2648 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
2649 set_gdbarch_software_single_step (gdbarch
, spu_software_single_step
);
2650 set_gdbarch_get_longjmp_target (gdbarch
, spu_get_longjmp_target
);
2653 set_gdbarch_overlay_update (gdbarch
, spu_overlay_update
);
2658 /* Provide a prototype to silence -Wmissing-prototypes. */
2659 extern initialize_file_ftype _initialize_spu_tdep
;
2662 _initialize_spu_tdep (void)
2664 register_gdbarch_init (bfd_arch_spu
, spu_gdbarch_init
);
2666 /* Add ourselves to objfile event chain. */
2667 observer_attach_new_objfile (spu_overlay_new_objfile
);
2668 spu_overlay_data
= register_objfile_data ();
2670 /* Install spu stop-on-load handler. */
2671 observer_attach_new_objfile (spu_catch_start
);
2673 /* Add ourselves to normal_stop event chain. */
2674 observer_attach_normal_stop (spu_attach_normal_stop
);
2676 /* Add root prefix command for all "set spu"/"show spu" commands. */
2677 add_prefix_cmd ("spu", no_class
, set_spu_command
,
2678 _("Various SPU specific commands."),
2679 &setspucmdlist
, "set spu ", 0, &setlist
);
2680 add_prefix_cmd ("spu", no_class
, show_spu_command
,
2681 _("Various SPU specific commands."),
2682 &showspucmdlist
, "show spu ", 0, &showlist
);
2684 /* Toggle whether or not to add a temporary breakpoint at the "main"
2685 function of new SPE contexts. */
2686 add_setshow_boolean_cmd ("stop-on-load", class_support
,
2687 &spu_stop_on_load_p
, _("\
2688 Set whether to stop for new SPE threads."),
2690 Show whether to stop for new SPE threads."),
2692 Use \"on\" to give control to the user when a new SPE thread\n\
2693 enters its \"main\" function.\n\
2694 Use \"off\" to disable stopping for new SPE threads."),
2696 show_spu_stop_on_load
,
2697 &setspucmdlist
, &showspucmdlist
);
2699 /* Toggle whether or not to automatically flush the software-managed
2700 cache whenever SPE execution stops. */
2701 add_setshow_boolean_cmd ("auto-flush-cache", class_support
,
2702 &spu_auto_flush_cache_p
, _("\
2703 Set whether to automatically flush the software-managed cache."),
2705 Show whether to automatically flush the software-managed cache."),
2707 Use \"on\" to automatically flush the software-managed cache\n\
2708 whenever SPE execution stops.\n\
2709 Use \"off\" to never automatically flush the software-managed cache."),
2711 show_spu_auto_flush_cache
,
2712 &setspucmdlist
, &showspucmdlist
);
2714 /* Add root prefix command for all "info spu" commands. */
2715 add_prefix_cmd ("spu", class_info
, info_spu_command
,
2716 _("Various SPU specific commands."),
2717 &infospucmdlist
, "info spu ", 0, &infolist
);
2719 /* Add various "info spu" commands. */
2720 add_cmd ("event", class_info
, info_spu_event_command
,
2721 _("Display SPU event facility status.\n"),
2723 add_cmd ("signal", class_info
, info_spu_signal_command
,
2724 _("Display SPU signal notification facility status.\n"),
2726 add_cmd ("mailbox", class_info
, info_spu_mailbox_command
,
2727 _("Display SPU mailbox facility status.\n"),
2729 add_cmd ("dma", class_info
, info_spu_dma_command
,
2730 _("Display MFC DMA status.\n"),
2732 add_cmd ("proxydma", class_info
, info_spu_proxydma_command
,
2733 _("Display MFC Proxy-DMA status.\n"),