1 /* SPU target-dependent code for GDB, the GNU debugger.
2 Copyright (C) 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
4 Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
5 Based on a port by Sid Manning <sid@us.ibm.com>.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
30 #include "frame-unwind.h"
31 #include "frame-base.h"
32 #include "trad-frame.h"
41 #include "reggroups.h"
42 #include "floatformat.h"
50 /* The list of available "set spu " and "show spu " commands. */
51 static struct cmd_list_element
*setspucmdlist
= NULL
;
52 static struct cmd_list_element
*showspucmdlist
= NULL
;
54 /* Whether to stop for new SPE contexts. */
55 static int spu_stop_on_load_p
= 0;
56 /* Whether to automatically flush the SW-managed cache. */
57 static int spu_auto_flush_cache_p
= 1;
60 /* The tdep structure. */
63 /* The spufs ID identifying our address space. */
66 /* SPU-specific vector type. */
67 struct type
*spu_builtin_type_vec128
;
71 /* SPU-specific vector type. */
73 spu_builtin_type_vec128 (struct gdbarch
*gdbarch
)
75 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
77 if (!tdep
->spu_builtin_type_vec128
)
79 const struct builtin_type
*bt
= builtin_type (gdbarch
);
82 t
= arch_composite_type (gdbarch
,
83 "__spu_builtin_type_vec128", TYPE_CODE_UNION
);
84 append_composite_type_field (t
, "uint128", bt
->builtin_int128
);
85 append_composite_type_field (t
, "v2_int64",
86 init_vector_type (bt
->builtin_int64
, 2));
87 append_composite_type_field (t
, "v4_int32",
88 init_vector_type (bt
->builtin_int32
, 4));
89 append_composite_type_field (t
, "v8_int16",
90 init_vector_type (bt
->builtin_int16
, 8));
91 append_composite_type_field (t
, "v16_int8",
92 init_vector_type (bt
->builtin_int8
, 16));
93 append_composite_type_field (t
, "v2_double",
94 init_vector_type (bt
->builtin_double
, 2));
95 append_composite_type_field (t
, "v4_float",
96 init_vector_type (bt
->builtin_float
, 4));
99 TYPE_NAME (t
) = "spu_builtin_type_vec128";
101 tdep
->spu_builtin_type_vec128
= t
;
104 return tdep
->spu_builtin_type_vec128
;
108 /* The list of available "info spu " commands. */
109 static struct cmd_list_element
*infospucmdlist
= NULL
;
114 spu_register_name (struct gdbarch
*gdbarch
, int reg_nr
)
116 static char *register_names
[] =
118 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
119 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
120 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
121 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
122 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
123 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
124 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
125 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
126 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
127 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
128 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
129 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
130 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
131 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
132 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
133 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
134 "id", "pc", "sp", "fpscr", "srr0", "lslr", "decr", "decr_status"
139 if (reg_nr
>= sizeof register_names
/ sizeof *register_names
)
142 return register_names
[reg_nr
];
146 spu_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
148 if (reg_nr
< SPU_NUM_GPRS
)
149 return spu_builtin_type_vec128 (gdbarch
);
154 return builtin_type (gdbarch
)->builtin_uint32
;
157 return builtin_type (gdbarch
)->builtin_func_ptr
;
160 return builtin_type (gdbarch
)->builtin_data_ptr
;
162 case SPU_FPSCR_REGNUM
:
163 return builtin_type (gdbarch
)->builtin_uint128
;
165 case SPU_SRR0_REGNUM
:
166 return builtin_type (gdbarch
)->builtin_uint32
;
168 case SPU_LSLR_REGNUM
:
169 return builtin_type (gdbarch
)->builtin_uint32
;
171 case SPU_DECR_REGNUM
:
172 return builtin_type (gdbarch
)->builtin_uint32
;
174 case SPU_DECR_STATUS_REGNUM
:
175 return builtin_type (gdbarch
)->builtin_uint32
;
178 internal_error (__FILE__
, __LINE__
, "invalid regnum");
182 /* Pseudo registers for preferred slots - stack pointer. */
185 spu_pseudo_register_read_spu (struct regcache
*regcache
, const char *regname
,
188 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
189 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
194 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
195 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
196 memset (reg
, 0, sizeof reg
);
197 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
200 store_unsigned_integer (buf
, 4, byte_order
, strtoulst (reg
, NULL
, 16));
204 spu_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
205 int regnum
, gdb_byte
*buf
)
214 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
215 memcpy (buf
, reg
, 4);
218 case SPU_FPSCR_REGNUM
:
219 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
220 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
221 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
224 case SPU_SRR0_REGNUM
:
225 spu_pseudo_register_read_spu (regcache
, "srr0", buf
);
228 case SPU_LSLR_REGNUM
:
229 spu_pseudo_register_read_spu (regcache
, "lslr", buf
);
232 case SPU_DECR_REGNUM
:
233 spu_pseudo_register_read_spu (regcache
, "decr", buf
);
236 case SPU_DECR_STATUS_REGNUM
:
237 spu_pseudo_register_read_spu (regcache
, "decr_status", buf
);
241 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
246 spu_pseudo_register_write_spu (struct regcache
*regcache
, const char *regname
,
249 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
250 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
255 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
256 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
257 xsnprintf (reg
, sizeof reg
, "0x%s",
258 phex_nz (extract_unsigned_integer (buf
, 4, byte_order
), 4));
259 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
,
260 reg
, 0, strlen (reg
));
264 spu_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
265 int regnum
, const gdb_byte
*buf
)
274 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
275 memcpy (reg
, buf
, 4);
276 regcache_raw_write (regcache
, SPU_RAW_SP_REGNUM
, reg
);
279 case SPU_FPSCR_REGNUM
:
280 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
281 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
282 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
285 case SPU_SRR0_REGNUM
:
286 spu_pseudo_register_write_spu (regcache
, "srr0", buf
);
289 case SPU_LSLR_REGNUM
:
290 spu_pseudo_register_write_spu (regcache
, "lslr", buf
);
293 case SPU_DECR_REGNUM
:
294 spu_pseudo_register_write_spu (regcache
, "decr", buf
);
297 case SPU_DECR_STATUS_REGNUM
:
298 spu_pseudo_register_write_spu (regcache
, "decr_status", buf
);
302 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
306 /* Value conversion -- access scalar values at the preferred slot. */
308 static struct value
*
309 spu_value_from_register (struct type
*type
, int regnum
,
310 struct frame_info
*frame
)
312 struct value
*value
= default_value_from_register (type
, regnum
, frame
);
313 int len
= TYPE_LENGTH (type
);
315 if (regnum
< SPU_NUM_GPRS
&& len
< 16)
317 int preferred_slot
= len
< 4 ? 4 - len
: 0;
318 set_value_offset (value
, preferred_slot
);
324 /* Register groups. */
327 spu_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
328 struct reggroup
*group
)
330 /* Registers displayed via 'info regs'. */
331 if (group
== general_reggroup
)
334 /* Registers displayed via 'info float'. */
335 if (group
== float_reggroup
)
338 /* Registers that need to be saved/restored in order to
339 push or pop frames. */
340 if (group
== save_reggroup
|| group
== restore_reggroup
)
343 return default_register_reggroup_p (gdbarch
, regnum
, group
);
347 /* Address handling. */
350 spu_gdbarch_id (struct gdbarch
*gdbarch
)
352 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
355 /* The objfile architecture of a standalone SPU executable does not
356 provide an SPU ID. Retrieve it from the the objfile's relocated
357 address range in this special case. */
359 && symfile_objfile
&& symfile_objfile
->obfd
360 && bfd_get_arch (symfile_objfile
->obfd
) == bfd_arch_spu
361 && symfile_objfile
->sections
!= symfile_objfile
->sections_end
)
362 id
= SPUADDR_SPU (obj_section_addr (symfile_objfile
->sections
));
368 spu_address_class_type_flags (int byte_size
, int dwarf2_addr_class
)
370 if (dwarf2_addr_class
== 1)
371 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
377 spu_address_class_type_flags_to_name (struct gdbarch
*gdbarch
, int type_flags
)
379 if (type_flags
& TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
)
386 spu_address_class_name_to_type_flags (struct gdbarch
*gdbarch
,
387 const char *name
, int *type_flags_ptr
)
389 if (strcmp (name
, "__ea") == 0)
391 *type_flags_ptr
= TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
399 spu_address_to_pointer (struct gdbarch
*gdbarch
,
400 struct type
*type
, gdb_byte
*buf
, CORE_ADDR addr
)
402 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
403 store_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
,
404 SPUADDR_ADDR (addr
));
408 spu_pointer_to_address (struct gdbarch
*gdbarch
,
409 struct type
*type
, const gdb_byte
*buf
)
411 int id
= spu_gdbarch_id (gdbarch
);
412 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
414 = extract_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
);
416 /* Do not convert __ea pointers. */
417 if (TYPE_ADDRESS_CLASS_1 (type
))
420 return addr
? SPUADDR (id
, addr
) : 0;
424 spu_integer_to_address (struct gdbarch
*gdbarch
,
425 struct type
*type
, const gdb_byte
*buf
)
427 int id
= spu_gdbarch_id (gdbarch
);
428 ULONGEST addr
= unpack_long (type
, buf
);
430 return SPUADDR (id
, addr
);
434 /* Decoding SPU instructions. */
471 is_rr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
)
473 if ((insn
>> 21) == op
)
476 *ra
= (insn
>> 7) & 127;
477 *rb
= (insn
>> 14) & 127;
485 is_rrr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
, int *rc
)
487 if ((insn
>> 28) == op
)
489 *rt
= (insn
>> 21) & 127;
490 *ra
= (insn
>> 7) & 127;
491 *rb
= (insn
>> 14) & 127;
500 is_ri7 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i7
)
502 if ((insn
>> 21) == op
)
505 *ra
= (insn
>> 7) & 127;
506 *i7
= (((insn
>> 14) & 127) ^ 0x40) - 0x40;
514 is_ri10 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i10
)
516 if ((insn
>> 24) == op
)
519 *ra
= (insn
>> 7) & 127;
520 *i10
= (((insn
>> 14) & 0x3ff) ^ 0x200) - 0x200;
528 is_ri16 (unsigned int insn
, int op
, int *rt
, int *i16
)
530 if ((insn
>> 23) == op
)
533 *i16
= (((insn
>> 7) & 0xffff) ^ 0x8000) - 0x8000;
541 is_ri18 (unsigned int insn
, int op
, int *rt
, int *i18
)
543 if ((insn
>> 25) == op
)
546 *i18
= (((insn
>> 7) & 0x3ffff) ^ 0x20000) - 0x20000;
554 is_branch (unsigned int insn
, int *offset
, int *reg
)
558 if (is_ri16 (insn
, op_br
, &rt
, &i16
)
559 || is_ri16 (insn
, op_brsl
, &rt
, &i16
)
560 || is_ri16 (insn
, op_brnz
, &rt
, &i16
)
561 || is_ri16 (insn
, op_brz
, &rt
, &i16
)
562 || is_ri16 (insn
, op_brhnz
, &rt
, &i16
)
563 || is_ri16 (insn
, op_brhz
, &rt
, &i16
))
565 *reg
= SPU_PC_REGNUM
;
570 if (is_ri16 (insn
, op_bra
, &rt
, &i16
)
571 || is_ri16 (insn
, op_brasl
, &rt
, &i16
))
578 if (is_ri7 (insn
, op_bi
, &rt
, reg
, &i7
)
579 || is_ri7 (insn
, op_bisl
, &rt
, reg
, &i7
)
580 || is_ri7 (insn
, op_biz
, &rt
, reg
, &i7
)
581 || is_ri7 (insn
, op_binz
, &rt
, reg
, &i7
)
582 || is_ri7 (insn
, op_bihz
, &rt
, reg
, &i7
)
583 || is_ri7 (insn
, op_bihnz
, &rt
, reg
, &i7
))
593 /* Prolog parsing. */
595 struct spu_prologue_data
597 /* Stack frame size. -1 if analysis was unsuccessful. */
600 /* How to find the CFA. The CFA is equal to SP at function entry. */
604 /* Offset relative to CFA where a register is saved. -1 if invalid. */
605 int reg_offset
[SPU_NUM_GPRS
];
609 spu_analyze_prologue (struct gdbarch
*gdbarch
,
610 CORE_ADDR start_pc
, CORE_ADDR end_pc
,
611 struct spu_prologue_data
*data
)
613 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
618 int reg_immed
[SPU_NUM_GPRS
];
620 CORE_ADDR prolog_pc
= start_pc
;
625 /* Initialize DATA to default values. */
628 data
->cfa_reg
= SPU_RAW_SP_REGNUM
;
629 data
->cfa_offset
= 0;
631 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
632 data
->reg_offset
[i
] = -1;
634 /* Set up REG_IMMED array. This is non-zero for a register if we know its
635 preferred slot currently holds this immediate value. */
636 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
639 /* Scan instructions until the first branch.
641 The following instructions are important prolog components:
643 - The first instruction to set up the stack pointer.
644 - The first instruction to set up the frame pointer.
645 - The first instruction to save the link register.
646 - The first instruction to save the backchain.
648 We return the instruction after the latest of these four,
649 or the incoming PC if none is found. The first instruction
650 to set up the stack pointer also defines the frame size.
652 Note that instructions saving incoming arguments to their stack
653 slots are not counted as important, because they are hard to
654 identify with certainty. This should not matter much, because
655 arguments are relevant only in code compiled with debug data,
656 and in such code the GDB core will advance until the first source
657 line anyway, using SAL data.
659 For purposes of stack unwinding, we analyze the following types
660 of instructions in addition:
662 - Any instruction adding to the current frame pointer.
663 - Any instruction loading an immediate constant into a register.
664 - Any instruction storing a register onto the stack.
666 These are used to compute the CFA and REG_OFFSET output. */
668 for (pc
= start_pc
; pc
< end_pc
; pc
+= 4)
671 int rt
, ra
, rb
, rc
, immed
;
673 if (target_read_memory (pc
, buf
, 4))
675 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
677 /* AI is the typical instruction to set up a stack frame.
678 It is also used to initialize the frame pointer. */
679 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
))
681 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
682 data
->cfa_offset
-= immed
;
684 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
692 else if (rt
== SPU_FP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
698 data
->cfa_reg
= SPU_FP_REGNUM
;
699 data
->cfa_offset
-= immed
;
703 /* A is used to set up stack frames of size >= 512 bytes.
704 If we have tracked the contents of the addend register,
705 we can handle this as well. */
706 else if (is_rr (insn
, op_a
, &rt
, &ra
, &rb
))
708 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
710 if (reg_immed
[rb
] != 0)
711 data
->cfa_offset
-= reg_immed
[rb
];
713 data
->cfa_reg
= -1; /* We don't know the CFA any more. */
716 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
722 if (reg_immed
[rb
] != 0)
723 data
->size
= -reg_immed
[rb
];
727 /* We need to track IL and ILA used to load immediate constants
728 in case they are later used as input to an A instruction. */
729 else if (is_ri16 (insn
, op_il
, &rt
, &immed
))
731 reg_immed
[rt
] = immed
;
733 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
737 else if (is_ri18 (insn
, op_ila
, &rt
, &immed
))
739 reg_immed
[rt
] = immed
& 0x3ffff;
741 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
745 /* STQD is used to save registers to the stack. */
746 else if (is_ri10 (insn
, op_stqd
, &rt
, &ra
, &immed
))
748 if (ra
== data
->cfa_reg
)
749 data
->reg_offset
[rt
] = data
->cfa_offset
- (immed
<< 4);
751 if (ra
== data
->cfa_reg
&& rt
== SPU_LR_REGNUM
758 if (ra
== SPU_RAW_SP_REGNUM
759 && (found_sp
? immed
== 0 : rt
== SPU_RAW_SP_REGNUM
)
767 /* _start uses SELB to set up the stack pointer. */
768 else if (is_rrr (insn
, op_selb
, &rt
, &ra
, &rb
, &rc
))
770 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
774 /* We terminate if we find a branch. */
775 else if (is_branch (insn
, &immed
, &ra
))
780 /* If we successfully parsed until here, and didn't find any instruction
781 modifying SP, we assume we have a frameless function. */
785 /* Return cooked instead of raw SP. */
786 if (data
->cfa_reg
== SPU_RAW_SP_REGNUM
)
787 data
->cfa_reg
= SPU_SP_REGNUM
;
792 /* Return the first instruction after the prologue starting at PC. */
794 spu_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
796 struct spu_prologue_data data
;
797 return spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
800 /* Return the frame pointer in use at address PC. */
802 spu_virtual_frame_pointer (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
803 int *reg
, LONGEST
*offset
)
805 struct spu_prologue_data data
;
806 spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
808 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
810 /* The 'frame pointer' address is CFA minus frame size. */
812 *offset
= data
.cfa_offset
- data
.size
;
816 /* ??? We don't really know ... */
817 *reg
= SPU_SP_REGNUM
;
822 /* Return true if we are in the function's epilogue, i.e. after the
823 instruction that destroyed the function's stack frame.
825 1) scan forward from the point of execution:
826 a) If you find an instruction that modifies the stack pointer
827 or transfers control (except a return), execution is not in
829 b) Stop scanning if you find a return instruction or reach the
830 end of the function or reach the hard limit for the size of
832 2) scan backward from the point of execution:
833 a) If you find an instruction that modifies the stack pointer,
834 execution *is* in an epilogue, return.
835 b) Stop scanning if you reach an instruction that transfers
836 control or the beginning of the function or reach the hard
837 limit for the size of an epilogue. */
840 spu_in_function_epilogue_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
842 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
843 CORE_ADDR scan_pc
, func_start
, func_end
, epilogue_start
, epilogue_end
;
846 int rt
, ra
, rb
, rc
, immed
;
848 /* Find the search limits based on function boundaries and hard limit.
849 We assume the epilogue can be up to 64 instructions long. */
851 const int spu_max_epilogue_size
= 64 * 4;
853 if (!find_pc_partial_function (pc
, NULL
, &func_start
, &func_end
))
856 if (pc
- func_start
< spu_max_epilogue_size
)
857 epilogue_start
= func_start
;
859 epilogue_start
= pc
- spu_max_epilogue_size
;
861 if (func_end
- pc
< spu_max_epilogue_size
)
862 epilogue_end
= func_end
;
864 epilogue_end
= pc
+ spu_max_epilogue_size
;
866 /* Scan forward until next 'bi $0'. */
868 for (scan_pc
= pc
; scan_pc
< epilogue_end
; scan_pc
+= 4)
870 if (target_read_memory (scan_pc
, buf
, 4))
872 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
874 if (is_branch (insn
, &immed
, &ra
))
876 if (immed
== 0 && ra
== SPU_LR_REGNUM
)
882 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
883 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
884 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
886 if (rt
== SPU_RAW_SP_REGNUM
)
891 if (scan_pc
>= epilogue_end
)
894 /* Scan backward until adjustment to stack pointer (R1). */
896 for (scan_pc
= pc
- 4; scan_pc
>= epilogue_start
; scan_pc
-= 4)
898 if (target_read_memory (scan_pc
, buf
, 4))
900 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
902 if (is_branch (insn
, &immed
, &ra
))
905 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
906 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
907 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
909 if (rt
== SPU_RAW_SP_REGNUM
)
918 /* Normal stack frames. */
920 struct spu_unwind_cache
923 CORE_ADDR frame_base
;
924 CORE_ADDR local_base
;
926 struct trad_frame_saved_reg
*saved_regs
;
929 static struct spu_unwind_cache
*
930 spu_frame_unwind_cache (struct frame_info
*this_frame
,
931 void **this_prologue_cache
)
933 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
934 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
935 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
936 struct spu_unwind_cache
*info
;
937 struct spu_prologue_data data
;
938 CORE_ADDR id
= tdep
->id
;
941 if (*this_prologue_cache
)
942 return *this_prologue_cache
;
944 info
= FRAME_OBSTACK_ZALLOC (struct spu_unwind_cache
);
945 *this_prologue_cache
= info
;
946 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
947 info
->frame_base
= 0;
948 info
->local_base
= 0;
950 /* Find the start of the current function, and analyze its prologue. */
951 info
->func
= get_frame_func (this_frame
);
954 /* Fall back to using the current PC as frame ID. */
955 info
->func
= get_frame_pc (this_frame
);
959 spu_analyze_prologue (gdbarch
, info
->func
, get_frame_pc (this_frame
),
962 /* If successful, use prologue analysis data. */
963 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
968 /* Determine CFA via unwound CFA_REG plus CFA_OFFSET. */
969 get_frame_register (this_frame
, data
.cfa_reg
, buf
);
970 cfa
= extract_unsigned_integer (buf
, 4, byte_order
) + data
.cfa_offset
;
971 cfa
= SPUADDR (id
, cfa
);
973 /* Call-saved register slots. */
974 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
975 if (i
== SPU_LR_REGNUM
976 || (i
>= SPU_SAVED1_REGNUM
&& i
<= SPU_SAVEDN_REGNUM
))
977 if (data
.reg_offset
[i
] != -1)
978 info
->saved_regs
[i
].addr
= cfa
- data
.reg_offset
[i
];
981 info
->frame_base
= cfa
;
982 info
->local_base
= cfa
- data
.size
;
985 /* Otherwise, fall back to reading the backchain link. */
993 /* Get local store limit. */
994 lslr
= get_frame_register_unsigned (this_frame
, SPU_LSLR_REGNUM
);
996 lslr
= (ULONGEST
) -1;
998 /* Get the backchain. */
999 reg
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1000 status
= safe_read_memory_integer (SPUADDR (id
, reg
), 4, byte_order
,
1003 /* A zero backchain terminates the frame chain. Also, sanity
1004 check against the local store size limit. */
1005 if (status
&& backchain
> 0 && backchain
<= lslr
)
1007 /* Assume the link register is saved into its slot. */
1008 if (backchain
+ 16 <= lslr
)
1009 info
->saved_regs
[SPU_LR_REGNUM
].addr
= SPUADDR (id
, backchain
+ 16);
1012 info
->frame_base
= SPUADDR (id
, backchain
);
1013 info
->local_base
= SPUADDR (id
, reg
);
1017 /* If we didn't find a frame, we cannot determine SP / return address. */
1018 if (info
->frame_base
== 0)
1021 /* The previous SP is equal to the CFA. */
1022 trad_frame_set_value (info
->saved_regs
, SPU_SP_REGNUM
,
1023 SPUADDR_ADDR (info
->frame_base
));
1025 /* Read full contents of the unwound link register in order to
1026 be able to determine the return address. */
1027 if (trad_frame_addr_p (info
->saved_regs
, SPU_LR_REGNUM
))
1028 target_read_memory (info
->saved_regs
[SPU_LR_REGNUM
].addr
, buf
, 16);
1030 get_frame_register (this_frame
, SPU_LR_REGNUM
, buf
);
1032 /* Normally, the return address is contained in the slot 0 of the
1033 link register, and slots 1-3 are zero. For an overlay return,
1034 slot 0 contains the address of the overlay manager return stub,
1035 slot 1 contains the partition number of the overlay section to
1036 be returned to, and slot 2 contains the return address within
1037 that section. Return the latter address in that case. */
1038 if (extract_unsigned_integer (buf
+ 8, 4, byte_order
) != 0)
1039 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1040 extract_unsigned_integer (buf
+ 8, 4, byte_order
));
1042 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1043 extract_unsigned_integer (buf
, 4, byte_order
));
1049 spu_frame_this_id (struct frame_info
*this_frame
,
1050 void **this_prologue_cache
, struct frame_id
*this_id
)
1052 struct spu_unwind_cache
*info
=
1053 spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1055 if (info
->frame_base
== 0)
1058 *this_id
= frame_id_build (info
->frame_base
, info
->func
);
1061 static struct value
*
1062 spu_frame_prev_register (struct frame_info
*this_frame
,
1063 void **this_prologue_cache
, int regnum
)
1065 struct spu_unwind_cache
*info
1066 = spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1068 /* Special-case the stack pointer. */
1069 if (regnum
== SPU_RAW_SP_REGNUM
)
1070 regnum
= SPU_SP_REGNUM
;
1072 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
1075 static const struct frame_unwind spu_frame_unwind
= {
1078 spu_frame_prev_register
,
1080 default_frame_sniffer
1084 spu_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
1086 struct spu_unwind_cache
*info
1087 = spu_frame_unwind_cache (this_frame
, this_cache
);
1088 return info
->local_base
;
1091 static const struct frame_base spu_frame_base
= {
1093 spu_frame_base_address
,
1094 spu_frame_base_address
,
1095 spu_frame_base_address
1099 spu_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1101 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1102 CORE_ADDR pc
= frame_unwind_register_unsigned (next_frame
, SPU_PC_REGNUM
);
1103 /* Mask off interrupt enable bit. */
1104 return SPUADDR (tdep
->id
, pc
& -4);
1108 spu_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1110 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1111 CORE_ADDR sp
= frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
1112 return SPUADDR (tdep
->id
, sp
);
1116 spu_read_pc (struct regcache
*regcache
)
1118 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1120 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &pc
);
1121 /* Mask off interrupt enable bit. */
1122 return SPUADDR (tdep
->id
, pc
& -4);
1126 spu_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1128 /* Keep interrupt enabled state unchanged. */
1130 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &old_pc
);
1131 regcache_cooked_write_unsigned (regcache
, SPU_PC_REGNUM
,
1132 (SPUADDR_ADDR (pc
) & -4) | (old_pc
& 3));
1136 /* Cell/B.E. cross-architecture unwinder support. */
1138 struct spu2ppu_cache
1140 struct frame_id frame_id
;
1141 struct regcache
*regcache
;
1144 static struct gdbarch
*
1145 spu2ppu_prev_arch (struct frame_info
*this_frame
, void **this_cache
)
1147 struct spu2ppu_cache
*cache
= *this_cache
;
1148 return get_regcache_arch (cache
->regcache
);
1152 spu2ppu_this_id (struct frame_info
*this_frame
,
1153 void **this_cache
, struct frame_id
*this_id
)
1155 struct spu2ppu_cache
*cache
= *this_cache
;
1156 *this_id
= cache
->frame_id
;
1159 static struct value
*
1160 spu2ppu_prev_register (struct frame_info
*this_frame
,
1161 void **this_cache
, int regnum
)
1163 struct spu2ppu_cache
*cache
= *this_cache
;
1164 struct gdbarch
*gdbarch
= get_regcache_arch (cache
->regcache
);
1167 buf
= alloca (register_size (gdbarch
, regnum
));
1168 regcache_cooked_read (cache
->regcache
, regnum
, buf
);
1169 return frame_unwind_got_bytes (this_frame
, regnum
, buf
);
1173 spu2ppu_sniffer (const struct frame_unwind
*self
,
1174 struct frame_info
*this_frame
, void **this_prologue_cache
)
1176 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1177 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1178 CORE_ADDR base
, func
, backchain
;
1181 if (gdbarch_bfd_arch_info (target_gdbarch
)->arch
== bfd_arch_spu
)
1184 base
= get_frame_sp (this_frame
);
1185 func
= get_frame_pc (this_frame
);
1186 if (target_read_memory (base
, buf
, 4))
1188 backchain
= extract_unsigned_integer (buf
, 4, byte_order
);
1192 struct frame_info
*fi
;
1194 struct spu2ppu_cache
*cache
1195 = FRAME_OBSTACK_CALLOC (1, struct spu2ppu_cache
);
1197 cache
->frame_id
= frame_id_build (base
+ 16, func
);
1199 for (fi
= get_next_frame (this_frame
); fi
; fi
= get_next_frame (fi
))
1200 if (gdbarch_bfd_arch_info (get_frame_arch (fi
))->arch
!= bfd_arch_spu
)
1205 cache
->regcache
= frame_save_as_regcache (fi
);
1206 *this_prologue_cache
= cache
;
1211 struct regcache
*regcache
;
1212 regcache
= get_thread_arch_regcache (inferior_ptid
, target_gdbarch
);
1213 cache
->regcache
= regcache_dup (regcache
);
1214 *this_prologue_cache
= cache
;
1223 spu2ppu_dealloc_cache (struct frame_info
*self
, void *this_cache
)
1225 struct spu2ppu_cache
*cache
= this_cache
;
1226 regcache_xfree (cache
->regcache
);
1229 static const struct frame_unwind spu2ppu_unwind
= {
1232 spu2ppu_prev_register
,
1235 spu2ppu_dealloc_cache
,
1240 /* Function calling convention. */
1243 spu_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1249 spu_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
1250 struct value
**args
, int nargs
, struct type
*value_type
,
1251 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
1252 struct regcache
*regcache
)
1254 /* Allocate space sufficient for a breakpoint, keeping the stack aligned. */
1255 sp
= (sp
- 4) & ~15;
1256 /* Store the address of that breakpoint */
1258 /* The call starts at the callee's entry point. */
1265 spu_scalar_value_p (struct type
*type
)
1267 switch (TYPE_CODE (type
))
1270 case TYPE_CODE_ENUM
:
1271 case TYPE_CODE_RANGE
:
1272 case TYPE_CODE_CHAR
:
1273 case TYPE_CODE_BOOL
:
1276 return TYPE_LENGTH (type
) <= 16;
1284 spu_value_to_regcache (struct regcache
*regcache
, int regnum
,
1285 struct type
*type
, const gdb_byte
*in
)
1287 int len
= TYPE_LENGTH (type
);
1289 if (spu_scalar_value_p (type
))
1291 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1292 regcache_cooked_write_part (regcache
, regnum
, preferred_slot
, len
, in
);
1298 regcache_cooked_write (regcache
, regnum
++, in
);
1304 regcache_cooked_write_part (regcache
, regnum
, 0, len
, in
);
1309 spu_regcache_to_value (struct regcache
*regcache
, int regnum
,
1310 struct type
*type
, gdb_byte
*out
)
1312 int len
= TYPE_LENGTH (type
);
1314 if (spu_scalar_value_p (type
))
1316 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1317 regcache_cooked_read_part (regcache
, regnum
, preferred_slot
, len
, out
);
1323 regcache_cooked_read (regcache
, regnum
++, out
);
1329 regcache_cooked_read_part (regcache
, regnum
, 0, len
, out
);
1334 spu_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1335 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1336 int nargs
, struct value
**args
, CORE_ADDR sp
,
1337 int struct_return
, CORE_ADDR struct_addr
)
1339 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1342 int regnum
= SPU_ARG1_REGNUM
;
1346 /* Set the return address. */
1347 memset (buf
, 0, sizeof buf
);
1348 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (bp_addr
));
1349 regcache_cooked_write (regcache
, SPU_LR_REGNUM
, buf
);
1351 /* If STRUCT_RETURN is true, then the struct return address (in
1352 STRUCT_ADDR) will consume the first argument-passing register.
1353 Both adjust the register count and store that value. */
1356 memset (buf
, 0, sizeof buf
);
1357 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (struct_addr
));
1358 regcache_cooked_write (regcache
, regnum
++, buf
);
1361 /* Fill in argument registers. */
1362 for (i
= 0; i
< nargs
; i
++)
1364 struct value
*arg
= args
[i
];
1365 struct type
*type
= check_typedef (value_type (arg
));
1366 const gdb_byte
*contents
= value_contents (arg
);
1367 int len
= TYPE_LENGTH (type
);
1368 int n_regs
= align_up (len
, 16) / 16;
1370 /* If the argument doesn't wholly fit into registers, it and
1371 all subsequent arguments go to the stack. */
1372 if (regnum
+ n_regs
- 1 > SPU_ARGN_REGNUM
)
1378 spu_value_to_regcache (regcache
, regnum
, type
, contents
);
1382 /* Overflow arguments go to the stack. */
1383 if (stack_arg
!= -1)
1387 /* Allocate all required stack size. */
1388 for (i
= stack_arg
; i
< nargs
; i
++)
1390 struct type
*type
= check_typedef (value_type (args
[i
]));
1391 sp
-= align_up (TYPE_LENGTH (type
), 16);
1394 /* Fill in stack arguments. */
1396 for (i
= stack_arg
; i
< nargs
; i
++)
1398 struct value
*arg
= args
[i
];
1399 struct type
*type
= check_typedef (value_type (arg
));
1400 int len
= TYPE_LENGTH (type
);
1403 if (spu_scalar_value_p (type
))
1404 preferred_slot
= len
< 4 ? 4 - len
: 0;
1408 target_write_memory (ap
+ preferred_slot
, value_contents (arg
), len
);
1409 ap
+= align_up (TYPE_LENGTH (type
), 16);
1413 /* Allocate stack frame header. */
1416 /* Store stack back chain. */
1417 regcache_cooked_read (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1418 target_write_memory (sp
, buf
, 16);
1420 /* Finally, update all slots of the SP register. */
1421 sp_delta
= sp
- extract_unsigned_integer (buf
, 4, byte_order
);
1422 for (i
= 0; i
< 4; i
++)
1424 CORE_ADDR sp_slot
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
1425 store_unsigned_integer (buf
+ 4*i
, 4, byte_order
, sp_slot
+ sp_delta
);
1427 regcache_cooked_write (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1432 static struct frame_id
1433 spu_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1435 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1436 CORE_ADDR pc
= get_frame_register_unsigned (this_frame
, SPU_PC_REGNUM
);
1437 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1438 return frame_id_build (SPUADDR (tdep
->id
, sp
), SPUADDR (tdep
->id
, pc
& -4));
1441 /* Function return value access. */
1443 static enum return_value_convention
1444 spu_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
1445 struct type
*type
, struct regcache
*regcache
,
1446 gdb_byte
*out
, const gdb_byte
*in
)
1448 enum return_value_convention rvc
;
1450 if (TYPE_LENGTH (type
) <= (SPU_ARGN_REGNUM
- SPU_ARG1_REGNUM
+ 1) * 16)
1451 rvc
= RETURN_VALUE_REGISTER_CONVENTION
;
1453 rvc
= RETURN_VALUE_STRUCT_CONVENTION
;
1459 case RETURN_VALUE_REGISTER_CONVENTION
:
1460 spu_value_to_regcache (regcache
, SPU_ARG1_REGNUM
, type
, in
);
1463 case RETURN_VALUE_STRUCT_CONVENTION
:
1464 error ("Cannot set function return value.");
1472 case RETURN_VALUE_REGISTER_CONVENTION
:
1473 spu_regcache_to_value (regcache
, SPU_ARG1_REGNUM
, type
, out
);
1476 case RETURN_VALUE_STRUCT_CONVENTION
:
1477 error ("Function return value unknown.");
1488 static const gdb_byte
*
1489 spu_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
* pcptr
, int *lenptr
)
1491 static const gdb_byte breakpoint
[] = { 0x00, 0x00, 0x3f, 0xff };
1493 *lenptr
= sizeof breakpoint
;
1498 /* Software single-stepping support. */
1501 spu_software_single_step (struct frame_info
*frame
)
1503 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1504 struct address_space
*aspace
= get_frame_address_space (frame
);
1505 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1506 CORE_ADDR pc
, next_pc
;
1512 pc
= get_frame_pc (frame
);
1514 if (target_read_memory (pc
, buf
, 4))
1516 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
1518 /* Get local store limit. */
1519 lslr
= get_frame_register_unsigned (frame
, SPU_LSLR_REGNUM
);
1521 lslr
= (ULONGEST
) -1;
1523 /* Next sequential instruction is at PC + 4, except if the current
1524 instruction is a PPE-assisted call, in which case it is at PC + 8.
1525 Wrap around LS limit to be on the safe side. */
1526 if ((insn
& 0xffffff00) == 0x00002100)
1527 next_pc
= (SPUADDR_ADDR (pc
) + 8) & lslr
;
1529 next_pc
= (SPUADDR_ADDR (pc
) + 4) & lslr
;
1531 insert_single_step_breakpoint (gdbarch
,
1532 aspace
, SPUADDR (SPUADDR_SPU (pc
), next_pc
));
1534 if (is_branch (insn
, &offset
, ®
))
1536 CORE_ADDR target
= offset
;
1538 if (reg
== SPU_PC_REGNUM
)
1539 target
+= SPUADDR_ADDR (pc
);
1542 get_frame_register_bytes (frame
, reg
, 0, 4, buf
);
1543 target
+= extract_unsigned_integer (buf
, 4, byte_order
) & -4;
1546 target
= target
& lslr
;
1547 if (target
!= next_pc
)
1548 insert_single_step_breakpoint (gdbarch
, aspace
,
1549 SPUADDR (SPUADDR_SPU (pc
), target
));
1556 /* Longjmp support. */
1559 spu_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
1561 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1562 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1563 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1567 /* Jump buffer is pointed to by the argument register $r3. */
1568 get_frame_register_bytes (frame
, SPU_ARG1_REGNUM
, 0, 4, buf
);
1569 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
1570 if (target_read_memory (SPUADDR (tdep
->id
, jb_addr
), buf
, 4))
1573 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
1574 *pc
= SPUADDR (tdep
->id
, *pc
);
1581 struct spu_dis_asm_data
1583 struct gdbarch
*gdbarch
;
1588 spu_dis_asm_print_address (bfd_vma addr
, struct disassemble_info
*info
)
1590 struct spu_dis_asm_data
*data
= info
->application_data
;
1591 print_address (data
->gdbarch
, SPUADDR (data
->id
, addr
), info
->stream
);
1595 gdb_print_insn_spu (bfd_vma memaddr
, struct disassemble_info
*info
)
1597 /* The opcodes disassembler does 18-bit address arithmetic. Make sure the
1598 SPU ID encoded in the high bits is added back when we call print_address. */
1599 struct disassemble_info spu_info
= *info
;
1600 struct spu_dis_asm_data data
;
1601 data
.gdbarch
= info
->application_data
;
1602 data
.id
= SPUADDR_SPU (memaddr
);
1604 spu_info
.application_data
= &data
;
1605 spu_info
.print_address_func
= spu_dis_asm_print_address
;
1606 return print_insn_spu (memaddr
, &spu_info
);
1610 /* Target overlays for the SPU overlay manager.
1612 See the documentation of simple_overlay_update for how the
1613 interface is supposed to work.
1615 Data structures used by the overlay manager:
1623 } _ovly_table[]; -- one entry per overlay section
1625 struct ovly_buf_table
1628 } _ovly_buf_table[]; -- one entry per overlay buffer
1630 _ovly_table should never change.
1632 Both tables are aligned to a 16-byte boundary, the symbols _ovly_table
1633 and _ovly_buf_table are of type STT_OBJECT and their size set to the size
1634 of the respective array. buf in _ovly_table is an index into _ovly_buf_table.
1636 mapped is an index into _ovly_table. Both the mapped and buf indices start
1637 from one to reference the first entry in their respective tables. */
1639 /* Using the per-objfile private data mechanism, we store for each
1640 objfile an array of "struct spu_overlay_table" structures, one
1641 for each obj_section of the objfile. This structure holds two
1642 fields, MAPPED_PTR and MAPPED_VAL. If MAPPED_PTR is zero, this
1643 is *not* an overlay section. If it is non-zero, it represents
1644 a target address. The overlay section is mapped iff the target
1645 integer at this location equals MAPPED_VAL. */
1647 static const struct objfile_data
*spu_overlay_data
;
1649 struct spu_overlay_table
1651 CORE_ADDR mapped_ptr
;
1652 CORE_ADDR mapped_val
;
1655 /* Retrieve the overlay table for OBJFILE. If not already cached, read
1656 the _ovly_table data structure from the target and initialize the
1657 spu_overlay_table data structure from it. */
1658 static struct spu_overlay_table
*
1659 spu_get_overlay_table (struct objfile
*objfile
)
1661 enum bfd_endian byte_order
= bfd_big_endian (objfile
->obfd
)?
1662 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1663 struct minimal_symbol
*ovly_table_msym
, *ovly_buf_table_msym
;
1664 CORE_ADDR ovly_table_base
, ovly_buf_table_base
;
1665 unsigned ovly_table_size
, ovly_buf_table_size
;
1666 struct spu_overlay_table
*tbl
;
1667 struct obj_section
*osect
;
1671 tbl
= objfile_data (objfile
, spu_overlay_data
);
1675 ovly_table_msym
= lookup_minimal_symbol ("_ovly_table", NULL
, objfile
);
1676 if (!ovly_table_msym
)
1679 ovly_buf_table_msym
= lookup_minimal_symbol ("_ovly_buf_table", NULL
, objfile
);
1680 if (!ovly_buf_table_msym
)
1683 ovly_table_base
= SYMBOL_VALUE_ADDRESS (ovly_table_msym
);
1684 ovly_table_size
= MSYMBOL_SIZE (ovly_table_msym
);
1686 ovly_buf_table_base
= SYMBOL_VALUE_ADDRESS (ovly_buf_table_msym
);
1687 ovly_buf_table_size
= MSYMBOL_SIZE (ovly_buf_table_msym
);
1689 ovly_table
= xmalloc (ovly_table_size
);
1690 read_memory (ovly_table_base
, ovly_table
, ovly_table_size
);
1692 tbl
= OBSTACK_CALLOC (&objfile
->objfile_obstack
,
1693 objfile
->sections_end
- objfile
->sections
,
1694 struct spu_overlay_table
);
1696 for (i
= 0; i
< ovly_table_size
/ 16; i
++)
1698 CORE_ADDR vma
= extract_unsigned_integer (ovly_table
+ 16*i
+ 0,
1700 CORE_ADDR size
= extract_unsigned_integer (ovly_table
+ 16*i
+ 4,
1702 CORE_ADDR pos
= extract_unsigned_integer (ovly_table
+ 16*i
+ 8,
1704 CORE_ADDR buf
= extract_unsigned_integer (ovly_table
+ 16*i
+ 12,
1707 if (buf
== 0 || (buf
- 1) * 4 >= ovly_buf_table_size
)
1710 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1711 if (vma
== bfd_section_vma (objfile
->obfd
, osect
->the_bfd_section
)
1712 && pos
== osect
->the_bfd_section
->filepos
)
1714 int ndx
= osect
- objfile
->sections
;
1715 tbl
[ndx
].mapped_ptr
= ovly_buf_table_base
+ (buf
- 1) * 4;
1716 tbl
[ndx
].mapped_val
= i
+ 1;
1722 set_objfile_data (objfile
, spu_overlay_data
, tbl
);
1726 /* Read _ovly_buf_table entry from the target to dermine whether
1727 OSECT is currently mapped, and update the mapped state. */
1729 spu_overlay_update_osect (struct obj_section
*osect
)
1731 enum bfd_endian byte_order
= bfd_big_endian (osect
->objfile
->obfd
)?
1732 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1733 struct spu_overlay_table
*ovly_table
;
1736 ovly_table
= spu_get_overlay_table (osect
->objfile
);
1740 ovly_table
+= osect
- osect
->objfile
->sections
;
1741 if (ovly_table
->mapped_ptr
== 0)
1744 id
= SPUADDR_SPU (obj_section_addr (osect
));
1745 val
= read_memory_unsigned_integer (SPUADDR (id
, ovly_table
->mapped_ptr
),
1747 osect
->ovly_mapped
= (val
== ovly_table
->mapped_val
);
1750 /* If OSECT is NULL, then update all sections' mapped state.
1751 If OSECT is non-NULL, then update only OSECT's mapped state. */
1753 spu_overlay_update (struct obj_section
*osect
)
1755 /* Just one section. */
1757 spu_overlay_update_osect (osect
);
1762 struct objfile
*objfile
;
1764 ALL_OBJSECTIONS (objfile
, osect
)
1765 if (section_is_overlay (osect
))
1766 spu_overlay_update_osect (osect
);
1770 /* Whenever a new objfile is loaded, read the target's _ovly_table.
1771 If there is one, go through all sections and make sure for non-
1772 overlay sections LMA equals VMA, while for overlay sections LMA
1773 is larger than SPU_OVERLAY_LMA. */
1775 spu_overlay_new_objfile (struct objfile
*objfile
)
1777 struct spu_overlay_table
*ovly_table
;
1778 struct obj_section
*osect
;
1780 /* If we've already touched this file, do nothing. */
1781 if (!objfile
|| objfile_data (objfile
, spu_overlay_data
) != NULL
)
1784 /* Consider only SPU objfiles. */
1785 if (bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1788 /* Check if this objfile has overlays. */
1789 ovly_table
= spu_get_overlay_table (objfile
);
1793 /* Now go and fiddle with all the LMAs. */
1794 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1796 bfd
*obfd
= objfile
->obfd
;
1797 asection
*bsect
= osect
->the_bfd_section
;
1798 int ndx
= osect
- objfile
->sections
;
1800 if (ovly_table
[ndx
].mapped_ptr
== 0)
1801 bfd_section_lma (obfd
, bsect
) = bfd_section_vma (obfd
, bsect
);
1803 bfd_section_lma (obfd
, bsect
) = SPU_OVERLAY_LMA
+ bsect
->filepos
;
1808 /* Insert temporary breakpoint on "main" function of newly loaded
1809 SPE context OBJFILE. */
1811 spu_catch_start (struct objfile
*objfile
)
1813 struct minimal_symbol
*minsym
;
1814 struct symtab
*symtab
;
1818 /* Do this only if requested by "set spu stop-on-load on". */
1819 if (!spu_stop_on_load_p
)
1822 /* Consider only SPU objfiles. */
1823 if (!objfile
|| bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1826 /* The main objfile is handled differently. */
1827 if (objfile
== symfile_objfile
)
1830 /* There can be multiple symbols named "main". Search for the
1831 "main" in *this* objfile. */
1832 minsym
= lookup_minimal_symbol ("main", NULL
, objfile
);
1836 /* If we have debugging information, try to use it -- this
1837 will allow us to properly skip the prologue. */
1838 pc
= SYMBOL_VALUE_ADDRESS (minsym
);
1839 symtab
= find_pc_sect_symtab (pc
, SYMBOL_OBJ_SECTION (minsym
));
1842 struct blockvector
*bv
= BLOCKVECTOR (symtab
);
1843 struct block
*block
= BLOCKVECTOR_BLOCK (bv
, GLOBAL_BLOCK
);
1845 struct symtab_and_line sal
;
1847 sym
= lookup_block_symbol (block
, "main", VAR_DOMAIN
);
1850 fixup_symbol_section (sym
, objfile
);
1851 sal
= find_function_start_sal (sym
, 1);
1856 /* Use a numerical address for the set_breakpoint command to avoid having
1857 the breakpoint re-set incorrectly. */
1858 xsnprintf (buf
, sizeof buf
, "*%s", core_addr_to_string (pc
));
1859 create_breakpoint (get_objfile_arch (objfile
), buf
/* arg */,
1860 NULL
/* cond_string */, -1 /* thread */,
1861 0 /* parse_condition_and_thread */, 1 /* tempflag */,
1862 0 /* hardwareflag */, 0 /* traceflag */,
1863 0 /* ignore_count */,
1864 AUTO_BOOLEAN_FALSE
/* pending_break_support */,
1865 NULL
/* ops */, 0 /* from_tty */, 1 /* enabled */);
1869 /* Look up OBJFILE loaded into FRAME's SPU context. */
1870 static struct objfile
*
1871 spu_objfile_from_frame (struct frame_info
*frame
)
1873 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1874 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1875 struct objfile
*obj
;
1877 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
1882 if (obj
->sections
!= obj
->sections_end
1883 && SPUADDR_SPU (obj_section_addr (obj
->sections
)) == tdep
->id
)
1890 /* Flush cache for ea pointer access if available. */
1892 flush_ea_cache (void)
1894 struct minimal_symbol
*msymbol
;
1895 struct objfile
*obj
;
1897 if (!has_stack_frames ())
1900 obj
= spu_objfile_from_frame (get_current_frame ());
1904 /* Lookup inferior function __cache_flush. */
1905 msymbol
= lookup_minimal_symbol ("__cache_flush", NULL
, obj
);
1906 if (msymbol
!= NULL
)
1911 type
= objfile_type (obj
)->builtin_void
;
1912 type
= lookup_function_type (type
);
1913 type
= lookup_pointer_type (type
);
1914 addr
= SYMBOL_VALUE_ADDRESS (msymbol
);
1916 call_function_by_hand (value_from_pointer (type
, addr
), 0, NULL
);
1920 /* This handler is called when the inferior has stopped. If it is stopped in
1921 SPU architecture then flush the ea cache if used. */
1923 spu_attach_normal_stop (struct bpstats
*bs
, int print_frame
)
1925 if (!spu_auto_flush_cache_p
)
1928 /* Temporarily reset spu_auto_flush_cache_p to avoid recursively
1929 re-entering this function when __cache_flush stops. */
1930 spu_auto_flush_cache_p
= 0;
1932 spu_auto_flush_cache_p
= 1;
1936 /* "info spu" commands. */
1939 info_spu_event_command (char *args
, int from_tty
)
1941 struct frame_info
*frame
= get_selected_frame (NULL
);
1942 ULONGEST event_status
= 0;
1943 ULONGEST event_mask
= 0;
1944 struct cleanup
*chain
;
1950 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
1951 error (_("\"info spu\" is only supported on the SPU architecture."));
1953 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
1955 xsnprintf (annex
, sizeof annex
, "%d/event_status", id
);
1956 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1957 buf
, 0, (sizeof (buf
) - 1));
1959 error (_("Could not read event_status."));
1961 event_status
= strtoulst (buf
, NULL
, 16);
1963 xsnprintf (annex
, sizeof annex
, "%d/event_mask", id
);
1964 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1965 buf
, 0, (sizeof (buf
) - 1));
1967 error (_("Could not read event_mask."));
1969 event_mask
= strtoulst (buf
, NULL
, 16);
1971 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoEvent");
1973 if (ui_out_is_mi_like_p (uiout
))
1975 ui_out_field_fmt (uiout
, "event_status",
1976 "0x%s", phex_nz (event_status
, 4));
1977 ui_out_field_fmt (uiout
, "event_mask",
1978 "0x%s", phex_nz (event_mask
, 4));
1982 printf_filtered (_("Event Status 0x%s\n"), phex (event_status
, 4));
1983 printf_filtered (_("Event Mask 0x%s\n"), phex (event_mask
, 4));
1986 do_cleanups (chain
);
1990 info_spu_signal_command (char *args
, int from_tty
)
1992 struct frame_info
*frame
= get_selected_frame (NULL
);
1993 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1994 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1995 ULONGEST signal1
= 0;
1996 ULONGEST signal1_type
= 0;
1997 int signal1_pending
= 0;
1998 ULONGEST signal2
= 0;
1999 ULONGEST signal2_type
= 0;
2000 int signal2_pending
= 0;
2001 struct cleanup
*chain
;
2007 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2008 error (_("\"info spu\" is only supported on the SPU architecture."));
2010 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2012 xsnprintf (annex
, sizeof annex
, "%d/signal1", id
);
2013 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2015 error (_("Could not read signal1."));
2018 signal1
= extract_unsigned_integer (buf
, 4, byte_order
);
2019 signal1_pending
= 1;
2022 xsnprintf (annex
, sizeof annex
, "%d/signal1_type", id
);
2023 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2024 buf
, 0, (sizeof (buf
) - 1));
2026 error (_("Could not read signal1_type."));
2028 signal1_type
= strtoulst (buf
, NULL
, 16);
2030 xsnprintf (annex
, sizeof annex
, "%d/signal2", id
);
2031 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2033 error (_("Could not read signal2."));
2036 signal2
= extract_unsigned_integer (buf
, 4, byte_order
);
2037 signal2_pending
= 1;
2040 xsnprintf (annex
, sizeof annex
, "%d/signal2_type", id
);
2041 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2042 buf
, 0, (sizeof (buf
) - 1));
2044 error (_("Could not read signal2_type."));
2046 signal2_type
= strtoulst (buf
, NULL
, 16);
2048 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoSignal");
2050 if (ui_out_is_mi_like_p (uiout
))
2052 ui_out_field_int (uiout
, "signal1_pending", signal1_pending
);
2053 ui_out_field_fmt (uiout
, "signal1", "0x%s", phex_nz (signal1
, 4));
2054 ui_out_field_int (uiout
, "signal1_type", signal1_type
);
2055 ui_out_field_int (uiout
, "signal2_pending", signal2_pending
);
2056 ui_out_field_fmt (uiout
, "signal2", "0x%s", phex_nz (signal2
, 4));
2057 ui_out_field_int (uiout
, "signal2_type", signal2_type
);
2061 if (signal1_pending
)
2062 printf_filtered (_("Signal 1 control word 0x%s "), phex (signal1
, 4));
2064 printf_filtered (_("Signal 1 not pending "));
2067 printf_filtered (_("(Type Or)\n"));
2069 printf_filtered (_("(Type Overwrite)\n"));
2071 if (signal2_pending
)
2072 printf_filtered (_("Signal 2 control word 0x%s "), phex (signal2
, 4));
2074 printf_filtered (_("Signal 2 not pending "));
2077 printf_filtered (_("(Type Or)\n"));
2079 printf_filtered (_("(Type Overwrite)\n"));
2082 do_cleanups (chain
);
2086 info_spu_mailbox_list (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
,
2087 const char *field
, const char *msg
)
2089 struct cleanup
*chain
;
2095 chain
= make_cleanup_ui_out_table_begin_end (uiout
, 1, nr
, "mbox");
2097 ui_out_table_header (uiout
, 32, ui_left
, field
, msg
);
2098 ui_out_table_body (uiout
);
2100 for (i
= 0; i
< nr
; i
++)
2102 struct cleanup
*val_chain
;
2104 val_chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "mbox");
2105 val
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
2106 ui_out_field_fmt (uiout
, field
, "0x%s", phex (val
, 4));
2107 do_cleanups (val_chain
);
2109 if (!ui_out_is_mi_like_p (uiout
))
2110 printf_filtered ("\n");
2113 do_cleanups (chain
);
2117 info_spu_mailbox_command (char *args
, int from_tty
)
2119 struct frame_info
*frame
= get_selected_frame (NULL
);
2120 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2121 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2122 struct cleanup
*chain
;
2128 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2129 error (_("\"info spu\" is only supported on the SPU architecture."));
2131 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2133 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoMailbox");
2135 xsnprintf (annex
, sizeof annex
, "%d/mbox_info", id
);
2136 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2137 buf
, 0, sizeof buf
);
2139 error (_("Could not read mbox_info."));
2141 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2142 "mbox", "SPU Outbound Mailbox");
2144 xsnprintf (annex
, sizeof annex
, "%d/ibox_info", id
);
2145 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2146 buf
, 0, sizeof buf
);
2148 error (_("Could not read ibox_info."));
2150 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2151 "ibox", "SPU Outbound Interrupt Mailbox");
2153 xsnprintf (annex
, sizeof annex
, "%d/wbox_info", id
);
2154 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2155 buf
, 0, sizeof buf
);
2157 error (_("Could not read wbox_info."));
2159 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2160 "wbox", "SPU Inbound Mailbox");
2162 do_cleanups (chain
);
2166 spu_mfc_get_bitfield (ULONGEST word
, int first
, int last
)
2168 ULONGEST mask
= ~(~(ULONGEST
)0 << (last
- first
+ 1));
2169 return (word
>> (63 - last
)) & mask
;
2173 info_spu_dma_cmdlist (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
)
2175 static char *spu_mfc_opcode
[256] =
2177 /* 00 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2178 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2179 /* 10 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2180 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2181 /* 20 */ "put", "putb", "putf", NULL
, "putl", "putlb", "putlf", NULL
,
2182 "puts", "putbs", "putfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2183 /* 30 */ "putr", "putrb", "putrf", NULL
, "putrl", "putrlb", "putrlf", NULL
,
2184 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2185 /* 40 */ "get", "getb", "getf", NULL
, "getl", "getlb", "getlf", NULL
,
2186 "gets", "getbs", "getfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2187 /* 50 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2188 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2189 /* 60 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2190 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2191 /* 70 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2192 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2193 /* 80 */ "sdcrt", "sdcrtst", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2194 NULL
, "sdcrz", NULL
, NULL
, NULL
, "sdcrst", NULL
, "sdcrf",
2195 /* 90 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2196 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2197 /* a0 */ "sndsig", "sndsigb", "sndsigf", NULL
, NULL
, NULL
, NULL
, NULL
,
2198 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2199 /* b0 */ "putlluc", NULL
, NULL
, NULL
, "putllc", NULL
, NULL
, NULL
,
2200 "putqlluc", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2201 /* c0 */ "barrier", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2202 "mfceieio", NULL
, NULL
, NULL
, "mfcsync", NULL
, NULL
, NULL
,
2203 /* d0 */ "getllar", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2204 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2205 /* e0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2206 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2207 /* f0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2208 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2211 int *seq
= alloca (nr
* sizeof (int));
2213 struct cleanup
*chain
;
2217 /* Determine sequence in which to display (valid) entries. */
2218 for (i
= 0; i
< nr
; i
++)
2220 /* Search for the first valid entry all of whose
2221 dependencies are met. */
2222 for (j
= 0; j
< nr
; j
++)
2224 ULONGEST mfc_cq_dw3
;
2225 ULONGEST dependencies
;
2227 if (done
& (1 << (nr
- 1 - j
)))
2231 = extract_unsigned_integer (buf
+ 32*j
+ 24,8, byte_order
);
2232 if (!spu_mfc_get_bitfield (mfc_cq_dw3
, 16, 16))
2235 dependencies
= spu_mfc_get_bitfield (mfc_cq_dw3
, 0, nr
- 1);
2236 if ((dependencies
& done
) != dependencies
)
2240 done
|= 1 << (nr
- 1 - j
);
2251 chain
= make_cleanup_ui_out_table_begin_end (uiout
, 10, nr
, "dma_cmd");
2253 ui_out_table_header (uiout
, 7, ui_left
, "opcode", "Opcode");
2254 ui_out_table_header (uiout
, 3, ui_left
, "tag", "Tag");
2255 ui_out_table_header (uiout
, 3, ui_left
, "tid", "TId");
2256 ui_out_table_header (uiout
, 3, ui_left
, "rid", "RId");
2257 ui_out_table_header (uiout
, 18, ui_left
, "ea", "EA");
2258 ui_out_table_header (uiout
, 7, ui_left
, "lsa", "LSA");
2259 ui_out_table_header (uiout
, 7, ui_left
, "size", "Size");
2260 ui_out_table_header (uiout
, 7, ui_left
, "lstaddr", "LstAddr");
2261 ui_out_table_header (uiout
, 7, ui_left
, "lstsize", "LstSize");
2262 ui_out_table_header (uiout
, 1, ui_left
, "error_p", "E");
2264 ui_out_table_body (uiout
);
2266 for (i
= 0; i
< nr
; i
++)
2268 struct cleanup
*cmd_chain
;
2269 ULONGEST mfc_cq_dw0
;
2270 ULONGEST mfc_cq_dw1
;
2271 ULONGEST mfc_cq_dw2
;
2272 int mfc_cmd_opcode
, mfc_cmd_tag
, rclass_id
, tclass_id
;
2273 int lsa
, size
, list_lsa
, list_size
, mfc_lsa
, mfc_size
;
2275 int list_valid_p
, noop_valid_p
, qw_valid_p
, ea_valid_p
, cmd_error_p
;
2277 /* Decode contents of MFC Command Queue Context Save/Restore Registers.
2278 See "Cell Broadband Engine Registers V1.3", section 3.3.2.1. */
2281 = extract_unsigned_integer (buf
+ 32*seq
[i
], 8, byte_order
);
2283 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 8, 8, byte_order
);
2285 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 16, 8, byte_order
);
2287 list_lsa
= spu_mfc_get_bitfield (mfc_cq_dw0
, 0, 14);
2288 list_size
= spu_mfc_get_bitfield (mfc_cq_dw0
, 15, 26);
2289 mfc_cmd_opcode
= spu_mfc_get_bitfield (mfc_cq_dw0
, 27, 34);
2290 mfc_cmd_tag
= spu_mfc_get_bitfield (mfc_cq_dw0
, 35, 39);
2291 list_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw0
, 40, 40);
2292 rclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 41, 43);
2293 tclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 44, 46);
2295 mfc_ea
= spu_mfc_get_bitfield (mfc_cq_dw1
, 0, 51) << 12
2296 | spu_mfc_get_bitfield (mfc_cq_dw2
, 25, 36);
2298 mfc_lsa
= spu_mfc_get_bitfield (mfc_cq_dw2
, 0, 13);
2299 mfc_size
= spu_mfc_get_bitfield (mfc_cq_dw2
, 14, 24);
2300 noop_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 37, 37);
2301 qw_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 38, 38);
2302 ea_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 39, 39);
2303 cmd_error_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 40, 40);
2305 cmd_chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "cmd");
2307 if (spu_mfc_opcode
[mfc_cmd_opcode
])
2308 ui_out_field_string (uiout
, "opcode", spu_mfc_opcode
[mfc_cmd_opcode
]);
2310 ui_out_field_int (uiout
, "opcode", mfc_cmd_opcode
);
2312 ui_out_field_int (uiout
, "tag", mfc_cmd_tag
);
2313 ui_out_field_int (uiout
, "tid", tclass_id
);
2314 ui_out_field_int (uiout
, "rid", rclass_id
);
2317 ui_out_field_fmt (uiout
, "ea", "0x%s", phex (mfc_ea
, 8));
2319 ui_out_field_skip (uiout
, "ea");
2321 ui_out_field_fmt (uiout
, "lsa", "0x%05x", mfc_lsa
<< 4);
2323 ui_out_field_fmt (uiout
, "size", "0x%05x", mfc_size
<< 4);
2325 ui_out_field_fmt (uiout
, "size", "0x%05x", mfc_size
);
2329 ui_out_field_fmt (uiout
, "lstaddr", "0x%05x", list_lsa
<< 3);
2330 ui_out_field_fmt (uiout
, "lstsize", "0x%05x", list_size
<< 3);
2334 ui_out_field_skip (uiout
, "lstaddr");
2335 ui_out_field_skip (uiout
, "lstsize");
2339 ui_out_field_string (uiout
, "error_p", "*");
2341 ui_out_field_skip (uiout
, "error_p");
2343 do_cleanups (cmd_chain
);
2345 if (!ui_out_is_mi_like_p (uiout
))
2346 printf_filtered ("\n");
2349 do_cleanups (chain
);
2353 info_spu_dma_command (char *args
, int from_tty
)
2355 struct frame_info
*frame
= get_selected_frame (NULL
);
2356 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2357 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2358 ULONGEST dma_info_type
;
2359 ULONGEST dma_info_mask
;
2360 ULONGEST dma_info_status
;
2361 ULONGEST dma_info_stall_and_notify
;
2362 ULONGEST dma_info_atomic_command_status
;
2363 struct cleanup
*chain
;
2369 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
2370 error (_("\"info spu\" is only supported on the SPU architecture."));
2372 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2374 xsnprintf (annex
, sizeof annex
, "%d/dma_info", id
);
2375 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2376 buf
, 0, 40 + 16 * 32);
2378 error (_("Could not read dma_info."));
2381 = extract_unsigned_integer (buf
, 8, byte_order
);
2383 = extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2385 = extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2386 dma_info_stall_and_notify
2387 = extract_unsigned_integer (buf
+ 24, 8, byte_order
);
2388 dma_info_atomic_command_status
2389 = extract_unsigned_integer (buf
+ 32, 8, byte_order
);
2391 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoDMA");
2393 if (ui_out_is_mi_like_p (uiout
))
2395 ui_out_field_fmt (uiout
, "dma_info_type", "0x%s",
2396 phex_nz (dma_info_type
, 4));
2397 ui_out_field_fmt (uiout
, "dma_info_mask", "0x%s",
2398 phex_nz (dma_info_mask
, 4));
2399 ui_out_field_fmt (uiout
, "dma_info_status", "0x%s",
2400 phex_nz (dma_info_status
, 4));
2401 ui_out_field_fmt (uiout
, "dma_info_stall_and_notify", "0x%s",
2402 phex_nz (dma_info_stall_and_notify
, 4));
2403 ui_out_field_fmt (uiout
, "dma_info_atomic_command_status", "0x%s",
2404 phex_nz (dma_info_atomic_command_status
, 4));
2408 const char *query_msg
= _("no query pending");
2410 if (dma_info_type
& 4)
2411 switch (dma_info_type
& 3)
2413 case 1: query_msg
= _("'any' query pending"); break;
2414 case 2: query_msg
= _("'all' query pending"); break;
2415 default: query_msg
= _("undefined query type"); break;
2418 printf_filtered (_("Tag-Group Status 0x%s\n"),
2419 phex (dma_info_status
, 4));
2420 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2421 phex (dma_info_mask
, 4), query_msg
);
2422 printf_filtered (_("Stall-and-Notify 0x%s\n"),
2423 phex (dma_info_stall_and_notify
, 4));
2424 printf_filtered (_("Atomic Cmd Status 0x%s\n"),
2425 phex (dma_info_atomic_command_status
, 4));
2426 printf_filtered ("\n");
2429 info_spu_dma_cmdlist (buf
+ 40, 16, byte_order
);
2430 do_cleanups (chain
);
2434 info_spu_proxydma_command (char *args
, int from_tty
)
2436 struct frame_info
*frame
= get_selected_frame (NULL
);
2437 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2438 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2439 ULONGEST dma_info_type
;
2440 ULONGEST dma_info_mask
;
2441 ULONGEST dma_info_status
;
2442 struct cleanup
*chain
;
2448 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2449 error (_("\"info spu\" is only supported on the SPU architecture."));
2451 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2453 xsnprintf (annex
, sizeof annex
, "%d/proxydma_info", id
);
2454 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2455 buf
, 0, 24 + 8 * 32);
2457 error (_("Could not read proxydma_info."));
2459 dma_info_type
= extract_unsigned_integer (buf
, 8, byte_order
);
2460 dma_info_mask
= extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2461 dma_info_status
= extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2463 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoProxyDMA");
2465 if (ui_out_is_mi_like_p (uiout
))
2467 ui_out_field_fmt (uiout
, "proxydma_info_type", "0x%s",
2468 phex_nz (dma_info_type
, 4));
2469 ui_out_field_fmt (uiout
, "proxydma_info_mask", "0x%s",
2470 phex_nz (dma_info_mask
, 4));
2471 ui_out_field_fmt (uiout
, "proxydma_info_status", "0x%s",
2472 phex_nz (dma_info_status
, 4));
2476 const char *query_msg
;
2478 switch (dma_info_type
& 3)
2480 case 0: query_msg
= _("no query pending"); break;
2481 case 1: query_msg
= _("'any' query pending"); break;
2482 case 2: query_msg
= _("'all' query pending"); break;
2483 default: query_msg
= _("undefined query type"); break;
2486 printf_filtered (_("Tag-Group Status 0x%s\n"),
2487 phex (dma_info_status
, 4));
2488 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2489 phex (dma_info_mask
, 4), query_msg
);
2490 printf_filtered ("\n");
2493 info_spu_dma_cmdlist (buf
+ 24, 8, byte_order
);
2494 do_cleanups (chain
);
2498 info_spu_command (char *args
, int from_tty
)
2500 printf_unfiltered (_("\"info spu\" must be followed by the name of an SPU facility.\n"));
2501 help_list (infospucmdlist
, "info spu ", -1, gdb_stdout
);
2505 /* Root of all "set spu "/"show spu " commands. */
2508 show_spu_command (char *args
, int from_tty
)
2510 help_list (showspucmdlist
, "show spu ", all_commands
, gdb_stdout
);
2514 set_spu_command (char *args
, int from_tty
)
2516 help_list (setspucmdlist
, "set spu ", all_commands
, gdb_stdout
);
2520 show_spu_stop_on_load (struct ui_file
*file
, int from_tty
,
2521 struct cmd_list_element
*c
, const char *value
)
2523 fprintf_filtered (file
, _("Stopping for new SPE threads is %s.\n"),
2528 show_spu_auto_flush_cache (struct ui_file
*file
, int from_tty
,
2529 struct cmd_list_element
*c
, const char *value
)
2531 fprintf_filtered (file
, _("Automatic software-cache flush is %s.\n"),
2536 /* Set up gdbarch struct. */
2538 static struct gdbarch
*
2539 spu_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2541 struct gdbarch
*gdbarch
;
2542 struct gdbarch_tdep
*tdep
;
2545 /* Which spufs ID was requested as address space? */
2547 id
= *(int *)info
.tdep_info
;
2548 /* For objfile architectures of SPU solibs, decode the ID from the name.
2549 This assumes the filename convention employed by solib-spu.c. */
2552 char *name
= strrchr (info
.abfd
->filename
, '@');
2554 sscanf (name
, "@0x%*x <%d>", &id
);
2557 /* Find a candidate among extant architectures. */
2558 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2560 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2562 tdep
= gdbarch_tdep (arches
->gdbarch
);
2563 if (tdep
&& tdep
->id
== id
)
2564 return arches
->gdbarch
;
2567 /* None found, so create a new architecture. */
2568 tdep
= XCALLOC (1, struct gdbarch_tdep
);
2570 gdbarch
= gdbarch_alloc (&info
, tdep
);
2573 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_spu
);
2576 set_gdbarch_num_regs (gdbarch
, SPU_NUM_REGS
);
2577 set_gdbarch_num_pseudo_regs (gdbarch
, SPU_NUM_PSEUDO_REGS
);
2578 set_gdbarch_sp_regnum (gdbarch
, SPU_SP_REGNUM
);
2579 set_gdbarch_pc_regnum (gdbarch
, SPU_PC_REGNUM
);
2580 set_gdbarch_read_pc (gdbarch
, spu_read_pc
);
2581 set_gdbarch_write_pc (gdbarch
, spu_write_pc
);
2582 set_gdbarch_register_name (gdbarch
, spu_register_name
);
2583 set_gdbarch_register_type (gdbarch
, spu_register_type
);
2584 set_gdbarch_pseudo_register_read (gdbarch
, spu_pseudo_register_read
);
2585 set_gdbarch_pseudo_register_write (gdbarch
, spu_pseudo_register_write
);
2586 set_gdbarch_value_from_register (gdbarch
, spu_value_from_register
);
2587 set_gdbarch_register_reggroup_p (gdbarch
, spu_register_reggroup_p
);
2590 set_gdbarch_char_signed (gdbarch
, 0);
2591 set_gdbarch_ptr_bit (gdbarch
, 32);
2592 set_gdbarch_addr_bit (gdbarch
, 32);
2593 set_gdbarch_short_bit (gdbarch
, 16);
2594 set_gdbarch_int_bit (gdbarch
, 32);
2595 set_gdbarch_long_bit (gdbarch
, 32);
2596 set_gdbarch_long_long_bit (gdbarch
, 64);
2597 set_gdbarch_float_bit (gdbarch
, 32);
2598 set_gdbarch_double_bit (gdbarch
, 64);
2599 set_gdbarch_long_double_bit (gdbarch
, 64);
2600 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
2601 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
2602 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
2604 /* Address handling. */
2605 set_gdbarch_address_to_pointer (gdbarch
, spu_address_to_pointer
);
2606 set_gdbarch_pointer_to_address (gdbarch
, spu_pointer_to_address
);
2607 set_gdbarch_integer_to_address (gdbarch
, spu_integer_to_address
);
2608 set_gdbarch_address_class_type_flags (gdbarch
, spu_address_class_type_flags
);
2609 set_gdbarch_address_class_type_flags_to_name
2610 (gdbarch
, spu_address_class_type_flags_to_name
);
2611 set_gdbarch_address_class_name_to_type_flags
2612 (gdbarch
, spu_address_class_name_to_type_flags
);
2615 /* Inferior function calls. */
2616 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
2617 set_gdbarch_frame_align (gdbarch
, spu_frame_align
);
2618 set_gdbarch_frame_red_zone_size (gdbarch
, 2000);
2619 set_gdbarch_push_dummy_code (gdbarch
, spu_push_dummy_code
);
2620 set_gdbarch_push_dummy_call (gdbarch
, spu_push_dummy_call
);
2621 set_gdbarch_dummy_id (gdbarch
, spu_dummy_id
);
2622 set_gdbarch_return_value (gdbarch
, spu_return_value
);
2624 /* Frame handling. */
2625 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2626 frame_unwind_append_unwinder (gdbarch
, &spu_frame_unwind
);
2627 frame_base_set_default (gdbarch
, &spu_frame_base
);
2628 set_gdbarch_unwind_pc (gdbarch
, spu_unwind_pc
);
2629 set_gdbarch_unwind_sp (gdbarch
, spu_unwind_sp
);
2630 set_gdbarch_virtual_frame_pointer (gdbarch
, spu_virtual_frame_pointer
);
2631 set_gdbarch_frame_args_skip (gdbarch
, 0);
2632 set_gdbarch_skip_prologue (gdbarch
, spu_skip_prologue
);
2633 set_gdbarch_in_function_epilogue_p (gdbarch
, spu_in_function_epilogue_p
);
2635 /* Cell/B.E. cross-architecture unwinder support. */
2636 frame_unwind_prepend_unwinder (gdbarch
, &spu2ppu_unwind
);
2639 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
2640 set_gdbarch_breakpoint_from_pc (gdbarch
, spu_breakpoint_from_pc
);
2641 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
2642 set_gdbarch_software_single_step (gdbarch
, spu_software_single_step
);
2643 set_gdbarch_get_longjmp_target (gdbarch
, spu_get_longjmp_target
);
2646 set_gdbarch_overlay_update (gdbarch
, spu_overlay_update
);
2651 /* Provide a prototype to silence -Wmissing-prototypes. */
2652 extern initialize_file_ftype _initialize_spu_tdep
;
2655 _initialize_spu_tdep (void)
2657 register_gdbarch_init (bfd_arch_spu
, spu_gdbarch_init
);
2659 /* Add ourselves to objfile event chain. */
2660 observer_attach_new_objfile (spu_overlay_new_objfile
);
2661 spu_overlay_data
= register_objfile_data ();
2663 /* Install spu stop-on-load handler. */
2664 observer_attach_new_objfile (spu_catch_start
);
2666 /* Add ourselves to normal_stop event chain. */
2667 observer_attach_normal_stop (spu_attach_normal_stop
);
2669 /* Add root prefix command for all "set spu"/"show spu" commands. */
2670 add_prefix_cmd ("spu", no_class
, set_spu_command
,
2671 _("Various SPU specific commands."),
2672 &setspucmdlist
, "set spu ", 0, &setlist
);
2673 add_prefix_cmd ("spu", no_class
, show_spu_command
,
2674 _("Various SPU specific commands."),
2675 &showspucmdlist
, "show spu ", 0, &showlist
);
2677 /* Toggle whether or not to add a temporary breakpoint at the "main"
2678 function of new SPE contexts. */
2679 add_setshow_boolean_cmd ("stop-on-load", class_support
,
2680 &spu_stop_on_load_p
, _("\
2681 Set whether to stop for new SPE threads."),
2683 Show whether to stop for new SPE threads."),
2685 Use \"on\" to give control to the user when a new SPE thread\n\
2686 enters its \"main\" function.\n\
2687 Use \"off\" to disable stopping for new SPE threads."),
2689 show_spu_stop_on_load
,
2690 &setspucmdlist
, &showspucmdlist
);
2692 /* Toggle whether or not to automatically flush the software-managed
2693 cache whenever SPE execution stops. */
2694 add_setshow_boolean_cmd ("auto-flush-cache", class_support
,
2695 &spu_auto_flush_cache_p
, _("\
2696 Set whether to automatically flush the software-managed cache."),
2698 Show whether to automatically flush the software-managed cache."),
2700 Use \"on\" to automatically flush the software-managed cache\n\
2701 whenever SPE execution stops.\n\
2702 Use \"off\" to never automatically flush the software-managed cache."),
2704 show_spu_auto_flush_cache
,
2705 &setspucmdlist
, &showspucmdlist
);
2707 /* Add root prefix command for all "info spu" commands. */
2708 add_prefix_cmd ("spu", class_info
, info_spu_command
,
2709 _("Various SPU specific commands."),
2710 &infospucmdlist
, "info spu ", 0, &infolist
);
2712 /* Add various "info spu" commands. */
2713 add_cmd ("event", class_info
, info_spu_event_command
,
2714 _("Display SPU event facility status.\n"),
2716 add_cmd ("signal", class_info
, info_spu_signal_command
,
2717 _("Display SPU signal notification facility status.\n"),
2719 add_cmd ("mailbox", class_info
, info_spu_mailbox_command
,
2720 _("Display SPU mailbox facility status.\n"),
2722 add_cmd ("dma", class_info
, info_spu_dma_command
,
2723 _("Display MFC DMA status.\n"),
2725 add_cmd ("proxydma", class_info
, info_spu_proxydma_command
,
2726 _("Display MFC Proxy-DMA status.\n"),