1 /* SPU target-dependent code for GDB, the GNU debugger.
2 Copyright (C) 2006, 2007 Free Software Foundation, Inc.
4 Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
5 Based on a port by Sid Manning <sid@us.ibm.com>.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street, Fifth Floor,
22 Boston, MA 02110-1301, USA. */
25 #include "arch-utils.h"
29 #include "gdb_string.h"
30 #include "gdb_assert.h"
32 #include "frame-unwind.h"
33 #include "frame-base.h"
34 #include "trad-frame.h"
43 #include "reggroups.h"
44 #include "floatformat.h"
48 /* SPU-specific vector type. */
49 struct type
*spu_builtin_type_vec128
;
54 spu_register_name (int reg_nr
)
56 static char *register_names
[] =
58 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
59 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
60 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
61 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
62 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
63 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
64 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
65 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
66 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
67 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
68 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
69 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
70 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
71 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
72 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
73 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
79 if (reg_nr
>= sizeof register_names
/ sizeof *register_names
)
82 return register_names
[reg_nr
];
86 spu_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
88 if (reg_nr
< SPU_NUM_GPRS
)
89 return spu_builtin_type_vec128
;
94 return builtin_type_uint32
;
97 return builtin_type_void_func_ptr
;
100 return builtin_type_void_data_ptr
;
103 internal_error (__FILE__
, __LINE__
, "invalid regnum");
107 /* Pseudo registers for preferred slots - stack pointer. */
110 spu_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
111 int regnum
, gdb_byte
*buf
)
118 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
119 memcpy (buf
, reg
, 4);
123 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
128 spu_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
129 int regnum
, const gdb_byte
*buf
)
136 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
137 memcpy (reg
, buf
, 4);
138 regcache_raw_write (regcache
, SPU_RAW_SP_REGNUM
, reg
);
142 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
146 /* Value conversion -- access scalar values at the preferred slot. */
148 static struct value
*
149 spu_value_from_register (struct type
*type
, int regnum
,
150 struct frame_info
*frame
)
152 struct value
*value
= default_value_from_register (type
, regnum
, frame
);
153 int len
= TYPE_LENGTH (type
);
155 if (regnum
< SPU_NUM_GPRS
&& len
< 16)
157 int preferred_slot
= len
< 4 ? 4 - len
: 0;
158 set_value_offset (value
, preferred_slot
);
164 /* Register groups. */
167 spu_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
168 struct reggroup
*group
)
170 /* Registers displayed via 'info regs'. */
171 if (group
== general_reggroup
)
174 /* Registers displayed via 'info float'. */
175 if (group
== float_reggroup
)
178 /* Registers that need to be saved/restored in order to
179 push or pop frames. */
180 if (group
== save_reggroup
|| group
== restore_reggroup
)
183 return default_register_reggroup_p (gdbarch
, regnum
, group
);
187 /* Decoding SPU instructions. */
224 is_rr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
)
226 if ((insn
>> 21) == op
)
229 *ra
= (insn
>> 7) & 127;
230 *rb
= (insn
>> 14) & 127;
238 is_rrr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
, int *rc
)
240 if ((insn
>> 28) == op
)
242 *rt
= (insn
>> 21) & 127;
243 *ra
= (insn
>> 7) & 127;
244 *rb
= (insn
>> 14) & 127;
253 is_ri7 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i7
)
255 if ((insn
>> 21) == op
)
258 *ra
= (insn
>> 7) & 127;
259 *i7
= (((insn
>> 14) & 127) ^ 0x40) - 0x40;
267 is_ri10 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i10
)
269 if ((insn
>> 24) == op
)
272 *ra
= (insn
>> 7) & 127;
273 *i10
= (((insn
>> 14) & 0x3ff) ^ 0x200) - 0x200;
281 is_ri16 (unsigned int insn
, int op
, int *rt
, int *i16
)
283 if ((insn
>> 23) == op
)
286 *i16
= (((insn
>> 7) & 0xffff) ^ 0x8000) - 0x8000;
294 is_ri18 (unsigned int insn
, int op
, int *rt
, int *i18
)
296 if ((insn
>> 25) == op
)
299 *i18
= (((insn
>> 7) & 0x3ffff) ^ 0x20000) - 0x20000;
307 is_branch (unsigned int insn
, int *offset
, int *reg
)
311 if (is_ri16 (insn
, op_br
, &rt
, &i16
)
312 || is_ri16 (insn
, op_brsl
, &rt
, &i16
)
313 || is_ri16 (insn
, op_brnz
, &rt
, &i16
)
314 || is_ri16 (insn
, op_brz
, &rt
, &i16
)
315 || is_ri16 (insn
, op_brhnz
, &rt
, &i16
)
316 || is_ri16 (insn
, op_brhz
, &rt
, &i16
))
318 *reg
= SPU_PC_REGNUM
;
323 if (is_ri16 (insn
, op_bra
, &rt
, &i16
)
324 || is_ri16 (insn
, op_brasl
, &rt
, &i16
))
331 if (is_ri7 (insn
, op_bi
, &rt
, reg
, &i7
)
332 || is_ri7 (insn
, op_bisl
, &rt
, reg
, &i7
)
333 || is_ri7 (insn
, op_biz
, &rt
, reg
, &i7
)
334 || is_ri7 (insn
, op_binz
, &rt
, reg
, &i7
)
335 || is_ri7 (insn
, op_bihz
, &rt
, reg
, &i7
)
336 || is_ri7 (insn
, op_bihnz
, &rt
, reg
, &i7
))
346 /* Prolog parsing. */
348 struct spu_prologue_data
350 /* Stack frame size. -1 if analysis was unsuccessful. */
353 /* How to find the CFA. The CFA is equal to SP at function entry. */
357 /* Offset relative to CFA where a register is saved. -1 if invalid. */
358 int reg_offset
[SPU_NUM_GPRS
];
362 spu_analyze_prologue (CORE_ADDR start_pc
, CORE_ADDR end_pc
,
363 struct spu_prologue_data
*data
)
368 int reg_immed
[SPU_NUM_GPRS
];
370 CORE_ADDR prolog_pc
= start_pc
;
375 /* Initialize DATA to default values. */
378 data
->cfa_reg
= SPU_RAW_SP_REGNUM
;
379 data
->cfa_offset
= 0;
381 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
382 data
->reg_offset
[i
] = -1;
384 /* Set up REG_IMMED array. This is non-zero for a register if we know its
385 preferred slot currently holds this immediate value. */
386 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
389 /* Scan instructions until the first branch.
391 The following instructions are important prolog components:
393 - The first instruction to set up the stack pointer.
394 - The first instruction to set up the frame pointer.
395 - The first instruction to save the link register.
397 We return the instruction after the latest of these three,
398 or the incoming PC if none is found. The first instruction
399 to set up the stack pointer also defines the frame size.
401 Note that instructions saving incoming arguments to their stack
402 slots are not counted as important, because they are hard to
403 identify with certainty. This should not matter much, because
404 arguments are relevant only in code compiled with debug data,
405 and in such code the GDB core will advance until the first source
406 line anyway, using SAL data.
408 For purposes of stack unwinding, we analyze the following types
409 of instructions in addition:
411 - Any instruction adding to the current frame pointer.
412 - Any instruction loading an immediate constant into a register.
413 - Any instruction storing a register onto the stack.
415 These are used to compute the CFA and REG_OFFSET output. */
417 for (pc
= start_pc
; pc
< end_pc
; pc
+= 4)
420 int rt
, ra
, rb
, rc
, immed
;
422 if (target_read_memory (pc
, buf
, 4))
424 insn
= extract_unsigned_integer (buf
, 4);
426 /* AI is the typical instruction to set up a stack frame.
427 It is also used to initialize the frame pointer. */
428 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
))
430 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
431 data
->cfa_offset
-= immed
;
433 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
441 else if (rt
== SPU_FP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
447 data
->cfa_reg
= SPU_FP_REGNUM
;
448 data
->cfa_offset
-= immed
;
452 /* A is used to set up stack frames of size >= 512 bytes.
453 If we have tracked the contents of the addend register,
454 we can handle this as well. */
455 else if (is_rr (insn
, op_a
, &rt
, &ra
, &rb
))
457 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
459 if (reg_immed
[rb
] != 0)
460 data
->cfa_offset
-= reg_immed
[rb
];
462 data
->cfa_reg
= -1; /* We don't know the CFA any more. */
465 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
471 if (reg_immed
[rb
] != 0)
472 data
->size
= -reg_immed
[rb
];
476 /* We need to track IL and ILA used to load immediate constants
477 in case they are later used as input to an A instruction. */
478 else if (is_ri16 (insn
, op_il
, &rt
, &immed
))
480 reg_immed
[rt
] = immed
;
482 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
486 else if (is_ri18 (insn
, op_ila
, &rt
, &immed
))
488 reg_immed
[rt
] = immed
& 0x3ffff;
490 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
494 /* STQD is used to save registers to the stack. */
495 else if (is_ri10 (insn
, op_stqd
, &rt
, &ra
, &immed
))
497 if (ra
== data
->cfa_reg
)
498 data
->reg_offset
[rt
] = data
->cfa_offset
- (immed
<< 4);
500 if (ra
== data
->cfa_reg
&& rt
== SPU_LR_REGNUM
508 /* _start uses SELB to set up the stack pointer. */
509 else if (is_rrr (insn
, op_selb
, &rt
, &ra
, &rb
, &rc
))
511 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
515 /* We terminate if we find a branch. */
516 else if (is_branch (insn
, &immed
, &ra
))
521 /* If we successfully parsed until here, and didn't find any instruction
522 modifying SP, we assume we have a frameless function. */
526 /* Return cooked instead of raw SP. */
527 if (data
->cfa_reg
== SPU_RAW_SP_REGNUM
)
528 data
->cfa_reg
= SPU_SP_REGNUM
;
533 /* Return the first instruction after the prologue starting at PC. */
535 spu_skip_prologue (CORE_ADDR pc
)
537 struct spu_prologue_data data
;
538 return spu_analyze_prologue (pc
, (CORE_ADDR
)-1, &data
);
541 /* Return the frame pointer in use at address PC. */
543 spu_virtual_frame_pointer (CORE_ADDR pc
, int *reg
, LONGEST
*offset
)
545 struct spu_prologue_data data
;
546 spu_analyze_prologue (pc
, (CORE_ADDR
)-1, &data
);
548 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
550 /* The 'frame pointer' address is CFA minus frame size. */
552 *offset
= data
.cfa_offset
- data
.size
;
556 /* ??? We don't really know ... */
557 *reg
= SPU_SP_REGNUM
;
562 /* Normal stack frames. */
564 struct spu_unwind_cache
567 CORE_ADDR frame_base
;
568 CORE_ADDR local_base
;
570 struct trad_frame_saved_reg
*saved_regs
;
573 static struct spu_unwind_cache
*
574 spu_frame_unwind_cache (struct frame_info
*next_frame
,
575 void **this_prologue_cache
)
577 struct spu_unwind_cache
*info
;
578 struct spu_prologue_data data
;
580 if (*this_prologue_cache
)
581 return *this_prologue_cache
;
583 info
= FRAME_OBSTACK_ZALLOC (struct spu_unwind_cache
);
584 *this_prologue_cache
= info
;
585 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
586 info
->frame_base
= 0;
587 info
->local_base
= 0;
589 /* Find the start of the current function, and analyze its prologue. */
590 info
->func
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
593 /* Fall back to using the current PC as frame ID. */
594 info
->func
= frame_pc_unwind (next_frame
);
598 spu_analyze_prologue (info
->func
, frame_pc_unwind (next_frame
), &data
);
601 /* If successful, use prologue analysis data. */
602 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
608 /* Determine CFA via unwound CFA_REG plus CFA_OFFSET. */
609 frame_unwind_register (next_frame
, data
.cfa_reg
, buf
);
610 cfa
= extract_unsigned_integer (buf
, 4) + data
.cfa_offset
;
612 /* Call-saved register slots. */
613 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
614 if (i
== SPU_LR_REGNUM
615 || (i
>= SPU_SAVED1_REGNUM
&& i
<= SPU_SAVEDN_REGNUM
))
616 if (data
.reg_offset
[i
] != -1)
617 info
->saved_regs
[i
].addr
= cfa
- data
.reg_offset
[i
];
619 /* The previous PC comes from the link register. */
620 if (trad_frame_addr_p (info
->saved_regs
, SPU_LR_REGNUM
))
621 info
->saved_regs
[SPU_PC_REGNUM
] = info
->saved_regs
[SPU_LR_REGNUM
];
623 info
->saved_regs
[SPU_PC_REGNUM
].realreg
= SPU_LR_REGNUM
;
625 /* The previous SP is equal to the CFA. */
626 trad_frame_set_value (info
->saved_regs
, SPU_SP_REGNUM
, cfa
);
629 info
->frame_base
= cfa
;
630 info
->local_base
= cfa
- data
.size
;
633 /* Otherwise, fall back to reading the backchain link. */
636 CORE_ADDR reg
, backchain
;
638 /* Get the backchain. */
639 reg
= frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
640 backchain
= read_memory_unsigned_integer (reg
, 4);
642 /* A zero backchain terminates the frame chain. Also, sanity
643 check against the local store size limit. */
644 if (backchain
!= 0 && backchain
< SPU_LS_SIZE
)
646 /* Assume the link register is saved into its slot. */
647 if (backchain
+ 16 < SPU_LS_SIZE
)
648 info
->saved_regs
[SPU_LR_REGNUM
].addr
= backchain
+ 16;
650 /* This will also be the previous PC. */
651 if (trad_frame_addr_p (info
->saved_regs
, SPU_LR_REGNUM
))
652 info
->saved_regs
[SPU_PC_REGNUM
] = info
->saved_regs
[SPU_LR_REGNUM
];
654 info
->saved_regs
[SPU_PC_REGNUM
].realreg
= SPU_LR_REGNUM
;
656 /* The previous SP will equal the backchain value. */
657 trad_frame_set_value (info
->saved_regs
, SPU_SP_REGNUM
, backchain
);
660 info
->frame_base
= backchain
;
661 info
->local_base
= reg
;
669 spu_frame_this_id (struct frame_info
*next_frame
,
670 void **this_prologue_cache
, struct frame_id
*this_id
)
672 struct spu_unwind_cache
*info
=
673 spu_frame_unwind_cache (next_frame
, this_prologue_cache
);
675 if (info
->frame_base
== 0)
678 *this_id
= frame_id_build (info
->frame_base
, info
->func
);
682 spu_frame_prev_register (struct frame_info
*next_frame
,
683 void **this_prologue_cache
,
684 int regnum
, int *optimizedp
,
685 enum lval_type
*lvalp
, CORE_ADDR
* addrp
,
686 int *realnump
, gdb_byte
*bufferp
)
688 struct spu_unwind_cache
*info
689 = spu_frame_unwind_cache (next_frame
, this_prologue_cache
);
691 /* Special-case the stack pointer. */
692 if (regnum
== SPU_RAW_SP_REGNUM
)
693 regnum
= SPU_SP_REGNUM
;
695 trad_frame_get_prev_register (next_frame
, info
->saved_regs
, regnum
,
696 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
699 static const struct frame_unwind spu_frame_unwind
= {
702 spu_frame_prev_register
705 const struct frame_unwind
*
706 spu_frame_sniffer (struct frame_info
*next_frame
)
708 return &spu_frame_unwind
;
712 spu_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
714 struct spu_unwind_cache
*info
715 = spu_frame_unwind_cache (next_frame
, this_cache
);
716 return info
->local_base
;
719 static const struct frame_base spu_frame_base
= {
721 spu_frame_base_address
,
722 spu_frame_base_address
,
723 spu_frame_base_address
727 spu_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
729 return frame_unwind_register_unsigned (next_frame
, SPU_PC_REGNUM
);
733 spu_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
735 return frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
739 /* Function calling convention. */
742 spu_scalar_value_p (struct type
*type
)
744 switch (TYPE_CODE (type
))
748 case TYPE_CODE_RANGE
:
753 return TYPE_LENGTH (type
) <= 16;
761 spu_value_to_regcache (struct regcache
*regcache
, int regnum
,
762 struct type
*type
, const gdb_byte
*in
)
764 int len
= TYPE_LENGTH (type
);
766 if (spu_scalar_value_p (type
))
768 int preferred_slot
= len
< 4 ? 4 - len
: 0;
769 regcache_cooked_write_part (regcache
, regnum
, preferred_slot
, len
, in
);
775 regcache_cooked_write (regcache
, regnum
++, in
);
781 regcache_cooked_write_part (regcache
, regnum
, 0, len
, in
);
786 spu_regcache_to_value (struct regcache
*regcache
, int regnum
,
787 struct type
*type
, gdb_byte
*out
)
789 int len
= TYPE_LENGTH (type
);
791 if (spu_scalar_value_p (type
))
793 int preferred_slot
= len
< 4 ? 4 - len
: 0;
794 regcache_cooked_read_part (regcache
, regnum
, preferred_slot
, len
, out
);
800 regcache_cooked_read (regcache
, regnum
++, out
);
806 regcache_cooked_read_part (regcache
, regnum
, 0, len
, out
);
811 spu_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
812 struct regcache
*regcache
, CORE_ADDR bp_addr
,
813 int nargs
, struct value
**args
, CORE_ADDR sp
,
814 int struct_return
, CORE_ADDR struct_addr
)
817 int regnum
= SPU_ARG1_REGNUM
;
821 /* Set the return address. */
822 memset (buf
, 0, sizeof buf
);
823 store_unsigned_integer (buf
, 4, bp_addr
);
824 regcache_cooked_write (regcache
, SPU_LR_REGNUM
, buf
);
826 /* If STRUCT_RETURN is true, then the struct return address (in
827 STRUCT_ADDR) will consume the first argument-passing register.
828 Both adjust the register count and store that value. */
831 memset (buf
, 0, sizeof buf
);
832 store_unsigned_integer (buf
, 4, struct_addr
);
833 regcache_cooked_write (regcache
, regnum
++, buf
);
836 /* Fill in argument registers. */
837 for (i
= 0; i
< nargs
; i
++)
839 struct value
*arg
= args
[i
];
840 struct type
*type
= check_typedef (value_type (arg
));
841 const gdb_byte
*contents
= value_contents (arg
);
842 int len
= TYPE_LENGTH (type
);
843 int n_regs
= align_up (len
, 16) / 16;
845 /* If the argument doesn't wholly fit into registers, it and
846 all subsequent arguments go to the stack. */
847 if (regnum
+ n_regs
- 1 > SPU_ARGN_REGNUM
)
853 spu_value_to_regcache (regcache
, regnum
, type
, contents
);
857 /* Overflow arguments go to the stack. */
862 /* Allocate all required stack size. */
863 for (i
= stack_arg
; i
< nargs
; i
++)
865 struct type
*type
= check_typedef (value_type (args
[i
]));
866 sp
-= align_up (TYPE_LENGTH (type
), 16);
869 /* Fill in stack arguments. */
871 for (i
= stack_arg
; i
< nargs
; i
++)
873 struct value
*arg
= args
[i
];
874 struct type
*type
= check_typedef (value_type (arg
));
875 int len
= TYPE_LENGTH (type
);
878 if (spu_scalar_value_p (type
))
879 preferred_slot
= len
< 4 ? 4 - len
: 0;
883 target_write_memory (ap
+ preferred_slot
, value_contents (arg
), len
);
884 ap
+= align_up (TYPE_LENGTH (type
), 16);
888 /* Allocate stack frame header. */
891 /* Finally, update the SP register. */
892 regcache_cooked_write_unsigned (regcache
, SPU_SP_REGNUM
, sp
);
897 static struct frame_id
898 spu_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
900 return frame_id_build (spu_unwind_sp (gdbarch
, next_frame
),
901 spu_unwind_pc (gdbarch
, next_frame
));
904 /* Function return value access. */
906 static enum return_value_convention
907 spu_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
908 struct regcache
*regcache
, gdb_byte
*out
, const gdb_byte
*in
)
910 enum return_value_convention rvc
;
912 if (TYPE_LENGTH (type
) <= (SPU_ARGN_REGNUM
- SPU_ARG1_REGNUM
+ 1) * 16)
913 rvc
= RETURN_VALUE_REGISTER_CONVENTION
;
915 rvc
= RETURN_VALUE_STRUCT_CONVENTION
;
921 case RETURN_VALUE_REGISTER_CONVENTION
:
922 spu_value_to_regcache (regcache
, SPU_ARG1_REGNUM
, type
, in
);
925 case RETURN_VALUE_STRUCT_CONVENTION
:
926 error ("Cannot set function return value.");
934 case RETURN_VALUE_REGISTER_CONVENTION
:
935 spu_regcache_to_value (regcache
, SPU_ARG1_REGNUM
, type
, out
);
938 case RETURN_VALUE_STRUCT_CONVENTION
:
939 error ("Function return value unknown.");
950 static const gdb_byte
*
951 spu_breakpoint_from_pc (CORE_ADDR
* pcptr
, int *lenptr
)
953 static const gdb_byte breakpoint
[] = { 0x00, 0x00, 0x3f, 0xff };
955 *lenptr
= sizeof breakpoint
;
960 /* Software single-stepping support. */
963 spu_software_single_step (enum target_signal signal
, int insert_breakpoints_p
)
965 if (insert_breakpoints_p
)
967 CORE_ADDR pc
, next_pc
;
972 regcache_cooked_read (current_regcache
, SPU_PC_REGNUM
, buf
);
973 pc
= extract_unsigned_integer (buf
, 4);
975 if (target_read_memory (pc
, buf
, 4))
977 insn
= extract_unsigned_integer (buf
, 4);
979 /* Next sequential instruction is at PC + 4, except if the current
980 instruction is a PPE-assisted call, in which case it is at PC + 8.
981 Wrap around LS limit to be on the safe side. */
982 if ((insn
& 0xffffff00) == 0x00002100)
983 next_pc
= (pc
+ 8) & (SPU_LS_SIZE
- 1) & -4;
985 next_pc
= (pc
+ 4) & (SPU_LS_SIZE
- 1) & -4;
987 insert_single_step_breakpoint (next_pc
);
989 if (is_branch (insn
, &offset
, ®
))
991 CORE_ADDR target
= offset
;
993 if (reg
== SPU_PC_REGNUM
)
997 regcache_cooked_read_part (current_regcache
, reg
, 0, 4, buf
);
998 target
+= extract_unsigned_integer (buf
, 4);
1001 target
= target
& (SPU_LS_SIZE
- 1) & -4;
1002 if (target
!= next_pc
)
1003 insert_single_step_breakpoint (target
);
1007 remove_single_step_breakpoints ();
1011 /* Set up gdbarch struct. */
1013 static struct gdbarch
*
1014 spu_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1016 struct gdbarch
*gdbarch
;
1018 /* Find a candidate among the list of pre-declared architectures. */
1019 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1021 return arches
->gdbarch
;
1024 if (info
.bfd_arch_info
->mach
!= bfd_mach_spu
)
1027 /* Yes, create a new architecture. */
1028 gdbarch
= gdbarch_alloc (&info
, NULL
);
1031 set_gdbarch_print_insn (gdbarch
, print_insn_spu
);
1034 set_gdbarch_num_regs (gdbarch
, SPU_NUM_REGS
);
1035 set_gdbarch_num_pseudo_regs (gdbarch
, SPU_NUM_PSEUDO_REGS
);
1036 set_gdbarch_sp_regnum (gdbarch
, SPU_SP_REGNUM
);
1037 set_gdbarch_pc_regnum (gdbarch
, SPU_PC_REGNUM
);
1038 set_gdbarch_register_name (gdbarch
, spu_register_name
);
1039 set_gdbarch_register_type (gdbarch
, spu_register_type
);
1040 set_gdbarch_pseudo_register_read (gdbarch
, spu_pseudo_register_read
);
1041 set_gdbarch_pseudo_register_write (gdbarch
, spu_pseudo_register_write
);
1042 set_gdbarch_value_from_register (gdbarch
, spu_value_from_register
);
1043 set_gdbarch_register_reggroup_p (gdbarch
, spu_register_reggroup_p
);
1046 set_gdbarch_char_signed (gdbarch
, 0);
1047 set_gdbarch_ptr_bit (gdbarch
, 32);
1048 set_gdbarch_addr_bit (gdbarch
, 32);
1049 set_gdbarch_short_bit (gdbarch
, 16);
1050 set_gdbarch_int_bit (gdbarch
, 32);
1051 set_gdbarch_long_bit (gdbarch
, 32);
1052 set_gdbarch_long_long_bit (gdbarch
, 64);
1053 set_gdbarch_float_bit (gdbarch
, 32);
1054 set_gdbarch_double_bit (gdbarch
, 64);
1055 set_gdbarch_long_double_bit (gdbarch
, 64);
1056 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
1057 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
1058 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
1060 /* Inferior function calls. */
1061 set_gdbarch_push_dummy_call (gdbarch
, spu_push_dummy_call
);
1062 set_gdbarch_unwind_dummy_id (gdbarch
, spu_unwind_dummy_id
);
1063 set_gdbarch_return_value (gdbarch
, spu_return_value
);
1065 /* Frame handling. */
1066 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1067 frame_unwind_append_sniffer (gdbarch
, spu_frame_sniffer
);
1068 frame_base_set_default (gdbarch
, &spu_frame_base
);
1069 set_gdbarch_unwind_pc (gdbarch
, spu_unwind_pc
);
1070 set_gdbarch_unwind_sp (gdbarch
, spu_unwind_sp
);
1071 set_gdbarch_virtual_frame_pointer (gdbarch
, spu_virtual_frame_pointer
);
1072 set_gdbarch_frame_args_skip (gdbarch
, 0);
1073 set_gdbarch_skip_prologue (gdbarch
, spu_skip_prologue
);
1076 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
1077 set_gdbarch_breakpoint_from_pc (gdbarch
, spu_breakpoint_from_pc
);
1078 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
1079 set_gdbarch_software_single_step (gdbarch
, spu_software_single_step
);
1084 /* Implement a SPU-specific vector type as replacement
1085 for __gdb_builtin_type_vec128. */
1087 spu_init_vector_type (void)
1091 type
= init_composite_type ("__spu_builtin_type_vec128", TYPE_CODE_UNION
);
1092 append_composite_type_field (type
, "uint128", builtin_type_int128
);
1093 append_composite_type_field (type
, "v2_int64", builtin_type_v2_int64
);
1094 append_composite_type_field (type
, "v4_int32", builtin_type_v4_int32
);
1095 append_composite_type_field (type
, "v8_int16", builtin_type_v8_int16
);
1096 append_composite_type_field (type
, "v16_int8", builtin_type_v16_int8
);
1097 append_composite_type_field (type
, "v2_double", builtin_type_v2_double
);
1098 append_composite_type_field (type
, "v4_float", builtin_type_v4_float
);
1100 TYPE_FLAGS (type
) |= TYPE_FLAG_VECTOR
;
1101 TYPE_NAME (type
) = "spu_builtin_type_vec128";
1102 spu_builtin_type_vec128
= type
;
1106 _initialize_spu_tdep (void)
1108 register_gdbarch_init (bfd_arch_spu
, spu_gdbarch_init
);
1110 spu_init_vector_type ();